; -------------------------------------------------------------------------------- ; @Title: TMS320DM355 On-Chip Peripherals ; @Props: Released ; @Author: ADI, FIL ; @Changelog: 2009-09-16 ; @Manufacturer: TI - Texas Instruments ; @Doc: tms320dm357.pdf; sprz285_errata.pdf; sprugh0.pdf; sprug06.pdf ; sprug25.pdf; sprug26.pdf; sprug27.pdf; sprug28.pdf; sprug29.pdf; sprug30.pdf ; sprug31.pdf; sprug32.pdf; sprug33.pdf; sprug34.pdf; sprug35.pdf; sprug36.pdf ; sprug37.pdf; sprug38.pdf; sprug39.pdf; sprugh2.pdf; sprugh3.pdf ; @Core: ARM926EJ-S ; @Chip: TMS320DM355 ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pertms320dm357.per 7592 2017-02-18 13:54:14Z askoncej $ config 16. 8. width 0xb AUTOINDENT.PUSH AUTOINDENT.OFF width 8. tree "ID Registers" group c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision" group c15:0x0100--0x0100 line.long 0x0 "CTR,Cache Type" bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" group c15:0x0200--0x0200 line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register" bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes" bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes" tree.end tree "MMU Control and Configuration" width 8. group c15:0x0001--0x0001 line.long 0x0 "CR,Control Register" bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable" bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" textline " " bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" textline " " group c15:0x0002--0x0002 line.long 0x0 "TTBR,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group c15:0x0005--0x0005 line.long 0x0 "DFSR,Data Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0105--0x0105 line.long 0x0 "IFSR,Instruction Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x0006--0x0006 line.long 0x0 "DFAR,Data Fault Address Register" textline " " group c15:0x000a--0x000a line.long 0x0 "TLBR,TLB Lockdown Register" bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. " P ,P bit" "0,1" textline " " group c15:0x000d--0x000d line.long 0x0 "FCSEPID,FCSE Process ID" group c15:0x010d--0x010d line.long 0x0 "CONTEXT,Context ID" tree.end tree "Cache Control and Configuration" group c15:0x0009--0x0009 line.long 0x0 "DCACHE,Data Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" group c15:0x0109--0x0109 line.long 0x0 "ICACHE,Instruction Cache Lockdown" bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1" bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1" bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1" bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1" tree.end tree "TCM Control and Configuration" group c15:0x0019--0x0019 line.long 0x0 "DTCM,Data TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" group c15:0x0119--0x0119 line.long 0x0 "ITCM,Instruction TCM Region Register" hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address" bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res" bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable" tree.end tree "Test and Debug" group c15:0x000f--0x000f line.long 0x0 "DOVRR,Debug Override Register" bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable" bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort" bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort" textline " " bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable" bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable" bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable" bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT" group c15:0x001f--0x001f line.long 0x0 "ADDRESS,Debug/Test Address" ;wgroup c15:0x402f--0x402f ; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry" ;wgroup c15:0x403f--0x403f ; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry" ;wgroup c15:0x404f--0x404f ; line.long 0x0 "RMTLBPA,Read PA in main TLB entry" ;wgroup c15:0x405f--0x405f ; line.long 0x0 "WMTLBPA,Write PA in main TLB entry" ;wgroup c15:0x407f--0x407f ; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM" ;wgroup c15:0x412f--0x412f ; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry" ;wgroup c15:0x413f--0x413f ; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry" ;wgroup c15:0x414f--0x414f ; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry" ;wgroup c15:0x415f--0x415f ; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry" ;wgroup c15:0x417f--0x417f ; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM" group c15:0x101f--0x101f line.long 0x0 "TRACE,Trace Control" bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall" bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall" group c15:0x700f--0x700f line.long 0x0 "CACHE,Cache Debug Control" bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through" bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable" bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable" group c15:0x701f--0x701f line.long 0x0 "MMU,MMU Debug Control" bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable" textline " " bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable" bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable" bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable" bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable" group c15:0x002f--0x002f line.long 0x0 "REMAP,Memory Region Remap" bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB" textline " " bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB" bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB" bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB" tree.end tree "ICEbreaker" width 8. group ice:0x0--0x5 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled" textline " " bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled" bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x4 "DBGSTAT,Debug Status Register" bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res" bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java" bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb" bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled" bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x8 "VECTOR,Vector Catch Register" bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena" bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena" bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena" bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena" bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena" bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena" bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena" line.long 0x10 "COMCTRL,Debug Communication Control Register" bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend" bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend" line.long 0x14 "COMDATA,Debug Communication Data Register" group ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end AUTOINDENT.POP tree "EMIF (Asynchronous External Memory Interface)" base asd:0x01e00000 width 17. group.long 0x04++0x3 line.long 0x00 "AWCCR,Asynchronous Wait Cycle Configuration Register" bitfld.long 0x00 28. " WP0 ,WAIT polarity" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " MEWC ,Maximum extended wait cycles" sif (cpu()=="DM357") group.long 0x10++0xf line.long 0x0 "A1CR,Asynchronous 1 Configuration Register" bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x4 "A2CR,Asynchronous 2 Configuration Register" bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x8 "A3CR,Asynchronous 3 Configuration Register" bitfld.long 0x8 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x8 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x8 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x8 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x8 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x8 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x8 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x8 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x8 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x8 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0xC "A4CR,Asynchronous 4 Configuration Register" bitfld.long 0xC 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0xC 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0xC 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0xC 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0xC 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0xC 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0xC 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0xC 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0xC 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0xC 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." else group.long 0x10++0x7 line.long 0x0 "A1CR,Asynchronous 1 Configuration Register" bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." line.long 0x4 "A2CR,Asynchronous 2 Configuration Register" bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled" bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled" hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles" hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles" hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles" textline " " hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles" hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles" bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3" textline " " bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..." endif group.long 0x40++0x7 line.long 0x00 "EIRR,EMIF Interrupt Raw Register" eventfld.long 0x00 2. " WR ,Wait Rise" "Not occurred,Occurred" eventfld.long 0x00 0. " AT ,Asynchronous Timeout" "Not occurred,Occurred" line.long 0x04 "EIMR,EMIF Interrupt Mask Register" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " WRM_set/clr ,Wait Rise Masked" "No interrupt,Interrupt" textline " " setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " ATM_set/clr ,Asynchronous Timeout Masked" "No interrupt,Interrupt" sif (cpu()=="DM357") group.long 0x60++0x03 line.long 0x00 "NANDFCR,NAND Flash Control Register" bitfld.long 0x00 11. " CS5ECC ,NAND Flash ECC start for chip select 5" "Not started,Started" bitfld.long 0x00 10. " CS4ECC ,NAND Flash ECC start for chip select 4" "Not started,Started" textline " " bitfld.long 0x00 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started" bitfld.long 0x00 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started" textline " " bitfld.long 0x00 3. " CS5NAND ,NAND Flash mode for chip select 5" "Disabled,Enabled" bitfld.long 0x00 2. " CS4NAND ,NAND Flash mode for chip select 4" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled" bitfld.long 0x00 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled" else group.long 0x5c++0x7 line.long 0x00 "ONENANDCTL,OneNAND Flash Control Register" bitfld.long 0x00 8.--10. " RD_LATENCY ,Synchronous Mode Read Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5. " CS3ONENANDRDMOD ,CS3 One NAND Read Mode" "Async,Sync" textline " " bitfld.long 0x00 4. " CS2ONENANDRDMOD ,CS2 One NAND Read Mode" "Async,Sync" bitfld.long 0x00 1. " CS3ONENANDSEL ,CS3 used for ONENAND mode operation" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CS2ONENANDSEL ,CS2 used for ONENAND mode operation" "Disabled,Enabled" line.long 0x04 "NANDFCR,NAND Flash Control Register" bitfld.long 0x04 13. " 4BITECC_ADD_CALC_START ,NAND Flash 4-bit ECC address and error value calculation Start" "Not started,Started" bitfld.long 0x04 12. " 4BITECC_START ,Nand Flash 4-bit ECC start for the selected chip select" "Not started,Started" textline " " bitfld.long 0x04 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started" bitfld.long 0x04 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started" textline " " bitfld.long 0x04 4.--5. " 4BITECCSEL ,4Bit ECC CS selection" "CS2,CS3,?..." bitfld.long 0x04 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled" endif rgroup.long 0x64++0x3 line.long 0x00 "NANDFSR,NAND Flash Status Register" sif (cpu()!="DM357") bitfld.long 0x00 16.--17. " ECC_ERRNUM ,Number of Errors found after the 4-Bit ECC Error Address and Error Value Calculation is done" "1 error,2 errors,3 errors,4 errors" bitfld.long 0x00 8.--11. " ECC_STATE ,ECC correction state while performing 4-bit ECC Address and Error Value Calculation" "No errors,Not corrected(>=5),Completed,Completed,Reserved,Calculating number of errors,Preparing for error search,Preparing for error search,Searching for errors,Reserved,Reserved,Reserved,Calculating error value,Calculating error value,Calculating error value,Calculating error value" textline " " endif bitfld.long 0x00 0.--3. " WAITST ,Raw status of EM_WAIT input pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpu()=="DM357") rgroup.long 0x70++0x13 line.long 0x0 "NANDF1ECC,NAND Flash 1 ECC Register" bitfld.long 0x0 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x0 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x0 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0x4 "NANDF2ECC,NAND Flash 2 ECC Register" bitfld.long 0x4 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x4 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x4 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0x8 "NANDF3ECC,NAND Flash 3 ECC Register" bitfld.long 0x8 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0x8 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0x8 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" line.long 0xC "NANDF4ECC,NAND Flash 4 ECC Register" bitfld.long 0xC 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1" textline " " bitfld.long 0xC 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1" bitfld.long 0xC 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1" else hgroup.long 0x70++0x3 hide.long 0x00 "NANDF1ECC,NAND Flash 1 ECC Register" in hgroup.long 0x74++0x3 hide.long 0x00 "NANDF2ECC,NAND Flash 2 ECC Register" in endif sif (cpu()!="DM357") group.long 0xbc++0x03 line.long 0x00 "NAND4BITECCLOAD,NAND Flash 4-bit ECC LOAD Register" hexmask.long.word 0x00 0.--9. 1. " 4BITECCLOAD ,4-bit ECC load" hgroup.long 0xC0++0x03 hide.long 0x00 "NAND4BITECC1,NAND Flash 4-bit ECC Register 1" in hgroup.long 0xC4++0x03 hide.long 0x00 "NAND4BITECC2,NAND Flash 4-bit ECC Register 2" in hgroup.long 0xC8++0x03 hide.long 0x00 "NAND4BITECC3,NAND Flash 4-bit ECC Register 3" in hgroup.long 0xCC++0x03 hide.long 0x00 "NAND4BITECC4,NAND Flash 4-bit ECC Register 4" in hgroup.long 0xd0++0x3 hide.long 0x00 "NANDERRADD1,NAND Flash 4-bit ECC Error Address Register 1" in hgroup.long 0xd4++0x3 hide.long 0x00 "NANDERRADD2,NAND Flash 4-bit ECC Error Address Register 2" in hgroup.long 0xd8++0x3 hide.long 0x00 "NANDERRVAL1,NAND Flash 4-bit ECC Error Value Register 1" in hgroup.long 0xdc++0x3 hide.long 0x00 "NANDERRVAL2,NAND Flash 4-bit ECC Error Value Register 2" in endif width 0xb tree.end tree "ASP (Audio Serial Port)" base asd:0x01e02000 width 6. rgroup.long 0x00++0x7 line.long 0x00 "DRR,Data Receive Register" hexmask.long 0x00 0.--31. 1. " DR ,Data receive" line.long 0x04 "DXR,Data Transmit Ragister" hexmask.long 0x04 0.--31. 1. " DX ,Data transmit" if (((d.l(asd:0x01e02000+0x24))&0x02)==0x0) group.long 0x08++0x3 line.long 0x00 "SPCR,Serial Port Control Register" bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled" bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset" bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset" textline " " bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR" bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error" textline " " bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty" bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready" textline " " bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled" bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..." sif (cpu()!="DM357") bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Rising edge without delay,Rising edge with delay" endif textline " " bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR" bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error" textline " " bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full" bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready" textline " " bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled" else group.long 0x08++0x3 line.long 0x00 "SPCR,Serial Port Control Register" bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled" bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset" bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset" textline " " bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR" bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error" textline " " bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty" bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready" textline " " bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled" bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..." sif (cpu()!="DM357") bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Falling edge without delay,Falling edge with delay" endif textline " " bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR" bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error" textline " " bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full" bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready" textline " " bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled" endif width 6. group.long 0x0c++0x7 line.long 0x00 "RCR,Receive Control Register" bitfld.long 0x00 31. " RPHASE ,Receive phases" "Single,Dual" hexmask.long.byte 0x00 24.--30. 1. " RFRLEN2 ,Receive frame length (number of words) in phase 2" bitfld.long 0x00 21.--23. " RWDLEN2 ,Receive word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." textline " " bitfld.long 0x00 19.--20. " RCOMPAND ,Receive companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law" bitfld.long 0x00 18. " RFIG ,Receive frame ignore" "Not ignored,Ignored" bitfld.long 0x00 16.--17. " RDATDLY ,Receive data delay" "0-bit,1-bit,2-bit,?..." textline " " hexmask.long.byte 0x00 8.--14. 1. " RFRLEN1 ,Receive frame length (number of words) in phase 1" bitfld.long 0x00 5.--7. " RWDLEN1 ,Receive word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." bitfld.long 0x00 4. " RWDREVRS ,Receive 32-bit reversal enable" "Disabled,Enabled" line.long 0x04 "XCR,Transmit Control Register" bitfld.long 0x04 31. " XPHASE ,Transmit phases" "Single,Dual" hexmask.long.byte 0x04 24.--30. 1. " XFRLEN2 ,Transmit frame length (number of words) in phase 2" bitfld.long 0x04 21.--23. " XWDLEN2 ,Transmit word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." textline " " bitfld.long 0x04 19.--20. " XCOMPAND ,Transmit companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law" bitfld.long 0x04 18. " XFIG ,Transmit frame ignore" "Not ignored,Ignored" bitfld.long 0x04 16.--17. " XDATDLY ,Transmit data delay" "0-bit,1-bit,2-bit,?..." textline " " hexmask.long.byte 0x04 8.--14. 1. " XFRLEN1 ,Transmit frame length (number of word) in phase 1" bitfld.long 0x04 5.--7. " XWDLEN1 ,Transmit word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..." bitfld.long 0x04 4. " XWDREVRS ,Transmit 32-bit reversal feature enable" "Disabled,Enabled" if (((d.l(asd:0x01e02000+0x24))&0x80)==0x80) group.long 0x14++0x3 line.long 0x00 "SRGR,Sample Rate Generator Register" sif (cpu()=="DM357") bitfld.long 0x00 29. " CLKSM ,Sample rate generator input clock mode" "CLKR pin,CLKX pin" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" else bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge" bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKR pin,CLKX pin" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" endif textline " " hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1" hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1" hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock" else group.long 0x14++0x3 line.long 0x00 "SRGR,Sample Rate Generator Register" sif (cpu()=="DM357") bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "Reserved,ASP internal" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" else bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge" bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKS pin,ASP internal" bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG" endif textline " " hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1" hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1" hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock" endif if ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x8000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" textline " " bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x8000)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" textline " " sif (cpu()=="DM357") bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" else bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" endif textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" elif ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x0)) group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" textline " " bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" else group.long 0x24++0x3 line.long 0x00 "PCR,Pin Control Register" bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM" bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal" bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal" textline " " sif (cpu()=="DM357") bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" else bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output" bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin" bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low" endif textline " " bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low" bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge" bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge" endif width 0xb tree.end tree "DDR2/mDDR Memory Controller Registers" base asd:0x20000000 width 10. rgroup.long 0x04++0x3 line.long 0x00 "SDRSTAT,SDRAM Status Register" bitfld.long 0x00 2. " PHYRDY ,DDR2 memory controller DLL ready" "Not ready,Ready" group.long 0x08++0x3 line.long 0x00 "SDBCR,SDRAM Bank Configuration Register" bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked" bitfld.long 0x00 18. " DDRDRIVE ,DDR2 SDRAM drive strength" "Normal,Weak" textline " " bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked" bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit" textline " " bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..." bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..." textline " " bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..." group.long 0x0c++0x3 line.long 0x00 "SDRCR,SDRAM Refresh Control Register" bitfld.long 0x00 31. " SR ,Self-refresh" "Exited,Entered" bitfld.long 0x00 30. " MCLKSTOPEN ,MCLK stop enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " RR ,Refresh rate" if (((d.l(asd:(0x20000000+0x08)))&0x8000)==0x8000) group.long 0x10++0x7 line.long 0x00 "SDTIMR,SDRAM Timing Register" hexmask.long.byte 0x00 25.--31. 1. " T_RFC ,Minimum number of DDR_CLK0 cycles from a refresh or load mode command" bitfld.long 0x00 22.--24. " T_RP ,Minimum number of DDR_CLK0 cycles from a precharge command to refresh command" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19.--21. " T_RCD ,Minimum number of DDR_CLK0 cycles from an activate command to read or write command" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " T_WR ,Minimum number of DDR_CLK0 cycles from the last write transfer to precharge command" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 11.--15. 1. " T_RAS ,Minimum number of DDR_CLK0 cycles from activate command to precharge" hexmask.long.byte 0x00 6.--10. 1. " T_RC ,Minimum number of DDR_CLK0 cycles from an activate command to activate" textline " " bitfld.long 0x00 3.--5. " T_RRD ,Minimum number of DDR_CLK0 cycles from an activate command to activate in different bank" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. " T_WTR ,Minimum number of DDR_CLK0 cycles from the last write to a read command" "0,1,2,3" line.long 0x04 "SDTIMR2,SDRAM Timing 2 Register" hexmask.long.byte 0x04 16.--22. 1. " T_XSNR ,Minimum number of DDR_CLK0 cycles from a self_refresh exit to any other command" hexmask.long.byte 0x04 8.--15. 1. " T_XSRD ,Minimum number of DDR_CLK0 cycles from a self_refresh exit to read command" textline " " bitfld.long 0x04 5.--7. " T_RTP ,Minimum number of DDR_CLK0 cycles from a last read command to precharge command" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--4. 1. " T_CKE ,Minimum number of DDR_CLK0 cycles between transitions on the DDR_CKE pin" else rgroup.long 0x10++0x7 line.long 0x00 "SDTIMR,SDRAM Timing Register" hexmask.long.byte 0x00 25.--31. 1. " T_RFC ,Minimum number of DDR_CLK0 cycles from a refresh or load mode command" bitfld.long 0x00 22.--24. " T_RP ,Minimum number of DDR_CLK0 cycles from a precharge command to refresh command" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19.--21. " T_RCD ,Minimum number of DDR_CLK0 cycles from an activate command to read or write command" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " T_WR ,Minimum number of DDR_CLK0 cycles from the last write transfer to precharge command" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 11.--15. 1. " T_RAS ,Minimum number of DDR_CLK0 cycles from activate command to precharge" hexmask.long.byte 0x00 6.--10. 1. " T_RC ,Minimum number of DDR_CLK0 cycles from an activate command to activate" textline " " bitfld.long 0x00 3.--5. " T_RRD ,Minimum number of DDR_CLK0 cycles from an activate command to activate in different bank" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. " T_WTR ,Minimum number of DDR_CLK0 cycles from the last write to a read command" "0,1,2,3" line.long 0x04 "SDTIMR2,SDRAM Timing 2 Register" hexmask.long.byte 0x04 16.--22. 1. " T_XSNR ,Minimum number of DDR_CLK0 cycles from a self_refresh exit to any other command" hexmask.long.byte 0x04 8.--15. 1. " T_XSRD ,Minimum number of DDR_CLK0 cycles from a self_refresh exit to read command" textline " " bitfld.long 0x04 5.--7. " T_RTP ,Minimum number of DDR_CLK0 cycles from a last read command to precharge command" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--4. 1. " T_CKE ,Minimum number of DDR_CLK0 cycles between transitions on the DDR_CKE pin" endif group.long 0x20++0x3 line.long 0x00 "PBBPR,Peripheral Bus Burst Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PR_OLD_COUNT ,Priority raise old counter" group.long 0xc0++0xf line.long 0x00 "IRR,Interrupt Raw Register" eventfld.long 0x00 2. " LT ,Line trap" "Not occurred,Occurred" line.long 0x04 "IMR,Interrupt Masked Register" eventfld.long 0x04 2. " LTM ,Line trap masked" "Not occurred,Occurred" line.long 0x08 "IMSR,Interrupt Mask Set Register" bitfld.long 0x08 2. " LTMSET ,Line trap interrupt set" "Disabled,Enabled" line.long 0x0c "IMCR,Interrupt Mask Clear Register" eventfld.long 0x0c 2. " LTMCLR ,Line trap interrupt clear" "Disabled,Enabled" group.long 0xe4++0x3 line.long 0x00 "DDRPHYCR,DDR PHY Control Register" bitfld.long 0x00 5. " DLLRESET ,Reset DLL" "No reset,Reset" bitfld.long 0x00 4. " DLLPWRDN ,Power down DLL" "Power up,Power down" textline " " bitfld.long 0x00 0.--2. " READLAT ,Read latency" "0,1,2,3,4,5,6,7" group.long 0xf0++0x03 line.long 0x00 "VTPIOCR,VTP IO Control Register" bitfld.long 0x00 15. " RECAL ,Start VTP IO calibration" "Not started,Started" bitfld.long 0x00 13. " EN ,VTP enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 5.--9. 1. " PCH ,P channel value" hexmask.long.byte 0x00 0.--4. 1. " NCH ,N channel value" base asd:0x01c40000 group.long 0x2030++0x3 line.long 0x00 "DDRVTPR,DDR VTP Register" hexmask.long.byte 0x00 5.--9. 1. " PCH ,P channel value for IO impedance calibration" hexmask.long.byte 0x00 0.--4. 1. " NCH ,N channel value for IO impedance calibration" group.long 0x4c++0x3 line.long 0x00 "DDRVTPER,DDR VTP Enable Register" bitfld.long 0x00 0. " EN ,DDRVTPR access enable" "Disabled,Enabled" width 0xb tree.end tree.open "EDMA3 (Enhanced Direct Memory Access Controller)" tree "Parameter RAM" base asd:0x01c04000 width 14. tree "Parameter set 0" group.long 0x0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 1" group.long 0x20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 2" group.long 0x40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 3" group.long 0x60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 4" group.long 0x80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 5" group.long 0xA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 6" group.long 0xC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 7" group.long 0xE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 8" group.long 0x100++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 9" group.long 0x120++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 10" group.long 0x140++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 11" group.long 0x160++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 12" group.long 0x180++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 13" group.long 0x1A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 14" group.long 0x1C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 15" group.long 0x1E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 16" group.long 0x200++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 17" group.long 0x220++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 18" group.long 0x240++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 19" group.long 0x260++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 20" group.long 0x280++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 21" group.long 0x2A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 22" group.long 0x2C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 23" group.long 0x2E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 24" group.long 0x300++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 25" group.long 0x320++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 26" group.long 0x340++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 27" group.long 0x360++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 28" group.long 0x380++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 29" group.long 0x3A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 30" group.long 0x3C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 31" group.long 0x3E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 32" group.long 0x400++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 33" group.long 0x420++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 34" group.long 0x440++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 35" group.long 0x460++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 36" group.long 0x480++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 37" group.long 0x4A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 38" group.long 0x4C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 39" group.long 0x4E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 40" group.long 0x500++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 41" group.long 0x520++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 42" group.long 0x540++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 43" group.long 0x560++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 44" group.long 0x580++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 45" group.long 0x5A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 46" group.long 0x5C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 47" group.long 0x5E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 48" group.long 0x600++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 49" group.long 0x620++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 50" group.long 0x640++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 51" group.long 0x660++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 52" group.long 0x680++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 53" group.long 0x6A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 54" group.long 0x6C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 55" group.long 0x6E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 56" group.long 0x700++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 57" group.long 0x720++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 58" group.long 0x740++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 59" group.long 0x760++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 60" group.long 0x780++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 61" group.long 0x7A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 62" group.long 0x7C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 63" group.long 0x7E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 64" group.long 0x800++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 65" group.long 0x820++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 66" group.long 0x840++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 67" group.long 0x860++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 68" group.long 0x880++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 69" group.long 0x8A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 70" group.long 0x8C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 71" group.long 0x8E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 72" group.long 0x900++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 73" group.long 0x920++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 74" group.long 0x940++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 75" group.long 0x960++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 76" group.long 0x980++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 77" group.long 0x9A0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 78" group.long 0x9C0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 79" group.long 0x9E0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 80" group.long 0xA00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 81" group.long 0xA20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 82" group.long 0xA40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 83" group.long 0xA60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 84" group.long 0xA80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 85" group.long 0xAA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 86" group.long 0xAC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 87" group.long 0xAE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 88" group.long 0xB00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 89" group.long 0xB20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 90" group.long 0xB40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 91" group.long 0xB60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 92" group.long 0xB80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 93" group.long 0xBA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 94" group.long 0xBC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 95" group.long 0xBE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 96" group.long 0xC00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 97" group.long 0xC20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 98" group.long 0xC40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 99" group.long 0xC60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 100" group.long 0xC80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 101" group.long 0xCA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 102" group.long 0xCC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 103" group.long 0xCE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 104" group.long 0xD00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 105" group.long 0xD20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 106" group.long 0xD40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 107" group.long 0xD60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 108" group.long 0xD80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 109" group.long 0xDA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 110" group.long 0xDC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 111" group.long 0xDE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 112" group.long 0xE00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 113" group.long 0xE20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 114" group.long 0xE40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 115" group.long 0xE60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 116" group.long 0xE80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 117" group.long 0xEA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 118" group.long 0xEC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 119" group.long 0xEE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 120" group.long 0xF00++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 121" group.long 0xF20++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 122" group.long 0xF40++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 123" group.long 0xF60++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 124" group.long 0xF80++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 125" group.long 0xFA0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 126" group.long 0xFC0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end tree "Parameter set 127" group.long 0xFE0++0x1f line.long 0x00 "OPT,Channel Options Parameter" hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification" bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early" bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static" textline " " bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized" bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST" bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST" line.long 0x04 "SRC,Source Address" line.long 0x08 "A_B_CNT,A Count/B Count Parameter" sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802") hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count" hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension" else hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length" hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer" endif line.long 0x0c "DST,Destination Address" line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter" hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index" hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index" line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter" hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload" hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address" line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter" hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index" hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index" line.long 0x1c "CCNT,C Count Parameter" hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block" tree.end width 0xb tree.end tree.open "EDMA3 Channel Controller Registers" base asd:0x01c00000 tree "Global Registers" width 10. rgroup.long 0x04++0x3 line.long 0x00 "CCCFG,EDMA3CC Configuration Register" bitfld.long 0x00 25. " MP_EXIST ,Memory protection existence" "Not supported,?..." bitfld.long 0x00 24. " CHMAP_EXIST ,Channel mapping existence" "Not supported,?..." textline " " bitfld.long 0x00 20.--21. " NUM_REGN ,Number of shadow regions" "Reserved,Reserved,4 regions,?..." bitfld.long 0x00 16.--18. " NUM_EVQUE ,Number of queues / number of TCs" "Reserved,2,?..." textline " " bitfld.long 0x00 12.--14. " NUM_PAENTRY ,Number of PaRAM sets" "Reserved,Reserved,Reserved,128 sets,?..." bitfld.long 0x00 8.--10. " NUM_INTCH ,Number of interrupt channels" "Reserved,Reserved,Reserved,Reserved,64 channels,?..." textline " " bitfld.long 0x00 4.--6. " NUM_QDMACH ,Number of QDMA channels" "Reserved,Reserved,Reserved,Reserved,8 channels,?..." bitfld.long 0x00 0.--2. " NUM_DMACH ,Number of DMA channels" "Reserved,Reserved,Reserved,Reserved,Reserved,64 channels,?..." tree "QDMA Channels Map Registers" group.long 0x200++0x1f line.long 0x0 "QCHMAP0,QDMA Channel 0 Map Register" hexmask.long.word 0x0 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 0" hexmask.long.byte 0x0 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x4 "QCHMAP1,QDMA Channel 1 Map Register" hexmask.long.word 0x4 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 1" hexmask.long.byte 0x4 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x8 "QCHMAP2,QDMA Channel 2 Map Register" hexmask.long.word 0x8 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 2" hexmask.long.byte 0x8 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0xC "QCHMAP3,QDMA Channel 3 Map Register" hexmask.long.word 0xC 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 3" hexmask.long.byte 0xC 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x10 "QCHMAP4,QDMA Channel 4 Map Register" hexmask.long.word 0x10 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 4" hexmask.long.byte 0x10 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x14 "QCHMAP5,QDMA Channel 5 Map Register" hexmask.long.word 0x14 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 5" hexmask.long.byte 0x14 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x18 "QCHMAP6,QDMA Channel 6 Map Register" hexmask.long.word 0x18 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 6" hexmask.long.byte 0x18 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" line.long 0x1C "QCHMAP7,QDMA Channel 7 Map Register" hexmask.long.word 0x1C 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 7" hexmask.long.byte 0x1C 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set pointed to by PAENTRY" tree.end tree "DMA Channels Queue Number Registers" group.long 0x240++0x03 line.long 0x00 "DMAQNUM0,DMA Channel 0 Queue Number Registers" bitfld.long 0x00 28.--30. " E7 ,DMA queue number (RSZEVT)" "Q0,Q1,?..." bitfld.long 0x00 24.--26. " E6 ,DMA queue number (PRVUEVT)" "Q0,Q1,?..." bitfld.long 0x00 20.--22. " E5 ,DMA queue number (H3AEVT)" "Q0,Q1,?..." bitfld.long 0x00 16.--18. " E4 ,DMA queue number (HISTEVT)" "Q0,Q1,?..." textline " " bitfld.long 0x00 12.--14. " E3 ,DMA queue number (REVT)" "Q0,Q1,?..." bitfld.long 0x00 8.--10. " E2 ,DMA queue number (XEVT)" "Q0,Q1,?..." hgroup.long 0x244++0x03 hide.long 0x00 "DMAQNUM1,DMA Channel 1 Queue Number Registers" group.long 0x248++0x13 line.long 0x00 "DMAQNUM2,DMA Channel 2 Queue Number Registers" bitfld.long 0x00 28.--30. " E23 ,DMA queue number (UTXEVET2)" "Q0,Q1,?..." bitfld.long 0x00 24.--26. " E22 ,DMA queue number (URXEVT2)" "Q0,Q1,?..." bitfld.long 0x00 20.--22. " E21 ,DMA queue number (UTXEVET1)" "Q0,Q1,?..." bitfld.long 0x00 16.--18. " E20 ,DMA queue number (URXEVT1)" "Q0,Q1,?..." textline " " bitfld.long 0x00 12.--14. " E19 ,DMA queue number (UTXEVET0)" "Q0,Q1,?..." bitfld.long 0x00 8.--10. " E18 ,DMA queue number (URXEVT0)" "Q0,Q1,?..." bitfld.long 0x00 4.--6. " E17 ,DMA queue number (SPIREVT)" "Q0,Q1,?..." bitfld.long 0x00 0.--2. " E16 ,DMA queue number (SPIXEVT)" "Q0,Q1,?..." line.long 0x04 "DMAQNUM3,DMA Channel 3 Queue Number Registers" bitfld.long 0x04 20.--22. " E29 ,DMA queue number (I2CXEVT)" "Q0,Q1,?..." bitfld.long 0x04 16.--18. " E28 ,DMA queue number (I2CREVT)" "Q0,Q1,?..." bitfld.long 0x04 12.--14. " E27 ,DMA queue number (MMCTXEVT)" "Q0,Q1,?..." bitfld.long 0x04 8.--10. " E26 ,DMA queue number (MMCRXEVT)" "Q0,Q1,?..." line.long 0x08 "DMAQNUM4,DMA Channel 4 Queue Number Registers" bitfld.long 0x08 28.--30. " E39 ,DMA queue number (GPINT7)" "Q0,Q1,?..." bitfld.long 0x08 24.--26. " E38 ,DMA queue number (GPINT6)" "Q0,Q1,?..." bitfld.long 0x08 20.--22. " E37 ,DMA queue number (GPINT5)" "Q0,Q1,?..." bitfld.long 0x08 16.--18. " E36 ,DMA queue number (GPINT4)" "Q0,Q1,?..." textline " " bitfld.long 0x08 12.--14. " E35 ,DMA queue number (GPINT3)" "Q0,Q1,?..." bitfld.long 0x08 8.--10. " E34 ,DMA queue number (GPINT2)" "Q0,Q1,?..." bitfld.long 0x08 4.--6. " E33 ,DMA queue number (GPINT1)" "Q0,Q1,?..." bitfld.long 0x08 0.--2. " E32 ,DMA queue number (GPINT0)" "Q0,Q1,?..." line.long 0x0c "DMAQNUM5,DMA Channel 5 Queue Number Registers" bitfld.long 0x0c 16.--18. " E44 ,DMA queue number (GPBNKINT4)" "Q0,Q1,?..." bitfld.long 0x0c 12.--14. " E43 ,DMA queue number (GPBNKINT3)" "Q0,Q1,?..." bitfld.long 0x0c 8.--10. " E42 ,DMA queue number (GPBNKINT2)" "Q0,Q1,?..." bitfld.long 0x0c 4.--6. " E41 ,DMA queue number (GPBNKINT1)" "Q0,Q1,?..." textline " " bitfld.long 0x0c 0.--2. " E40 ,DMA queue number (GPBNKINT0)" "Q0,Q1,?..." line.long 0x10 "DMAQNUM6,DMA Channel 6 Queue Number Registers" bitfld.long 0x10 24.--26. " E54 ,DMA queue number (PWM2)" "Q0,Q1,?..." bitfld.long 0x10 20.--22. " E53 ,DMA queue number (PWM1)" "Q0,Q1,?..." bitfld.long 0x10 16.--18. " E52 ,DMA queue number (PWM0)" "Q0,Q1,?..." bitfld.long 0x10 12.--14. " E51 ,DMA queue number (TINT3)" "Q0,Q1,?..." textline " " bitfld.long 0x10 8.--10. " E50 ,DMA queue number (TINT2)" "Q0,Q1,?..." bitfld.long 0x10 4.--6. " E49 ,DMA queue number (TINT1)" "Q0,Q1,?..." bitfld.long 0x10 0.--2. " E48 ,DMA queue number (TINT0)" "Q0,Q1,?..." hgroup.long 0x25c++0x03 hide.long 0x00 "DMAQNUM7,DMA Channel 7 Queue Number Registers" tree.end group.long 0x260++0x3 line.long 0x00 "QDMAQNUM,QDMA Channel Queue Number Register" bitfld.long 0x00 28.--30. " E7 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 24.--26. " E6 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 20.--22. " E5 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 16.--18. " E4 ,QDMA queue number" "Q0,Q1,?..." textline " " bitfld.long 0x00 12.--14. " E3 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 8.--10. " E2 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 4.--6. " E1 ,QDMA queue number" "Q0,Q1,?..." bitfld.long 0x00 0.--2. " E0 ,QDMA queue number" "Q0,Q1,?..." group.long 0x284++0x3 line.long 0x00 "QUEPRI,Queue Priority Register" bitfld.long 0x00 4.--6. " PRIQ1 ,Priority level for queue 1" "0(highest),1,2,3,4,5,6,7(lowest)" bitfld.long 0x00 0.--2. " PRIQ0 ,Priority level for queue 0" "0(highest),1,2,3,4,5,6,7(lowest)" width 0xb tree.end tree "Error Registers" width 10. rgroup.long 0x300++0x7 line.long 0x00 "EMR,Event Missed Register" bitfld.long 0x00 31. " E31 ,Channel 31 event missed (MMC1TXEVT)" "Not missed,Missed" bitfld.long 0x00 30. " E30 ,Channel 30 event missed (MMC1RXEVT)" "Not missed,Missed" bitfld.long 0x00 29. " E29 ,Channel 29 event missed (I2CXEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 28. " E28 ,Channel 28 event missed (I2CREVT)" "Not missed,Missed" bitfld.long 0x00 27. " E27 ,Channel 27 event missed (MMC0TXEVT)" "Not missed,Missed" bitfld.long 0x00 26. " E26 ,Channel 26 event missed (MMC0RXEVT or MEMSTK: MSEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 25. " E25 ,Channel 25 event missed (GPIO: GPINT9)" "Not missed,Missed" bitfld.long 0x00 23. " E23 ,Channel 23 event missed (UART2: UTXEVT2)" "Not missed,Missed" bitfld.long 0x00 22. " E22 ,Channel 22 event missed (UART2: URXEVT2)" "Not missed,Missed" textline " " bitfld.long 0x00 21. " E21 ,Channel 21 event missed (UART1: UTXEVT1)" "Not missed,Missed" bitfld.long 0x00 20. " E20 ,Channel 20 event missed (UART1: URXEVT1)" "Not missed,Missed" bitfld.long 0x00 19. " E19 ,Channel 19 event missed (UART0: UTXEVT0)" "Not missed,Missed" textline " " bitfld.long 0x00 18. " E18 ,Channel 18 event missed (UART0: URXEVT0)" "Not missed,Missed" bitfld.long 0x00 17. " E17 ,Channel 17 event missed (SPI0: SPI0REVT)" "Not missed,Missed" bitfld.long 0x00 16. " E16 ,Channel 16 event missed (SPI0: SPI0XEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 15. " E15 ,Channel 15 event missed (SPI1: SPI1REVT)" "Not missed,Missed" bitfld.long 0x00 14. " E14 ,Channel 14 event missed (SPI1: SPI1XEVT)" "Not missed,Missed" bitfld.long 0x00 11. " E11 ,Channel 11 event missed (SPI2: SPI2REVT)" "Not missed,Missed" textline " " bitfld.long 0x00 10. " E10 ,Channel 10 event missed (SPI2: SPI2XEVT)" "Not missed,Missed" bitfld.long 0x00 9. " E9 ,Channel 9 event missed (ASP1: REVT or TIMER2: TINT5)" "Not missed,Missed" bitfld.long 0x00 8. " E8 ,Channel 8 event missed (ASP1: XEVT or TIMER2: TINT4)" "Not missed,Missed" textline " " bitfld.long 0x00 7. " E7 ,Channel 7 event missed (VPSS: EVT4)" "Not missed,Missed" bitfld.long 0x00 6. " E6 ,Channel 6 event missed (VPSS: EVT3)" "Not missed,Missed" bitfld.long 0x00 5. " E5 ,Channel 5 event missed (VPSS: EVT2)" "Not missed,Missed" textline " " bitfld.long 0x00 4. " E4 ,Channel 4 event missed (VPSS: EVT1)" "Not missed,Missed" bitfld.long 0x00 3. " E3 ,Channel 3 event missed (ASP0: REVT)" "Not missed,Missed" bitfld.long 0x00 2. " E2 ,Channel 2 event missed (ASP0: XEVT)" "Not missed,Missed" textline " " bitfld.long 0x00 1. " E1 ,Channel 1 event missed (TIMER3 TINT7)" "Not missed,Missed" bitfld.long 0x00 0. " E0 ,Channel 0 event missed (TIMER3: TINT6)" "Not missed,Missed" line.long 0x04 "EMRH,Event Missed Register High" bitfld.long 0x04 23. " E55 ,Channel 55 event missed (PWM3)" "Not missed,Missed" bitfld.long 0x04 22. " E54 ,Channel 54 event missed (PWM2)" "Not missed,Missed" bitfld.long 0x04 21. " E53 ,Channel 53 event missed (PWM1)" "Not missed,Missed" textline " " bitfld.long 0x04 20. " E52 ,Channel 52 event missed (PWM0)" "Not missed,Missed" bitfld.long 0x04 19. " E51 ,Channel 51 event missed (TIMER1: TINT3)" "Not missed,Missed" bitfld.long 0x04 18. " E50 ,Channel 50 event missed (TIMER1: TINT2)" "Not missed,Missed" textline " " bitfld.long 0x04 17. " E49 ,Channel 49 event missed (TIMER0: TINT1)" "Not missed,Missed" bitfld.long 0x04 16. " E48 ,Channel 48 event missed (TIMER0: TINT0)" "Not missed,Missed" bitfld.long 0x04 15. " E47 ,Channel 47 event missed (GPINT8)" "Not missed,Missed" textline " " bitfld.long 0x04 14. " E46 ,Channel 46 event missed (GPBNKINT6)" "Not missed,Missed" bitfld.long 0x04 13. " E45 ,Channel 45 event missed (GPBNKINT5)" "Not missed,Missed" bitfld.long 0x04 12. " E44 ,Channel 44 event missed (GPBNKINT4)" "Not missed,Missed" textline " " bitfld.long 0x04 11. " E43 ,Channel 43 event missed (GPBNKINT3)" "Not missed,Missed" bitfld.long 0x04 10. " E42 ,Channel 42 event missed (GPBNKINT2)" "Not missed,Missed" bitfld.long 0x04 9. " E41 ,Channel 41 event missed (GPBNKINT1)" "Not missed,Missed" textline " " bitfld.long 0x04 8. " E40 ,Channel 40 event missed (GPBNKINT0)" "Not missed,Missed" bitfld.long 0x04 7. " E39 ,Channel 39 event missed (GPINT7)" "Not missed,Missed" bitfld.long 0x04 6. " E38 ,Channel 38 event missed (GPINT6)" "Not missed,Missed" textline " " bitfld.long 0x04 5. " E37 ,Channel 37 event missed (GPINT5)" "Not missed,Missed" bitfld.long 0x04 4. " E36 ,Channel 36 event missed (GPINT4)" "Not missed,Missed" bitfld.long 0x04 3. " E35 ,Channel 35 event missed (GPINT3)" "Not missed,Missed" textline " " bitfld.long 0x04 2. " E34 ,Channel 34 event missed (GPINT2)" "Not missed,Missed" bitfld.long 0x04 1. " E33 ,Channel 33 event missed (GPINT1)" "Not missed,Missed" bitfld.long 0x04 0. " E32 ,Channel 32 event missed (GPINT0)" "Not missed,Missed" wgroup.long 0x308++0x7 line.long 0x00 "EMCR,Event Missed Clear Register" bitfld.long 0x00 31. " E31 ,Event missed 31 clear (MMC1TXEVT)" "No effect,Clear" bitfld.long 0x00 30. " E30 ,Event missed 30 clear (MMC1RXEVT)" "No effect,Clear" bitfld.long 0x00 29. " E29 ,Event missed 29 clear (I2CXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 28. " E28 ,Event missed 28 clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Event missed 27 clear (MMC0TXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Event missed 26 clear (MMC0RXEVT or MEMSTK: MSEVT)" "No effect,Clear" textline " " bitfld.long 0x00 25. " E25 ,Event missed 25 clear (GPIO: GPINT9)" "No effect,Clear" bitfld.long 0x00 23. " E23 ,Event missed 23 clear (UART2: UTXEVT2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Event missed 22 clear (UART2: URXEVT2)" "No effect,Clear" textline " " bitfld.long 0x00 21. " E21 ,Event missed 21 clear (UART1: UTXEVT1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Event missed 20 clear (UART1: URXEVT1)" "No effect,Clear" bitfld.long 0x00 19. " E19 ,Event missed 19 clear (UART0: UTXEVT0)" "No effect,Clear" textline " " bitfld.long 0x00 18. " E18 ,Event missed 18 clear (UART0: URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Event missed 17 clear (SPI0: SPI0REVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Event missed 16 clear (SPI0: SPI0XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 15. " E15 ,Event missed 15 clear (SPI1: SPI1REVT)" "No effect,Clear" bitfld.long 0x00 14. " E14 ,Event missed 14 clear (SPI1: SPI1XEVT)" "No effect,Clear" bitfld.long 0x00 11. " E11 ,Event missed 11 clear (SPI2: SPI2REVT)" "No effect,Clear" textline " " bitfld.long 0x00 10. " E10 ,Event missed 10 clear (SPI2: SPI2XEVT)" "No effect,Clear" bitfld.long 0x00 9. " E9 ,Event missed 9 clear (ASP1: REVT or TIMER2: TINT5)" "No effect,Clear" bitfld.long 0x00 8. " E8 ,Event missed 8 clear (ASP1: XEVT or TIMER2: TINT4)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Event missed 7 clear (VPSS: EVT4)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Event missed 6 clear (VPSS: EVT3)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Event missed 5 clear (VPSS: EVT2)" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,Event missed 4 clear (VPSS: EVT1)" "No effect,Clear" bitfld.long 0x00 3. " E3 ,Event missed 3 clear (ASP0: REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Event missed 2 clear (ASP0: XEVT)" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,Event missed 1 clear (TIMER3 TINT7)" "No effect,Clear" bitfld.long 0x00 0. " E0 ,Event missed 0 clear (TIMER3: TINT6)" "No effect,Clear" line.long 0x04 "EMCRH,Event Missed Clear Register High" bitfld.long 0x04 23. " E55 ,Event missed 55 clear (PWM3)" "No effect,Clear" bitfld.long 0x04 22. " E54 ,Event missed 54 clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Event missed 53 clear (PWM1)" "No effect,Clear" textline " " bitfld.long 0x04 20. " E52 ,Event missed 52 clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Event missed 51 clear (TIMER1: TINT3)" "No effect,Clear" bitfld.long 0x04 18. " E50 ,Event missed 50 clear (TIMER1: TINT2)" "No effect,Clear" textline " " bitfld.long 0x04 17. " E49 ,Event missed 49 clear (TIMER0: TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Event missed 48 clear (TIMER0: TINT0)" "No effect,Clear" bitfld.long 0x04 15. " E47 ,Event missed 47 clear (GPINT8)" "No effect,Clear" textline " " bitfld.long 0x04 14. " E46 ,Event missed 46 clear (GPBNKINT5)" "No effect,Clear" bitfld.long 0x04 13. " E45 ,Event missed 45 clear (GPBNKINT5)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Event missed 44 clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Event missed 43 clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Event missed 42 clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Event missed 41 clear (GPBNKINT1)" "No effect,Clear" textline " " bitfld.long 0x04 8. " E40 ,Event missed 40 clear (GPBNKINT0)" "No effect,Clear" bitfld.long 0x04 7. " E39 ,Event missed 39 clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Event missed 38 clear (GPINT6)" "No effect,Clear" textline " " bitfld.long 0x04 5. " E37 ,Event missed 37 clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Event missed 36 clear (GPINT4)" "No effect,Clear" bitfld.long 0x04 3. " E35 ,Event missed 35 clear (GPINT3)" "No effect,Clear" textline " " bitfld.long 0x04 2. " E34 ,Event missed 34 clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Event missed 33 clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Event missed 32 clear (GPINT0)" "No effect,Clear" rgroup.long 0x310++0x3 line.long 0x00 "QEMR,QDMA Event Missed Register" bitfld.long 0x00 7. " E7 ,Channel 7 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 6. " E6 ,Channel 6 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 5. " E5 ,Channel 5 QDMA event missed" "Not missed,Missed" textline " " bitfld.long 0x00 4. " E4 ,Channel 4 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 3. " E3 ,Channel 3 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 2. " E2 ,Channel 2 QDMA event missed" "Not missed,Missed" textline " " bitfld.long 0x00 1. " E1 ,Channel 1 QDMA event missed" "Not missed,Missed" bitfld.long 0x00 0. " E0 ,Channel 0 QDMA event missed" "Not missed,Missed" wgroup.long 0x314++0x3 line.long 0x00 "QEMCR,QDMA Event Missed Clear Register" bitfld.long 0x00 7. " E7 ,QDMA event 7 missed clear" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA event 6 missed clear" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA event 5 missed clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " E4 ,QDMA event 4 missed clear" "No effect,Clear" bitfld.long 0x00 3. " E3 ,QDMA event 3 missed clear" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA event 2 missed clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " E1 ,QDMA event 1 missed clear" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA event 0 missed clear" "No effect,Clear" rgroup.long 0x318++0x3 line.long 0x00 "CCERR,EDMA3CC Error Register" bitfld.long 0x00 16. " TCCERR ,Transfer completion code error" "Not reached,Reached" textline " " bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error for queue 1" "Not exceeded,Exceeded" bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error for queue 0" "Not exceeded,Exceeded" wgroup.long 0x31c++0x3 line.long 0x00 "CCERRCLR,EDMA3CC Error Clear Register" bitfld.long 0x00 16. " TCCERR ,Transfer completion code error clear" "No effect,Clear" textline " " bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error clear for queue 1" "No effect,Clear" bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error clear for queue 0" "No effect,Clear" wgroup.long 0x320++0x3 line.long 0x00 "EEVAL,Error Evaluation Register" bitfld.long 0x00 0. " EVAL ,Error interrupt evaluate" "No effect,Interrupt" width 0xb tree.end tree "Region Access Enable Registers" width 8. group.long 0x340++0x7 line.long 0x00 "DRAE0,DMA Region Access Enable Register for Region 0" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 0" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 0" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 0" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 0" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 0" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 0" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 0" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 0" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 0" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 0" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 0" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 0" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 0" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 0" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 0" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 0" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed" line.long 0x04 "DRAEH0,DMA Region Access Enabled Register High for Region 0" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 0" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 0" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 0" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 0" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 0" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 0" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 0" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 0" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 0" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 0" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 0" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 0" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 0" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 0" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 0" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 0" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 0" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 0" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 0" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 0" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 0" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 0" "Not allowed,Allowed" group.long 0x348++0x7 line.long 0x00 "DRAE1,DMA Region Access Enable Register for Region 1" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 1" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 1" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 1" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 1" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 1" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 1" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 1" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 1" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 1" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 1" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 1" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 1" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 1" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 1" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 1" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 1" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed" line.long 0x04 "DRAEH1,DMA Region Access Enabled Register High for Region 1" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 1" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 1" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 1" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 1" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 1" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 1" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 1" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 1" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 1" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 1" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 1" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 1" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 1" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 1" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 1" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 1" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 1" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 1" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 1" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 1" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 1" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 1" "Not allowed,Allowed" group.long 0x350++0x7 line.long 0x00 "DRAE2,DMA Region Access Enable Register for Region 2" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 2" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 2" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 2" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 2" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 2" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 2" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 2" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 2" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 2" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 2" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 2" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 2" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 2" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 2" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 2" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 2" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed" line.long 0x04 "DRAEH2,DMA Region Access Enabled Register High for Region 2" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 2" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 2" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 2" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 2" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 2" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 2" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 2" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 2" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 2" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 2" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 2" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 2" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 2" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 2" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 2" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 2" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 2" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 2" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 2" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 2" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 2" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 2" "Not allowed,Allowed" group.long 0x358++0x7 line.long 0x00 "DRAE3,DMA Region Access Enable Register for Region 3" bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 3" "Not allowed,Allowed" bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 3" "Not allowed,Allowed" bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 3" "Not allowed,Allowed" bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 3" "Not allowed,Allowed" bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 3" "Not allowed,Allowed" bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 3" "Not allowed,Allowed" bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 3" "Not allowed,Allowed" bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 3" "Not allowed,Allowed" bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 3" "Not allowed,Allowed" bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 3" "Not allowed,Allowed" bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 3" "Not allowed,Allowed" bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 3" "Not allowed,Allowed" bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 3" "Not allowed,Allowed" bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 3" "Not allowed,Allowed" bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 3" "Not allowed,Allowed" bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 3" "Not allowed,Allowed" bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed" line.long 0x04 "DRAEH3,DMA Region Access Enabled Register High for Region 3" bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 3" "Not allowed,Allowed" bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 3" "Not allowed,Allowed" bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 3" "Not allowed,Allowed" bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 3" "Not allowed,Allowed" bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 3" "Not allowed,Allowed" bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 3" "Not allowed,Allowed" bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 3" "Not allowed,Allowed" bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 3" "Not allowed,Allowed" bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 3" "Not allowed,Allowed" bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 3" "Not allowed,Allowed" bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 3" "Not allowed,Allowed" bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 3" "Not allowed,Allowed" bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 3" "Not allowed,Allowed" bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 3" "Not allowed,Allowed" bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 3" "Not allowed,Allowed" bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 3" "Not allowed,Allowed" bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 3" "Not allowed,Allowed" bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 3" "Not allowed,Allowed" bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 3" "Not allowed,Allowed" bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 3" "Not allowed,Allowed" bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 3" "Not allowed,Allowed" bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 3" "Not allowed,Allowed" group.long 0x380++0x7 line.long 0x00 "QRAE0,QDMA Region Access Enable Register for Region 0" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed" group.long 0x384++0x7 line.long 0x00 "QRAE1,QDMA Region Access Enable Register for Region 1" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed" group.long 0x388++0x7 line.long 0x00 "QRAE2,QDMA Region Access Enable Register for Region 2" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed" group.long 0x38C++0x7 line.long 0x00 "QRAE3,QDMA Region Access Enable Register for Region 3" bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed" bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed" bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed" bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed" bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed" textline " " bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed" bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed" tree.end tree "Status/Debug Visibility Registers" width 9. rgroup.long 0x400++0x3f "Event Queue 0 Registers" line.long 0x0 "Q0E0 ,Event Queue Entry 0 Register" bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x0 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x4 "Q0E1 ,Event Queue Entry 1 Register" bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x4 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x8 "Q0E2 ,Event Queue Entry 2 Register" bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x8 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0xC "Q0E3 ,Event Queue Entry 3 Register" bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0xC 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x10 "Q0E4 ,Event Queue Entry 4 Register" bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x10 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x14 "Q0E5 ,Event Queue Entry 5 Register" bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x14 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x18 "Q0E6 ,Event Queue Entry 6 Register" bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x18 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x1C "Q0E7 ,Event Queue Entry 7 Register" bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x20 "Q0E8 ,Event Queue Entry 8 Register" bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x20 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x24 "Q0E9 ,Event Queue Entry 9 Register" bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x24 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x28 "Q0E10,Event Queue Entry 10 Register" bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x28 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x2C "Q0E11,Event Queue Entry 11 Register" bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x30 "Q0E12,Event Queue Entry 12 Register" bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x30 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x34 "Q0E13,Event Queue Entry 13 Register" bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x34 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x38 "Q0E14,Event Queue Entry 14 Register" bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x38 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x3C "Q0E15,Event Queue Entry 15 Register" bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif rgroup.long 0x440++0x3f "Event Queue 1 Registers" line.long 0x0 "Q1E0 ,Event Queue Entry 0 Register" bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x0 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x4 "Q1E1 ,Event Queue Entry 1 Register" bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x4 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x8 "Q1E2 ,Event Queue Entry 2 Register" bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x8 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0xC "Q1E3 ,Event Queue Entry 3 Register" bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0xC 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x10 "Q1E4 ,Event Queue Entry 4 Register" bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x10 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x14 "Q1E5 ,Event Queue Entry 5 Register" bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x14 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x18 "Q1E6 ,Event Queue Entry 6 Register" bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x18 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x1C "Q1E7 ,Event Queue Entry 7 Register" bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x20 "Q1E8 ,Event Queue Entry 8 Register" bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x20 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x24 "Q1E9 ,Event Queue Entry 9 Register" bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x24 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x28 "Q1E10,Event Queue Entry 10 Register" bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x28 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x2C "Q1E11,Event Queue Entry 11 Register" bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x30 "Q1E12,Event Queue Entry 12 Register" bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x30 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x34 "Q1E13,Event Queue Entry 13 Register" bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x34 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x38 "Q1E14,Event Queue Entry 14 Register" bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x38 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif line.long 0x3C "Q1E15,Event Queue Entry 15 Register" bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER" sif (cpu()=="DM357") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "Reserved/QDMA 0,Reserved/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,Reserved,Reserved,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,Reserved,DMA 26,DMA 27,DMA 28,DMA 29,Reserved,Reserved,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,Reserved,Reserved,Reserved,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,?..." elif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63" else bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMQ 4,DMA/QDMQ 5,DMA/QDMQ 6,DMA/QDMQ 7,DMA 8,DMA 9,DMA 10,DMA 11,Reserved,Reserved,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,Reserved,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,?..." endif sif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x600++0xf "Queue Status Registers" line.long 0x0 "QSTAT0,Queue 0 Status Register" bitfld.long 0x0 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "QSTAT1,Queue 1 Status Register" bitfld.long 0x4 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "QSTAT2,Queue 2 Status Register" bitfld.long 0x8 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x8 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x8 8.--12. " NUMVAL ,Number of valid entrier in queue 2" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x8 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "QSTAT3,Queue 3 Status Register" bitfld.long 0xC 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0xC 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0xC 8.--12. " NUMVAL ,Number of valid entrier in queue 3" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0xC 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0x600++0x7 "Queue Status Registers" line.long 0x0 "QSTAT0,Queue 0 Status Register" bitfld.long 0x0 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x0 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "QSTAT1,Queue 1 Status Register" bitfld.long 0x4 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded" bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..." bitfld.long 0x4 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x620++0x3 line.long 0x00 "QWMTHRA,Queue Watermark Threshold A Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 24.--28. " Q3 ,Queue threshold for queue 3 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." bitfld.long 0x00 16.--20. " Q2 ,Queue threshold for queue 2 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." textline " " endif bitfld.long 0x00 8.--12. " Q1 ,Queue threshold for queue 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." bitfld.long 0x00 0.--4. " Q0 ,Queue threshold for queue 0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..." rgroup.long 0x640++0x3 line.long 0x00 "CCSTAT,EDMA3CC Status Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 19. " QUEACTV3 ,Queue 3 active" "Not active,Active" bitfld.long 0x00 18. " QUEACTV2 ,Queue 2 active" "Not active,Active" textline " " endif bitfld.long 0x00 17. " QUEACTV1 ,Queue 1 active" "Not active,Active" bitfld.long 0x00 16. " QUEACTV0 ,Queue 0 active" "Not active,Active" textline " " bitfld.long 0x00 8.--13. " COMPACTV ,Completion request active" "No requests,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4. " ACTV ,Channel controller active" "Idle,Busy" textline " " bitfld.long 0x00 3. " WSTATACTV ,Write status interface active" "Not active,Active" bitfld.long 0x00 2. " TRACTV ,Transfer request active" "Not active,Active" textline " " bitfld.long 0x00 1. " QEVTACTV ,QDMA event active" "Not active,Active" bitfld.long 0x00 0. " EVTACTV ,DMA event active" "Not active,Active" width 0xb tree.end tree "Global Channel Registers" base asd:0x01c01000 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2CXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2CREVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMCTXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMCRXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (UTXEVET2)" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (URXEVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UTXEVET1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UTXEVET0)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (URXEVT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPIREVT)" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPIXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7 (RSZEVT)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6 (PRVUEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5 (H3AEVT)" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4 (HISTEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3 (REVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2 (XEVT)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TINT3)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TINT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TINT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TINT0)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPBNKINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPBNKINT3)" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPBNKINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPBNKINT1)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPBNKINT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPINT6)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPINT5)" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2CXEVT)" "No effect,Prioritized" bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2CREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMCTXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMCRXEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (UTXEVET2)" "No effect,Prioritized" bitfld.long 0x00 22. " E22 ,Chained event for event 22 (URXEVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UTXEVET1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (URXEVT1)" "No effect,Prioritized" bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UTXEVET0)" "No effect,Prioritized" textline " " bitfld.long 0x00 18. " E18 ,Chained event for event 18 (URXEVT0)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPIREVT)" "No effect,Prioritized" bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPIXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (RSZEVT)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (PRVUEVT)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (H3AEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (HISTEVT)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (REVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (XEVT)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TINT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TINT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TINT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TINT0)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPBNKINT4)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPBNKINT3)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPBNKINT2)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPBNKINT1)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPBNKINT0)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2CXEVT)" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2CREVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMCTXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMCRXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (UTXEVET2)" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (URXEVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UTXEVET1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UTXEVET0)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (URXEVT0)" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPIREVT)" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPIXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable for event 7 (RSZEVT)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable for event 6 (PRVUEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable for event 5 (H3AEVT)" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable for event 4 (HISTEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable for event 3 (REVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable for event 2 (XEVT)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TINT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TINT0)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPBNKINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPBNKINT3)" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPBNKINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPBNKINT1)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPBNKINT0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPINT6)" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPINT5)" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2CXEVT)" "Not stored,Stored" bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2CREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMCTXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMCRXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 (UTXEVET2)" "Not stored,Stored" bitfld.long 0x00 22. " E22 ,Secondary event 22 (URXEVT2)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UTXEVET1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UTXEVET0)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (URXEVT0)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPIREVT)" "Not stored,Stored" bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPIXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (RSZEVT)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (PRVUEVT)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (H3AEVT)" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,Secondary event 4 (HISTEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 (REVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (XEVT)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" bitfld.long 0x04 19. " E51 ,Secondary event 51 (TINT3)" "Not stored,Stored" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 (TINT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TINT1)" "Not stored,Stored" bitfld.long 0x04 16. " E48 ,Secondary event 48 (TINT0)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPBNKINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPBNKINT3)" "Not stored,Stored" bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPBNKINT2)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPBNKINT1)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPBNKINT0)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPINT5)" "Not stored,Stored" bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPINT2)" "Not stored,Stored" bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 Clear (I2CXEVT)" "No effect,Clear" bitfld.long 0x00 28. " E28 ,Secondary event 28 Clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event 27 Clear (MMCTXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event 26 Clear (MMCRXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 Clear (UTXEVET2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Secondary event 22 Clear (URXEVT2)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event 21 Clear (UTXEVET1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event 20 Clear (URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 Clear (UTXEVET0)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event 18 Clear (URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event 17 Clear (SPIREVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Secondary event 16 Clear (SPIXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 Clear (RSZEVT)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event 6 Clear (PRVUEVT)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event 5 Clear (H3AEVT)" "No effect,Clear" bitfld.long 0x00 4. " E4 ,Secondary event 4 Clear (HISTEVT)" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 Clear (REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event 2 Clear (XEVT)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 Clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event 53 Clear (PWM1)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event 52 Clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Secondary event 51 Clear (TINT3)" "No effect,Clear" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 Clear (TINT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event 49 Clear (TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Secondary event 48 Clear (TINT0)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event 44 Clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 Clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Secondary event 42 Clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event 41 Clear (GPBNKINT1)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event 40 Clear (GPBNKINT0)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 Clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event 38 Clear (GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event 37 Clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Secondary event 36 Clear (GPINT4)" "No effect,Clear" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 Clear (GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event 34 Clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Secondary event 33 Clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event 32 Clear (GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 0 Channel Registers" base asd:0x01c02000 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2CXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2CREVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMCTXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMCRXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (UTXEVET2)" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (URXEVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UTXEVET1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UTXEVET0)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (URXEVT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPIREVT)" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPIXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7 (RSZEVT)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6 (PRVUEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5 (H3AEVT)" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4 (HISTEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3 (REVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2 (XEVT)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TINT3)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TINT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TINT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TINT0)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPBNKINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPBNKINT3)" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPBNKINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPBNKINT1)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPBNKINT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPINT6)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPINT5)" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2CXEVT)" "No effect,Prioritized" bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2CREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMCTXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMCRXEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (UTXEVET2)" "No effect,Prioritized" bitfld.long 0x00 22. " E22 ,Chained event for event 22 (URXEVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UTXEVET1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (URXEVT1)" "No effect,Prioritized" bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UTXEVET0)" "No effect,Prioritized" textline " " bitfld.long 0x00 18. " E18 ,Chained event for event 18 (URXEVT0)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPIREVT)" "No effect,Prioritized" bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPIXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (RSZEVT)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (PRVUEVT)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (H3AEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (HISTEVT)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (REVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (XEVT)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TINT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TINT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TINT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TINT0)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPBNKINT4)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPBNKINT3)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPBNKINT2)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPBNKINT1)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPBNKINT0)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2CXEVT)" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2CREVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMCTXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMCRXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (UTXEVET2)" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (URXEVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UTXEVET1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UTXEVET0)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (URXEVT0)" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPIREVT)" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPIXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable for event 7 (RSZEVT)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable for event 6 (PRVUEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable for event 5 (H3AEVT)" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable for event 4 (HISTEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable for event 3 (REVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable for event 2 (XEVT)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TINT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TINT0)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPBNKINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPBNKINT3)" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPBNKINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPBNKINT1)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPBNKINT0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPINT6)" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPINT5)" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2CXEVT)" "Not stored,Stored" bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2CREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMCTXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMCRXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 (UTXEVET2)" "Not stored,Stored" bitfld.long 0x00 22. " E22 ,Secondary event 22 (URXEVT2)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UTXEVET1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UTXEVET0)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (URXEVT0)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPIREVT)" "Not stored,Stored" bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPIXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (RSZEVT)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (PRVUEVT)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (H3AEVT)" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,Secondary event 4 (HISTEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 (REVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (XEVT)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" bitfld.long 0x04 19. " E51 ,Secondary event 51 (TINT3)" "Not stored,Stored" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 (TINT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TINT1)" "Not stored,Stored" bitfld.long 0x04 16. " E48 ,Secondary event 48 (TINT0)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPBNKINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPBNKINT3)" "Not stored,Stored" bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPBNKINT2)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPBNKINT1)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPBNKINT0)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPINT5)" "Not stored,Stored" bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPINT2)" "Not stored,Stored" bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 Clear (I2CXEVT)" "No effect,Clear" bitfld.long 0x00 28. " E28 ,Secondary event 28 Clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event 27 Clear (MMCTXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event 26 Clear (MMCRXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 Clear (UTXEVET2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Secondary event 22 Clear (URXEVT2)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event 21 Clear (UTXEVET1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event 20 Clear (URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 Clear (UTXEVET0)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event 18 Clear (URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event 17 Clear (SPIREVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Secondary event 16 Clear (SPIXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 Clear (RSZEVT)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event 6 Clear (PRVUEVT)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event 5 Clear (H3AEVT)" "No effect,Clear" bitfld.long 0x00 4. " E4 ,Secondary event 4 Clear (HISTEVT)" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 Clear (REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event 2 Clear (XEVT)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 Clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event 53 Clear (PWM1)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event 52 Clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Secondary event 51 Clear (TINT3)" "No effect,Clear" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 Clear (TINT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event 49 Clear (TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Secondary event 48 Clear (TINT0)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event 44 Clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 Clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Secondary event 42 Clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event 41 Clear (GPBNKINT1)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event 40 Clear (GPBNKINT0)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 Clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event 38 Clear (GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event 37 Clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Secondary event 36 Clear (GPINT4)" "No effect,Clear" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 Clear (GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event 34 Clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Secondary event 33 Clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event 32 Clear (GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 1 Channel Registers" base asd:0x01c02200 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2CXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2CREVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMCTXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMCRXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (UTXEVET2)" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (URXEVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UTXEVET1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UTXEVET0)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (URXEVT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPIREVT)" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPIXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7 (RSZEVT)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6 (PRVUEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5 (H3AEVT)" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4 (HISTEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3 (REVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2 (XEVT)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TINT3)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TINT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TINT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TINT0)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPBNKINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPBNKINT3)" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPBNKINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPBNKINT1)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPBNKINT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPINT6)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPINT5)" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2CXEVT)" "No effect,Prioritized" bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2CREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMCTXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMCRXEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (UTXEVET2)" "No effect,Prioritized" bitfld.long 0x00 22. " E22 ,Chained event for event 22 (URXEVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UTXEVET1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (URXEVT1)" "No effect,Prioritized" bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UTXEVET0)" "No effect,Prioritized" textline " " bitfld.long 0x00 18. " E18 ,Chained event for event 18 (URXEVT0)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPIREVT)" "No effect,Prioritized" bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPIXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (RSZEVT)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (PRVUEVT)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (H3AEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (HISTEVT)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (REVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (XEVT)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TINT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TINT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TINT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TINT0)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPBNKINT4)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPBNKINT3)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPBNKINT2)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPBNKINT1)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPBNKINT0)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2CXEVT)" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2CREVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMCTXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMCRXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (UTXEVET2)" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (URXEVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UTXEVET1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UTXEVET0)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (URXEVT0)" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPIREVT)" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPIXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable for event 7 (RSZEVT)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable for event 6 (PRVUEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable for event 5 (H3AEVT)" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable for event 4 (HISTEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable for event 3 (REVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable for event 2 (XEVT)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TINT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TINT0)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPBNKINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPBNKINT3)" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPBNKINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPBNKINT1)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPBNKINT0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPINT6)" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPINT5)" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2CXEVT)" "Not stored,Stored" bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2CREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMCTXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMCRXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 (UTXEVET2)" "Not stored,Stored" bitfld.long 0x00 22. " E22 ,Secondary event 22 (URXEVT2)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UTXEVET1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UTXEVET0)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (URXEVT0)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPIREVT)" "Not stored,Stored" bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPIXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (RSZEVT)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (PRVUEVT)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (H3AEVT)" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,Secondary event 4 (HISTEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 (REVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (XEVT)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" bitfld.long 0x04 19. " E51 ,Secondary event 51 (TINT3)" "Not stored,Stored" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 (TINT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TINT1)" "Not stored,Stored" bitfld.long 0x04 16. " E48 ,Secondary event 48 (TINT0)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPBNKINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPBNKINT3)" "Not stored,Stored" bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPBNKINT2)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPBNKINT1)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPBNKINT0)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPINT5)" "Not stored,Stored" bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPINT2)" "Not stored,Stored" bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 Clear (I2CXEVT)" "No effect,Clear" bitfld.long 0x00 28. " E28 ,Secondary event 28 Clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event 27 Clear (MMCTXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event 26 Clear (MMCRXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 Clear (UTXEVET2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Secondary event 22 Clear (URXEVT2)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event 21 Clear (UTXEVET1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event 20 Clear (URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 Clear (UTXEVET0)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event 18 Clear (URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event 17 Clear (SPIREVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Secondary event 16 Clear (SPIXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 Clear (RSZEVT)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event 6 Clear (PRVUEVT)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event 5 Clear (H3AEVT)" "No effect,Clear" bitfld.long 0x00 4. " E4 ,Secondary event 4 Clear (HISTEVT)" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 Clear (REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event 2 Clear (XEVT)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 Clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event 53 Clear (PWM1)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event 52 Clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Secondary event 51 Clear (TINT3)" "No effect,Clear" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 Clear (TINT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event 49 Clear (TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Secondary event 48 Clear (TINT0)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event 44 Clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 Clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Secondary event 42 Clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event 41 Clear (GPBNKINT1)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event 40 Clear (GPBNKINT0)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 Clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event 38 Clear (GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event 37 Clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Secondary event 36 Clear (GPINT4)" "No effect,Clear" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 Clear (GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event 34 Clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Secondary event 33 Clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event 32 Clear (GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 2 Channel Registers" base asd:0x01c02400 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2CXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2CREVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMCTXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMCRXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (UTXEVET2)" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (URXEVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UTXEVET1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UTXEVET0)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (URXEVT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPIREVT)" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPIXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7 (RSZEVT)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6 (PRVUEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5 (H3AEVT)" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4 (HISTEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3 (REVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2 (XEVT)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TINT3)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TINT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TINT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TINT0)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPBNKINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPBNKINT3)" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPBNKINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPBNKINT1)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPBNKINT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPINT6)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPINT5)" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2CXEVT)" "No effect,Prioritized" bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2CREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMCTXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMCRXEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (UTXEVET2)" "No effect,Prioritized" bitfld.long 0x00 22. " E22 ,Chained event for event 22 (URXEVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UTXEVET1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (URXEVT1)" "No effect,Prioritized" bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UTXEVET0)" "No effect,Prioritized" textline " " bitfld.long 0x00 18. " E18 ,Chained event for event 18 (URXEVT0)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPIREVT)" "No effect,Prioritized" bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPIXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (RSZEVT)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (PRVUEVT)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (H3AEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (HISTEVT)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (REVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (XEVT)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TINT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TINT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TINT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TINT0)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPBNKINT4)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPBNKINT3)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPBNKINT2)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPBNKINT1)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPBNKINT0)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2CXEVT)" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2CREVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMCTXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMCRXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (UTXEVET2)" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (URXEVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UTXEVET1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UTXEVET0)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (URXEVT0)" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPIREVT)" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPIXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable for event 7 (RSZEVT)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable for event 6 (PRVUEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable for event 5 (H3AEVT)" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable for event 4 (HISTEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable for event 3 (REVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable for event 2 (XEVT)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TINT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TINT0)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPBNKINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPBNKINT3)" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPBNKINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPBNKINT1)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPBNKINT0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPINT6)" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPINT5)" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2CXEVT)" "Not stored,Stored" bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2CREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMCTXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMCRXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 (UTXEVET2)" "Not stored,Stored" bitfld.long 0x00 22. " E22 ,Secondary event 22 (URXEVT2)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UTXEVET1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UTXEVET0)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (URXEVT0)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPIREVT)" "Not stored,Stored" bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPIXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (RSZEVT)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (PRVUEVT)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (H3AEVT)" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,Secondary event 4 (HISTEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 (REVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (XEVT)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" bitfld.long 0x04 19. " E51 ,Secondary event 51 (TINT3)" "Not stored,Stored" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 (TINT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TINT1)" "Not stored,Stored" bitfld.long 0x04 16. " E48 ,Secondary event 48 (TINT0)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPBNKINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPBNKINT3)" "Not stored,Stored" bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPBNKINT2)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPBNKINT1)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPBNKINT0)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPINT5)" "Not stored,Stored" bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPINT2)" "Not stored,Stored" bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 Clear (I2CXEVT)" "No effect,Clear" bitfld.long 0x00 28. " E28 ,Secondary event 28 Clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event 27 Clear (MMCTXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event 26 Clear (MMCRXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 Clear (UTXEVET2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Secondary event 22 Clear (URXEVT2)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event 21 Clear (UTXEVET1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event 20 Clear (URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 Clear (UTXEVET0)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event 18 Clear (URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event 17 Clear (SPIREVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Secondary event 16 Clear (SPIXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 Clear (RSZEVT)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event 6 Clear (PRVUEVT)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event 5 Clear (H3AEVT)" "No effect,Clear" bitfld.long 0x00 4. " E4 ,Secondary event 4 Clear (HISTEVT)" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 Clear (REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event 2 Clear (XEVT)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 Clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event 53 Clear (PWM1)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event 52 Clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Secondary event 51 Clear (TINT3)" "No effect,Clear" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 Clear (TINT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event 49 Clear (TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Secondary event 48 Clear (TINT0)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event 44 Clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 Clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Secondary event 42 Clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event 41 Clear (GPBNKINT1)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event 40 Clear (GPBNKINT0)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 Clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event 38 Clear (GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event 37 Clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Secondary event 36 Clear (GPINT4)" "No effect,Clear" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 Clear (GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event 34 Clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Secondary event 33 Clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event 32 Clear (GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree "Shadow Region 3 Channel Registers" base asd:0x01c02600 tree "DMA Channel Registers" width 7. group.long 0x00++0x7 line.long 0x00 "ER,Event Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29 (I2CXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28 (I2CREVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27 (MMCTXEVT)" "Not asserted,Asserted" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26 (MMCRXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23 (UTXEVET2)" "Not asserted,Asserted" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22 (URXEVT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21 (UTXEVET1)" "Not asserted,Asserted" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20 (URXEVT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19 (UTXEVET0)" "Not asserted,Asserted" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18 (URXEVT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17 (SPIREVT)" "Not asserted,Asserted" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16 (SPIXEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7 (RSZEVT)" "Not asserted,Asserted" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6 (PRVUEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5 (H3AEVT)" "Not asserted,Asserted" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4 (HISTEVT)" "Not asserted,Asserted" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3 (REVT)" "Not asserted,Asserted" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2 (XEVT)" "Not asserted,Asserted" line.long 0x04 "ERH,Event Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54 (PWM2)" "Not asserted,Asserted" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53 (PWM1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52 (PWM0)" "Not asserted,Asserted" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51 (TINT3)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50 (TINT2)" "Not asserted,Asserted" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49 (TINT1)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48 (TINT0)" "Not asserted,Asserted" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44 (GPBNKINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43 (GPBNKINT3)" "Not asserted,Asserted" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42 (GPBNKINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41 (GPBNKINT1)" "Not asserted,Asserted" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40 (GPBNKINT0)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39 (GPINT7)" "Not asserted,Asserted" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38 (GPINT6)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37 (GPINT5)" "Not asserted,Asserted" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36 (GPINT4)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35 (GPINT3)" "Not asserted,Asserted" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34 (GPINT2)" "Not asserted,Asserted" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33 (GPINT1)" "Not asserted,Asserted" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32 (GPINT0)" "Not asserted,Asserted" rgroup.long 0x18++0x7 line.long 0x00 "CER,Chained Event Register" bitfld.long 0x00 29. " E29 ,Chained event for event 29 (I2CXEVT)" "No effect,Prioritized" bitfld.long 0x00 28. " E28 ,Chained event for event 28 (I2CREVT)" "No effect,Prioritized" bitfld.long 0x00 27. " E27 ,Chained event for event 27 (MMCTXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 26. " E26 ,Chained event for event 26 (MMCRXEVT)" "No effect,Prioritized" bitfld.long 0x00 23. " E23 ,Chained event for event 23 (UTXEVET2)" "No effect,Prioritized" bitfld.long 0x00 22. " E22 ,Chained event for event 22 (URXEVT2)" "No effect,Prioritized" textline " " bitfld.long 0x00 21. " E21 ,Chained event for event 21 (UTXEVET1)" "No effect,Prioritized" bitfld.long 0x00 20. " E20 ,Chained event for event 20 (URXEVT1)" "No effect,Prioritized" bitfld.long 0x00 19. " E19 ,Chained event for event 19 (UTXEVET0)" "No effect,Prioritized" textline " " bitfld.long 0x00 18. " E18 ,Chained event for event 18 (URXEVT0)" "No effect,Prioritized" bitfld.long 0x00 17. " E17 ,Chained event for event 17 (SPIREVT)" "No effect,Prioritized" bitfld.long 0x00 16. " E16 ,Chained event for event 16 (SPIXEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 7. " E7 ,Chained event for event 7 (RSZEVT)" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,Chained event for event 6 (PRVUEVT)" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,Chained event for event 5 (H3AEVT)" "No effect,Prioritized" textline " " bitfld.long 0x00 4. " E4 ,Chained event for event 4 (HISTEVT)" "No effect,Prioritized" bitfld.long 0x00 3. " E3 ,Chained event for event 3 (REVT)" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,Chained event for event 2 (XEVT)" "No effect,Prioritized" line.long 0x04 "CERH,Chained Event Register High" bitfld.long 0x04 22. " E54 ,Chained event for event 54 (PWM2)" "No effect,Prioritized" bitfld.long 0x04 21. " E53 ,Chained event for event 53 (PWM1)" "No effect,Prioritized" bitfld.long 0x04 20. " E52 ,Chained event for event 52 (PWM0)" "No effect,Prioritized" textline " " bitfld.long 0x04 19. " E51 ,Chained event for event 51 (TINT3)" "No effect,Prioritized" bitfld.long 0x04 18. " E50 ,Chained event for event 50 (TINT2)" "No effect,Prioritized" bitfld.long 0x04 17. " E49 ,Chained event for event 49 (TINT1)" "No effect,Prioritized" textline " " bitfld.long 0x04 16. " E48 ,Chained event for event 48 (TINT0)" "No effect,Prioritized" bitfld.long 0x04 12. " E44 ,Chained event for event 44 (GPBNKINT4)" "No effect,Prioritized" bitfld.long 0x04 11. " E43 ,Chained event for event 43 (GPBNKINT3)" "No effect,Prioritized" textline " " bitfld.long 0x04 10. " E42 ,Chained event for event 42 (GPBNKINT2)" "No effect,Prioritized" bitfld.long 0x04 9. " E41 ,Chained event for event 41 (GPBNKINT1)" "No effect,Prioritized" bitfld.long 0x04 8. " E40 ,Chained event for event 40 (GPBNKINT0)" "No effect,Prioritized" textline " " bitfld.long 0x04 7. " E39 ,Chained event for event 39 (GPINT7)" "No effect,Prioritized" bitfld.long 0x04 6. " E38 ,Chained event for event 38 (GPINT6)" "No effect,Prioritized" bitfld.long 0x04 5. " E37 ,Chained event for event 37 (GPINT5)" "No effect,Prioritized" textline " " bitfld.long 0x04 4. " E36 ,Chained event for event 36 (GPINT4)" "No effect,Prioritized" bitfld.long 0x04 3. " E35 ,Chained event for event 35 (GPINT3)" "No effect,Prioritized" bitfld.long 0x04 2. " E34 ,Chained event for event 34 (GPINT2)" "No effect,Prioritized" textline " " bitfld.long 0x04 1. " E33 ,Chained event for event 33 (GPINT1)" "No effect,Prioritized" bitfld.long 0x04 0. " E32 ,Chained event for event 32 (GPINT0)" "No effect,Prioritized" group.long 0x20++0x7 line.long 0x00 "EER,Event Enable Register" setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable for event 29 (I2CXEVT)" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable for event 28 (I2CREVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable for event 27 (MMCTXEVT)" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable for event 26 (MMCRXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable for event 23 (UTXEVET2)" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable for event 22 (URXEVT2)" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable for event 21 (UTXEVET1)" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable for event 20 (URXEVT1)" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable for event 19 (UTXEVET0)" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable for event 18 (URXEVT0)" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable for event 17 (SPIREVT)" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable for event 16 (SPIXEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable for event 7 (RSZEVT)" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable for event 6 (PRVUEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable for event 5 (H3AEVT)" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable for event 4 (HISTEVT)" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable for event 3 (REVT)" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable for event 2 (XEVT)" "Disabled,Enabled" line.long 0x04 "EERH,Event Enable Register High" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable for event 54 (PWM2)" "Disabled,Enabled" setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable for event 53 (PWM1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable for event 52 (PWM0)" "Disabled,Enabled" setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable for event 51 (TINT3)" "Disabled,Enabled" textline " " setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable for event 50 (TINT2)" "Disabled,Enabled" setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable for event 49 (TINT1)" "Disabled,Enabled" textline " " setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable for event 48 (TINT0)" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable for event 44 (GPBNKINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable for event 43 (GPBNKINT3)" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable for event 42 (GPBNKINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable for event 41 (GPBNKINT1)" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable for event 40 (GPBNKINT0)" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable for event 39 (GPINT7)" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable for event 38 (GPINT6)" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable for event 37 (GPINT5)" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable for event 36 (GPINT4)" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable for event 35 (GPINT3)" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable for event 34 (GPINT2)" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable for event 33 (GPINT1)" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable for event 32 (GPINT0)" "Disabled,Enabled" rgroup.long 0x38++0x7 line.long 0x00 "SER,Secondary Event Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 (I2CXEVT)" "Not stored,Stored" bitfld.long 0x00 28. " E28 ,Secondary event 28 (I2CREVT)" "Not stored,Stored" bitfld.long 0x00 27. " E27 ,Secondary event 27 (MMCTXEVT)" "Not stored,Stored" bitfld.long 0x00 26. " E26 ,Secondary event 26 (MMCRXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 (UTXEVET2)" "Not stored,Stored" bitfld.long 0x00 22. " E22 ,Secondary event 22 (URXEVT2)" "Not stored,Stored" bitfld.long 0x00 21. " E21 ,Secondary event 21 (UTXEVET1)" "Not stored,Stored" bitfld.long 0x00 20. " E20 ,Secondary event 20 (URXEVT1)" "Not stored,Stored" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 (UTXEVET0)" "Not stored,Stored" bitfld.long 0x00 18. " E18 ,Secondary event 18 (URXEVT0)" "Not stored,Stored" bitfld.long 0x00 17. " E17 ,Secondary event 17 (SPIREVT)" "Not stored,Stored" bitfld.long 0x00 16. " E16 ,Secondary event 16 (SPIXEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 (RSZEVT)" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,Secondary event 6 (PRVUEVT)" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,Secondary event 5 (H3AEVT)" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,Secondary event 4 (HISTEVT)" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 (REVT)" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,Secondary event 2 (XEVT)" "Not stored,Stored" line.long 0x04 "SERH,Secondary Event Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 (PWM2)" "Not stored,Stored" bitfld.long 0x04 21. " E53 ,Secondary event 53 (PWM1)" "Not stored,Stored" bitfld.long 0x04 20. " E52 ,Secondary event 52 (PWM0)" "Not stored,Stored" bitfld.long 0x04 19. " E51 ,Secondary event 51 (TINT3)" "Not stored,Stored" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 (TINT2)" "Not stored,Stored" bitfld.long 0x04 17. " E49 ,Secondary event 49 (TINT1)" "Not stored,Stored" bitfld.long 0x04 16. " E48 ,Secondary event 48 (TINT0)" "Not stored,Stored" bitfld.long 0x04 12. " E44 ,Secondary event 44 (GPBNKINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 (GPBNKINT3)" "Not stored,Stored" bitfld.long 0x04 10. " E42 ,Secondary event 42 (GPBNKINT2)" "Not stored,Stored" bitfld.long 0x04 9. " E41 ,Secondary event 41 (GPBNKINT1)" "Not stored,Stored" bitfld.long 0x04 8. " E40 ,Secondary event 40 (GPBNKINT0)" "Not stored,Stored" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 (GPINT7)" "Not stored,Stored" bitfld.long 0x04 6. " E38 ,Secondary event 38 (GPINT6)" "Not stored,Stored" bitfld.long 0x04 5. " E37 ,Secondary event 37 (GPINT5)" "Not stored,Stored" bitfld.long 0x04 4. " E36 ,Secondary event 36 (GPINT4)" "Not stored,Stored" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 (GPINT3)" "Not stored,Stored" bitfld.long 0x04 2. " E34 ,Secondary event 34 (GPINT2)" "Not stored,Stored" bitfld.long 0x04 1. " E33 ,Secondary event 33 (GPINT1)" "Not stored,Stored" bitfld.long 0x04 0. " E32 ,Secondary event 32 (GPINT0)" "Not stored,Stored" wgroup.long 0x40++0x7 line.long 0x00 "SECR,Secondary Event Clear Register" bitfld.long 0x00 29. " E29 ,Secondary event 29 Clear (I2CXEVT)" "No effect,Clear" bitfld.long 0x00 28. " E28 ,Secondary event 28 Clear (I2CREVT)" "No effect,Clear" bitfld.long 0x00 27. " E27 ,Secondary event 27 Clear (MMCTXEVT)" "No effect,Clear" bitfld.long 0x00 26. " E26 ,Secondary event 26 Clear (MMCRXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 23. " E23 ,Secondary event 23 Clear (UTXEVET2)" "No effect,Clear" bitfld.long 0x00 22. " E22 ,Secondary event 22 Clear (URXEVT2)" "No effect,Clear" bitfld.long 0x00 21. " E21 ,Secondary event 21 Clear (UTXEVET1)" "No effect,Clear" bitfld.long 0x00 20. " E20 ,Secondary event 20 Clear (URXEVT1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " E19 ,Secondary event 19 Clear (UTXEVET0)" "No effect,Clear" bitfld.long 0x00 18. " E18 ,Secondary event 18 Clear (URXEVT0)" "No effect,Clear" bitfld.long 0x00 17. " E17 ,Secondary event 17 Clear (SPIREVT)" "No effect,Clear" bitfld.long 0x00 16. " E16 ,Secondary event 16 Clear (SPIXEVT)" "No effect,Clear" textline " " bitfld.long 0x00 7. " E7 ,Secondary event 7 Clear (RSZEVT)" "No effect,Clear" bitfld.long 0x00 6. " E6 ,Secondary event 6 Clear (PRVUEVT)" "No effect,Clear" bitfld.long 0x00 5. " E5 ,Secondary event 5 Clear (H3AEVT)" "No effect,Clear" bitfld.long 0x00 4. " E4 ,Secondary event 4 Clear (HISTEVT)" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,Secondary event 3 Clear (REVT)" "No effect,Clear" bitfld.long 0x00 2. " E2 ,Secondary event 2 Clear (XEVT)" "No effect,Clear" line.long 0x04 "SECRH,Secondary Event Clear Register High" bitfld.long 0x04 22. " E54 ,Secondary event 54 Clear (PWM2)" "No effect,Clear" bitfld.long 0x04 21. " E53 ,Secondary event 53 Clear (PWM1)" "No effect,Clear" bitfld.long 0x04 20. " E52 ,Secondary event 52 Clear (PWM0)" "No effect,Clear" bitfld.long 0x04 19. " E51 ,Secondary event 51 Clear (TINT3)" "No effect,Clear" textline " " bitfld.long 0x04 18. " E50 ,Secondary event 50 Clear (TINT2)" "No effect,Clear" bitfld.long 0x04 17. " E49 ,Secondary event 49 Clear (TINT1)" "No effect,Clear" bitfld.long 0x04 16. " E48 ,Secondary event 48 Clear (TINT0)" "No effect,Clear" bitfld.long 0x04 12. " E44 ,Secondary event 44 Clear (GPBNKINT4)" "No effect,Clear" textline " " bitfld.long 0x04 11. " E43 ,Secondary event 43 Clear (GPBNKINT3)" "No effect,Clear" bitfld.long 0x04 10. " E42 ,Secondary event 42 Clear (GPBNKINT2)" "No effect,Clear" bitfld.long 0x04 9. " E41 ,Secondary event 41 Clear (GPBNKINT1)" "No effect,Clear" bitfld.long 0x04 8. " E40 ,Secondary event 40 Clear (GPBNKINT0)" "No effect,Clear" textline " " bitfld.long 0x04 7. " E39 ,Secondary event 39 Clear (GPINT7)" "No effect,Clear" bitfld.long 0x04 6. " E38 ,Secondary event 38 Clear (GPINT6)" "No effect,Clear" bitfld.long 0x04 5. " E37 ,Secondary event 37 Clear (GPINT5)" "No effect,Clear" bitfld.long 0x04 4. " E36 ,Secondary event 36 Clear (GPINT4)" "No effect,Clear" textline " " bitfld.long 0x04 3. " E35 ,Secondary event 35 Clear (GPINT3)" "No effect,Clear" bitfld.long 0x04 2. " E34 ,Secondary event 34 Clear (GPINT2)" "No effect,Clear" bitfld.long 0x04 1. " E33 ,Secondary event 33 Clear (GPINT1)" "No effect,Clear" bitfld.long 0x04 0. " E32 ,Secondary event 32 Clear (GPINT0)" "No effect,Clear" width 0xb tree.end tree "Interrupt Registers" width 7. group.long 0x50++0x7 line.long 0x00 "IER,Interrupt Enable Register" setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled" textline " " setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled" setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled" textline " " setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled" textline " " setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled" setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled" textline " " setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled" textline " " setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled" setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled" textline " " setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled" textline " " setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled" setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled" textline " " setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled" line.long 0x04 "IERH,Interrupt Enable Register High" setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled" setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled" textline " " setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled" setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled" textline " " setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled" setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled" setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled" textline " " setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled" setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled" textline " " setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled" setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled" setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled" textline " " setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled" setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled" textline " " setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled" setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled" setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled" textline " " setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled" setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled" textline " " setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled" setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled" setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled" textline " " setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled" setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled" textline " " setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled" setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled" setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled" rgroup.long 0x68++0x7 line.long 0x00 "IPR,Interrupt Pending Register" bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected" bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected" textline " " bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected" bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected" textline " " bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected" bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected" textline " " bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected" bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected" textline " " bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected" bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected" textline " " bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected" bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected" bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected" bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected" bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected" textline " " bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected" bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected" textline " " bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected" bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected" textline " " bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected" bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected" textline " " bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected" bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected" textline " " bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected" bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected" textline " " bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected" bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected" textline " " bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected" bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected" line.long 0x04 "IPRH,Interrupt Pending Register High" bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected" bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected" textline " " bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected" bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected" textline " " bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected" bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected" textline " " bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected" bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected" textline " " bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected" bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected" textline " " bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected" bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected" textline " " bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected" bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected" textline " " bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected" bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected" textline " " bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected" bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected" textline " " bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected" bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected" textline " " bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected" bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected" textline " " bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected" bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected" textline " " bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected" bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected" textline " " bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected" bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected" textline " " bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected" bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected" textline " " bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected" bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected" wgroup.long 0x70++0x7 line.long 0x00 "ICR,Interrupt Clear Register" bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear" bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear" textline " " bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear" bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear" textline " " bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear" bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear" textline " " bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear" bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear" textline " " bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear" bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear" textline " " bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear" bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear" textline " " bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear" bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear" textline " " bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear" bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear" textline " " bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear" bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear" textline " " bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear" bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear" textline " " bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear" bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear" textline " " bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear" bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear" textline " " bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear" bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear" textline " " bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear" bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear" bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear" textline " " bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear" bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear" line.long 0x04 "ICRH,Interrupt Clear Register High" bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear" bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear" textline " " bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear" bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear" textline " " bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear" bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear" textline " " bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear" bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear" textline " " bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear" bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear" textline " " bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear" bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear" textline " " bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear" bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear" textline " " bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear" bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear" textline " " bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear" bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear" textline " " bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear" bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear" textline " " bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear" bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear" textline " " bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear" bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear" textline " " bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear" bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear" textline " " bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear" bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear" textline " " bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear" bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear" textline " " bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear" bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear" wgroup.long 0x78++0x3 line.long 0x00 "IEVAL,Interrupt Evaluate Register" bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse" width 0xb tree.end tree "QDMA Registers" width 7. rgroup.long 0x80++0x3 line.long 0x00 "QER,QDMA Event Register" bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized" bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized" bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized" bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized" textline " " bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized" bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized" bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized" bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized" width 7. group.long 0x84++0x3 line.long 0x00 "QEER,QDMA Event Enable Register" setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled" textline " " setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled" setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled" textline " " setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled" width 7. rgroup.long 0x90++0x3 line.long 0x00 "QSER,QDMA Secondary Event Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored" bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored" bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored" bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored" bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored" bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored" bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored" wgroup.long 0x94++0x3 line.long 0x00 "QSECR,QDMA Secondary Event Clear Register" bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear" bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear" bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear" bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear" textline " " bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear" bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear" bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear" bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear" width 0xb tree.end tree.end tree.end tree "EDMA3 Transfer Controller Registers" tree "TC 0" base asd:0x01c10000 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,128 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree "TC 1" base asd:0x01c10400 width 7. sif (cpu()!="DM357") rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" endif rgroup.long 0x04++0x03 line.long 0x00 "TCCFG,EDMA3TC Configuration Register" bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..." bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..." sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." else bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..." endif rgroup.long 0x100++0x3 line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register" bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3" bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..." bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending" textline " " bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy" bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy" group.long 0x140++0x3 line.long 0x00 "RDRATE,Read Rate Register" bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..." tree "Error Registers" width 9. rgroup.long 0x120++0x7 line.long 0x00 "ERRSTAT,Error Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected" bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected" bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected" group.long 0x124++0x03 line.long 0x00 "ERREN,Error Enable Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled" wgroup.long 0x128++0x3 line.long 0x00 "ERRCLR,Error Clear Register" bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear" bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear" rgroup.long 0x12c++0x3 line.long 0x00 "ERRDET,Error Details Register" bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled" bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error" wgroup.long 0x130++0x3 line.long 0x00 "ERRCMD,Error Interrupt Command Register" bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse" width 0xb tree.end tree "EDMA3TC Channel Registers" width 11. group.long 0x240++0x3 "Source Active Registers" line.long 0x00 "SAOPT,Source Active Options Register" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long 0x244++0x1f line.long 0x00 "SASRC,Source Active Source Address Register" line.long 0x04 "SACNT,Source Active Count Register" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "SADST,Source Active Destination Address Register" line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" line.long 0x14 "SACNTRLD,Source Active Count Reload Register" hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register" line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register" rgroup.long 0x280++0xb line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register" hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value" line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register" line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register" group.long 0x300++0x3 "Destination FIFO Registers" line.long 0x00 "DFOPT0,Destination FIFO Options Register 0" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x300+0x4)++0x13 line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0" line.long 0x04 "DFCNT0,Destination FIFO Count Register 0" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0" line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x340++0x3 line.long 0x00 "DFOPT1,Destination FIFO Options Register 1" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x340+0x4)++0x13 line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1" line.long 0x04 "DFCNT1,Destination FIFO Count Register 1" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1" line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x380++0x3 line.long 0x00 "DFOPT2,Destination FIFO Options Register 2" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x380+0x4)++0x13 line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2" line.long 0x04 "DFCNT2,Destination FIFO Count Register 2" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2" line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " group.long 0x3C0++0x3 line.long 0x00 "DFOPT3,Destination FIFO Options Register 3" bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled" bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled" hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code" textline " " bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..." bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest" bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST" textline " " bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST" rgroup.long (0x3C0+0x4)++0x13 line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3" line.long 0x04 "DFCNT3,Destination FIFO Count Register 3" hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count" hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count" line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3" line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3" hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays" hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays" line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3" bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor" hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID" textline " " width 0xb tree.end width 0xb tree.end tree.end tree.end tree "GPIO (General-Purpose Input/Output)" base asd:0x01c67000 width 8. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" group.long 0x08++0x3 line.long 0x00 "BINTEN,GPIO Interrupt Per-Bank Enable Register" bitfld.long 0x00 4. " EN4 ,Bank 4 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " EN3 ,Bank 3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " EN2 ,Bank 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " EN1 ,Bank 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN0 ,Bank 0 interrupt enable" "Disabled,Enabled" width 16. group.long 0x10++0x7 "GPIO Banks 0 and 1" line.long 0x00 "DIR01,GPIO Banks 0 and 1 Direction Register" bitfld.long 0x00 31. " DIR31 ,Pin 31 direction" "Output,Input" bitfld.long 0x00 30. " DIR30 ,Pin 30 direction" "Output,Input" bitfld.long 0x00 29. " DIR29 ,Pin 29 direction" "Output,Input" bitfld.long 0x00 28. " DIR28 ,Pin 28 direction" "Output,Input" textline " " bitfld.long 0x00 27. " DIR27 ,Pin 27 direction" "Output,Input" bitfld.long 0x00 26. " DIR26 ,Pin 26 direction" "Output,Input" bitfld.long 0x00 25. " DIR25 ,Pin 25 direction" "Output,Input" bitfld.long 0x00 24. " DIR24 ,Pin 24 direction" "Output,Input" textline " " bitfld.long 0x00 23. " DIR23 ,Pin 23 direction" "Output,Input" bitfld.long 0x00 22. " DIR22 ,Pin 22 direction" "Output,Input" bitfld.long 0x00 21. " DIR21 ,Pin 21 direction" "Output,Input" bitfld.long 0x00 20. " DIR20 ,Pin 20 direction" "Output,Input" textline " " bitfld.long 0x00 19. " DIR19 ,Pin 19 direction" "Output,Input" bitfld.long 0x00 18. " DIR18 ,Pin 18 direction" "Output,Input" bitfld.long 0x00 17. " DIR17 ,Pin 17 direction" "Output,Input" bitfld.long 0x00 16. " DIR16 ,Pin 16 direction" "Output,Input" textline " " bitfld.long 0x00 15. " DIR15 ,Pin 15 direction" "Output,Input" bitfld.long 0x00 14. " DIR14 ,Pin 14 direction" "Output,Input" bitfld.long 0x00 13. " DIR13 ,Pin 13 direction" "Output,Input" bitfld.long 0x00 12. " DIR12 ,Pin 12 direction" "Output,Input" textline " " bitfld.long 0x00 11. " DIR11 ,Pin 11 direction" "Output,Input" bitfld.long 0x00 10. " DIR10 ,Pin 10 direction" "Output,Input" bitfld.long 0x00 9. " DIR9 ,Pin 9 direction" "Output,Input" bitfld.long 0x00 8. " DIR8 ,Pin 8 direction" "Output,Input" textline " " bitfld.long 0x00 7. " DIR7 ,Pin 7 direction" "Output,Input" bitfld.long 0x00 6. " DIR6 ,Pin 6 direction" "Output,Input" bitfld.long 0x00 5. " DIR5 ,Pin 5 direction" "Output,Input" bitfld.long 0x00 4. " DIR4 ,Pin 4 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR3 ,Pin 3 direction" "Output,Input" bitfld.long 0x00 2. " DIR2 ,Pin 2 direction" "Output,Input" bitfld.long 0x00 1. " DIR1 ,Pin 1 direction" "Output,Input" bitfld.long 0x00 0. " DIR0 ,Pin 0 direction" "Output,Input" line.long 0x04 "OUT_DATA01,GPIO Banks 0 and 1 Output Data Register" setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT31_set/clr ,Output drive state of GPIO pin 31" "Low,High" setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT30_set/clr ,Output drive state of GPIO pin 30" "Low,High" setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT29_set/clr ,Output drive state of GPIO pin 29" "Low,High" textline " " setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT28_set/clr ,Output drive state of GPIO pin 28" "Low,High" setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT27_set/clr ,Output drive state of GPIO pin 27" "Low,High" setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT26_set/clr ,Output drive state of GPIO pin 26" "Low,High" textline " " setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT25_set/clr ,Output drive state of GPIO pin 25" "Low,High" setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT24_set/clr ,Output drive state of GPIO pin 24" "Low,High" setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT23_set/clr ,Output drive state of GPIO pin 23" "Low,High" textline " " setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT22_set/clr ,Output drive state of GPIO pin 22" "Low,High" setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT21_set/clr ,Output drive state of GPIO pin 21" "Low,High" setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT20_set/clr ,Output drive state of GPIO pin 20" "Low,High" textline " " setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT19_set/clr ,Output drive state of GPIO pin 19" "Low,High" setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT18_set/clr ,Output drive state of GPIO pin 18" "Low,High" setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT17_set/clr ,Output drive state of GPIO pin 17" "Low,High" textline " " setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT16_set/clr ,Output drive state of GPIO pin 16" "Low,High" setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT15_set/clr ,Output drive state of GPIO pin 15" "Low,High" setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT14_set/clr ,Output drive state of GPIO pin 14" "Low,High" textline " " setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT13_set/clr ,Output drive state of GPIO pin 13" "Low,High" setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT12_set/clr ,Output drive state of GPIO pin 12" "Low,High" setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT11_set/clr ,Output drive state of GPIO pin 11" "Low,High" textline " " setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT10_set/clr ,Output drive state of GPIO pin 10" "Low,High" setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT9_set/clr ,Output drive state of GPIO pin 9" "Low,High" setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT8_set/clr ,Output drive state of GPIO pin 8" "Low,High" textline " " setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT7_set/clr ,Output drive state of GPIO pin 7" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT6_set/clr ,Output drive state of GPIO pin 6" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT5_set/clr ,Output drive state of GPIO pin 5" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT4_set/clr ,Output drive state of GPIO pin 4" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT3_set/clr ,Output drive state of GPIO pin 3" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT2_set/clr ,Output drive state of GPIO pin 2" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT1_set/clr ,Output drive state of GPIO pin 1" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT0_set/clr ,Output drive state of GPIO pin 0" "Low,High" rgroup.long 0x20++0x03 line.long 0x00 "IN_DATA01,GPIO Banks 0 and 1 Input Data Register" bitfld.long 0x00 31. " IN31 ,Status of GPIO pin 31" "Low,High" bitfld.long 0x00 30. " IN30 ,Status of GPIO pin 30" "Low,High" bitfld.long 0x00 29. " IN29 ,Status of GPIO pin 29" "Low,High" bitfld.long 0x00 28. " IN28 ,Status of GPIO pin 28" "Low,High" bitfld.long 0x00 27. " IN27 ,Status of GPIO pin 27" "Low,High" bitfld.long 0x00 26. " IN26 ,Status of GPIO pin 26" "Low,High" textline " " bitfld.long 0x00 25. " IN25 ,Status of GPIO pin 25" "Low,High" bitfld.long 0x00 24. " IN24 ,Status of GPIO pin 24" "Low,High" bitfld.long 0x00 23. " IN23 ,Status of GPIO pin 23" "Low,High" bitfld.long 0x00 22. " IN22 ,Status of GPIO pin 22" "Low,High" bitfld.long 0x00 21. " IN21 ,Status of GPIO pin 21" "Low,High" bitfld.long 0x00 20. " IN20 ,Status of GPIO pin 20" "Low,High" textline " " bitfld.long 0x00 19. " IN19 ,Status of GPIO pin 19" "Low,High" bitfld.long 0x00 18. " IN18 ,Status of GPIO pin 18" "Low,High" bitfld.long 0x00 17. " IN17 ,Status of GPIO pin 17" "Low,High" bitfld.long 0x00 16. " IN16 ,Status of GPIO pin 16" "Low,High" bitfld.long 0x00 15. " IN15 ,Status of GPIO pin 15" "Low,High" bitfld.long 0x00 14. " IN14 ,Status of GPIO pin 14" "Low,High" textline " " bitfld.long 0x00 13. " IN13 ,Status of GPIO pin 13" "Low,High" bitfld.long 0x00 12. " IN12 ,Status of GPIO pin 12" "Low,High" bitfld.long 0x00 11. " IN11 ,Status of GPIO pin 11" "Low,High" bitfld.long 0x00 10. " IN10 ,Status of GPIO pin 10" "Low,High" bitfld.long 0x00 9. " IN9 ,Status of GPIO pin 9" "Low,High" bitfld.long 0x00 8. " IN8 ,Status of GPIO pin 8" "Low,High" textline " " bitfld.long 0x00 7. " IN7 ,Status of GPIO pin 7" "Low,High" bitfld.long 0x00 6. " IN6 ,Status of GPIO pin 6" "Low,High" bitfld.long 0x00 5. " IN5 ,Status of GPIO pin 5" "Low,High" bitfld.long 0x00 4. " IN4 ,Status of GPIO pin 4" "Low,High" bitfld.long 0x00 3. " IN3 ,Status of GPIO pin 3" "Low,High" bitfld.long 0x00 2. " IN2 ,Status of GPIO pin 2" "Low,High" textline " " bitfld.long 0x00 1. " IN1 ,Status of GPIO pin 1" "Low,High" bitfld.long 0x00 0. " IN0 ,Status of GPIO pin 0" "Low,High" group.long 0x24++0x13 line.long 0x00 "SET_RIS_TRIG01,GPIO Banks 0 and 1 Set Rising Edge Interrupt Register" bitfld.long 0x00 31. " SETRIS31 ,Enable rising edge interrupt detection on GPIO pin 31" "No effect,Enabled" bitfld.long 0x00 30. " SETRIS30 ,Enable rising edge interrupt detection on GPIO pin 30" "No effect,Enabled" bitfld.long 0x00 29. " SETRIS29 ,Enable rising edge interrupt detection on GPIO pin 29" "No effect,Enabled" textline " " bitfld.long 0x00 28. " SETRIS28 ,Enable rising edge interrupt detection on GPIO pin 28" "No effect,Enabled" bitfld.long 0x00 27. " SETRIS27 ,Enable rising edge interrupt detection on GPIO pin 27" "No effect,Enabled" bitfld.long 0x00 26. " SETRIS26 ,Enable rising edge interrupt detection on GPIO pin 26" "No effect,Enabled" textline " " bitfld.long 0x00 25. " SETRIS25 ,Enable rising edge interrupt detection on GPIO pin 25" "No effect,Enabled" bitfld.long 0x00 24. " SETRIS24 ,Enable rising edge interrupt detection on GPIO pin 24" "No effect,Enabled" bitfld.long 0x00 23. " SETRIS23 ,Enable rising edge interrupt detection on GPIO pin 23" "No effect,Enabled" textline " " bitfld.long 0x00 22. " SETRIS22 ,Enable rising edge interrupt detection on GPIO pin 22" "No effect,Enabled" bitfld.long 0x00 21. " SETRIS21 ,Enable rising edge interrupt detection on GPIO pin 21" "No effect,Enabled" bitfld.long 0x00 20. " SETRIS20 ,Enable rising edge interrupt detection on GPIO pin 20" "No effect,Enabled" textline " " bitfld.long 0x00 19. " SETRIS19 ,Enable rising edge interrupt detection on GPIO pin 19" "No effect,Enabled" bitfld.long 0x00 18. " SETRIS18 ,Enable rising edge interrupt detection on GPIO pin 18" "No effect,Enabled" bitfld.long 0x00 17. " SETRIS17 ,Enable rising edge interrupt detection on GPIO pin 17" "No effect,Enabled" textline " " bitfld.long 0x00 16. " SETRIS16 ,Enable rising edge interrupt detection on GPIO pin 16" "No effect,Enabled" bitfld.long 0x00 15. " SETRIS15 ,Enable rising edge interrupt detection on GPIO pin 15" "No effect,Enabled" bitfld.long 0x00 14. " SETRIS14 ,Enable rising edge interrupt detection on GPIO pin 14" "No effect,Enabled" textline " " bitfld.long 0x00 13. " SETRIS13 ,Enable rising edge interrupt detection on GPIO pin 13" "No effect,Enabled" bitfld.long 0x00 12. " SETRIS12 ,Enable rising edge interrupt detection on GPIO pin 12" "No effect,Enabled" bitfld.long 0x00 11. " SETRIS11 ,Enable rising edge interrupt detection on GPIO pin 11" "No effect,Enabled" textline " " bitfld.long 0x00 10. " SETRIS10 ,Enable rising edge interrupt detection on GPIO pin 10" "No effect,Enabled" bitfld.long 0x00 9. " SETRIS9 ,Enable rising edge interrupt detection on GPIO pin 9" "No effect,Enabled" bitfld.long 0x00 8. " SETRIS8 ,Enable rising edge interrupt detection on GPIO pin 8" "No effect,Enabled" textline " " bitfld.long 0x00 7. " SETRIS7 ,Enable rising edge interrupt detection on GPIO pin 7" "No effect,Enabled" bitfld.long 0x00 6. " SETRIS6 ,Enable rising edge interrupt detection on GPIO pin 6" "No effect,Enabled" bitfld.long 0x00 5. " SETRIS5 ,Enable rising edge interrupt detection on GPIO pin 5" "No effect,Enabled" textline " " bitfld.long 0x00 4. " SETRIS4 ,Enable rising edge interrupt detection on GPIO pin 4" "No effect,Enabled" bitfld.long 0x00 3. " SETRIS3 ,Enable rising edge interrupt detection on GPIO pin 3" "No effect,Enabled" bitfld.long 0x00 2. " SETRIS2 ,Enable rising edge interrupt detection on GPIO pin 2" "No effect,Enabled" textline " " bitfld.long 0x00 1. " SETRIS1 ,Enable rising edge interrupt detection on GPIO pin 1" "No effect,Enabled" bitfld.long 0x00 0. " SETRIS0 ,Enable rising edge interrupt detection on GPIO pin 0" "No effect,Enabled" line.long 0x04 "CLR_RIS_TRIG01,GPIO Banks 0 and 1 Clear Rising Edge Interrupt Register" bitfld.long 0x04 31. " CLRRIS31 ,Disable rising edge interrupt detection on GPIO pin 31" "No effect,Disabled" bitfld.long 0x04 30. " CLRRIS30 ,Disable rising edge interrupt detection on GPIO pin 30" "No effect,Disabled" bitfld.long 0x04 29. " CLRRIS29 ,Disable rising edge interrupt detection on GPIO pin 29" "No effect,Disabled" textline " " bitfld.long 0x04 28. " CLRRIS28 ,Disable rising edge interrupt detection on GPIO pin 28" "No effect,Disabled" bitfld.long 0x04 27. " CLRRIS27 ,Disable rising edge interrupt detection on GPIO pin 27" "No effect,Disabled" bitfld.long 0x04 26. " CLRRIS26 ,Disable rising edge interrupt detection on GPIO pin 26" "No effect,Disabled" textline " " bitfld.long 0x04 25. " CLRRIS25 ,Disable rising edge interrupt detection on GPIO pin 25" "No effect,Disabled" bitfld.long 0x04 24. " CLRRIS24 ,Disable rising edge interrupt detection on GPIO pin 24" "No effect,Disabled" bitfld.long 0x04 23. " CLRRIS23 ,Disable rising edge interrupt detection on GPIO pin 23" "No effect,Disabled" textline " " bitfld.long 0x04 22. " CLRRIS22 ,Disable rising edge interrupt detection on GPIO pin 22" "No effect,Disabled" bitfld.long 0x04 21. " CLRRIS21 ,Disable rising edge interrupt detection on GPIO pin 21" "No effect,Disabled" bitfld.long 0x04 20. " CLRRIS20 ,Disable rising edge interrupt detection on GPIO pin 20" "No effect,Disabled" textline " " bitfld.long 0x04 19. " CLRRIS19 ,Disable rising edge interrupt detection on GPIO pin 19" "No effect,Disabled" bitfld.long 0x04 18. " CLRRIS18 ,Disable rising edge interrupt detection on GPIO pin 18" "No effect,Disabled" bitfld.long 0x04 17. " CLRRIS17 ,Disable rising edge interrupt detection on GPIO pin 17" "No effect,Disabled" textline " " bitfld.long 0x04 16. " CLRRIS16 ,Disable rising edge interrupt detection on GPIO pin 16" "No effect,Disabled" bitfld.long 0x04 15. " CLRRIS15 ,Disable rising edge interrupt detection on GPIO pin 15" "No effect,Disabled" bitfld.long 0x04 14. " CLRRIS14 ,Disable rising edge interrupt detection on GPIO pin 14" "No effect,Disabled" textline " " bitfld.long 0x04 13. " CLRRIS13 ,Disable rising edge interrupt detection on GPIO pin 13" "No effect,Disabled" bitfld.long 0x04 12. " CLRRIS12 ,Disable rising edge interrupt detection on GPIO pin 12" "No effect,Disabled" bitfld.long 0x04 11. " CLRRIS11 ,Disable rising edge interrupt detection on GPIO pin 11" "No effect,Disabled" textline " " bitfld.long 0x04 10. " CLRRIS10 ,Disable rising edge interrupt detection on GPIO pin 10" "No effect,Disabled" bitfld.long 0x04 9. " CLRRIS9 ,Disable rising edge interrupt detection on GPIO pin 9" "No effect,Disabled" bitfld.long 0x04 8. " CLRRIS8 ,Disable rising edge interrupt detection on GPIO pin 8" "No effect,Disabled" textline " " bitfld.long 0x04 7. " CLRRIS7 ,Disable rising edge interrupt detection on GPIO pin 7" "No effect,Disabled" bitfld.long 0x04 6. " CLRRIS6 ,Disable rising edge interrupt detection on GPIO pin 6" "No effect,Disabled" bitfld.long 0x04 5. " CLRRIS5 ,Disable rising edge interrupt detection on GPIO pin 5" "No effect,Disabled" textline " " bitfld.long 0x04 4. " CLRRIS4 ,Disable rising edge interrupt detection on GPIO pin 4" "No effect,Disabled" bitfld.long 0x04 3. " CLRRIS3 ,Disable rising edge interrupt detection on GPIO pin 3" "No effect,Disabled" bitfld.long 0x04 2. " CLRRIS2 ,Disable rising edge interrupt detection on GPIO pin 2" "No effect,Disabled" textline " " bitfld.long 0x04 1. " CLRRIS1 ,Disable rising edge interrupt detection on GPIO pin 1" "No effect,Disabled" bitfld.long 0x04 0. " CLRRIS0 ,Disable rising edge interrupt detection on GPIO pin 0" "No effect,Disabled" line.long 0x08 "SET_FAL_TRIG01,GPIO Banks 0 and 1 Set Falling Edge Interrupt Register" bitfld.long 0x08 31. " SETFAL31 ,Enable falling edge interrupt detection on GPIO pin 31" "No effect,Enabled" bitfld.long 0x08 30. " SETFAL30 ,Enable falling edge interrupt detection on GPIO pin 30" "No effect,Enabled" bitfld.long 0x08 29. " SETFAL29 ,Enable falling edge interrupt detection on GPIO pin 29" "No effect,Enabled" textline " " bitfld.long 0x08 28. " SETFAL28 ,Enable falling edge interrupt detection on GPIO pin 28" "No effect,Enabled" bitfld.long 0x08 27. " SETFAL27 ,Enable falling edge interrupt detection on GPIO pin 27" "No effect,Enabled" bitfld.long 0x08 26. " SETFAL26 ,Enable falling edge interrupt detection on GPIO pin 26" "No effect,Enabled" textline " " bitfld.long 0x08 25. " SETFAL25 ,Enable falling edge interrupt detection on GPIO pin 25" "No effect,Enabled" bitfld.long 0x08 24. " SETFAL24 ,Enable falling edge interrupt detection on GPIO pin 24" "No effect,Enabled" bitfld.long 0x08 23. " SETFAL23 ,Enable falling edge interrupt detection on GPIO pin 23" "No effect,Enabled" textline " " bitfld.long 0x08 22. " SETFAL22 ,Enable falling edge interrupt detection on GPIO pin 22" "No effect,Enabled" bitfld.long 0x08 21. " SETFAL21 ,Enable falling edge interrupt detection on GPIO pin 21" "No effect,Enabled" bitfld.long 0x08 20. " SETFAL20 ,Enable falling edge interrupt detection on GPIO pin 20" "No effect,Enabled" textline " " bitfld.long 0x08 19. " SETFAL19 ,Enable falling edge interrupt detection on GPIO pin 19" "No effect,Enabled" bitfld.long 0x08 18. " SETFAL18 ,Enable falling edge interrupt detection on GPIO pin 18" "No effect,Enabled" bitfld.long 0x08 17. " SETFAL17 ,Enable falling edge interrupt detection on GPIO pin 17" "No effect,Enabled" textline " " bitfld.long 0x08 16. " SETFAL16 ,Enable falling edge interrupt detection on GPIO pin 16" "No effect,Enabled" bitfld.long 0x08 15. " SETFAL15 ,Enable falling edge interrupt detection on GPIO pin 15" "No effect,Enabled" bitfld.long 0x08 14. " SETFAL14 ,Enable falling edge interrupt detection on GPIO pin 14" "No effect,Enabled" textline " " bitfld.long 0x08 13. " SETFAL13 ,Enable falling edge interrupt detection on GPIO pin 13" "No effect,Enabled" bitfld.long 0x08 12. " SETFAL12 ,Enable falling edge interrupt detection on GPIO pin 12" "No effect,Enabled" bitfld.long 0x08 11. " SETFAL11 ,Enable falling edge interrupt detection on GPIO pin 11" "No effect,Enabled" textline " " bitfld.long 0x08 10. " SETFAL10 ,Enable falling edge interrupt detection on GPIO pin 10" "No effect,Enabled" bitfld.long 0x08 9. " SETFAL9 ,Enable falling edge interrupt detection on GPIO pin 9" "No effect,Enabled" bitfld.long 0x08 8. " SETFAL8 ,Enable falling edge interrupt detection on GPIO pin 8" "No effect,Enabled" textline " " bitfld.long 0x08 7. " SETFAL7 ,Enable falling edge interrupt detection on GPIO pin 7" "No effect,Enabled" bitfld.long 0x08 6. " SETFAL6 ,Enable falling edge interrupt detection on GPIO pin 6" "No effect,Enabled" bitfld.long 0x08 5. " SETFAL5 ,Enable falling edge interrupt detection on GPIO pin 5" "No effect,Enabled" textline " " bitfld.long 0x08 4. " SETFAL4 ,Enable falling edge interrupt detection on GPIO pin 4" "No effect,Enabled" bitfld.long 0x08 3. " SETFAL3 ,Enable falling edge interrupt detection on GPIO pin 3" "No effect,Enabled" bitfld.long 0x08 2. " SETFAL2 ,Enable falling edge interrupt detection on GPIO pin 2" "No effect,Enabled" textline " " bitfld.long 0x08 1. " SETFAL1 ,Enable falling edge interrupt detection on GPIO pin 1" "No effect,Enabled" bitfld.long 0x08 0. " SETFAL0 ,Enable falling edge interrupt detection on GPIO pin 0" "No effect,Enabled" line.long 0x0c "CLR_FAL_TRIG01,GPIO Banks 0 and 1 Clear Falling Edge Interrupt Register" bitfld.long 0x0c 31. " CLRFAL31 ,Disable falling edge interrupt detection on GPIO pin 31" "No effect,Disabled" bitfld.long 0x0c 30. " CLRFAL30 ,Disable falling edge interrupt detection on GPIO pin 30" "No effect,Disabled" bitfld.long 0x0c 29. " CLRFAL29 ,Disable falling edge interrupt detection on GPIO pin 29" "No effect,Disabled" textline " " bitfld.long 0x0c 28. " CLRFAL28 ,Disable falling edge interrupt detection on GPIO pin 28" "No effect,Disabled" bitfld.long 0x0c 27. " CLRFAL27 ,Disable falling edge interrupt detection on GPIO pin 27" "No effect,Disabled" bitfld.long 0x0c 26. " CLRFAL26 ,Disable falling edge interrupt detection on GPIO pin 26" "No effect,Disabled" textline " " bitfld.long 0x0c 25. " CLRFAL25 ,Disable falling edge interrupt detection on GPIO pin 25" "No effect,Disabled" bitfld.long 0x0c 24. " CLRFAL24 ,Disable falling edge interrupt detection on GPIO pin 24" "No effect,Disabled" bitfld.long 0x0c 23. " CLRFAL23 ,Disable falling edge interrupt detection on GPIO pin 23" "No effect,Disabled" textline " " bitfld.long 0x0c 22. " CLRFAL22 ,Disable falling edge interrupt detection on GPIO pin 22" "No effect,Disabled" bitfld.long 0x0c 21. " CLRFAL21 ,Disable falling edge interrupt detection on GPIO pin 21" "No effect,Disabled" bitfld.long 0x0c 20. " CLRFAL20 ,Disable falling edge interrupt detection on GPIO pin 20" "No effect,Disabled" textline " " bitfld.long 0x0c 19. " CLRFAL19 ,Disable falling edge interrupt detection on GPIO pin 19" "No effect,Disabled" bitfld.long 0x0c 18. " CLRFAL18 ,Disable falling edge interrupt detection on GPIO pin 18" "No effect,Disabled" bitfld.long 0x0c 17. " CLRFAL17 ,Disable falling edge interrupt detection on GPIO pin 17" "No effect,Disabled" textline " " bitfld.long 0x0c 16. " CLRFAL16 ,Disable falling edge interrupt detection on GPIO pin 16" "No effect,Disabled" bitfld.long 0x0c 15. " CLRFAL15 ,Disable falling edge interrupt detection on GPIO pin 15" "No effect,Disabled" bitfld.long 0x0c 14. " CLRFAL14 ,Disable falling edge interrupt detection on GPIO pin 14" "No effect,Disabled" textline " " bitfld.long 0x0c 13. " CLRFAL13 ,Disable falling edge interrupt detection on GPIO pin 13" "No effect,Disabled" bitfld.long 0x0c 12. " CLRFAL12 ,Disable falling edge interrupt detection on GPIO pin 12" "No effect,Disabled" bitfld.long 0x0c 11. " CLRFAL11 ,Disable falling edge interrupt detection on GPIO pin 11" "No effect,Disabled" textline " " bitfld.long 0x0c 10. " CLRFAL10 ,Disable falling edge interrupt detection on GPIO pin 10" "No effect,Disabled" bitfld.long 0x0c 9. " CLRFAL9 ,Disable falling edge interrupt detection on GPIO pin 9" "No effect,Disabled" bitfld.long 0x0c 8. " CLRFAL8 ,Disable falling edge interrupt detection on GPIO pin 8" "No effect,Disabled" textline " " bitfld.long 0x0c 7. " CLRFAL7 ,Disable falling edge interrupt detection on GPIO pin 7" "No effect,Disabled" bitfld.long 0x0c 6. " CLRFAL6 ,Disable falling edge interrupt detection on GPIO pin 6" "No effect,Disabled" bitfld.long 0x0c 5. " CLRFAL5 ,Disable falling edge interrupt detection on GPIO pin 5" "No effect,Disabled" textline " " bitfld.long 0x0c 4. " CLRFAL4 ,Disable falling edge interrupt detection on GPIO pin 4" "No effect,Disabled" bitfld.long 0x0c 3. " CLRFAL3 ,Disable falling edge interrupt detection on GPIO pin 3" "No effect,Disabled" bitfld.long 0x0c 2. " CLRFAL2 ,Disable falling edge interrupt detection on GPIO pin 2" "No effect,Disabled" textline " " bitfld.long 0x0c 1. " CLRFAL1 ,Disable falling edge interrupt detection on GPIO pin 1" "No effect,Disabled" bitfld.long 0x0c 0. " CLRFAL0 ,Disable falling edge interrupt detection on GPIO pin 0" "No effect,Disabled" line.long 0x10 "INTSTAT01,GPIO Banks 0 and 1 Interrupt Status Register" eventfld.long 0x10 31. " STAT31 ,Interrupt status of GPIO pin 31" "Not pending,Pending" eventfld.long 0x10 30. " STAT30 ,Interrupt status of GPIO pin 30" "Not pending,Pending" eventfld.long 0x10 29. " STAT29 ,Interrupt status of GPIO pin 29" "Not pending,Pending" textline " " eventfld.long 0x10 28. " STAT28 ,Interrupt status of GPIO pin 28" "Not pending,Pending" eventfld.long 0x10 27. " STAT27 ,Interrupt status of GPIO pin 27" "Not pending,Pending" eventfld.long 0x10 26. " STAT26 ,Interrupt status of GPIO pin 26" "Not pending,Pending" textline " " eventfld.long 0x10 25. " STAT25 ,Interrupt status of GPIO pin 25" "Not pending,Pending" eventfld.long 0x10 24. " STAT24 ,Interrupt status of GPIO pin 24" "Not pending,Pending" eventfld.long 0x10 23. " STAT23 ,Interrupt status of GPIO pin 23" "Not pending,Pending" textline " " eventfld.long 0x10 22. " STAT22 ,Interrupt status of GPIO pin 22" "Not pending,Pending" eventfld.long 0x10 21. " STAT21 ,Interrupt status of GPIO pin 21" "Not pending,Pending" eventfld.long 0x10 20. " STAT20 ,Interrupt status of GPIO pin 20" "Not pending,Pending" textline " " eventfld.long 0x10 19. " STAT19 ,Interrupt status of GPIO pin 19" "Not pending,Pending" eventfld.long 0x10 18. " STAT18 ,Interrupt status of GPIO pin 18" "Not pending,Pending" eventfld.long 0x10 17. " STAT17 ,Interrupt status of GPIO pin 17" "Not pending,Pending" textline " " eventfld.long 0x10 16. " STAT16 ,Interrupt status of GPIO pin 16" "Not pending,Pending" eventfld.long 0x10 15. " STAT15 ,Interrupt status of GPIO pin 15" "Not pending,Pending" eventfld.long 0x10 14. " STAT14 ,Interrupt status of GPIO pin 14" "Not pending,Pending" textline " " eventfld.long 0x10 13. " STAT13 ,Interrupt status of GPIO pin 13" "Not pending,Pending" eventfld.long 0x10 12. " STAT12 ,Interrupt status of GPIO pin 12" "Not pending,Pending" eventfld.long 0x10 11. " STAT11 ,Interrupt status of GPIO pin 11" "Not pending,Pending" textline " " eventfld.long 0x10 10. " STAT10 ,Interrupt status of GPIO pin 10" "Not pending,Pending" eventfld.long 0x10 9. " STAT9 ,Interrupt status of GPIO pin 9" "Not pending,Pending" eventfld.long 0x10 8. " STAT8 ,Interrupt status of GPIO pin 8" "Not pending,Pending" textline " " eventfld.long 0x10 7. " STAT7 ,Interrupt status of GPIO pin 7" "Not pending,Pending" eventfld.long 0x10 6. " STAT6 ,Interrupt status of GPIO pin 6" "Not pending,Pending" eventfld.long 0x10 5. " STAT5 ,Interrupt status of GPIO pin 5" "Not pending,Pending" textline " " eventfld.long 0x10 4. " STAT4 ,Interrupt status of GPIO pin 4" "Not pending,Pending" eventfld.long 0x10 3. " STAT3 ,Interrupt status of GPIO pin 3" "Not pending,Pending" eventfld.long 0x10 2. " STAT2 ,Interrupt status of GPIO pin 2" "Not pending,Pending" textline " " eventfld.long 0x10 1. " STAT1 ,Interrupt status of GPIO pin 1" "Not pending,Pending" eventfld.long 0x10 0. " STAT0 ,Interrupt status of GPIO pin 0" "Not pending,Pending" group.long 0x38++0x7 "GPIO Banks 2 and 3" line.long 0x00 "DIR23,GPIO Banks 2 and 3 Direction Register" bitfld.long 0x00 31. " DIR63 ,Pin 63 direction" "Output,Input" bitfld.long 0x00 30. " DIR62 ,Pin 62 direction" "Output,Input" bitfld.long 0x00 29. " DIR61 ,Pin 61 direction" "Output,Input" bitfld.long 0x00 28. " DIR60 ,Pin 60 direction" "Output,Input" textline " " bitfld.long 0x00 27. " DIR59 ,Pin 59 direction" "Output,Input" bitfld.long 0x00 26. " DIR58 ,Pin 58 direction" "Output,Input" bitfld.long 0x00 25. " DIR57 ,Pin 57 direction" "Output,Input" bitfld.long 0x00 24. " DIR56 ,Pin 56 direction" "Output,Input" textline " " bitfld.long 0x00 23. " DIR55 ,Pin 55 direction" "Output,Input" bitfld.long 0x00 22. " DIR54 ,Pin 54 direction" "Output,Input" bitfld.long 0x00 21. " DIR53 ,Pin 53 direction" "Output,Input" bitfld.long 0x00 20. " DIR52 ,Pin 52 direction" "Output,Input" textline " " bitfld.long 0x00 19. " DIR51 ,Pin 51 direction" "Output,Input" bitfld.long 0x00 18. " DIR50 ,Pin 50 direction" "Output,Input" bitfld.long 0x00 17. " DIR49 ,Pin 49 direction" "Output,Input" bitfld.long 0x00 16. " DIR48 ,Pin 48 direction" "Output,Input" textline " " bitfld.long 0x00 15. " DIR47 ,Pin 47 direction" "Output,Input" bitfld.long 0x00 14. " DIR46 ,Pin 46 direction" "Output,Input" bitfld.long 0x00 13. " DIR45 ,Pin 45 direction" "Output,Input" bitfld.long 0x00 12. " DIR44 ,Pin 44 direction" "Output,Input" textline " " bitfld.long 0x00 11. " DIR43 ,Pin 43 direction" "Output,Input" bitfld.long 0x00 10. " DIR42 ,Pin 42 direction" "Output,Input" bitfld.long 0x00 9. " DIR41 ,Pin 41 direction" "Output,Input" bitfld.long 0x00 8. " DIR40 ,Pin 40 direction" "Output,Input" textline " " bitfld.long 0x00 7. " DIR39 ,Pin 39 direction" "Output,Input" bitfld.long 0x00 6. " DIR38 ,Pin 38 direction" "Output,Input" bitfld.long 0x00 5. " DIR37 ,Pin 37 direction" "Output,Input" bitfld.long 0x00 4. " DIR36 ,Pin 36 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR35 ,Pin 35 direction" "Output,Input" bitfld.long 0x00 2. " DIR34 ,Pin 34 direction" "Output,Input" bitfld.long 0x00 1. " DIR33 ,Pin 33 direction" "Output,Input" bitfld.long 0x00 0. " DIR32 ,Pin 32 direction" "Output,Input" line.long 0x04 "OUT_DATA23,GPIO Banks 2 and 3 Output Data Register" setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT63_set/clr ,Output drive state of GPIO pin 63" "Low,High" setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT62_set/clr ,Output drive state of GPIO pin 62" "Low,High" setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT61_set/clr ,Output drive state of GPIO pin 61" "Low,High" textline " " setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT60_set/clr ,Output drive state of GPIO pin 60" "Low,High" setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT59_set/clr ,Output drive state of GPIO pin 59" "Low,High" setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT58_set/clr ,Output drive state of GPIO pin 58" "Low,High" textline " " setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT57_set/clr ,Output drive state of GPIO pin 57" "Low,High" setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT56_set/clr ,Output drive state of GPIO pin 56" "Low,High" setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT55_set/clr ,Output drive state of GPIO pin 55" "Low,High" textline " " setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT54_set/clr ,Output drive state of GPIO pin 54" "Low,High" setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT53_set/clr ,Output drive state of GPIO pin 53" "Low,High" setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT52_set/clr ,Output drive state of GPIO pin 52" "Low,High" textline " " setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT51_set/clr ,Output drive state of GPIO pin 51" "Low,High" setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT50_set/clr ,Output drive state of GPIO pin 50" "Low,High" setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT49_set/clr ,Output drive state of GPIO pin 49" "Low,High" textline " " setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT48_set/clr ,Output drive state of GPIO pin 48" "Low,High" setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT47_set/clr ,Output drive state of GPIO pin 47" "Low,High" setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT46_set/clr ,Output drive state of GPIO pin 46" "Low,High" textline " " setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT45_set/clr ,Output drive state of GPIO pin 45" "Low,High" setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT44_set/clr ,Output drive state of GPIO pin 44" "Low,High" setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT43_set/clr ,Output drive state of GPIO pin 43" "Low,High" textline " " setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT42_set/clr ,Output drive state of GPIO pin 42" "Low,High" setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT41_set/clr ,Output drive state of GPIO pin 41" "Low,High" setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT40_set/clr ,Output drive state of GPIO pin 40" "Low,High" textline " " setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT39_set/clr ,Output drive state of GPIO pin 39" "Low,High" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT38_set/clr ,Output drive state of GPIO pin 38" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT37_set/clr ,Output drive state of GPIO pin 37" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT36_set/clr ,Output drive state of GPIO pin 36" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT35_set/clr ,Output drive state of GPIO pin 35" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT34_set/clr ,Output drive state of GPIO pin 34" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT33_set/clr ,Output drive state of GPIO pin 33" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT32_set/clr ,Output drive state of GPIO pin 32" "Low,High" rgroup.long 0x48++0x03 line.long 0x00 "IN_DATA23,GPIO Banks 2 and 3 Input Data Register" bitfld.long 0x00 31. " IN63 ,Status of GPIO pin 63" "Low,High" bitfld.long 0x00 30. " IN62 ,Status of GPIO pin 62" "Low,High" bitfld.long 0x00 29. " IN61 ,Status of GPIO pin 61" "Low,High" bitfld.long 0x00 28. " IN60 ,Status of GPIO pin 60" "Low,High" bitfld.long 0x00 27. " IN59 ,Status of GPIO pin 59" "Low,High" bitfld.long 0x00 26. " IN58 ,Status of GPIO pin 58" "Low,High" textline " " bitfld.long 0x00 25. " IN57 ,Status of GPIO pin 57" "Low,High" bitfld.long 0x00 24. " IN56 ,Status of GPIO pin 56" "Low,High" bitfld.long 0x00 23. " IN55 ,Status of GPIO pin 55" "Low,High" bitfld.long 0x00 22. " IN54 ,Status of GPIO pin 54" "Low,High" bitfld.long 0x00 21. " IN53 ,Status of GPIO pin 53" "Low,High" bitfld.long 0x00 20. " IN52 ,Status of GPIO pin 52" "Low,High" textline " " bitfld.long 0x00 19. " IN51 ,Status of GPIO pin 51" "Low,High" bitfld.long 0x00 18. " IN50 ,Status of GPIO pin 50" "Low,High" bitfld.long 0x00 17. " IN49 ,Status of GPIO pin 49" "Low,High" bitfld.long 0x00 16. " IN48 ,Status of GPIO pin 48" "Low,High" bitfld.long 0x00 15. " IN47 ,Status of GPIO pin 47" "Low,High" bitfld.long 0x00 14. " IN46 ,Status of GPIO pin 46" "Low,High" textline " " bitfld.long 0x00 13. " IN45 ,Status of GPIO pin 45" "Low,High" bitfld.long 0x00 12. " IN44 ,Status of GPIO pin 44" "Low,High" bitfld.long 0x00 11. " IN43 ,Status of GPIO pin 43" "Low,High" bitfld.long 0x00 10. " IN42 ,Status of GPIO pin 42" "Low,High" bitfld.long 0x00 9. " IN41 ,Status of GPIO pin 41" "Low,High" bitfld.long 0x00 8. " IN40 ,Status of GPIO pin 40" "Low,High" textline " " bitfld.long 0x00 7. " IN39 ,Status of GPIO pin 39" "Low,High" bitfld.long 0x00 6. " IN38 ,Status of GPIO pin 38" "Low,High" bitfld.long 0x00 5. " IN37 ,Status of GPIO pin 37" "Low,High" bitfld.long 0x00 4. " IN36 ,Status of GPIO pin 36" "Low,High" bitfld.long 0x00 3. " IN35 ,Status of GPIO pin 35" "Low,High" bitfld.long 0x00 2. " IN34 ,Status of GPIO pin 34" "Low,High" textline " " bitfld.long 0x00 1. " IN33 ,Status of GPIO pin 33" "Low,High" bitfld.long 0x00 0. " IN32 ,Status of GPIO pin 32" "Low,High" group.long 0x4c++0x13 line.long 0x00 "SET_RIS_TRIG23,GPIO Banks 2 and 3 Set Rising Edge Interrupt Register" bitfld.long 0x00 31. " SETRIS63 ,Enable rising edge interrupt detection on GPIO pin 63" "No effect,Enabled" bitfld.long 0x00 30. " SETRIS62 ,Enable rising edge interrupt detection on GPIO pin 62" "No effect,Enabled" bitfld.long 0x00 29. " SETRIS61 ,Enable rising edge interrupt detection on GPIO pin 61" "No effect,Enabled" textline " " bitfld.long 0x00 28. " SETRIS60 ,Enable rising edge interrupt detection on GPIO pin 60" "No effect,Enabled" bitfld.long 0x00 27. " SETRIS59 ,Enable rising edge interrupt detection on GPIO pin 59" "No effect,Enabled" bitfld.long 0x00 26. " SETRIS58 ,Enable rising edge interrupt detection on GPIO pin 58" "No effect,Enabled" textline " " bitfld.long 0x00 25. " SETRIS57 ,Enable rising edge interrupt detection on GPIO pin 57" "No effect,Enabled" bitfld.long 0x00 24. " SETRIS56 ,Enable rising edge interrupt detection on GPIO pin 56" "No effect,Enabled" bitfld.long 0x00 23. " SETRIS55 ,Enable rising edge interrupt detection on GPIO pin 55" "No effect,Enabled" textline " " bitfld.long 0x00 22. " SETRIS54 ,Enable rising edge interrupt detection on GPIO pin 54" "No effect,Enabled" bitfld.long 0x00 21. " SETRIS53 ,Enable rising edge interrupt detection on GPIO pin 53" "No effect,Enabled" bitfld.long 0x00 20. " SETRIS52 ,Enable rising edge interrupt detection on GPIO pin 52" "No effect,Enabled" textline " " bitfld.long 0x00 19. " SETRIS51 ,Enable rising edge interrupt detection on GPIO pin 51" "No effect,Enabled" bitfld.long 0x00 18. " SETRIS50 ,Enable rising edge interrupt detection on GPIO pin 50" "No effect,Enabled" bitfld.long 0x00 17. " SETRIS49 ,Enable rising edge interrupt detection on GPIO pin 49" "No effect,Enabled" textline " " bitfld.long 0x00 16. " SETRIS48 ,Enable rising edge interrupt detection on GPIO pin 48" "No effect,Enabled" bitfld.long 0x00 15. " SETRIS47 ,Enable rising edge interrupt detection on GPIO pin 47" "No effect,Enabled" bitfld.long 0x00 14. " SETRIS46 ,Enable rising edge interrupt detection on GPIO pin 46" "No effect,Enabled" textline " " bitfld.long 0x00 13. " SETRIS45 ,Enable rising edge interrupt detection on GPIO pin 45" "No effect,Enabled" bitfld.long 0x00 12. " SETRIS44 ,Enable rising edge interrupt detection on GPIO pin 44" "No effect,Enabled" bitfld.long 0x00 11. " SETRIS43 ,Enable rising edge interrupt detection on GPIO pin 43" "No effect,Enabled" textline " " bitfld.long 0x00 10. " SETRIS42 ,Enable rising edge interrupt detection on GPIO pin 42" "No effect,Enabled" bitfld.long 0x00 9. " SETRIS41 ,Enable rising edge interrupt detection on GPIO pin 41" "No effect,Enabled" bitfld.long 0x00 8. " SETRIS40 ,Enable rising edge interrupt detection on GPIO pin 40" "No effect,Enabled" textline " " bitfld.long 0x00 7. " SETRIS39 ,Enable rising edge interrupt detection on GPIO pin 39" "No effect,Enabled" bitfld.long 0x00 6. " SETRIS38 ,Enable rising edge interrupt detection on GPIO pin 38" "No effect,Enabled" bitfld.long 0x00 5. " SETRIS37 ,Enable rising edge interrupt detection on GPIO pin 37" "No effect,Enabled" textline " " bitfld.long 0x00 4. " SETRIS36 ,Enable rising edge interrupt detection on GPIO pin 36" "No effect,Enabled" bitfld.long 0x00 3. " SETRIS35 ,Enable rising edge interrupt detection on GPIO pin 35" "No effect,Enabled" bitfld.long 0x00 2. " SETRIS34 ,Enable rising edge interrupt detection on GPIO pin 34" "No effect,Enabled" textline " " bitfld.long 0x00 1. " SETRIS33 ,Enable rising edge interrupt detection on GPIO pin 33" "No effect,Enabled" bitfld.long 0x00 0. " SETRIS32 ,Enable rising edge interrupt detection on GPIO pin 32" "No effect,Enabled" line.long 0x04 "CLR_RIS_TRIG23,GPIO Banks 2 and 3 Clear Rising Edge Interrupt Register" bitfld.long 0x04 31. " CLRRIS63 ,Disable rising edge interrupt detection on GPIO pin 63" "No effect,Disabled" bitfld.long 0x04 30. " CLRRIS62 ,Disable rising edge interrupt detection on GPIO pin 62" "No effect,Disabled" bitfld.long 0x04 29. " CLRRIS61 ,Disable rising edge interrupt detection on GPIO pin 61" "No effect,Disabled" textline " " bitfld.long 0x04 28. " CLRRIS60 ,Disable rising edge interrupt detection on GPIO pin 60" "No effect,Disabled" bitfld.long 0x04 27. " CLRRIS59 ,Disable rising edge interrupt detection on GPIO pin 59" "No effect,Disabled" bitfld.long 0x04 26. " CLRRIS58 ,Disable rising edge interrupt detection on GPIO pin 58" "No effect,Disabled" textline " " bitfld.long 0x04 25. " CLRRIS57 ,Disable rising edge interrupt detection on GPIO pin 57" "No effect,Disabled" bitfld.long 0x04 24. " CLRRIS56 ,Disable rising edge interrupt detection on GPIO pin 56" "No effect,Disabled" bitfld.long 0x04 23. " CLRRIS55 ,Disable rising edge interrupt detection on GPIO pin 55" "No effect,Disabled" textline " " bitfld.long 0x04 22. " CLRRIS54 ,Disable rising edge interrupt detection on GPIO pin 54" "No effect,Disabled" bitfld.long 0x04 21. " CLRRIS53 ,Disable rising edge interrupt detection on GPIO pin 53" "No effect,Disabled" bitfld.long 0x04 20. " CLRRIS52 ,Disable rising edge interrupt detection on GPIO pin 52" "No effect,Disabled" textline " " bitfld.long 0x04 19. " CLRRIS51 ,Disable rising edge interrupt detection on GPIO pin 51" "No effect,Disabled" bitfld.long 0x04 18. " CLRRIS50 ,Disable rising edge interrupt detection on GPIO pin 50" "No effect,Disabled" bitfld.long 0x04 17. " CLRRIS49 ,Disable rising edge interrupt detection on GPIO pin 49" "No effect,Disabled" textline " " bitfld.long 0x04 16. " CLRRIS48 ,Disable rising edge interrupt detection on GPIO pin 48" "No effect,Disabled" bitfld.long 0x04 15. " CLRRIS47 ,Disable rising edge interrupt detection on GPIO pin 47" "No effect,Disabled" bitfld.long 0x04 14. " CLRRIS46 ,Disable rising edge interrupt detection on GPIO pin 46" "No effect,Disabled" textline " " bitfld.long 0x04 13. " CLRRIS45 ,Disable rising edge interrupt detection on GPIO pin 45" "No effect,Disabled" bitfld.long 0x04 12. " CLRRIS44 ,Disable rising edge interrupt detection on GPIO pin 44" "No effect,Disabled" bitfld.long 0x04 11. " CLRRIS43 ,Disable rising edge interrupt detection on GPIO pin 43" "No effect,Disabled" textline " " bitfld.long 0x04 10. " CLRRIS42 ,Disable rising edge interrupt detection on GPIO pin 42" "No effect,Disabled" bitfld.long 0x04 9. " CLRRIS41 ,Disable rising edge interrupt detection on GPIO pin 41" "No effect,Disabled" bitfld.long 0x04 8. " CLRRIS40 ,Disable rising edge interrupt detection on GPIO pin 40" "No effect,Disabled" textline " " bitfld.long 0x04 7. " CLRRIS39 ,Disable rising edge interrupt detection on GPIO pin 39" "No effect,Disabled" bitfld.long 0x04 6. " CLRRIS38 ,Disable rising edge interrupt detection on GPIO pin 38" "No effect,Disabled" bitfld.long 0x04 5. " CLRRIS37 ,Disable rising edge interrupt detection on GPIO pin 37" "No effect,Disabled" textline " " bitfld.long 0x04 4. " CLRRIS36 ,Disable rising edge interrupt detection on GPIO pin 36" "No effect,Disabled" bitfld.long 0x04 3. " CLRRIS35 ,Disable rising edge interrupt detection on GPIO pin 35" "No effect,Disabled" bitfld.long 0x04 2. " CLRRIS34 ,Disable rising edge interrupt detection on GPIO pin 34" "No effect,Disabled" textline " " bitfld.long 0x04 1. " CLRRIS33 ,Disable rising edge interrupt detection on GPIO pin 33" "No effect,Disabled" bitfld.long 0x04 0. " CLRRIS32 ,Disable rising edge interrupt detection on GPIO pin 32" "No effect,Disabled" line.long 0x08 "SET_FAL_TRIG23,GPIO Banks 2 and 3 Set Falling Edge Interrupt Register" bitfld.long 0x08 31. " SETFAL63 ,Enable falling edge interrupt detection on GPIO pin 63" "No effect,Enabled" bitfld.long 0x08 30. " SETFAL62 ,Enable falling edge interrupt detection on GPIO pin 62" "No effect,Enabled" bitfld.long 0x08 29. " SETFAL61 ,Enable falling edge interrupt detection on GPIO pin 61" "No effect,Enabled" textline " " bitfld.long 0x08 28. " SETFAL60 ,Enable falling edge interrupt detection on GPIO pin 60" "No effect,Enabled" bitfld.long 0x08 27. " SETFAL59 ,Enable falling edge interrupt detection on GPIO pin 59" "No effect,Enabled" bitfld.long 0x08 26. " SETFAL58 ,Enable falling edge interrupt detection on GPIO pin 58" "No effect,Enabled" textline " " bitfld.long 0x08 25. " SETFAL57 ,Enable falling edge interrupt detection on GPIO pin 57" "No effect,Enabled" bitfld.long 0x08 24. " SETFAL56 ,Enable falling edge interrupt detection on GPIO pin 56" "No effect,Enabled" bitfld.long 0x08 23. " SETFAL55 ,Enable falling edge interrupt detection on GPIO pin 55" "No effect,Enabled" textline " " bitfld.long 0x08 22. " SETFAL54 ,Enable falling edge interrupt detection on GPIO pin 54" "No effect,Enabled" bitfld.long 0x08 21. " SETFAL53 ,Enable falling edge interrupt detection on GPIO pin 53" "No effect,Enabled" bitfld.long 0x08 20. " SETFAL52 ,Enable falling edge interrupt detection on GPIO pin 52" "No effect,Enabled" textline " " bitfld.long 0x08 19. " SETFAL51 ,Enable falling edge interrupt detection on GPIO pin 51" "No effect,Enabled" bitfld.long 0x08 18. " SETFAL50 ,Enable falling edge interrupt detection on GPIO pin 50" "No effect,Enabled" bitfld.long 0x08 17. " SETFAL49 ,Enable falling edge interrupt detection on GPIO pin 49" "No effect,Enabled" textline " " bitfld.long 0x08 16. " SETFAL48 ,Enable falling edge interrupt detection on GPIO pin 48" "No effect,Enabled" bitfld.long 0x08 15. " SETFAL47 ,Enable falling edge interrupt detection on GPIO pin 47" "No effect,Enabled" bitfld.long 0x08 14. " SETFAL46 ,Enable falling edge interrupt detection on GPIO pin 46" "No effect,Enabled" textline " " bitfld.long 0x08 13. " SETFAL45 ,Enable falling edge interrupt detection on GPIO pin 45" "No effect,Enabled" bitfld.long 0x08 12. " SETFAL44 ,Enable falling edge interrupt detection on GPIO pin 44" "No effect,Enabled" bitfld.long 0x08 11. " SETFAL43 ,Enable falling edge interrupt detection on GPIO pin 43" "No effect,Enabled" textline " " bitfld.long 0x08 10. " SETFAL42 ,Enable falling edge interrupt detection on GPIO pin 42" "No effect,Enabled" bitfld.long 0x08 9. " SETFAL41 ,Enable falling edge interrupt detection on GPIO pin 41" "No effect,Enabled" bitfld.long 0x08 8. " SETFAL40 ,Enable falling edge interrupt detection on GPIO pin 40" "No effect,Enabled" textline " " bitfld.long 0x08 7. " SETFAL39 ,Enable falling edge interrupt detection on GPIO pin 39" "No effect,Enabled" bitfld.long 0x08 6. " SETFAL38 ,Enable falling edge interrupt detection on GPIO pin 38" "No effect,Enabled" bitfld.long 0x08 5. " SETFAL37 ,Enable falling edge interrupt detection on GPIO pin 37" "No effect,Enabled" textline " " bitfld.long 0x08 4. " SETFAL36 ,Enable falling edge interrupt detection on GPIO pin 36" "No effect,Enabled" bitfld.long 0x08 3. " SETFAL35 ,Enable falling edge interrupt detection on GPIO pin 35" "No effect,Enabled" bitfld.long 0x08 2. " SETFAL34 ,Enable falling edge interrupt detection on GPIO pin 34" "No effect,Enabled" textline " " bitfld.long 0x08 1. " SETFAL33 ,Enable falling edge interrupt detection on GPIO pin 33" "No effect,Enabled" bitfld.long 0x08 0. " SETFAL32 ,Enable falling edge interrupt detection on GPIO pin 32" "No effect,Enabled" line.long 0x0c "CLR_FAL_TRIG23,GPIO Banks 2 and 3 Clear Falling Edge Interrupt Register" bitfld.long 0x0c 31. " CLRFAL63 ,Disable falling edge interrupt detection on GPIO pin 63" "No effect,Disabled" bitfld.long 0x0c 30. " CLRFAL62 ,Disable falling edge interrupt detection on GPIO pin 62" "No effect,Disabled" bitfld.long 0x0c 29. " CLRFAL61 ,Disable falling edge interrupt detection on GPIO pin 61" "No effect,Disabled" textline " " bitfld.long 0x0c 28. " CLRFAL60 ,Disable falling edge interrupt detection on GPIO pin 60" "No effect,Disabled" bitfld.long 0x0c 27. " CLRFAL59 ,Disable falling edge interrupt detection on GPIO pin 59" "No effect,Disabled" bitfld.long 0x0c 26. " CLRFAL58 ,Disable falling edge interrupt detection on GPIO pin 58" "No effect,Disabled" textline " " bitfld.long 0x0c 25. " CLRFAL57 ,Disable falling edge interrupt detection on GPIO pin 57" "No effect,Disabled" bitfld.long 0x0c 24. " CLRFAL56 ,Disable falling edge interrupt detection on GPIO pin 56" "No effect,Disabled" bitfld.long 0x0c 23. " CLRFAL55 ,Disable falling edge interrupt detection on GPIO pin 55" "No effect,Disabled" textline " " bitfld.long 0x0c 22. " CLRFAL54 ,Disable falling edge interrupt detection on GPIO pin 54" "No effect,Disabled" bitfld.long 0x0c 21. " CLRFAL53 ,Disable falling edge interrupt detection on GPIO pin 53" "No effect,Disabled" bitfld.long 0x0c 20. " CLRFAL52 ,Disable falling edge interrupt detection on GPIO pin 52" "No effect,Disabled" textline " " bitfld.long 0x0c 19. " CLRFAL51 ,Disable falling edge interrupt detection on GPIO pin 51" "No effect,Disabled" bitfld.long 0x0c 18. " CLRFAL50 ,Disable falling edge interrupt detection on GPIO pin 50" "No effect,Disabled" bitfld.long 0x0c 17. " CLRFAL49 ,Disable falling edge interrupt detection on GPIO pin 49" "No effect,Disabled" textline " " bitfld.long 0x0c 16. " CLRFAL48 ,Disable falling edge interrupt detection on GPIO pin 48" "No effect,Disabled" bitfld.long 0x0c 15. " CLRFAL47 ,Disable falling edge interrupt detection on GPIO pin 47" "No effect,Disabled" bitfld.long 0x0c 14. " CLRFAL46 ,Disable falling edge interrupt detection on GPIO pin 46" "No effect,Disabled" textline " " bitfld.long 0x0c 13. " CLRFAL45 ,Disable falling edge interrupt detection on GPIO pin 45" "No effect,Disabled" bitfld.long 0x0c 12. " CLRFAL44 ,Disable falling edge interrupt detection on GPIO pin 44" "No effect,Disabled" bitfld.long 0x0c 11. " CLRFAL43 ,Disable falling edge interrupt detection on GPIO pin 43" "No effect,Disabled" textline " " bitfld.long 0x0c 10. " CLRFAL42 ,Disable falling edge interrupt detection on GPIO pin 42" "No effect,Disabled" bitfld.long 0x0c 9. " CLRFAL41 ,Disable falling edge interrupt detection on GPIO pin 41" "No effect,Disabled" bitfld.long 0x0c 8. " CLRFAL40 ,Disable falling edge interrupt detection on GPIO pin 40" "No effect,Disabled" textline " " bitfld.long 0x0c 7. " CLRFAL39 ,Disable falling edge interrupt detection on GPIO pin 39" "No effect,Disabled" bitfld.long 0x0c 6. " CLRFAL38 ,Disable falling edge interrupt detection on GPIO pin 38" "No effect,Disabled" bitfld.long 0x0c 5. " CLRFAL37 ,Disable falling edge interrupt detection on GPIO pin 37" "No effect,Disabled" textline " " bitfld.long 0x0c 4. " CLRFAL36 ,Disable falling edge interrupt detection on GPIO pin 36" "No effect,Disabled" bitfld.long 0x0c 3. " CLRFAL35 ,Disable falling edge interrupt detection on GPIO pin 35" "No effect,Disabled" bitfld.long 0x0c 2. " CLRFAL34 ,Disable falling edge interrupt detection on GPIO pin 34" "No effect,Disabled" textline " " bitfld.long 0x0c 1. " CLRFAL33 ,Disable falling edge interrupt detection on GPIO pin 33" "No effect,Disabled" bitfld.long 0x0c 0. " CLRFAL32 ,Disable falling edge interrupt detection on GPIO pin 32" "No effect,Disabled" line.long 0x10 "INTSTAT23,GPIO Banks 2 and 3 Interrupt Status Register" eventfld.long 0x10 31. " STAT63 ,Interrupt status of GPIO pin 63" "Not pending,Pending" eventfld.long 0x10 30. " STAT62 ,Interrupt status of GPIO pin 62" "Not pending,Pending" eventfld.long 0x10 29. " STAT61 ,Interrupt status of GPIO pin 61" "Not pending,Pending" textline " " eventfld.long 0x10 28. " STAT60 ,Interrupt status of GPIO pin 60" "Not pending,Pending" eventfld.long 0x10 27. " STAT59 ,Interrupt status of GPIO pin 59" "Not pending,Pending" eventfld.long 0x10 26. " STAT58 ,Interrupt status of GPIO pin 58" "Not pending,Pending" textline " " eventfld.long 0x10 25. " STAT57 ,Interrupt status of GPIO pin 57" "Not pending,Pending" eventfld.long 0x10 24. " STAT56 ,Interrupt status of GPIO pin 56" "Not pending,Pending" eventfld.long 0x10 23. " STAT55 ,Interrupt status of GPIO pin 55" "Not pending,Pending" textline " " eventfld.long 0x10 22. " STAT54 ,Interrupt status of GPIO pin 54" "Not pending,Pending" eventfld.long 0x10 21. " STAT53 ,Interrupt status of GPIO pin 53" "Not pending,Pending" eventfld.long 0x10 20. " STAT52 ,Interrupt status of GPIO pin 52" "Not pending,Pending" textline " " eventfld.long 0x10 19. " STAT51 ,Interrupt status of GPIO pin 51" "Not pending,Pending" eventfld.long 0x10 18. " STAT50 ,Interrupt status of GPIO pin 50" "Not pending,Pending" eventfld.long 0x10 17. " STAT49 ,Interrupt status of GPIO pin 49" "Not pending,Pending" textline " " eventfld.long 0x10 16. " STAT48 ,Interrupt status of GPIO pin 48" "Not pending,Pending" eventfld.long 0x10 15. " STAT47 ,Interrupt status of GPIO pin 47" "Not pending,Pending" eventfld.long 0x10 14. " STAT46 ,Interrupt status of GPIO pin 46" "Not pending,Pending" textline " " eventfld.long 0x10 13. " STAT45 ,Interrupt status of GPIO pin 45" "Not pending,Pending" eventfld.long 0x10 12. " STAT44 ,Interrupt status of GPIO pin 44" "Not pending,Pending" eventfld.long 0x10 11. " STAT43 ,Interrupt status of GPIO pin 43" "Not pending,Pending" textline " " eventfld.long 0x10 10. " STAT42 ,Interrupt status of GPIO pin 42" "Not pending,Pending" eventfld.long 0x10 9. " STAT41 ,Interrupt status of GPIO pin 41" "Not pending,Pending" eventfld.long 0x10 8. " STAT40 ,Interrupt status of GPIO pin 40" "Not pending,Pending" textline " " eventfld.long 0x10 7. " STAT39 ,Interrupt status of GPIO pin 39" "Not pending,Pending" eventfld.long 0x10 6. " STAT38 ,Interrupt status of GPIO pin 38" "Not pending,Pending" eventfld.long 0x10 5. " STAT37 ,Interrupt status of GPIO pin 37" "Not pending,Pending" textline " " eventfld.long 0x10 4. " STAT36 ,Interrupt status of GPIO pin 36" "Not pending,Pending" eventfld.long 0x10 3. " STAT35 ,Interrupt status of GPIO pin 35" "Not pending,Pending" eventfld.long 0x10 2. " STAT34 ,Interrupt status of GPIO pin 34" "Not pending,Pending" textline " " eventfld.long 0x10 1. " STAT33 ,Interrupt status of GPIO pin 33" "Not pending,Pending" eventfld.long 0x10 0. " STAT32 ,Interrupt status of GPIO pin 32" "Not pending,Pending" group.long 0x60++0x7 "GPIO Bank 4" line.long 0x00 "DIR4,GPIO Bank 4 Direction Register" bitfld.long 0x00 6. " DIR70 ,Pin 70 direction" "Output,Input" bitfld.long 0x00 5. " DIR69 ,Pin 69 direction" "Output,Input" bitfld.long 0x00 4. " DIR68 ,Pin 68 direction" "Output,Input" textline " " bitfld.long 0x00 3. " DIR67 ,Pin 67 direction" "Output,Input" bitfld.long 0x00 2. " DIR66 ,Pin 66 direction" "Output,Input" bitfld.long 0x00 1. " DIR65 ,Pin 65 direction" "Output,Input" bitfld.long 0x00 0. " DIR64 ,Pin 64 direction" "Output,Input" line.long 0x04 "OUT_DATA4,GPIO Bank 4 Output Data Register" setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT70_set/clr ,Output drive state of GPIO pin 70" "Low,High" setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT69_set/clr ,Output drive state of GPIO pin 69" "Low,High" textline " " setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT68_set/clr ,Output drive state of GPIO pin 68" "Low,High" setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT67_set/clr ,Output drive state of GPIO pin 67" "Low,High" setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT66_set/clr ,Output drive state of GPIO pin 66" "Low,High" textline " " setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT65_set/clr ,Output drive state of GPIO pin 65" "Low,High" setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT64_set/clr ,Output drive state of GPIO pin 64" "Low,High" rgroup.long 0x70++0x03 line.long 0x00 "IN_DATA4,GPIO Bank 4 Input Data Register" bitfld.long 0x00 6. " IN70 ,Status of GPIO pin 70" "Low,High" bitfld.long 0x00 5. " IN69 ,Status of GPIO pin 69" "Low,High" bitfld.long 0x00 4. " IN68 ,Status of GPIO pin 68" "Low,High" bitfld.long 0x00 3. " IN67 ,Status of GPIO pin 67" "Low,High" bitfld.long 0x00 2. " IN66 ,Status of GPIO pin 66" "Low,High" textline " " bitfld.long 0x00 1. " IN65 ,Status of GPIO pin 65" "Low,High" bitfld.long 0x00 0. " IN64 ,Status of GPIO pin 64" "Low,High" group.long 0x74++0x13 line.long 0x00 "SET_RIS_TRIG4,GPIO Bank 4 Set Rising Edge Interrupt Register" bitfld.long 0x00 6. " SETRIS70 ,Enable rising edge interrupt detection on GPIO pin 70" "No effect,Enabled" bitfld.long 0x00 5. " SETRIS69 ,Enable rising edge interrupt detection on GPIO pin 69" "No effect,Enabled" bitfld.long 0x00 4. " SETRIS68 ,Enable rising edge interrupt detection on GPIO pin 68" "No effect,Enabled" textline " " bitfld.long 0x00 3. " SETRIS67 ,Enable rising edge interrupt detection on GPIO pin 67" "No effect,Enabled" bitfld.long 0x00 2. " SETRIS66 ,Enable rising edge interrupt detection on GPIO pin 66" "No effect,Enabled" bitfld.long 0x00 1. " SETRIS65 ,Enable rising edge interrupt detection on GPIO pin 65" "No effect,Enabled" textline " " bitfld.long 0x00 0. " SETRIS64 ,Enable rising edge interrupt detection on GPIO pin 64" "No effect,Enabled" line.long 0x04 "CLR_RIS_TRIG4,GPIO Bank 4 Clear Rising Edge Interrupt Register" bitfld.long 0x04 6. " CLRRIS70 ,Disable rising edge interrupt detection on GPIO pin 70" "No effect,Disabled" bitfld.long 0x04 5. " CLRRIS69 ,Disable rising edge interrupt detection on GPIO pin 69" "No effect,Disabled" bitfld.long 0x04 4. " CLRRIS68 ,Disable rising edge interrupt detection on GPIO pin 68" "No effect,Disabled" textline " " bitfld.long 0x04 3. " CLRRIS67 ,Disable rising edge interrupt detection on GPIO pin 67" "No effect,Disabled" bitfld.long 0x04 2. " CLRRIS66 ,Disable rising edge interrupt detection on GPIO pin 66" "No effect,Disabled" bitfld.long 0x04 1. " CLRRIS65 ,Disable rising edge interrupt detection on GPIO pin 65" "No effect,Disabled" textline " " bitfld.long 0x04 0. " CLRRIS64 ,Disable rising edge interrupt detection on GPIO pin 64" "No effect,Disabled" line.long 0x08 "SET_FAL_TRIG45,GPIO Banks 4 and 5 Set Falling Edge Interrupt Register" bitfld.long 0x08 6. " SETFAL70 ,Enable falling edge interrupt detection on GPIO pin 70" "No effect,Enabled" bitfld.long 0x08 5. " SETFAL69 ,Enable falling edge interrupt detection on GPIO pin 69" "No effect,Enabled" bitfld.long 0x08 4. " SETFAL68 ,Enable falling edge interrupt detection on GPIO pin 68" "No effect,Enabled" textline " " bitfld.long 0x08 3. " SETFAL67 ,Enable falling edge interrupt detection on GPIO pin 67" "No effect,Enabled" bitfld.long 0x08 2. " SETFAL66 ,Enable falling edge interrupt detection on GPIO pin 66" "No effect,Enabled" bitfld.long 0x08 1. " SETFAL65 ,Enable falling edge interrupt detection on GPIO pin 65" "No effect,Enabled" textline " " bitfld.long 0x08 0. " SETFAL64 ,Enable falling edge interrupt detection on GPIO pin 64" "No effect,Enabled" line.long 0x0c "CLR_FAL_TRIG45,GPIO Banks 4 and 5 Clear Falling Edge Interrupt Register" bitfld.long 0x0c 6. " CLRFAL70 ,Disable falling edge interrupt detection on GPIO pin 70" "No effect,Disabled" bitfld.long 0x0c 5. " CLRFAL69 ,Disable falling edge interrupt detection on GPIO pin 69" "No effect,Disabled" bitfld.long 0x0c 4. " CLRFAL68 ,Disable falling edge interrupt detection on GPIO pin 68" "No effect,Disabled" textline " " bitfld.long 0x0c 3. " CLRFAL67 ,Disable falling edge interrupt detection on GPIO pin 67" "No effect,Disabled" bitfld.long 0x0c 2. " CLRFAL66 ,Disable falling edge interrupt detection on GPIO pin 66" "No effect,Disabled" bitfld.long 0x0c 1. " CLRFAL65 ,Disable falling edge interrupt detection on GPIO pin 65" "No effect,Disabled" textline " " bitfld.long 0x0c 0. " CLRFAL64 ,Disable falling edge interrupt detection on GPIO pin 64" "No effect,Disabled" line.long 0x10 "INTSTAT4,GPIO Bank 4 Interrupt Status Register" eventfld.long 0x10 6. " STAT70 ,Interrupt status of GPIO pin 70" "Not pending,Pending" eventfld.long 0x10 5. " STAT69 ,Interrupt status of GPIO pin 69" "Not pending,Pending" eventfld.long 0x10 4. " STAT68 ,Interrupt status of GPIO pin 68" "Not pending,Pending" textline " " eventfld.long 0x10 3. " STAT67 ,Interrupt status of GPIO pin 67" "Not pending,Pending" eventfld.long 0x10 2. " STAT66 ,Interrupt status of GPIO pin 66" "Not pending,Pending" eventfld.long 0x10 1. " STAT65 ,Interrupt status of GPIO pin 65" "Not pending,Pending" textline " " eventfld.long 0x10 0. " STAT64 ,Interrupt status of GPIO pin 64" "Not pending,Pending" width 0xb tree.end tree "I2C (Inter-Integrated Circuit)" base asd:0x01C21000 width 8. if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000)) group.long 0x00++0x3 line.long 0x00 "ICOAR,I2C Own Address Register" hexmask.long.byte 0x00 0.--6. 1. " OADDR ,Slave address of the I2C module" else group.long 0x00++0x3 line.long 0x00 "ICOAR,I2C Own Address Register" hexmask.long.word 0x00 0.--9. 1. " OADDR ,Slave address of the I2C module" endif group.long 0x04++0x13 line.long 0x00 "ICIMR,I2C Interrupt Mask Register" bitfld.long 0x00 6. " AAS ,Address-as-slave interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCD ,Stop condition detected interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " ICXRDY ,Transmit-data-ready interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ICRRDY ,Receive-data-ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ARDY ,Register-access-ready interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " NACK ,No-acknowledgment interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AL ,Arbitration-lost interrupt enable" "Disabled,Enabled" line.long 0x04 "ICSTR,I2C Status Register" eventfld.long 0x04 14. " SDIR ,Slave direction" "Receiver,Transmitter" eventfld.long 0x04 13. " NACKSNT ,NACK sent" "Not sent,Sent" eventfld.long 0x04 12. " BB ,Bus busy" "Free,Busy" textline " " bitfld.long 0x04 11. " RSFULL ,Receive shift register full" "No overrun,Overrun" bitfld.long 0x04 10. " XSMT ,Transmit shift register empty" "Underflow,No underflow" bitfld.long 0x04 9. " AAS ,Addressed-as-slave" "Cleared,Recognized" textline " " bitfld.long 0x04 8. " AD0 ,Address 0 bit" "Cleared,Detected" eventfld.long 0x04 5. " SCD ,Stop condition detected" "Not detected,Detected" eventfld.long 0x04 4. " ICXRDY ,Transmit-data-ready interrupt flag" "Not ready,Ready" textline " " eventfld.long 0x04 3. " ICRRDY ,Receive-data-ready interrupt flag" "Not ready,Ready" eventfld.long 0x04 2. " ARDY ,Register-access-ready interrupt flag" "Not ready,Ready" eventfld.long 0x04 1. " NACK ,No-acknowledgement interrupt flag" "Not received,Received" textline " " eventfld.long 0x04 0. " AL ,Arbitration-lost interrupt flag" "Not lost,Lost" line.long 0x08 "ICCLKL,I2C Clock Divider Register Low" hexmask.long.word 0x08 0.--15. 1. " ICCL ,Clock low-time divide-down value" line.long 0x0c "ICCLKH,I2C Clock Divider Register High" hexmask.long.word 0x0c 0.--15. 1. " ICCH ,Clock high-time divide-down value" line.long 0x10 "ICCNT,I2C Data Count Register" hexmask.long.word 0x10 0.--15. 1. " ICDC ,Data count value" rgroup.long 0x18++0x3 line.long 0x00 "ICDRR,I2C Data Receive Register" hexmask.long.byte 0x00 0.--7. 1. " D ,Receive data" if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000)) group.long 0x1c++0x3 line.long 0x00 "ICSAR,I2C Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADDR ,Slave address transmitted in master-transmitter mode" else group.long 0x1c++0x3 line.long 0x00 "ICSAR,I2C Slave Address Register" hexmask.long.word 0x00 0.--9. 1. " SADDR ,Slave address transmitted in master-transmitter mode" endif group.long 0x20++0x7 line.long 0x00 "ICDXR,I2C Data Transmit Register" hexmask.long.byte 0x00 0.--7. 1. " D ,Transmit data" line.long 0x04 "ICMDR,I2C Mode Register" bitfld.long 0x04 15. " NACKMOD ,NACK mode" "ACK,NACK" bitfld.long 0x04 14. " FREE ,Emulation mode" "Stopped,Run free" bitfld.long 0x04 13. " STT ,START condition" "Not generated,Generated" textline " " bitfld.long 0x04 11. " STP ,STOP condition" "Not generated,Generated" bitfld.long 0x04 10. " MST ,Master mode" "Slave,Master" bitfld.long 0x04 09. " TRX ,Transmitter mode" "Receiver,Transmitter" textline " " bitfld.long 0x04 08. " XA ,Expanded address mode" "7-bit,10-bit" bitfld.long 0x04 07. " RM ,Repeat mode" "Non-repeat,Repeat" bitfld.long 0x04 06. " DLB ,Digital loopback mode" "Disabled,Enabled" textline " " bitfld.long 0x04 05. " IRS ,I2C module reset" "Reset,No reset" bitfld.long 0x04 04. " STB ,START byte mode" "Disabled,Enabled" bitfld.long 0x04 03. " FDF ,Free data format mode" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--2. " BC ,Bit count" "8-bits/word,1-bit/word,2-bits/word,3-bits/word,4-bits/word,5-bits/word,6-bits/word,7-bits/word" rgroup.long 0x28++0x3 line.long 0x00 "ICIVR,I2C Interrupt Vector Register" bitfld.long 0x00 0.--2. " INTCODE ,Interrupt code" "None,AL,NACK,ARDY,ICRRDY,ICXRDY,SCD,AAS" group.long 0x2c++0x3 line.long 0x00 "ICEMDR,I2C Extended Mode Register" bitfld.long 0x00 1. " IGNACK ,Ignore NACK mode" "Not ignored,Ignored" bitfld.long 0x00 0. " BCM ,Backward compatibility mode" "More data,Data copied" group.long 0x30++0x3 line.long 0x00 "ICPSC,I2C Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. " IPSC ,I2C prescaler divide-down value" sif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x34++0x7 line.long 0x00 "REVID1,I2C Revision Identification Register" hexmask.long.word 0x00 0.--15. 1. " REVID1 ,Identifies revision of peripheral" line.long 0x04 "REVID2,I2C Revision Identification Register" hexmask.long.byte 0x04 0.--7. 1. " REVID2 ,Peripheral Identification Number" group.long 0x48++0x17 line.long 0x00 "ICPFUNC,I2C Pin Function Register" bitfld.long 0x00 0. " PFUNC0 ,Controls the function of the I2C_SCL and I2C_SDA pins" "I2C_SCL & I2C_SDA,GPIO" line.long 0x04 "ICPDIR,I2C Pin Direction Register" bitfld.long 0x04 1. " PDIR1 ,Controls the direction of the I2C_SDA pin when configured as GPIO" "Input,Output" bitfld.long 0x04 0. " PDIR0 ,Controls the direction of the I2C_SCL pin when configured as GPIO" "Input,Output" line.long 0x08 "ICPDIN,I2C Pin Data In Register" bitfld.long 0x08 1. " PDIN1 ,Indicates the logic level present on the I2C_SDA pin" "Low,High" bitfld.long 0x08 0. " PDIN0 ,Indicates the logic level present on the I2C_SCL pin" "Low,High" line.long 0x0c "ICPDOUT,I2C Pin Data Out Register" bitfld.long 0x0c 1. " PDOUT1 ,Controls the level driven on the I2C_SDA pin when GPIO" "Low,High" bitfld.long 0x0c 0. " PDOUT0 ,Controls the level driven on the I2C_SCL pin when GPIO" "Low,High" line.long 0x10 "ICPDSET,I2C Pin Data Set Register" bitfld.long 0x10 1. " PDSET1 ,Set the PDOUT1 bit in the I2C pin data out register" "Low,High" bitfld.long 0x10 0. " PDSET0 ,Set the PDOUT0 bit in the I2C pin data out register" "Low,High" line.long 0x14 "ICPDCLR,I2C Pin Data Clear Register" bitfld.long 0x14 1. " PDCLR1 ,Clear the PDOUT1 bit in the I2C pin data out register" "Not cleared,Cleared" bitfld.long 0x14 0. " PDCLR0 ,Clear the PDOUT0 bit in the I2C pin data out register" "Not cleared,Cleared" else rgroup.long 0x34++0x7 line.long 0x00 "ICPID1,I2C Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" line.long 0x04 "ICPID2,I2C Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYPE ,Peripheral type" endif width 0xb tree.end tree "MMC/SD/SDIO (Multimedia Card/Secure Digital Card Controller)" base asd:0x01e10000 width 12. group.long 0x00++0x07 line.long 0x00 "MMCTL,MMC Control Register" bitfld.long 0x00 6.--7. " DATEG ,DAT3 edge detection select" "Disabled,Rising edge,Falling edge,Both" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 2. " WIDTH0 ,Data bus width bit 0" "1 bit,4 bits" else bitfld.long 0x00 2. " WIDTH ,Data bus width" "1 bit,4 bits" endif bitfld.long 0x00 1. " CMDRST ,CMD logic reset" "No reset,Reset" bitfld.long 0x00 0. " DATRST ,DAT logic reset" "No reset,Reset" line.long 0x04 "MMCCLK,MMC Memory Clock Control Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x04 9. " DIV4 ,DIV4 option" "/(2*(CLKRT+1)),/(4*(CLKRT+1))" endif newline bitfld.long 0x04 8. " CLKEN ,CLK pin enable" "Disabled,Enabled" hexmask.long.byte 0x04 0.--7. 1. " CLKRT ,Clock rate. Use this field to set the divide-down value for the memory clock" newline hgroup.long 0x08++0x3 hide.long 0x00 "MMCST0,MMC Status Register 0" in newline rgroup.long 0x0C++0x3 line.long 0x00 "MMCST1,MMC Status Register 1" bitfld.long 0x00 6. " FIFOFUL ,FIFO is full" "Not full,Full" bitfld.long 0x00 5. " FIFOEMP ,FIFO is empty" "Not empty,Empty" bitfld.long 0x00 4. " DAT3ST ,DAT3 status" "Low,High" bitfld.long 0x00 3. " DRFUL ,Data receive register (MMCDRR) is full" "Not detected,Detected" newline bitfld.long 0x00 2. " DXEMP ,Data transmit register (MMCDXR) is empty" "Not detected,Detected" bitfld.long 0x00 1. " CLKSTP ,Clock stop status" "Active,Stopped" bitfld.long 0x00 0. " BUSY ,Busy signal" "Not detected,Detected" group.long 0x10++0x3 line.long 0x00 "MMCIM,MMC Interrupt Mask Register" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x00 13. " ECCS ,Command Completion Signal permission" "Prohibited,Permitted" endif newline bitfld.long 0x00 12. " ETRNDNE ,Transfer done (TRNDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " EDATED ,DAT3 edge detect (DATED) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 10. " EDRRDY ,Data receive register ready (DRRDY) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " EDXRDY ,Data transmit register (MMCDXR) ready interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " ECRCRS ,Response CRC error (CRCRS) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " ECRCRD ,Read-data CRC error (CRCRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " ECRCWR ,Write-data CRC error (CRCWR) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " ETOUTRS ,Response time-out event (TOUTRS) interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. " ETOUTRD ,Read-data time-out event (TOUTRD) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ERSPDNE ,Command/response done (RSPDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " EBSYDNE ,Busy done (BSYDNE) interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " EDATDNE ,Data done (DATDNE) interrupt enable" "Disabled,Enabled" group.long 0x14++0x0F line.long 0x00 "MMCTOR,MMC Response Time-Out Register" sif cpuis("DM357") hexmask.long.byte 0x00 8.--12. 1. " TOD_20_16 ,Data read time-out count upper 5 bits" elif (cpuis("DM365")||cpuis("DM368")) hexmask.long.word 0x00 8.--17. 1. " TOD_25_16 ,Data read time-out count upper 10 bits" else hexmask.long.byte 0x00 8.--15. 1. " TOD_23_16 ,Data read time-out count upper 8 bits" endif newline hexmask.long.byte 0x00 0.--7. 1. " TOR ,Time-out count for response" line.long 0x04 "MMCTOD,MMC Data Read Time-Out Register" hexmask.long.word 0x04 0.--15. 1. " TOD_15_0 ,Data read time-out count" line.long 0x08 "MMCBLEN,MMC Block Length Register" hexmask.long.word 0x08 0.--11. 1. " BLEN ,Block length" line.long 0x0C "MMCNBLK,MMC Number of Blocks Register" hexmask.long.word 0x0C 0.--15. 1. " NBLK ,Number of blocks" rgroup.long 0x24++0x3 line.long 0x00 "MMCNBLC,MMC Number of Blocks Counter Register" hexmask.long.word 0x00 0.--15. 1. " NBLC ,Number of blocks remaining to be transferred" group.long 0x28++0x7 line.long 0x00 "MMCDRR,MMC Data Receive Register" line.long 0x04 "MMCDXR,MMC Data Transmit Register" if (((d.l(asd:0x01e00000+0x30))&0x2000)==0x2000) group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 12. " STRMTP ,Stream enable" "Block,Stream" bitfld.long 0x00 11. " DTRW ,Write enable" "Read,Write" bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" newline bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" else group.long 0x30++0x3 line.long 0x00 "MMCCMD,MMC Command Register" bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled" bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared" bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted" bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer" newline bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3" bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled" bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index" endif group.long 0x34++0x3 line.long 0x00 "MMCARGHL,MMC Argument Register" hexmask.long.word 0x00 16.--31. 1. " ARGH ,Argument - high part" hexmask.long.word 0x00 0.--15. 1. " ARGL ,Argument - low part" if ((((d.l(asd:0x01e00000+0x30))&0x600)==0x200)||(((d.l(asd:0x01e00000+0x30))&0x600)==0x600)) hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" sif cpuis("DM357") group.long 0x40++0x7 else rgroup.long 0x40++0x7 endif line.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.byte 0x00 16.--23. 1. " MMCRSP5 ,MMC Response Register 5" line.long 0x04 "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x04 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x04 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" elif (((d.l(asd:0x01e00000+0x30))&0x600)==0x400) sif cpuis("DM357") group.long 0x38++0xF else rgroup.long 0x38++0xF endif line.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hexmask.long.word 0x00 16.--31. 1. " MMCRSP1 ,MMC Response Register 1" hexmask.long.word 0x00 0.--15. 1. " MMCRSP0 ,MMC Response Register 0" line.long 0x04 "MMCRSP23,MMC Response Register 2 and 3" hexmask.long.word 0x04 16.--31. 1. " MMCRSP3 ,MMC Response Register 3" hexmask.long.word 0x04 0.--15. 1. " MMCRSP2 ,MMC Response Register 2" line.long 0x08 "MMCRSP45,MMC Response Register 4 and 5" hexmask.long.word 0x08 16.--31. 1. " MMCRSP5 ,MMC Response Register 5" hexmask.long.word 0x08 0.--15. 1. " MMCRSP4 ,MMC Response Register 4" line.long 0x0C "MMCRSP67,MMC Response Register 6 and 7" hexmask.long.word 0x0C 16.--31. 1. " MMCRSP7 ,MMC Response Register 7" hexmask.long.word 0x0C 0.--15. 1. " MMCRSP6 ,MMC Response Register 6" else hgroup.long 0x38++0x3 hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1" hgroup.long 0x3C++0x3 hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3" hgroup.long 0x40++0x3 hide.long 0x00 "MMCRSP45,MMC Response Register 4 and 5" hgroup.long 0x44++0x3 hide.long 0x00 "MMCRSP67,MMC Response Register 6 and 7" endif group.long 0x48++0x3 line.long 0x00 "MMCDRSP,MMC Data Response Register" hexmask.long.byte 0x00 0.--7. 1. " DRSP ,CRC status token" group.long 0x50++0x3 line.long 0x00 "MMCCIDX,MMC Command Index Register" bitfld.long 0x00 7. " STRT ,Start bit" "0,1" bitfld.long 0x00 6. " XMIT ,Transmission bit" "0,1" hexmask.long.byte 0x00 0.--5. 1. " CIDX ,Command index" group.long 0x64++0x3 line.long 0x00 "SDIOCTL,SDIO Control Register" bitfld.long 0x00 1. " RDWTCR ,Read wait enable for CRC error" "Disabled,Enabled" bitfld.long 0x00 0. " RDWTRQ ,Read wait request" "Ended,Set" rgroup.long 0x68++0x3 line.long 0x00 "SDIOST0,SDIO Status Register 0" bitfld.long 0x00 2. " RDWTST ,Read wait status" "Not in progress,In progress" bitfld.long 0x00 1. " INTPRD ,Interrupt period" "Not in progress,In progress" bitfld.long 0x00 0. " DAT1 ,External state of the SD_DATA1 pin" "Low,High" group.long 0x6C++0xB line.long 0x00 "SDIOIEN,SDIO Interrupt Enable Register" bitfld.long 0x00 1. " RWSEN ,Read wait interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " IOINTEN ,SDIO card interrupt enable" "Disabled,Enabled" line.long 0x04 "SDIOIST,SDIO Interrupt Status Register" eventfld.long 0x04 1. " RWS ,Read wait interrupt status" "Not occurred,Occurred" eventfld.long 0x04 0. " IOINT ,SDIO card interrupt status" "Not occurred,Occurred" line.long 0x08 "MMCFIFOCTL,MMC FIFO Control Register" bitfld.long 0x08 3.--4. " ACCWD ,Access width" "4 bytes,3 bytes,2 bytes,1 byte" sif (cpuis("DM365")||cpuis("DM368")) bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "256 bits,512 bits" else bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "128 bits,256 bits" endif bitfld.long 0x08 1. " FIFODIR ,FIFO direction" "Read,Write" bitfld.long 0x08 0. " FIFORST ,FIFO reset" "No reset,Reset" width 0x0B tree.end tree.open "PWM (Pulse-Width Modulator)" tree "PWM 0" width 7. base asd:0x01c22000 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM0 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM0 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM0 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM0 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM0 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM0 Period Register" line.long 0x08 "PH1D,PWM0 First-Phase Duration Register" width 0xb tree.end tree "PWM 1" width 7. base asd:0x01c22400 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM1 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM1 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM1 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM1 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM1 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM1 Period Register" line.long 0x08 "PH1D,PWM1 First-Phase Duration Register" width 0xb tree.end tree "PWM 2" width 7. base asd:0x01c22800 sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "PID,PWM2 Peripheral Identification Register" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number" hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number" else hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" endif endif group.long 0x04++0x7 line.long 0x00 "PCR,PWM2 Peripheral Control Register" bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running" line.long 0x04 "CFG,PWM2 Configuration Register" bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running" bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High" bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High" bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High" bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..." textline " " bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..." wgroup.long 0x0c++0x3 line.long 0x00 "START,PWM2 Start Register" bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start" group.long 0x10++0xb line.long 0x00 "RPT,PWM2 Repeat Count Register" hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)" line.long 0x04 "PER,PWM2 Period Register" line.long 0x08 "PH1D,PWM2 First-Phase Duration Register" width 0xb tree.end tree.end tree "SPI (Serial Port Interface)" base asd:0x01c66800 width 10. group.long 0x00++0xf line.long 0x00 "SPIGCR0,SPI Global Control Register 0" bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset" line.long 0x04 "SPIGCR1,SPI Global Control Register 1" bitfld.long 0x04 24. " SPIENA ,SPI enable" "Reset,Enabled" bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CLKMOD ,Clock mode" "Reserved,Enabled" bitfld.long 0x04 0. " MASTER ,Master mode" "Reserved,Enabled" line.long 0x08 "SPIINT,SPI Interrupt Register" bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Not used,Used" bitfld.long 0x08 8. " RXINTEN ,Receive interrupt enable" "Not generated,Generated" textline " " bitfld.long 0x08 6. " OVRNINTEN ,Overrun interrupt enable" "Not generated,Generated" bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt" line.long 0x0c "SPILVL,SPI Interrupt Level Register" bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1" bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1" textline " " bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1" sif (cpu()=="DM335") bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1" endif hgroup.long 0x10++0x3 hide.long 0x00 "SPIFLG,SPI Flag Register" in group.long 0x14++0x3 line.long 0x00 "SPIPC0,SPI Pin Control Register 0" bitfld.long 0x00 11. " DIFUN ,SPI data input (SPI_DI) functional pin" "Reserved,Functional" bitfld.long 0x00 10. " DOFUN ,SPI data output (SPI_DO) functional pin" "Reserved,Functional" bitfld.long 0x00 9. " CLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional" textline " " bitfld.long 0x00 1. " EN1FUN ,SPI slave 1 (SPI_EN1) functional pin" "Reserved,Functional" bitfld.long 0x00 0. " EN0FUN ,SPI slave 0 (SPI_EN0) functional pin" "Reserved,Functional" rgroup.long 0x1c++0x3 line.long 0x00 "SPIPC2,SPI Pin Control Register 2" bitfld.long 0x00 11. " DIDIN ,SPI data input (SPI_DI) pin value" "0,1" bitfld.long 0x00 10. " DODIN ,SPI data output (SPI_DO) pin value" "0,1" bitfld.long 0x00 9. " CLKDIN ,SPI clock (SPI_CLK) pin value" "0,1" textline " " bitfld.long 0x00 1. " EN1DIN ,SPI slave 1 (SPI_EN1) pin value" "0,1" bitfld.long 0x00 0. " EN0DIN ,SPI slave 0 (SPI_EN0) pin value" "0,1" group.long 0x3c++0x3 line.long 0x00 "SPIDAT1,SPI Shift Register" bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active" bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3" bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPI_EN1,/SPI_EN0,None" textline " " hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,SPI shift data 1" hgroup.long 0x40++0x3 hide.long 0x00 "SPIBUF,SPI Buffer Register" in rgroup.long 0x44++0x3 line.long 0x00 "SPIEMU,SPI Emulation Register" hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation" group.long 0x48++0x7 line.long 0x00 "SPIDELAY,SPI Delay Register" hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay" hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay" line.long 0x04 "SPIDEF,SPI Default Chip Select Register" bitfld.long 0x04 1. " EN1DEF ,Chip select default pattern" "0,1" bitfld.long 0x04 0. " EN0DEF ,Chip select default pattern" "0,1" width 10. group.long 0x50++0xf line.long 0x0 "SPIFMT0,SPI Data Format Register 0" bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first" bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive" textline " " bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle" hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0" textline " " bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x4 "SPIFMT1,SPI Data Format Register 1" bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first" bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive" textline " " bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle" hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1" textline " " bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0x8 "SPIFMT2,SPI Data Format Register 2" bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first" bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive" textline " " bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle" hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2" textline " " bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" line.long 0xC "SPIFMT3,SPI Data Format Register 3" bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first" bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive" textline " " bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle" hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3" textline " " bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected" hgroup.long 0x60++0x3 hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0" in hgroup.long 0x64++0x03 hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1" in width 0xb tree.end tree.open "64-Bit Timer" tree "Timer 0" base asd:0x01c21400 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "Timer 1" base asd:0x01c21800 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree "Timer 2 (WatchDog)" base asd:0x01c21c00 width 15. sif (cpu()=="DM335") tree "PID12 for timers 0/1/2" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" tree.end tree "PID12 for timer 3" rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3" bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" tree.end elif (cpu()=="DM357") elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer" else rgroup.long 0x00++0x03 line.long 0x00 "PID12,Peripheral Identification Register 12" hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral" endif group.long 0x04++0x03 line.long 0x00 "EMUMGT,Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish" bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running" group.long 0x10++0x17 line.long 0x00 "TIM12,Timer Counter Register" line.long 0x04 "TIM34,Timer Counter Register" line.long 0x08 "PRD12,Timer Period Register" line.long 0x0c "PRD34,Timer Period Register" line.long 0x10 "TCR,Timer Control Register" sif (cpu()!="DM357") bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External" textline " " bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif textline " " sif (cpu()!="DM357") bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..." bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled" bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload" else bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN" textline " " bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..." endif line.long 0x14 "TGCR,Timer Global Control Register" hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio" hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4" textline " " sif (cpu()=="DM357") bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" else bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled" bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained" endif textline " " bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset" bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset" sif (cpu()=="DM357") group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" else group.long 0x28++0x3 line.long 0x00 "WDTCR,Watchdog Timer Control Register" hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key" bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred" bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled" endif sif (cpu()!="DM357") group.long 0x34++0x13 line.long 0x00 "REL12,Timer Reload Register 12 Register" line.long 0x04 "REL34,Timer Reload Register 34 Register" line.long 0x08 "CAP12,Timer Capture Register 12 Register" line.long 0x0c "CAP34,Timer Capture Register 34 Register" line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register" bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt" bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt" textline " " bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt" bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled" endif width 0xb tree.end tree.end tree.open "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART 0" base asd:0x01c20000 width 13. if (((d.l(asd:0x01c20000+0xc))&0x80)==0x00) group.long 0x00++0x7 line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data" line.long 0x04 "IER,Interrupt Enable Register" bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled" bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled" else group.long 0x00++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" endif rgroup.long 0x08++0x3 line.long 0x00 "IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled" bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..." textline " " bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending" wgroup.long 0x08++0x3 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes" bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable" textline " " bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear" bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable" if ((((d.l(asd:0x01c20000+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xb)) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x8) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x0) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" else group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" endif group.long 0x10++0x3 line.long 0x00 "MCR,Modem Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" else bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" endif rgroup.long 0x14++0x3 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty" textline " " bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty" bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected" textline " " bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error" bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error" textline " " bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun" bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready" group.long 0x20++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" sif (cpu()=="DM335") rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x28++0x3 line.long 0x00 "PID,Peripheral Identification Register" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" else rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" endif group.long 0x30++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled" bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled" textline " " bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") group.long 0x34++0x03 line.long 0x00 "MDR,Mode Definition Register" bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling" endif width 0xb tree.end tree "UART 1" base asd:0x01c20400 width 13. if (((d.l(asd:0x01c20400+0xc))&0x80)==0x00) group.long 0x00++0x7 line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data" line.long 0x04 "IER,Interrupt Enable Register" bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled" bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled" else group.long 0x00++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" endif rgroup.long 0x08++0x3 line.long 0x00 "IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled" bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..." textline " " bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending" wgroup.long 0x08++0x3 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes" bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable" textline " " bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear" bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable" if ((((d.l(asd:0x01c20400+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20400+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20400+0xc))&0xb)==0xb)) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20400+0xc))&0xb)==0x8) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20400+0xc))&0xb)==0x0) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" else group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" endif group.long 0x10++0x3 line.long 0x00 "MCR,Modem Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" else bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" endif rgroup.long 0x14++0x3 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty" textline " " bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty" bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected" textline " " bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error" bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error" textline " " bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun" bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready" group.long 0x20++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" sif (cpu()=="DM335") rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x28++0x3 line.long 0x00 "PID,Peripheral Identification Register" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" else rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" endif group.long 0x30++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled" bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled" textline " " bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") group.long 0x34++0x03 line.long 0x00 "MDR,Mode Definition Register" bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling" endif width 0xb tree.end tree "UART 2" base asd:0x01c20800 width 13. if (((d.l(asd:0x01c20800+0xc))&0x80)==0x00) group.long 0x00++0x7 line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register" hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data" line.long 0x04 "IER,Interrupt Enable Register" bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled" bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled" else group.long 0x00++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" endif rgroup.long 0x08++0x3 line.long 0x00 "IIR,Interrupt Identification Register" bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled" bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..." textline " " bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending" wgroup.long 0x08++0x3 line.long 0x00 "FCR,FIFO Control Register" bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes" bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable" textline " " bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear" bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable" if ((((d.l(asd:0x01c20800+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20800+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20800+0xc))&0xb)==0xb)) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20800+0xc))&0xb)==0x8) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" elif (((d.l(asd:0x01c20800+0xc))&0xb)==0x0) group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" else group.long 0x0c++0x3 line.long 0x00 "LCR,Line Control Register" bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH" bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled" bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2" textline " " bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits" endif group.long 0x10++0x3 line.long 0x00 "MCR,Modem Control Register" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" else bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled" bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled" endif rgroup.long 0x14++0x3 line.long 0x00 "LSR,Line Status Register" bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error" bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty" textline " " bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty" bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected" textline " " bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error" bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error" textline " " bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun" bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready" group.long 0x20++0x7 line.long 0x00 "DLL,Divisor LSB Latch" hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor" line.long 0x04 "DLH,Divisor MSB Latch" hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor" sif (cpu()=="DM335") rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" elif (cpu()=="DM365"||cpu()=="DM368") rgroup.long 0x28++0x3 line.long 0x00 "PID,Peripheral Identification Register" bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value" textline " " bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release" else rgroup.long 0x28++0x7 line.long 0x00 "PID1,Peripheral Identification Register 1" hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral" line.long 0x04 "PID2,Peripheral Identification Register 2" hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral" endif group.long 0x30++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled" bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled" textline " " bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running" sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368") group.long 0x34++0x03 line.long 0x00 "MDR,Mode Definition Register" bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling" endif width 0xb tree.end tree.end tree "USB (Universal Serial Bus)" base asd:0x01c64000 width 13. sif (cpu()=="DM357") group.long 0x00++0x03 line.long 0x00 "REVR,Revision Register" endif group.long 0x4++0x3 line.long 0x0 "CTRLR,Control Register" bitfld.long 0x00 4. " RNDIS ,RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x00 3. " UINT ,USB non-PDR interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " CLKFACK ,Clock stop fast ACK enable" "Disabled,Enabled" bitfld.long 0x00 0. " RESET ,Soft reset" "No effect,Reset" rgroup.long 0x8++0x3 line.long 0x0 "STATR,Status Register" bitfld.long 0x0 0. " DRVVBUS ,Current DRVVBUS value" "Low,High" group.long 0x10++0x7 line.long 0x0 "RNDISR,RNDIS Register" bitfld.long 0x0 19. " RX4EN ,Receive Endpoint 4 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 18. " RX3EN ,Receive Endpoint 3 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 17. " RX2EN ,Receive Endpoint 2 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 16. " RX1EN ,Receive Endpoint 1 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " TX4EN ,Transmit Endpoint 4 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 2. " TX3EN ,Transmit Endpoint 3 RNDIS mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " TX2EN ,Transmit Endpoint 2 RNDIS mode enable" "Disabled,Enabled" bitfld.long 0x0 0. " TX1EN ,Transmit Endpoint 1 RNDIS mode enable" "Disabled,Enabled" line.long 0x4 "AUTOREQ,Auto Request Register" bitfld.long 0x4 6.--7. " RX4 ,RX endpoint 4 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" bitfld.long 0x4 4.--5. " RX3 ,RX endpoint 3 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" textline " " bitfld.long 0x4 2.--3. " RX2 ,RX endpoint 2 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" bitfld.long 0x4 0.--1. " RX1 ,RX endpoint 1 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.long 0x20++0x3 line.long 0x0 "INTSRCR,USB Interrupt Source Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,Device disconnection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,Device connection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF start interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Babble detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt" "No interrupt,Interrupt" group.long 0x2c++0x3 line.long 0x0 "INTMSKR,USB Interrupt Mask Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,Device Disconnected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,Device Connected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF started interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Babble detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked" rgroup.long 0x38++0x3 line.long 0x0 "INTMASKEDR,USB Interrupt Source Masked Register" bitfld.long 0x0 24. " USB[8] ,DRVVBUS level change interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 23. " USB[7] ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " USB[6] ,SRP detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 21. " USB[5] ,Device Disconnected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 20. " USB[4] ,Device Connected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 19. " USB[3] ,SOF started interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 18. " USB[2] ,Babble detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 17. " USB[1] ,Resume signaling detected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " USB[0] ,Suspend Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 12. " RX[4] ,Receive endpoint 4 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " RX[3] ,Receive endpoint 3 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 10. " RX[2] ,Receive endpoint 2 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " RX[1] ,Receive endpoint 1 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 8. " RX[0] ,Receive endpoint 0 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " TX[4] ,Transmit endpoint 4 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 3. " TX[3] ,Transmit endpoint 3 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " TX[2] ,Transmit endpoint 2 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 1. " TX[1] ,Transmit endpoint 1 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " TX[0] ,Transmit endpoint 0 interrupt source masked" "No interrupt,Interrupt" else group.long 0x20++0x3 line.long 0x0 "INTSRCR,USB Interrupt Source Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF start interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Reset Signaling detection" "No interrupt,Interrupt" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detection interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detection interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt" "No interrupt,Interrupt" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt" "No interrupt,Interrupt" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt" "No interrupt,Interrupt" group.long 0x2c++0x3 line.long 0x0 "INTMSKR,USB Interrupt Mask Register" setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF started interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Reset Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detected interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detected interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked" setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked" rgroup.long 0x38++0x3 line.long 0x0 "INTMASKEDR,USB Interrupt Source Masked Register" bitfld.long 0x0 24. " USB[8] ,DRVVBUS level change interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 23. " USB[7] ,VBus voltage < VBus Valid Threshold (VBus error) interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 22. " USB[6] ,SRP detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 19. " USB[3] ,SOF started interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 18. " USB[2] ,Reset Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 17. " USB[1] ,Resume signaling detected interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 16. " USB[0] ,Suspend Signaling detected interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 12. " RX[4] ,Receive endpoint 4 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 11. " RX[3] ,Receive endpoint 3 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 10. " RX[2] ,Receive endpoint 2 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 9. " RX[1] ,Receive endpoint 1 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 8. " RX[0] ,Receive endpoint 0 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 4. " TX[4] ,Transmit endpoint 4 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 3. " TX[3] ,Transmit endpoint 3 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 2. " TX[2] ,Transmit endpoint 2 interrupt source masked" "No interrupt,Interrupt" bitfld.long 0x0 1. " TX[1] ,Transmit endpoint 1 interrupt source masked" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " TX[0] ,Transmit endpoint 0 interrupt source masked" "No interrupt,Interrupt" endif group.long 0x3c++0x3 line.long 0x0 "EOIR,USB End of Interrupt Register" hexmask.long.byte 0x0 0.--7. 1. " VECTOR ,End of Interrupt Vector" rgroup.long 0x40++0x3 line.long 0x0 "INTVECTR,USB Interrupt Vector Register" group.long 0x80++0xb line.long 0x0 "TCPPICR,Transmit CPPI Control Register" bitfld.long 0x0 0. " TCPPI_ENABLE ,Transmit CPPI Enable" "Disabled,Enabled" line.long 0x4 "TCPPITDR,Transmit CPPI Teardown Register" bitfld.long 0x4 31. " READY ,Teardown register writable" "Disabled,Enabled" bitfld.long 0x4 0.--1. " CHANNEL ,Teardown Channel" "0,1,2,3" sif (cpu()=="DM357") line.long 0x8 "CPPIEOIR,CPPI DMA End of Interrupt Register" else line.long 0x8 "TCPPIEOIR,Transmit CPPI DMA Controller End of Interrupt Register" endif hexmask.long.byte 0x8 0.--7. 1. " VECTOR ,End of Interrupt Vector" rgroup.long 0x8c++0x7 line.long 0x0 "TCPPIIVECTR,Transmit CPPI DMA Controller Interrupt Vector Register" line.long 0x4 "TCPPIMSKSR,Transmit CPPI Masked Status Register" bitfld.long 0x4 3. " MASKEDCOMP_PENDING3 ,Channel 3 Masked High Priority Transmit Completion Pending" "Not pending,Pending" bitfld.long 0x4 2. " MASKEDCOMP_PENDING2 ,Channel 2 Masked High Priority Transmit Completion Pending" "Not pending,Pending" textline " " bitfld.long 0x4 1. " MASKEDCOMP_PENDING1 ,Channel 1 Masked High Priority Transmit Completion Pending" "Not pending,Pending" bitfld.long 0x4 0. " MASKEDCOMP_PENDING0 ,Channel 0 Masked High Priority Transmit Completion Pending" "Not pending,Pending" group.long 0x94++0x3 line.long 0x0 "TCPPIRAWSR,Transmit CPPI Raw Status Register" setclrfld.long 0x0 3. 0x4 3. 0x8 3. " COMP_PENDING[3]_set/clr ,Channel 3 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 2. 0x4 2. 0x8 2. " COMP_PENDING[2]_set/clr ,Channel 2 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 1. 0x4 1. 0x8 1. " COMP_PENDING[1]_set/clr ,Channel 1 High Priority Transmit Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x0 0. 0x4 0. 0x8 0. " COMP_PENDING[0]_set/clr ,Channel 0 High Priority Transmit Completion Pending" "Not pending,Pending" group.long 0xc0++0x3 line.long 0x0 "RCPPICR,Receive CPPI Control Register" bitfld.long 0x0 0. " RCPPI_ENABLE ,Receive CPPI Enable" "Disabled,Enabled" rgroup.long 0xd0++0x7 line.long 0x0 "RCPPIMSKSR,Receive CPPI Masked Status Register" bitfld.long 0x0 3. " MASKED_COMP_PENDING3 ,Channel 3 Masked Receive Completion Pending" "Not pending,Pending" bitfld.long 0x0 2. " MASKED_COMP_PENDING2 ,Channel 2 Masked Receive Completion Pending" "Not pending,Pending" textline " " bitfld.long 0x0 1. " MASKED_COMP_PENDING1 ,Channel 1 Masked Receive Completion Pending" "Not pending,Pending" bitfld.long 0x0 0. " MASKED_COMP_PENDING0 ,Channel 0 Masked Receive Completion Pending" "Not pending,Pending" group.long 0xd4++0x03 line.long 0x00 "RCPPIRAWSR,Receive CPPI Raw Status Register" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " COMP_PENDING[3]_set/clr ,Channel 3 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " COMP_PENDING[2]_set/clr ,Channel 2 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " COMP_PENDING[1]_set/clr ,Channel 1 Raw Receive Completion Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 0. 0x04 0. 0x08 0. " COMP_PENDING[0]_set/clr ,Channel 0 Raw Receive Completion Pending" "Not pending,Pending" group.long 0xe0++0xf line.long 0x0 "RBUFCNT0,Receive Buffer Count 0 Register" hexmask.long.word 0x0 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 0" line.long 0x4 "RBUFCNT1,Receive Buffer Count 1 Register" hexmask.long.word 0x4 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 1" line.long 0x8 "RBUFCNT2,Receive Buffer Count 2 Register" hexmask.long.word 0x8 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 2" line.long 0xC "RBUFCNT3,Receive Buffer Count 3 Register" hexmask.long.word 0xC 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 3" width 17. tree "Transmit/Receive CPPI Channel 0 State Block" group.long 0x100++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x100+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x100+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 1 State Block" group.long 0x140++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x140+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x140+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 2 State Block" group.long 0x180++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x180+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x180+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end tree "Transmit/Receive CPPI Channel 3 State Block" group.long 0x1C0++0x17 line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0" hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer" textline " " bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1" hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2" hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" textline " " bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not occurred,Occurred" line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3" line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4" hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message" textline " " bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP" textline " " bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP" textline " " hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5" hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length" textline " " hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length" sif (cpu()=="DM357") hgroup.long (0x1C0+0x18)++0x3 hide.long 0x00 "TCPPIDMASTATEW6,TX CPPI DMA State Word 6" endif group.long (0x1C0+0x1c)++0x23 line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer" hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback" line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0" hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset" line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1" hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer" line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2" hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer" textline " " bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet" line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3" hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer" line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4" line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5" hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length" textline " " hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length" line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6" hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length" textline " " hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length" line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer" hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address" textline " " bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback" tree.end width 10. tree "Common USB Registers" group.byte 0x400++0x0 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. " FUNCADDR ,7_bit address of the peripheral part of the transaction" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte 0x401++0x0 line.byte 0x0 "POWER,Power Management Register" textline " " bitfld.byte 0x0 5. " HSEN ,High-speed mode negotiation enable" "Disabled,Enabled" bitfld.byte 0x0 4. " HSMODE ,High-speed mode" "Full speed,High speed" textline " " bitfld.byte 0x0 3. " RESET ,Reset" "No reset,Reset" bitfld.byte 0x0 2. " RESUME ,Resume in suspend mode" "No resume,Resume" textline " " bitfld.byte 0x0 1. " SUSPENDM ,Suspend mode" "Disabled,Enabled" bitfld.byte 0x0 0. " ENSUSPM ,SUSPENDM output enable" "Disabled,Enabled" else group.byte 0x401++0x0 line.byte 0x0 "POWER,Power Management Register" bitfld.byte 0x0 7. " ISOUPDATE ,Waiting for SOF token" "Not wait,Wait" bitfld.byte 0x0 6. " SOFTCONN ,Soft Connect/Disconnect feature enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 5. " HSEN ,High-speed mode negotiation enable" "Disabled,Enabled" bitfld.byte 0x0 4. " HSMODE ,High-speed mode" "Full speed,High speed" textline " " bitfld.byte 0x0 3. " RESET ,Reset" "No reset,Reset" bitfld.byte 0x0 2. " RESUME ,Resume in suspend mode" "No resume,Resume" textline " " bitfld.byte 0x0 1. " SUSPENDM ,Suspend mode" "Disabled,Enabled" bitfld.byte 0x0 0. " ENSUSPM ,SUSPENDM output enable" "Disabled,Enabled" endif rgroup.word 0x402++0x3 line.word 0x0 "INTRTX,Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 4" bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active" line.word 0x2 "INTRRX,Interrupt Register for Receive Endpoints 1 to 4" bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active" group.word 0x406++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Register for INTRTX" bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active" textline " " bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active" line.word 0x2 "INTRRXE,Interrupt Enable Register for INTRRX" bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active" bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active" textline " " bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active" bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active" hgroup.byte 0x40a++0x0 hide.byte 0x0 "INTRUSB,Interrupt Register for Common USB Interrupts" in group.byte 0x40b++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Register for INTRUSB" bitfld.byte 0x0 7. " VBUSERR ,Vbus error interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 6. " SESSREQ ,Session request interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 5. " DISCON ,Disconnect interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 4. " CONN ,Connect interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 3. " SOF ,Start of frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 2. " RESET_BABBLE ,Reset interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 1. " RESUME ,Resume interrupt enable" "Disabled,Enabled" bitfld.byte 0x0 0. " SUSPEND ,Suspend interrupt enable" "Disabled,Enabled" rgroup.word 0x40c++0x1 line.word 0x0 "FRAME,Frame Number Register" hexmask.word 0x0 0.--10. 1. " FRAMENUMBER ,Last received frame number" group.byte 0x40e++0x1 line.byte 0x0 "INDEX,Index Register for Selecting the Endpoint Status and Control Registers" bitfld.byte 0x0 0.--3. " EPSEL ,Endpoint control/status register select" "EP 0,EP 1,EP 2,EP 3,EP 4,?..." line.byte 0x1 "TESTMODE,Register to Enable the USB 2.0 Test Modes" bitfld.byte 0x1 7. " FORCE_HOST ,Force Host mode" "Normal,Host" bitfld.byte 0x1 6. " FIFO_ACCESS ,Transfer packet EP0 Tx FIFO to EP0 Receive FIFO" "Not transferred,Transferred" textline " " bitfld.byte 0x1 5. " FORCE_FS ,Force full-speed mode" "Normal,Full speed" bitfld.byte 0x1 4. " FORCE_HS ,Force high-speed mode" "Normal,High speed" textline " " bitfld.byte 0x1 3. " TEST_PACKET ,Test_Packet test mode" "Normal,Test_Packet" bitfld.byte 0x1 2. " TEST_K ,Test_K test mode" "Normal,Test_K" textline " " bitfld.byte 0x1 1. " TEST_J ,Test_J test mode" "Normal,Test_J" bitfld.byte 0x1 0. " TEST_SE0_NAK ,Test_SE0_NAK test mode" "Normal,Test_SE0_NAK" tree.end width 17. tree "Indexed Registers" if ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0)) group.word 0x412++0x1 line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode" bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High" textline " " bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "Not flushed,Flushed" bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continued,Halted" textline " " bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "Not performed,Performed" bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested" textline " " bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error" bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "OUT,SETUP" textline " " bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received" bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" group.byte 0x41a++0x0 line.byte 0x00 "HOST_TYPE0,Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" group.byte 0x41b++0x0 line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register" bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." rgroup.byte 0x41f++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0)) group.word 0x412++0x1 line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode" bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared" textline " " bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared" bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated" textline " " bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended" bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended" textline " " bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" rgroup.byte 0x41f++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4))))) group.word 0x410++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word 0x412++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word 0x414++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word 0x416++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word 0x418++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte 0x41a++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte 0x41b++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte 0x41c++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte 0x41d++0x0 line.byte 0x00 "HOST_RXINTERVAL,Recieve Interval Register" elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4))))) group.word 0x410++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word 0x412++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word 0x414++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word 0x416++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" else group 0x00++0x0 textline " " textline " " textline " " textline " " textline " " textline " " textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register" endif tree.end width 12. tree "FIFOx" hgroup.long 0x420++0x3 hide.long 0x00 "FIFO0,Transmit and Receive FIFO Register for Endpoint 0" in hgroup.long 0x424++0x3 hide.long 0x0 "FIFO1,Transmit and Receive FIFO Register for Endpoint 1" in hgroup.long 0x428++0x3 hide.long 0x0 "FIFO2,Transmit and Receive FIFO Register for Endpoint 2" in hgroup.long 0x42c++0x3 hide.long 0x0 "FIFO3,Transmit and Receive FIFO Register for Endpoint 3" in hgroup.long 0x430++0x3 hide.long 0x0 "FIFO4,Transmit and Receive FIFO Register for Endpoint 4" in tree.end width 12. if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte 0x460++0x0 "OTG Device Control" line.byte 0x00 "DEVCTL,OTG Device Control Register" bitfld.byte 0x00 7. " BDEVICE ,USB controller is operating as the 'A' device or the 'B'" "A device,B device" bitfld.byte 0x00 6. " FSDEV ,Full speed or high speed detected" "Not detected,Detected" textline " " bitfld.byte 0x00 5. " LSDEV ,Low speed detected" "Not detected,Detected" bitfld.byte 0x00 3.--4. " VBUS ,Current VBus level" "Below Session End,Above Session End,Above AValid,Above VBusValid" textline " " bitfld.byte 0x00 2. " HOSTMODE ,USB controller is acting as a Host" "Peripheral,Host" bitfld.byte 0x00 1. " HOSTREQ ,Host Negotiation initiated" "Not initiated,Initiated" textline " " bitfld.byte 0x00 0. " SESSION ,Session start" "Ended,Started" else group.byte 0x460++0x0 "OTG Device Control" line.byte 0x00 "DEVCTL,OTG Device Control Register" bitfld.byte 0x00 7. " BDEVICE ,USB controller is operating as the 'A' device or the 'B'" "A device,B device" textline " " bitfld.byte 0x00 3.--4. " VBUS ,Current VBus level" "Below Session End,Above Session End,Above AValid,Above VBusValid" textline " " bitfld.byte 0x00 2. " HOSTMODE ,USB controller is acting as a Host" "Peripheral,Host" bitfld.byte 0x00 1. " HOSTREQ ,Host Negotiation initiated" "Not initiated,Initiated" textline " " bitfld.byte 0x00 0. " SESSION ,Session start" "Ended,Started" endif if (((data.byte(asd:0x01c64000+0x462))&(0x10))==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x462++0x0 "Dynamic FIFO Control" line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144" elif (((data.byte(asd:0x01c64000+0x462))&(0x10))==0x10)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x462++0x0 "Dynamic FIFO Control" line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288" else hgroup.byte 0x462++0x0 "Dynamic FIFO Control" hide.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size" endif if (((data.byte(asd:0x01c64000+0x463))&0x10)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x463++0x0 line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144" elif (((data.byte(asd:0x01c64000+0x463))&0x10)==0x10)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.byte 0x463++0x0 line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double" bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288" else hgroup.byte 0x463++0x0 hide.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size" endif if ((((d.b((asd:0x01c64000+0x40e)))&0xf)==((0x1)||(0x2)||(0x3)||(0x4)))) group.word 0x464++0x3 line.word 0x00 "TXFIFOADDR,Transmit Endpoint FIFO Address" hexmask.word 0x00 0.--12. 1. " ADDR ,Start address of endpoint FIFO" line.word 0x02 "RXFIFOADDR,Receive Endpoint FIFO Address" hexmask.word 0x02 0.--12. 1. " ADDR ,Start address of endpoint FIFO" else hgroup.word 0x464++0x3 hide.word 0x00 "TXFIFOADDR,Transmit Endpoint FIFO Address" hide.word 0x02 "RXFIFOADDR,Receive Endpoint FIFO Address" endif width 12. tree "Target Endpoint 0 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x480)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x480+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x480+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x480)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x480+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x480+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 1 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x488)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x488+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x488+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x488)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x488+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x488+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 2 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x490)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x490+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x490+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x490)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x490+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x490+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 3 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x498)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x498+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x498+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x498)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x498+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x498+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end tree "Target Endpoint 4 Control Registers" if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4) group.byte (0x4A0)++0x0 line.byte 0x00 "TXFUNCADDR,Transmit Function Address" hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x4A0+0x2)++0x2 line.byte 0x0 "TXHUBADDR,Transmit Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "TXHUBPORT,Transmit Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" line.byte 0x02 "RXFUNCADDR,Receive Function Address" hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function" group.byte (0x4A0+0x6)++0x1 line.byte 0x0 "RXHUBADDR,Receive Hub Address" bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple" hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub" line.byte 0x01 "RXHUBPORT,Receive Hub Port" hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub" else hgroup.byte (0x4A0)++0x0 hide.byte 0x00 "TXFUNCADDR,Transmit Function Address" hgroup.byte (0x4A0+0x2)++0x2 hide.byte 0x00 "TXHUBADDR,Transmit Hub Address" hide.byte 0x01 "TXHUBPORT,Transmit Hub Port" hide.byte 0x02 "RXFUNCADDR,Receive Function Address" hgroup.byte (0x4A0+0x6)++0x1 hide.byte 0x00 "RXHUBADDR,Receive Hub Address" hide.byte 0x01 "RXHUBPORT,Receive Hub Port" endif tree.end width 17. tree "Control and Status Registers for Endpoint 0" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x500+0x2)++0x1 line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode" bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High" textline " " bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "Not flushed,Flushed" bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continued,Halted" textline " " bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "Not performed,Performed" bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested" textline " " bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error" bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "OUT,SETUP" textline " " bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received" bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x500+0x8)++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" group.byte (0x500+0xa)++0x0 line.byte 0x00 "HOST_TYPE0,Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" group.byte (0x500+0xb)++0x0 line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register" bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." rgroup.byte (0x500+0xf)++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" else group.word (0x500+0x2)++0x1 line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode" bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared" textline " " bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared" bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated" textline " " bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended" bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended" textline " " bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received" rgroup.word (0x500+0x8)++0x1 line.word 0x00 "COUNT0,Count 0 Register" hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO" rgroup.byte (0x500+0xf)++0x0 line.byte 0x00 "CONFIGDATA,Configuration Data Register" bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected" bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected" textline " " bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian" bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected" textline " " bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected" bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected" textline " " bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected" bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits" endif tree.end tree "Control and Status Registers for Endpoint 1" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x510)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x510+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x510+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x510+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x510+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x510+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x510+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x510+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x510+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x510)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x510+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x510+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x510+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 2" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x520)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x520+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x520+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x520+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x520+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x520+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x520+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x520+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x520+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x520)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x520+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x520+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x520+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 3" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x530)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x530+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x530+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x530+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x530+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x530+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x530+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x530+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x530+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x530)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x530+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x530+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x530+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end tree "Control and Status Registers for Endpoint 4" if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)) group.word (0x540)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x540+0x2)++0x1 line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" endif textline " " bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled" bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continued,Halted" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" textline " " bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received" bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "OUT,SETUP" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x540+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x540+0x6)++0x1 line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint" bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested" bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" textline " " sif (cpu()=="DM357") bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " endif bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled" bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset" textline " " bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received" bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" textline " " bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " ERROR ,No data packet received" "No error,Error" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" rgroup.word (0x540+0x8)++0x1 line.word 0x00 "RXCOUNT,Receive Count Register" hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO" group.byte (0x540+0xa)++0x0 line.byte 0x00 "HOST_TXTYPE,Transmit Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x540+0xb)++0x0 line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register" group.byte (0x540+0xc)++0x0 line.byte 0x00 "HOST_RXTYPE,Receive Type Register" bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low" bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt" textline " " bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..." group.byte (0x540+0xd)++0x0 line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register" else group.word (0x540)++0x1 line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction" group.word (0x540+0x2)++0x1 line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint" bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled" bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled" bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "Not forced,Forced" textline " " sif (cpu()=="DM357") bitfld.word 0x00 10. " DMAMODE ,DMA mode" "Int. for each packet,Error int." textline " " bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1" bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued" textline " " bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received" textline " " bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty" bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded" group.word (0x540+0x4)++0x1 line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint" hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint" group.word (0x540+0x6)++0x1 line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint" bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled" bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled" textline " " sif (cpu()=="DM357") bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 11. " DMAMODE ,DMA Mode" "0,1" textline " " bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" else bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "No,Yes" bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset" endif textline " " bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted" bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued" textline " " bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "Not flushed,Flushed" bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error" textline " " bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun" bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full" textline " " bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received" endif tree.end width 0xb tree.end tree.open "VPSS (Video Processing Subsystem)" tree.open "VPFE (Video Processing Front End)" tree "CCDC (CCD Controller)" base asd:0x01C70400 width 12. rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral revision and class information" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class identification" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral revision number" group.long 0x04++0x3b line.long 0x00 "PCR,Peripheral control register" bitfld.long 0x00 1. " BUSY ,CCD controller busy" "Not busy,Busy" bitfld.long 0x00 0. " ENABLE ,CCD controller enable" "Disabled,Enabled" line.long 0x04 "SYN_MODE,SYNC and mode set register" bitfld.long 0x04 19. " SDR2RSZ ,SDRAM output data is forwarded to the resizer input port" "Disabled,Enabled" bitfld.long 0x04 18. " VP2SDR ,Video port output into the SDRAM port Controls" "Disabled,Enabled" textline " " bitfld.long 0x04 17. " WEN ,Data Write Enable" "Disabled,Enabled" bitfld.long 0x04 16. " VDHDEN ,VD/HD Enable If VD/HD are defined as output" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " FLDSTAT ,Field Status" "Odd,Even" bitfld.long 0x04 14. " LPF ,Message Buffer Status Interrupt Line" "Off,On" textline " " bitfld.long 0x04 12.--13. " INPMOD ,Data input mode" "CCD RAW,YCbCr 16-bit,YCbCr 8-bit,?..." bitfld.long 0x04 11. " PACK8 ,Pack to 8-bits/pixel" "16 bits/pixel,8 bits/pixel" textline " " bitfld.long 0x04 8.--10. " DATSIZ ,CCD Data Width" "16-bits,15-bits,14-bits,13-bits,12-bits,11-bits,10-bits,8-bits" bitfld.long 0x04 7. " FLDMODE ,Sensor Field Mode" "Non-interlaced,Interlaced" textline " " bitfld.long 0x04 6. " DATAPOL ,CCD Data Polarity" "Normal,One's complement" bitfld.long 0x04 5. " EXWEN ,External WEN Selection" "Not used,Used" textline " " bitfld.long 0x04 4. " FLDPOL ,Field Indicator Polarity" "Positive,Negative" bitfld.long 0x04 3. " HDPOL ,HD Sync Polarity" "Positive,Negative" textline " " bitfld.long 0x04 2. " VDPOL ,VD Sync Polarity" "Positive,Negative" bitfld.long 0x04 1. " FLDOUT ,Field ID Direction" "Input,Output" textline " " bitfld.long 0x04 0. " VDHOUT ,VD/HD Sync Direction" "Input,Output" width 12. line.long 0x08 "HD_VD_WID,HD and VD signal width register" hexmask.long.word 0x08 16.--27. 1. " HDW ,Width of HD sync pulse" hexmask.long.word 0x08 0.--11. 1. " VDW ,Width of VD sync pulse" line.long 0x0c "PIX_LINES,Number of pixels in a horizontal line and number of lines in a frame register" hexmask.long.word 0x0c 16.--31. 1. " PPLN ,Pixels per line" hexmask.long.word 0x0c 0.--15. 1. " HLPFR ,Half lines per field or frame" line.long 0x10 "HORZ_INFO,Horizontal pixel information register" hexmask.long.word 0x10 16.--30. 1. " SPH ,Start pixel" hexmask.long.word 0x10 0.--14. 1. " NPH ,Number of pixels" line.long 0x14 "VERT_START,Vertical line - settings for the starting pixel register" hexmask.long.word 0x14 16.--30. 1. " SLV0 ,Start Line, Vertical (Field 0)" hexmask.long.word 0x14 0.--14. 1. " SLV1 ,Start Line, Vertical (Field 1)" line.long 0x18 "VERT_LINES,Number of vertical lines register Section" hexmask.long.word 0x18 0.--14. 1. " NLV ,Number of vertical lines that will be output to SDRAM" line.long 0x1c "CULLING,Culling information in horizontal and vertical directions register" bitfld.long 0x1c 31. " CULHEVN7 ,Horizontal Culling Pattern for Even Line 8th Pixel" "Culling,Retain" bitfld.long 0x1c 30. " CULHEVN6 ,Horizontal Culling Pattern for Even Line 7th Pixel" "Culling,Retain" bitfld.long 0x1c 29. " CULHEVN5 ,Horizontal Culling Pattern for Even Line 6th Pixel" "Culling,Retain" textline " " bitfld.long 0x1c 28. " CULHEVN4 ,Horizontal Culling Pattern for Even Line 5th Pixel" "Culling,Retain" bitfld.long 0x1c 27. " CULHEVN3 ,Horizontal Culling Pattern for Even Line 4th Pixel" "Culling,Retain" bitfld.long 0x1c 26. " CULHEVN2 ,Horizontal Culling Pattern for Even Line 3rd Pixel" "Culling,Retain" textline " " bitfld.long 0x1c 25. " CULHEVN1 ,Horizontal Culling Pattern for Even Line 2nd Pixel" "Culling,Retain" bitfld.long 0x1c 24. " CULHEVN0 ,Horizontal Culling Pattern for Even Line 1st Pixel" "Culling,Retain" bitfld.long 0x1c 23. " CULHODD7 ,Horizontal Culling Pattern for Odd Line 8th Pixel" "Culling,Retain" textline " " bitfld.long 0x1c 22. " CULHODD6 ,Horizontal Culling Pattern for Odd Line 7th Pixel" "Culling,Retain" bitfld.long 0x1c 21. " CULHODD5 ,Horizontal Culling Pattern for Odd Line 6th Pixel" "Culling,Retain" bitfld.long 0x1c 20. " CULHODD4 ,Horizontal Culling Pattern for Odd Line 5th Pixel" "Culling,Retain" textline " " bitfld.long 0x1c 19. " CULHODD3 ,Horizontal Culling Pattern for Odd Line 4th Pixel" "Culling,Retain" bitfld.long 0x1c 18. " CULHODD2 ,Horizontal Culling Pattern for Odd Line 3rd Pixel" "Culling,Retain" bitfld.long 0x1c 17. " CULHODD1 ,Horizontal Culling Pattern for Odd Line 2nd Pixel" "Culling,Retain" textline " " bitfld.long 0x1c 16. " CULHODD0 ,Horizontal Culling Pattern for Odd Line 1st Pixel" "Culling,Retain" bitfld.long 0x1c 7. " CULV7 ,Vertical Culling Pattern for 8th Line" "Culling,Retain" bitfld.long 0x1c 6. " CULV6 ,Vertical Culling Pattern for 7th Line" "Culling,Retain" textline " " bitfld.long 0x1c 5. " CULV5 ,Vertical Culling Pattern for 6th Line" "Culling,Retain" bitfld.long 0x1c 4. " CULV4 ,Vertical Culling Pattern for 5th Line" "Culling,Retain" bitfld.long 0x1c 3. " CULV3 ,Vertical Culling Pattern for 4th Line" "Culling,Retain" textline " " bitfld.long 0x1c 2. " CULV2 ,Vertical Culling Pattern for 3rd Line" "Culling,Retain" bitfld.long 0x1c 1. " CULV1 ,Vertical Culling Pattern for 2nd Line" "Culling,Retain" bitfld.long 0x1c 0. " CULV0 ,Vertical Culling Pattern for 1st Line" "Culling,Retain" line.long 0x20 "HSIZE_OFF,Horizontal size register" hexmask.long.word 0x20 0.--15. 1. " LNOFST ,Address offset for each line" line.long 0x24 "SDOFST,SDRAM/DDRAM line offset register" bitfld.long 0x24 14. " FIINV ,Field identification signal inverse" "Not inversed,Inversed" bitfld.long 0x24 12.--13. " FOFST ,Field offset by number of lines ID = 1" "+1 line,+2 lines,+3 lines,+4 lines" bitfld.long 0x24 9.--11. " LOFTS0 ,Line offset values of even line and even field ID = 0" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines" textline " " bitfld.long 0x24 6.--8. " LOFTS1 ,Line offset values of odd line and even field ID = 0" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines" bitfld.long 0x24 3.--5. " LOFTS2 ,Line offset values of even line and odd field ID = 1" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines" bitfld.long 0x24 0.--2. " LOFTS3 ,Line offset values of odd line and odd field ID = 1" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines" line.long 0x28 "SDR_ADDR,SDRAM address register" line.long 0x2c "CLAMP,Optical black clamping settings register" bitfld.long 0x2c 31. " CLAMPEN ,Clamp Enable" "Disabled,Enabled" bitfld.long 0x2c 28.--30. " OBSLEN ,Optical Black Sample Length" "1 pixel,2 pixels,4 pixels,8 pixels,16 pixels,?..." bitfld.long 0x2c 25.--27. " OBSLN ,Optical Black Sample Lines" "1 line,2 lines,4 lines,8 lines,16 lines,?..." textline " " hexmask.long.word 0x2c 10.--24. 1. " OBST ,Start Pixel of Optical Black Samples" bitfld.long 0x2c 0.--4. " OBGAIN ,Gain to apply to the optical black average" "U5Q4,U5Q4,U5Q4,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "DCSUB,DC clamp register" hexmask.long.word 0x30 0.--13. 1. " DCSUB ,DC level to subtract from CCD data" width 12. line.long 0x34 "COLPTN,CCD color pattern register" bitfld.long 0x34 30.--31. " CP3LPC3 ,Color Pattern for 3rd Line Pixel counter = 3" "R,Gr,Gb,B" bitfld.long 0x34 28.--29. " CP3LPC2 ,Color Pattern for 3rd Line Pixel counter = 2" "R,Gr,Gb,B" bitfld.long 0x34 26.--27. " CP3LPC1 ,Color Pattern for 3rd Line Pixel counter = 1" "R,Gr,Gb,B" bitfld.long 0x34 24.--25. " CP3LPC0 ,Color Pattern for 3rd Line Pixel counter = 0" "R,Gr,Gb,B" textline " " bitfld.long 0x34 22.--23. " CP2LPC3 ,Color Pattern for 2nd Line Pixel counter = 3" "R,Gr,Gb,B" bitfld.long 0x34 20.--21. " CP2LPC2 ,Color Pattern for 2nd Line Pixel counter = 2" "R,Gr,Gb,B" bitfld.long 0x34 18.--19. " CP2LPC1 ,Color Pattern for 2nd Line Pixel counter = 1" "R,Gr,Gb,B" bitfld.long 0x34 16.--17. " CP2LPC0 ,Color Pattern for 2nd Line Pixel counter = 0" "R,Gr,Gb,B" textline " " bitfld.long 0x34 14.--15. " CP1LPC3 ,Color Pattern for 1st Line Pixel counter = 3" "R,Gr,Gb,B" bitfld.long 0x34 12.--13. " CP1LPC2 ,Color Pattern for 1st Line Pixel counter = 2" "R,Gr,Gb,B" bitfld.long 0x34 10.--11. " CP1LPC1 ,Color Pattern for 1st Line Pixel counter = 1" "R,Gr,Gb,B" bitfld.long 0x34 8.--9. " CP1LPC0 ,Color Pattern for 1st Line Pixel counter = 0" "R,Gr,Gb,B" textline " " bitfld.long 0x34 6.--7. " CP0LPC3 ,Color Pattern for 0th Line Pixel counter = 3" "R,Gr,Gb,B" bitfld.long 0x34 4.--5. " CP0LPC2 ,Color Pattern for 0th Line Pixel counter = 2" "R,Gr,Gb,B" bitfld.long 0x34 2.--3. " CP0LPC1 ,Color Pattern for 0th Line Pixel counter = 1" "R,Gr,Gb,B" bitfld.long 0x34 0.--1. " CP0LPC0 ,Color Pattern for 0th Line Pixel counter = 0" "R,Gr,Gb,B" width 12. line.long 0x38 "BLKCMP,Black compensation register" hexmask.long.byte 0x38 24.--31. 1. " R ,Black level compensation for R pixels" hexmask.long.byte 0x38 16.--23. 1. " GR ,Black level compensation for Gr pixels" hexmask.long.byte 0x38 8.--15. 1. " GB ,Black level compensation for Gb pixels" textline " " hexmask.long.byte 0x38 0.--7. 1. " B ,Black level compensation for B pixels" group.long 0x40++0x07 line.long 0x00 "FPC,Fault Pixel Correction Register" eventfld.long 0x00 16. " FPERR ,Fault pixel correction error" "No error,Error" bitfld.long 0x00 15. " FPCEN ,Fault pixel correction enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--14. 1. " FPNUM ,Number of fault pixels to be corrected in the frame" line.long 0x04 "FPC_ADDR,Fault Pixel Correction SDRAM Address Register" group.long 0x48++0x1b line.long 0x00 "VDINT,VD interrupt timing register" hexmask.long.word 0x00 16.--30. 1. " VDINT0 ,VD0 interrupt timing" hexmask.long.word 0x00 0.--14. 1. " VDINT1 ,VD1 interrupt timing" line.long 0x04 "ALAW,A-law setting register" bitfld.long 0x04 3. " CCDTBL ,Apply Gamma (A-LAW) to CCDC data saved to SDRAM" "Disabled,Enabled" bitfld.long 0x04 0.--2. " GWID ,Gamma Width Input (A-LAW table)" "Bits 15-6,Bits 14-5,Bits 13-4,Bits 12-3,Bits 11-2,Bits 10-1,Bits 9-0,?..." line.long 0x08 "REC656IF,REC656 interface register" bitfld.long 0x08 1. " ECCFVH ,FVH Error Correction Enable" "Disabled,Enabled" bitfld.long 0x08 0. " R656ON ,REC656 Interface Enable" "Disabled,Enabled" line.long 0x0c "CCDCFG,CCD configuration register" bitfld.long 0x0c 15. " VDLC ,Enable latching function registers on internal VSYNC" "Not latched,Latched" bitfld.long 0x0c 13. " MSBINVI ,MSB of Chroma input signal stored to SDRAM invertet" "Normal,Inverted" bitfld.long 0x0c 12. " BSWD ,Byte Swap Data stored to SDRAM" "Normal,Swapped" textline " " bitfld.long 0x0c 11. " Y8POS ,Location of Y signal when YCbCr 8bit data is input" "Even pixel,Odd pixel" bitfld.long 0x0c 8. " WENLOG ,Specifies CCD valid area" "ANDed,ORed" bitfld.long 0x0c 6.--7. " FIDMD ,Setting of FID detection function" "VSYNC,Not latched,VD edge,VD and HD phase" textline " " bitfld.long 0x0c 5. " BW656 ,Data width in CCIR656 input mode" "8 bits,10 bits" bitfld.long 0x0c 4. " YCINSWP ,Y input (YIN[7:0]) and C input (CIN[7:0]) are swapped" "C signal,Y signal" line.long 0x10 "FMTCFG,Data reformatter/video port configuration register" bitfld.long 0x10 16.--18. " VPIF_FRQ ,Video port data ready frequency" "75 MHz,42.8 MHz,33.3 MHz,27.2 MHz,23 MHz,?..." bitfld.long 0x10 15. " VPEN ,Video port enable" "Disabled,Enabled" bitfld.long 0x10 12.--14. " VPIN ,Video port input select" "Bits 15-6,Bits 14-5,Bits 13-4,Bits 12-3,Bits 11-2,Bits 10-1,Bits 9-0,?..." line.long 0x14 "FMT_HORZ,Data reformatter/video input interface horizontal information register" hexmask.long.word 0x14 16.--28. 1. " FMTSPH ,Start pixel horizontal from start of HD" hexmask.long.word 0x14 0.--12. 1. " FMTLNH ,Number of pixels in horizontal direction" line.long 0x18 "FMT_VERT,Data reformatter/video input interface vertical information register" hexmask.long.word 0x18 16.--28. 1. " FMTSLV ,Start line from start of VD" hexmask.long.word 0x18 0.--12. 1. " FMTLNV ,Number of lines in vertical direction" group.long 0x64++0x33 line.long 0x00 "FMT_ADDR0,Address Pointer 0 Setup" line.long 0x04 "FMT_ADDR1,Address Pointer 1 Setup" line.long 0x08 "FMT_ADDR2,Address Pointer 2 Setup" line.long 0x0c "FMT_ADDR3,Address Pointer 3 Setup" line.long 0x10 "FMT_ADDR4,Address Pointer 4 Setup" line.long 0x14 "FMT_ADDR5,Address Pointer 5 Setup" line.long 0x18 "FMT_ADDR6,Address Pointer 6 Setup" line.long 0x1c "FMT_ADDR7,Address Pointer 7 Setup" line.long 0x20 "PRGEVEN_0,Program Entries 0-7 for Even Line" line.long 0x24 "PRGEVEN_1,Program Entries 8-15 for Even Line" line.long 0x28 "PRGODD_0,Program Entries 0-7 for Odd Line" line.long 0x2c "PRGODD_1,Program Entries 8-15 for Odd Line" line.long 0x30 "VP_OUT,Video port output settings register" hexmask.long.word 0x30 17.--30. 1. " VERT_NUM ,Number of vertical lines to clock out the video port" hexmask.long.word 0x30 4.--16. 1. " HORZ_NUM ,Number of horizontal pixels to clock out the video port" bitfld.long 0x30 0.--3. " HORZ_ST ,Horizontal start pixel in each output line" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0xb tree.end tree "PREV (Preview Engine)" base asd:0x01C70800 width 17. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" group.long 0x04++0x83 line.long 0x00 "PCR,Peripheral Control Register" bitfld.long 0x00 26. " GAMMA_BYPASS ,Gamma table bypass" "Not bypassed,Bypassed" bitfld.long 0x00 22.--24. " SHADE_SFT ,Shading compensation right shift after multiplication" "Disabled,Enabled,?..." textline " " bitfld.long 0x00 20. " SDRPORT ,SDRAM port for the output of preview" "Disabled,Enabled" bitfld.long 0x00 19. " RSZPORT ,Resizer port enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--18. " YCPOS ,YC position" "YCrYCb,YCbYCr,CbYCrY,CrYCbY" bitfld.long 0x00 16. " SUPEN ,Color suppression" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " YNENHEN ,Non-linear enhancer" "Disabled,Enabled" bitfld.long 0x00 10. " CFAEN ,CFA enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " NFEN ,Noise filter" "Disabled,Enabled" bitfld.long 0x00 8. " HMEDEN ,Horizontal median filter" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " DRKFCAP ,Dark frame capture" "Normal,Capture" bitfld.long 0x00 6. " DRKFEN ,Subtract dark frame" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " INVALAW ,Inverse A-law" "Disabled,Enabled" bitfld.long 0x00 4. " WIDTH ,Input data width" "10-bits,8-bits" textline " " bitfld.long 0x00 3. " ONESHOT ,One shot mode" "Continuous,One shot" bitfld.long 0x00 2. " SOURCE ,Input source" "Video port,SDRAM" textline " " bitfld.long 0x00 1. " BUSY ,Preview engine busy" "Not busy,Busy" bitfld.long 0x00 0. " ENABLE ,Preview engine enable" "Disabled,Enabled" line.long 0x04 "HORZ_INFO,Horizontal Information/Setup Register" hexmask.long.word 0x04 16.--29. 1. " SPH ,Start pixel horizontal" hexmask.long.word 0x04 0.--13. 1. " EPH ,End pixel horizontal" line.long 0x08 "VERT_INFO,Vertical Information/Setup Register" hexmask.long.word 0x08 16.--29. 1. " SLV ,Start line vertical" hexmask.long.word 0x08 0.--13. 1. " ELV ,End line vertical" line.long 0x0c "RSDR_ADDR,Read Address From SDRAM Register" hexmask.long 0x0c 0.--31. 1. " RADR ,Read Address" line.long 0x10 "RADR_OFFSET,Line Offset for the Read Data Register" hexmask.long.word 0x10 0.--15. 1. " OFFSET ,Line offset" line.long 0x14 "DSDR_ADDR,Dark Frame Address From SDRAM Register" hexmask.long 0x14 0.--31. 1. " DRKF ,Read Address" line.long 0x18 "DRKF_OFFSET,Line Offset for the Dark Frame Data Register" hexmask.long.word 0x18 0.--15. 1. " OFFSET ,Line offset" line.long 0x1c "WSDR_ADDR,Write Address To SDRAM" hexmask.long 0x1c 0.--31. 1. " ADDR ,Write Address" line.long 0x20 "WADD_OFFSET,Line Offset for the Write Data Register" hexmask.long.word 0x20 0.--15. 1. " OFFSET ,Line offset" line.long 0x24 "AVE,Input Formatter/Averager Register" bitfld.long 0x24 4.--5. " ODDDIST ,Distance between consecutive pixels of same color in the odd line" "1 pixel,2 pixels,3 pixels,4 pixels" bitfld.long 0x24 2.--3. " EVENDIST ,Distance between consecutive pixels of same color in the even line" "1 pixel,2 pixels,3 pixels,4 pixels" textline " " bitfld.long 0x24 0.--1. " COUNT ,Number of horizontal pixels to average" "No average,2 pixels,4 pixels,8 pixels" line.long 0x28 "HMED,Horizontal Median Filter Register" bitfld.long 0x28 9. " ODDDIST ,Distance between consecutive pixels of same color in the odd line" "1 pixel,2 pixels" bitfld.long 0x28 8. " EVENDIST ,Distance between consecutive pixels of same color in the even line" "1 pixel,2 pixels" textline " " hexmask.long.byte 0x28 0.--7. 1. " THRESHOLD ,Horizontal median filter threshold" line.long 0x2c "NF,Noise Filter Register" hexmask.long.byte 0x2c 0.--3. 1. " STRENGTH ,Strength to use for the noise filter" line.long 0x30 "WB_DGAIN,White Balance Digital Gain Register" hexmask.long.word 0x30 0.--9. 1. " DGAIN ,Digital gain for the white balance" line.long 0x34 "WBGAIN,White Balance Coefficients Register" hexmask.long.byte 0x34 24.--31. 1. " COEF3 ,White balance gain - COEF 3" hexmask.long.byte 0x34 16.--23. 1. " COEF2 ,White balance gain - COEF 2" textline " " hexmask.long.byte 0x34 8.--15. 1. " COEF1 ,White balance gain - COEF 1" hexmask.long.byte 0x34 0.--7. 1. " COEF0 ,White balance gain - COEF 0" line.long 0x38 "WBSEL,White Balance Coefficients Selection Register" bitfld.long 0x38 30.--31. " 3_3 ,Coefficient selection for 3rd line, 3rd pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 28.--29. " 3_2 ,Coefficient selection for 3rd line, 2nd pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 26.--27. " 3_1 ,Coefficient selection for 3rd line, 1st pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 24.--25. " 3_0 ,Coefficient selection for 3rd line, 0th pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 22.--23. " 2_3 ,Coefficient selection for 2nd line, 3rd pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 20.--21. " 2_2 ,Coefficient selection for 2nd line, 2nd pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 18.--19. " 2_1 ,Coefficient selection for 2nd line, 1st pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 16.--17. " 2_0 ,Coefficient selection for 2nd line, 0th pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 14.--15. " 1_3 ,Coefficient selection for 1st line, 3rd pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 12.--13. " 1_2 ,Coefficient selection for 1st line, 2nd pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 10.--11. " 1_1 ,Coefficient selection for 1st line, 1st pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 8.--9. " 1_0 ,Coefficient selection for 1st line, 0th pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 6.--7. " 0_3 ,Coefficient selection for 0th line, 3rd pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 4.--5. " 0_2 ,Coefficient selection for 0th line, 2nd pixel" "COEF0,COEF1,COEF2,COEF3" textline " " bitfld.long 0x38 2.--3. " 0_1 ,Coefficient selection for 0th line, 1st pixel" "COEF0,COEF1,COEF2,COEF3" bitfld.long 0x38 0.--1. " 0_0 ,Coefficient selection for 0th line, 0th pixel" "COEF0,COEF1,COEF2,COEF3" line.long 0x3c "CFA,CFA Register" hexmask.long.byte 0x3c 8.--15. 1. " GRADTH_VER ,Gradient threshold vertical" hexmask.long.byte 0x3c 0.--7. 1. " GRADTH_HOR ,Gradient threshold horizontal" line.long 0x40 "BLKADJOFF,Black Adjustment Offset Register" hexmask.long.byte 0x40 16.--23. 1. " R ,Black level offset adjustment for Red in 2's complement format" hexmask.long.byte 0x40 8.--15. 1. " G ,Black level offset adjustment for Green in 2's complement format" textline " " hexmask.long.byte 0x40 0.--7. 1. " B ,Black level offset adjustment for Blue in 2's complement format" line.long 0x44 "RGB_MAT1,RGB2RGB Blending Matrix Coefficients Register" hexmask.long.word 0x44 16.--27. 1. " MTX_GR ,Blending value for GR position" hexmask.long.word 0x44 0.--11. 1. " MTX_RR ,Blending value for RR position" line.long 0x48 "RGB_MAT2,RGB2RGB Blending Matrix Coefficients Register" hexmask.long.word 0x48 16.--27. 1. " MTX_RG ,Blending value for RG position" hexmask.long.word 0x48 0.--11. 1. " MTX_BR ,Blending value for BR position" line.long 0x4c "RGB_MAT3,RGB2RGB Blending Matrix Coefficients Register" hexmask.long.word 0x4c 16.--27. 1. " MTX_BG ,Blending value for BG position" hexmask.long.word 0x4c 0.--11. 1. " MTX_GG ,Blending value for GG position" line.long 0x50 "RGB_MAT4,RGB2RGB Blending Matrix Coefficients Register" hexmask.long.word 0x50 16.--27. 1. " MTX_GB ,Blending value for GB position" hexmask.long.word 0x50 0.--11. 1. " MTX_RB ,Blending value for RB position" line.long 0x54 "RGB_MAT5,RGB2RGB Blending Matrix Coefficients Register" hexmask.long.word 0x54 0.--11. 1. " MTX_BB ,Blending value for BB position" line.long 0x58 "RGB_OFF1,RGB2RGB Blending Matrix Offsets Register" hexmask.long.word 0x58 16.--25. 1. " MTX_OFFR ,Blending Offset value for Red" hexmask.long.word 0x58 0.--9. 1. " MTX_OFFG ,Blending Offset value for Green" line.long 0x5c "RGB_OFF2,RGB2RGB Blending Matrix Offsets Register" hexmask.long.word 0x5c 0.--9. 1. " MTX_OFFB ,Blending Offset value for Blue" line.long 0x60 "CSC0,Color Space Conversion Coefficients Register" hexmask.long.word 0x60 20.--29. 1. " CSCBY ,Color Space Conversion Coefficient of B for computing Y" hexmask.long.word 0x60 10.--19. 1. " CSCGY ,Color Space Conversion Coefficient of G for computing Y" textline " " hexmask.long.word 0x60 0.--9. 1. " CSCRY ,Color Space Conversion Coefficient of R for computing Y" line.long 0x64 "CSC1,Color Space Conversion Coefficients Register" hexmask.long.word 0x64 20.--29. 1. " CSCBCB ,Color Space Conversion Coefficient of B for computing Cb" hexmask.long.word 0x64 10.--19. 1. " CSCGCB ,Color Space Conversion Coefficient of G for computing Cb" textline " " hexmask.long.word 0x64 0.--9. 1. " CSCRCB ,Color Space Conversion Coefficient of R for computing Cb" line.long 0x68 "CSC2,Color Space Conversion Coefficients Register" hexmask.long.word 0x68 20.--29. 1. " CSCBCR ,Color Space Conversion Coefficient of B for computing Cr" hexmask.long.word 0x68 10.--19. 1. " CSCGCR ,Color Space Conversion Coefficient of G for computing Cr" textline " " hexmask.long.word 0x68 0.--9. 1. " CSCRCR ,Color Space Conversion Coefficient of R for computing Cr" line.long 0x6c "CSC_OFFSET,Color Space Conversion Offsets Register" hexmask.long.byte 0x6c 16.--23. 1. " YOFST ,DC Offset value for Y" hexmask.long.byte 0x6c 8.--15. 1. " OFSTCB ,DC Offset value for Cb" textline " " hexmask.long.byte 0x6c 0.--7. 1. " OFSTCR ,DC Offset value for Cr" line.long 0x70 "CNT_BRT,Contrast and Brightness Settings Register" hexmask.long.byte 0x70 8.--15. 1. " CNT ,Contrast Adjustment" hexmask.long.byte 0x70 0.--7. 1. " BRT ,Brightness Adjustment" line.long 0x74 "CSUP,Chrominance Supression Settings Register" bitfld.long 0x74 16. " HPFY ,Use HPF of Luminance for chroma suppression" "Disabled,Enabled" hexmask.long.byte 0x74 8.--15. 1. " CSUPTH ,Chroma Suppression Threshold" textline " " hexmask.long.byte 0x74 0.--7. 1. " CSUPG ,Gain value for Chroma Suppression Function Precision is U8Q8" line.long 0x78 "SETUP_YC,Maximum/Minimum Y and C Settings Register" hexmask.long.byte 0x78 24.--31. 1. " MAXY ,Maximum Y value" hexmask.long.byte 0x78 16.--23. 1. " MINY ,Minimum Y value" textline " " hexmask.long.byte 0x78 8.--15. 1. " MAXC ,Maximum Cb and Cr value" hexmask.long.byte 0x78 0.--7. 1. " MINC ,Minimum Cb and Cr value" line.long 0x7c "SET_TBL_ADDRESS,Setup Table Addresses Register" hexmask.long.word 0x7c 0.--12. 1. " ADDR ,13-bit address" line.long 0x80 "SET_TBL_DATA,Setup Table Data Register" hexmask.long.tbyte 0x80 0.--19. 1. " DATA ,Data to be written" width 0xb tree.end tree "RESZ (Resizer)" base asd:0x01C70C00 base asd:0x01c70c00 width 12. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" group.long 0x04++0xb line.long 0x00 "PCR,Peripheral Control Register" bitfld.long 0x00 1. " BUSY ,Resizer Busy" "Not busy,Busy" bitfld.long 0x00 0. " ENABLE ,Resizer enable" "Disabled,Enabled" line.long 0x04 "RSZ_CNT,Resizer Control Bits" bitfld.long 0x04 29. " CBILIN ,Chrominance horizontal algorithm" "As luminance,Bilinear" bitfld.long 0x04 28. " INPSRC ,Input source" "Preview engine,SDRAM" textline " " bitfld.long 0x04 27. " INPTYP ,Input type" "Color interleaved,Color separate" bitfld.long 0x04 26. " YCPOS ,Luminance and chrominance position in 16-bit word" "YC,CY" textline " " bitfld.long 0x04 23.--25. " VSTPH ,Vertical starting phase" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " HSTPH ,Horizontal starting phase" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x04 10.--19. 1. " VRSZ ,Vertical resizing value" hexmask.long.word 0x04 0.--9. 1. " HRSZ ,Horizontal resizing value" line.long 0x08 "OUT_SIZE,Output Width and Height After Resizing" hexmask.long.word 0x08 16.--26. 1. " VERT ,Output height" hexmask.long.word 0x08 0.--10. 1. " HORZ ,Output width" group.long 0x10++0x17 line.long 0x00 "IN_START,Input Starting Information" hexmask.long.word 0x00 16.--28. 1. " VERT_ST ,Input Starting Information" hexmask.long.word 0x00 0.--12. 1. " HORZ_ST ,Horizontal starting pixel" line.long 0x04 "IN_SIZE,Input Width and Height Before Resizing" hexmask.long.word 0x04 16.--28. 1. " VERT ,Input height" hexmask.long.word 0x04 0.--12. 1. " HORZ ,Input width" line.long 0x08 "SDR_INADD,Input SDRAM Address" hexmask.long 0x08 0.--31. 1. " SDR_INADRR ,Input SDRAM address" line.long 0x0c "SDR_INOFF,SDRAM Offset for the Input Line" hexmask.long.word 0x0c 0.--15. 1. " OFFSET ,Byte offset of each line in the SDRAM address" line.long 0x10 "SDR_OUTADD,Output SDRAM Address" hexmask.long 0x10 0.--31. 1. " SDR_OUTADRR ,Output SDRAM address" line.long 0x14 "SDR_OUTOFF,SDRAM Offset for the Output Line" hexmask.long.word 0x14 0.--15. 1. " OFFSET ,Byte offset of each line in the SDRAM address" group.long 0x28++0x3f "Horizontal Filter Coefficients" line.long 0x0 "HFILT1 0 ,Horizontal Filter Coefficients 1 and 0 " hexmask.long.word 0x0 16.--25. 1. " COEF1 ,Coefficient - Phase 0, tap 1 " hexmask.long.word 0x0 0.--9. 1. " COEF0 ,Coefficient - Phase 0, tap 0 " line.long 0x4 "HFILT3 2 ,Horizontal Filter Coefficients 3 and 2 " hexmask.long.word 0x4 16.--25. 1. " COEF3 ,Coefficient - Phase 0, tap 3 " hexmask.long.word 0x4 0.--9. 1. " COEF2 ,Coefficient - Phase 0, tap 2 " line.long 0x8 "HFILT5 4 ,Horizontal Filter Coefficients 5 and 4 " hexmask.long.word 0x8 16.--25. 1. " COEF5 ,Coefficient - Phase 0, tap 5 " hexmask.long.word 0x8 0.--9. 1. " COEF4 ,Coefficient - Phase 0, tap 4 " line.long 0xC "HFILT7 6 ,Horizontal Filter Coefficients 7 and 6 " hexmask.long.word 0xC 16.--25. 1. " COEF7 ,Coefficient - Phase 0, tap 7 " hexmask.long.word 0xC 0.--9. 1. " COEF6 ,Coefficient - Phase 0, tap 6 " line.long 0x10 "HFILT9 8 ,Horizontal Filter Coefficients 9 and 8 " hexmask.long.word 0x10 16.--25. 1. " COEF9 ,Coefficient - Phase 0, tap 9 " hexmask.long.word 0x10 0.--9. 1. " COEF8 ,Coefficient - Phase 0, tap 8 " line.long 0x14 "HFILT1110,Horizontal Filter Coefficients 11 and 10" hexmask.long.word 0x14 16.--25. 1. " COEF11 ,Coefficient - Phase 0, tap 11" hexmask.long.word 0x14 0.--9. 1. " COEF10 ,Coefficient - Phase 0, tap 10" line.long 0x18 "HFILT1312,Horizontal Filter Coefficients 13 and 12" hexmask.long.word 0x18 16.--25. 1. " COEF13 ,Coefficient - Phase 0, tap 13" hexmask.long.word 0x18 0.--9. 1. " COEF12 ,Coefficient - Phase 0, tap 12" line.long 0x1C "HFILT1514,Horizontal Filter Coefficients 15 and 14" hexmask.long.word 0x1C 16.--25. 1. " COEF15 ,Coefficient - Phase 0, tap 15" hexmask.long.word 0x1C 0.--9. 1. " COEF14 ,Coefficient - Phase 0, tap 14" line.long 0x20 "HFILT1716,Horizontal Filter Coefficients 17 and 16" hexmask.long.word 0x20 16.--25. 1. " COEF17 ,Coefficient - Phase 0, tap 17" hexmask.long.word 0x20 0.--9. 1. " COEF16 ,Coefficient - Phase 0, tap 16" line.long 0x24 "HFILT1918,Horizontal Filter Coefficients 19 and 18" hexmask.long.word 0x24 16.--25. 1. " COEF19 ,Coefficient - Phase 0, tap 19" hexmask.long.word 0x24 0.--9. 1. " COEF18 ,Coefficient - Phase 0, tap 18" line.long 0x28 "HFILT2120,Horizontal Filter Coefficients 21 and 20" hexmask.long.word 0x28 16.--25. 1. " COEF21 ,Coefficient - Phase 0, tap 21" hexmask.long.word 0x28 0.--9. 1. " COEF20 ,Coefficient - Phase 0, tap 20" line.long 0x2C "HFILT2322,Horizontal Filter Coefficients 23 and 22" hexmask.long.word 0x2C 16.--25. 1. " COEF23 ,Coefficient - Phase 0, tap 23" hexmask.long.word 0x2C 0.--9. 1. " COEF22 ,Coefficient - Phase 0, tap 22" line.long 0x30 "HFILT2524,Horizontal Filter Coefficients 25 and 24" hexmask.long.word 0x30 16.--25. 1. " COEF25 ,Coefficient - Phase 0, tap 25" hexmask.long.word 0x30 0.--9. 1. " COEF24 ,Coefficient - Phase 0, tap 24" line.long 0x34 "HFILT2726,Horizontal Filter Coefficients 27 and 26" hexmask.long.word 0x34 16.--25. 1. " COEF27 ,Coefficient - Phase 0, tap 27" hexmask.long.word 0x34 0.--9. 1. " COEF26 ,Coefficient - Phase 0, tap 26" line.long 0x38 "HFILT2928,Horizontal Filter Coefficients 29 and 28" hexmask.long.word 0x38 16.--25. 1. " COEF29 ,Coefficient - Phase 0, tap 29" hexmask.long.word 0x38 0.--9. 1. " COEF28 ,Coefficient - Phase 0, tap 28" line.long 0x3C "HFILT3130,Horizontal Filter Coefficients 31 and 30" hexmask.long.word 0x3C 16.--25. 1. " COEF31 ,Coefficient - Phase 0, tap 31" hexmask.long.word 0x3C 0.--9. 1. " COEF30 ,Coefficient - Phase 0, tap 30" group.long 0x68++0x3f "Vertical Filter Coefficients" line.long 0x0 "VFILT1 0 ,Vertical Filter Coefficients 1 and 0 " hexmask.long.word 0x0 16.--25. 1. " COEF1 ,Coefficient - Phase 0, tap 1 " hexmask.long.word 0x0 0.--9. 1. " COEF0 ,Coefficient - Phase 0, tap 0 " line.long 0x4 "VFILT3 2 ,Vertical Filter Coefficients 3 and 2 " hexmask.long.word 0x4 16.--25. 1. " COEF3 ,Coefficient - Phase 0, tap 3 " hexmask.long.word 0x4 0.--9. 1. " COEF2 ,Coefficient - Phase 0, tap 2 " line.long 0x8 "VFILT5 4 ,Vertical Filter Coefficients 5 and 4 " hexmask.long.word 0x8 16.--25. 1. " COEF5 ,Coefficient - Phase 0, tap 5 " hexmask.long.word 0x8 0.--9. 1. " COEF4 ,Coefficient - Phase 0, tap 4 " line.long 0xC "VFILT7 6 ,Vertical Filter Coefficients 7 and 6 " hexmask.long.word 0xC 16.--25. 1. " COEF7 ,Coefficient - Phase 0, tap 7 " hexmask.long.word 0xC 0.--9. 1. " COEF6 ,Coefficient - Phase 0, tap 6 " line.long 0x10 "VFILT9 8 ,Vertical Filter Coefficients 9 and 8 " hexmask.long.word 0x10 16.--25. 1. " COEF9 ,Coefficient - Phase 0, tap 9 " hexmask.long.word 0x10 0.--9. 1. " COEF8 ,Coefficient - Phase 0, tap 8 " line.long 0x14 "VFILT1110,Vertical Filter Coefficients 11 and 10" hexmask.long.word 0x14 16.--25. 1. " COEF11 ,Coefficient - Phase 0, tap 11" hexmask.long.word 0x14 0.--9. 1. " COEF10 ,Coefficient - Phase 0, tap 10" line.long 0x18 "VFILT1312,Vertical Filter Coefficients 13 and 12" hexmask.long.word 0x18 16.--25. 1. " COEF13 ,Coefficient - Phase 0, tap 13" hexmask.long.word 0x18 0.--9. 1. " COEF12 ,Coefficient - Phase 0, tap 12" line.long 0x1C "VFILT1514,Vertical Filter Coefficients 15 and 14" hexmask.long.word 0x1C 16.--25. 1. " COEF15 ,Coefficient - Phase 0, tap 15" hexmask.long.word 0x1C 0.--9. 1. " COEF14 ,Coefficient - Phase 0, tap 14" line.long 0x20 "VFILT1716,Vertical Filter Coefficients 17 and 16" hexmask.long.word 0x20 16.--25. 1. " COEF17 ,Coefficient - Phase 0, tap 17" hexmask.long.word 0x20 0.--9. 1. " COEF16 ,Coefficient - Phase 0, tap 16" line.long 0x24 "VFILT1918,Vertical Filter Coefficients 19 and 18" hexmask.long.word 0x24 16.--25. 1. " COEF19 ,Coefficient - Phase 0, tap 19" hexmask.long.word 0x24 0.--9. 1. " COEF18 ,Coefficient - Phase 0, tap 18" line.long 0x28 "VFILT2120,Vertical Filter Coefficients 21 and 20" hexmask.long.word 0x28 16.--25. 1. " COEF21 ,Coefficient - Phase 0, tap 21" hexmask.long.word 0x28 0.--9. 1. " COEF20 ,Coefficient - Phase 0, tap 20" line.long 0x2C "VFILT2322,Vertical Filter Coefficients 23 and 22" hexmask.long.word 0x2C 16.--25. 1. " COEF23 ,Coefficient - Phase 0, tap 23" hexmask.long.word 0x2C 0.--9. 1. " COEF22 ,Coefficient - Phase 0, tap 22" line.long 0x30 "VFILT2524,Vertical Filter Coefficients 25 and 24" hexmask.long.word 0x30 16.--25. 1. " COEF25 ,Coefficient - Phase 0, tap 25" hexmask.long.word 0x30 0.--9. 1. " COEF24 ,Coefficient - Phase 0, tap 24" line.long 0x34 "VFILT2726,Vertical Filter Coefficients 27 and 26" hexmask.long.word 0x34 16.--25. 1. " COEF27 ,Coefficient - Phase 0, tap 27" hexmask.long.word 0x34 0.--9. 1. " COEF26 ,Coefficient - Phase 0, tap 26" line.long 0x38 "VFILT2928,Vertical Filter Coefficients 29 and 28" hexmask.long.word 0x38 16.--25. 1. " COEF29 ,Coefficient - Phase 0, tap 29" hexmask.long.word 0x38 0.--9. 1. " COEF28 ,Coefficient - Phase 0, tap 28" line.long 0x3C "VFILT3130,Vertical Filter Coefficients 31 and 30" hexmask.long.word 0x3C 16.--25. 1. " COEF31 ,Coefficient - Phase 0, tap 31" hexmask.long.word 0x3C 0.--9. 1. " COEF30 ,Coefficient - Phase 0, tap 30" textline " " group.long 0xa8++0x3 line.long 0x00 "YENH,Luminance Enhancer" bitfld.long 0x00 16.--17. " ALGO ,Luminance Algorithm" "Disabled,[-1 2 -1]/2 HPF,[-1 -2 6 -2 -1]/4 HPF,?..." bitfld.long 0x00 12.--15. " GAIN ,Max gain" "0,1,2,3,?..." textline " " bitfld.long 0x00 8.--11. " SLOP ,Slope" "0,1,2,3,?..." hexmask.long.byte 0x00 0.--7. 1. " CORE ,Coring offset" width 0xb tree.end tree "HIST (Histogram)" base asd:0x01C71000 base asd:0x01c71000 width 11. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" group.long 0x04++0x3 line.long 0x00 "PCR,Peripheral Control Register" bitfld.long 0x00 1. " BUSY ,Histogram Busy" "Not busy,Busy" bitfld.long 0x00 0. " ENABLE ,Histogram enable" "Disabled,Enabled" group.long 0x08++0x3 line.long 0x00 "HIST_CNT,Histogram Control Register" bitfld.long 0x00 8. " DATSIZ ,Input data width" "9-14 bits,8 bits" bitfld.long 0x00 7. " CLR ,Clear data after read" "Not cleared,Cleared" textline " " sif (cpu()=="DM357") bitfld.long 0x00 6. " CFA ,CFA pattern" "2D conventional,Foveon sensor" bitfld.long 0x00 4.--5. " BINS ,Number of bins per histogram" "32 bins,64 bins,128 bins,256 bins" else bitfld.long 0x00 6. " CFA ,CFA pattern" "2D conventional,Unknown" bitfld.long 0x00 4.--5. " BINS ,Number of bins per histogram" "32 bins,64 bins,128 bins,256 bins" endif textline " " bitfld.long 0x00 3. " SOURCE ,Input source" "CCDC,SDRAM" bitfld.long 0x00 0.--2. " SHIFT ,Number of bits to right shift data before accessing bins" "0,1,2,3,4,5,6,7" group.long 0x0c++0x3 line.long 0x00 "WB_GAIN,White/Channel Balance Settings Register" hexmask.long.byte 0x00 24.--31. 1. " WG00 ,White balance gain 00" hexmask.long.byte 0x00 16.--23. 1. " WG01 ,White balance gain 01" textline " " hexmask.long.byte 0x00 8.--15. 1. " WG02 ,White balance gain 02" hexmask.long.byte 0x00 0.--7. 1. " WG03 ,White balance gain 03" group.long 0x10++0x7 line.long 0x00 "R0_HORZ,Region 0 Horizontal Information Register" hexmask.long.word 0x00 16.--29. 1. " HSTART ,Horizontal start location for region 0" hexmask.long.word 0x00 0.--13. 1. " HEND ,Horizontal end for region 0" line.long 0x04 "R0_VERT,Region 0 Vertical Information Register" hexmask.long.word 0x04 16.--29. 1. " VSTART ,Vertical start location for region 0" hexmask.long.word 0x04 0.--13. 1. " VEND ,Vertical end for region 0" group.long 0x18++0x7 line.long 0x00 "R1_HORZ,Region 1 Horizontal Information Register" hexmask.long.word 0x00 16.--29. 1. " HSTART ,Horizontal start location for region 1" hexmask.long.word 0x00 0.--13. 1. " HEND ,Horizontal end for region 1" line.long 0x04 "R1_VERT,Region 1 Vertical Information Register" hexmask.long.word 0x04 16.--29. 1. " VSTART ,Vertical start location for region 1" hexmask.long.word 0x04 0.--13. 1. " VEND ,Vertical end for region 1" group.long 0x20++0x7 line.long 0x00 "R2_HORZ,Region 2 Horizontal Information Register" hexmask.long.word 0x00 16.--29. 1. " HSTART ,Horizontal start location for region 2" hexmask.long.word 0x00 0.--13. 1. " HEND ,Horizontal end for region 2" line.long 0x04 "R2_VERT,Region 2 Vertical Information Register" hexmask.long.word 0x04 16.--29. 1. " VSTART ,Vertical start location for region 2" hexmask.long.word 0x04 0.--13. 1. " VEND ,Vertical end for region 2" group.long 0x28++0x7 line.long 0x00 "R3_HORZ,Region 3 Horizontal Information Register" hexmask.long.word 0x00 16.--29. 1. " HSTART ,Horizontal start location for region 3" hexmask.long.word 0x00 0.--13. 1. " HEND ,Horizontal end for region 3" line.long 0x04 "R3_VERT,Region 3 Vertical Information Register" hexmask.long.word 0x04 16.--29. 1. " VSTART ,Vertical start location for region 3" hexmask.long.word 0x04 0.--13. 1. " VEND ,Vertical end for region 3" group.long 0x30++0x7 line.long 0x00 "HIST_ADDR,Histogram Address Register" hexmask.long.word 0x00 0.--9. 1. " ADDR ,Address of histogram entry" line.long 0x04 "HIST_DATA,Histogram Data Register" hexmask.long.tbyte 0x04 0.--19. 1. " RDATA ,Histogram data that is read from memory" group.long 0x38++0x7 line.long 0x00 "RADD,Read Address Register" hexmask.long 0x00 0.--31. 1. " RADD ,Read address for each line in the SDRAM/DDRAM" line.long 0x04 "RADD_OFF,Read Address Offset Register" hexmask.long.word 0x04 0.--15. 1. " OFFSET ,Read address offset for each line in the SDRAM/DDRAM" group.long 0x40++0x3 line.long 0x00 "H_V_INFO,Horizontal/Vertical Information Register" hexmask.long.word 0x00 16.--29. 1. " HSIZE ,Horizontal size" hexmask.long.word 0x00 0.--13. 1. " VSIZE ,Vertical size" width 0xb tree.end tree "H3A (Hardware 3A)" base asd:0x01C71400 base asd:0x01c71400 width 13. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module" textline " " hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision" group.long 0x04++0x3 line.long 0x00 "PCR,Peripheral Control Register" hexmask.long.word 0x00 22.--31. 1. " AVE2LMT ,AE/AWB Stauration Limit" bitfld.long 0x00 18. " BUSYAEAWB ,Busy bit for AE/AWB" "Not busy,Busy" textline " " bitfld.long 0x00 17. " AEW_ALAW_EN ,AE/AWB A-law Table Enable" "Disabled,Enabled" bitfld.long 0x00 16. " AEW_EN ,AE/AWB Engine Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " BUSYAF ,Busy bit for AF" "Not busy,Busy" bitfld.long 0x00 14. " FVMODE ,Focus Value Accumulation Mode" "Sum,Peak" textline " " bitfld.long 0x00 11.--13. " RGBPOS ,Red, Green, and blue pixel location in the AF windows" "GR/GB - Bayer,RG/GB - Bayer,GR/BG - Bayer,RG/BG - Bayer,GG/RB - custom,RB/GG - custom,?..." hexmask.long.byte 0x00 3.--10. 1. " MED_TH ,Median filter threshold" textline " " bitfld.long 0x00 2. " AF_MED_EN ,Auto Focus Median filter Enable" "Disabled,Enabled" bitfld.long 0x00 1. " AF_ALAW_EN ,Auto Focus A-law table Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " AF_EN ,Auto Focus Enalbe" "Disabled,Enabled" group.long 0x08++0x7 line.long 0x00 "AFPAX1,Setup for the AF Engine Paxel Configuration Register" hexmask.long.byte 0x00 16.--22. 1. " PAXW ,AF Engine Paxel Width" hexmask.long.byte 0x00 0.--6. 1. " PAXH ,AF Engine Paxel Height" line.long 0x04 "AFPAX2,Setup for the AF Engine Paxel Configuration Register" bitfld.long 0x04 13.--16. " AFINCV ,AF Engine Line Increments" "1 line,2 lines,3 lines,4 lines,5 lines,6 lines,7 lines,8 lines,9 lines,10 lines,11 lines,12 lines,13 lines,14 lines,15 lines,16 lines" hexmask.long.byte 0x04 6.--12. 1. " PAXVC ,AF Engine Vertical Paxel Count" textline " " hexmask.long.byte 0x04 0.--5. 1. " PAXHC ,AF Engine Horizontal Paxel Count" group.long 0x10++0x3 line.long 0x00 "AFPAXSTART,Start Position for AF Engine Paxels Register" hexmask.long.word 0x00 16.--27. 1. " PAXSH ,AF Engine Paxel Horizontal start position" hexmask.long.word 0x00 0.--11. 1. " PAXSV ,AF Engine Paxel Vertical start position" group.long 0x14++0x3 line.long 0x00 "AFIIRSH,Start Position for IIRSH Register" hexmask.long.word 0x00 0.--11. 1. " IIRSH ,AF Engine IIR Horizontal Start Position" group.long 0x18++0x3 line.long 0x00 "AFBUFST,SDRAM/DDRAM Start address for AF Engine Register" hexmask.long 0x00 0.--31. 1. " AFBUFST ,AF Engine SDRAM/DDRAM Start Address" group.long 0x1c++0x17 line.long 0x00 "AFCOEF010,IIR filter coefficient data for SET 0" hexmask.long.word 0x00 16.--27. 1. " COEFF1 ,AF Engine IIR filter Coefficient 1" hexmask.long.word 0x00 0.--11. 1. " COEFF0 ,AF Engine IIR filter Coefficient 0" line.long 0x04 "AFCOEF032,IIR filter coefficient data for SET 0" hexmask.long.word 0x04 16.--27. 1. " COEFF3 ,AF Engine IIR filter Coefficient 3" hexmask.long.word 0x04 0.--11. 1. " COEFF2 ,AF Engine IIR filter Coefficient 2" line.long 0x08 "AFCOEF054,IIR filter coefficient data for SET 0" sif (cpu()=="DM357") hexmask.long.word 0x08 16.--27. 1. " COEFF5 ,AF Engine IIR filter Coefficient 5" hexmask.long.word 0x08 0.--11. 1. " COEFF4 ,AF Engine IIR filter Coefficient 4" else hexmask.long.word 0x08 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" endif line.long 0x0c "AFCOEF076,IIR filter coefficient data for SET 0" sif (cpu()=="DM357") hexmask.long.word 0x0c 16.--27. 1. " COEFF7 ,AF Engine IIR filter Coefficient 7" hexmask.long.word 0x0c 0.--11. 1. " COEFF6 ,AF Engine IIR filter Coefficient 6" else hexmask.long.word 0x0c 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" endif line.long 0x10 "AFCOEF098,IIR filter coefficient data for SET 0" sif (cpu()=="DM357") hexmask.long.word 0x10 16.--27. 1. " COEFF9 ,AF Engine IIR filter Coefficient 9" hexmask.long.word 0x10 0.--11. 1. " COEFF8 ,AF Engine IIR filter Coefficient 8" else hexmask.long.word 0x10 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" endif line.long 0x14 "AFCOEF0010,IIR filter coefficient data for SET 0" hexmask.long.word 0x14 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" group.long 0x34++0x17 line.long 0x00 "AFCOEF110,IIR filter coefficient data for SET 1" hexmask.long.word 0x00 16.--27. 1. " COEFF1 ,AF Engine IIR filter Coefficient 1" hexmask.long.word 0x00 0.--11. 1. " COEFF0 ,AF Engine IIR filter Coefficient 0" line.long 0x04 "AFCOEF132,IIR filter coefficient data for SET 1" hexmask.long.word 0x04 16.--27. 1. " COEFF3 ,AF Engine IIR filter Coefficient 3" hexmask.long.word 0x04 0.--11. 1. " COEFF2 ,AF Engine IIR filter Coefficient 2" line.long 0x08 "AFCOEF154,IIR filter coefficient data for SET 1" hexmask.long.word 0x08 16.--27. 1. " COEFF5 ,AF Engine IIR filter Coefficient 5" hexmask.long.word 0x08 0.--11. 1. " COEFF4 ,AF Engine IIR filter Coefficient 4" line.long 0x0c "AFCOEF176,IIR filter coefficient data for SET 1" hexmask.long.word 0x0c 16.--27. 1. " COEFF7 ,AF Engine IIR filter Coefficient 7" hexmask.long.word 0x0c 0.--11. 1. " COEFF6 ,AF Engine IIR filter Coefficient 6" line.long 0x10 "AFCOEF198,IIR filter coefficient data for SET 1" hexmask.long.word 0x10 16.--27. 1. " COEFF9 ,AF Engine IIR filter Coefficient 9" hexmask.long.word 0x10 0.--11. 1. " COEFF8 ,AF Engine IIR filter Coefficient 8" line.long 0x14 "AFCOEF1010,IIR filter coefficient data for SET 1" sif (cpu()=="DM357") hexmask.long.word 0x14 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" else hexmask.long.word 0x14 16.--27. 1. " COEFF11 ,AF Engine IIR filter Coefficient 11" hexmask.long.word 0x14 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10" endif group.long 0x4c++0x3 line.long 0x00 "AEWWIN1,Configuration for AE/AWB Windows" hexmask.long.byte 0x00 24.--30. 1. " WINH ,AE/AWB Engine Window Height" hexmask.long.byte 0x00 13.--19. 1. " WINW ,AE/AWB Engine Window Width" textline " " hexmask.long.byte 0x00 6.--12. 1. " WINVC ,AE/AWB Engine Vertical Window Count" hexmask.long.byte 0x00 0.--5. 1. " WINHC ,AE/AWB Engine Horizontal Window Count" group.long 0x50++0x3 line.long 0x00 "AEWINSTART,Start position for AE/AWB Windows Register" hexmask.long.word 0x00 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position" hexmask.long.word 0x00 0.--11. 1. " WINSH ,AE/AWB Engine Horizontal Window Start Position" group.long 0x54++0x3 line.long 0x00 "AEWINBLK,Start position and height for black line of AE/AWB Windows Register" hexmask.long.word 0x00 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position for single black line of windows" hexmask.long.word 0x00 0.--6. 1. " WINH ,AE/AWB Engine Window Height for the single black line of windows" group.long 0x58++0x3 line.long 0x00 "AEWSUBWIN,Configuration for subsample data in AE/AWB window Register" bitfld.long 0x00 8.--11. " AEWINCV ,AE/AWB Engine Vertical Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" bitfld.long 0x00 0.--3. " AEWINCH ,AE/AWB Engine Horizontal Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32" group.long 0x5c++0x3 line.long 0x00 "AEWBUFST,SDRAM/DDRAM Start address for AE/AWB Engine" hexmask.long 0x00 0.--31. 1. " AEWBUFST ,AE/AWB Engine SDRAM/DDRAM Start Address" width 0xb tree.end tree.end tree.open "VPBE (Video Processing Back End)" base asd:0x01c72780 tree "Global Registers" width 9. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification" hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number" group.long 0x04++0x13 line.long 0x00 "PCR,Peripheral Control Register" bitfld.long 0x00 1. " VENC_DIV ,Video Encoder Clock Divisor" "VECNC,0.5 VENC" bitfld.long 0x00 0. " CLK_OFF ,Gate VPBE clocks for power savings" "On,Off" width 0xb tree.end tree "VENC (Video Encoder/Digital LCD Subsystem Registers)" base asd:0x01c72400 width 11. if (((data.long(asd:0x01c72400))&0x100)==0x00) group.long 0x00++0x3 line.long 0x00 "VMOD,Video Mode Register" bitfld.long 0x00 12.--15. " VDMD ,Digital video output mode" "YCbCr 16 bit,YCbCr 8 bit,Parallel RGB to out RGB separately,?..." textline " " bitfld.long 0x00 11. " ITLCL ,Non-interlace line number select (NTSC/PAL)" "262/312,263/313" bitfld.long 0x00 10. " ITLC ,Interlaced Scan Mode Enable" "Interlace,Non-interlace" textline " " bitfld.long 0x00 9. " NSIT ,Nonstandard interlace mode" "Progressive,Interlaced" bitfld.long 0x00 8. " HDMD ,HDTV mode" "SDTV,HDTV" textline " " bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select" "NTSC,PAL,?..." bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave" textline " " bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL,Not NTSC/PAL" bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking" textline " " bitfld.long 0x00 1. " VIE ,Composite Analog Output Enable" "Fixed low-level,Normal" bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled" else group.long 0x00++0x3 line.long 0x00 "VMOD,Video Mode Register" bitfld.long 0x00 12.--15. " VDMD ,Digital video output mode" "YCbCr 16 bit,YCbCr 8 bit,Parallel RGB to out RGB separately,?..." textline " " bitfld.long 0x00 11. " ITLCL ,Non-interlace line number select (NTSC/PAL)" "262/312,263/313" bitfld.long 0x00 10. " ITLC ,Interlaced Scan Mode Enable" "Interlace,Non-interlace" textline " " bitfld.long 0x00 9. " NSIT ,Nonstandard interlace mode" "Progressive,Interlace" bitfld.long 0x00 8. " HDMD ,HDTV mode" "SDTV,HDTV" textline " " bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select" "525P,625P,?..." bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave" textline " " bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL,Not NTSC/PAL" bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking" textline " " bitfld.long 0x00 1. " VIE ,Composite Analog Output Enable" "Fixed low-level,Normal" bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled" endif group.long 0x04++0x7 line.long 0x00 "VIDCTL,Video Interface I/O Control Register" bitfld.long 0x00 14. " VCLKP ,VCLK output polarity" "Non-inverse,Inverse" bitfld.long 0x00 13. " VCLKE ,VCLK output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " VCLKZ ,VCLK pin output enable" "Output,Tri-state" bitfld.long 0x00 8. " SYDIR ,Horizontal/Vertical Sync pin I/O control" "Output,Input" textline " " bitfld.long 0x00 4.--5. " DOMD ,Digital data output mode" "Normal,Inversed,L level,H level" bitfld.long 0x00 3. " YCSWAP ,Swaps YOUT/COUT pins" "Normal,Interchanged" textline " " bitfld.long 0x00 2. " YCOL ,YOUT/COUT pin output level" "Normal,DC level" bitfld.long 0x00 0. " YCDIR ,YOUT/COUT pin Direction" "Output,Disabled" line.long 0x04 "VDPRO,Video Data Processing Register" bitfld.long 0x04 14.--15. " PFLTC ,C Prefilter select" "No filter,1+1,1+2+1,?..." bitfld.long 0x04 12.--13. " PFLTY ,Y Prefilter select" "No filter,1+1,1+2+1,?..." textline " " bitfld.long 0x04 11. " PFLTR ,Prefilter sampling frequency" "ENC/2,ENC" bitfld.long 0x04 9. " CBTYP ,Color Bar Type" "75%,100%" textline " " bitfld.long 0x04 8. " CBMD ,Color bar mode" "Normal,Color bar" bitfld.long 0x04 6. " ATRGB ,Input video (Attenuation control for RGB)" "No attenuation,REC601" textline " " bitfld.long 0x04 5. " ATYCC ,Input video (Attenuation control forYCbCr)" "No attenuation,REC601" bitfld.long 0x04 4. " ATCOM ,Input video (Attention control for composite)" "No attenuation,REC601" textline " " bitfld.long 0x04 3. " DAFRQ ,DAC operating frequency" "27 MHz,54 MHz" bitfld.long 0x04 2. " DAUPS ,DAC x2 up-sampling enable" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " CUPS ,C signal up-sampling enable" "Disabled,Enabled" bitfld.long 0x04 0. " YUPS ,Y signal up-sampling enable" "Disabled,Enabled" if (((d.l(asd:0x01c72400))&0x20)==0x20) group.long 0x0c++0x3 line.long 0x00 "SYNCCTL,Sync Control Register" bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H" bitfld.long 0x00 12.--13. " EXFMD ,External field detection mode" "Rising edge,Raw field,Vsync as ID,Vsync phase" bitfld.long 0x00 11. " EXFIV ,External field input inversion" "Non-inverse,Inverse" textline " " bitfld.long 0x00 10. " EXSYNC ,External sync select" "HSYNC/VSYNC,CCD sync" bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low" bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low" textline " " bitfld.long 0x00 7. " CSP ,Composite signal output polarity" "Active high,Active low" bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled" bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width" textline " " bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite" bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low" bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low" textline " " bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled" bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled" else group.long 0x0c++0x3 line.long 0x00 "SYNCCTL,Sync Control Register" bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H" bitfld.long 0x00 10. " EXSYNC ,External sync select" "HSYNC/VSYNC,CCD sync" bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low" textline " " bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low" bitfld.long 0x00 7. " CSP ,Composite signal output polarity" "Active high,Active low" bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width" bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite" bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low" textline " " bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low" bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled" bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled" textline " " endif if (((d.l(asd:0x01c72400+0xc))&0x20)==0x20) group.long 0x10++0x7 line.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register" hexmask.long.word 0x00 0.--12. 1. " HSPLS ,Horizontal sync pulse width" line.long 0x04 "VSPLS,Vertical Sync Pulse Width Register" hexmask.long.word 0x04 0.--12. 1. " VSPLS ,Vertical sync pulse width" else hgroup.long 0x10++0x7 hide.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register" hide.long 0x04 "VSPLS,Vertical Sync Pulse Width Register" endif group.long 0x18++0x1f line.long 0x00 "HINT,Horizontal Interval Register" hexmask.long.word 0x00 0.--12. 1. " HINT ,Horizontal interval" line.long 0x04 "HSTART,Horizontal Valid Data Start Position Register" hexmask.long.word 0x04 0.--12. 1. " HSTART ,Horizontal valid data start position" line.long 0x08 "HVALID,Horizontal Data Valid Range Register" hexmask.long.word 0x08 0.--12. 1. " HVALID ,Horizontal data valid range" line.long 0x0c "VINT,Vertical Interval Register" hexmask.long.word 0x0c 0.--12. 1. " VINT ,Vertical interval" line.long 0x10 "VSTART,Vertical Valid Data Start Position Register" hexmask.long.word 0x10 0.--12. 1. " VSTART ,Vertical valid data start position" line.long 0x14 "VVALID,Vertical Data Valid Range Register" hexmask.long.word 0x14 0.--12. 1. " VVALID ,Vertical data valid range" line.long 0x18 "HSDLY,Horizontal Sync Delay Register" hexmask.long.word 0x18 0.--12. 1. " HSDLY ,Output delay of horizontal sync signal" line.long 0x1c "VSDLY,Vertical Sync Delay Register" hexmask.long.word 0x1c 0.--12. 1. " VSDLY ,Output delay of vertical sync signal" width 11. if (((d.l(asd:0x01c72400))&0xf000)==0x0) group.long 0x38++0x3 line.long 0x00 "YCCTL,YCbCr Control Register" bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched" bitfld.long 0x00 2.--3. " YCP ,YC output order based on YCC mode" "CbCr,CrCb,?..." bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" elif (((d.l(asd:0x01c72400))&0xf000)==0x1000) group.long 0x38++0x3 line.long 0x00 "YCCTL,YCbCr Control Register" bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched" bitfld.long 0x00 2.--3. " YCP ,YC output order based on YCC mode" "Cb-Y-Cr-Y,Y-Cr-Y-Cb,Cr-Y-Cb-Y,Y-Cb-Y-Cr" bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" else group.long 0x38++0x3 line.long 0x00 "YCCTL,YCbCr Control Register" bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656" endif group.long 0x3c++0x6b line.long 0x00 "RGBCTL,RGB Control Register" bitfld.long 0x00 10. " DFLTR ,RGB LPF sampling frequency" "ENC/2,ENC" bitfld.long 0x00 8.--9. " DFLTS ,RGB LPF select" "No filter,1+2+1,1+2+4+2+1,?..." line.long 0x04 "RGBCLP,RGB Level Clipping Register" hexmask.long.byte 0x04 8.--15. 1. " UPCLIP ,Upper clip level for RGB output" hexmask.long.byte 0x04 0.--7. 1. " OFST ,Offset level for RGB output" line.long 0x08 "LINECTL,Line Identification Control Register" bitfld.long 0x08 11. " VSTF ,Vertical data valid start position field mode" "Normal,Field" bitfld.long 0x08 8.--10. " VCLID ,Vertical culling line position" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. " VCLRD ,Vertical culling counter reset mode" "Zero,Random" textline " " bitfld.long 0x08 6. " VCL56 ,Digital output vertical culling" "None,5/6" bitfld.long 0x08 5. " HLDF ,Digital output field hold" "Normal,Output" bitfld.long 0x08 4. " HLDL ,Digital output line hold" "Normal,Output" textline " " bitfld.long 0x08 3. " LINID ,Start line ID control in even field" "0,1" bitfld.long 0x08 2. " DCKCLP ,DCLK pattern switching by culling line ID" "Off,On" bitfld.long 0x08 1. " DCKCLI ,DCLK polarity inversion by culling line ID" "Off,On" textline " " bitfld.long 0x08 0. " RGBCL ,RGB output order switching by culling line ID" "Off,On" line.long 0x0c "CULLLINE,Culling Line Control Register" hexmask.long.byte 0x0c 12.--15. 1. " CLOF ,Culling line ID toggle position (Odd field)" hexmask.long.byte 0x0c 8.--11. 1. " CLEF ,Culling line ID toggle position (Even field)" hexmask.long.byte 0x0c 0.--3. 1. " CULI ,Culling line ID inversion interval" line.long 0x10 "LCDOUT,LCD Output Signal Control Register" bitfld.long 0x10 8. " OES ,Output signal select" "LCD_OE,BRIGHT" bitfld.long 0x10 7. " FIDP ,Field Id output polarity" "Non-inverse,Inverse" bitfld.long 0x10 6. " PWMP ,PWM output pulse polarity" "Active high,Active low" textline " " bitfld.long 0x10 5. " PWME ,PWM output control" "Off,On" bitfld.long 0x10 4. " ACE ,LCD_AC output control" "Off,On" bitfld.long 0x10 3. " BRP ,Bright output polarity" "Non-inverse,Inverse" textline " " bitfld.long 0x10 2. " BRE ,Bright output control" "Off,On" bitfld.long 0x10 1. " OEP ,LCD_OE output polarity" "Active high,Active low" bitfld.long 0x10 0. " OEE ,LCD_OE output control" "Off,On" line.long 0x14 "BRTS,Brightness Start Position Signal Control Register" hexmask.long.word 0x14 0.--12. 1. " BRTS ,Bright pulse start position" line.long 0x18 "BRTW,Brightness Width Signal Control Register" hexmask.long.word 0x18 0.--12. 1. " BRTW ,Bright pulse width" line.long 0x1c "ACCTL,LCD_AC Signal Control Register" bitfld.long 0x1c 13.--15. " ACTF ,LCD_AC toggle interval" "0,1,2,3,4,5,6,7" hexmask.long.word 0x1c 0.--12. 1. " ACTH ,LCD_AC toggle horizontal position" line.long 0x20 "PWMP,PWM Start Position Signal Control Register" hexmask.long.word 0x20 0.--12. 1. " PWMP ,PWM output period" line.long 0x24 "PWMW,PWM Width Signal Control Register" hexmask.long.word 0x24 0.--12. 1. " PWMW ,PWM output pulse width" line.long 0x28 "DCLKCTL,DCLK Control Register" bitfld.long 0x28 15. " DCKIM ,DCLK internal mode" "Off,On" bitfld.long 0x28 12.--13. " DOFST ,DCLK output offset" "0,-0.5,0.5,1" bitfld.long 0x28 11. " DCKEC ,DCLK pattern mode" "Level,Enabled" textline " " bitfld.long 0x28 10. " DCKME ,DCLK mask control" "Off,On" bitfld.long 0x28 9. " DCKOH ,DCLK output divide" "/1,/2" bitfld.long 0x28 8. " DCKIH ,Internal DCLK output divide" "/1,/2" textline " " bitfld.long 0x28 0.--5. " DCKPW ,DCLK pattern valid bit width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x2C "DCLKPTN0,DCLK Pattern 0 Register" hexmask.long.word 0x2C 0.--15. 1. " DCPTN0 ,DCLK pattern" line.long 0x30 "DCLKPTN1,DCLK Pattern 1 Register" hexmask.long.word 0x30 0.--15. 1. " DCPTN1 ,DCLK pattern" line.long 0x34 "DCLKPTN2,DCLK Pattern 2 Register" hexmask.long.word 0x34 0.--15. 1. " DCPTN2 ,DCLK pattern" line.long 0x38 "DCLKPTN3,DCLK Pattern 3 Register" hexmask.long.word 0x38 0.--15. 1. " DCPTN3 ,DCLK pattern" line.long 0x3C "DCLKPTN0A,DCLK Auxiliary Pattern 0 Register" hexmask.long.word 0x3C 0.--15. 1. " DCPTN0A ,DCLK auxiliary pattern" line.long 0x40 "DCLKPTN1A,DCLK Auxiliary Pattern 1 Register" hexmask.long.word 0x40 0.--15. 1. " DCPTN1A ,DCLK auxiliary pattern" line.long 0x44 "DCLKPTN2A,DCLK Auxiliary Pattern 2 Register" hexmask.long.word 0x44 0.--15. 1. " DCPTN2A ,DCLK auxiliary pattern" line.long 0x48 "DCLKPTN3A,DCLK Auxiliary Pattern 3 Register" hexmask.long.word 0x48 0.--15. 1. " DCPTN3A ,DCLK auxiliary pattern" line.long 0x4c "DCLKHS,Horizontal DCLK Mask Start Register" hexmask.long.word 0x4c 0.--15. 1. " DCHS ,Horizontal DCLK mask start position" line.long 0x50 "DCLKHSA,Horizontal Auxiliary DCLK Mask Start Register" hexmask.long.word 0x50 0.--15. 1. " DCHS ,Horizontal auxiliary DCLK mask start position" line.long 0x54 "DCLKHR,Horizontal DCLK Mask Range Register" hexmask.long.word 0x54 0.--15. 1. " DCHR ,Horizontal DCLK mask range" line.long 0x58 "DCLKVS,Vertical DCLK Mask Start Register" hexmask.long.word 0x58 0.--15. 1. " DCVS ,DCLK vertical mask start position" line.long 0x5c "DCLKVR,Vertical DCLK Mask Range Register" hexmask.long.word 0x5c 0.--15. 1. " DCVR ,DCLK vertical mask range" line.long 0x60 "CAPCTL,Caption Control Register" hexmask.long.byte 0x60 8.--14. 1. " CADF ,Closed caption default data register" bitfld.long 0x60 0.--1. " CAPF ,Closed caption field select" "No data,Odd field,Even field,Both" line.long 0x64 "CAPDO,Caption Data Odd Field Register" hexmask.long.byte 0x64 8.--14. 1. " CADO0 ,Closed caption default data0" hexmask.long.byte 0x64 0.--6. 1. " CADO1 ,Closed caption default data1" line.long 0x68 "CAPDE,Caption Data Even Field Register" hexmask.long.byte 0x68 8.--14. 1. " CADE0 ,Closed caption default data0" hexmask.long.byte 0x68 0.--6. 1. " CADE1 ,Closed caption default data1" if (((d.l(asd:0x01c72400))&0x1C0)==0x0) group.long 0xa8++0xb line.long 0x00 "ATR0,Video Attribute Data 0 Register" bitfld.long 0x00 3.--5. " WORD0B ,Word0-B Data" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " WORD0A ,Word0-A Data" "0,1,2,3,4,5,6,7" line.long 0x04 "ATR1,Video Attribute Data 1 Register" bitfld.long 0x04 4.--7. " WORD2 ,Word2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " WORD1 ,Word1 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "ATR2,Video Attribute Data 2 Register" bitfld.long 0x08 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion" hexmask.long.byte 0x08 0.--5. 1. " CRC ,CRC Data" elif (((d.l(asd:0x01c72400))&0x1C0)==0x40) hgroup.long 0xa8++0xb hide.long 0x00 "ATR0,Video Attribute Data 0 Register" group.long 0xac++0x7 line.long 0x00 "ATR1,Video Attribute Data 1 Register" bitfld.long 0x00 4.--7. " GROUP2 ,Group2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " GROUP1 ,Group1 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "ATR2,Video Attribute Data 2 Register" bitfld.long 0x04 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion" bitfld.long 0x04 3.--5. " GROUP4 ,Group4 Data" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " GROUP3 ,Group3 Data" "0,1,2,3,4,5,6,7" else hgroup.long 0xa8++0xb hide.long 0x00 "ATR0,Video Attribute Data 0 Register" hide.long 0x04 "ATR1,Video Attribute Data 1 Register" hide.long 0x08 "ATR2,Video Attribute Data 2 Register" endif group.long 0xb8++0x3 line.long 0x00 "VSTAT,Video Status Register" bitfld.long 0x00 9. " CAEST ,Closed caption status(even field)" "Low,High" bitfld.long 0x00 8. " CAOST ,Closed caption status(odd field)" "Low,High" bitfld.long 0x00 4. " FIDST ,Field ID monitor" "0,1" textline " " bitfld.long 0x00 1. " UDBAL ,uDisplay 'Balance signal' monitor" "Low,High" bitfld.long 0x00 0. " UDFUL ,uDisplay 'Full' signal monitor" "Low,High" group.long 0xc4++0x0b line.long 0x00 "DACTST,DAC Test Register" bitfld.long 0x00 14. " DAPD2 ,DAC2 power-down" "Normal,Power-down" bitfld.long 0x00 13. " DAPD1 ,DAC1 power-down" "Normal,Power-down" bitfld.long 0x00 12. " DAPD0 ,DAC0 power-down" "Normal,Power-down" line.long 0x04 "YCOLVL,YOUT and COUT Levels Register" hexmask.long.byte 0x04 8.--15. 1. " YLVL ,YOUT DC level" hexmask.long.byte 0x04 0.--7. 1. " CLVL ,COUT DC level" line.long 0x08 "SCPROG,Sub-Carrier Programming Register" hexmask.long.word 0x08 0.--9. 1. " SCSD ,Sub-carrier initial phase value" group.long 0xdc++0x3 line.long 0x00 "CVBS,Composite Mode Register" bitfld.long 0x00 12.--14. " YCDLY ,Delay adjustment of Y signal in composite signal" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 5. " CVLVL ,Composite video level (sync/white)" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " CSTUP ,Setup level at NTSC output" "0%,7.5%" bitfld.long 0x00 3. " CLBS ,Blanking shape disable" "No,Yes" textline " " bitfld.long 0x00 1. " CBBLD ,Blanking build up time for composite output" "140 us,300 us" bitfld.long 0x00 0. " CSBLD ,Sync build up time for composite output" "140 us,200 us" if (((data.long(asd:0x01c72400))&0x200)==0x00) group.long 0xe0++0x3 line.long 0x00 "CMPNT,Component Mode Register" bitfld.long 0x00 15. " MRGB ,RGB mode select for component output" "YPbPr,RGB" bitfld.long 0x00 12.--14. " MYDLY ,Delay adjustment of Y signal in component mode" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 10. " MSYR ,Sync on Pr (or R)" "No sync,Sync on" bitfld.long 0x00 9. " MSYB ,Sync on Pb (or B)" "No sync,Sync on" textline " " bitfld.long 0x00 8. " MSYG ,Sync on Y (or G)" "No sync,Sync on" bitfld.long 0x00 6.--7. " MCLVL ,Chroma level for component Y" "350mV,467mV,324mV,?..." bitfld.long 0x00 5. " MYLVL ,Luma level (sync/white) for component YPbPr" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " MSTUP ,Setup for component YPbPr" "0%,7.5%" textline " " bitfld.long 0x00 3. " MBLS ,Blanking shape disable" "No,Yes" bitfld.long 0x00 1. " MBBLD ,Blanking build-up time for component output" "70 ms,150 ms" bitfld.long 0x00 0. " MSBLD ,Sync build-up time for component output" "70 ms,100 ms" else group.long 0xe0++0x3 line.long 0x00 "CMPNT,Component Mode Register" bitfld.long 0x00 15. " MRGB ,RGB mode select for component output" "YPbPr,RGB" bitfld.long 0x00 12.--14. " MYDLY ,Delay adjustment of Y signal in component mode" "0,1,2,3,-4,-3,-2,-1" bitfld.long 0x00 10. " MSYR ,Sync on Pr (or R)" "No sync,Sync on" bitfld.long 0x00 9. " MSYB ,Sync on Pb (or B)" "No sync,Sync on" textline " " bitfld.long 0x00 8. " MSYG ,Sync on Y (or G)" "No sync,Sync on" bitfld.long 0x00 6.--7. " MCLVL ,Chroma level for component Y" "350mV,467mV,324mV,?..." bitfld.long 0x00 5. " MYLVL ,Luma level (sync/white) for component YPbPr" "286mV/714mV,300mV/700mV" bitfld.long 0x00 4. " MSTUP ,Setup for component YPbPr" "0%,7.5%" textline " " bitfld.long 0x00 3. " MBLS ,Blanking shape disable" "No,Yes" bitfld.long 0x00 1. " MBBLD ,Blanking build-up time for component output" "140 ms,300 ms" bitfld.long 0x00 0. " MSBLD ,Sync build-up time for component output" "140 ms,200 ms" endif group.long 0xe4++0x13 line.long 0x00 "ETMG0,CVBS Timing Control 0 Register" hexmask.long.byte 0x00 8.--11. 1. " CEPW ,Equalizing pulse width offset for composite output" hexmask.long.byte 0x00 4.--7. 1. " CFSW ,Field sync pulse width offset for composite output" hexmask.long.byte 0x00 0.--3. 1. " CLSW ,Line sync pulse width offset for composite output" line.long 0x04 "ETMG1,CVBS Timing Control 1 Register" hexmask.long.byte 0x04 12.--15. 1. " CBSE ,Burst end position offset for composite output" hexmask.long.byte 0x04 8.--11. 1. " CBST ,Burst start position offset for composite output" hexmask.long.byte 0x04 4.--7. 1. " CFPW ,Front porch position offset for composite output" hexmask.long.byte 0x04 0.--3. 1. " CLBI ,Line blanking end position offset for composite output" line.long 0x08 "ETMG2,Component Timing Control 2 Register" hexmask.long.byte 0x08 8.--11. 1. " MEPW ,Equalizing pulse width offset for component output" hexmask.long.byte 0x08 4.--7. 1. " MFSW ,Field sync pulse width offset for component output" hexmask.long.byte 0x08 0.--3. 1. " MLSW ,Line sync pulse width offset for component output" line.long 0x0c "ETMG3,Component Timing Control 3 Register" hexmask.long.byte 0x0c 4.--7. 1. " CFPW ,Front porch position offset for component output" hexmask.long.byte 0x0c 0.--3. 1. " CLBI ,Line blanking end position offset for component output" line.long 0x10 "DACSEL,DAC Output Select Register" bitfld.long 0x10 8.--11. " DA2S ,DAC2 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." bitfld.long 0x10 4.--7. " DA1S ,DAC1 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." bitfld.long 0x10 0.--3. " DA0S ,DAC0 output select" "CVBS,S-Video Y,S-Video C,Y/G,Pb/B,Pr/R,?..." group.long 0x100++0x3f line.long 0x00 "ARGBX0,Analog RGB Matrix 0 Register" hexmask.long.word 0x00 0.--10. 1. " AGY ,YCbCr->RGB matrix coefficient GY for analog RGB out" line.long 0x04 "ARGBX1,Analog RGB Matrix 1 Register" hexmask.long.word 0x04 0.--10. 1. " ARV ,YCbCr->RGB matrix coefficient RV for analog RGB out" line.long 0x08 "ARGBX2,Analog RGB Matrix 2 Register" hexmask.long.word 0x08 0.--10. 1. " AGU ,YCbCr->RGB matrix coefficient GU for analog RGB out" line.long 0x0c "ARGBX3,Analog RGB Matrix 3 Register" hexmask.long.word 0x0c 0.--10. 1. " AGV ,YCbCr->RGB matrix coefficient GV for analog RGB out" line.long 0x10 "ARGBX4,Analog RGB Matrix 4 Register" hexmask.long.word 0x10 0.--10. 1. " ABU ,YCbCr->RGB matrix coefficient BU for analog RGB out" line.long 0x14 "DRGBX0,Digital RGB Matrix 0 Register" hexmask.long.word 0x14 0.--10. 1. " DGY ,YCbCr->RGB matrix coefficient GY for digital RGB out" line.long 0x18 "DRGBX1,Digital RGB Matrix 1 Register" hexmask.long.word 0x18 0.--10. 1. " DRV ,YCbCr->RGB matrix coefficient RV for digital RGB out" line.long 0x1c "DRGBX2,Digital RGB Matrix 2 Register" hexmask.long.word 0x1c 0.--10. 1. " DGU ,YCbCr->RGB matrix coefficient GU for digital RGB out" line.long 0x20 "DRGBX3,Digital RGB Matrix 3 Register" hexmask.long.word 0x20 0.--10. 1. " DGV ,YCbCr->RGB matrix coefficient GV for digital RGB out" line.long 0x24 "DRGBX4,Digital RGB Matrix 4 Register" hexmask.long.word 0x24 0.--10. 1. " DBU ,YCbCr->RGB matrix coefficient BU for digital RGB out" line.long 0x28 "VSTARTA,Vertical Data Valid Start Position for Even Field Register" hexmask.long.word 0x28 0.--12. 1. " VSTARTA ,Vertical data valid start position for even field" line.long 0x2c "OSDCLK0,OSD Clock Control 0 Register" hexmask.long.byte 0x2c 0.--3. 1. " OCPW ,OSD clock pattern bit width" line.long 0x30 "OSDCLK1,OSD Clock Control 1 Register" hexmask.long.word 0x30 0.--15. 1. " OCPT ,OSD clock pattern" line.long 0x34 "HVLDCL0,Horizontal Valid Culling Control 0 Register" bitfld.long 0x34 4. " HCM ,Horizontal valid culling mode" "Normal,Horizontal" hexmask.long.byte 0x34 0.--3. 1. " HCPW ,Horizontal valid culling pattern bit width" line.long 0x38 "HVLDCL1,Horizontal Valid Culling Control 1 Register" hexmask.long.word 0x38 0.--15. 1. " HCPT ,Horizontal valid culling pattern" line.long 0x3c "OSDHADV,OSD Horizontal Sync Advance Register" hexmask.long.byte 0x3c 0.--7. 1. " OHAD ,OSD horizontal sync advance" group.long 0x1f4++0x03 line.long 0x00 "VMISC,VENC Miscellaneous Register" bitfld.long 0x00 0. " YUPF ,Luma upsampling filter select" "Reserved,[1 2 1]" width 0xb tree.end tree "OSD (On-Screen Display Registers)" base asd:0x01c72600 width 13. group.long 0x00++0xb line.long 0x00 "MODE,OSD Mode Register" bitfld.long 0x00 15. " CS ,Cb/Cr or Cr/Cb format" "Cb/Cr,Cr/Cb" bitfld.long 0x00 14. " OVRSZ ,OSD Window Vertical Expansion Enable" "x 1,x 6/5" bitfld.long 0x00 13. " OHRSZ ,OSD Window Horizontal Expansion Enable" "x 1,x 9/8" textline " " bitfld.long 0x00 12. " EF ,Expansion Filter Enable" "Disabled,Enabled" bitfld.long 0x00 11. " VVRSZ ,Video Window Vertical Expansion Enable" "x 1,x 6/5" bitfld.long 0x00 10. " VHRSZ ,Video Window Horizontal Expansion Enable" "x 1,x 9/8" textline " " bitfld.long 0x00 9. " FSINV ,Field signal inversion" "Not inverted,Inverted" bitfld.long 0x00 8. " BCLUT ,Background CLUT selection" "ROM,RAM" hexmask.long.byte 0x00 0.--7. 1. " CABG ,Background Color CLUT" line.long 0x04 "VIDWINMD,Video Window Mode Setup Register" bitfld.long 0x04 15. " VFINV ,Video Window 0/1 Expansion Filter Coefficient Inverse" "Inversed,Normal" bitfld.long 0x04 14. " V1EFC ,Video Window 1 Expansion Filter Coefficient" "Same,Different" bitfld.long 0x04 12.--13. " VHZ1 ,Video Window 1 horizontal direction zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x04 10.--11. " VVZ1 ,Video Window 1 vertical direction zoom" "x1,x2,x4,?..." bitfld.long 0x04 9. " VFF1 ,Video Window 1 display mode" "Field,Frame" bitfld.long 0x04 8. " ACT1 ,Sets image display on/off Video Window 1" "Off,On" textline " " bitfld.long 0x04 6. " V0EFC ,Video Window 0 Expansion Filter Coefficient" "Same,Different" bitfld.long 0x04 4.--5. " VHZ0 ,Video Window 0 horizontal direction zoom" "x1,x2,x4,?..." bitfld.long 0x04 2.--3. " VVZ0 ,Video Window 0 vertical direction zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x04 1. " VFF0 ,Video Window 0 display mode" "Field,Frame" bitfld.long 0x04 0. " ACT0 ,Sets image display on/off Video Window 0" "Off,On" line.long 0x08 "OSDWIN0MD,OSD Window 0 Mode Setup Register" bitfld.long 0x08 14. " ATN0E ,Attenuation enable for REC601" "Normal,Attenuated" bitfld.long 0x08 13. " RGB0E ,RGB input for window 0 enable" "Bitmap,16-bit RGB" bitfld.long 0x08 12. " CLUTS0 ,CLUT select for OSD Window 0" "ROM-look-up,RAM-look-up" textline " " bitfld.long 0x08 10.--11. " OHZ0 ,OSD Window0 Horizontal Zoom" "x1,x2,x4,?..." bitfld.long 0x08 8.--9. " OVZ0 ,OSD Window0 Vertical Zoom" "x1,x2,x4,?..." bitfld.long 0x08 6.--7. " BMW0 ,Bitmap bit width for OSD window 0" "1-bit,2-bits,4-bits,8-bits" textline " " bitfld.long 0x08 3.--5. " BLND0 ,Blending ratio between OSD window 0" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0" bitfld.long 0x08 2. " TE0 ,Transparency Enable for OSD Window 0" "Disabled,Enabled" bitfld.long 0x08 1. " OFF0 ,OSD Window 0 Display Mode" "Field,Frame" textline " " bitfld.long 0x08 0. " OACT0 ,OSD Window 0 Active (displayed)" "Off,On" if (((d.l(asd:0x01c72600+0xc))&0x8000)==0x0) group.long 0x0c++0x03 line.long 0x00 "OSDWIN1MD,OSD Window 1 Mode Setup Register" bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window1,Attribute" bitfld.long 0x00 14. " ATN1E ,Attenuation enable for REC601" "Normal,Attenuated" bitfld.long 0x00 13. " RGB1E ,RGB input for window 1 enable" "Bitmap,16-bit RGB" textline " " bitfld.long 0x00 12. " CLUTS1 ,CLUT select for OSD Window 1" "ROM-look-up,RAM-look-up" bitfld.long 0x00 10.--11. " OHZ1 ,OSD Window1 Horizontal Zoom" "x1,x2,x4,?..." bitfld.long 0x00 8.--9. " OVZ1 ,OSD Window 1 Vertical Zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x00 6.--7. " BMW1 ,Bitmap bit width for OSD window 1" "1-bit,2-bits,4-bits,8-bits" bitfld.long 0x00 3.--5. " BLND1 ,Blending Ratio for OSD Window 1" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0" bitfld.long 0x00 2. " TE1 ,Transparency Enable for OSD Window 1" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " OFF1 ,OSD Window 1 Display Mode" "Field,Frame" bitfld.long 0x00 0. " OACT1 ,OSD Window 1 Active (displayed)" "Off,On" else group.long 0x0c++0x3 line.long 0x00 "OSDATRMD,OSD Attribute Window Mode Setup Register" bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window0,Attribute" bitfld.long 0x00 10.--11. " OHZA ,OSD Attribute Window Horizontal Zoom" "x1,x2,x4,?..." bitfld.long 0x00 8.--9. " OVZA ,OSD attribute window vertical zoom" "x1,x2,x4,?..." textline " " bitfld.long 0x00 6.--7. " BLNKINT ,Blinking Interval" "1-unit,2-units,3-units,4-units" bitfld.long 0x00 1. " OFFA ,OSD Attribute Window Display Mode" "Field,Frame" bitfld.long 0x00 0. " BLNK ,OSD Attribute Window Blink Enable" "Disabled,Enabled" textline " " textline " " endif group.long 0x10++0x3 line.long 0x00 "RECTCUR,Rectangular Cursor Setup Register" hexmask.long.byte 0x00 8.--15. 1. " RCAD ,Rectangular cursor color palette address" bitfld.long 0x00 7. " CLUTSR ,CLUT Select" "ROM-look-up,RAM-look-up" bitfld.long 0x00 4.--6. " RCHW ,Rectangular Cursor Horizontal Line Width" "1 pixel,4 pixels,8 pixels,12 pixels,16 pixels,20 pixels,24 pixels,28 pixels" textline " " bitfld.long 0x00 1.--3. " RCVW ,Rectangular Cursor Vertical Line Width" "1 line,2 lines,4 lines,6 lines,8 lines,10 lines,12 lines,14 lines" bitfld.long 0x00 0. " RCACT ,Rectangular Cursor Active (displayed)" "Off,On" group.long 0x18++0x0f line.long 0x00 "VIDWIN0OFST,Video Window 0 Offset Register" hexmask.long.word 0x00 0.--8. 1. " V0LO ,Video Window 0 Line Offset" line.long 0x04 "VIDWIN1OFST,Video Window 1 Offset Register" hexmask.long.word 0x04 0.--8. 1. " V1LO ,Video Window 1 Line Offset" line.long 0x08 "OSDWIN0OFST,OSD Window 0 Offset Register" hexmask.long.word 0x08 0.--8. 1. " O0LO ,OSD Window 0 Line Offset" line.long 0x0c "OSDWIN1OFST,OSD Window 1 Offset Register" hexmask.long.word 0x0c 0.--8. 1. " O1LO ,OSD Window 1 Line Offset" group.long 0x2c++0x07 line.long 0x00 "VIDWIN0ADR,Video Window 0 Address Register" line.long 0x04 "VIDWIN1ADR,Video Window 1 Address Register" group.long 0x38++0x5f line.long 0x00 "OSDWIN0ADR,OSD Window 0 Address Register" line.long 0x04 "OSDWIN1ADR,OSD Window 1 Address Register" line.long 0x08 "BASEPX,Base Pixel X Register" hexmask.long.word 0x08 0.--9. 1. " BPX ,Base Pixel in X" line.long 0x0c "BASEPY,Base Pixel Y Register" hexmask.long.word 0x0c 0.--8. 1. " BPY ,Base Pixel in Y" line.long 0x10 "VIDWIN0XP,Video Window 0 X-Position Register" hexmask.long.word 0x10 0.--9. 1. " V0X ,Video Window 0 X-Position" line.long 0x14 "VIDWIN0YP,Video Window 0 Y-Position Register" hexmask.long.word 0x14 0.--8. 1. " V0Y ,Video Window 0 Y-Position" line.long 0x18 "VIDWIN0XL,Video Window 0 X-Size Register" hexmask.long.word 0x18 0.--11. 1. " V0W ,Video Window 0 X-Width" line.long 0x1c "VIDWIN0YL,Video Window 0 Y-Size Register" hexmask.long.word 0x1c 0.--10. 1. " V0H ,Video Window 0 Y-Height" line.long 0x20 "VIDWIN1XP,Video Window 1 X-Position Register" hexmask.long.word 0x20 0.--9. 1. " V1X ,Video Window 1 X-Position" line.long 0x24 "VIDWIN1YP,Video Window 1 Y-Position Register" hexmask.long.word 0x24 0.--8. 1. " V1Y ,Video Window 1 Y-Position" line.long 0x28 "VIDWIN1XL,Video Window 1 X-Size Register" hexmask.long.word 0x28 0.--11. 1. " V1W ,Video Window 1 X-Width" line.long 0x2c "VIDWIN1YL,Video Window 1 Y-Size Register" hexmask.long.word 0x2c 0.--10. 1. " V1H ,Video Window 1 Y-Height" line.long 0x30 "OSDWIN0XP,OSD Bitmap Window 0 X-Position Register" hexmask.long.word 0x30 0.--9. 1. " W0X ,OSD Window 0 X-Position" line.long 0x34 "OSDWIN0YP,OSD Bitmap Window 0 Y-Position Register" hexmask.long.word 0x34 0.--8. 1. " W0Y ,OSD Window 0 Y-Position" line.long 0x38 "OSDWIN0XL,OSD Bitmap Window 0 X-Size Register" hexmask.long.word 0x38 0.--11. 1. " W0W ,OSD Window 0 X-Width" line.long 0x3c "OSDWIN0YL,OSD Bitmap Window 0 Y-Size Register" hexmask.long.word 0x3c 0.--10. 1. " W0H ,OSD Window 0 Y-Height" line.long 0x40 "OSDWIN1XP,OSD Bitmap Window 1 X-Position Register" hexmask.long.word 0x40 0.--9. 1. " W1X ,OSD Window 1 X-Position" line.long 0x44 "OSDWIN1YP,OSD Bitmap Window 1 Y-Position Register" hexmask.long.word 0x44 0.--8. 1. " W1Y ,OSD Window 1 Y-Position" line.long 0x48 "OSDWIN1XL,OSD Bitmap Window 1 X-Size Register" hexmask.long.word 0x48 0.--11. 1. " W1W ,OSD Window 1 X-Width" line.long 0x4c "OSDWIN1YL,OSD Bitmap Window 1 Y-Size Register" hexmask.long.word 0x4c 0.--10. 1. " W1H ,OSD Window 1 Y-Height" line.long 0x50 "CURXP,Rectangular Cursor Window X-Position Register" hexmask.long.word 0x50 0.--9. 1. " RCSX ,Rectangular Cursor Window X-Position" line.long 0x54 "CURYP,Rectangular Cursor Window Y-Position Register" hexmask.long.word 0x54 0.--8. 1. " RCSY ,Rectangular Cursor Window Y-Position" line.long 0x58 "CURXL,Rectangular Cursor Window X-Size Register" hexmask.long.word 0x58 0.--11. 1. " RCSW ,Rectangular Cursor Window X-Width" line.long 0x5c "CURYL,Rectangular Cursor Window Y-Size Register" hexmask.long.word 0x5c 0.--10. 1. " RCSH ,Rectangular Cursor Window Y-Height" group.long 0xa0++0x1f line.long 0x0 "W0BMP01,Window 0 Bitmap Value to Palette Map 0/1 Register" hexmask.long.byte 0x0 8.--15. 1. " PAL00 ,Palette Address for Bitmap Value [1;x;x] - OSD Window 0" hexmask.long.byte 0x0 0.--7. 1. " PAL01 ,Palette Address for Bitmap Value [0;0;0] - OSD Window 0" line.long 0x4 "W0BMP23,Window 0 Bitmap Value to Palette Map 2/3 Register" hexmask.long.byte 0x4 8.--15. 1. " PAL02 ,Palette Address for Bitmap Value [3;x;x] - OSD Window 0" hexmask.long.byte 0x4 0.--7. 1. " PAL03 ,Palette Address for Bitmap Value [2;x;x] - OSD Window 0" line.long 0x8 "W0BMP45,Window 0 Bitmap Value to Palette Map 4/5 Register" hexmask.long.byte 0x8 8.--15. 1. " PAL04 ,Palette Address for Bitmap Value [5;1;x] - OSD Window 0" hexmask.long.byte 0x8 0.--7. 1. " PAL05 ,Palette Address for Bitmap Value [4;x;x] - OSD Window 0" line.long 0xC "W0BMP67,Window 0 Bitmap Value to Palette Map 6/7 Register" hexmask.long.byte 0xC 8.--15. 1. " PAL06 ,Palette Address for Bitmap Value [7;x;x] - OSD Window 0" hexmask.long.byte 0xC 0.--7. 1. " PAL07 ,Palette Address for Bitmap Value [6;x;x] - OSD Window 0" line.long 0x10 "W0BMP89,Window 0 Bitmap Value to Palette Map 8/9 Register" hexmask.long.byte 0x10 8.--15. 1. " PAL08 ,Palette Address for Bitmap Value [9;x;x] - OSD Window 0" hexmask.long.byte 0x10 0.--7. 1. " PAL09 ,Palette Address for Bitmap Value [8;x;x] - OSD Window 0" line.long 0x14 "W0BMPAB,Window 0 Bitmap Value to Palette Map A/B Register" hexmask.long.byte 0x14 8.--15. 1. " PAL0A ,Palette Address for Bitmap Value [B;x;x] - OSD Window 0" hexmask.long.byte 0x14 0.--7. 1. " PAL0B ,Palette Address for Bitmap Value [A;2;x] - OSD Window 0" line.long 0x18 "W0BMPCD,Window 0 Bitmap Value to Palette Map C/D Register" hexmask.long.byte 0x18 8.--15. 1. " PAL0C ,Palette Address for Bitmap Value [D;x;x] - OSD Window 0" hexmask.long.byte 0x18 0.--7. 1. " PAL0D ,Palette Address for Bitmap Value [C;x;x] - OSD Window 0" line.long 0x1C "W0BMPEF,Window 0 Bitmap Value to Palette Map E/F Register" hexmask.long.byte 0x1C 8.--15. 1. " PAL0E ,Palette Address for Bitmap Value [F;3;1] - OSD Window 0" hexmask.long.byte 0x1C 0.--7. 1. " PAL0F ,Palette Address for Bitmap Value [E;x;x] - OSD Window 0" group.long 0xc0++0x1f line.long 0x0 "W1BMP01,Window 1 Bitmap Value to Palette Map 0/1 Register" hexmask.long.byte 0x0 8.--15. 1. " PAL10 ,Palette Address for Bitmap Value [1;x;x] - OSD Window 1" hexmask.long.byte 0x0 0.--7. 1. " PAL11 ,Palette Address for Bitmap Value [0;0;0] - OSD Window 1" line.long 0x4 "W1BMP23,Window 1 Bitmap Value to Palette Map 2/3 Register" hexmask.long.byte 0x4 8.--15. 1. " PAL12 ,Palette Address for Bitmap Value [3;x;x] - OSD Window 1" hexmask.long.byte 0x4 0.--7. 1. " PAL13 ,Palette Address for Bitmap Value [2;x;x] - OSD Window 1" line.long 0x8 "W1BMP45,Window 1 Bitmap Value to Palette Map 4/5 Register" hexmask.long.byte 0x8 8.--15. 1. " PAL14 ,Palette Address for Bitmap Value [5;1;x] - OSD Window 1" hexmask.long.byte 0x8 0.--7. 1. " PAL15 ,Palette Address for Bitmap Value [4;x;x] - OSD Window 1" line.long 0xC "W1BMP67,Window 1 Bitmap Value to Palette Map 6/7 Register" hexmask.long.byte 0xC 8.--15. 1. " PAL16 ,Palette Address for Bitmap Value [7;x;x] - OSD Window 1" hexmask.long.byte 0xC 0.--7. 1. " PAL17 ,Palette Address for Bitmap Value [6;x;x] - OSD Window 1" line.long 0x10 "W1BMP89,Window 1 Bitmap Value to Palette Map 8/9 Register" hexmask.long.byte 0x10 8.--15. 1. " PAL18 ,Palette Address for Bitmap Value [9;x;x] - OSD Window 1" hexmask.long.byte 0x10 0.--7. 1. " PAL19 ,Palette Address for Bitmap Value [8;x;x] - OSD Window 1" line.long 0x14 "W1BMPAB,Window 1 Bitmap Value to Palette Map A/B Register" hexmask.long.byte 0x14 8.--15. 1. " PAL1A ,Palette Address for Bitmap Value [B;x;x] - OSD Window 1" hexmask.long.byte 0x14 0.--7. 1. " PAL1B ,Palette Address for Bitmap Value [A;2;x] - OSD Window 1" line.long 0x18 "W1BMPCD,Window 1 Bitmap Value to Palette Map C/D Register" hexmask.long.byte 0x18 8.--15. 1. " PAL1C ,Palette Address for Bitmap Value [D;x;x] - OSD Window 1" hexmask.long.byte 0x18 0.--7. 1. " PAL1D ,Palette Address for Bitmap Value [C;x;x] - OSD Window 1" line.long 0x1C "W1BMPEF,Window 1 Bitmap Value to Palette Map E/F Register" hexmask.long.byte 0x1C 8.--15. 1. " PAL1E ,Palette Address for Bitmap Value [F;3;1] - OSD Window 1" hexmask.long.byte 0x1C 0.--7. 1. " PAL1F ,Palette Address for Bitmap Value [E;x;x] - OSD Window 1" if (((data.long(asd:0x01c72600+0xe8))&0x02)==0x00) group.long 0xe8++0x03 line.long 0x00 "MISCCTL,Miscellaneous Control Register" bitfld.long 0x00 7. " RGBEN ,Video window RGB mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " RGBWIN ,Video window to use for RGB mode" "0,1" bitfld.long 0x00 4. " RSEL ,CLUT ROM selection" "CLUT0,CLUT1" textline " " bitfld.long 0x00 3. " CPBSY ,CLUT Write Busy" "Not busy,Busy" bitfld.long 0x00 2. " PPSW ,Ping-pong buffer toggle select" "VIDWIN0ADR,PPVWIN0ADR" bitfld.long 0x00 1. " PPRV ,Ping-pong buffer reverse" "Not inverted,Inverted" else group.long 0xe8++0x03 line.long 0x00 "MISCCTL,Miscellaneous Control Register" bitfld.long 0x00 7. " RGBEN ,Video window RGB mode enable" "Disabled,Enabled" bitfld.long 0x00 6. " RGBWIN ,Video window to use for RGB mode" "0,1" bitfld.long 0x00 4. " RSEL ,CLUT ROM selection" "CLUT0,CLUT1" textline " " bitfld.long 0x00 3. " CPBSY ,CLUT Write Busy" "Not busy,Busy" bitfld.long 0x00 2. " PPSW ,Ping-pong buffer toggle select" "PPVWIN0ADR,VIDWIN0ADR" bitfld.long 0x00 1. " PPRV ,Ping-pong buffer reverse" "Not inverted,Inverted" endif group.long 0xec++0x0b line.long 0x00 "CLUTRAMYCB,CLUT RAMYCB Setup Register" hexmask.long.byte 0x00 8.--15. 1. " Y ,Write data (Y) into built-in CLUT RAM" hexmask.long.byte 0x00 0.--7. 1. " CB ,Write data (Cb) into built-in CLUT RAM" line.long 0x04 "CLUTRAMCR,CLUT RAMCR Setup Register" hexmask.long.byte 0x04 8.--15. 1. " CR ,Write data (Cr) into built-in CLUT-RAM" hexmask.long.byte 0x04 0.--7. 1. " CADDR ,CLUT Write Pallette Address" line.long 0x08 "TRANSPVAL,Transparency Value Setup Register" hexmask.long.word 0x08 0.--15. 1. " RGBTRANS ,OSD window transparency value for RGB565 input mode" group.long 0xfc++0x03 line.long 0x00 "PPVWIN0ADR,Ping-Pong Video Window 0 Address Register" width 0xb tree.end tree.end tree "VPSS Registers" base asd:0x01c73400 width 5. rgroup.long 0x00++0x03 line.long 0x00 "PID,VPSS Peripheral Revision and Class Information Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral identification" hexmask.long.byte 0x00 8.--15. 1. " CID ,Class identification" hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral revision number" group.long 0x04++0x03 line.long 0x00 "PCR,VPSS Peripheral Control Register" bitfld.long 0x00 23. " CCDC_WBL_O ,Write buffer memory overflow (CCDC)" "No overflow,Overflow" bitfld.long 0x00 22. " PRV_WBL_O ,Write buffer memory overflow (Preview engine)" "No overflow,Overflow" bitfld.long 0x00 21. " RSZ1_WBL_O ,Write buffer memory overflow (Resizer line 1)" "No overflow,Overflow" textline " " bitfld.long 0x00 20. " RSZ2_WBL_O ,Write buffer memory overflow (Resizer line 2)" "No overflow,Overflow" bitfld.long 0x00 19. " RSZ3_WBL_O ,Write buffer memory overflow (Resizer line 3)" "No overflow,Overflow" bitfld.long 0x00 18. " RSZ4_WBL_O ,Write buffer memory overflow (Resizer line 4)" "No overflow,Overflow" textline " " bitfld.long 0x00 17. " AF_WBL_O ,Write buffer memory overflow (AF)" "No overflow,Overflow" bitfld.long 0x00 16. " AEW_WBL_O ,Write buffer memory overflow (AE/AWB)" "No overflow,Overflow" bitfld.long 0x00 0.--3. " DMI_PRI ,VBUSM priority in the system to the DDR EMIF" "0(highest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(lowest)" width 13. group.long 0x108++0x03 line.long 0x00 "SDR_REQ_EXP,SDRAM Non-Real-Time Read Request Expand Register" hexmask.long.word 0x00 20.--29. 1. " PRV_EXP ,Preview read request expand" hexmask.long.word 0x00 10.--19. 1. " RESZ_EXP ,Resizer read request expand" hexmask.long.word 0x00 0.--9. 1. " HIST_EXP ,Histogram read request expand" width 0xb tree.end tree.end tree.open "PLL Controllers" tree "PLL 1" base asd:0x01C40800 width 10. rgroup.long 0x00++0x3 line.long 0x00 "PID,PLL Controller Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Peripheral type" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Peripheral class" hexmask.long.byte 0x00 0.--7. 1. " REV ,Peripheral revision" rgroup.long 0xe4++0x03 line.long 0x00 "RSTYPE,Reset Type Status Register" bitfld.long 0x00 3. " SRST ,System reset" "No reset,Reset" bitfld.long 0x00 2. " MRST ,Maximum reset" "No reset,Reset" textline " " bitfld.long 0x00 1. " XWRST ,External warm reset" "No reset,Reset" bitfld.long 0x00 0. " POR ,Power on reset" "No reset,Reset" group.long 0x100++0x3 line.long 0x00 "PLLCTL,PLL Control Register" bitfld.long 0x00 8. " CLKMODE ,Reference clock selection" "Internal oscillator,CLKIN square wave" bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLLDIS ,PLL disable" "No,Yes" bitfld.long 0x00 3. " PLLRST ,PLL reset" "Reset,No reset" textline " " bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down" "Operation,Power-down" bitfld.long 0x00 0. " PLLEN ,PLL mode enable" "Bypass,PLL" width 10. group.long 0x110++0x3 line.long 0x00 "PLLM,PLL Multiplier Control Register" hexmask.long.byte 0x00 0.--4. 1. " PLLM ,PLL Multiplier Select" group.long 0x118++0x07 line.long 0x00 "PLLDIV1,PLL Controller Divider 1 Register" bitfld.long 0x00 15. " D1EN ,Divider 1 enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." line.long 0x04 "PLLDIV2,PLL Controller Divider 2 Register" bitfld.long 0x04 15. " D2EN ,Divider 2 enable" "Disabled,Enabled" bitfld.long 0x04 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." group.long 0x120++0x03 line.long 0x00 "PLLDIV3,PLL Controller Divider 3 Register" bitfld.long 0x00 15. " D3EN ,Divider 3 enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." group.long 0x128++0x7 line.long 0x00 "POSTDIV,PLL Post-Divider Control Register" bitfld.long 0x00 15. " POSTEN ,Post-Divider enable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "BPDIV,Bypass Divider Register" bitfld.long 0x04 15. " BPDEN ,Bypass divider enable" "Disabled,Enabled" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x138++0x3 line.long 0x00 "PLLCMD,PLL Controller Command Register" bitfld.long 0x00 0. " GOSET ,GO bit for SYSCLKx phase alignment" "No effect,Phase alignment" rgroup.long 0x13c++0x3 line.long 0x00 "PLLSTAT,PLL Controller Status Register" bitfld.long 0x00 2. " STABLE ,OSC counter done; oscillator assumed to be stable" "Not done,Done" bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress" group.long 0x140++0x3 line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register" bitfld.long 0x00 4. " ALN5 ,SYSCLK5 alignment" "Not aligned,Aligned" bitfld.long 0x00 3. " ALN4 ,SYSCLK4 alignment" "Not aligned,Aligned" bitfld.long 0x00 2. " ALN3 ,SYSCLK3 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned" bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned" rgroup.long 0x144++0x3 line.long 0x00 "DCHANGE,PLLDIV Ratio Change Status Register" bitfld.long 0x00 4. " SYS5 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified" group.long 0x148++0x3 line.long 0x00 "CKEN,Clock Enable Control Register" bitfld.long 0x00 0. " AUXEN ,AUXCLK enable" "Disabled,Enabled" rgroup.long 0x14c++0x03 line.long 0x00 "CKSTAT,Clock Status Register" bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On" bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On" rgroup.long 0x150++0x03 line.long 0x00 "SYSTAT,SYSCLK Status Register" bitfld.long 0x00 4. " SYS5ON ,SYSCLK5 on status" "Off,On" bitfld.long 0x00 3. " SYS4ON ,SYSCLK4 on status" "Off,On" bitfld.long 0x00 2. " SYS3ON ,SYSCLK3 on status" "Off,On" textline " " bitfld.long 0x00 1. " SYS2ON ,SYSCLK2 on status" "Off,On" bitfld.long 0x00 0. " SYS1ON ,SYSCLK1 on status" "Off,On" hgroup.long 0x160++0x03 hide.long 0x00 "PLLDIV4,PLL Controller Divider 4 Register" group.long 0x164++0x3 line.long 0x00 "PLLDIV5,PLL Controller Divider 5 Register" bitfld.long 0x00 15. " D5EN ,Divider 5 enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." width 0xb tree.end tree "PLL 2" base asd:0x01C40c00 width 10. rgroup.long 0x00++0x3 line.long 0x00 "PID,PLL Controller Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Peripheral type" hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Peripheral class" hexmask.long.byte 0x00 0.--7. 1. " REV ,Peripheral revision" group.long 0x100++0x3 line.long 0x00 "PLLCTL,PLL Control Register" bitfld.long 0x00 8. " CLKMODE ,Reference clock selection" "Internal oscillator,CLKIN square wave" bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PLLDIS ,PLL disable" "No,Yes" bitfld.long 0x00 3. " PLLRST ,PLL reset" "Reset,No reset" textline " " bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down" "Operation,Power-down" bitfld.long 0x00 0. " PLLEN ,PLL mode enable" "Bypass,PLL" width 10. group.long 0x110++0x3 line.long 0x00 "PLLM,PLL Multiplier Control Register" hexmask.long.byte 0x00 0.--4. 1. " PLLM ,PLL Multiplier Select" group.long 0x118++0x07 line.long 0x00 "PLLDIV1,PLL Controller Divider 1 Register" bitfld.long 0x00 15. " D1EN ,Divider 1 enable" "Disabled,Enabled" bitfld.long 0x00 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." line.long 0x04 "PLLDIV2,PLL Controller Divider 2 Register" bitfld.long 0x04 15. " D2EN ,Divider 2 enable" "Disabled,Enabled" bitfld.long 0x04 0.--3. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,%d..." group.long 0x128++0x7 line.long 0x00 "POSTDIV,PLL Post-Divider Control Register" bitfld.long 0x00 15. " POSTEN ,Post-Divider enable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" line.long 0x04 "BPDIV,Bypass Divider Register" bitfld.long 0x04 15. " BPDEN ,Bypass divider enable" "Disabled,Enabled" bitfld.long 0x04 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x138++0x3 line.long 0x00 "PLLCMD,PLL Controller Command Register" bitfld.long 0x00 0. " GOSET ,GO bit for SYSCLKx phase alignment" "No effect,Phase alignment" rgroup.long 0x13c++0x3 line.long 0x00 "PLLSTAT,PLL Controller Status Register" bitfld.long 0x00 2. " STABLE ,OSC counter done; oscillator assumed to be stable" "Not done,Done" bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress" group.long 0x140++0x3 line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register" bitfld.long 0x00 4. " ALN5 ,SYSCLK5 alignment" "Not aligned,Aligned" bitfld.long 0x00 3. " ALN4 ,SYSCLK4 alignment" "Not aligned,Aligned" bitfld.long 0x00 2. " ALN3 ,SYSCLK3 alignment" "Not aligned,Aligned" textline " " bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned" bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned" rgroup.long 0x144++0x3 line.long 0x00 "DCHANGE,PLLDIV Ratio Change Status Register" bitfld.long 0x00 4. " SYS5 ,SYSCLK5 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified" textline " " bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified" bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified" group.long 0x148++0x3 line.long 0x00 "CKEN,Clock Enable Control Register" bitfld.long 0x00 0. " AUXEN ,AUXCLK enable" "Disabled,Enabled" rgroup.long 0x14c++0x03 line.long 0x00 "CKSTAT,Clock Status Register" bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On" bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On" rgroup.long 0x150++0x03 line.long 0x00 "SYSTAT,SYSCLK Status Register" bitfld.long 0x00 4. " SYS5ON ,SYSCLK5 on status" "Off,On" bitfld.long 0x00 3. " SYS4ON ,SYSCLK4 on status" "Off,On" bitfld.long 0x00 2. " SYS3ON ,SYSCLK3 on status" "Off,On" textline " " bitfld.long 0x00 1. " SYS2ON ,SYSCLK2 on status" "Off,On" bitfld.long 0x00 0. " SYS1ON ,SYSCLK1 on status" "Off,On" width 0xb tree.end tree.end tree "PSC (Power and Sleep Controller)" base asd:0x01c41000 width 9. rgroup.long 0x00++0x3 line.long 0x00 "PID,Peripheral Revision and Class Information" bitfld.long 0x00 30.--31. " SCHEME ,Distinguishes between the old scheme and the current scheme" "0,1,2,3" hexmask.long.word 0x00 16.--27. 1. " FUNC ,Software compatible module family" hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision" textline " " bitfld.long 0x00 8.--10. " MAJOR ,Major Revision" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. " CUSTOM ,Special version for a particular device" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Revision" hgroup.long 0x10++0x03 hide.long 0x00 "GBLCTL,Global Control Register" wgroup.long 0x18++0x3 line.long 0x00 "INTEVAL,Interrupt Evaluation Register" bitfld.long 0x00 0. " ALLEV ,Evaluate PSC interrupt" "No effect,Re-evaluate" rgroup.long 0x40++0x7 line.long 0x00 "MERRPR0,Module Error Pending Register 0 (mod 0 - 31)" bitfld.long 0x00 31. " M031 ,Module interrupt status bit for module 31 (ARM)" "Not active,Active" bitfld.long 0x00 30. " M030 ,Module interrupt status bit for module 30 (System Module)" "Not active,Active" bitfld.long 0x00 29. " M029 ,Module interrupt status bit for module 29 (TIMER2)" "Not active,Active" bitfld.long 0x00 28. " M028 ,Module interrupt status bit for module 28 (TIMER1)" "Not active,Active" textline " " bitfld.long 0x00 27. " M027 ,Module interrupt status bit for module 27 (TIMER0)" "Not active,Active" bitfld.long 0x00 26. " M026 ,Module interrupt status bit for module 26 (GPIO)" "Not active,Active" bitfld.long 0x00 25. " M025 ,Module interrupt status bit for module 25 (PWM2)" "Not active,Active" bitfld.long 0x00 24. " M024 ,Module interrupt status bit for module 24 (PWM1)" "Not active,Active" textline " " bitfld.long 0x00 23. " M023 ,Module interrupt status bit for module 23 (PWM0)" "Not active,Active" bitfld.long 0x00 22. " M022 ,Module interrupt status bit for module 22 (SPI)" "Not active,Active" bitfld.long 0x00 21. " M021 ,Module interrupt status bit for module 21 (UART2)" "Not active,Active" bitfld.long 0x00 20. " M020 ,Module interrupt status bit for module 20 (UART1)" "Not active,Active" textline " " bitfld.long 0x00 19. " M019 ,Module interrupt status bit for module 19 (UART0)" "Not active,Active" bitfld.long 0x00 18. " M018 ,Module interrupt status bit for module 18 (I2C)" "Not active,Active" bitfld.long 0x00 17. " M017 ,Module interrupt status bit for module 17 (ASP)" "Not active,Active" bitfld.long 0x00 15. " M015 ,Module interrupt status bit for module 15 (MMC/SD/SDIO)" "Not active,Active" textline " " bitfld.long 0x00 14. " M014 ,Module interrupt status bit for module 14 (EMIFA)" "Not active,Active" bitfld.long 0x00 13. " M013 ,Module interrupt status bit for module 13 (DDR2)" "Not active,Active" bitfld.long 0x00 12. " M012 ,Module interrupt status bit for module 12 (HPI)" "Not active,Active" bitfld.long 0x00 9. " M09 ,Module interrupt status bit for module 9 (USB)" "Not active,Active" textline " " bitfld.long 0x00 6. " M06 ,Module interrupt status bit for module 6 (EMAC Memory Controller)" "Not active,Active" bitfld.long 0x00 5. " M05 ,Module interrupt status bit for module 5 (EMAC)" "Not active,Active" bitfld.long 0x00 4. " M04 ,Module interrupt status bit for module 4 (EDMATC1)" "Not active,Active" bitfld.long 0x00 3. " M03 ,Module interrupt status bit for module 3 (EDMATC0)" "Not active,Active" textline " " bitfld.long 0x00 2. " M02 ,Module interrupt status bit for module 2 (EDMACC)" "Not active,Active" bitfld.long 0x00 1. " M01 ,Module interrupt status bit for module 1 (VPSS MMR)" "Not active,Active" bitfld.long 0x00 0. " M00 ,Module interrupt status bit for module 0 (VPSS DMA)" "Not active,Active" line.long 0x04 "MERRPR1,Module Error Pending Register 1 (mod 32 - 40)" bitfld.long 0x04 6. " M38 ,Module interrupt status bit for module 38 (Internal Bus)" "Not active,Active" bitfld.long 0x04 5. " M37 ,Module interrupt status bit for module 37 (Internal Bus)" "Not active,Active" bitfld.long 0x04 4. " M36 ,Module interrupt status bit for module 36 (Internal Bus)" "Not active,Active" bitfld.long 0x04 3. " M35 ,Module interrupt status bit for module 35 (Internal Bus)" "Not active,Active" textline " " bitfld.long 0x04 2. " M34 ,Module interrupt status bit for module 34 (Internal Bus)" "Not active,Active" bitfld.long 0x04 1. " M33 ,Module interrupt status bit for module 33 (Internal Bus)" "Not active,Active" bitfld.long 0x04 0. " M32 ,Module interrupt status bit for module 32 (Internal Bus)" "Not active,Active" wgroup.long 0x50++0x7 line.long 0x00 "MERRCR0,Module Error Clear Register 0 (mod 0-31)" bitfld.long 0x00 31. " M31 ,Module interrupt status bit clear for module 31 (ARM)" "No effect,Clear" bitfld.long 0x00 30. " M30 ,Module interrupt status bit clear for module 30 (System Module)" "No effect,Clear" bitfld.long 0x00 29. " M29 ,Module interrupt status bit clear for module 29 (TIMER2)" "No effect,Clear" bitfld.long 0x00 28. " M28 ,Module interrupt status bit clear for module 28 (TIMER1)" "No effect,Clear" textline " " bitfld.long 0x00 27. " M27 ,Module interrupt status bit clear for module 27 (TIMER0)" "No effect,Clear" bitfld.long 0x00 26. " M26 ,Module interrupt status bit clear for module 26 (GPIO)" "No effect,Clear" bitfld.long 0x00 25. " M25 ,Module interrupt status bit clear for module 25 (PWM2)" "No effect,Clear" bitfld.long 0x00 24. " M24 ,Module interrupt status bit clear for module 24 (PWM1)" "No effect,Clear" textline " " bitfld.long 0x00 23. " M23 ,Module interrupt status bit clear for module 23 (PWM0)" "No effect,Clear" bitfld.long 0x00 22. " M22 ,Module interrupt status bit clear for module 22 (SPI)" "No effect,Clear" bitfld.long 0x00 21. " M21 ,Module interrupt status bit clear for module 21 (UART2)" "No effect,Clear" bitfld.long 0x00 20. " M20 ,Module interrupt status bit clear for module 20 (UART1)" "No effect,Clear" textline " " bitfld.long 0x00 19. " M19 ,Module interrupt status bit clear for module 19 (UART0)" "No effect,Clear" bitfld.long 0x00 18. " M18 ,Module interrupt status bit clear for module 18 (I2C)" "No effect,Clear" bitfld.long 0x00 17. " M17 ,Module interrupt status bit clear for module 17 (ASP)" "No effect,Clear" bitfld.long 0x00 15. " M15 ,Module interrupt status bit clear for module 15 (MMC/SD/SDIO)" "No effect,Clear" textline " " bitfld.long 0x00 14. " M14 ,Module interrupt status bit clear for module 14 (EMIFA)" "No effect,Clear" bitfld.long 0x00 13. " M13 ,Module interrupt status bit clear for module 13 (DDR2)" "No effect,Clear" bitfld.long 0x00 12. " M12 ,Module interrupt status bit clear for module 12 (HPI)" "No effect,Clear" bitfld.long 0x00 9. " M9 ,Module interrupt status bit clear for module 9 (USB)" "No effect,Clear" textline " " bitfld.long 0x00 6. " M6 ,Module interrupt status bit clear for module 6 (EMAC Memory Controller)" "No effect,Clear" bitfld.long 0x00 5. " M5 ,Module interrupt status bit clear for module 5 (EMAC)" "No effect,Clear" bitfld.long 0x00 4. " M4 ,Module interrupt status bit clear for module 4 (EDMATC1)" "No effect,Clear" bitfld.long 0x00 3. " M3 ,Module interrupt status bit clear for module 3 (EDMATC0)" "No effect,Clear" textline " " bitfld.long 0x00 2. " M2 ,Module interrupt status bit clear for module 2 (EDMACC)" "No effect,Clear" bitfld.long 0x00 1. " M1 ,Module interrupt status bit clear for module 1 (VPSS MMR)" "No effect,Clear" bitfld.long 0x00 0. " M0 ,Module interrupt status bit clear for module 0 (VPSS DMA)" "No effect,Clear" line.long 0x04 "MERRCR1,Module Error Clear Register 1 (mod 32-40)" bitfld.long 0x04 6. " M38 ,Module interrupt status bit clear for module 38 (Internal Bus)" "No effect,Clear" bitfld.long 0x04 5. " M37 ,Module interrupt status bit clear for module 37 (Internal Bus)" "No effect,Clear" bitfld.long 0x04 4. " M36 ,Module interrupt status bit clear for module 36 (Internal Bus)" "No effect,Clear" bitfld.long 0x04 3. " M35 ,Module interrupt status bit clear for module 35 (Internal Bus)" "No effect,Clear" textline " " bitfld.long 0x04 2. " M34 ,Module interrupt status bit clear for module 34 (Internal Bus)" "No effect,Clear" bitfld.long 0x04 1. " M33 ,Module interrupt status bit clear for module 33 (Internal Bus)" "No effect,Clear" bitfld.long 0x04 0. " M32 ,Module interrupt status bit clear for module 32 (Internal Bus)" "No effect,Clear" width 9. rgroup.long 0x60++0x3 line.long 0x00 "PERRPR,Power Error Pending Register" bitfld.long 0x00 0. " P ,Always On Power domain interrupt status" "Not active,Active" wgroup.long 0x68++0x3 line.long 0x00 "PERRCR,Power Error Clear Register" bitfld.long 0x00 0. " P ,Clear Always On power domain interrupt" "No effect,Clear" hgroup.long 0x70++0x03 hide.long 0x00 "EPCPR,External Power Error Pending Register" hgroup.long 0x78++0x03 hide.long 0x00 "EPCCR,External Power Control Clear Register" hgroup.long 0x100++0x0b hide.long 0x00 "RAILSTAT,Power Rail Status Register" hide.long 0x04 "RAILCTL,Power Rail Control Register" hide.long 0x08 "RAILSEL,Power Rail Counter Select Register" wgroup.long 0x120++0x3 line.long 0x00 "PTCMD,Power Domain Transition Command Register" bitfld.long 0x00 0. " GO ,Always On Power domain GO transition command" "No effect,Evaluated" rgroup.long 0x128++0x3 line.long 0x00 "PTSTAT,Power Domain Transition Status Register" bitfld.long 0x00 0. " GOSTAT ,Always On Power domain transition status" "No transition,In progress" rgroup.long 0x200++0x3 line.long 0x00 "PDSTAT0,Power Domain Status n Register" bitfld.long 0x00 11. " EMUIHB ,Emulation alters domain state" "Not active,Active" bitfld.long 0x00 9. " PORDONE ,Power_On_Reset (POR) Done status" "Not done,Done" bitfld.long 0x00 8. " POR ,Power Domain Power_On_Reset (POR) status" "Asserted,Not asserted" textline " " bitfld.long 0x00 4. " STATE4 ,Power Domain Status" "Off,On" bitfld.long 0x00 3. " STATE3 ,Power Domain Status" "Off,On" bitfld.long 0x00 2. " STATE2 ,Power Domain Status" "Off,On" textline " " bitfld.long 0x00 1. " STATE1 ,Power Domain Status" "Off,On" bitfld.long 0x00 0. " STATE0 ,Power Domain Status" "Off,On" group.long 0x300++0x3 line.long 0x00 "PDCTL0,Power Domain Control n Register" bitfld.long 0x00 9. " EMUIHBIE ,Emulation alters power domain state interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " EPCGOOD ,External power control power good indication" "Off,On" bitfld.long 0x00 0. " NEXT ,Power domain next state" "Off,On" hgroup.long 0x04++0x0b hide.long 0x00 "MPFSR,Memory Protection Fault Status Register" hide.long 0x04 "MPFCR,Memory Protection Fault Command Register" hide.long 0x08 "MPAA,Memory Protection Page Attribute Register" width 9. tree "MDCFG 0-40 Registers" hgroup.long 0x600++0x03 hide.long 0x00 "MDCFG0,Module Configuration 0 Register (VPSS DMA)" hgroup.long 0x604++0x03 hide.long 0x00 "MDCFG1,Module Configuration 1 Register (VPSS MMR)" hgroup.long 0x608++0x03 hide.long 0x00 "MDCFG2,Module Configuration 2 Register (EDMACC)" hgroup.long 0x60C++0x03 hide.long 0x00 "MDCFG3,Module Configuration 3 Register (EDMATC0)" hgroup.long 0x610++0x03 hide.long 0x00 "MDCFG4,Module Configuration 4 Register (EDMATC1)" hgroup.long 0x614++0x03 hide.long 0x00 "MDCFG5,Module Configuration 5 Register (EMAC)" hgroup.long 0x618++0x03 hide.long 0x00 "MDCFG6,Module Configuration 6 Register (EMAC Memory Controller)" hgroup.long 0x624++0x03 hide.long 0x00 "MDCFG9,Module Configuration 9 Register (USB)" hgroup.long 0x630++0x03 hide.long 0x00 "MDCFG12,Module Configuration 12 Register (HPI)" hgroup.long 0x634++0x03 hide.long 0x00 "MDCFG13,Module Configuration 13 Register (DDR2)" hgroup.long 0x638++0x03 hide.long 0x00 "MDCFG14,Module Configuration 14 Register (EMIFA)" hgroup.long 0x63C++0x03 hide.long 0x00 "MDCFG15,Module Configuration 15 Register (MMC/SD/SDIO)" hgroup.long 0x644++0x03 hide.long 0x00 "MDCFG17,Module Configuration 17 Register (ASP)" hgroup.long 0x648++0x03 hide.long 0x00 "MDCFG18,Module Configuration 18 Register (I2C)" hgroup.long 0x64C++0x03 hide.long 0x00 "MDCFG19,Module Configuration 19 Register (UART0)" hgroup.long 0x650++0x03 hide.long 0x00 "MDCFG20,Module Configuration 20 Register (UART1)" hgroup.long 0x654++0x03 hide.long 0x00 "MDCFG21,Module Configuration 21 Register (UART2)" hgroup.long 0x658++0x03 hide.long 0x00 "MDCFG22,Module Configuration 22 Register (SPI)" hgroup.long 0x65C++0x03 hide.long 0x00 "MDCFG23,Module Configuration 23 Register (PWM0)" hgroup.long 0x660++0x03 hide.long 0x00 "MDCFG24,Module Configuration 24 Register (PWM1)" hgroup.long 0x664++0x03 hide.long 0x00 "MDCFG25,Module Configuration 25 Register (PWM2)" hgroup.long 0x668++0x03 hide.long 0x00 "MDCFG26,Module Configuration 26 Register (GPIO)" hgroup.long 0x66C++0x03 hide.long 0x00 "MDCFG27,Module Configuration 27 Register (TIMER0)" hgroup.long 0x670++0x03 hide.long 0x00 "MDCFG28,Module Configuration 28 Register (TIMER1)" hgroup.long 0x674++0x03 hide.long 0x00 "MDCFG29,Module Configuration 29 Register (TIMER2)" hgroup.long 0x678++0x03 hide.long 0x00 "MDCFG30,Module Configuration 30 Register (System Module)" hgroup.long 0x67C++0x03 hide.long 0x00 "MDCFG31,Module Configuration 31 Register (ARM)" hgroup.long 0x680++0x03 hide.long 0x00 "MDCFG32,Module Configuration 32 Register (Internal Bus)" hgroup.long 0x684++0x03 hide.long 0x00 "MDCFG33,Module Configuration 33 Register (Internal Bus)" hgroup.long 0x688++0x03 hide.long 0x00 "MDCFG34,Module Configuration 34 Register (Internal Bus)" hgroup.long 0x68C++0x03 hide.long 0x00 "MDCFG35,Module Configuration 35 Register (Internal Bus)" hgroup.long 0x690++0x03 hide.long 0x00 "MDCFG36,Module Configuration 36 Register (Internal Bus)" hgroup.long 0x694++0x03 hide.long 0x00 "MDCFG37,Module Configuration 37 Register (Internal Bus)" hgroup.long 0x698++0x03 hide.long 0x00 "MDCFG38,Module Configuration 38 Register (Internal Bus)" tree.end width 9. tree "MDSTAT 0-40 Registers" rgroup.long 0x800--0x81f line.long 0x0 "MDSTAT0,Module Status 0 Register (VPSS DMA)" bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x0 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x0 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x4 "MDSTAT1,Module Status 1 Register (VPSS MMR)" bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x4 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x4 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x8 "MDSTAT2,Module Status 2 Register (EDMACC)" bitfld.long 0x8 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x8 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x8 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0xC "MDSTAT3,Module Status 3 Register (EDMATC0)" bitfld.long 0xC 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0xC 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0xC 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x10 "MDSTAT4,Module Status 4 Register (EDMATC1)" bitfld.long 0x10 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x10 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x10 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x10 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x10 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x10 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x14 "MDSTAT5,Module Status 5 Register (EMAC)" bitfld.long 0x14 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x14 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x14 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x14 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x14 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x14 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x18 "MDSTAT6,Module Status 6 Register (EMAC Memory Controller)" bitfld.long 0x18 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x18 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x18 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x18 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x18 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x18 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" rgroup.long 0x824++0x03 line.long 0x00 "MDSTAT9,Module Status 9 Register (USB)" bitfld.long 0x00 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x00 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x00 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x00 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x00 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x00 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x00 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" rgroup.long 0x830--0x83f line.long 0x0 "MDSTAT12,Module Status 12 Register (HPI)" bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x0 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x0 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x4 "MDSTAT13,Module Status 13 Register (DDR 2)" bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x4 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x4 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x8 "MDSTAT14,Module Status 14 Register (EMIFA)" bitfld.long 0x8 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x8 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x8 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0xC "MDSTAT15,Module Status 15 Register (MMC/SD/SDIO)" bitfld.long 0xC 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0xC 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0xC 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" rgroup.long 0x844--0x89b line.long 0x0 "MDSTAT17,Module Status 17 Register (ASP)" bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x0 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x0 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x4 "MDSTAT18,Module Status 18 Register (I2C)" bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x4 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x4 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x8 "MDSTAT19,Module Status 19 Register (UART0)" bitfld.long 0x8 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x8 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x8 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x8 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x8 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x8 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0xC "MDSTAT20,Module Status 20 Register (UART1)" bitfld.long 0xC 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0xC 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0xC 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0xC 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0xC 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0xC 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x10 "MDSTAT21,Module Status 21 Register (UART2)" bitfld.long 0x10 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x10 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x10 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x10 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x10 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x10 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x14 "MDSTAT22,Module Status 22 Register (SPI)" bitfld.long 0x14 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x14 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x14 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x14 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x14 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x14 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x18 "MDSTAT23,Module Status 23 Register (PWM0)" bitfld.long 0x18 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x18 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x18 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x18 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x18 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x18 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x1C "MDSTAT24,Module Status 24 Register (PWM1)" bitfld.long 0x1C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x1C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x1C 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x1C 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x1C 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x1C 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x20 "MDSTAT25,Module Status 25 Register (PWM2)" bitfld.long 0x20 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x20 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x20 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x20 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x20 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x20 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x24 "MDSTAT26,Module Status 26 Register (GPIO)" bitfld.long 0x24 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x24 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x24 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x24 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x24 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x24 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x28 "MDSTAT27,Module Status 27 Register (TIMER0)" bitfld.long 0x28 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x28 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x28 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x28 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x28 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x28 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x28 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x2C "MDSTAT28,Module Status 28 Register (TIMER1)" bitfld.long 0x2C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x2C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x2C 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x2C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x2C 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x2C 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x2C 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x30 "MDSTAT29,Module Status 29 Register (TIMER2)" bitfld.long 0x30 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x30 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x30 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x30 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x30 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x30 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x30 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x34 "MDSTAT30,Module Status 30 Register (System Module)" bitfld.long 0x34 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x34 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x34 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x34 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x34 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x34 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x34 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x38 "MDSTAT31,Module Status 31 Register (ARM)" bitfld.long 0x38 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x38 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x38 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x38 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x38 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x38 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x38 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x3C "MDSTAT32,Module Status 32 Register (Internal Bus)" bitfld.long 0x3C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x3C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x3C 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x3C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x3C 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x3C 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x3C 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x40 "MDSTAT33,Module Status 33 Register (Internal Bus)" bitfld.long 0x40 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x40 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x40 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x40 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x40 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x40 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x40 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x44 "MDSTAT34,Module Status 34 Register (Internal Bus)" bitfld.long 0x44 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x44 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x44 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x44 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x44 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x44 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x44 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x48 "MDSTAT35,Module Status 35 Register (Internal Bus)" bitfld.long 0x48 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x48 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x48 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x48 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x48 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x48 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x48 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x4C "MDSTAT36,Module Status 36 Register (Internal Bus)" bitfld.long 0x4C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x4C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x4C 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x4C 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x4C 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x4C 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x4C 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x50 "MDSTAT37,Module Status 37 Register (Internal Bus)" bitfld.long 0x50 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x50 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x50 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x50 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x50 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x50 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x50 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" line.long 0x54 "MDSTAT38,Module Status 38 Register (Internal Bus)" bitfld.long 0x54 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active" bitfld.long 0x54 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active" bitfld.long 0x54 12. " MCKOUT ,Module clock output status" "Off,On" textline " " bitfld.long 0x54 11. " MRSTDONE ,Module reset done" "Not done,Done" bitfld.long 0x54 10. " MRST ,Module reset status" "Asserted,Not asserted" bitfld.long 0x54 9. " LRSTDONE ,Local reset done" "Not done,Done" textline " " bitfld.long 0x54 0.--5. " STATE ,Module state status" "SwRstDisable,SyncReset,Disabled,Enabled,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition,Indicated transition" tree.end width 9. tree "MDCTL 0-40 Registers" group.long 0xa00--0xa1f line.long 0x0 "MDCTL0,Module Control 0 Register (VPSS DMA)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL1,Module Control 1 Register (VPSS MMR)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL2,Module Control 2 Register (EDMACC)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL3,Module Control 3 Register (EDMATC0)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x10 "MDCTL4,Module Control 4 Register (EDMATC1)" bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x10 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x14 "MDCTL5,Module Control 5 Register (EMAC)" bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x14 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x18 "MDCTL6,Module Control 6 Register (EMAC Memory Controller)" bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x18 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa24++0x03 line.long 0x00 "MDCTL9,Module Control 9 Register (USB)" bitfld.long 0x00 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x00 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x00 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa30--0xa3f line.long 0x0 "MDCTL12,Module Control 12 Register (HPI)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL13,Module Control 13 Register (DDR 2)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL14,Module Control 14 Register (EMIFA)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL15,Module Control 15 Register (MMC/SD/SDIO)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." group.long 0xa44--0xa9b line.long 0x0 "MDCTL17,Module Control 17 Register (ASP)" bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x0 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4 "MDCTL18,Module Control 18 Register (I2C)" bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x8 "MDCTL19,Module Control 19 Register (UART0)" bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x8 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0xC "MDCTL20,Module Control 20 Register (UART1)" bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0xC 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x10 "MDCTL21,Module Control 21 Register (UART2)" bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x10 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x14 "MDCTL22,Module Control 22 Register (SPI)" bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x14 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x18 "MDCTL23,Module Control 23 Register (PWM0)" bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x18 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x1C "MDCTL24,Module Control 24 Register (PWM1)" bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x1C 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x20 "MDCTL25,Module Control 25 Register (PWM2)" bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x20 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x24 "MDCTL26,Module Control 26 Register (GPIO)" bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x24 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x28 "MDCTL27,Module Control 27 Register (TIMER0)" bitfld.long 0x28 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x28 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x28 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x2C "MDCTL28,Module Control 28 Register (TIMER1)" bitfld.long 0x2C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x2C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x2C 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x30 "MDCTL29,Module Control 29 Register (TIMER2)" bitfld.long 0x30 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x30 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x30 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x34 "MDCTL30,Module Control 30 Register (System Module)" bitfld.long 0x34 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x34 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x34 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x38 "MDCTL31,Module Control 31 Register (ARM)" bitfld.long 0x38 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x38 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x38 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x3C "MDCTL32,Module Control 32 Register (Internal Bus)" bitfld.long 0x3C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x3C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x3C 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x40 "MDCTL33,Module Control 33 Register (Internal Bus)" bitfld.long 0x40 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x40 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x40 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x44 "MDCTL34,Module Control 34 Register (Internal Bus)" bitfld.long 0x44 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x44 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x44 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x48 "MDCTL35,Module Control 35 Register (Internal Bus)" bitfld.long 0x48 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x48 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x48 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x4C "MDCTL36,Module Control 36 Register (Internal Bus)" bitfld.long 0x4C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x4C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x4C 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x50 "MDCTL37,Module Control 37 Register (Internal Bus)" bitfld.long 0x50 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x50 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x50 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." line.long 0x54 "MDCTL38,Module Control 38 Register (Internal Bus)" bitfld.long 0x54 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled" bitfld.long 0x54 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled" bitfld.long 0x54 0.--2. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disabled,Enabled,?..." tree.end width 0xb tree.end tree "INTC (Interrupt Controller)" base asd:0x01C48000 width 10. group.long 0x00++0x0f line.long 0x00 "FIQ0,Fast Interrupt Request Status Register 0" bitfld.long 0x00 30. " FIQ[30] ,Interrupt status of INT 30 (AEMIFINT)" "No interrupt,Interrupt" bitfld.long 0x00 29. " FIQ[29] ,Interrupt status of INT 29 (DDRINT)" "No interrupt,Interrupt" bitfld.long 0x00 27. " FIQ[27] ,Interrupt status of INT 27 (SDIOINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 26. " FIQ[26] ,Interrupt status of INT 26 (MMCINT)" "No interrupt,Interrupt" bitfld.long 0x00 25. " FIQ[25] ,Interrupt status of INT 25 (MBRINT)" "No interrupt,Interrupt" bitfld.long 0x00 24. " FIQ[24] ,Interrupt status of INT 24 (MBXINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " FIQ[20] ,Interrupt status of INT 20 (PSCINT)" "No interrupt,Interrupt" bitfld.long 0x00 19. " FIQ[19] ,Interrupt status of INT 19 (TCERRINT)" "No interrupt,Interrupt" bitfld.long 0x00 18. " FIQ[18] ,Interrupt status of INT 18 (TCERRINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " FIQ[17] ,Interrupt status of INT 17 (CCERRINT)" "No interrupt,Interrupt" bitfld.long 0x00 16. " FIQ[16] ,Interrupt status of INT 16 (CCINT0)" "No interrupt,Interrupt" bitfld.long 0x00 13. " FIQ[13] ,Interrupt status of INT 13 (EMACINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 12. " FIQ[12] ,Interrupt status of INT 12 (USBINT)" "No interrupt,Interrupt" bitfld.long 0x00 8. " FIQ[08] ,Interrupt status of INT 8 (VENCINT)" "No interrupt,Interrupt" bitfld.long 0x00 6. " FIQ[06] ,Interrupt status of INT 6 (RSZINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " FIQ[05] ,Interrupt status of INT 5 (PRVUINT)" "No interrupt,Interrupt" bitfld.long 0x00 4. " FIQ[04] ,Interrupt status of INT 4 (H3AINT)" "No interrupt,Interrupt" bitfld.long 0x00 3. " FIQ[03] ,Interrupt status of INT 3 (HISTINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " FIQ[02] ,Interrupt status of INT 2 (VDINT2)" "No interrupt,Interrupt" bitfld.long 0x00 1. " FIQ[01] ,Interrupt status of INT 1 (VDINT1)" "No interrupt,Interrupt" bitfld.long 0x00 0. " FIQ[00] ,Interrupt status of INT 0 (VDINT0)" "No interrupt,Interrupt" line.long 0x04 "FIQ1,Fast Interrupt Request Status Register 1" bitfld.long 0x04 31. " FIQ[63] ,Interrupt status of INT 63 (EMUINT)" "No interrupt,Interrupt" bitfld.long 0x04 30. " FIQ[62] ,Interrupt status of INT 62 (COMMRX)" "No interrupt,Interrupt" bitfld.long 0x04 29. " FIQ[61] ,Interrupt status of INT 61 (COMMTX)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 28. " FIQ[60] ,Interrupt status of INT 60 (GPIOBNK4)" "No interrupt,Interrupt" bitfld.long 0x04 27. " FIQ[59] ,Interrupt status of INT 59 (GPIOBNK3)" "No interrupt,Interrupt" bitfld.long 0x04 26. " FIQ[58] ,Interrupt status of INT 58 (GPIOBNK2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " FIQ[57] ,Interrupt status of INT 57 (GPIOBNK1)" "No interrupt,Interrupt" bitfld.long 0x04 24. " FIQ[56] ,Interrupt status of INT 56 (GPIOBNK0)" "No interrupt,Interrupt" bitfld.long 0x04 23. " FIQ[55] ,Interrupt status of INT 55 (GPIO7)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 22. " FIQ[54] ,Interrupt status of INT 54 (GPIO6)" "No interrupt,Interrupt" bitfld.long 0x04 21. " FIQ[53] ,Interrupt status of INT 53 (GPIO5)" "No interrupt,Interrupt" bitfld.long 0x04 20. " FIQ[52] ,Interrupt status of INT 52 (GPIO4)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 19. " FIQ[51] ,Interrupt status of INT 51 (GPIO3)" "No interrupt,Interrupt" bitfld.long 0x04 18. " FIQ[50] ,Interrupt status of INT 50 (GPIO2)" "No interrupt,Interrupt" bitfld.long 0x04 17. " FIQ[49] ,Interrupt status of INT 49 (GPIO1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " FIQ[48] ,Interrupt status of INT 48 (GPIO0)" "No interrupt,Interrupt" bitfld.long 0x04 12. " FIQ[44] ,Interrupt status of INT 44 (SPINT1)" "No interrupt,Interrupt" bitfld.long 0x04 11. " FIQ[43] ,Interrupt status of INT 43 (SPINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " FIQ[42] ,Interrupt status of INT 42 (UARTINT2)" "No interrupt,Interrupt" bitfld.long 0x04 9. " FIQ[41] ,Interrupt status of INT 41 (UARTINT1)" "No interrupt,Interrupt" bitfld.long 0x04 8. " FIQ[40] ,Interrupt status of INT 40 (UARTINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 7. " FIQ[39] ,Interrupt status of INT 39 (IICINT)" "No interrupt,Interrupt" bitfld.long 0x04 6. " FIQ[38] ,Interrupt status of INT 38 (PWMINT2)" "No interrupt,Interrupt" bitfld.long 0x04 5. " FIQ[37] ,Interrupt status of INT 37 (PWMINT1)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 4. " FIQ[36] ,Interrupt status of INT 36 (PWMINT0)" "No interrupt,Interrupt" bitfld.long 0x04 3. " FIQ[35] ,Interrupt status of INT 35 (TINT3)" "No interrupt,Interrupt" bitfld.long 0x04 2. " FIQ[34] ,Interrupt status of INT 34 (TINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " FIQ[33] ,Interrupt status of INT 33 (TINT1)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FIQ[32] ,Interrupt status of INT 32 (TINT0)" "No interrupt,Interrupt" line.long 0x08 "IRQ0,Interrupt Request Status Register 0" bitfld.long 0x08 30. " IRQ[30] ,Interrupt status of INT 30 (AEMIFINT)" "No interrupt,Interrupt" bitfld.long 0x08 29. " IRQ[29] ,Interrupt status of INT 29 (DDRINT)" "No interrupt,Interrupt" bitfld.long 0x08 27. " IRQ[27] ,Interrupt status of INT 27 (SDIOINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 26. " IRQ[26] ,Interrupt status of INT 26 (MMCINT)" "No interrupt,Interrupt" bitfld.long 0x08 25. " IRQ[25] ,Interrupt status of INT 25 (MBRINT)" "No interrupt,Interrupt" bitfld.long 0x08 24. " IRQ[24] ,Interrupt status of INT 24 (MBXINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 20. " IRQ[20] ,Interrupt status of INT 20 (PSCINT)" "No interrupt,Interrupt" bitfld.long 0x08 19. " IRQ[19] ,Interrupt status of INT 19 (TCERRINT)" "No interrupt,Interrupt" bitfld.long 0x08 18. " IRQ[18] ,Interrupt status of INT 18 (TCERRINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 17. " IRQ[17] ,Interrupt status of INT 17 (CCERRINT)" "No interrupt,Interrupt" bitfld.long 0x08 16. " IRQ[16] ,Interrupt status of INT 16 (CCINT0)" "No interrupt,Interrupt" bitfld.long 0x08 13. " IRQ[13] ,Interrupt status of INT 13 (EMACINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 12. " IRQ[12] ,Interrupt status of INT 12 (USBINT)" "No interrupt,Interrupt" bitfld.long 0x08 8. " IRQ[08] ,Interrupt status of INT 8 (VENCINT)" "No interrupt,Interrupt" bitfld.long 0x08 6. " IRQ[06] ,Interrupt status of INT 6 (RSZINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 5. " IRQ[05] ,Interrupt status of INT 5 (PRVUINT)" "No interrupt,Interrupt" bitfld.long 0x08 4. " IRQ[04] ,Interrupt status of INT 4 (H3AINT)" "No interrupt,Interrupt" bitfld.long 0x08 3. " IRQ[03] ,Interrupt status of INT 3 (HISTINT)" "No interrupt,Interrupt" textline " " bitfld.long 0x08 2. " IRQ[02] ,Interrupt status of INT 2 (VDINT2)" "No interrupt,Interrupt" bitfld.long 0x08 1. " IRQ[01] ,Interrupt status of INT 1 (VDINT1)" "No interrupt,Interrupt" bitfld.long 0x08 0. " IRQ[00] ,Interrupt status of INT 0 (VDINT0)" "No interrupt,Interrupt" line.long 0x0c "IRQ1,Interrupt Request Status Register 1" bitfld.long 0x0c 31. " IRQ[63] ,Interrupt status of INT 63 (EMUINT)" "No interrupt,Interrupt" bitfld.long 0x0c 30. " IRQ[62] ,Interrupt status of INT 62 (COMMRX)" "No interrupt,Interrupt" bitfld.long 0x0c 29. " IRQ[61] ,Interrupt status of INT 61 (COMMTX)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 28. " IRQ[60] ,Interrupt status of INT 60 (GPIOBNK4)" "No interrupt,Interrupt" bitfld.long 0x0c 27. " IRQ[59] ,Interrupt status of INT 59 (GPIOBNK3)" "No interrupt,Interrupt" bitfld.long 0x0c 26. " IRQ[58] ,Interrupt status of INT 58 (GPIOBNK2)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 25. " IRQ[57] ,Interrupt status of INT 57 (GPIOBNK1)" "No interrupt,Interrupt" bitfld.long 0x0c 24. " IRQ[56] ,Interrupt status of INT 56 (GPIOBNK0)" "No interrupt,Interrupt" bitfld.long 0x0c 23. " IRQ[55] ,Interrupt status of INT 55 (GPIO7)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 22. " IRQ[54] ,Interrupt status of INT 54 (GPIO6)" "No interrupt,Interrupt" bitfld.long 0x0c 21. " IRQ[53] ,Interrupt status of INT 53 (GPIO5)" "No interrupt,Interrupt" bitfld.long 0x0c 20. " IRQ[52] ,Interrupt status of INT 52 (GPIO4)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 19. " IRQ[51] ,Interrupt status of INT 51 (GPIO3)" "No interrupt,Interrupt" bitfld.long 0x0c 18. " IRQ[50] ,Interrupt status of INT 50 (GPIO2)" "No interrupt,Interrupt" bitfld.long 0x0c 17. " IRQ[49] ,Interrupt status of INT 49 (GPIO1)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 16. " IRQ[48] ,Interrupt status of INT 48 (GPIO0)" "No interrupt,Interrupt" bitfld.long 0x0c 12. " IRQ[44] ,Interrupt status of INT 44 (SPINT1)" "No interrupt,Interrupt" bitfld.long 0x0c 11. " IRQ[43] ,Interrupt status of INT 43 (SPINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 10. " IRQ[42] ,Interrupt status of INT 42 (UARTINT2)" "No interrupt,Interrupt" bitfld.long 0x0c 9. " IRQ[41] ,Interrupt status of INT 41 (UARTINT1)" "No interrupt,Interrupt" bitfld.long 0x0c 8. " IRQ[40] ,Interrupt status of INT 40 (UARTINT0)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 7. " IRQ[39] ,Interrupt status of INT 39 (IICINT)" "No interrupt,Interrupt" bitfld.long 0x0c 6. " IRQ[38] ,Interrupt status of INT 38 (PWMINT2)" "No interrupt,Interrupt" bitfld.long 0x0c 5. " IRQ[37] ,Interrupt status of INT 37 (PWMINT1)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 4. " IRQ[36] ,Interrupt status of INT 36 (PWMINT0)" "No interrupt,Interrupt" bitfld.long 0x0c 3. " IRQ[35] ,Interrupt status of INT 35 (TINT3)" "No interrupt,Interrupt" bitfld.long 0x0c 2. " IRQ[34] ,Interrupt status of INT 34 (TINT2)" "No interrupt,Interrupt" textline " " bitfld.long 0x0c 1. " IRQ[33] ,Interrupt status of INT 33 (TINT1)" "No interrupt,Interrupt" bitfld.long 0x0c 0. " IRQ[32] ,Interrupt status of INT 32 (TINT0)" "No interrupt,Interrupt" width 10. rgroup.long 0x10++0x07 line.long 0x00 "FIQENTRY,Fast Interrupt Request Entry Address Register" hexmask.long 0x00 0.--28. 1. " FIQENTRY ,Interrupt entry table address of the current highest-priority fast interrupt request (FIQ)" line.long 0x04 "IRQENTRY,Interrupt Request Entry Address Register" hexmask.long 0x04 0.--28. 1. " IRQENTRY ,Interrupt entry table address of the current highest-priority interrupt request (IRQ)" width 10. group.long 0x18++0x0f line.long 0x00 "EINT0,Interrupt Enable Register 0" bitfld.long 0x00 30. " EINT[30] ,Interrupt enable for INT 30 (AEMIFINT)" "Disabled,Enabled" bitfld.long 0x00 29. " EINT[29] ,Interrupt enable for INT 29 (DDRINT)" "Disabled,Enabled" bitfld.long 0x00 27. " EINT[27] ,Interrupt enable for INT 27 (SDIOINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " EINT[26] ,Interrupt enable for INT 26 (MMCINT)" "Disabled,Enabled" bitfld.long 0x00 25. " EINT[25] ,Interrupt enable for INT 25 (MBRINT)" "Disabled,Enabled" bitfld.long 0x00 24. " EINT[24] ,Interrupt enable for INT 24 (MBXINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " EINT[20] ,Interrupt enable for INT 20 (PSCINT)" "Disabled,Enabled" bitfld.long 0x00 19. " EINT[19] ,Interrupt enable for INT 19 (TCERRINT)" "Disabled,Enabled" bitfld.long 0x00 18. " EINT[18] ,Interrupt enable for INT 18 (TCERRINT0)" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " EINT[17] ,Interrupt enable for INT 17 (CCERRINT)" "Disabled,Enabled" bitfld.long 0x00 16. " EINT[16] ,Interrupt enable for INT 16 (CCINT0)" "Disabled,Enabled" bitfld.long 0x00 13. " EINT[13] ,Interrupt enable for INT 13 (EMACINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " EINT[12] ,Interrupt enable for INT 12 (USBINT)" "Disabled,Enabled" bitfld.long 0x00 8. " EINT[08] ,Interrupt enable for INT 8 (VENCINT)" "Disabled,Enabled" bitfld.long 0x00 6. " EINT[06] ,Interrupt enable for INT 6 (RSZINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EINT[05] ,Interrupt enable for INT 5 (PRVUINT)" "Disabled,Enabled" bitfld.long 0x00 4. " EINT[04] ,Interrupt enable for INT 4 (H3AINT)" "Disabled,Enabled" bitfld.long 0x00 3. " EINT[03] ,Interrupt enable for INT 3 (HISTINT)" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " EINT[02] ,Interrupt enable for INT 2 (VDINT2)" "Disabled,Enabled" bitfld.long 0x00 1. " EINT[01] ,Interrupt enable for INT 1 (VDINT1)" "Disabled,Enabled" bitfld.long 0x00 0. " EINT[00] ,Interrupt enable for INT 0 (VDINT0)" "Disabled,Enabled" line.long 0x04 "EINT1,Interrupt Enable Register 1" bitfld.long 0x04 31. " EINT[63] ,Interrupt enable for INT 63 (EMUINT)" "Disabled,Enabled" bitfld.long 0x04 30. " EINT[62] ,Interrupt enable for INT 62 (COMMRX)" "Disabled,Enabled" bitfld.long 0x04 29. " EINT[61] ,Interrupt enable for INT 61 (COMMTX)" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " EINT[60] ,Interrupt enable for INT 60 (GPIOBNK4)" "Disabled,Enabled" bitfld.long 0x04 27. " EINT[59] ,Interrupt enable for INT 59 (GPIOBNK3)" "Disabled,Enabled" bitfld.long 0x04 26. " EINT[58] ,Interrupt enable for INT 58 (GPIOBNK2)" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " EINT[57] ,Interrupt enable for INT 57 (GPIOBNK1)" "Disabled,Enabled" bitfld.long 0x04 24. " EINT[56] ,Interrupt enable for INT 56 (GPIOBNK0)" "Disabled,Enabled" bitfld.long 0x04 23. " EINT[55] ,Interrupt enable for INT 55 (GPIO7)" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " EINT[54] ,Interrupt enable for INT 54 (GPIO6)" "Disabled,Enabled" bitfld.long 0x04 21. " EINT[53] ,Interrupt enable for INT 53 (GPIO5)" "Disabled,Enabled" bitfld.long 0x04 20. " EINT[52] ,Interrupt enable for INT 52 (GPIO4)" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " EINT[51] ,Interrupt enable for INT 51 (GPIO3)" "Disabled,Enabled" bitfld.long 0x04 18. " EINT[50] ,Interrupt enable for INT 50 (GPIO2)" "Disabled,Enabled" bitfld.long 0x04 17. " EINT[49] ,Interrupt enable for INT 49 (GPIO1)" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " EINT[48] ,Interrupt enable for INT 48 (GPIO0)" "Disabled,Enabled" bitfld.long 0x04 12. " EINT[44] ,Interrupt enable for INT 44 (SPINT1)" "Disabled,Enabled" bitfld.long 0x04 11. " EINT[43] ,Interrupt enable for INT 43 (SPINT0)" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " EINT[42] ,Interrupt enable for INT 42 (UARTINT2)" "Disabled,Enabled" bitfld.long 0x04 9. " EINT[41] ,Interrupt enable for INT 41 (UARTINT1)" "Disabled,Enabled" bitfld.long 0x04 8. " EINT[40] ,Interrupt enable for INT 40 (UARTINT0)" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " EINT[39] ,Interrupt enable for INT 39 (IICINT)" "Disabled,Enabled" bitfld.long 0x04 6. " EINT[38] ,Interrupt enable for INT 38 (PWMINT2)" "Disabled,Enabled" bitfld.long 0x04 5. " EINT[37] ,Interrupt enable for INT 37 (PWMINT1)" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " EINT[36] ,Interrupt enable for INT 36 (PWMINT0)" "Disabled,Enabled" bitfld.long 0x04 3. " EINT[35] ,Interrupt enable for INT 35 (TINT3)" "Disabled,Enabled" bitfld.long 0x04 2. " EINT[34] ,Interrupt enable for INT 34 (TINT2)" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " EINT[33] ,Interrupt enable for INT 33 (TINT1)" "Disabled,Enabled" bitfld.long 0x04 0. " EINT[32] ,Interrupt enable for INT 32 (TINT0)" "Disabled,Enabled" width 10. line.long 0x08 "INTCTL,Interrupt Operation Control Register" bitfld.long 0x08 2. " IDMODE ,Interrupt disable mode" "Immediately,After acknowledgement" bitfld.long 0x08 1. " IERAW ,Masked interrupt reflected in the interrupt request entry address register (IRQENTRY)" "Disabled,Enabled" bitfld.long 0x08 0. " FERAW ,Masked interrupt reflect in the fast interrupt request entry address register (FIQENTRY)" "Disabled,Enabled" line.long 0x0c "EABASE,Interrupt Entry Table Base Address Register" hexmask.long 0x0C 3.--28. 0x08 " EABASE ,Interrupt entry table base address" bitfld.long 0x0C 0.--1. " SIZE ,Size of each entry in the interrupt entry table (byte)" "4,8,16,32" width 10. group.long 0x30++0x1f line.long 0x00 "INTPRI0,Interrupt Priority Register 0" bitfld.long 0x00 24.--26. " INT6 ,Selects INT6 (RSZINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " INT5 ,Selects INT5 (PRVUINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. " INT4 ,Selects INT4 (H3AINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " INT3 ,Selects INT3 (HISTINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--10. " INT2 ,Selects INT2 (VDINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " INT1 ,Selects INT1 (VDINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " INT0 ,Selects INT0 (VDINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x04 "INTPRI1,Interrupt Priority Register 1" bitfld.long 0x04 20.--22. " INT13 ,Selects INT13 (EMACINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " INT12 ,Selects INT12 (USBINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " INT8 ,Selects INT8 (VENCINT) priority level" "0,1,2,3,4,5,6,7" line.long 0x08 "INTPRI2,Interrupt Priority Register 2" bitfld.long 0x08 16.--18. " INT20 ,Selects INT20 (PSCINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " INT19 ,Selects INT19 (TCERRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " INT18 ,Selects INT18 (TCERRINT0) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. " INT17 ,Selects INT17 (CCERRINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 0.--2. " INT16 ,Selects INT16 (CCINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x0c "INTPRI3,Interrupt Priority Register 3" bitfld.long 0x0c 24.--26. " INT30 ,Selects INT30 (AEMIFINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 20.--22. " INT29 ,Selects INT29 (DDRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 12.--14. " INT27 ,Selects INT27 (SDIOINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 8.--10. " INT26 ,Selects INT26 (MMCINT) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0c 4.--6. " INT25 ,Selects INT25 (MBRINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x0c 0.--2. " INT24 ,Selects INT24 (MBXINT) priority level" "0,1,2,3,4,5,6,7" line.long 0x10 "INTPRI4,Interrupt Priority Register 4" bitfld.long 0x10 28.--30. " INT39 ,Selects INT39 (IICINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. " INT38 ,Selects INT38 (PWMINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 20.--22. " INT37 ,Selects INT37 (PWMINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. " INT36 ,Selects INT36 (PWMINT0) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 12.--14. " INT35 ,Selects INT35 (TINT3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. " INT34 ,Selects INT34 (TINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 4.--6. " INT33 ,Selects INT33 (TINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " INT32 ,Selects INT32 (TINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x14 "INTPRI5,Interrupt Priority Register 5" bitfld.long 0x14 16.--18. " INT44 ,Selects INT44 (SPINT1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 12.--14. " INT43 ,Selects INT43 (SPINT0) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. " INT42 ,Selects INT42 (UARTINT2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--6. " INT41 ,Selects INT41 (UARTINT1) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 0.--2. " INT40 ,Selects INT40 (UARTINT0) priority level" "0,1,2,3,4,5,6,7" line.long 0x18 "INTPRI6,Interrupt Priority Register 6" bitfld.long 0x18 28.--30. " INT55 ,Selects INT55 (GPIO7) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 24.--26. " INT54 ,Selects INT54 (GPIO6) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 20.--22. " INT53 ,Selects INT53 (GPIO5) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 16.--18. " INT52 ,Selects INT52 (GPIO4) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 12.--14. " INT51 ,Selects INT51 (GPIO3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 8.--10. " INT50 ,Selects INT50 (GPIO2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 4.--6. " INT49 ,Selects INT49 (GPIO1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x18 0.--2. " INT48 ,Selects INT48 (GPIO0) priority level" "0,1,2,3,4,5,6,7" line.long 0x1c "INTPRI7,Interrupt Priority Register 7" bitfld.long 0x1c 28.--30. " INT63 ,Selects INT63 (EMUINT) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 24.--26. " INT62 ,Selects INT62 (COMMRX) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 20.--22. " INT61 ,Selects INT61 (COMMTX) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 16.--18. " INT60 ,Selects INT60 (GPIOBNK4) priority level" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1c 12.--14. " INT59 ,Selects INT59 (GPIOBNK3) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 8.--10. " INT58 ,Selects INT58 (GPIOBNK2) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 4.--6. " INT57 ,Selects INT57 (GPIOBNK1) priority level" "0,1,2,3,4,5,6,7" bitfld.long 0x1c 0.--2. " INT56 ,Selects INT56 (GPIOBNK0) priority level" "0,1,2,3,4,5,6,7" width 0xb tree.end tree "SCR (System Control Registers)" base asd:0x01c40000 width 14. group.long 0x00++0x07 line.long 0x00 "PINMUX0,Pin multiplexing control 0 Register" bitfld.long 0x00 31. " EMACEN ,Enable EMAC and MDIO function on default GPIO3V[0:16] pins" "Disabled,Enabled" bitfld.long 0x00 29. " HPIEN ,Enable HPI module pins" "Disabled,Enabled" bitfld.long 0x00 27. " CFLDEN ,Enable CCD C_FIELD function on default GPIO[4] pin" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " CWE ,Enable CCD C_WE function on default GPIO[1] pin" "Disabled,Enabled" bitfld.long 0x00 25. " LFLDEN ,Enable LCD_FIELD function on default GPIO[3] pin" "Disabled,Enabled" bitfld.long 0x00 24. " LOEEN ,Enable LCD_OE function on default GPIO[0] pin" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " RGB888 ,Enable VPBE RGB888 function on default GPIO[2:6, 46:47] pins" "Disabled,Enabled" bitfld.long 0x00 22. " RGB666 ,Enable VPBE RGB666 function on default GPIO[46:47] pins" "Disabled,Enabled" bitfld.long 0x00 11. " AECS5 ,Enable EMIFA EM_CS5 function on GPIO[8]" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " AECS4 ,Enable EMIFA EM_CS4 function on GPIO[9]" "Disabled,Enabled" bitfld.long 0x00 0.--4. " AEAW ,EMIFA address width selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PINMUX1,Pin multiplexing control 1 Register" bitfld.long 0x04 18. " TIMIN ,Enable TIM_IN function on default GPIO[49] pin" "Disabled,Enabled" bitfld.long 0x04 17. " CLK1 ,Enable CLK_OUT1 function on default GPIO[49] pin" "Disabled,Enabled" bitfld.long 0x04 16. " CLK0 ,Enable CLK_OUT0 function on default GPIO[48] pin" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " ASP ,Enable ASP function on default GPIO[29:34] pins" "Disabled,Enabled" bitfld.long 0x04 8. " SPI ,Enable SPI function on default GPIO[37,39:42] pins" "Disabled,Enabled" bitfld.long 0x04 7. " I2C ,Enable I2C function on default GPIO[43:44] pins" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " PWM2 ,Enable PWM2 function on default GPIO[47] pin" "Disabled,Enabled" bitfld.long 0x04 5. " PWM1 ,Enable PWM1 function on default GPIO[46] pin" "Disabled,Enabled" bitfld.long 0x04 4. " PWM0 ,Enable PWM0 function on default GPIO[45] pin" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " U2FLO ,Enable UART2 flow control function on default VPFE CI[5:4]/CCD_DATA[13:12] pins" "Disabled,Enabled" bitfld.long 0x04 2. " UART2 ,Enable UART2 function on default VPFE CI[7:6]/CCD_DATA[15:14] pins" "Disabled,Enabled" bitfld.long 0x04 1. " UART1 ,Enable UART1 function" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " UART0 ,Enable UART0 function on default GPIO[35:36] pins" "Disabled,Enabled" rgroup.long 0x14++0x03 line.long 0x00 "BOOTCFG,Device boot configuration Register" bitfld.long 0x00 6.--7. " BTSEL ,ARM Boot mode selection pin states" "ROM (NAND Flash),EMIFA (NOR Flash),ROM (HPI),ROM (UART0)" bitfld.long 0x00 5. " EM_WIDTH ,EMIFA data bus width selection pin state (bit)" "8,16" bitfld.long 0x00 0.--4. " DAEAW ,EMIFA address bus width selection pin states" "00000,00001,00010,00011,00100,00101,00110,00111,01000,01001,01010,01011,01100,01101,01110,01111,10000,10001,10010,10011,10100,10101,10110,10111,11000,11001,11010,11011,11100,11101,11110,11111" rgroup.long 0x28++0x03 line.long 0x00 "JTAGID,JTAG Identification Register" group.long 0x34++0x03 line.long 0x00 "USBPHY_CTL,USB PHY control Register" bitfld.long 0x00 8. " PHYCLKGD ,USB PHY Power and Clock Good" "Not ramped/Not locked,Good/Locked" textline " " bitfld.long 0x00 7. " SESNDEN ,Session End Comparator enable" "Disabled,Enabled" bitfld.long 0x00 6. " VBDTCTEN ,vbus comparator enable" "Disabled,Enabled" bitfld.long 0x00 4. " PHYPLLON ,USB PHY PLL suspend override" "Normal,Overridden" textline " " bitfld.long 0x00 3. " CLKO1SEL ,CLK_OUT1 frequency select" "24 MHz,12 MHz" bitfld.long 0x00 2. " OSCPDWN ,USB PHY oscillator power down control" "Power On,Power off" bitfld.long 0x00 0. " PHYPDWN ,USB PHY power down control" "Power On,Power off" group.long 0x3c++0x13 line.long 0x00 "MSTPRI0,Bus master priority control 0 Register" bitfld.long 0x00 4.--6. " ARM_CFGP ,ARM CFG bus priority" "0(Highest),1,2,3,4,5,6,7(Lowest)" bitfld.long 0x00 0.--2. " ARM_DMAP ,ARM DMA priority" "0(Highest),1,2,3,4,5,6,7(Lowest)" line.long 0x04 "MSTPRI1,Bus master priority control 1 Register" bitfld.long 0x04 20.--22. " HPIP ,HPI priority" "0(Highest),1,2,3,4,5,6,7(Lowest)" bitfld.long 0x04 8.--10. " USBP ,USB priority" "0(Highest),1,2,3,4,5,6,7(Lowest)" bitfld.long 0x04 0.--2. " EMACP ,EMAC priority" "0(Highest),1,2,3,4,5,6,7(Lowest)" line.long 0x08 "VPSS_CLKCTL,VPSS Clock Mux Control Register" bitfld.long 0x08 4. " DACCLKEN ,Video DAC clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " VENCLKEN ,VPBE/Video encoder clock enable" "Disabled,Enabled" bitfld.long 0x08 2. " PCLKINV ,VPFE pixel clock (PCLK) invert enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--1. " MUXSEL ,VPSS clock selection" "MXI,PLL2,VPBECLK,PCLK" line.long 0x0c "VDD3P3V_PWDN,VDD 3.3V I/O powerdown control Register" bitfld.long 0x0C 1. " IOPWDN0 ,GIOV33 I/O Powerdown controls GIOV33[16:0] pins" "Power up,Power down" bitfld.long 0x0C 0. " IOPWDN1 ,MMC/SD/SDIO I/O Powerdown controls SD_CLK, SD_CMD, SD_DATA[3:0] pins" "Power up,Power down" line.long 0x10 "DRRVTPER,Enables access to the DDR2 VTP Register" width 0xb tree.end tree "HPI (Host Port Interface)" base asd:0x01c67800 width 13. rgroup.long 0x00++0x03 line.long 0x00 "PID,Peripheral Identification Register" hexmask.long.byte 0x00 16.--23. 1. " TID ,Identifies type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " CID ,Identifies class of peripheral" hexmask.long.byte 0x00 0.--7. 1. " PREV ,Identifies revision of peripheral" group.long 0x04++0x3 line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register" bitfld.long 0x00 1. " SOFT ,Emulation mode functionality of the HPI" "Not affected,Halted" bitfld.long 0x00 0. " FREE ,Free run emulation control" "SOFT control,Free run" if (((data.long(asd:0x01C40000+0x30))&0x200)==0x00) group.long 0x30++0x3 line.long 0x00 "HPIC,HPI Control Register" bitfld.long 0x00 11. " HPIASEL ,HPI address register select bit" "HPIAW,HPIAR" bitfld.long 0x00 9. " DUALHPIA ,Dual-HPIA mode bit" "Single-HPIA,Dual-HPIA" textline " " bitfld.long 0x00 8. " HWOBSTAT ,HWOB status" "0,1" bitfld.long 0x00 4. " FETCH ,Host data fetch command" "Not requested,Requested" textline " " bitfld.long 0x00 2. " HINT ,Processor-to-host interrupt" "No effect,Interrupt" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 1. " ARMINT ,Host-to-processor interrupt" "No effect,Interrupt" else bitfld.long 0x00 1. " DSPINT ,Host-to-processor interrupt" "No effect,Interrupt" endif textline " " bitfld.long 0x00 0. " HWOB ,Halfword order" "Most significant,Least significant" else group.long 0x30++0x3 line.long 0x00 "HPIC,HPI Control Register" bitfld.long 0x00 11. " HPIASEL ,HPI address register select bit" "HPIAW,HPIAR" bitfld.long 0x00 9. " DUALHPIA ,Dual-HPIA mode bit" "Single-HPIA,Dual-HPIA" textline " " bitfld.long 0x00 8. " HWOBSTAT ,HWOB status" "0,1" bitfld.long 0x00 4. " FETCH ,Host data fetch command" "Not requested,Requested" textline " " eventfld.long 0x00 2. " HINT ,Processor-to-host interrupt" "No effect,Interrupt" sif (cpu()=="DM365"||cpu()=="DM368") bitfld.long 0x00 1. " ARMINT ,Host-to-processor interrupt" "No effect,Interrupt" else bitfld.long 0x00 1. " DSPINT ,Host-to-processor interrupt" "No effect,Interrupt" endif textline " " bitfld.long 0x00 0. " HWOB ,Halfword order" "Most significant,Least significant" endif wgroup.long 0x34++0x3 line.long 0x00 "HPIAW,HPI Address Registers" rgroup.long 0x38++0x3 line.long 0x00 "HPIAR,HPI Address Registers" base asd:0x01C40000 group.long 0x30++0x03 line.long 0x00 "HPI_CTL,HPI Configuration Register" bitfld.long 0x00 9. " CTLMODE ,HPI control register mode" "Host,Processor" bitfld.long 0x00 8. " ADRMODE ,HPI address register mode" "Host,Processor" hexmask.long.byte 0x00 0.--7. 1. " TIMOUT ,Write FIFO timeout value in clock cycles" width 0xb tree.end tree.open "EMAC/MDIO (Ethernet Media Access Controller/Management Data Input/Output)" tree "EMAC Control Module Registers" base asd:0x01c81000 width 11. group.long 0x04++0x7 line.long 0x00 "EWCTL,EMAC Control Module Interrupt Control Register" bitfld.long 0x00 0. " INTEN ,Interrupt Enable" "Disabled,Enabled" line.long 0x04 "EWINTTCNT,EMAC Control Module Interrupt Timer Count Register" hexmask.long.tbyte 0x04 0.--16. 1. " EWINTTCNT ,Interrupt timer count" tree.end tree "MDIO Registers" base asd:0x01c84000 width 9. sif (cpu()!="DM357") rgroup.long 0x00++0x3 line.long 0x00 "VERSION,MDIO Version Register" hexmask.long.word 0x00 16.--31. 1. " MODID ,Type of peripheral" hexmask.long.byte 0x00 8.--15. 1. " REVMAJ ,Major revision of peripheral" hexmask.long.byte 0x00 0.--7. 1. " REVMIN ,Minor revision of peripheral" endif group.long 0x04++0x7 line.long 0x00 "CONTROL,MDIO Control Register" bitfld.long 0x00 31. " IDLE ,MDIO state machine IDLE status" "Busy,Idle" bitfld.long 0x00 30. " ENABLE ,MDIO state machine enable control" "Disabled,Enabled" hexmask.long.byte 0x00 24.--28. 1. " HUC ,Highest User-access Channel" textline " " bitfld.long 0x00 20. " PREAMBLE ,MDIO frame preamble disable" "No,Yes" eventfld.long 0x00 19. " FAULT ,Fault indicator" "No failure,Failure" bitfld.long 0x00 18. " FAULTENB ,Fault detect enable" "Disabled,Enabled" textline " " hexmask.long.word 0x00 0.--15. 1. " CLKDIV ,Clock divider" line.long 0x04 "ALIVE,MDIO PHY Alive Indication Register" eventfld.long 0x04 31. " ALIVE[31] ,MDIO ALIVE bit 31" "Not acknowledged,Acknowledged" eventfld.long 0x04 30. " ALIVE[30] ,MDIO ALIVE bit 30" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 29. " ALIVE[29] ,MDIO ALIVE bit 29" "Not acknowledged,Acknowledged" eventfld.long 0x04 28. " ALIVE[28] ,MDIO ALIVE bit 28" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 27. " ALIVE[27] ,MDIO ALIVE bit 27" "Not acknowledged,Acknowledged" eventfld.long 0x04 26. " ALIVE[26] ,MDIO ALIVE bit 26" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 25. " ALIVE[25] ,MDIO ALIVE bit 25" "Not acknowledged,Acknowledged" eventfld.long 0x04 24. " ALIVE[24] ,MDIO ALIVE bit 24" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 23. " ALIVE[23] ,MDIO ALIVE bit 23" "Not acknowledged,Acknowledged" eventfld.long 0x04 22. " ALIVE[22] ,MDIO ALIVE bit 22" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 21. " ALIVE[21] ,MDIO ALIVE bit 21" "Not acknowledged,Acknowledged" eventfld.long 0x04 20. " ALIVE[20] ,MDIO ALIVE bit 20" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 19. " ALIVE[19] ,MDIO ALIVE bit 19" "Not acknowledged,Acknowledged" eventfld.long 0x04 18. " ALIVE[18] ,MDIO ALIVE bit 18" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 17. " ALIVE[17] ,MDIO ALIVE bit 17" "Not acknowledged,Acknowledged" eventfld.long 0x04 16. " ALIVE[16] ,MDIO ALIVE bit 16" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 15. " ALIVE[15] ,MDIO ALIVE bit 15" "Not acknowledged,Acknowledged" eventfld.long 0x04 14. " ALIVE[14] ,MDIO ALIVE bit 14" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 13. " ALIVE[13] ,MDIO ALIVE bit 13" "Not acknowledged,Acknowledged" eventfld.long 0x04 12. " ALIVE[12] ,MDIO ALIVE bit 12" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 11. " ALIVE[11] ,MDIO ALIVE bit 11" "Not acknowledged,Acknowledged" eventfld.long 0x04 10. " ALIVE[10] ,MDIO ALIVE bit 10" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 9. " ALIVE[9] ,MDIO ALIVE bit 9" "Not acknowledged,Acknowledged" eventfld.long 0x04 8. " ALIVE[8] ,MDIO ALIVE bit 8" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 7. " ALIVE[7] ,MDIO ALIVE bit 7" "Not acknowledged,Acknowledged" eventfld.long 0x04 6. " ALIVE[6] ,MDIO ALIVE bit 6" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 5. " ALIVE[5] ,MDIO ALIVE bit 5" "Not acknowledged,Acknowledged" eventfld.long 0x04 4. " ALIVE[4] ,MDIO ALIVE bit 4" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 3. " ALIVE[3] ,MDIO ALIVE bit 3" "Not acknowledged,Acknowledged" eventfld.long 0x04 2. " ALIVE[2] ,MDIO ALIVE bit 2" "Not acknowledged,Acknowledged" textline " " eventfld.long 0x04 1. " ALIVE[1] ,MDIO ALIVE bit 1" "Not acknowledged,Acknowledged" eventfld.long 0x04 0. " ALIVE[0] ,MDIO ALIVE bit 0" "Not acknowledged,Acknowledged" rgroup.long 0x0c++0x3 line.long 0x00 "LINK,MDIO PHY Link Status Register" bitfld.long 0x00 31. " LINK[31] ,MDIO link state bit 31" "No link,Link" bitfld.long 0x00 30. " LINK[30] ,MDIO link state bit 30" "No link,Link" bitfld.long 0x00 29. " LINK[29] ,MDIO link state bit 29" "No link,Link" textline " " bitfld.long 0x00 28. " LINK[28] ,MDIO link state bit 28" "No link,Link" bitfld.long 0x00 27. " LINK[27] ,MDIO link state bit 27" "No link,Link" bitfld.long 0x00 26. " LINK[26] ,MDIO link state bit 26" "No link,Link" textline " " bitfld.long 0x00 25. " LINK[25] ,MDIO link state bit 25" "No link,Link" bitfld.long 0x00 24. " LINK[24] ,MDIO link state bit 24" "No link,Link" bitfld.long 0x00 23. " LINK[23] ,MDIO link state bit 23" "No link,Link" textline " " bitfld.long 0x00 22. " LINK[22] ,MDIO link state bit 22" "No link,Link" bitfld.long 0x00 21. " LINK[21] ,MDIO link state bit 21" "No link,Link" bitfld.long 0x00 20. " LINK[20] ,MDIO link state bit 20" "No link,Link" textline " " bitfld.long 0x00 19. " LINK[19] ,MDIO link state bit 19" "No link,Link" bitfld.long 0x00 18. " LINK[18] ,MDIO link state bit 18" "No link,Link" bitfld.long 0x00 17. " LINK[17] ,MDIO link state bit 17" "No link,Link" textline " " bitfld.long 0x00 16. " LINK[16] ,MDIO link state bit 16" "No link,Link" bitfld.long 0x00 15. " LINK[15] ,MDIO link state bit 15" "No link,Link" bitfld.long 0x00 14. " LINK[14] ,MDIO link state bit 14" "No link,Link" textline " " bitfld.long 0x00 13. " LINK[13] ,MDIO link state bit 13" "No link,Link" bitfld.long 0x00 12. " LINK[12] ,MDIO link state bit 12" "No link,Link" bitfld.long 0x00 11. " LINK[11] ,MDIO link state bit 11" "No link,Link" textline " " bitfld.long 0x00 10. " LINK[10] ,MDIO link state bit 10" "No link,Link" bitfld.long 0x00 9. " LINK[9] ,MDIO link state bit 9" "No link,Link" bitfld.long 0x00 8. " LINK[8] ,MDIO link state bit 8" "No link,Link" textline " " bitfld.long 0x00 7. " LINK[7] ,MDIO link state bit 7" "No link,Link" bitfld.long 0x00 6. " LINK[6] ,MDIO link state bit 6" "No link,Link" bitfld.long 0x00 5. " LINK[5] ,MDIO link state bit 5" "No link,Link" textline " " bitfld.long 0x00 4. " LINK[4] ,MDIO link state bit 4" "No link,Link" bitfld.long 0x00 3. " LINK[3] ,MDIO link state bit 3" "No link,Link" bitfld.long 0x00 2. " LINK[2] ,MDIO link state bit 2" "No link,Link" textline " " bitfld.long 0x00 1. " LINK[1] ,MDIO link state bit 1" "No link,Link" bitfld.long 0x00 0. " LINK[0] ,MDIO link state bit 0" "No link,Link" width 18. group.long 0x10++0x7 line.long 0x00 "LINKINTRAW,MDIO Link Status Change Interrupt Register" eventfld.long 0x00 1. " LINKINTRAW1 ,MDIO link change event" "Not changed,Changed" eventfld.long 0x00 0. " LINKINTRAW0 ,MDIO link change event" "Not changed,Changed" line.long 0x04 "LINKINTMASKED,MDIO Link Status Change Interrupt (Masked) Register" eventfld.long 0x04 1. " LINKINTMASKED1 ,MDIO link change interrupt (Masked)" "Not changed,Changed" eventfld.long 0x04 0. " LINKINTMASKED0 ,MDIO link change interrupt (Masked)" "Not changed,Changed" group.long 0x20++0xf line.long 0x00 "USERINTRAW,MDIO User Command Complete Interrupt Register" eventfld.long 0x00 1. " USERINTRAW1 ,MDIO user command complete event" "Not completed,Completed" eventfld.long 0x00 0. " USERINTRAW0 ,MDIO user command complete event" "Not completed,Completed" line.long 0x04 "USERINTMASKED,MDIO User Command Complete Interrupt (Masked) Register" eventfld.long 0x04 1. " USERINTMASKED1 ,MDIO user command complete interrupt (Masked)" "Not completed,Completed" eventfld.long 0x04 0. " USERINTMASKED0 ,MDIO user command complete interrupt (Masked)" "Not completed,Completed" line.long 0x08 "USERINTMASKSET,MDIO User Command Complete Interrupt Mask Set Register" bitfld.long 0x08 1. " USERINTMASKSET1 ,MDIO user interrupt mask set" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " USERINTMASKSET0 ,MDIO user interrupt mask set" "Disabled,Enabled" line.long 0x0c "USERINTMASKCLEAR,MDIO User Command Complete Interrupt Mask Clear Register" eventfld.long 0x0c 1. " USERINTMASKCLEAR1 ,MDIO user command complete interrupt mask clear" "Enabled,Disabled" textline " " eventfld.long 0x0c 0. " USERINTMASKCLEAR0 ,MDIO user command complete interrupt mask clear" "Enabled,Disabled" group.long 0x80++0xf line.long 0x00 "USERACCESS0,MDIO User Access Register 0" bitfld.long 0x00 31. " GO ,GO bit" "No effect,MDIO accessed" bitfld.long 0x00 30. " WRITE ,Write enable" "Read,Write" textline " " bitfld.long 0x00 29. " ACK ,Acknowledge bit" "Not acknowledged,Acknowledged" hexmask.long.word 0x00 21.--25. 0x20 " REGADR ,Register address bits" textline " " hexmask.long.byte 0x00 16.--20. 1. " PHYADR ,PHY address bits" hexmask.long.word 0x00 0.--15. 1. " DATA ,User data bits" line.long 0x04 "USERPHYSEL0,MDIO User PHY Select Register 0" bitfld.long 0x04 7. " LINKSEL ,Link status determination select" "MDIO state machine,Not supported" bitfld.long 0x04 6. " LINKINTENB ,Link change interrupt enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 0.--4. 1. " PHYADRMON ,PHY address whose link status is to be monitored" line.long 0x08 "USERACCESS1,MDIO User Access Register 1" bitfld.long 0x08 31. " GO ,GO bit" "No effect,MDIO accessed" bitfld.long 0x08 30. " WRITE ,Write enable" "Read,Write" textline " " bitfld.long 0x08 29. " ACK ,Acknowledge bit" "Not acknowledged,Acknowledged" hexmask.long.word 0x08 21.--25. 0x20 " REGADR ,Register address bits" textline " " hexmask.long.byte 0x08 16.--20. 1. " PHYADR ,PHY address bits" hexmask.long.word 0x08 0.--15. 1. " DATA ,User data bits" line.long 0x0c "USERPHYSEL1,MDIO User PHY Select Register 1" bitfld.long 0x0c 7. " LINKSEL ,Link status determination select" "MDIO state machine,Not supported" bitfld.long 0x0c 6. " LINKINTENB ,Link change interrupt enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x0c 0.--4. 1. " PHYADRMON ,PHY address whose link status is to be monitored" width 0xb tree.end tree "EMAC Registers" base asd:0x01c80000 width 20. rgroup.long 0x00++0x3 line.long 0x00 "TXIDVER,Transmit Identification and Version Register" hexmask.long.word 0x00 16.--31. 1. " TXIDENT ,Transmit identification value" hexmask.long.byte 0x00 8.--15. 1. " TXMAJORVER ,Transmit major version" textline " " hexmask.long.byte 0x00 0.--7. 1. " TXMINORVER ,Transmit minor version" group.long 0x04++0x7 line.long 0x00 "TXCONTROL,Transmit Control Register" bitfld.long 0x00 0. " TXEN ,Transmit enable" "Disabled,Enabled" line.long 0x04 "TXTEARDOWN,Transmit Teardown Register" bitfld.long 0x04 0.--2. " TXTDNCH ,Transmit teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" rgroup.long 0x10++0x3 line.long 0x00 "RXIDVER,Receive Identification and Version Register" hexmask.long.word 0x00 16.--31. 1. " RXIDENT ,Receive identification value" hexmask.long.byte 0x00 8.--15. 1. " RXMAJORVER ,Receive major version" textline " " hexmask.long.byte 0x00 0.--7. 1. " RXMINORVER ,Receive minor version" group.long 0x14++0x7 line.long 0x00 "RXCONTROL,Receive Control Register" bitfld.long 0x00 0. " RXEN ,Receive enable" "Disabled,Enabled" line.long 0x04 "RXTEARDOWN,Receive Teardown Register" bitfld.long 0x04 0.--2. " RXTDNCH ,Receive teardown channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" rgroup.long 0x80++0x7 line.long 0x00 "TXINTSTATRAW,Transmit Interrupt Status (Unmasked) Register" bitfld.long 0x00 7. " TX7PEND ,TX7PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 6. " TX6PEND ,TX6PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " TX5PEND ,TX5PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 4. " TX4PEND ,TX4PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " TX3PEND ,TX3PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 2. " TX2PEND ,TX2PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " TX1PEND ,TX1PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 0. " TX0PEND ,TX0PEND raw interrupt read" "No interrupt,Interrupt" line.long 0x04 "TXINTSTATMASKED,Transmit Interrupt Status (Masked) Register" bitfld.long 0x04 7. " TX7PEND ,TX7PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 6. " TX6PEND ,TX6PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " TX5PEND ,TX5PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 4. " TX4PEND ,TX4PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " TX3PEND ,TX3PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 2. " TX2PEND ,TX2PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " TX1PEND ,TX1PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 0. " TX0PEND ,TX0PEND masked interrupt read" "No interrupt,Interrupt" group.long 0x88++0x7 line.long 0x00 "TXINTMASKSET,Transmit Interrupt Mask Set Register" bitfld.long 0x00 7. " TX7MASK ,Transmit channel 7 interrupt mask set" "No effect,Set" bitfld.long 0x00 6. " TX6MASK ,Transmit channel 6 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 5. " TX5MASK ,Transmit channel 5 interrupt mask set" "No effect,Set" bitfld.long 0x00 4. " TX4MASK ,Transmit channel 4 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 3. " TX3MASK ,Transmit channel 3 interrupt mask set" "No effect,Set" bitfld.long 0x00 2. " TX2MASK ,Transmit channel 2 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 1. " TX1MASK ,Transmit channel 1 interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " TX0MASK ,Transmit channel 0 interrupt mask set" "No effect,Set" line.long 0x04 "TXINTMASKCLEAR,Transmit Interrupt Mask Clear Register" eventfld.long 0x04 7. " TX7MASK ,Transmit channel 7 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 6. " TX6MASK ,Transmit channel 6 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 5. " TX5MASK ,Transmit channel 5 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 4. " TX4MASK ,Transmit channel 4 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 3. " TX3MASK ,Transmit channel 3 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 2. " TX2MASK ,Transmit channel 2 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 1. " TX1MASK ,Transmit channel 1 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 0. " TX0MASK ,Transmit channel 0 interrupt mask clear" "No effect,Cleared" rgroup.long 0x90++0x3 line.long 0x00 "MACINVECTOR,MAC Input Vector Register" bitfld.long 0x00 31. " USERINT ,MDIO module user interrupt pending status" "Not pending,Pending" bitfld.long 0x00 30. " LINKINT ,MDIO module link change interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 17. " HOSTPEND ,EMAC module host error interrupt pending status" "Not pending,Pending" bitfld.long 0x00 16. " STATPEND ,EMAC module statistics interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 15. " RX7PEND ,Receive channel 7 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 14. " RX6PEND ,Receive channel 6 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 13. " RX5PEND ,Receive channel 5 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 12. " RX4PEND ,Receive channel 4 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 11. " RX3PEND ,Receive channel 3 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 10. " RX2PEND ,Receive channel 2 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 9. " RX1PEND ,Receive channel 1 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 8. " RX0PEND ,Receive channel 0 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 7. " TX7PEND ,Transmit channel 7 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 6. " TX6PEND ,Transmit channel 6 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 5. " TX5PEND ,Transmit channel 5 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 4. " TX4PEND ,Transmit channel 4 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 3. " TX3PEND ,Transmit channel 3 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 2. " TX2PEND ,Transmit channel 2 interrupt pending status" "Not pending,Pending" textline " " bitfld.long 0x00 1. " TX1PEND ,Transmit channel 1 interrupt pending status" "Not pending,Pending" bitfld.long 0x00 0. " TX0PEND ,Transmit channel 0 interrupt pending status" "Not pending,Pending" rgroup.long 0xa0++0x7 line.long 0x00 "RXINTSTATRAW,Receive Interrupt Status (Unmasked) Register" bitfld.long 0x00 7. " RX7PEND ,RX7PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 6. " RX6PEND ,RX6PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RX5PEND ,RX5PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 4. " RX4PEND ,RX4PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " RX3PEND ,RX3PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX2PEND ,RX2PEND raw interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX1PEND ,RX1PEND raw interrupt read" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX0PEND ,RX0PEND raw interrupt read" "No interrupt,Interrupt" line.long 0x04 "RXINTSTATMASKED,Receive Interrupt Status (Masked) Register" bitfld.long 0x04 7. " RX7PEND ,RX7PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 6. " RX6PEND ,RX6PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " RX5PEND ,RX5PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 4. " RX4PEND ,RX4PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " RX3PEND ,RX3PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 2. " RX2PEND ,RX2PEND masked interrupt read" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " RX1PEND ,RX1PEND masked interrupt read" "No interrupt,Interrupt" bitfld.long 0x04 0. " RX0PEND ,RX0PEND masked interrupt read" "No interrupt,Interrupt" group.long 0xa8++0x7 line.long 0x00 "RXINTMASKSET,Receive Interrupt Mask Set Register" bitfld.long 0x00 7. " RX7MASK ,Receive channel 7 interrupt mask set" "No effect,Set" bitfld.long 0x00 6. " RX6MASK ,Receive channel 6 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 5. " RX5MASK ,Receive channel 5 interrupt mask set" "No effect,Set" bitfld.long 0x00 4. " RX4MASK ,Receive channel 4 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 3. " RX3MASK ,Receive channel 3 interrupt mask set" "No effect,Set" bitfld.long 0x00 2. " RX2MASK ,Receive channel 2 interrupt mask set" "No effect,Set" textline " " bitfld.long 0x00 1. " RX1MASK ,Receive channel 1 interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " RX0MASK ,Receive channel 0 interrupt mask set" "No effect,Set" line.long 0x04 "RXINTMASKCLEAR,Receive Interrupt Status Mask Clear Register" eventfld.long 0x04 7. " RX7MASK ,Receive channel 7 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 6. " RX6MASK ,Receive channel 6 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 5. " RX5MASK ,Receive channel 5 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 4. " RX4MASK ,Receive channel 4 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 3. " RX3MASK ,Receive channel 3 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 2. " RX2MASK ,Receive channel 2 interrupt mask clear" "No effect,Cleared" textline " " eventfld.long 0x04 1. " RX1MASK ,Receive channel 1 interrupt mask clear" "No effect,Cleared" eventfld.long 0x04 0. " RX0MASK ,Receive channel 0 interrupt mask clear" "No effect,Cleared" rgroup.long 0xb0++0x7 line.long 0x00 "MACINTSTATRAW,MAC Interrupt Status (Unmasked) Register" bitfld.long 0x00 1. " HOSTPEND ,Host pending interrupt" "Not pending,Pending" bitfld.long 0x00 0. " STATPEND ,Statistics pending interrupt" "Not pending,Pending" line.long 0x04 "MACINTSTATMASKED,MAC Interrupt Status (Masked) Register" bitfld.long 0x04 1. " HOSTPEND ,Host pending interrupt" "Not pending,Pending" bitfld.long 0x04 0. " STATPEND ,Statistics pending interrupt" "Not pending,Pending" group.long 0xb8++0x7 line.long 0x00 "MACINTMASKSET,MAC Interrupt Mask Set Register" bitfld.long 0x00 1. " HOSTMASK ,Host error interrupt mask set" "No effect,Set" bitfld.long 0x00 0. " STATMASK ,Statistics interrupt mask set" "No effect,Set" line.long 0x04 "MACINTMASKCLEAR,MAC Interrupt Mask Clear Register" eventfld.long 0x04 1. " HOSTMASK ,Host error interrupt mask clear" "No effect,Clear" eventfld.long 0x04 0. " STATMASK ,Statistics interrupt mask clear" "No effect,Clear" group.long 0x100++0x17 line.long 0x00 "RXMBPENABLE,Receive Multicast/Broadcast/Promiscuous Channel Enable Register" bitfld.long 0x00 30. " RXPASSCRC ,Pass received CRC enable" "Disabled,Enabled" bitfld.long 0x00 29. " RXQOSEN ,Receive quality of service (QOS) enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " RXNOCHAIN ,Receive no buffer chaining" "Multiple,Single" bitfld.long 0x00 24. " RXCMFEN ,Receive copy MAC control frames enable" "Filtered,Transferred" textline " " bitfld.long 0x00 23. " RXCSFEN ,Receive copy short frames enable" "Filtered,Transferred" bitfld.long 0x00 22. " RXCEFEN ,Receive copy error frames enable" "Filtered,Transferred" textline " " bitfld.long 0x00 21. " RXCAFEN ,Receive copy all frames enable" "Filtered,Transferred" bitfld.long 0x00 16.--18. " RXPROMCH ,Receive promiscuous channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" textline " " bitfld.long 0x00 13. " RXBROADEN ,Receive broadcast enable" "Filtered,Transferred" bitfld.long 0x00 8.--10. " RXBROADCH ,Receive broadcast channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" textline " " bitfld.long 0x00 5. " RXMULTEN ,Receive multicast enable" "Filtered,Transferred" bitfld.long 0x00 0.--2. " RXMULTCH ,Receive multicast channel select" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" line.long 0x04 "RXUNICASTSET,Receive Unicast Enable Set Register" bitfld.long 0x04 7. " RXCH7EN ,Receive channel 7 unicast enable set" "No effect,Set" bitfld.long 0x04 6. " RXCH6EN ,Receive channel 6 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 5. " RXCH5EN ,Receive channel 5 unicast enable set" "No effect,Set" bitfld.long 0x04 4. " RXCH4EN ,Receive channel 4 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 3. " RXCH3EN ,Receive channel 3 unicast enable set" "No effect,Set" bitfld.long 0x04 2. " RXCH2EN ,Receive channel 2 unicast enable set" "No effect,Set" textline " " bitfld.long 0x04 1. " RXCH1EN ,Receive channel 1 unicast enable set" "No effect,Set" bitfld.long 0x04 0. " RXCH0EN ,Receive channel 0 unicast enable set" "No effect,Set" line.long 0x08 "RXUNICASTCLEAR,Receive Unicast Clear Register" eventfld.long 0x08 7. " RXCH7EN ,Receive channel 7 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 6. " RXCH6EN ,Receive channel 6 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 5. " RXCH5EN ,Receive channel 5 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 4. " RXCH4EN ,Receive channel 4 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 3. " RXCH3EN ,Receive channel 3 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 2. " RXCH2EN ,Receive channel 2 unicast enable clear" "No effect,Cleared" textline " " eventfld.long 0x08 1. " RXCH1EN ,Receive channel 1 unicast enable clear" "No effect,Cleared" eventfld.long 0x08 0. " RXCH0EN ,Receive channel 0 unicast enable clear" "No effect,Cleared" line.long 0x0c "RXMAXLEN,Receive Maximum Length Register" hexmask.long.word 0x0c 0.--15. 1. " RXMAXLEN ,Received maximum frame length" line.long 0x10 "RXBUFFEROFFSET,Receive Buffer Offset Register" hexmask.long.word 0x10 0.--15. 1. " RXBUFFEROFFSET ,Receive buffer offset" line.long 0x14 "RXFILTERLOWTHRESH,Receive Filter Low Priority Frame Threshold Register" hexmask.long.byte 0x14 0.--7. 1. " RXFILTERTHRESH ,Receive filter low threshold" group.long 0x120++0x1f line.long 0x0 "RX0FLOWTHRESH,Receive Channel 0 Flow Control Threshold Register" hexmask.long.byte 0x0 0.--7. 1. " RX0FLOWTHRESH ,Receive flow threshold" line.long 0x4 "RX1FLOWTHRESH,Receive Channel 1 Flow Control Threshold Register" hexmask.long.byte 0x4 0.--7. 1. " RX1FLOWTHRESH ,Receive flow threshold" line.long 0x8 "RX2FLOWTHRESH,Receive Channel 2 Flow Control Threshold Register" hexmask.long.byte 0x8 0.--7. 1. " RX2FLOWTHRESH ,Receive flow threshold" line.long 0xC "RX3FLOWTHRESH,Receive Channel 3 Flow Control Threshold Register" hexmask.long.byte 0xC 0.--7. 1. " RX3FLOWTHRESH ,Receive flow threshold" line.long 0x10 "RX4FLOWTHRESH,Receive Channel 4 Flow Control Threshold Register" hexmask.long.byte 0x10 0.--7. 1. " RX4FLOWTHRESH ,Receive flow threshold" line.long 0x14 "RX5FLOWTHRESH,Receive Channel 5 Flow Control Threshold Register" hexmask.long.byte 0x14 0.--7. 1. " RX5FLOWTHRESH ,Receive flow threshold" line.long 0x18 "RX6FLOWTHRESH,Receive Channel 6 Flow Control Threshold Register" hexmask.long.byte 0x18 0.--7. 1. " RX6FLOWTHRESH ,Receive flow threshold" line.long 0x1C "RX7FLOWTHRESH,Receive Channel 7 Flow Control Threshold Register" hexmask.long.byte 0x1C 0.--7. 1. " RX7FLOWTHRESH ,Receive flow threshold" wgroup.long 0x140++0x1f line.long 0x0 "RX0FREEBUFFER,Receive Channel 0 Free Buffer Count Register" hexmask.long.word 0x0 0.--15. 1. " RX0FREEBUF ,Receive free buffer count" line.long 0x4 "RX1FREEBUFFER,Receive Channel 1 Free Buffer Count Register" hexmask.long.word 0x4 0.--15. 1. " RX1FREEBUF ,Receive free buffer count" line.long 0x8 "RX2FREEBUFFER,Receive Channel 2 Free Buffer Count Register" hexmask.long.word 0x8 0.--15. 1. " RX2FREEBUF ,Receive free buffer count" line.long 0xC "RX3FREEBUFFER,Receive Channel 3 Free Buffer Count Register" hexmask.long.word 0xC 0.--15. 1. " RX3FREEBUF ,Receive free buffer count" line.long 0x10 "RX4FREEBUFFER,Receive Channel 4 Free Buffer Count Register" hexmask.long.word 0x10 0.--15. 1. " RX4FREEBUF ,Receive free buffer count" line.long 0x14 "RX5FREEBUFFER,Receive Channel 5 Free Buffer Count Register" hexmask.long.word 0x14 0.--15. 1. " RX5FREEBUF ,Receive free buffer count" line.long 0x18 "RX6FREEBUFFER,Receive Channel 6 Free Buffer Count Register" hexmask.long.word 0x18 0.--15. 1. " RX6FREEBUF ,Receive free buffer count" line.long 0x1C "RX7FREEBUFFER,Receive Channel 7 Free Buffer Count Register" hexmask.long.word 0x1C 0.--15. 1. " RX7FREEBUF ,Receive free buffer count" group.long 0x160++0x3 line.long 0x00 "MACCONTROL,MAC Control Register" bitfld.long 0x00 14. " RXOFFLENBLOCK ,Receive offset / length word write block" "Not blocked,Blocked" bitfld.long 0x00 13. " RXOWNERSHIP ,Receive ownership write bit value" "Zero,One" textline " " bitfld.long 0x00 11. " CMDIDLE ,Command Idle" "Not commanded,Commanded" bitfld.long 0x00 9. " TXPTYPE ,Transmit queue priority type" "Round-robin,Fixed-priority" textline " " bitfld.long 0x00 6. " TXPACE ,Transmit pacing enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " GMIIEN ,GMII enable" "Disabled,Enabled" bitfld.long 0x00 4. " TXFLOWEN ,Transmit flow control enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RXBUFFERFLOWEN ,Receive flow control enable" "Disabled,Enabled" bitfld.long 0x00 1. " LOOPBACK ,Loopback mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FULLDUPLEX ,Full-duplex mode" "Half-duplex,Full-duplex" rgroup.long 0x164++0x3 line.long 0x00 "MACSTATUS,MAC Status Register" bitfld.long 0x00 31. " IDLE ,EMAC idle" "Busy,Idle" bitfld.long 0x00 20.--23. " TXERRCODE ,Transmit host error code" "NOERROR,SOPERROR,OWNERSHIP,NOEOP,NULLPTR,NULLLEN,LENERROR,?..." textline " " bitfld.long 0x00 16.--18. " TXERRCH ,Transmit host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" bitfld.long 0x00 12.--15. " RXERRCODE ,Receive host error code" "NOERROR,Reserved,OWNERSHIP,Reserved,NULLPTR,?..." textline " " bitfld.long 0x00 8.--10. " RXERRCH ,Receive host error channel" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7" bitfld.long 0x00 2. " RXQOSACT ,Receive quality of service (QOS) active" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RXFLOWACT ,Receive flow control active" "Disabled,Enabled" bitfld.long 0x00 0. " TXFLOWACT ,Transmit flow control active" "Disabled,Enabled" group.long 0x168++0x7 line.long 0x00 "EMCONTROL,Emulation Control Register" bitfld.long 0x00 1. " SOFT ,Emulation soft bit" "0,1" bitfld.long 0x00 0. " FREE ,Emulation free bit" "0,1" line.long 0x04 "FIFOCONTROL,FIFO Control Register" bitfld.long 0x04 0.--1. " TXCELLTHRESH ,Transmit FIFO cell threshold" "Not valid,Not valid,2 cells,3 cells" rgroup.long 0x170++0x3 line.long 0x00 "MACCONFIG,MAC Configuration Register" hexmask.long.byte 0x00 24.--31. 1. " TXCELLDEPTH ,Transmit cell depth" hexmask.long.byte 0x00 16.--23. 1. " RXCELLDEPTH ,Receive cell depth" textline " " hexmask.long.byte 0x00 8.--15. 1. " ADDRESSTYPE ,Address type" hexmask.long.byte 0x00 0.--7. 1. " MACCFIG ,MAC configuration value" group.long 0x174++0x3 line.long 0x00 "SOFTRESET,Soft Reset Register" bitfld.long 0x00 0. " SOFTRESET ,Software reset" "No reset,Reset" group.long 0x1d0++0xf line.long 0x00 "MACSRCADDRLO,MAC Source Address Low Bytes Register" hexmask.long.byte 0x00 8.--15. 1. " MACSRCADDR0 ,MAC source address lower 8 bits (byte 0)" hexmask.long.byte 0x00 0.--7. 1. " MACSRCADDR1 ,MAC source address bits 15-8 (byte 1)" line.long 0x04 "MACSRCADDRHI,MAC Source Address High Bytes Register" hexmask.long.byte 0x04 24.--31. 1. " MACSRCADDR2 ,MAC source address bits 23-16 (byte 2)" hexmask.long.byte 0x04 16.--23. 1. " MACSRCADDR3 ,MAC source address bits 31-24 (byte 3)" textline " " hexmask.long.byte 0x04 8.--15. 1. " MACSRCADDR4 ,MAC source address bits 39-32 (byte 4)" hexmask.long.byte 0x04 0.--7. 1. " MACSRCADDR5 ,MAC source address bits 47-40 (byte 5)" line.long 0x08 "MACHASH1,MAC Address Hash 1 Register" line.long 0x0c "MACHASH2,MAC Address Hash 2 Register" rgroup.long 0x1e0++0xf line.long 0x00 "BOFFTEST,Back Off Test Register" hexmask.long.word 0x00 16.--25. 1. " RNDNUM ,Backoff random number generator" hexmask.long.byte 0x00 12.--15. 1. " COLLCOUNT ,Collision count" textline " " hexmask.long.word 0x00 0.--9. 1. " TXBACKOFF ,Backoff count" line.long 0x04 "TPACETEST,Transmit Pacing Algorithm Test Register" hexmask.long.byte 0x04 0.--4. 1. " PACEVAL ,Pacing register current value" line.long 0x08 "RXPAUSE,Receive Pause Timer Register" hexmask.long.word 0x08 0.--15. 1. " PAUSETIMER ,Pause timer value bits" line.long 0x0c "TXPAUSE,Transmit Pause Timer Register" hexmask.long.word 0x0c 0.--15. 1. " PAUSETIMER ,Pause timer value bits" group.long 0x500++0xb line.long 0x00 "MACADDRLO,MAC Address Low Bytes Register" hexmask.long.byte 0x00 8.--15. 1. " MACADDR0 ,MAC address lower 8 bits (byte 0)" hexmask.long.byte 0x00 0.--7. 1. " MACADDR1 ,MAC address bits 15-8 (byte 1)" line.long 0x04 "MACADDRHI,MAC Address High Bytes Register" hexmask.long.byte 0x04 24.--31. 1. " MACADDR2 ,MAC source address bits 23-16 (byte 2)" hexmask.long.byte 0x04 16.--23. 1. " MACADDR3 ,MAC source address bits 31-24 (byte 3)" textline " " hexmask.long.byte 0x04 8.--15. 1. " MACADDR4 ,MAC source address bits 39-32 (byte 4)" hexmask.long.byte 0x04 0.--7. 1. " MACADDR5 ,MAC source address bits 47-40 (byte 5)" line.long 0x08 "MACINDEX,MAC Index Register" hexmask.long.byte 0x08 0.--2. 1. " MACINDEX ,MAC address index" group.long 0x600++0x1f line.long 0x0 "TX0HDP,Transmit Channel 0 DMA Head Descriptor Pointer Register" line.long 0x4 "TX1HDP,Transmit Channel 1 DMA Head Descriptor Pointer Register" line.long 0x8 "TX2HDP,Transmit Channel 2 DMA Head Descriptor Pointer Register" line.long 0xC "TX3HDP,Transmit Channel 3 DMA Head Descriptor Pointer Register" line.long 0x10 "TX4HDP,Transmit Channel 4 DMA Head Descriptor Pointer Register" line.long 0x14 "TX5HDP,Transmit Channel 5 DMA Head Descriptor Pointer Register" line.long 0x18 "TX6HDP,Transmit Channel 6 DMA Head Descriptor Pointer Register" line.long 0x1C "TX7HDP,Transmit Channel 7 DMA Head Descriptor Pointer Register" group.long 0x620++0x1f line.long 0x0 "RX0HDP,Receive Channel 0 DMA Head Descriptor Pointer Register" line.long 0x4 "RX1HDP,Receive Channel 1 DMA Head Descriptor Pointer Register" line.long 0x8 "RX2HDP,Receive Channel 2 DMA Head Descriptor Pointer Register" line.long 0xC "RX3HDP,Receive Channel 3 DMA Head Descriptor Pointer Register" line.long 0x10 "RX4HDP,Receive Channel 4 DMA Head Descriptor Pointer Register" line.long 0x14 "RX5HDP,Receive Channel 5 DMA Head Descriptor Pointer Register" line.long 0x18 "RX6HDP,Receive Channel 6 DMA Head Descriptor Pointer Register" line.long 0x1C "RX7HDP,Receive Channel 7 DMA Head Descriptor Pointer Register" group.long 0x640++0x1f line.long 0x0 "TX0CP,Transmit Channel 0 Completion Pointer Register" line.long 0x4 "TX1CP,Transmit Channel 1 Completion Pointer Register" line.long 0x8 "TX2CP,Transmit Channel 2 Completion Pointer Register" line.long 0xC "TX3CP,Transmit Channel 3 Completion Pointer Register" line.long 0x10 "TX4CP,Transmit Channel 4 Completion Pointer Register" line.long 0x14 "TX5CP,Transmit Channel 5 Completion Pointer Register" line.long 0x18 "TX6CP,Transmit Channel 6 Completion Pointer Register" line.long 0x1C "TX7CP,Transmit Channel 7 Completion Pointer Register" group.long 0x660++0x1f line.long 0x0 "RX0CP,Receive Channel 0 Completion Pointer Register" line.long 0x4 "RX1CP,Receive Channel 1 Completion Pointer Register" line.long 0x8 "RX2CP,Receive Channel 2 Completion Pointer Register" line.long 0xC "RX3CP,Receive Channel 3 Completion Pointer Register" line.long 0x10 "RX4CP,Receive Channel 4 Completion Pointer Register" line.long 0x14 "RX5CP,Receive Channel 5 Completion Pointer Register" line.long 0x18 "RX6CP,Receive Channel 6 Completion Pointer Register" line.long 0x1C "RX7CP,Receive Channel 7 Completion Pointer Register" group.long 0x200++0x8f "Network Statistics Registers" line.long 0x00 "RXGOODFRAMES,Good Receive Frames Register" line.long 0x04 "RXBCASTFRAMES,Broadcast Receive Frames Register" line.long 0x08 "RXMCASTFRAMES,Multicast Receive Frames Register" line.long 0x0c "RXPAUSEFRAMES,Pause Receive Frames Register" line.long 0x10 "RXCRCERRORS,Receive CRC Errors Register" line.long 0x14 "RXALIGNCODEERRORS,Receive Alignment/Code Errors Register" line.long 0x18 "RXOVERSIZED,Receive Oversized Frames Register" line.long 0x1c "RXJABBER,Receive Jabber Frames Register" line.long 0x20 "RXUNDERSIZED,Receive Undersized Frames Register" line.long 0x24 "RXFRAGMENTS,Receive Frame Fragments Register" line.long 0x28 "RXFILTERED,Filtered Receive Frames Register" line.long 0x2c "RXQOSFILTERED,Receive QOS Filtered Frames Register" line.long 0x30 "RXOCTETS,Receive Octet Frames Register" line.long 0x34 "TXGOODFRAMES,Good Transmit Frames Register" line.long 0x38 "TXBCASTFRAMES,Broadcast Transmit Frames Register" line.long 0x3c "TXMCASTFRAMES,Multicast Transmit Frames Register" line.long 0x40 "TXPAUSEFRAMES,Pause Transmit Frames Register" line.long 0x44 "TXDEFERRED,Deferred Transmit Frames Register" line.long 0x48 "TXCOLLISION,Transmit Collision Frames Register" line.long 0x4c "TXSINGLECOLL,Transmit Single Collision Frames Register" line.long 0x50 "TXMULTICOLL,Transmit Multiple Collision Frames Register" line.long 0x54 "TXEXCESSIVECOLL,Transmit Excessive Collision Frames Register" line.long 0x58 "TXLATECOLL,Transmit Late Collision Frames Register" line.long 0x5c "TXUNDERRUN,Transmit Underrun Error Register" line.long 0x60 "TXCARRIERSENSE,Transmit Carrier Sense Errors Register" line.long 0x64 "TXOCTETS,Transmit Octet Frames Register" line.long 0x68 "FRAME64,Transmit and Receive 64 Octet Frames Register" line.long 0x6c "FRAME65T127,Transmit and Receive 65 to 127 Octet Frames Register" line.long 0x70 "FRAME128T255,Transmit and Receive 128 to 255 Octet Frames Register" line.long 0x74 "FRAME256T511,Transmit and Receive 256 to 511 Octet Frames Register" line.long 0x78 "FRAME512T1023,Transmit and Receive 512 to 1023 Octet Frames Register" line.long 0x7c "FRAME1024TUP,Transmit and Receive 1024 to RXMAXLEN Octet Frames Register" line.long 0x80 "NETOCTETS,Network Octet Frames Register" line.long 0x84 "RXSOFOVERRUNS,Receive FIFO or DMA Start of Frame Overruns Register" line.long 0x88 "RXMOFOVERRUNS,Receive FIFO or DMA Middle of Frame Overruns Register" line.long 0x8c "RXDMAOVERRUNS,Receive DMA Overruns Register" width 0xb tree.end tree.end textline ""