; --------------------------------------------------------------------------------
; @Title: STM32WBA5x On-Chip Peripherals
; @Props: Released
; @Author: KRZ
; @Changelog: 2023-08-16 KRZ
; @Manufacturer: STM - ST Microelectronics N.V.
; @Doc: Generated (Trace32 Version N.2023.08.000161864), based on:
;       STM32WBA52.svd (Ver. 0.1)
; @Core: Cortex-M33F
; @Chip: STM32WBA52CE, STM32WBA52CG, STM32WBA52KE, STM32WBA52KG
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perstm32wba5x.per 16512 2023-08-16 15:20:41Z kwisniewski $

tree.close "Core Registers (Cortex-M33F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
tree "System Control"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 12.
group.long 0x08++0x03
line.long 0x00 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 29. " EXTEXCLALL      ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes"
bitfld.long 0x00 12. "              DISITMATBFLUSH    ,Disables ITM and DWT ATB flush" "No,Yes"
bitfld.long 0x00 10. "            FPEXCODIS      ,Disables FPU exception outputs" "No,Yes"
textline "                     "
bitfld.long 0x00 9. " DISOOFP         ,Disables floating-point" "No,Yes"
bitfld.long 0x00 2. "              DISFOLD           ,Disables dual-issue functionality" "No,Yes"
bitfld.long 0x00 0. "            DISMCYCINT     ,Disables interruption of multi-cycle" "No,Yes"
group.long 0x0C++0x0F
line.long 0x00 "CPPWR,Coprocessor Power Control Register"
bitfld.long 0x00 21. " SUS10           ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 20. "      SU10              ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 15. "  SUS7           ,State unknown Secure only" "Both states,Secure only"
textline "                     "
bitfld.long 0x00 14. " SU7             ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 13. "    SUS6              ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 12. "    SU6            ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline "                     "
bitfld.long 0x00 11. " SUS5            ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 10. "      SU5               ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 9. "  SUS4           ,State unknown Secure only" "Both states,Secure only"
textline "                     "
bitfld.long 0x00 8. " SU4             ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 7. "    SUS3              ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 6. "    SU3            ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted"
textline "                     "
bitfld.long 0x00 5. " SUS2            ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 4. "      SU2               ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 3. "  SUS1           ,State unknown Secure only" "Both states,Secure only"
textline "                     "
bitfld.long 0x00 2. " SU1             ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted"
bitfld.long 0x00 1. "    SUS0              ,State unknown Secure only" "Both states,Secure only"
bitfld.long 0x00 0. "    SU0            ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted"
line.long 0x04 "SYST_CSR,SysTick Control and Status Register"
rbitfld.long 0x04 16. " COUNTFLAG       ,Counter Flag" "Not counted,Counted"
bitfld.long 0x04 2. "      CLKSOURCE         ,SysTick clock source" "External,Core"
bitfld.long 0x04 1. "       TICKINT        ,SysTick Handler" "No SysTick,SysTick"
textline "                     "
bitfld.long 0x04 0. " ENABLE          ,Counter Enable" "Disabled,Enabled"
line.long 0x08 "SYST_RVR,SysTick Reload Value Register"
hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD          ,The value to load into the SYST_CVR when the counter reaches 0"
line.long 0x0C "SYST_CVR,SysTick Current Value Register"
hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT         ,Current counter value"
rgroup.long 0x1C++0x03
line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
bitfld.long 0x00 31. " NOREF           ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
bitfld.long 0x00 30. "  SKEW              ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
hexmask.long.tbyte 0x00 0.--23. 1. "        TENMS          ,Holds a reload value to be used for 10ms (100Hz) timing"
rgroup.long 0xD00++0x03
line.long 0x00 "CPUID,CPUID Base Register"
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER     ,Indicates implementer"
bitfld.long 0x00 20.--23. "               VARIANT           ,Indicates processor revision" "Revision 0,?..."
bitfld.long 0x00 16.--19. "     ARCHITECTURE   ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension"
textline "                     "
hexmask.long.word 0x00 4.--15. 1. " PARTNO          ,Indicates part number"
bitfld.long 0x00 0.--3. "             REVISION          ,Indicates patch release" "Reserved,Reserved,Patch 2,?..."
group.long 0xD04++0x23
line.long 0x00 "ICSR,Interrupt Control and State Register"
setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET      , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x00 27. "      PENDSVSET         , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x00 25. "    PENDSTSET      ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
textline "                     "
bitfld.long 0x00 24. " STTNS           ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure"
rbitfld.long 0x00 23. "       ISRPREEMPT        ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
rbitfld.long 0x00 22. "       ISRPENDING     ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
textline "                     "
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING     ,The exception number of the highest priority pending and enabled interrupt"
rbitfld.long 0x00 11. "             RETTOBASE         ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
hexmask.long.word 0x00 0.--8. 1. "        VECTACTIVE     ,The exception number of the current executing exception"
line.long 0x04 "VTOR,Vector Table Offset Register"
hexmask.long 0x04 7.--31. 0x80 " TBLOFF          ,Bits[31:7] of the vector table address"
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT     ,Vector Key"
rbitfld.long 0x08 15. "             ENDIANNESS        ,Indicates the memory system endianness" "Little endian,Big endian"
bitfld.long 0x08 14. "  PRIS           ,Prioritize Secure exceptions" "Disabled,Enabled"
textline "                     "
bitfld.long 0x08 13. " BFHFNMINS       ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled"
bitfld.long 0x08 8.--10. "         PRIGROUP          ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
bitfld.long 0x08 3. "    SYSRESETREQS   ,System reset request Secure only" "Both states,Secure only"
textline "                     "
bitfld.long 0x08 2. " SYSRESETREQ     ,System reset request" "Not requested,Requested"
bitfld.long 0x08 1. "    VECTCLRACTIVE     ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
line.long 0x0C "SCR,System Control Register"
bitfld.long 0x0C 4. " SEVONPEND       ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
bitfld.long 0x0C 3. "       SLEEPDEEPS        ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only"
bitfld.long 0x0C 2. "    SLEEPDEEP      ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
textline "                     "
bitfld.long 0x0C 1. " SLEEPONEXIT     ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
line.long 0x10 "CCR,Configuration and Control Register"
bitfld.long 0x10 18. " BP              ,Branch prediction enable bit" "Disabled,Enabled"
bitfld.long 0x10 17. "         IC                ,Instruction cache enable bit" "Disabled,Enabled"
bitfld.long 0x10 16. "       DC             ,Cache enable bit" "Disabled,Enabled"
textline "                     "
bitfld.long 0x10 10. " STKOFHFNMIGN    ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 8. "      BFHFNMIGN         ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored"
bitfld.long 0x10 4. "    DIV_0_TRP      ,Controls the trap on divide by 0" "Disabled,Enabled"
textline "                     "
bitfld.long 0x10 3. " UNALIGN_TRP     ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
bitfld.long 0x10 1. "         USERSETMPEND      ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
line.long 0x14 "SHPR1,System Handler Priority Register 1"
hexmask.long.byte 0x14 24.--31. 1. " PRI_7           ,Priority of system handler 7, SecureFault"
hexmask.long.byte 0x14 16.--23. 1. "               PRI_6             ,Priority of system handler 6, UsageFault"
hexmask.long.byte 0x14 8.--15. 1. "             PRI_5          ,Priority of system handler 5, BusFault"
textline "                     "
hexmask.long.byte 0x14 0.--7. 1. " PRI_4           ,Priority of system handler 4, MemManage"
line.long 0x18 "SHPR2,System Handler Priority Register 2"
hexmask.long.byte 0x18 24.--31. 1. " PRI_11          ,Priority of system handler 11, SVCall"
line.long 0x1C "SHPR3,System Handler Priority Register 3"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15          ,Priority of system handler 15, SysTick"
hexmask.long.byte 0x1C 16.--23. 1. "               PRI_14            ,Priority of system handler 14, PendSV"
hexmask.long.byte 0x1C 0.--7. 1. "             PRI_12         ,Priority of system handler 12, DebugMonitor"
line.long 0x20 "SHCSR,System Handler Control and State Register"
bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending"
bitfld.long 0x20 20. "      SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending"
bitfld.long 0x20 19. "    SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x20 18. " USGFAULTENA     ,UsageFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 17. "         BUSFAULTENA       ,BusFault exception enable" "Disabled,Enabled"
bitfld.long 0x20 16. "       MEMFAULTENA    ,MemManage exception enable" "Disabled,Enabled"
textline "                     "
bitfld.long 0x20 15. " SVCALLPENDED    ,SVCall exception status" "Not pending,Pending"
bitfld.long 0x20 14. "      BUSFAULTPENDED    ,BusFault exception status" "Not pending,Pending"
bitfld.long 0x20 13. "    MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending"
textline "                     "
bitfld.long 0x20 12. " USGFAULTPENDED  ,UsageFault exception status" "Not pending,Pending"
bitfld.long 0x20 11. "      SYSTICKACT        ,SysTick exception status" "Not active,Active"
bitfld.long 0x20 10. "     PENDSVACT      ,PendSV exception status" "Not active,Active"
textline "                     "
bitfld.long 0x20 8. " MONITORACT      ,Monitor exception status" "Not active,Active"
bitfld.long 0x20 7. "       SVCALLACT         ,SVCall exception status" "Not active,Active"
bitfld.long 0x20 5. "     NMIACT         ,NMI exception status" "Not active,Active"
textline "                     "
bitfld.long 0x20 4. " SECUREFAULTACT  ,SecureFault exception status" "Not active,Active"
bitfld.long 0x20 3. "       USGFAULTACT       ,UsageFault exception status" "Not active,Active"
bitfld.long 0x20 2. "     HARDFAULTACT   ,HardFault exception status for the selected Security state" "Not active,Active"
textline "                     "
bitfld.long 0x20 1. " BUSFAULTACT     ,BusFault exception status" "Not active,Active"
bitfld.long 0x20 0. "       MEMFAULTACT       ,MemManage exception status" "Not active,Active"
group.byte 0xD28++0x1
line.byte 0x00 "MMFSR,MemManage Status Register"
bitfld.byte 0x00 7. "       MMARVALID       ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x00 5. "        MLSPERR           ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x00 4. "   MSTKERR        ,Stacking Access Violations" "Not occurred,Occurred"
textline "                     "
bitfld.byte 0x00 3. " MUNSTKERR       ,Unstacking Access Violations" "Not occurred,Occurred"
bitfld.byte 0x00 1. "     DACCVIOL          ,Data Access Violation" "Not occurred,Occurred"
bitfld.byte 0x00 0. "   IACCVIOL       ,Instruction Access Violation" "Not occurred,Occurred"
line.byte 0x01 "BFSR,Bus Fault Status Register"
bitfld.byte 0x01 7. "       BFARVALID       ,Address Valid Flag" "Not valid,Valid"
bitfld.byte 0x01 5. "        LSPERR            ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
bitfld.byte 0x01 4. "   STKERR         ,Derived bus fault (exception entry)" "Not occurred,Occurred"
textline "                     "
bitfld.byte 0x01 3. " UNSTKERR        ,Derived bus fault (exception return)" "Not occurred,Occurred"
bitfld.byte 0x01 2. "     IMPRECISERR       ,Imprecise data access error" "Not occurred,Occurred"
bitfld.byte 0x01 1. "   PRECISERR      ,Precise data access error" "Not occurred,Occurred"
textline "                     "
bitfld.byte 0x01 0. " IBUSERR         ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
group.word 0xD2A++0x1
line.word 0x00 "UFSR,Usage Fault Status Register"
eventfld.word 0x00 9. "     DIVBYZERO       ,Divide by zero error" "No error,Error"
eventfld.word 0x00 8. "         UNALIGNED         ,Unaligned access error" "No error,Error"
eventfld.word 0x00 4. "       STKOF          ,Stack overflow error" "No error,Error"
textline "                     "
eventfld.word 0x00 3. " NOCP            ,A coprocessor access error" "No error,Error"
eventfld.word 0x00 2. "         INVPC             ,An integrity check error" "No error,Error"
eventfld.word 0x00 1. "       INVSTATE       , Invalid Combination of EPSR and Instruction" "No error,Error"
textline "                     "
eventfld.word 0x00 0. " UNDEFINSTR      ,Undefined instruction error" "No error,Error"
group.long 0xD2C++0x03
line.long 0x00 "HFSR,HardFault Status Register"
bitfld.long 0x00 31. " DEBUGEVT        ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
bitfld.long 0x00 30. "     FORCED            ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
bitfld.long 0x00 1. "   VECTTBL        ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
group.long 0xD34++0x0B
line.long 0x00 "MMFAR,MemManage Fault Address Register"
line.long 0x04 "BFAR,BusFault Address Register"
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
group.long 0xD88++0x03
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 20.--21. " CP10            ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
bitfld.long 0x00 14.--15. "       CP7               ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
textline "                     "
bitfld.long 0x00 12.--13. " CP6             ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
bitfld.long 0x00 10.--11. "       CP5               ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
bitfld.long 0x00 8.--9. "     CP4            ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
textline "                     "
bitfld.long 0x00 6.--7. " CP3             ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
bitfld.long 0x00 4.--5. "       CP2               ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
bitfld.long 0x00 2.--3. "     CP1            ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
textline "                     "
bitfld.long 0x00 0.--1. " CP0             ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48)
group.long 0xD8C++0x03
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 11. " CP11            ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled"
bitfld.long 0x00 10. "         CP10              ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled"
bitfld.long 0x00 7. "       CP7            ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 6. " CP6             ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled"
bitfld.long 0x00 5. "         CP5               ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled"
bitfld.long 0x00 4. "       CP4            ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 3. " CP3             ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled"
bitfld.long 0x00 2. "         CP2               ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled"
bitfld.long 0x00 1. "       CP1            ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled"
textline "                     "
bitfld.long 0x00 0. " CP0             ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled"
else
hgroup.long 0xD8C++0x03
hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)"
endif
wgroup.long 0xF00++0x03
line.long 0x00 "STIR,Software Triggered Interrupt Register"
hexmask.long.word 0x00 0.--8. 1. " INTID           ,Indicates the interrupt to be pended"
tree "Memory System"
width 10.
rgroup.long 0xD78++0x03
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. " ICB      ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest"
bitfld.long 0x00 27.--29. "  LOU      ,LOUU" "Level 1,Level 2,?..."
bitfld.long 0x00 24.--26. "        LOC           ,Level of Coherency" "Level 1,Level 2,?..."
textline "                   "
bitfld.long 0x00 18.--20. " CL7      ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..."
bitfld.long 0x00 15.--17. "   CL6      ,Cache type field level 6" "No cache,?..."
bitfld.long 0x00 12.--14. "       CL5           ,Cache type field level 5" "No cache,?..."
textline "                   "
bitfld.long 0x00 9.--11. " CL4      ,Cache type field level 4" "No cache,?..."
bitfld.long 0x00 6.--8. "          CL3      ,Cache type field level 3" "No cache,?..."
bitfld.long 0x00 3.--5. "       CL2           ,Cache type field level 2" "No cache,?..."
textline "                   "
bitfld.long 0x00 0.--2. " CL1      ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000)
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT   ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
bitfld.long 0x00 24.--27. "          CWG      ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
bitfld.long 0x00 20.--23. "              ERG           ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
textline "                   "
bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.long 0xD7C++0x03
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 29.--31. " FORMAT   ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..."
endif
rgroup.long 0xD80++0x03
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT       ,Indicates support available for Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. "     WB       ,Indicates support available for Write-Back" "Not supported,Supported"
bitfld.long 0x00 29. "  RA            ,Indicates support available for read allocation" "Not supported,Supported"
textline "                   "
bitfld.long 0x00 28. " WA       ,Indicates support available for write allocation" "Not supported,Supported"
hexmask.long.word 0x00 13.--27. 1. "     NUMSETS  ,Indicates the number of sets as (number of sets) - 1"
hexmask.long.word 0x00 3.--12. 1. "           ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
textline "                   "
bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
group.long 0xD84++0x03
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " LEVEL    ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..."
bitfld.long 0x00 0. "           IND      ,Identifies instruction or data cache to use" "Data/Unified,Instruction"
wgroup.long 0xF50++0x03
line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU"
wgroup.long 0xF58++0x23
line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU"
line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC"
line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way"
hexmask.long 0x08 4.--31. 1. " SETWAY   ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x08 1.--3. "          LEVEL    ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU"
line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC"
line.long 0x14 "DCCSW,D-Cache Clean by Set-Way"
hexmask.long 0x14 4.--31. 1. " SETWAY   ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x14 1.--3. "          LEVEL    ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC"
line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way"
hexmask.long 0x1C 4.--31. 1. " SETWAY   ,Defines number of the way to operate on and number of the set to operate on"
bitfld.long 0x1C 1.--3. "          LEVEL    ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8"
line.long 0x20 "BPIALL,Branch Predictor Invalidate All"
tree.end
tree "Feature Registers"
width 10.
rgroup.long 0xD40++0x0B
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 4.--7. " STATE1    ,T32 instruction set support" ",,,Supported,?..."
bitfld.long 0x00 0.--3. "                    STATE0         ,ARM instruction set support" "Not supported,?..."
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x04 8.--11. " MPROF     ,M profile programmers' model" ",,2-stack,?..."
bitfld.long 0x04 4.--7. "                      SECURITY       ,Security support" "Not implemented,Implemented,?..."
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x08 20.--23. " MPROFDBG  ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..."
rgroup.long 0xD4C++0x03
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
rgroup.long 0xD50++0x03
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 20.--23. " AUXREG    ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. "                TCM            ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
bitfld.long 0x00 12.--15. "        SHRLEV    ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..."
textline "                   "
bitfld.long 0x00 8.--11. " OUTMSHR   ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored"
bitfld.long 0x00 4.--7. "                PMSASUP        ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..."
rgroup.long 0xD54++0x03
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
rgroup.long 0xD58++0x03
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 24.--27. " WFISTALL  ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
rgroup.long 0xD5C++0x03
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 8.--11. " BPMAINT   ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..."
bitfld.long 0x00 4.--7. "                CMAINTSW       ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..."
bitfld.long 0x00 0.--3. "        CMAINTVA  ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..."
rgroup.long 0xD60++0x03
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
bitfld.long 0x00 24.--27. " DIVIDE    ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
bitfld.long 0x00 20.--23. "                DEBUG          ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
bitfld.long 0x00 16.--19. "        COPROC    ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..."
textline "                   "
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
bitfld.long 0x00 8.--11. "                BITFIELD       ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
bitfld.long 0x00 4.--7. "    BITCOUNT  ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
rgroup.long 0xD64++0x03
line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1"
bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
bitfld.long 0x00 20.--23. "                IMMEDIATE      ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
bitfld.long 0x00 16.--19. "  IFTHEN    ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
textline "                   "
bitfld.long 0x00 12.--15. " EXTEND    ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..."
rgroup.long 0xD68++0x03
line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2"
bitfld.long 0x00 28.--31. " REVERSAL  ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
bitfld.long 0x00 20.--23. "         MULTU          ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
bitfld.long 0x00 16.--19. "    MULTS     ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..."
textline "                   "
bitfld.long 0x00 12.--15. " MULT      ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..."
bitfld.long 0x00 8.--11. "                MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
bitfld.long 0x00 4.--7. "  MEMHINT   ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
textline "                   "
bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..."
rgroup.long 0xD6C++0x03
line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3"
bitfld.long 0x00 24.--27. " TRUENOP   ,Indicates the support for a true  NOP instruction" "Not supported,Supported,?..."
bitfld.long 0x00 20.--23. "                THUMBCOPY      ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
bitfld.long 0x00 16.--19. "        TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
textline "                   "
bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "                SVC            ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
bitfld.long 0x00 4.--7. "        SIMD      ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..."
textline "                   "
bitfld.long 0x00 0.--3. " SATURATE  ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..."
rgroup.long 0xD70++0x03
line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4"
bitfld.long 0x00 24.--27. " PSR_M     ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..."
bitfld.long 0x00 20.--23. "                SYNCHPRIMFRAC  ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..."
bitfld.long 0x00 16.--19. "            BARRIER   ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..."
textline "                   "
bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
bitfld.long 0x00 4.--7. "                WITHSHIFTS     ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..."
bitfld.long 0x00 0.--3. "           UNPRIV    ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..."
tree.end
tree "CoreSight Identification Registers"
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 11.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT     ,Component architect"
bitfld.long 0x00 20. "         PRESENT        ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. "  REVISION      ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                    "
bitfld.long 0x00 12.--15. " ARCHVER       ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "           ARCHPART       ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT       ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "DPIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DPIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. "           Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DPIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision      ,Revision"
bitfld.long 0x08 3. "           JEDEC          ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. "        JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DPIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd        ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. "           CMB            ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "PID4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count         ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. "           JEP106_CC      ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DCIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0       ,CoreSight component identification preamble"
line.long 0x04 "DCIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC            ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. "           PRMBL_1        ,CoreSight component class"
line.long 0x08 "DCIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2       ,CoreSight component identification preamble"
line.long 0x0c "DCIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3       ,CoreSight component identification preamble"
tree.end
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Memory Protection Unit (MPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
rgroup.long 0xD90++0x03
line.long 0x00 "MPU_TYPE,MPU Type Register"
bitfld.long 0x00 8.--15. " DREGION    ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 0. "         SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..."
group.long 0xD94++0x03
line.long 0x00 "MPU_CTRL,MPU Control Register"
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
bitfld.long 0x00 1. "   HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
bitfld.long 0x00 0. "   ENABLE ,Enables the MPU" "Disabled,Enabled"
group.long 0xD98++0x03
line.long 0x00 "MPU_RNR,MPU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " REGION     ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
tree.close "MPU regions"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
group.long 0xD9C++0x03 "Region 0"
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x0
line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x0
hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
group.long 0xD9C++0x03 "Region 1"
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x1
line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x1
hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
group.long 0xD9C++0x03 "Region 2"
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x2
line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x2
hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
group.long 0xD9C++0x03 "Region 3"
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x3
line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x3
hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
group.long 0xD9C++0x03 "Region 4"
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x4
line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x4
hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
group.long 0xD9C++0x03 "Region 5"
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x5
line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x5
hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
group.long 0xD9C++0x03 "Region 6"
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x6
line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x6
hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
group.long 0xD9C++0x03 "Region 7"
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x7
line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x7
hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
group.long 0xD9C++0x03 "Region 8"
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x8
line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x8
hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
group.long 0xD9C++0x03 "Region 9"
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0x9
line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0x9
hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
group.long 0xD9C++0x03 "Region 10"
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xA
line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xA
hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
group.long 0xD9C++0x03 "Region 11"
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xB
line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xB
hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
group.long 0xD9C++0x03 "Region 12"
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xC
line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xC
hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
group.long 0xD9C++0x03 "Region 13"
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xD
line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xD
hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
group.long 0xD9C++0x03 "Region 14"
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xE
line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xE
hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
group.long 0xD9C++0x03 "Region 15"
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
hexmask.long 0x00 5.--31. 0x20 " ADDR       ,Base address of the region"
bitfld.long 0x00 3.--4. "       SH       ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable"
bitfld.long 0x00 1.--2. "     AP  ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any"
textline "                   "
bitfld.long 0x00 0. "      XN         ,Defines whether code can be executed from this region" "Execute,Not Execute"
group.long 0xDA0++0x03
saveout 0xD98 %l 0xF
line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
hexmask.long 0x00 5.--31. 0x20 " LIMIT      ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region"
bitfld.long 0x00 1.--3. "       ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. "                   EN  ,Enable" "Disabled,Enabled"
else
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
textline "                   "
hgroup.long 0xDA0++0x03
saveout 0xD98 %l 0xF
hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15"
endif
tree.end
newline
group.long 0xDC0++0x07
line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 24.--27. "  ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 16.--19. "  ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 8.--11. "  ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x00 0.--3. "  ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1"
bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 24.--27. "  ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 16.--19. "  ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 8.--11. "  ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
newline
bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate"
bitfld.long 0x04 0.--3. "  ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Security Attribution Unit (SAU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 15.
group.long 0xDD0++0x03
line.long 0x00 "SAU_CTRL,SAU Control Register"
bitfld.long 0x00 1. " ALLNS   ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure"
bitfld.long 0x00 0. "  ENABLE ,Enables the SAU" "Disabled,Enabled"
rgroup.long 0xDD4++0x03
line.long 0x00 "SAU_TYPE,SAU Type Register"
bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..."
group.long 0xDD8++0x03
line.long 0x00 "SAU_RNR,SAU Region Number Register"
hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR"
tree.close "SAU regions"
if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0)
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0
group.long 0xDDC++0x03 "Region 0"
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 0 (not implemented)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1
group.long 0xDDC++0x03 "Region 1"
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 1 (not implemented)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2
group.long 0xDDC++0x03 "Region 2"
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 2 (not implemented)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3
group.long 0xDDC++0x03 "Region 3"
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 3 (not implemented)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4
group.long 0xDDC++0x03 "Region 4"
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 4 (not implemented)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5
group.long 0xDDC++0x03 "Region 5"
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 5 (not implemented)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6
group.long 0xDDC++0x03 "Region 6"
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 6 (not implemented)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
endif
if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7
group.long 0xDDC++0x03 "Region 7"
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " ADDR    ,Base address of the region"
group.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " LADDR   ,Holds bits [31:5] of the limit address for the selected SAU region"
bitfld.long 0x00 1. "  NSC    ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted"
bitfld.long 0x00 0. "  ENABLE ,SAU region enable" "Disabled,Enabled"
else
hgroup.long 0xDDC++0x03 "Region 7 (not implemented)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
else
hgroup.long 0xDDC++0x03 "Region 0 (not accessible)"
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x0
hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0"
hgroup.long 0xDDC++0x03 "Region 1 (not accessible)"
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x1
hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1"
hgroup.long 0xDDC++0x03 "Region 2 (not accessible)"
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x2
hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2"
hgroup.long 0xDDC++0x03 "Region 3 (not accessible)"
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x3
hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3"
hgroup.long 0xDDC++0x03 "Region 4 (not accessible)"
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x4
hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4"
hgroup.long 0xDDC++0x03 "Region 5 (not accessible)"
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x5
hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5"
hgroup.long 0xDDC++0x03 "Region 6 (not accessible)"
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x6
hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6"
hgroup.long 0xDDC++0x03 "Region 7 (not accessible)"
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7"
hgroup.long 0xDE0++0x03
saveout 0xDD8 %l 0x7
hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7"
endif
tree.end
group.long 0xDE4++0x03
line.long 0x00 "SFSR,Secure Fault Status Register"
bitfld.long 0x00 7. " LSERR   ,Lazy state error flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "  SFARVALID ,Secure fault address valid" "Not valid,Valid"
bitfld.long 0x00 5. "    LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred"
textline "                        "
bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "  AUVIOL    ,Attribution unit violation flag" "Not occurred,Occurred"
bitfld.long 0x00 2. " INVER  ,Invalid exception return flag" "Not occurred,Occurred"
textline "                        "
bitfld.long 0x00 1. " INVIS   ,Invalid integrity signature flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "  INVEP     ,Invalid entry point" "Not occurred,Occurred"
group.long 0xDE8++0x03
line.long 0x00 "SFAR,Secure Fault Address Register"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Nested Vectored Interrupt Controller (NVIC)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 6.
group.long 0x04++0x03
line.long 0x00 "ICTR,Interrupt Controller Type Register"
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511"
width 24.
tree "Interrupt Enable Registers"
group.long 0x100++0x03
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA30  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA29  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA28  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA27  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA26  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA24  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA23  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA22  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA21  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA20  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA18  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA17  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA16  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA15  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA14  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA12  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA11  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA10  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA9   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA8   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA6   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA5   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA4   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA3   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA2   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA0   ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x104++0x03
line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA62  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA61  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA60  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA59  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA58  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA56  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA55  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA54  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA53  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA52  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA50  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA49  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA48  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA47  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA46  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA44  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA43  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA42  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA41  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA40  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA38  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA37  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA36  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA35  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA34  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA32  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x104++0x03
hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x108++0x03
line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA94  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA93  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA92  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA91  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA90  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA88  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA87  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA86  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA85  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA84  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA82  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA81  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA80  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA79  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA78  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA76  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA75  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA74  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA73  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA72  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA70  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA69  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA68  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA67  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA66  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA64  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x108++0x03
hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x10C++0x03
line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA99  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA98  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA96  ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x10C++0x03
hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x110++0x03
line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x110++0x03
hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x114++0x03
line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x114++0x03
hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x118++0x03
line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x118++0x03
hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x11C++0x03
line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x11C++0x03
hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x120++0x03
line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x120++0x03
hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x124++0x03
line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x124++0x03
hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x128++0x03
line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x128++0x03
hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x12C++0x03
line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x130++0x03
line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x130++0x03
hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x134++0x03
line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x134++0x03
hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x138++0x03
line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x138++0x03
hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x13C++0x03
line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
else
hgroup.long 0x13C++0x03
hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register"
endif
tree.end
width 24.
tree "Interrupt Pending Registers"
group.long 0x200++0x03
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN30  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN29  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN28  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN27  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN26  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN24  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN23  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN22  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN21  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN20  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN18  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN17  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN16  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN15  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN14  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN12  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN11  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN10  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN9   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN8   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN6   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN5   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN4   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN3   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN2   ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1   ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN0   ,Interrupt Set/Clear Pending" "Not pending,Pending"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x204++0x03
line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN62  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN61  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN60  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN59  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN58  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN56  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN55  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN54  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN53  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN52  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN50  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN49  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN48  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN47  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN46  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN44  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN43  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN42  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN41  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN40  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN38  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN37  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN36  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN35  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN34  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN32  ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x204++0x03
hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x208++0x03
line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN94  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN93  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN92  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN91  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN90  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN88  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN87  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN86  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN85  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN84  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN82  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN81  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN80  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN79  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN78  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN76  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN75  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN74  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN73  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN72  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN70  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN69  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN68  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN67  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN66  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN64  ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x208++0x03
hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x20C++0x03
line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN99  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN98  ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97  ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN96  ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x20C++0x03
hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x210++0x03
line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x210++0x03
hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x214++0x03
line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x214++0x03
hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x218++0x03
line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x218++0x03
hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x21C++0x03
line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x21C++0x03
hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x220++0x03
line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x220++0x03
hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x224++0x03
line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x224++0x03
hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x228++0x03
line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x228++0x03
hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x22C++0x03
line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x22C++0x03
hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x230++0x03
line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x230++0x03
hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x234++0x03
line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x234++0x03
hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x238++0x03
line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x238++0x03
hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
group.long 0x23C++0x03
line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending"
else
hgroup.long 0x23C++0x03
hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register"
endif
tree.end
width 11.
tree "Interrupt Active Bit Registers"
rgroup.long 0x300++0x03
line.long 0x00 "ACTIVE0,Active Bit Register 0"
bitfld.long 0x00 31. " ACTIVE31  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE30  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE29  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE28  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE27  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE26  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE25  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE24  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE23  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE22  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE21  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE20  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE19  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE18  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE17  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE16  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE15  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE14  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE13  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE12  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE11  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE10  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE9   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE8   ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE7   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE6   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE5   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE4   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE3   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE2   ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE1   ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE0   ,Interrupt Active Flag" "Not active,Active"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
rgroup.long 0x304++0x03
line.long 0x00 "ACTIVE1,Active Bit Register 1"
bitfld.long 0x00 31. " ACTIVE63  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE62  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE61  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE60  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE59  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE58  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE57  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE56  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE55  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE54  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE53  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE52  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE51  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE50  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE49  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE48  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE47  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE46  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE45  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE44  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE43  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE42  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE41  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE40  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE39  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE38  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE37  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE36  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE35  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE34  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE33  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE32  ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x304++0x03
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
rgroup.long 0x308++0x03
line.long 0x00 "ACTIVE2,Active Bit Register 2"
bitfld.long 0x00 31. " ACTIVE95  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE94  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE93  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE92  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE91  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE90  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE89  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE88  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE87  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE86  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE85  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE84  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE83  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE82  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE81  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE80  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE79  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE78  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE77  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE76  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE75  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE74  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE73  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE72  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE71  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE70  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE69  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE68  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE67  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE66  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE65  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE64  ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x308++0x03
hide.long 0x00 "ACTIVE2,Active Bit Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
rgroup.long 0x30C++0x03
line.long 0x00 "ACTIVE3,Active Bit Register 3"
bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE99  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE98  ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE97  ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE96  ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x30C++0x03
hide.long 0x00 "ACTIVE3,Active Bit Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
rgroup.long 0x310++0x03
line.long 0x00 "ACTIVE4,Active Bit Register 4"
bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x310++0x03
hide.long 0x00 "ACTIVE4,Active Bit Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
rgroup.long 0x314++0x03
line.long 0x00 "ACTIVE5,Active Bit Register 5"
bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x314++0x03
hide.long 0x00 "ACTIVE5,Active Bit Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
rgroup.long 0x318++0x03
line.long 0x00 "ACTIVE6,Active Bit Register 6"
bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x318++0x03
hide.long 0x00 "ACTIVE6,Active Bit Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
rgroup.long 0x31C++0x03
line.long 0x00 "ACTIVE7,Active Bit Register 7"
bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE254 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE253 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE252 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE251 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE250 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE248 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE247 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE246 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE245 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE244 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE242 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE241 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE240 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x31C++0x03
hide.long 0x00 "ACTIVE7,Active Bit Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
rgroup.long 0x320++0x03
line.long 0x00 "ACTIVE8,Active Bit Register 8"
bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE286 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE285 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE284 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE283 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE282 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE280 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE279 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE278 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE277 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE276 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE274 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE273 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE272 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE271 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE270 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE268 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE267 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE266 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE265 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE264 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE262 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE261 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE260 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE259 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE258 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE256 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x320++0x03
hide.long 0x00 "ACTIVE8,Active Bit Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
rgroup.long 0x324++0x03
line.long 0x00 "ACTIVE9,Active Bit Register 9"
bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE318 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE317 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE316 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE315 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE314 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE312 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE311 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE310 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE309 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE308 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE306 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE305 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE304 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE303 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE302 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE300 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE299 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE298 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE297 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE296 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE294 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE293 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE292 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE291 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE290 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE288 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x324++0x03
hide.long 0x00 "ACTIVE9,Active Bit Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
rgroup.long 0x328++0x03
line.long 0x00 "ACTIVE10,Active Bit Register 10"
bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE350 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE349 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE348 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE347 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE346 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE344 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE343 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE342 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE341 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE340 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE338 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE337 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE336 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE335 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE334 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE332 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE331 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE330 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE329 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE328 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE326 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE325 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE324 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE323 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE322 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE320 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x328++0x03
hide.long 0x00 "ACTIVE10,Active Bit Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
rgroup.long 0x32C++0x03
line.long 0x00 "ACTIVE11,Active Bit Register 11"
bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE382 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE381 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE380 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE379 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE378 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE376 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE375 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE374 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE373 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE372 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE370 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE369 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE368 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE367 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE366 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE364 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE363 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE362 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE361 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE360 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE358 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE357 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE356 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE355 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE354 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE352 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x32C++0x03
hide.long 0x00 "ACTIVE11,Active Bit Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
rgroup.long 0x330++0x03
line.long 0x00 "ACTIVE12,Active Bit Register 12"
bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE414 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE413 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE412 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE411 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE410 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE408 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE407 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE406 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE405 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE404 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE402 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE401 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE400 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE399 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE398 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE396 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE395 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE394 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE393 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE392 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE390 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE389 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE388 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE387 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE386 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE384 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x330++0x03
hide.long 0x00 "ACTIVE12,Active Bit Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
rgroup.long 0x334++0x03
line.long 0x00 "ACTIVE13,Active Bit Register 13"
bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE446 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE445 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE444 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE443 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE442 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE440 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE439 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE438 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE437 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE436 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE434 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE433 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE432 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE431 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE430 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE428 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE427 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE426 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE425 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE424 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE422 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE421 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE420 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE419 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE418 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE416 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x334++0x03
hide.long 0x00 "ACTIVE13,Active Bit Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
rgroup.long 0x338++0x03
line.long 0x00 "ACTIVE14,Active Bit Register 14"
bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE478 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE477 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE476 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE475 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE474 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE472 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE471 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE470 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE469 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE468 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE466 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE465 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE464 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE463 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE462 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE460 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE459 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE458 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE457 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE456 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE454 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE453 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE452 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE451 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE450 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE448 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x338++0x03
hide.long 0x00 "ACTIVE14,Active Bit Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F)
rgroup.long 0x33C++0x03
line.long 0x00 "ACTIVE15,Active Bit Register 15"
bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 30. "  ACTIVE510 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 29. "  ACTIVE509 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 28. "  ACTIVE508 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 27. "  ACTIVE507 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 26. "  ACTIVE506 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 24. "  ACTIVE504 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 23. "  ACTIVE503 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 22. "  ACTIVE502 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 21. "  ACTIVE501 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 20. "  ACTIVE500 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 18. "  ACTIVE498 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 17. "  ACTIVE497 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 16. "  ACTIVE496 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 15. "  ACTIVE495 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 14. "  ACTIVE494 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 12. "  ACTIVE492 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 11. "  ACTIVE491 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 10. "  ACTIVE490 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 9. "  ACTIVE489 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 8. "  ACTIVE488 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 6. "  ACTIVE486 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 5. "  ACTIVE485 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 4. "  ACTIVE484 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 3. "  ACTIVE483 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 2. "  ACTIVE482 ,Interrupt Active Flag" "Not active,Active"
textline "                    "
bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active"
bitfld.long 0x00 0. "  ACTIVE480 ,Interrupt Active Flag" "Not active,Active"
else
hgroup.long 0x33C++0x03
hide.long 0x00 "ACTIVE15,Active Bit Register 15"
endif
tree.end
width 13.
tree "Interrupt Target Non-Secure Registers"
group.long 0x380++0x03
line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0"
bitfld.long 0x00 31. " ITNS31  ,Interrupt Targets Non-secure 31" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS30  ,Interrupt Targets Non-secure 30" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS29  ,Interrupt Targets Non-secure 29" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS28  ,Interrupt Targets Non-secure 28" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS27  ,Interrupt Targets Non-secure 27" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS26  ,Interrupt Targets Non-secure 26" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS25  ,Interrupt Targets Non-secure 25" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS24  ,Interrupt Targets Non-secure 24" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS23  ,Interrupt Targets Non-secure 23" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS22  ,Interrupt Targets Non-secure 22" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS21  ,Interrupt Targets Non-secure 21" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS20  ,Interrupt Targets Non-secure 20" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS19  ,Interrupt Targets Non-secure 19" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS18  ,Interrupt Targets Non-secure 18" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS17  ,Interrupt Targets Non-secure 17" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS16  ,Interrupt Targets Non-secure 16" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS15  ,Interrupt Targets Non-secure 15" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS14  ,Interrupt Targets Non-secure 14" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS13  ,Interrupt Targets Non-secure 13" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS12  ,Interrupt Targets Non-secure 12" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS11  ,Interrupt Targets Non-secure 11" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS10  ,Interrupt Targets Non-secure 10" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS9   ,Interrupt Targets Non-secure 9" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS8   ,Interrupt Targets Non-secure 8" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS7   ,Interrupt Targets Non-secure 7" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS6   ,Interrupt Targets Non-secure 6" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS5   ,Interrupt Targets Non-secure 5" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS4   ,Interrupt Targets Non-secure 4" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS3   ,Interrupt Targets Non-secure 3" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS2   ,Interrupt Targets Non-secure 2" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS1   ,Interrupt Targets Non-secure 1" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS0   ,Interrupt Targets Non-secure 0" "Secure,Non-secure"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x384++0x03
line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
bitfld.long 0x00 31. " ITNS63  ,Interrupt Targets Non-secure 63" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS62  ,Interrupt Targets Non-secure 62" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS61  ,Interrupt Targets Non-secure 61" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS60  ,Interrupt Targets Non-secure 60" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS59  ,Interrupt Targets Non-secure 59" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS58  ,Interrupt Targets Non-secure 58" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS57  ,Interrupt Targets Non-secure 57" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS56  ,Interrupt Targets Non-secure 56" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS55  ,Interrupt Targets Non-secure 55" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS54  ,Interrupt Targets Non-secure 54" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS53  ,Interrupt Targets Non-secure 53" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS52  ,Interrupt Targets Non-secure 52" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS51  ,Interrupt Targets Non-secure 51" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS50  ,Interrupt Targets Non-secure 50" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS49  ,Interrupt Targets Non-secure 49" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS48  ,Interrupt Targets Non-secure 48" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS47  ,Interrupt Targets Non-secure 47" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS46  ,Interrupt Targets Non-secure 46" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS45  ,Interrupt Targets Non-secure 45" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS44  ,Interrupt Targets Non-secure 44" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS43  ,Interrupt Targets Non-secure 43" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS42  ,Interrupt Targets Non-secure 42" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS41  ,Interrupt Targets Non-secure 41" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS40  ,Interrupt Targets Non-secure 40" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS39  ,Interrupt Targets Non-secure 39" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS38  ,Interrupt Targets Non-secure 38" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS37  ,Interrupt Targets Non-secure 37" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS36  ,Interrupt Targets Non-secure 36" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS35  ,Interrupt Targets Non-secure 35" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS34  ,Interrupt Targets Non-secure 34" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS33  ,Interrupt Targets Non-secure 33" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS32  ,Interrupt Targets Non-secure 32" "Secure,Non-secure"
else
hgroup.long 0x384++0x03
hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x388++0x03
line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
bitfld.long 0x00 31. " ITNS95  ,Interrupt Targets Non-secure 95" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS94  ,Interrupt Targets Non-secure 94" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS93  ,Interrupt Targets Non-secure 93" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS92  ,Interrupt Targets Non-secure 92" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS91  ,Interrupt Targets Non-secure 91" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS90  ,Interrupt Targets Non-secure 90" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS89  ,Interrupt Targets Non-secure 89" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS88  ,Interrupt Targets Non-secure 88" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS87  ,Interrupt Targets Non-secure 87" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS86  ,Interrupt Targets Non-secure 86" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS85  ,Interrupt Targets Non-secure 85" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS84  ,Interrupt Targets Non-secure 84" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS83  ,Interrupt Targets Non-secure 83" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS82  ,Interrupt Targets Non-secure 82" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS81  ,Interrupt Targets Non-secure 81" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS80  ,Interrupt Targets Non-secure 80" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS79  ,Interrupt Targets Non-secure 79" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS78  ,Interrupt Targets Non-secure 78" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS77  ,Interrupt Targets Non-secure 77" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS76  ,Interrupt Targets Non-secure 76" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS75  ,Interrupt Targets Non-secure 75" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS74  ,Interrupt Targets Non-secure 74" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS73  ,Interrupt Targets Non-secure 73" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS72  ,Interrupt Targets Non-secure 72" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS71  ,Interrupt Targets Non-secure 71" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS70  ,Interrupt Targets Non-secure 70" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS69  ,Interrupt Targets Non-secure 69" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS68  ,Interrupt Targets Non-secure 68" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS67  ,Interrupt Targets Non-secure 67" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS66  ,Interrupt Targets Non-secure 66" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS65  ,Interrupt Targets Non-secure 65" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS64  ,Interrupt Targets Non-secure 64" "Secure,Non-secure"
else
hgroup.long 0x388++0x03
hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x38C++0x03
line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS99  ,Interrupt Targets Non-secure 99" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS98  ,Interrupt Targets Non-secure 98" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS97  ,Interrupt Targets Non-secure 97" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS96  ,Interrupt Targets Non-secure 96" "Secure,Non-secure"
else
hgroup.long 0x38C++0x03
hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x390++0x03
line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure"
else
hgroup.long 0x390++0x03
hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x394++0x03
line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure"
else
hgroup.long 0x394++0x03
hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x398++0x03
line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure"
else
hgroup.long 0x398++0x03
hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x39C++0x03
line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure"
else
hgroup.long 0x39C++0x03
hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x3A0++0x03
line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure"
else
hgroup.long 0x3A0++0x03
hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x3A4++0x03
line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure"
else
hgroup.long 0x3A4++0x03
hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x3A8++0x03
line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure"
else
hgroup.long 0x3A8++0x03
hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x3AC++0x03
line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure"
else
hgroup.long 0x3AC++0x03
hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x3B0++0x03
line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure"
else
hgroup.long 0x3B0++0x03
hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x3B4++0x03
line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure"
else
hgroup.long 0x3B4++0x03
hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x3B8++0x03
line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure"
else
hgroup.long 0x3B8++0x03
hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F)
group.long 0x3BC++0x03
line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure"
bitfld.long 0x00 30. "  ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure"
bitfld.long 0x00 29. "  ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure"
bitfld.long 0x00 27. "  ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure"
bitfld.long 0x00 26. "  ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure"
bitfld.long 0x00 24. "  ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure"
bitfld.long 0x00 23. "  ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure"
bitfld.long 0x00 21. "  ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure"
bitfld.long 0x00 20. "  ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure"
bitfld.long 0x00 18. "  ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure"
bitfld.long 0x00 17. "  ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure"
bitfld.long 0x00 15. "  ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure"
bitfld.long 0x00 14. "  ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure"
bitfld.long 0x00 12. "  ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure"
bitfld.long 0x00 11. "  ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure"
bitfld.long 0x00 9. "  ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure"
bitfld.long 0x00 8. "  ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure"
bitfld.long 0x00 6. "  ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure"
bitfld.long 0x00 5. "  ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure"
bitfld.long 0x00 3. "  ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure"
bitfld.long 0x00 2. "  ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure"
textline "                      "
bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure"
bitfld.long 0x00 0. "  ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure"
else
hgroup.long 0x3BC++0x03
hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15"
endif
tree.end
tree "Interrupt Priority Registers"
group.long 0x400++0x1F
line.long 0x0 "IPR0,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_3   ,Interrupt 3   Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_2   ,Interrupt 2   Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_1   ,Interrupt 1   Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_0   ,Interrupt 0   Priority"
line.long 0x4 "IPR1,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_7   ,Interrupt 7   Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_6   ,Interrupt 6   Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_5   ,Interrupt 5   Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_4   ,Interrupt 4   Priority"
line.long 0x8 "IPR2,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_11  ,Interrupt 11  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_10  ,Interrupt 10  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_9   ,Interrupt 9   Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_8   ,Interrupt 8   Priority"
line.long 0xC "IPR3,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_15  ,Interrupt 15  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_14  ,Interrupt 14  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_13  ,Interrupt 13  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_12  ,Interrupt 12  Priority"
line.long 0x10 "IPR4,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_19  ,Interrupt 19  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_18  ,Interrupt 18  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_17  ,Interrupt 17  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_16  ,Interrupt 16  Priority"
line.long 0x14 "IPR5,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_23  ,Interrupt 23  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_22  ,Interrupt 22  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_21  ,Interrupt 21  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_20  ,Interrupt 20  Priority"
line.long 0x18 "IPR6,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_27  ,Interrupt 27  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_26  ,Interrupt 26  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_25  ,Interrupt 25  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_24  ,Interrupt 24  Priority"
line.long 0x1C "IPR7,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31  ,Interrupt 31  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_30  ,Interrupt 30  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_29  ,Interrupt 29  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_28  ,Interrupt 28  Priority"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01)
group.long 0x420++0x1F
line.long 0x0 "IPR8,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_35  ,Interrupt 35  Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_34  ,Interrupt 34  Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_33  ,Interrupt 33  Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_32  ,Interrupt 32  Priority"
line.long 0x4 "IPR9,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_39  ,Interrupt 39  Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_38  ,Interrupt 38  Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_37  ,Interrupt 37  Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_36  ,Interrupt 36  Priority"
line.long 0x8 "IPR10,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_43  ,Interrupt 43  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_42  ,Interrupt 42  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_41  ,Interrupt 41  Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_40  ,Interrupt 40  Priority"
line.long 0xC "IPR11,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_47  ,Interrupt 47  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_46  ,Interrupt 46  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_45  ,Interrupt 45  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_44  ,Interrupt 44  Priority"
line.long 0x10 "IPR12,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_51  ,Interrupt 51  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_50  ,Interrupt 50  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_49  ,Interrupt 49  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_48  ,Interrupt 48  Priority"
line.long 0x14 "IPR13,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_55  ,Interrupt 55  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_54  ,Interrupt 54  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_53  ,Interrupt 53  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_52  ,Interrupt 52  Priority"
line.long 0x18 "IPR14,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_59  ,Interrupt 59  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_58  ,Interrupt 58  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_57  ,Interrupt 57  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_56  ,Interrupt 56  Priority"
line.long 0x1C "IPR15,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_63  ,Interrupt 63  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_62  ,Interrupt 62  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_61  ,Interrupt 61  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_60  ,Interrupt 60  Priority"
else
hgroup.long 0x420++0x1F
hide.long 0x0 "IPR8,Interrupt Priority Register"
hide.long 0x4 "IPR9,Interrupt Priority Register"
hide.long 0x8 "IPR10,Interrupt Priority Register"
hide.long 0xC "IPR11,Interrupt Priority Register"
hide.long 0x10 "IPR12,Interrupt Priority Register"
hide.long 0x14 "IPR13,Interrupt Priority Register"
hide.long 0x18 "IPR14,Interrupt Priority Register"
hide.long 0x1C "IPR15,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02)
group.long 0x440++0x1F
line.long 0x0 "IPR16,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_67  ,Interrupt 67  Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_66  ,Interrupt 66  Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_65  ,Interrupt 65  Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_64  ,Interrupt 64  Priority"
line.long 0x4 "IPR17,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_71  ,Interrupt 71  Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_70  ,Interrupt 70  Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_69  ,Interrupt 69  Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_68  ,Interrupt 68  Priority"
line.long 0x8 "IPR18,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_75  ,Interrupt 75  Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_74  ,Interrupt 74  Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_73  ,Interrupt 73  Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_72  ,Interrupt 72  Priority"
line.long 0xC "IPR19,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_79  ,Interrupt 79  Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_78  ,Interrupt 78  Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_77  ,Interrupt 77  Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_76  ,Interrupt 76  Priority"
line.long 0x10 "IPR20,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_83  ,Interrupt 83  Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_82  ,Interrupt 82  Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_81  ,Interrupt 81  Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_80  ,Interrupt 80  Priority"
line.long 0x14 "IPR21,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_87  ,Interrupt 87  Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_86  ,Interrupt 86  Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_85  ,Interrupt 85  Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_84  ,Interrupt 84  Priority"
line.long 0x18 "IPR22,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_91  ,Interrupt 91  Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_90  ,Interrupt 90  Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_89  ,Interrupt 89  Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_88  ,Interrupt 88  Priority"
line.long 0x1C "IPR23,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_95  ,Interrupt 95  Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_94  ,Interrupt 94  Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_93  ,Interrupt 93  Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_92  ,Interrupt 92  Priority"
else
hgroup.long 0x440++0x1F
hide.long 0x0 "IPR16,Interrupt Priority Register"
hide.long 0x4 "IPR17,Interrupt Priority Register"
hide.long 0x8 "IPR18,Interrupt Priority Register"
hide.long 0xC "IPR19,Interrupt Priority Register"
hide.long 0x10 "IPR20,Interrupt Priority Register"
hide.long 0x14 "IPR21,Interrupt Priority Register"
hide.long 0x18 "IPR22,Interrupt Priority Register"
hide.long 0x1C "IPR23,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03)
group.long 0x460++0x1F
line.long 0x0 "IPR24,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_99  ,Interrupt 99  Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_98  ,Interrupt 98  Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_97  ,Interrupt 97  Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_96  ,Interrupt 96  Priority"
line.long 0x4 "IPR25,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_102 ,Interrupt 102 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_101 ,Interrupt 101 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_100 ,Interrupt 100 Priority"
line.long 0x8 "IPR26,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_106 ,Interrupt 106 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_105 ,Interrupt 105 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_104 ,Interrupt 104 Priority"
line.long 0xC "IPR27,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_110 ,Interrupt 110 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_109 ,Interrupt 109 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_108 ,Interrupt 108 Priority"
line.long 0x10 "IPR28,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_114 ,Interrupt 114 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_113 ,Interrupt 113 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_112 ,Interrupt 112 Priority"
line.long 0x14 "IPR29,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_118 ,Interrupt 118 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_117 ,Interrupt 117 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_116 ,Interrupt 116 Priority"
line.long 0x18 "IPR30,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_122 ,Interrupt 122 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_121 ,Interrupt 121 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_120 ,Interrupt 120 Priority"
line.long 0x1C "IPR31,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_126 ,Interrupt 126 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_125 ,Interrupt 125 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_124 ,Interrupt 124 Priority"
else
hgroup.long 0x460++0x1F
hide.long 0x0 "IPR24,Interrupt Priority Register"
hide.long 0x4 "IPR25,Interrupt Priority Register"
hide.long 0x8 "IPR26,Interrupt Priority Register"
hide.long 0xC "IPR27,Interrupt Priority Register"
hide.long 0x10 "IPR28,Interrupt Priority Register"
hide.long 0x14 "IPR29,Interrupt Priority Register"
hide.long 0x18 "IPR30,Interrupt Priority Register"
hide.long 0x1C "IPR31,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04)
group.long 0x480++0x1F
line.long 0x0 "IPR32,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_130 ,Interrupt 130 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_129 ,Interrupt 129 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_128 ,Interrupt 128 Priority"
line.long 0x4 "IPR33,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_134 ,Interrupt 134 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_133 ,Interrupt 133 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_132 ,Interrupt 132 Priority"
line.long 0x8 "IPR34,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_138 ,Interrupt 138 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_137 ,Interrupt 137 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_136 ,Interrupt 136 Priority"
line.long 0xC "IPR35,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_142 ,Interrupt 142 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_141 ,Interrupt 141 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_140 ,Interrupt 140 Priority"
line.long 0x10 "IPR36,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_146 ,Interrupt 146 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_145 ,Interrupt 145 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_144 ,Interrupt 144 Priority"
line.long 0x14 "IPR37,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_150 ,Interrupt 150 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_149 ,Interrupt 149 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_148 ,Interrupt 148 Priority"
line.long 0x18 "IPR38,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_154 ,Interrupt 154 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_153 ,Interrupt 153 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_152 ,Interrupt 152 Priority"
line.long 0x1C "IPR39,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_158 ,Interrupt 158 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_157 ,Interrupt 157 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_156 ,Interrupt 156 Priority"
else
hgroup.long 0x480++0x1F
hide.long 0x0 "IPR32,Interrupt Priority Register"
hide.long 0x4 "IPR33,Interrupt Priority Register"
hide.long 0x8 "IPR34,Interrupt Priority Register"
hide.long 0xC "IPR35,Interrupt Priority Register"
hide.long 0x10 "IPR36,Interrupt Priority Register"
hide.long 0x14 "IPR37,Interrupt Priority Register"
hide.long 0x18 "IPR38,Interrupt Priority Register"
hide.long 0x1C "IPR39,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05)
group.long 0x4A0++0x1F
line.long 0x0 "IPR40,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_162 ,Interrupt 162 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_161 ,Interrupt 161 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_160 ,Interrupt 160 Priority"
line.long 0x4 "IPR41,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_166 ,Interrupt 166 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_165 ,Interrupt 165 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_164 ,Interrupt 164 Priority"
line.long 0x8 "IPR42,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_170 ,Interrupt 170 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_169 ,Interrupt 169 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_168 ,Interrupt 168 Priority"
line.long 0xC "IPR43,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_174 ,Interrupt 174 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_173 ,Interrupt 173 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_172 ,Interrupt 172 Priority"
line.long 0x10 "IPR44,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_178 ,Interrupt 178 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_177 ,Interrupt 177 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_176 ,Interrupt 176 Priority"
line.long 0x14 "IPR45,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_182 ,Interrupt 182 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_181 ,Interrupt 181 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_180 ,Interrupt 180 Priority"
line.long 0x18 "IPR46,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_186 ,Interrupt 186 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_185 ,Interrupt 185 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_184 ,Interrupt 184 Priority"
line.long 0x1C "IPR47,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_190 ,Interrupt 190 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_189 ,Interrupt 189 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_188 ,Interrupt 188 Priority"
else
hgroup.long 0x4A0++0x1F
hide.long 0x0 "IPR40,Interrupt Priority Register"
hide.long 0x4 "IPR41,Interrupt Priority Register"
hide.long 0x8 "IPR42,Interrupt Priority Register"
hide.long 0xC "IPR43,Interrupt Priority Register"
hide.long 0x10 "IPR44,Interrupt Priority Register"
hide.long 0x14 "IPR45,Interrupt Priority Register"
hide.long 0x18 "IPR46,Interrupt Priority Register"
hide.long 0x1C "IPR47,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06)
group.long 0x4C0++0x1F
line.long 0x0 "IPR48,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_194 ,Interrupt 194 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_193 ,Interrupt 193 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_192 ,Interrupt 192 Priority"
line.long 0x4 "IPR49,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_198 ,Interrupt 198 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_197 ,Interrupt 197 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_196 ,Interrupt 196 Priority"
line.long 0x8 "IPR50,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_202 ,Interrupt 202 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_201 ,Interrupt 201 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_200 ,Interrupt 200 Priority"
line.long 0xC "IPR51,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_206 ,Interrupt 206 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_205 ,Interrupt 205 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_204 ,Interrupt 204 Priority"
line.long 0x10 "IPR52,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_210 ,Interrupt 210 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_209 ,Interrupt 209 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_208 ,Interrupt 208 Priority"
line.long 0x14 "IPR53,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_214 ,Interrupt 214 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_213 ,Interrupt 213 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_212 ,Interrupt 212 Priority"
line.long 0x18 "IPR54,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_218 ,Interrupt 218 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_217 ,Interrupt 217 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_216 ,Interrupt 216 Priority"
line.long 0x1C "IPR55,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_222 ,Interrupt 222 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_221 ,Interrupt 221 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_220 ,Interrupt 220 Priority"
else
hgroup.long 0x4C0++0x1F
hide.long 0x0 "IPR48,Interrupt Priority Register"
hide.long 0x4 "IPR49,Interrupt Priority Register"
hide.long 0x8 "IPR50,Interrupt Priority Register"
hide.long 0xC "IPR51,Interrupt Priority Register"
hide.long 0x10 "IPR52,Interrupt Priority Register"
hide.long 0x14 "IPR53,Interrupt Priority Register"
hide.long 0x18 "IPR54,Interrupt Priority Register"
hide.long 0x1C "IPR55,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07)
group.long 0x4E0++0x1F
line.long 0x0 "IPR56,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_226 ,Interrupt 226 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_225 ,Interrupt 225 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_224 ,Interrupt 224 Priority"
line.long 0x4 "IPR57,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_230 ,Interrupt 230 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_229 ,Interrupt 229 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_228 ,Interrupt 228 Priority"
line.long 0x8 "IPR58,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_234 ,Interrupt 234 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_233 ,Interrupt 233 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_232 ,Interrupt 232 Priority"
line.long 0xC "IPR59,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_238 ,Interrupt 238 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_237 ,Interrupt 237 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_236 ,Interrupt 236 Priority"
line.long 0x10 "IPR60,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_242 ,Interrupt 242 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_241 ,Interrupt 241 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_240 ,Interrupt 240 Priority"
line.long 0x14 "IPR61,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_246 ,Interrupt 246 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_245 ,Interrupt 245 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_244 ,Interrupt 244 Priority"
line.long 0x18 "IPR62,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_250 ,Interrupt 250 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_249 ,Interrupt 249 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_248 ,Interrupt 248 Priority"
line.long 0x1C "IPR63,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_254 ,Interrupt 254 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_253 ,Interrupt 253 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_252 ,Interrupt 252 Priority"
else
hgroup.long 0x4E0++0x1F
hide.long 0x0 "IPR56,Interrupt Priority Register"
hide.long 0x4 "IPR57,Interrupt Priority Register"
hide.long 0x8 "IPR58,Interrupt Priority Register"
hide.long 0xC "IPR59,Interrupt Priority Register"
hide.long 0x10 "IPR60,Interrupt Priority Register"
hide.long 0x14 "IPR61,Interrupt Priority Register"
hide.long 0x18 "IPR62,Interrupt Priority Register"
hide.long 0x1C "IPR63,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08)
group.long 0x500++0x1F
line.long 0x0 "IPR64,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_258 ,Interrupt 258 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_257 ,Interrupt 257 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_256 ,Interrupt 256 Priority"
line.long 0x4 "IPR65,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_262 ,Interrupt 262 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_261 ,Interrupt 261 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_260 ,Interrupt 260 Priority"
line.long 0x8 "IPR66,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_266 ,Interrupt 266 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_265 ,Interrupt 265 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_264 ,Interrupt 264 Priority"
line.long 0xC "IPR67,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_270 ,Interrupt 270 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_269 ,Interrupt 269 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_268 ,Interrupt 268 Priority"
line.long 0x10 "IPR68,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_274 ,Interrupt 274 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_273 ,Interrupt 273 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_272 ,Interrupt 272 Priority"
line.long 0x14 "IPR69,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_278 ,Interrupt 278 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_277 ,Interrupt 277 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_276 ,Interrupt 276 Priority"
line.long 0x18 "IPR70,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_282 ,Interrupt 282 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_281 ,Interrupt 281 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_280 ,Interrupt 280 Priority"
line.long 0x1C "IPR71,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_286 ,Interrupt 286 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_285 ,Interrupt 285 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_284 ,Interrupt 284 Priority"
else
hgroup.long 0x500++0x1F
hide.long 0x0 "IPR64,Interrupt Priority Register"
hide.long 0x4 "IPR65,Interrupt Priority Register"
hide.long 0x8 "IPR66,Interrupt Priority Register"
hide.long 0xC "IPR67,Interrupt Priority Register"
hide.long 0x10 "IPR68,Interrupt Priority Register"
hide.long 0x14 "IPR69,Interrupt Priority Register"
hide.long 0x18 "IPR70,Interrupt Priority Register"
hide.long 0x1C "IPR71,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09)
group.long 0x520++0x1F
line.long 0x0 "IPR72,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_290 ,Interrupt 290 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_289 ,Interrupt 289 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_288 ,Interrupt 288 Priority"
line.long 0x4 "IPR73,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_294 ,Interrupt 294 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_293 ,Interrupt 293 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_292 ,Interrupt 292 Priority"
line.long 0x8 "IPR74,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_298 ,Interrupt 298 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_297 ,Interrupt 297 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_296 ,Interrupt 296 Priority"
line.long 0xC "IPR75,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_302 ,Interrupt 302 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_301 ,Interrupt 301 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_300 ,Interrupt 300 Priority"
line.long 0x10 "IPR76,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_306 ,Interrupt 306 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_305 ,Interrupt 305 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_304 ,Interrupt 304 Priority"
line.long 0x14 "IPR77,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_310 ,Interrupt 310 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_309 ,Interrupt 309 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_308 ,Interrupt 308 Priority"
line.long 0x18 "IPR78,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_314 ,Interrupt 314 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_313 ,Interrupt 313 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_312 ,Interrupt 312 Priority"
line.long 0x1C "IPR79,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_318 ,Interrupt 318 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_317 ,Interrupt 317 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_316 ,Interrupt 316 Priority"
else
hgroup.long 0x520++0x1F
hide.long 0x0 "IPR72,Interrupt Priority Register"
hide.long 0x4 "IPR73,Interrupt Priority Register"
hide.long 0x8 "IPR74,Interrupt Priority Register"
hide.long 0xC "IPR75,Interrupt Priority Register"
hide.long 0x10 "IPR76,Interrupt Priority Register"
hide.long 0x14 "IPR77,Interrupt Priority Register"
hide.long 0x18 "IPR78,Interrupt Priority Register"
hide.long 0x1C "IPR79,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A)
group.long 0x540++0x1F
line.long 0x0 "IPR80,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_322 ,Interrupt 322 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_321 ,Interrupt 321 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_320 ,Interrupt 320 Priority"
line.long 0x4 "IPR81,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_326 ,Interrupt 326 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_325 ,Interrupt 325 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_324 ,Interrupt 324 Priority"
line.long 0x8 "IPR82,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_330 ,Interrupt 330 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_329 ,Interrupt 329 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_328 ,Interrupt 328 Priority"
line.long 0xC "IPR83,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_334 ,Interrupt 334 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_333 ,Interrupt 333 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_332 ,Interrupt 332 Priority"
line.long 0x10 "IPR84,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_338 ,Interrupt 338 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_337 ,Interrupt 337 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_336 ,Interrupt 336 Priority"
line.long 0x14 "IPR85,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_342 ,Interrupt 342 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_341 ,Interrupt 341 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_340 ,Interrupt 340 Priority"
line.long 0x18 "IPR86,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_346 ,Interrupt 346 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_345 ,Interrupt 345 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_344 ,Interrupt 344 Priority"
line.long 0x1C "IPR87,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_350 ,Interrupt 350 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_349 ,Interrupt 349 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_348 ,Interrupt 348 Priority"
else
hgroup.long 0x540++0x1F
hide.long 0x0 "IPR80,Interrupt Priority Register"
hide.long 0x4 "IPR81,Interrupt Priority Register"
hide.long 0x8 "IPR82,Interrupt Priority Register"
hide.long 0xC "IPR83,Interrupt Priority Register"
hide.long 0x10 "IPR84,Interrupt Priority Register"
hide.long 0x14 "IPR85,Interrupt Priority Register"
hide.long 0x18 "IPR86,Interrupt Priority Register"
hide.long 0x1C "IPR87,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B)
group.long 0x560++0x1F
line.long 0x0 "IPR88,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_354 ,Interrupt 354 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_353 ,Interrupt 353 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_352 ,Interrupt 352 Priority"
line.long 0x4 "IPR89,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_358 ,Interrupt 358 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_357 ,Interrupt 357 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_356 ,Interrupt 356 Priority"
line.long 0x8 "IPR90,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_362 ,Interrupt 362 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_361 ,Interrupt 361 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_360 ,Interrupt 360 Priority"
line.long 0xC "IPR91,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_366 ,Interrupt 366 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_365 ,Interrupt 365 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_364 ,Interrupt 364 Priority"
line.long 0x10 "IPR92,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_370 ,Interrupt 370 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_369 ,Interrupt 369 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_368 ,Interrupt 368 Priority"
line.long 0x14 "IPR93,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_374 ,Interrupt 374 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_373 ,Interrupt 373 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_372 ,Interrupt 372 Priority"
line.long 0x18 "IPR94,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_378 ,Interrupt 378 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_377 ,Interrupt 377 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_376 ,Interrupt 376 Priority"
line.long 0x1C "IPR95,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_382 ,Interrupt 382 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_381 ,Interrupt 381 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_380 ,Interrupt 380 Priority"
else
hgroup.long 0x560++0x1F
hide.long 0x0 "IPR88,Interrupt Priority Register"
hide.long 0x4 "IPR89,Interrupt Priority Register"
hide.long 0x8 "IPR90,Interrupt Priority Register"
hide.long 0xC "IPR91,Interrupt Priority Register"
hide.long 0x10 "IPR92,Interrupt Priority Register"
hide.long 0x14 "IPR93,Interrupt Priority Register"
hide.long 0x18 "IPR94,Interrupt Priority Register"
hide.long 0x1C "IPR95,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C)
group.long 0x580++0x1F
line.long 0x0 "IPR96,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_386 ,Interrupt 386 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_385 ,Interrupt 385 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_384 ,Interrupt 384 Priority"
line.long 0x4 "IPR97,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_390 ,Interrupt 390 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_389 ,Interrupt 389 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_388 ,Interrupt 388 Priority"
line.long 0x8 "IPR98,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_394 ,Interrupt 394 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_393 ,Interrupt 393 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_392 ,Interrupt 392 Priority"
line.long 0xC "IPR99,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_398 ,Interrupt 398 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_397 ,Interrupt 397 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_396 ,Interrupt 396 Priority"
line.long 0x10 "IPR100,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_402 ,Interrupt 402 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_401 ,Interrupt 401 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_400 ,Interrupt 400 Priority"
line.long 0x14 "IPR101,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_406 ,Interrupt 406 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_405 ,Interrupt 405 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_404 ,Interrupt 404 Priority"
line.long 0x18 "IPR102,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_410 ,Interrupt 410 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_409 ,Interrupt 409 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_408 ,Interrupt 408 Priority"
line.long 0x1C "IPR103,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_414 ,Interrupt 414 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_413 ,Interrupt 413 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_412 ,Interrupt 412 Priority"
else
hgroup.long 0x580++0x1F
hide.long 0x0 "IPR96,Interrupt Priority Register"
hide.long 0x4 "IPR97,Interrupt Priority Register"
hide.long 0x8 "IPR98,Interrupt Priority Register"
hide.long 0xC "IPR99,Interrupt Priority Register"
hide.long 0x10 "IPR100,Interrupt Priority Register"
hide.long 0x14 "IPR101,Interrupt Priority Register"
hide.long 0x18 "IPR102,Interrupt Priority Register"
hide.long 0x1C "IPR103,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D)
group.long 0x5A0++0x1F
line.long 0x0 "IPR104,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_418 ,Interrupt 418 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_417 ,Interrupt 417 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_416 ,Interrupt 416 Priority"
line.long 0x4 "IPR105,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_422 ,Interrupt 422 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_421 ,Interrupt 421 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_420 ,Interrupt 420 Priority"
line.long 0x8 "IPR106,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_426 ,Interrupt 426 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_425 ,Interrupt 425 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_424 ,Interrupt 424 Priority"
line.long 0xC "IPR107,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_430 ,Interrupt 430 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_429 ,Interrupt 429 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_428 ,Interrupt 428 Priority"
line.long 0x10 "IPR108,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_434 ,Interrupt 434 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_433 ,Interrupt 433 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_432 ,Interrupt 432 Priority"
line.long 0x14 "IPR109,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_438 ,Interrupt 438 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_437 ,Interrupt 437 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_436 ,Interrupt 436 Priority"
line.long 0x18 "IPR110,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_442 ,Interrupt 442 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_441 ,Interrupt 441 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_440 ,Interrupt 440 Priority"
line.long 0x1C "IPR111,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_446 ,Interrupt 446 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_445 ,Interrupt 445 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_444 ,Interrupt 444 Priority"
else
hgroup.long 0x5A0++0x1F
hide.long 0x0 "IPR104,Interrupt Priority Register"
hide.long 0x4 "IPR105,Interrupt Priority Register"
hide.long 0x8 "IPR106,Interrupt Priority Register"
hide.long 0xC "IPR107,Interrupt Priority Register"
hide.long 0x10 "IPR108,Interrupt Priority Register"
hide.long 0x14 "IPR109,Interrupt Priority Register"
hide.long 0x18 "IPR110,Interrupt Priority Register"
hide.long 0x1C "IPR111,Interrupt Priority Register"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E)
group.long 0x5C0++0x1F
line.long 0x0 "IPR112,Interrupt Priority Register"
hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority"
hexmask.long.byte 0x0 16.--23. 1. "  PRI_450 ,Interrupt 450 Priority"
hexmask.long.byte 0x0 8.--15. 1. "  PRI_449 ,Interrupt 449 Priority"
hexmask.long.byte 0x0 0.--7. 1. "  PRI_448 ,Interrupt 448 Priority"
line.long 0x4 "IPR113,Interrupt Priority Register"
hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority"
hexmask.long.byte 0x4 16.--23. 1. "  PRI_454 ,Interrupt 454 Priority"
hexmask.long.byte 0x4 8.--15. 1. "  PRI_453 ,Interrupt 453 Priority"
hexmask.long.byte 0x4 0.--7. 1. "  PRI_452 ,Interrupt 452 Priority"
line.long 0x8 "IPR114,Interrupt Priority Register"
hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority"
hexmask.long.byte 0x8 16.--23. 1. "  PRI_458 ,Interrupt 458 Priority"
hexmask.long.byte 0x8 8.--15. 1. "  PRI_457 ,Interrupt 457 Priority"
hexmask.long.byte 0x8 0.--7. 1. "  PRI_456 ,Interrupt 456 Priority"
line.long 0xC "IPR115,Interrupt Priority Register"
hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority"
hexmask.long.byte 0xC 16.--23. 1. "  PRI_462 ,Interrupt 462 Priority"
hexmask.long.byte 0xC 8.--15. 1. "  PRI_461 ,Interrupt 461 Priority"
hexmask.long.byte 0xC 0.--7. 1. "  PRI_460 ,Interrupt 460 Priority"
line.long 0x10 "IPR116,Interrupt Priority Register"
hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority"
hexmask.long.byte 0x10 16.--23. 1. "  PRI_466 ,Interrupt 466 Priority"
hexmask.long.byte 0x10 8.--15. 1. "  PRI_465 ,Interrupt 465 Priority"
hexmask.long.byte 0x10 0.--7. 1. "  PRI_464 ,Interrupt 464 Priority"
line.long 0x14 "IPR117,Interrupt Priority Register"
hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority"
hexmask.long.byte 0x14 16.--23. 1. "  PRI_470 ,Interrupt 470 Priority"
hexmask.long.byte 0x14 8.--15. 1. "  PRI_469 ,Interrupt 469 Priority"
hexmask.long.byte 0x14 0.--7. 1. "  PRI_468 ,Interrupt 468 Priority"
line.long 0x18 "IPR118,Interrupt Priority Register"
hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority"
hexmask.long.byte 0x18 16.--23. 1. "  PRI_474 ,Interrupt 474 Priority"
hexmask.long.byte 0x18 8.--15. 1. "  PRI_473 ,Interrupt 473 Priority"
hexmask.long.byte 0x18 0.--7. 1. "  PRI_472 ,Interrupt 472 Priority"
line.long 0x1C "IPR119,Interrupt Priority Register"
hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority"
hexmask.long.byte 0x1C 16.--23. 1. "  PRI_478 ,Interrupt 478 Priority"
hexmask.long.byte 0x1C 8.--15. 1. "  PRI_477 ,Interrupt 477 Priority"
hexmask.long.byte 0x1C 0.--7. 1. "  PRI_476 ,Interrupt 476 Priority"
else
hgroup.long 0x5C0++0x1F
hide.long 0x0 "IPR112,Interrupt Priority Register"
hide.long 0x4 "IPR113,Interrupt Priority Register"
hide.long 0x8 "IPR114,Interrupt Priority Register"
hide.long 0xC "IPR115,Interrupt Priority Register"
hide.long 0x10 "IPR116,Interrupt Priority Register"
hide.long 0x14 "IPR117,Interrupt Priority Register"
hide.long 0x18 "IPR118,Interrupt Priority Register"
hide.long 0x1C "IPR119,Interrupt Priority Register"
endif
tree.end
width 0x0b
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
sif (CORENAME()=="CORTEXM33F")
tree "Floating-point Unit (FPU)"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 8.
group.long 0xF34++0x0B
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
bitfld.long 0x00 31. " ASPEN        ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
bitfld.long 0x00 30. "                      LSPEN     ,Enables lazy context save of FP state" "Disabled,Enabled"
bitfld.long 0x00 29. "       LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored"
newline
bitfld.long 0x00 28. " CLRONRET     ,Clear floating point caller saved registers on exception return" "Disabled,Enabled"
bitfld.long 0x00 27. "                      CLRONRETS ,Clear on return Secure only" "Both states,Secure only"
bitfld.long 0x00 26. "    TS     ,Treat as Secure" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " UFRDY        ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able"
bitfld.long 0x00 9. "                      SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High"
bitfld.long 0x00 8. "           MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
newline
bitfld.long 0x00 7. " SFRDY        ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able"
bitfld.long 0x00 6. "                      BFRDY     ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
bitfld.long 0x00 5. "       MMRDY  ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
newline
bitfld.long 0x00 4. " HFRDY        ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
bitfld.long 0x00 3. "                      THREAD    ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
bitfld.long 0x00 2. "        S      ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure"
newline
bitfld.long 0x00 1. " USER         ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
bitfld.long 0x00 0. "                  LSPACT    ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
hexmask.long 0x04 3.--31. 0x8 " ADDRESS      ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
bitfld.long 0x08 26. " AHP          ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
bitfld.long 0x08 25. "                 DN        ,Default value for FPSCR.DN" "NaN operands,Any operation"
bitfld.long 0x08 24. "  FZ     ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
newline
bitfld.long 0x08 22.--23. " RMODE        ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
rgroup.long 0xF40++0x0B
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
bitfld.long 0x00 28.--31. " FPRNDMOD     ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
bitfld.long 0x00 20.--23. "                 SQRROOT   ,Indicates the hardware support for FP square root operations" ",Supported,?..."
bitfld.long 0x00 16.--19. "      DIV    ,Indicates the hardware support for FP divide operations" ",Supported,?..."
newline
bitfld.long 0x00 8.--11. " DBLPREC      ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
bitfld.long 0x00 4.--7. "                 SNGLPREC  ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
bitfld.long 0x00 0.--3. "      A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
bitfld.long 0x04 24.--27. "                     FP_HPFP   ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
newline
bitfld.long 0x04 4.--7. " D_NAN        ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
bitfld.long 0x04 0.--3. "               FTZ_MODE  ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..."
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
bitfld.long 0x08 4.--7. " VFP_MISC     ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
width 0xB
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
endif
tree "Debug"
tree "Core Debug"
sif COMPonent.AVAILABLE("COREDEBUG")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
width 13.
group.long 0xD30++0x03
line.long 0x00 "DFSR,Debug Fault Status Register"
eventfld.long 0x00 4. " EXTERNAL   ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
eventfld.long 0x00 3. "  VCATCH     ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
eventfld.long 0x00 2. "         DWTTRAP      ,Indicates a debug event generated by the DWT" "Not generated,Generated"
newline
eventfld.long 0x00 1. " BKPT       ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
eventfld.long 0x00 0. "  HALTED     ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
newline
hgroup.long 0xDF0++0x03
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
in
newline
wgroup.long 0xDF4++0x03
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
bitfld.long 0x00 16. " REGWNR     ,Specifies the access type for the transfer" "Read,Write"
hexmask.long.byte 0x00 0.--6. 1. "          REGSEL     ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
group.long 0xDF8++0x03
line.long 0x00 "DCRDR,Debug Core Register Data Register"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA     ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. "       SDME       ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. "            MON_REQ      ,DebugMonitor semaphore bit" "0,1"
bitfld.long 0x00 18. "              MON_STEP   ,Setting this bit to 1 makes the step request pending" "No step,Step"
newline
bitfld.long 0x00 17. " MON_PEND   ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. "    MON_EN     ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. "              VC_SFERR     ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. "       VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR  ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. "       VC_BUSERR  ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. "              VC_STATERR   ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. "       VC_CHKERR  ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. "       VC_MMERR   ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. "              VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
else
group.long 0xDFC++0x03
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
bitfld.long 0x00 24. " TRCENA     ,Global enable for all DWT and ITM features" "Disabled,Enabled"
bitfld.long 0x00 20. "       SDME       ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure"
bitfld.long 0x00 19. "            MON_REQ      ,DebugMonitor semaphore bit" "0,1"
newline
bitfld.long 0x00 17. " MON_PEND   ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
bitfld.long 0x00 16. "    MON_EN     ,Enable the DebugMonitor exception" "Disabled,Enabled"
bitfld.long 0x00 11. "              VC_SFERR     ,SecureFault vector catch enable" "Disabled,Enabled"
bitfld.long 0x00 10. "       VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " VC_INTERR  ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
bitfld.long 0x00 8. "       VC_BUSERR  ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
bitfld.long 0x00 7. "              VC_STATERR   ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
bitfld.long 0x00 6. "       VC_CHKERR  ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
bitfld.long 0x00 4. "       VC_MMERR   ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
bitfld.long 0x00 0. "              VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
endif
newline
group.long 0xE04++0x07
line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register"
bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN"
bitfld.long 0x00 1. "  INTSPIDEN    ,Internal secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 0. "       SPIDENSEL  ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN"
line.long 0x04 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x04 16. " CDS        ,This field indicates the current security state of the processor" "Non-secure,Secure"
bitfld.long 0x04 1. "     SBRSEL     ,Secure banked register select" "Non-secure,Secure"
bitfld.long 0x04 0. "            SBRSELEN     ,Secure banked register select enable" "Disabled,Enabled"
rgroup.long 0xFB8++0x03
line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. " SNI        ,Secure non-invasive debug implemented" ",Implemented"
bitfld.long 0x00 6. "    SNE        ,Secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 5. "                     SI           ,Secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 4. "    SE         ,Secure invasive debug enabled" "0,1"
newline
bitfld.long 0x00 3. " NSNI       ,Non-secure non-invasive debug features implemented" ",Implemented"
bitfld.long 0x00 2. "    NSNE       ,Non-secure non-invasive debug enabled" "0,1"
bitfld.long 0x00 1. "                     NSI          ,Non-secure invasive debug features implemented" ",Implemented"
bitfld.long 0x00 0. "    NSE        ,Non-secure invasive debug enabled" "0,1"
width 0x0B
else
newline
textline "COREDEBUG component base address not specified"
newline
endif
tree.end
tree "Flash Patch and Breakpoint Unit (FPB)"
sif COMPonent.AVAILABLE("FPB")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
width 12.
group.long 0x00++0x03
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
bitfld.long 0x00 28.--31. " REV    ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..."
rbitfld.long 0x00 4.--7. 12.--14. "      NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..."
rbitfld.long 0x00 8.--11. "         NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                     "
bitfld.long 0x00 1. " KEY    ,Key Field" "Low,High"
bitfld.long 0x00 0. "           ENABLE   ,Flash Patch Unit Enable" "Disabled,Enabled"
textline "                     "
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000)
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
hexmask.long 0x00 5.--28. 0x20 "  REMAP    ,Remap address"
else
rgroup.long 0x04++0x03
line.long 0x00 "FP_REMAP,Flash Patch Remap Register"
bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x8++0x03
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0xC++0x03
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x10++0x03
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x14++0x03
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x18++0x03
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x1C++0x03
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x20++0x03
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
bitfld.long 0x00 31. " FE     ,Specifies if Flash Patch enabled" "Disabled,Enabled"
hexmask.long 0x00 2.--28. 0x04 "       FPADDR   ,Specifies bits[28:2] of the Flash Patch address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
else
group.long 0x24++0x03
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
textfld "                      "
hexmask.long 0x00 1.--31. 0x02 " BPADDR   ,Breakpoint address"
bitfld.long 0x00 0. "  BE      ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode"
endif
tree "CoreSight Identification Registers"
width 12.
rgroup.long 0xFCC++0x03
line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register"
hexmask.long.byte 0x00 4.--7. 1. " SUB           ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. "           MAJOR          ,Major type"
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT     ,Component architect"
bitfld.long 0x00 20. "         PRESENT        ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. "  REVISION      ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                     "
bitfld.long 0x00 12.--15. " ARCHVER       ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "           ARCHPART       ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register"
bitfld.long 0x00 20. " PRESENT       ,Register present" "Not present,Present"
endif
rgroup.long 0xFE0++0x0F
line.long 0x00 "FP_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "FP_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. "           Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "FP_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision      ,Revision"
bitfld.long 0x08 3. "           JEDEC          ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. "        JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0C "FP_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd        ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. "           CMB            ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count         ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. "           JEP106_CC      ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0       ,CoreSight component identification preamble"
line.long 0x04 "FP_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC            ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. "           PRMBL_1        ,CoreSight component class"
line.long 0x08 "FP_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2       ,CoreSight component identification preamble"
line.long 0x0c "FP_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3       ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "FPB component base address not specified"
newline
endif
tree.end
tree "Data Watchpoint and Trace Unit (DWT)"
sif COMPonent.AVAILABLE("DWT")
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
width 16.
group.long 0x00++0x03
line.long 0x00 "DWT_CTRL,Control Register"
rbitfld.long 0x00 28.--31. " NUMCOMP    ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..."
rbitfld.long 0x00 27. "                     NOTRCPKT   ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
rbitfld.long 0x00 25. "              NOCYCCNT    ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
textline "                         "
rbitfld.long 0x00 24. " NOPRFCNT   ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
bitfld.long 0x00 23. "         CYCDISS    ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes"
bitfld.long 0x00 22. "                        CYCEVTENA   ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 20. "              LSUEVTENA  ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 19. "                   SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 18. " EXCEVTENA  ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 17. "              CPIEVTENA  ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
bitfld.long 0x00 16. "                   EXCTRCENA   ,Enables generation of exception trace" "Disabled,Enabled"
textline "                         "
bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
bitfld.long 0x00 10.--11. "              SYNCTAP    ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
bitfld.long 0x00 9. "                 CYCTAP      ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
textline "                         "
bitfld.long 0x00 5.--8. " POSTINIT   ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 1.--4. "                    POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "                         CYCCNTENA   ,Enables CYCCNT" "Disabled,Enabled"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000)
group.long 0x04++0x03
line.long 0x00 "DWT_CYCCNT,Cycle Count register"
endif
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000)
group.long 0x08++0x17
line.long 0x00 "DWT_CPICNT,CPI Count register"
hexmask.long.byte 0x00 0.--7. 1. " CPICNT     ,Base instruction overhead counter"
line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register"
hexmask.long.byte 0x04 0.--7. 1. " EXCCNT     ,The exception overhead counter"
line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register"
hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT   ,Sleep Counter"
line.long 0x10 "DWT_LSUCNT,LSU Count Register"
hexmask.long.byte 0x10 0.--7. 1. " LSUCNT     ,Load-store overhead counter"
line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register"
hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT    ,Folded-instruction counter"
endif
rgroup.long 0x1C++0x03
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
textline "                         "
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " CYCVALUE   ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 1.--31. 1. " PCVALUE    ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 1. " DVALUE     ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF)
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
hexmask.long 0x00 0.--31. 0x01 " DADDR      ,Data address"
else
group.long 0x20++0x03
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
endif
group.long (0x20+0x08)++0x03
line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0"
bitfld.long 0x00 27.--31. " ID         ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. "                    MATCHED    ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. "                DATAVSIZE   ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline "                         "
bitfld.long 0x00 4.--5. " ACTION     ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. "  MATCH      ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " CYCVALUE   ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 1.--31. 1. " PCVALUE    ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 1. " DVALUE     ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF)
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
hexmask.long 0x00 0.--31. 0x01 " DADDR      ,Data address"
else
group.long 0x30++0x03
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
endif
group.long (0x30+0x08)++0x03
line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1"
bitfld.long 0x00 27.--31. " ID         ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. "                    MATCHED    ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. "                DATAVSIZE   ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline "                         "
bitfld.long 0x00 4.--5. " ACTION     ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. "  MATCH      ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " CYCVALUE   ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 1.--31. 1. " PCVALUE    ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 1. " DVALUE     ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF)
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
hexmask.long 0x00 0.--31. 0x01 " DADDR      ,Data address"
else
group.long 0x40++0x03
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
endif
group.long (0x40+0x08)++0x03
line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2"
bitfld.long 0x00 27.--31. " ID         ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. "                    MATCHED    ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. "                DATAVSIZE   ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline "                         "
bitfld.long 0x00 4.--5. " ACTION     ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. "  MATCH      ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " CYCVALUE   ,Cycle value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 1.--31. 1. " PCVALUE    ,PC value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 1. " DVALUE     ,Data1 value"
elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF)
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
hexmask.long 0x00 0.--31. 0x01 " DADDR      ,Data address"
else
group.long 0x50++0x03
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
endif
group.long (0x50+0x08)++0x03
line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3"
bitfld.long 0x00 27.--31. " ID         ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 24. "                    MATCHED    ,Comparator match" "Not matched,Matched"
bitfld.long 0x00 10.--11. "                DATAVSIZE   ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
textline "                         "
bitfld.long 0x00 4.--5. " ACTION     ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address"
bitfld.long 0x00 0.--3. "  MATCH      ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved"
tree "CoreSight Identification Registers"
width 13.
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000)
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
hexmask.long.word 0x00 21.--31. 1. " ARCHITECT     ,Component architect"
bitfld.long 0x00 20. "         PRESENT        ,Register present" "Not present,Present"
bitfld.long 0x00 16.--19. "  REVISION      ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                      "
bitfld.long 0x00 12.--15. " ARCHVER       ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "           ARCHPART       ,Architecture part"
else
rgroup.long 0xFBC++0x03
line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register"
bitfld.long 0x00 20. "                            PRESENT        ,Register present" "Not present,Present"
endif
rgroup.long 0xFCC++0x03
line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register"
hexmask.long.byte 0x00 4.--7. 1. " SUB           ,Sub-type"
hexmask.long.byte 0x00 0.--3. 1. "           MAJOR          ,Major type"
rgroup.long 0xFE0++0x0F
line.long 0x00 "DWT_PIDR0,Peripheral ID0"
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
line.long 0x04 "DWT_PIDR1,Peripheral ID1"
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
hexmask.long.byte 0x04 0.--3. 1. "           Part_Num[11:8] ,Part Number bits[11:8]"
line.long 0x08 "DWT_PIDR2,Peripheral ID2"
hexmask.long.byte 0x08 4.--7. 1. " Revision      ,Revision"
bitfld.long 0x08 3. "           JEDEC          ,JEDEC assigned ID fields" "0,JEDEC"
hexmask.long.byte 0x08 0.--2. 1. "        JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
line.long 0x0c "DWT_PIDR3,Peripheral ID3"
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd        ,Minor revision field"
hexmask.long.byte 0x0C 0.--3. 1. "           CMB            ,Customer-modified block"
rgroup.long 0xFD0++0x03
line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4"
hexmask.long.byte 0x00 4.--7. 1. " Count         ,4KB count"
hexmask.long.byte 0x00 0.--3. 1. "           JEP106_CC      ,JEP106 continuation code"
rgroup.long 0xFF0++0x0F
line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)"
hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0       ,CoreSight component identification preamble"
line.long 0x04 "DWT_CIDR1,Component ID1"
hexmask.long.byte 0x04 4.--7. 1. " CC            ,Component Class"
hexmask.long.byte 0x04 0.--3. 1. "           PRMBL_1        ,CoreSight component class"
line.long 0x08 "DWT_CIDR2,Component ID2"
hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2       ,CoreSight component identification preamble"
line.long 0x0c "DWT_CIDR3,Component ID3"
hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3       ,CoreSight component identification preamble"
tree.end
width 0x0b
else
newline
textline "DWT component base address not specified"
newline
endif
tree.end
tree.end
AUTOINDENT.POP
tree.end
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree "ADC (Analog-to-Digital Converter)"
base ad:0x0
tree "ADC4"
base ad:0x46021000
group.long 0x0++0x17
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
bitfld.long 0x0 12. "LDORDY,LDO ready" "0: ADC voltage regulator disabled,1: ADC voltage regulator enabled and stabilized"
bitfld.long 0x0 11. "EOCAL,End of calibration flag" "0: Calibration is not complete,1: Calibration is complete"
newline
bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
newline
bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
newline
bitfld.long 0x0 3. "EOS,End of sequence flag" "0: Conversion sequence not complete (or the flag..,1: Conversion sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Channel conversion not complete (or the flag..,1: Channel conversion complete"
newline
bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: Not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,LDO ready interrupt enable" "0: LDO ready interrupt disabled,1: LDO ready interrupt enabled. An interrupt is.."
bitfld.long 0x4 11. "EOCALIE,End of calibration interrupt enable" "0: End of calibration interrupt disabled,1: End of calibration interrupt enabled"
newline
bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
newline
bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled. An interrupt is.."
newline
bitfld.long 0x4 3. "EOSIE,End of conversion sequence interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled. An interrupt is generated.."
bitfld.long 0x4 2. "EOCIE,End of conversion interrupt enable" "0: EOC interrupt disabled,1: EOC interrupt enabled. An interrupt is generated.."
newline
bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled. An interrupt is.."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled.,1: ADRDY interrupt enabled. An interrupt is.."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Calibration complete,1: Write 1 to calibrate the ADC. Read at 1 means.."
bitfld.long 0x8 28. "ADVREGEN,ADC voltage regulator enable" "0: ADC voltage regulator disabled,1: ADC voltage regulator enabled"
newline
bitfld.long 0x8 4. "ADSTP,ADC stop conversion command" "0: No ADC stop conversion command ongoing,1: Write 1 to stop the ADC. Read 1 means that an.."
bitfld.long 0x8 2. "ADSTART,ADC start conversion command" "0: No ADC conversion is ongoing.,1: Write 1 to start the ADC. Read 1 means that the.."
newline
bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: No ADDIS command ongoing,1: Write 1 to disable the ADC. Read 1 means that an.."
bitfld.long 0x8 0. "ADEN,ADC enable command" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register 1"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog channel selection"
bitfld.long 0xC 23. "AWD1EN,Analog watchdog enable" "0: Analog watchdog 1 disabled,1: Analog watchdog 1 enabled"
newline
bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
bitfld.long 0xC 21. "CHSELRMOD,Mode selection of the ADC_CHSELR register" "0: Each bit of the ADC_CHSELR register enables an..,1: ADC_CHSELR register is able to sequence up to 8.."
newline
bitfld.long 0xC 16. "DISCEN,Discontinuous mode" "0: Discontinuous mode disabled,1: Discontinuous mode enabled"
bitfld.long 0xC 14. "WAIT,Wait conversion mode" "0: Wait conversion mode off,1: Wait conversion mode on"
newline
bitfld.long 0xC 13. "CONT,Single / continuous conversion mode" "0: Single conversion mode,1: Continuous conversion mode"
bitfld.long 0xC 12. "OVRMOD,Overrun management mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
newline
bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
bitfld.long 0xC 6.--8. "EXTSEL,External trigger selection" "0: adc_trg0,1: adc_trg1,2: ADC pins and internal signals for details):,3: adc_trg3,4: adc_trg4,5: adc_trg5,6: adc_trg6,7: adc_trg7"
newline
bitfld.long 0xC 5. "ALIGN,Data alignment" "0: Right alignment,1: Left alignment"
bitfld.long 0xC 4. "SCANDIR,Scan sequence direction" "0: Upward scan (from CHSEL0 to CHSEL11),1: Backward scan (from CHSEL11 to CHSEL0)"
newline
bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12 bits,1: 10 bits,2: 8 bits,3: 6 bits"
bitfld.long 0xC 1. "DMACFG,Direct memory access configuration" "0: DMA one shot mode selected,1: DMA circular mode selected"
newline
bitfld.long 0xC 0. "DMAEN,Direct memory access enable" "0: DMA disabled,1: DMA enabled"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
bitfld.long 0x10 29. "LFTRIG,Low frequency trigger mode enable" "0: Reserved,1: Low frequency trigger mode enabled."
bitfld.long 0x10 9. "TOVS,Triggered Oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
newline
hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
bitfld.long 0x10 2.--4. "OVSR,Oversampling ratio" "0: 2x,1: 4x,2: 8x,3: 16x,4: 32x,5: 64x,6: 128x,7: 256x"
newline
bitfld.long 0x10 0. "OVSE,Oversampler Enable" "0: Oversampler disabled,1: Oversampler enabled"
line.long 0x14 "ADC_SMPR,ADC sampling time register"
bitfld.long 0x14 21. "SMPSEL13,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 20. "SMPSEL12,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
newline
bitfld.long 0x14 19. "SMPSEL11,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 18. "SMPSEL10,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
newline
bitfld.long 0x14 17. "SMPSEL9,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 16. "SMPSEL8,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
newline
bitfld.long 0x14 15. "SMPSEL7,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 14. "SMPSEL6,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 13. "SMPSEL5,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 12. "SMPSEL4,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 11. "SMPSEL3,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 10. "SMPSEL2,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 9. "SMPSEL1,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 8. "SMPSEL0,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 4.--6. "SMP2,Sampling time selection 2" "0: 1.5 ADC clock cycles,1: 3.5 ADC clock cycles,2: 7.5 ADC clock cycles,3: 12.5 ADC clock cycles,4: 19.5 ADC clock cycles,5: 39.5 ADC clock cycles,6: 79.5 ADC clock cycles,7: 814.5 ADC clock cycles"
bitfld.long 0x14 0.--2. "SMP1,Sampling time selection 1" "0: 1.5 ADC clock cycles,1: 3.5 ADC clock cycles,2: 7.5 ADC clock cycles,3: 12.5 ADC clock cycles,4: 19.5 ADC clock cycles,5: 39.5 ADC clock cycles,6: 79.5 ADC clock cycles,7: 814.5 ADC clock cycles"
group.long 0x20++0xB
line.long 0x0 "ADC_AWD1TR,ADC watchdog threshold register"
hexmask.long.word 0x0 16.--27. 1. "HT1,Analog watchdog 1 higher threshold"
hexmask.long.word 0x0 0.--11. 1. "LT1,Analog watchdog 1 lower threshold"
line.long 0x4 "ADC_AWD2TR,ADC watchdog threshold register"
hexmask.long.word 0x4 16.--27. 1. "HT2,Analog watchdog 2 higher threshold"
hexmask.long.word 0x4 0.--11. 1. "LT2,Analog watchdog 2 lower threshold"
line.long 0x8 "ADC_CHSELRMOD0,ADC channel selection register [alternate]"
bitfld.long 0x8 13. "CHSEL13,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 12. "CHSEL12,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 11. "CHSEL11,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 10. "CHSEL10,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 9. "CHSEL9,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 8. "CHSEL8,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 7. "CHSEL7,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 6. "CHSEL6,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 5. "CHSEL5,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 4. "CHSEL4,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 3. "CHSEL3,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 2. "CHSEL2,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 1. "CHSEL1,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 0. "CHSEL0,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
group.long 0x28++0x7
line.long 0x0 "ADC_CHSELRMOD1,ADC channel selection register [alternate]"
hexmask.long.byte 0x0 28.--31. 1. "SQ8,8th conversion of the sequence"
hexmask.long.byte 0x0 24.--27. 1. "SQ7,7th conversion of the sequence"
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hexmask.long.byte 0x0 20.--23. 1. "SQ6,6th conversion of the sequence"
hexmask.long.byte 0x0 16.--19. 1. "SQ5,5th conversion of the sequence"
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hexmask.long.byte 0x0 12.--15. 1. "SQ4,4th conversion of the sequence"
hexmask.long.byte 0x0 8.--11. 1. "SQ3,3rd conversion of the sequence"
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hexmask.long.byte 0x0 4.--7. 1. "SQ2,2nd conversion of the sequence"
hexmask.long.byte 0x0 0.--3. 1. "SQ1,1st conversion of the sequence"
line.long 0x4 "ADC_AWD3TR,ADC watchdog threshold register"
hexmask.long.word 0x4 16.--27. 1. "HT3,Analog watchdog 3 higher threshold"
hexmask.long.word 0x4 0.--11. 1. "LT3,Analog watchdog 3lower threshold"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC data register"
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted data"
group.long 0x44++0x3
line.long 0x0 "ADC_PWR,ADC data register"
bitfld.long 0x0 1. "DPD,Deep-power-down mode bit" "0: Deep-power-down mode disabled,1: Deep-power-down mode enabled"
bitfld.long 0x0 0. "AUTOFF,Auto-off mode bit" "0: Auto-off mode disabled,1: Auto-off mode enabled"
group.long 0xA0++0x7
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration register"
bitfld.long 0x0 13. "AWD2CH13,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 12. "AWD2CH12,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 11. "AWD2CH11,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 10. "AWD2CH10,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 9. "AWD2CH9,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 8. "AWD2CH8,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 7. "AWD2CH7,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 6. "AWD2CH6,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 5. "AWD2CH5,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 4. "AWD2CH4,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 3. "AWD2CH3,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 2. "AWD2CH2,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
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bitfld.long 0x0 1. "AWD2CH1,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 0. "AWD2CH0,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration register"
bitfld.long 0x4 13. "AWD3CH13,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 12. "AWD3CH12,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 11. "AWD3CH11,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 10. "AWD3CH10,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 9. "AWD3CH9,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 8. "AWD3CH8,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 7. "AWD3CH7,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 6. "AWD3CH6,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 5. "AWD3CH5,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 4. "AWD3CH4,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 3. "AWD3CH3,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 2. "AWD3CH2,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
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bitfld.long 0x4 1. "AWD3CH1,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 0. "AWD3CH0,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
group.long 0xC4++0x3
line.long 0x0 "ADC_CALFACT,ADC Calibration factor"
hexmask.long.byte 0x0 0.--6. 1. "CALFACT,Calibration factor"
group.long 0x308++0x3
line.long 0x0 "ADC_CCR,ADC common configuration register"
bitfld.long 0x0 23. "VSENSESEL,Temperature sensor selection" "0: Temperature sensor disabled,1: Temperature sensor enabled"
bitfld.long 0x0 22. "VREFEN,V<sub>REFINT</sub> enable" "0: V<sub>REFINT</sub> disabled,1: V<sub>REFINT</sub> enabled"
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hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler"
tree.end
tree "SEC_ADC4"
base ad:0x56021000
group.long 0x0++0x17
line.long 0x0 "ADC_ISR,ADC interrupt and status register"
bitfld.long 0x0 12. "LDORDY,LDO ready" "0: ADC voltage regulator disabled,1: ADC voltage regulator enabled and stabilized"
bitfld.long 0x0 11. "EOCAL,End of calibration flag" "0: Calibration is not complete,1: Calibration is complete"
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bitfld.long 0x0 9. "AWD3,Analog watchdog 3 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
bitfld.long 0x0 8. "AWD2,Analog watchdog 2 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
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bitfld.long 0x0 7. "AWD1,Analog watchdog 1 flag" "0: No analog watchdog event occurred,1: Analog watchdog event occurred"
bitfld.long 0x0 4. "OVR,ADC overrun" "0: No overrun occurred (or the flag event was..,1: Overrun has occurred"
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bitfld.long 0x0 3. "EOS,End of sequence flag" "0: Conversion sequence not complete (or the flag..,1: Conversion sequence complete"
bitfld.long 0x0 2. "EOC,End of conversion flag" "0: Channel conversion not complete (or the flag..,1: Channel conversion complete"
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bitfld.long 0x0 1. "EOSMP,End of sampling flag" "0: Not at the end of the sampling phase (or the..,1: End of sampling phase reached"
bitfld.long 0x0 0. "ADRDY,ADC ready" "0: ADC not yet ready to start conversion (or the..,1: ADC is ready to start conversion"
line.long 0x4 "ADC_IER,ADC interrupt enable register"
bitfld.long 0x4 12. "LDORDYIE,LDO ready interrupt enable" "0: LDO ready interrupt disabled,1: LDO ready interrupt enabled. An interrupt is.."
bitfld.long 0x4 11. "EOCALIE,End of calibration interrupt enable" "0: End of calibration interrupt disabled,1: End of calibration interrupt enabled"
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bitfld.long 0x4 9. "AWD3IE,Analog watchdog 3 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
bitfld.long 0x4 8. "AWD2IE,Analog watchdog 2 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
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bitfld.long 0x4 7. "AWD1IE,Analog watchdog 1 interrupt enable" "0: Analog watchdog interrupt disabled,1: Analog watchdog interrupt enabled"
bitfld.long 0x4 4. "OVRIE,Overrun interrupt enable" "0: Overrun interrupt disabled,1: Overrun interrupt enabled. An interrupt is.."
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bitfld.long 0x4 3. "EOSIE,End of conversion sequence interrupt enable" "0: EOS interrupt disabled,1: EOS interrupt enabled. An interrupt is generated.."
bitfld.long 0x4 2. "EOCIE,End of conversion interrupt enable" "0: EOC interrupt disabled,1: EOC interrupt enabled. An interrupt is generated.."
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bitfld.long 0x4 1. "EOSMPIE,End of sampling flag interrupt enable" "0: EOSMP interrupt disabled.,1: EOSMP interrupt enabled. An interrupt is.."
bitfld.long 0x4 0. "ADRDYIE,ADC ready interrupt enable" "0: ADRDY interrupt disabled.,1: ADRDY interrupt enabled. An interrupt is.."
line.long 0x8 "ADC_CR,ADC control register"
bitfld.long 0x8 31. "ADCAL,ADC calibration" "0: Calibration complete,1: Write 1 to calibrate the ADC. Read at 1 means.."
bitfld.long 0x8 28. "ADVREGEN,ADC voltage regulator enable" "0: ADC voltage regulator disabled,1: ADC voltage regulator enabled"
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bitfld.long 0x8 4. "ADSTP,ADC stop conversion command" "0: No ADC stop conversion command ongoing,1: Write 1 to stop the ADC. Read 1 means that an.."
bitfld.long 0x8 2. "ADSTART,ADC start conversion command" "0: No ADC conversion is ongoing.,1: Write 1 to start the ADC. Read 1 means that the.."
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bitfld.long 0x8 1. "ADDIS,ADC disable command" "0: No ADDIS command ongoing,1: Write 1 to disable the ADC. Read 1 means that an.."
bitfld.long 0x8 0. "ADEN,ADC enable command" "0: ADC is disabled (OFF state),1: Write 1 to enable the ADC."
line.long 0xC "ADC_CFGR1,ADC configuration register 1"
hexmask.long.byte 0xC 26.--30. 1. "AWD1CH,Analog watchdog channel selection"
bitfld.long 0xC 23. "AWD1EN,Analog watchdog enable" "0: Analog watchdog 1 disabled,1: Analog watchdog 1 enabled"
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bitfld.long 0xC 22. "AWD1SGL,Enable the watchdog on a single channel or on all channels" "0: Analog watchdog 1 enabled on all channels,1: Analog watchdog 1 enabled on a single channel"
bitfld.long 0xC 21. "CHSELRMOD,Mode selection of the ADC_CHSELR register" "0: Each bit of the ADC_CHSELR register enables an..,1: ADC_CHSELR register is able to sequence up to 8.."
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bitfld.long 0xC 16. "DISCEN,Discontinuous mode" "0: Discontinuous mode disabled,1: Discontinuous mode enabled"
bitfld.long 0xC 14. "WAIT,Wait conversion mode" "0: Wait conversion mode off,1: Wait conversion mode on"
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bitfld.long 0xC 13. "CONT,Single / continuous conversion mode" "0: Single conversion mode,1: Continuous conversion mode"
bitfld.long 0xC 12. "OVRMOD,Overrun management mode" "0: ADC_DR register is preserved with the old data..,1: ADC_DR register is overwritten with the last.."
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bitfld.long 0xC 10.--11. "EXTEN,External trigger enable and polarity selection" "0: Hardware trigger detection disabled (conversions..,1: Hardware trigger detection on the rising edge,2: Hardware trigger detection on the falling edge,3: Hardware trigger detection on both the rising.."
bitfld.long 0xC 6.--8. "EXTSEL,External trigger selection" "0: adc_trg0,1: adc_trg1,2: ADC pins and internal signals for details):,3: adc_trg3,4: adc_trg4,5: adc_trg5,6: adc_trg6,7: adc_trg7"
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bitfld.long 0xC 5. "ALIGN,Data alignment" "0: Right alignment,1: Left alignment"
bitfld.long 0xC 4. "SCANDIR,Scan sequence direction" "0: Upward scan (from CHSEL0 to CHSEL11),1: Backward scan (from CHSEL11 to CHSEL0)"
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bitfld.long 0xC 2.--3. "RES,Data resolution" "0: 12 bits,1: 10 bits,2: 8 bits,3: 6 bits"
bitfld.long 0xC 1. "DMACFG,Direct memory access configuration" "0: DMA one shot mode selected,1: DMA circular mode selected"
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bitfld.long 0xC 0. "DMAEN,Direct memory access enable" "0: DMA disabled,1: DMA enabled"
line.long 0x10 "ADC_CFGR2,ADC configuration register 2"
bitfld.long 0x10 29. "LFTRIG,Low frequency trigger mode enable" "0: Reserved,1: Low frequency trigger mode enabled."
bitfld.long 0x10 9. "TOVS,Triggered Oversampling" "0: All oversampled conversions for a channel are..,1: Each oversampled conversion for a channel needs.."
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hexmask.long.byte 0x10 5.--8. 1. "OVSS,Oversampling shift"
bitfld.long 0x10 2.--4. "OVSR,Oversampling ratio" "0: 2x,1: 4x,2: 8x,3: 16x,4: 32x,5: 64x,6: 128x,7: 256x"
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bitfld.long 0x10 0. "OVSE,Oversampler Enable" "0: Oversampler disabled,1: Oversampler enabled"
line.long 0x14 "ADC_SMPR,ADC sampling time register"
bitfld.long 0x14 21. "SMPSEL13,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 20. "SMPSEL12,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 19. "SMPSEL11,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 18. "SMPSEL10,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 17. "SMPSEL9,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 16. "SMPSEL8,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 15. "SMPSEL7,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 14. "SMPSEL6,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 13. "SMPSEL5,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 12. "SMPSEL4,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 11. "SMPSEL3,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 10. "SMPSEL2,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 9. "SMPSEL1,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
bitfld.long 0x14 8. "SMPSEL0,Channel-x sampling time selection" "0: Sampling time use the setting of SMP1[2:0],1: Sampling time use the setting of SMP2[2:0]"
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bitfld.long 0x14 4.--6. "SMP2,Sampling time selection 2" "0: 1.5 ADC clock cycles,1: 3.5 ADC clock cycles,2: 7.5 ADC clock cycles,3: 12.5 ADC clock cycles,4: 19.5 ADC clock cycles,5: 39.5 ADC clock cycles,6: 79.5 ADC clock cycles,7: 814.5 ADC clock cycles"
bitfld.long 0x14 0.--2. "SMP1,Sampling time selection 1" "0: 1.5 ADC clock cycles,1: 3.5 ADC clock cycles,2: 7.5 ADC clock cycles,3: 12.5 ADC clock cycles,4: 19.5 ADC clock cycles,5: 39.5 ADC clock cycles,6: 79.5 ADC clock cycles,7: 814.5 ADC clock cycles"
group.long 0x20++0xB
line.long 0x0 "ADC_AWD1TR,ADC watchdog threshold register"
hexmask.long.word 0x0 16.--27. 1. "HT1,Analog watchdog 1 higher threshold"
hexmask.long.word 0x0 0.--11. 1. "LT1,Analog watchdog 1 lower threshold"
line.long 0x4 "ADC_AWD2TR,ADC watchdog threshold register"
hexmask.long.word 0x4 16.--27. 1. "HT2,Analog watchdog 2 higher threshold"
hexmask.long.word 0x4 0.--11. 1. "LT2,Analog watchdog 2 lower threshold"
line.long 0x8 "ADC_CHSELRMOD0,ADC channel selection register [alternate]"
bitfld.long 0x8 13. "CHSEL13,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 12. "CHSEL12,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 11. "CHSEL11,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 10. "CHSEL10,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 9. "CHSEL9,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 8. "CHSEL8,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 7. "CHSEL7,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 6. "CHSEL6,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 5. "CHSEL5,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 4. "CHSEL4,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 3. "CHSEL3,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 2. "CHSEL2,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
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bitfld.long 0x8 1. "CHSEL1,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
bitfld.long 0x8 0. "CHSEL0,Channel x selection" "0: Input Channel-x is not selected for conversion,1: Input Channel-x is selected for conversion"
group.long 0x28++0x7
line.long 0x0 "ADC_CHSELRMOD1,ADC channel selection register [alternate]"
hexmask.long.byte 0x0 28.--31. 1. "SQ8,8th conversion of the sequence"
hexmask.long.byte 0x0 24.--27. 1. "SQ7,7th conversion of the sequence"
newline
hexmask.long.byte 0x0 20.--23. 1. "SQ6,6th conversion of the sequence"
hexmask.long.byte 0x0 16.--19. 1. "SQ5,5th conversion of the sequence"
newline
hexmask.long.byte 0x0 12.--15. 1. "SQ4,4th conversion of the sequence"
hexmask.long.byte 0x0 8.--11. 1. "SQ3,3rd conversion of the sequence"
newline
hexmask.long.byte 0x0 4.--7. 1. "SQ2,2nd conversion of the sequence"
hexmask.long.byte 0x0 0.--3. 1. "SQ1,1st conversion of the sequence"
line.long 0x4 "ADC_AWD3TR,ADC watchdog threshold register"
hexmask.long.word 0x4 16.--27. 1. "HT3,Analog watchdog 3 higher threshold"
hexmask.long.word 0x4 0.--11. 1. "LT3,Analog watchdog 3lower threshold"
rgroup.long 0x40++0x3
line.long 0x0 "ADC_DR,ADC data register"
hexmask.long.word 0x0 0.--15. 1. "DATA,Converted data"
group.long 0x44++0x3
line.long 0x0 "ADC_PWR,ADC data register"
bitfld.long 0x0 1. "DPD,Deep-power-down mode bit" "0: Deep-power-down mode disabled,1: Deep-power-down mode enabled"
bitfld.long 0x0 0. "AUTOFF,Auto-off mode bit" "0: Auto-off mode disabled,1: Auto-off mode enabled"
group.long 0xA0++0x7
line.long 0x0 "ADC_AWD2CR,ADC Analog Watchdog 2 Configuration register"
bitfld.long 0x0 13. "AWD2CH13,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 12. "AWD2CH12,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 11. "AWD2CH11,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 10. "AWD2CH10,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 9. "AWD2CH9,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 8. "AWD2CH8,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 7. "AWD2CH7,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 6. "AWD2CH6,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 5. "AWD2CH5,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 4. "AWD2CH4,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 3. "AWD2CH3,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 2. "AWD2CH2,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
newline
bitfld.long 0x0 1. "AWD2CH1,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
bitfld.long 0x0 0. "AWD2CH0,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD2,1: ADC analog channel-x is monitored by AWD2"
line.long 0x4 "ADC_AWD3CR,ADC Analog Watchdog 3 Configuration register"
bitfld.long 0x4 13. "AWD3CH13,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 12. "AWD3CH12,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 11. "AWD3CH11,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 10. "AWD3CH10,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 9. "AWD3CH9,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 8. "AWD3CH8,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 7. "AWD3CH7,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 6. "AWD3CH6,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 5. "AWD3CH5,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 4. "AWD3CH4,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 3. "AWD3CH3,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 2. "AWD3CH2,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
newline
bitfld.long 0x4 1. "AWD3CH1,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
bitfld.long 0x4 0. "AWD3CH0,Analog watchdog channel selection" "0: ADC analog channel-x is not monitored by AWD3,1: ADC analog channel-x is monitored by AWD3"
group.long 0xC4++0x3
line.long 0x0 "ADC_CALFACT,ADC Calibration factor"
hexmask.long.byte 0x0 0.--6. 1. "CALFACT,Calibration factor"
group.long 0x308++0x3
line.long 0x0 "ADC_CCR,ADC common configuration register"
bitfld.long 0x0 23. "VSENSESEL,Temperature sensor selection" "0: Temperature sensor disabled,1: Temperature sensor enabled"
bitfld.long 0x0 22. "VREFEN,V<sub>REFINT</sub> enable" "0: V<sub>REFINT</sub> disabled,1: V<sub>REFINT</sub> enabled"
newline
hexmask.long.byte 0x0 18.--21. 1. "PRESC,ADC prescaler"
tree.end
tree.end
tree "AES (Advanced Encryption Standard Hardware Accelerator)"
base ad:0x0
tree "AES"
base ad:0x420C0000
group.long 0x0++0x3
line.long 0x0 "AES_CR,AES control register"
bitfld.long 0x0 31. "IPRST,AES peripheral software reset" "0,1"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode. Key registers are freely usable.,?,2: Shared key mode. If shared key mode is properly..,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
newline
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
newline
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: DMA for outgoing data transfer is disabled,1: DMA for outgoing data transfer is enabled"
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: DMA for incoming data transfer is disabled,1: DMA for incoming data transfer is enabled"
newline
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,3: Reserved"
newline
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "AES_SR,AES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to AES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to AES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "AES_DINR,AES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Input data word"
rgroup.long 0xC++0x3
line.long 0x0 "AES_DOUTR,AES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Output data word"
wgroup.long 0x10++0xF
line.long 0x0 "AES_KEYR0,AES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [31:0]"
line.long 0x4 "AES_KEYR1,AES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [63:32]"
line.long 0x8 "AES_KEYR2,AES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [95:64]"
line.long 0xC "AES_KEYR3,AES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "AES_IVR0,AES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input  bits [31:0]"
line.long 0x4 "AES_IVR1,AES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input  bits [63:32]"
line.long 0x8 "AES_IVR2,AES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input  bits [95:64]"
line.long 0xC "AES_IVR3,AES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input  bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "AES_KEYR4,AES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [159:128]"
line.long 0x4 "AES_KEYR5,AES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [191:160]"
line.long 0x8 "AES_KEYR6,AES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [223:192]"
line.long 0xC "AES_KEYR7,AES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "AES_SUSPR0,AES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "AES_SUSPR1,AES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "AES_SUSPR2,AES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "AES_SUSPR3,AES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "AES_SUSPR4,AES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "AES_SUSPR5,AES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "AES_SUSPR6,AES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "AES_SUSPR7,AES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "AES_IER,AES interrupt enable register"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "AES_ISR,AES interrupt status register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key registers"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected (see AES_SR.."
newline
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "AES_ICR,AES interrupt clear register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree "SEC_AES"
base ad:0x520C0000
group.long 0x0++0x3
line.long 0x0 "AES_CR,AES control register"
bitfld.long 0x0 31. "IPRST,AES peripheral software reset" "0,1"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode. Key registers are freely usable.,?,2: Shared key mode. If shared key mode is properly..,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
newline
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
newline
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: DMA for outgoing data transfer is disabled,1: DMA for outgoing data transfer is enabled"
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: DMA for incoming data transfer is disabled,1: DMA for incoming data transfer is enabled"
newline
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,3: Reserved"
newline
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "AES_SR,AES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to AES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to AES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "AES_DINR,AES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Input data word"
rgroup.long 0xC++0x3
line.long 0x0 "AES_DOUTR,AES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Output data word"
wgroup.long 0x10++0xF
line.long 0x0 "AES_KEYR0,AES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [31:0]"
line.long 0x4 "AES_KEYR1,AES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [63:32]"
line.long 0x8 "AES_KEYR2,AES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [95:64]"
line.long 0xC "AES_KEYR3,AES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "AES_IVR0,AES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input  bits [31:0]"
line.long 0x4 "AES_IVR1,AES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input  bits [63:32]"
line.long 0x8 "AES_IVR2,AES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input  bits [95:64]"
line.long 0xC "AES_IVR3,AES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input  bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "AES_KEYR4,AES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [159:128]"
line.long 0x4 "AES_KEYR5,AES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [191:160]"
line.long 0x8 "AES_KEYR6,AES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [223:192]"
line.long 0xC "AES_KEYR7,AES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "AES_SUSPR0,AES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "AES_SUSPR1,AES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "AES_SUSPR2,AES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "AES_SUSPR3,AES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "AES_SUSPR4,AES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "AES_SUSPR5,AES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "AES_SUSPR6,AES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "AES_SUSPR7,AES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "AES_IER,AES interrupt enable register"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "AES_ISR,AES interrupt status register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key registers"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected (see AES_SR.."
newline
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "AES_ICR,AES interrupt clear register"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree.end
tree "CRC (Cyclic Redundancy Check Calculation Unit)"
base ad:0x0
tree "CRC"
base ad:0x40023000
group.long 0x0++0xB
line.long 0x0 "CRC_DR,CRC data register"
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
line.long 0x4 "CRC_IDR,CRC independent data register"
hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits"
line.long 0x8 "CRC_CR,CRC control register"
bitfld.long 0x8 7. "REV_OUT,Reverse output data" "0: Bit order not affected,1: Bit-reversed output format"
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0: Bit order not affected,1: Bit reversal done by byte,2: Bit reversal done by half-word,3: Bit reversal done by word"
bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0: 32 bit polynomial,1: 16 bit polynomial,2: 8 bit polynomial,3: 7 bit polynomial"
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
group.long 0x10++0x7
line.long 0x0 "CRC_INIT,CRC initial value"
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value"
line.long 0x4 "CRC_POL,CRC polynomial"
hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial"
tree.end
tree "SEC_CRC"
base ad:0x50023000
group.long 0x0++0xB
line.long 0x0 "CRC_DR,CRC data register"
hexmask.long 0x0 0.--31. 1. "DR,Data register bits"
line.long 0x4 "CRC_IDR,CRC independent data register"
hexmask.long 0x4 0.--31. 1. "IDR,General-purpose 32-bit data register bits"
line.long 0x8 "CRC_CR,CRC control register"
bitfld.long 0x8 7. "REV_OUT,Reverse output data" "0: Bit order not affected,1: Bit-reversed output format"
bitfld.long 0x8 5.--6. "REV_IN,Reverse input data" "0: Bit order not affected,1: Bit reversal done by byte,2: Bit reversal done by half-word,3: Bit reversal done by word"
bitfld.long 0x8 3.--4. "POLYSIZE,Polynomial size" "0: 32 bit polynomial,1: 16 bit polynomial,2: 8 bit polynomial,3: 7 bit polynomial"
bitfld.long 0x8 0. "RESET,RESET bit" "0,1"
group.long 0x10++0x7
line.long 0x0 "CRC_INIT,CRC initial value"
hexmask.long 0x0 0.--31. 1. "CRC_INIT,Programmable initial CRC value"
line.long 0x4 "CRC_POL,CRC polynomial"
hexmask.long 0x4 0.--31. 1. "POL,Programmable polynomial"
tree.end
tree.end
tree "DBGMCU (Microcontroller Debug Unit)"
base ad:0xE0044000
rgroup.long 0x0++0x3
line.long 0x0 "DBGMCU_IDCODER,DBGMCU identity code register"
hexmask.long.word 0x0 16.--31. 1. "REV_ID,Revision ID"
newline
hexmask.long.word 0x0 0.--11. 1. "DEV_ID,Device ID"
group.long 0x4++0xF
line.long 0x0 "DBGMCU_SCR,DBGMCU status and configuration register"
rbitfld.long 0x0 25. "CDS,CPU DeepSleep" "0: CPU not in DeepSleep,1: CPU in DeepSleep"
newline
rbitfld.long 0x0 24. "CS,CPU Sleep" "0: CPU not in Sleep,1: CPU in Sleep"
newline
rbitfld.long 0x0 20. "SBF,Device Standby flag" "0: Device not in Standby mode,1: Device in Standby mode"
newline
rbitfld.long 0x0 19. "STOPF,Device Stop flag" "0: device not in Stop mode,1: device in Stop mode"
newline
rbitfld.long 0x0 16.--18. "LPMS,Device low power mode selected" "0: Stop 0 mode,1: Stop 1 mode,?,?,?,?,?,?"
newline
bitfld.long 0x0 2. "DBG_STANDBY,Allows debug in Standby mode" "0: Normal Standby mode operation all clocks are..,1: Core power maintained and CPU debug clock.."
newline
bitfld.long 0x0 1. "DBG_STOP,Allows debug in Stop mode" "0: Normal Stop mode operation all clocks are..,1: CPU debug clock enabled in Stop mode all other.."
line.long 0x4 "DBGMCU_APB1LFZR,DBGMCU APB1L peripheral freeze register"
bitfld.long 0x4 21. "DBG_I2C1_STOP,I2C1 SMBUS timeout stop in CPU debug" "0: Normal operation. I2C1 SMBUS timeout continues..,1: Stop in debug. I2C1 SMBUS timeout is frozen.."
newline
bitfld.long 0x4 12. "DBG_IWDG_STOP,IWDG stop in CPU debug" "0: Normal operation. IWDG continues to operate..,1: Stop in debug. IWDG is frozen while CPU is in.."
newline
bitfld.long 0x4 11. "DBG_WWDG_STOP,WWDG stop in CPU debug" "0: Normal operation. WWDG continues to operate..,1: Stop in debug. WWDG is frozen while CPU is in.."
newline
bitfld.long 0x4 1. "DBG_TIM3_STOP,TIM3 stop in CPU debug" "0: Normal operation. TIM3 continues to operate..,1: Stop in debug. TIM3 is frozen while CPU is in.."
newline
bitfld.long 0x4 0. "DBG_TIM2_STOP,TIM2 stop in CPU debug" "0: Normal operation. TIM2 continues to operate..,1: Stop in debug. TIM2 is frozen while CPU is in.."
line.long 0x8 "DBGMCU_APB1HFZR,DBGMCU APB1H peripheral freeze register"
bitfld.long 0x8 5. "DBG_LPTIM2_STOP,LPTIM2 stop in CPU debug" "0: Normal operation. LPTIM2 continues to operate..,1: Stop in debug. LPTIM2 is frozen while CPU is in.."
line.long 0xC "DBGMCU_APB2FZR,DBGMCU APB2 peripheral freeze register"
bitfld.long 0xC 18. "DBG_TIM17_STOP,TIM17 stop in CPU debug" "0: Normal operation. TIM17 continues to operate..,1: Stop in debug. TIM17 is frozen while CPU is in.."
newline
bitfld.long 0xC 17. "DBG_TIM16_STOP,TIM16 stop in CPU debug" "0: Normal operation. TIM16 continues to operate..,1: Stop in debug. TIM16 is frozen while CPU is in.."
newline
bitfld.long 0xC 11. "DBG_TIM1_STOP,TIM1 stop in CPU debug" "0: Normal operation. TIM1 continues to operate..,1: Stop in debug. TIM1 is frozen while CPU is in.."
group.long 0x24++0x7
line.long 0x0 "DBGMCU_APB7FZR,DBGMCU APB7 peripheral freeze register"
bitfld.long 0x0 30. "DBG_RTC_STOP,RTC stop in CPU debug" "0: Normal operation. RTC continues to operate while..,1: Stop in debug. RTC is frozen while CPU is in.."
newline
bitfld.long 0x0 17. "DBG_LPTIM1_STOP,LPTIM1 stop in CPU debug" "0: Normal operation. LPTIM1 continues to operate..,1: Stop in debug. LPTIM1 is frozen while CPU is in.."
newline
bitfld.long 0x0 10. "DBG_I2C3_STOP,I2C3 stop in CPU debug" "0: Normal operation. I2C3 continues to operate..,1: Stop in debug. I2C3 is frozen while CPU is in.."
line.long 0x4 "DBGMCU_AHB1FZR,DBGMCU AHB1 peripheral freeze register"
bitfld.long 0x4 7. "DBG_GPDMA1_CH7_STOP,GPDMA 1 channel 7 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 7 continues to..,1: Stop in debug. GPDMA 1 channel 7 is frozen while.."
newline
bitfld.long 0x4 6. "DBG_GPDMA1_CH6_STOP,GPDMA 1 channel 6 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 6 continues to..,1: Stop in debug. GPDMA 1 channel 6 is frozen while.."
newline
bitfld.long 0x4 5. "DBG_GPDMA1_CH5_STOP,GPDMA 1 channel 5 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 5 continues to..,1: Stop in debug. GPDMA 1 channel 5 is frozen while.."
newline
bitfld.long 0x4 4. "DBG_GPDMA1_CH4_STOP,GPDMA 1 channel 4 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 4 continues to..,1: Stop in debug. GPDMA 1 channel 4 is frozen while.."
newline
bitfld.long 0x4 3. "DBG_GPDMA1_CH3_STOP,GPDMA 1 channel 3 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 3 continues to..,1: Stop in debug. GPDMA 1 channel 3 is frozen while.."
newline
bitfld.long 0x4 2. "DBG_GPDMA1_CH2_STOP,GPDMA 1 channel 2 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 2 continues to..,1: Stop in debug. GPDMA 1 channel 2 is frozen while.."
newline
bitfld.long 0x4 1. "DBG_GPDMA1_CH1_STOP,GPDMA 1 channel 1 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 1 continues to..,1: Stop in debug. GPDMA 1 channel 1 is frozen while.."
newline
bitfld.long 0x4 0. "DBG_GPDMA1_CH0_STOP,GPDMA 1 channel 0 stop in CPU debug" "0: Normal operation. GPDMA 1 channel 0 continues to..,1: Stop in debug. GPDMA 1 channel 0 is frozen while.."
rgroup.long 0xFC++0x3
line.long 0x0 "DBGMCU_SR,DBGMCU status register"
hexmask.long.word 0x0 16.--31. 1. "AP_ENABLED,Bit n identifies whether access port APn is open (can be accessed via the debug port) or locked (debug access to the APn is blocked  except for DBGMCU access)"
newline
hexmask.long.word 0x0 0.--15. 1. "AP_PRESENT,Bit n identifies whether access port APn is present in device"
wgroup.long 0x100++0x3
line.long 0x0 "DBGMCU_DBG_AUTH_HOST,DBGMCU debug host authentication register"
hexmask.long 0x0 0.--31. 1. "AUTH_KEY,Device authentication key"
rgroup.long 0x104++0x3
line.long 0x0 "DBGMCU_DBG_AUTH_DEVICE,DBGMCU debug device authentication register"
hexmask.long 0x0 0.--31. 1. "AUTH_ID,Device specific ID"
rgroup.long 0x7DC++0x3
line.long 0x0 "DBGMCU_PNCR,DBGMCU part number codification register"
hexmask.long 0x0 0.--31. 1. "CODIFICATION,Part number codification"
rgroup.long 0xFD0++0x3
line.long 0x0 "DBGMCU_PIDR4,DBGMCU CoreSight peripheral identity register 4"
hexmask.long.byte 0x0 4.--7. 1. "F4KCOUNT,Register file size"
newline
hexmask.long.byte 0x0 0.--3. 1. "JEP106CON,JEP106 continuation code"
rgroup.long 0xFE0++0x1F
line.long 0x0 "DBGMCU_PIDR0,DBGMCU CoreSight peripheral identity register 0"
hexmask.long.byte 0x0 0.--7. 1. "PARTNUM,Part number bits [7:0]"
line.long 0x4 "DBGMCU_PIDR1,DBGMCU CoreSight peripheral identity register 1"
hexmask.long.byte 0x4 4.--7. 1. "JEP106ID,JEP106 identity code bits [3:0]"
newline
hexmask.long.byte 0x4 0.--3. 1. "PARTNUM,Part number bits [11:8]"
line.long 0x8 "DBGMCU_PIDR2,DBGMCU CoreSight peripheral identity register 2"
hexmask.long.byte 0x8 4.--7. 1. "REVISION,Component revision number"
newline
bitfld.long 0x8 3. "JEDEC,JEDEC assigned value" "?,1: Designer identifier specified by JEDEC"
newline
bitfld.long 0x8 0.--2. "JEP106ID,JEP106 identity code bits [6:4]" "?,?,2: STMicroelectronics JEDEC code,?,?,?,?,?"
line.long 0xC "DBGMCU_PIDR3,DBGMCU CoreSight peripheral identity register 3"
hexmask.long.byte 0xC 4.--7. 1. "REVAND,Metal fix version"
newline
hexmask.long.byte 0xC 0.--3. 1. "CMOD,Customer modified"
line.long 0x10 "DBGMCU_CIDR0,DBGMCU CoreSight component identity register 0"
hexmask.long.byte 0x10 0.--7. 1. "PREAMBLE,Component ID bits [7:0]"
line.long 0x14 "DBGMCU_CIDR1,DBGMCU CoreSight peripheral identity register 1"
hexmask.long.byte 0x14 4.--7. 1. "CLASS,Component ID bits [15:12] - component class"
newline
hexmask.long.byte 0x14 0.--3. 1. "PREAMBLE,Component ID bits [11:8]"
line.long 0x18 "DBGMCU_CIDR2,DBGMCU CoreSight component identity register 2"
hexmask.long.byte 0x18 0.--7. 1. "PREAMBLE,Component ID bits [23:16]"
line.long 0x1C "DBGMCU_CIDR3,DBGMCU CoreSight component identity register 3"
hexmask.long.byte 0x1C 0.--7. 1. "PREAMBLE,Component ID bits [31:24]"
tree.end
tree "DCB (Debug Control Block)"
base ad:0xE000EE08
group.long 0x0++0x3
line.long 0x0 "DSCSR,Debug Security Control and Status Register"
bitfld.long 0x0 16. "CDS,Current domain Secure" "0,1"
tree.end
tree "EXTI (External Interrupt/Event Controller)"
base ad:0x0
tree "EXTI"
base ad:0x46022000
group.long 0x0++0x1B
line.long 0x0 "EXTI_RTSR1,EXTI rising trigger selection register"
bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
line.long 0x4 "EXTI_FTSR1,EXTI falling trigger selection register"
bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
line.long 0x8 "EXTI_SWIER1,EXTI software interrupt event register"
bitfld.long 0x8 16. "SWI16,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 15. "SWI15,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 14. "SWI14,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 13. "SWI13,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 12. "SWI12,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 11. "SWI11,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 10. "SWI10,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 9. "SWI9,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 8. "SWI8,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 7. "SWI7,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 6. "SWI6,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 5. "SWI5,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 4. "SWI4,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 3. "SWI3,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 2. "SWI2,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 1. "SWI1,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 0. "SWI0,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
line.long 0xC "EXTI_RPR1,EXTI rising edge pending register"
bitfld.long 0xC 16. "RPIF16,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 15. "RPIF15,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 14. "RPIF14,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 13. "RPIF13,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 12. "RPIF12,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 11. "RPIF11,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 10. "RPIF10,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 9. "RPIF9,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 8. "RPIF8,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 7. "RPIF7,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 6. "RPIF6,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 5. "RPIF5,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 4. "RPIF4,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 3. "RPIF3,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 2. "RPIF2,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 1. "RPIF1,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 0. "RPIF0,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
line.long 0x10 "EXTI_FPR1,EXTI falling edge pending register"
bitfld.long 0x10 16. "FPIF16,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 15. "FPIF15,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 14. "FPIF14,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 13. "FPIF13,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 12. "FPIF12,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 11. "FPIF11,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 10. "FPIF10,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 9. "FPIF9,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 8. "FPIF8,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 7. "FPIF7,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 6. "FPIF6,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 5. "FPIF5,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 4. "FPIF4,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 3. "FPIF3,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 2. "FPIF2,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 1. "FPIF1,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 0. "FPIF0,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
line.long 0x14 "EXTI_SECCFGR1,EXTI security configuration register"
bitfld.long 0x14 16. "SEC16,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 15. "SEC15,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 14. "SEC14,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 13. "SEC13,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 12. "SEC12,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 11. "SEC11,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 10. "SEC10,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 9. "SEC9,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 8. "SEC8,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 7. "SEC7,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 6. "SEC6,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 5. "SEC5,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 4. "SEC4,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 3. "SEC3,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 2. "SEC2,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 1. "SEC1,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 0. "SEC0,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
line.long 0x18 "EXTI_PRIVCFGR1,EXTI privilege configuration register"
bitfld.long 0x18 16. "PRIV16,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 15. "PRIV15,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 14. "PRIV14,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 13. "PRIV13,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 12. "PRIV12,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 11. "PRIV11,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 10. "PRIV10,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 9. "PRIV9,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 8. "PRIV8,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 7. "PRIV7,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 6. "PRIV6,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 5. "PRIV5,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 4. "PRIV4,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 3. "PRIV3,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 2. "PRIV2,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 1. "PRIV1,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 0. "PRIV0,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
group.long 0x60++0x13
line.long 0x0 "EXTI_EXTICR1,EXTI external interrupt selection register"
hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection"
hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection"
newline
hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection"
hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection"
line.long 0x4 "EXTI_EXTICR2,EXTI external interrupt selection register"
hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection"
hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection"
newline
hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection"
hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection"
line.long 0x8 "EXTI_EXTICR3,EXTI external interrupt selection register"
hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection"
hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection"
newline
hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection"
hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection"
line.long 0xC "EXTI_EXTICR4,EXTI external interrupt selection register"
hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection"
hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection"
newline
hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection"
hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTI0 GPIO port selection"
line.long 0x10 "EXTI_LOCKR,EXTI lock register"
bitfld.long 0x10 0. "LOCK,Global security and privilege configuration registers (EXTI_SECCFGR and EXTI_PRIVCFGR) lock" "0: Security and privilege configuration open can be..,1: Security and privilege configuration locked can.."
group.long 0x80++0x7
line.long 0x0 "EXTI_IMR1,EXTI CPU wakeup with interrupt mask register"
bitfld.long 0x0 16. "IM16,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 15. "IM15,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 14. "IM14,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 13. "IM13,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 12. "IM12,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 11. "IM11,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 10. "IM10,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 9. "IM9,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 8. "IM8,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 7. "IM7,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 6. "IM6,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 5. "IM5,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 4. "IM4,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 3. "IM3,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 2. "IM2,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 1. "IM1,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 0. "IM0,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
line.long 0x4 "EXTI_EMR1,EXTI CPU wakeup with event mask register"
bitfld.long 0x4 16. "EM16,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 15. "EM15,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 14. "EM14,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 13. "EM13,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 12. "EM12,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 11. "EM11,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 10. "EM10,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 9. "EM9,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 8. "EM8,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 7. "EM7,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 6. "EM6,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 5. "EM5,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 4. "EM4,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 3. "EM3,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 2. "EM2,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 1. "EM1,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 0. "EM0,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
tree.end
tree "SEC_EXTI"
base ad:0x56022000
group.long 0x0++0x1B
line.long 0x0 "EXTI_RTSR1,EXTI rising trigger selection register"
bitfld.long 0x0 16. "RT16,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 15. "RT15,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 14. "RT14,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 13. "RT13,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 12. "RT12,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 11. "RT11,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 10. "RT10,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 9. "RT9,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 8. "RT8,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 7. "RT7,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 6. "RT6,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 5. "RT5,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 4. "RT4,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 3. "RT3,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 2. "RT2,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
bitfld.long 0x0 1. "RT1,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
newline
bitfld.long 0x0 0. "RT0,Rising trigger event configuration bit of configurable event input x" "0: Rising trigger disabled,1: Rising trigger enabled"
line.long 0x4 "EXTI_FTSR1,EXTI falling trigger selection register"
bitfld.long 0x4 16. "FT16,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 15. "FT15,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 14. "FT14,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 13. "FT13,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 12. "FT12,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 11. "FT11,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 10. "FT10,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 9. "FT9,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 8. "FT8,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 7. "FT7,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 6. "FT6,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 5. "FT5,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 4. "FT4,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 3. "FT3,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 2. "FT2,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
bitfld.long 0x4 1. "FT1,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
newline
bitfld.long 0x4 0. "FT0,Falling trigger event configuration bit of configurable event input x" "0: Falling trigger disabled,1: Falling trigger enabled"
line.long 0x8 "EXTI_SWIER1,EXTI software interrupt event register"
bitfld.long 0x8 16. "SWI16,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 15. "SWI15,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 14. "SWI14,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 13. "SWI13,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 12. "SWI12,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 11. "SWI11,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 10. "SWI10,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 9. "SWI9,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 8. "SWI8,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 7. "SWI7,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 6. "SWI6,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 5. "SWI5,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 4. "SWI4,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 3. "SWI3,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 2. "SWI2,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
bitfld.long 0x8 1. "SWI1,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
newline
bitfld.long 0x8 0. "SWI0,Software interrupt on event x" "0: Writing 0 has no effect.,1: Writing 1 triggers a rising edge event on event.."
line.long 0xC "EXTI_RPR1,EXTI rising edge pending register"
bitfld.long 0xC 16. "RPIF16,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 15. "RPIF15,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 14. "RPIF14,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 13. "RPIF13,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 12. "RPIF12,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 11. "RPIF11,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 10. "RPIF10,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 9. "RPIF9,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 8. "RPIF8,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 7. "RPIF7,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 6. "RPIF6,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 5. "RPIF5,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 4. "RPIF4,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 3. "RPIF3,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 2. "RPIF2,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
bitfld.long 0xC 1. "RPIF1,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
newline
bitfld.long 0xC 0. "RPIF0,configurable event inputs x rising edge pending bit" "0: No rising edge trigger request occurred,1: Rising edge trigger request occurred"
line.long 0x10 "EXTI_FPR1,EXTI falling edge pending register"
bitfld.long 0x10 16. "FPIF16,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 15. "FPIF15,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 14. "FPIF14,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 13. "FPIF13,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 12. "FPIF12,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 11. "FPIF11,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 10. "FPIF10,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 9. "FPIF9,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 8. "FPIF8,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 7. "FPIF7,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 6. "FPIF6,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 5. "FPIF5,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 4. "FPIF4,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 3. "FPIF3,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 2. "FPIF2,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
bitfld.long 0x10 1. "FPIF1,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
newline
bitfld.long 0x10 0. "FPIF0,configurable event inputs x falling edge pending bit" "0: No falling edge trigger request occurred,1: Falling edge trigger request occurred"
line.long 0x14 "EXTI_SECCFGR1,EXTI security configuration register"
bitfld.long 0x14 16. "SEC16,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 15. "SEC15,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 14. "SEC14,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 13. "SEC13,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 12. "SEC12,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 11. "SEC11,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 10. "SEC10,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 9. "SEC9,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 8. "SEC8,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 7. "SEC7,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 6. "SEC6,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 5. "SEC5,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 4. "SEC4,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 3. "SEC3,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 2. "SEC2,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
bitfld.long 0x14 1. "SEC1,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
newline
bitfld.long 0x14 0. "SEC0,Security enable on event input x" "0: Event security disabled (non-secure),1: Event security enabled (secure)"
line.long 0x18 "EXTI_PRIVCFGR1,EXTI privilege configuration register"
bitfld.long 0x18 16. "PRIV16,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 15. "PRIV15,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 14. "PRIV14,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 13. "PRIV13,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 12. "PRIV12,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 11. "PRIV11,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 10. "PRIV10,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 9. "PRIV9,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 8. "PRIV8,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 7. "PRIV7,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 6. "PRIV6,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 5. "PRIV5,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 4. "PRIV4,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 3. "PRIV3,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 2. "PRIV2,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
bitfld.long 0x18 1. "PRIV1,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
newline
bitfld.long 0x18 0. "PRIV0,Security enable on event input x" "0: Event privilege disabled (unprivileged),1: Event privilege enabled (privileged)"
group.long 0x60++0x13
line.long 0x0 "EXTI_EXTICR1,EXTI external interrupt selection register"
hexmask.long.byte 0x0 24.--31. 1. "EXTI3,EXTI3 GPIO port selection"
hexmask.long.byte 0x0 16.--23. 1. "EXTI2,EXTI2 GPIO port selection"
newline
hexmask.long.byte 0x0 8.--15. 1. "EXTI1,EXTI1 GPIO port selection"
hexmask.long.byte 0x0 0.--7. 1. "EXTI0,EXTI0 GPIO port selection"
line.long 0x4 "EXTI_EXTICR2,EXTI external interrupt selection register"
hexmask.long.byte 0x4 24.--31. 1. "EXTI7,EXTI7 GPIO port selection"
hexmask.long.byte 0x4 16.--23. 1. "EXTI6,EXTI6 GPIO port selection"
newline
hexmask.long.byte 0x4 8.--15. 1. "EXTI5,EXTI5 GPIO port selection"
hexmask.long.byte 0x4 0.--7. 1. "EXTI4,EXTI4 GPIO port selection"
line.long 0x8 "EXTI_EXTICR3,EXTI external interrupt selection register"
hexmask.long.byte 0x8 24.--31. 1. "EXTI11,EXTI11 GPIO port selection"
hexmask.long.byte 0x8 16.--23. 1. "EXTI10,EXTI10 GPIO port selection"
newline
hexmask.long.byte 0x8 8.--15. 1. "EXTI9,EXTI9 GPIO port selection"
hexmask.long.byte 0x8 0.--7. 1. "EXTI8,EXTI8 GPIO port selection"
line.long 0xC "EXTI_EXTICR4,EXTI external interrupt selection register"
hexmask.long.byte 0xC 24.--31. 1. "EXTI15,EXTI15 GPIO port selection"
hexmask.long.byte 0xC 16.--23. 1. "EXTI14,EXTI14 GPIO port selection"
newline
hexmask.long.byte 0xC 8.--15. 1. "EXTI13,EXTI13 GPIO port selection"
hexmask.long.byte 0xC 0.--7. 1. "EXTI12,EXTI0 GPIO port selection"
line.long 0x10 "EXTI_LOCKR,EXTI lock register"
bitfld.long 0x10 0. "LOCK,Global security and privilege configuration registers (EXTI_SECCFGR and EXTI_PRIVCFGR) lock" "0: Security and privilege configuration open can be..,1: Security and privilege configuration locked can.."
group.long 0x80++0x7
line.long 0x0 "EXTI_IMR1,EXTI CPU wakeup with interrupt mask register"
bitfld.long 0x0 16. "IM16,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 15. "IM15,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 14. "IM14,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 13. "IM13,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 12. "IM12,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 11. "IM11,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 10. "IM10,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 9. "IM9,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 8. "IM8,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 7. "IM7,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 6. "IM6,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 5. "IM5,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 4. "IM4,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 3. "IM3,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 2. "IM2,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x0 1. "IM1,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x0 0. "IM0,CPU wakeup with interrupt mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
line.long 0x4 "EXTI_EMR1,EXTI CPU wakeup with event mask register"
bitfld.long 0x4 16. "EM16,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 15. "EM15,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 14. "EM14,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 13. "EM13,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 12. "EM12,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 11. "EM11,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 10. "EM10,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 9. "EM9,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 8. "EM8,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 7. "EM7,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 6. "EM6,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 5. "EM5,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 4. "EM4,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 3. "EM3,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 2. "EM2,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
bitfld.long 0x4 1. "EM1,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
newline
bitfld.long 0x4 0. "EM0,CPU wakeup with event generation mask on event input x" "0: Wake-up is masked,1: Wake-up is unmasked"
tree.end
tree.end
tree "FLASH (Embedded Flash memory)"
base ad:0x0
tree "FLASH"
base ad:0x40022000
group.long 0x0++0x3
line.long 0x0 "FLASH_ACR,FLASH access control register"
bitfld.long 0x0 14. "SLEEP_PD,Flash memory power-down mode during Sleep mode" "0: Flash in Idle mode during Sleep mode,1: Flash in power-down mode during Sleep mode"
bitfld.long 0x0 12. "PDREQ,Flash power-down mode request" "0: No request for Flash to enter power-down mode,1: Flash requested to enter power-down mode"
newline
bitfld.long 0x0 11. "LPM,Low-power read mode" "0: Flash not in low-power read mode,1: Flash in low-power read mode"
bitfld.long 0x0 8. "PRFTEN,Prefetch enable" "0: Prefetch disabled,1: Prefetch enabled"
newline
hexmask.long.byte 0x0 0.--3. 1. "LATENCY,Latency"
wgroup.long 0x8++0xB
line.long 0x0 "FLASH_NSKEYR,FLASH key register"
hexmask.long 0x0 0.--31. 1. "NSKEY,Flash memory non-secure key"
line.long 0x4 "FLASH_SECKEYR,FLASH secure key register"
hexmask.long 0x4 0.--31. 1. "SECKEY,Flash memory secure key"
line.long 0x8 "FLASH_OPTKEYR,FLASH option key register"
hexmask.long 0x8 0.--31. 1. "OPTKEY,Option byte key"
wgroup.long 0x18++0x3
line.long 0x0 "FLASH_PDKEYR,FLASH power-down key register"
hexmask.long 0x0 0.--31. 1. "PDKEY1,Flash power-down key"
group.long 0x20++0x13
line.long 0x0 "FLASH_NSSR,FLASH status register"
rbitfld.long 0x0 20. "PD,Flash in power-down mode" "0,1"
rbitfld.long 0x0 19. "OEM2LOCK,OEM2 key RDP lock" "0,1"
newline
rbitfld.long 0x0 18. "OEM1LOCK,OEM1 key RDP lock" "0,1"
rbitfld.long 0x0 17. "WDW,Non-secure wait data to write" "0,1"
newline
rbitfld.long 0x0 16. "BSY,Non-secure busy" "0,1"
bitfld.long 0x0 13. "OPTWERR,Option write error" "0,1"
newline
bitfld.long 0x0 7. "PGSERR,Non-secure programming sequence error" "0,1"
bitfld.long 0x0 6. "SIZERR,Non-secure size error" "0,1"
newline
bitfld.long 0x0 5. "PGAERR,Non-secure programming alignment error" "0,1"
bitfld.long 0x0 4. "WRPERR,Non-secure write protection error" "0,1"
newline
bitfld.long 0x0 3. "PROGERR,Non-secure programming error" "0,1"
bitfld.long 0x0 1. "OPERR,Non-secure operation error" "0,1"
newline
bitfld.long 0x0 0. "EOP,Non-secure end of operation" "0,1"
line.long 0x4 "FLASH_SECSR,FLASH secure status register"
rbitfld.long 0x4 17. "WDW,Secure wait data to write" "0,1"
rbitfld.long 0x4 16. "BSY,Secure busy" "0,1"
newline
bitfld.long 0x4 7. "PGSERR,Secure programming sequence error" "0,1"
bitfld.long 0x4 6. "SIZERR,Secure size error" "0,1"
newline
bitfld.long 0x4 5. "PGAERR,Secure programming alignment error" "0,1"
bitfld.long 0x4 4. "WRPERR,Secure write protection error" "0,1"
newline
bitfld.long 0x4 3. "PROGERR,Secure programming error" "0,1"
bitfld.long 0x4 1. "OPERR,Secure operation error" "0,1"
newline
bitfld.long 0x4 0. "EOP,Secure end of operation" "0,1"
line.long 0x8 "FLASH_NSCR1,FLASH control register"
bitfld.long 0x8 31. "LOCK,Non-secure lock" "0,1"
bitfld.long 0x8 30. "OPTLOCK,Option lock" "0,1"
newline
bitfld.long 0x8 27. "OBL_LAUNCH,Force the option byte loading" "0: Option byte loading complete,1: Option byte loading requested"
bitfld.long 0x8 25. "ERRIE,Non-secure error interrupt enable" "0: Non-secure OPERR error interrupt disabled,1: Non-secure OPERR error interrupt enabled"
newline
bitfld.long 0x8 24. "EOPIE,Non-secure end of operation interrupt enable" "0: Non-secure EOP Interrupt disabled,1: Non-secure EOP Interrupt enabled"
bitfld.long 0x8 17. "OPTSTRT,Options modification start" "0,1"
newline
bitfld.long 0x8 16. "STRT,Non-secure operation start" "0,1"
bitfld.long 0x8 14. "BWR,Non-secure burst write programming mode" "0,1"
newline
hexmask.long.byte 0x8 3.--9. 1. "PNB,Non-secure page number selection"
bitfld.long 0x8 2. "MER,Non-secure Flash mass erase" "0,1"
newline
bitfld.long 0x8 1. "PER,Non-secure page erase" "0: Non-secure page erase disabled,1: Non-secure page erase enabled"
bitfld.long 0x8 0. "PG,Non-secure programming" "0: Non-secure Flash programming disabled,1: Non-secure Flash programming enabled"
line.long 0xC "FLASH_SECCR1,FLASH secure control register"
bitfld.long 0xC 31. "LOCK,Secure lock" "0,1"
bitfld.long 0xC 29. "INV,Flash memory security state invert" "0,1"
newline
bitfld.long 0xC 25. "ERRIE,Secure error interrupt enable" "0: Secure OPERR error interrupt disabled,1: Secure OPERR error interrupt enabled"
bitfld.long 0xC 24. "EOPIE,Secure End of operation interrupt enable" "0: Secure EOP Interrupt disabled,1: Secure EOP Interrupt enabled"
newline
bitfld.long 0xC 16. "STRT,Secure start" "0,1"
bitfld.long 0xC 14. "BWR,Secure burst write programming mode" "0,1"
newline
hexmask.long.byte 0xC 3.--9. 1. "PNB,Secure page number selection"
bitfld.long 0xC 2. "MER,Secure Flash mass erase" "0,1"
newline
bitfld.long 0xC 1. "PER,Secure page erase" "0: Secure page erase disabled,1: Secure page erase enabled"
bitfld.long 0xC 0. "PG,Secure programming" "0: Secure Flash programming disabled,1: Secure Flash programming enabled"
line.long 0x10 "FLASH_ECCR,FLASH ECC register"
bitfld.long 0x10 31. "ECCD,ECC detection" "0,1"
bitfld.long 0x10 30. "ECCC,ECC correction" "0,1"
newline
bitfld.long 0x10 24. "ECCIE,ECC correction interrupt enable" "0: ECCC interrupt disabled,1: ECCC interrupt enabled."
rbitfld.long 0x10 22. "SYSF_ECC,System Flash memory ECC fail" "0,1"
newline
hexmask.long.tbyte 0x10 0.--19. 1. "ADDR_ECC,ECC fail address"
rgroup.long 0x34++0x3
line.long 0x0 "FLASH_OPSR,FLASH operation status register"
bitfld.long 0x0 29.--31. "CODE_OP,Flash memory operation code" "0: No Flash operation interrupted by previous reset,1: Single write operation interrupted,2: Burst write operation interrupted,3: Page erase operation interrupted,4: Reserved,5: Mass erase operation interrupted,6: Option change operation interrupted,7: Reserved"
bitfld.long 0x0 22. "SYSF_OP,Operation in system Flash memory interrupted" "0,1"
newline
hexmask.long.tbyte 0x0 0.--19. 1. "ADDR_OP,Interrupted operation address"
group.long 0x38++0x27
line.long 0x0 "FLASH_NSCR2,FLASH control 2 register"
bitfld.long 0x0 1. "ES,Erase suspend request" "0: erase suspend disabled,1: erase suspend requested (enabled)"
bitfld.long 0x0 0. "PS,Program suspend request" "0: program suspend disabled,1: program suspend requested (enabled)"
line.long 0x4 "FLASH_SECCR2,FLASH secure control 2 register"
bitfld.long 0x4 1. "ES,Erase suspend request" "0: erase suspend disabled,1: erase suspend requested (enabled)"
bitfld.long 0x4 0. "PS,Program suspend request" "0: program suspend disabled,1: program suspend requested (enabled)"
line.long 0x8 "FLASH_OPTR,FLASH option register"
bitfld.long 0x8 31. "TZEN,Global TrustZone security enable" "0: Global TrustZone security disabled,1: Global TrustZone security enabled"
bitfld.long 0x8 27. "NBOOT0,NBOOT0 option bit" "0: NBOOT0 = 0,1: NBOOT0 = 1"
newline
bitfld.long 0x8 26. "NSWBOOT0,Software BOOT0" "0: BOOT0 taken from the option bit NBOOT0,1: BOOT0 taken from PH3/BOOT0 pin"
bitfld.long 0x8 25. "SRAM2_RST,SRAM2 erase when system reset" "0: SRAM2 erased when a system reset occurs,1: SRAM2 not erased when a system reset occurs"
newline
bitfld.long 0x8 24. "SRAM2_PE,SRAM2 parity check enable" "0: SRAM2 parity check enabled,1: SRAM2 parity check disabled"
bitfld.long 0x8 19. "WWDG_SW,Window watchdog selection" "0: Hardware window watchdog selected,1: Software window watchdog selected"
newline
bitfld.long 0x8 18. "IWDG_STDBY,Independent watchdog counter freeze in Standby mode" "0: Independent watchdog counter frozen in Standby..,1: Independent watchdog counter running in Standby.."
bitfld.long 0x8 17. "IWDG_STOP,Independent watchdog counter freeze in Stop mode" "0: Independent watchdog counter frozen in Stop mode,1: Independent watchdog counter running in Stop mode"
newline
bitfld.long 0x8 16. "IWDG_SW,Independent watchdog enable selection" "0: Hardware mode independent watchdog started..,1: Software mode independent watchdog started by.."
bitfld.long 0x8 15. "SRAM1_RST,SRAM1 erase upon system reset" "0: SRAM1erased when a system reset occurs,1: SRAM1 not erased when a system reset occurs"
newline
bitfld.long 0x8 13. "NRST_STDBY,Reset generation in Standby mode" "0: Reset generated when entering the Standby mode,1: No reset generated when entering the Standby mode"
bitfld.long 0x8 12. "NRST_STOP,Reset generation in Stop mode" "0: Reset generated when entering the Stop mode,1: No reset generated when entering the Stop mode"
newline
bitfld.long 0x8 8.--10. "BOR_LEV,BOR reset level" "0: BOR level 0 (reset level threshold around 1.7 V),1: BOR level 1 (reset level threshold around 2.0 V),2: BOR level 2 (reset level threshold around 2.2 V),3: BOR level 3 (reset level threshold around 2.5 V),4: BOR level 4 (reset level threshold around 2.8 V),?,?,?"
hexmask.long.byte 0x8 0.--7. 1. "RDP,Readout protection level"
line.long 0xC "FLASH_NSBOOTADD0R,FLASH boot address 0 register"
hexmask.long 0xC 7.--31. 1. "NSBOOTADD0,Non-secure boot base address 0"
line.long 0x10 "FLASH_NSBOOTADD1R,FLASH boot address 1 register"
hexmask.long 0x10 7.--31. 1. "NSBOOTADD1,Non-secure boot address 1"
line.long 0x14 "FLASH_SECBOOTADD0R,FLASH secure boot address 0 register"
hexmask.long 0x14 7.--31. 1. "SECBOOTADD0,Secure boot base address 0"
bitfld.long 0x14 0. "BOOT_LOCK,Boot lock" "0,1"
line.long 0x18 "FLASH_SECWMR1,FLASH secure watermark register 1"
hexmask.long.byte 0x18 16.--22. 1. "SECWM_PEND,End page of secure area"
hexmask.long.byte 0x18 0.--6. 1. "SECWM_PSTRT,Start page of secure area"
line.long 0x1C "FLASH_SECWMR2,FLASH secure watermark register 2"
bitfld.long 0x1C 31. "HDPEN,Secure Hide protection area enable" "0: No secure HDP area,1: Secure HDP area enabled"
hexmask.long.byte 0x1C 16.--22. 1. "HDP_PEND,End page of secure hide protection area"
line.long 0x20 "FLASH_WRPAR,FLASH WRP area A address register"
bitfld.long 0x20 31. "UNLOCK,WPR area A unlock" "0: WRPA start and end pages locked,1: WRPA start and end pages unlocked"
hexmask.long.byte 0x20 16.--22. 1. "WRPA_PEND,WPR area A end page"
newline
hexmask.long.byte 0x20 0.--6. 1. "WRPA_PSTRT,WPR area A start page"
line.long 0x24 "FLASH_WRPBR,FLASH WRP area B address register"
bitfld.long 0x24 31. "UNLOCK,WPR area B unlock" "0: WRPB start and end pages locked,1: WRPB start and end pages unlocked"
hexmask.long.byte 0x24 16.--22. 1. "WRPB_PEND,WRP area B end page"
newline
hexmask.long.byte 0x24 0.--6. 1. "WRPB_PSTRT,WRP area B start page"
wgroup.long 0x70++0xF
line.long 0x0 "FLASH_OEM1KEYR1,FLASH OEM1 key register 1"
hexmask.long 0x0 0.--31. 1. "OEM1KEY,OEM1 key least significant bytes"
line.long 0x4 "FLASH_OEM1KEYR2,FLASH OEM1 key register 2"
hexmask.long 0x4 0.--31. 1. "OEM1KEY,OEM1 key most significant bytes"
line.long 0x8 "FLASH_OEM2KEYR1,FLASH OEM2 key register 1"
hexmask.long 0x8 0.--31. 1. "OEM2KEY,OEM2 key least significant bytes"
line.long 0xC "FLASH_OEM2KEYR2,FLASH OEM2 key register 2"
hexmask.long 0xC 0.--31. 1. "OEM2KEY,OEM2 key most significant bytes"
group.long 0x80++0xF
line.long 0x0 "FLASH_SECBBR1,FLASH secure block based register 1"
bitfld.long 0x0 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0x4 "FLASH_SECBBR2,FLASH secure block based register 2"
bitfld.long 0x4 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0x8 "FLASH_SECBBR3,FLASH secure block based register 3"
bitfld.long 0x8 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0xC "FLASH_SECBBR4,FLASH secure block based register 4"
bitfld.long 0xC 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
group.long 0xC0++0x7
line.long 0x0 "FLASH_SECHDPCR,FLASH secure HDP control register"
bitfld.long 0x0 0. "HDP_ACCDIS,Secure HDP area access disable" "0: Access to secure HDP area granted,1: Access to secure HDP area denied (SECWMRx option.."
line.long 0x4 "FLASH_PRIFCFGR,FLASH privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,Privileged protection for non-secure registers" "0: Non-secure Flash registers can be read and..,1: Non-secure Flash registers can be read and.."
bitfld.long 0x4 0. "SPRIV,Privileged protection for secure registers" "0: Secure Flash registers can be read and written..,1: Secure Flash registers can be read and written.."
group.long 0xD0++0xF
line.long 0x0 "FLASH_PRIVBBR1,FLASH privilege block based register 1"
bitfld.long 0x0 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0x4 "FLASH_PRIVBBR2,FLASH privilege block based register 2"
bitfld.long 0x4 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0x8 "FLASH_PRIVBBR3,FLASH privilege block based register 3"
bitfld.long 0x8 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0xC "FLASH_PRIVBBR4,FLASH privilege block based register 4"
bitfld.long 0xC 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
tree.end
tree "SEC_FLASH"
base ad:0x50022000
group.long 0x0++0x3
line.long 0x0 "FLASH_ACR,FLASH access control register"
bitfld.long 0x0 14. "SLEEP_PD,Flash memory power-down mode during Sleep mode" "0: Flash in Idle mode during Sleep mode,1: Flash in power-down mode during Sleep mode"
bitfld.long 0x0 12. "PDREQ,Flash power-down mode request" "0: No request for Flash to enter power-down mode,1: Flash requested to enter power-down mode"
newline
bitfld.long 0x0 11. "LPM,Low-power read mode" "0: Flash not in low-power read mode,1: Flash in low-power read mode"
bitfld.long 0x0 8. "PRFTEN,Prefetch enable" "0: Prefetch disabled,1: Prefetch enabled"
newline
hexmask.long.byte 0x0 0.--3. 1. "LATENCY,Latency"
wgroup.long 0x8++0xB
line.long 0x0 "FLASH_NSKEYR,FLASH key register"
hexmask.long 0x0 0.--31. 1. "NSKEY,Flash memory non-secure key"
line.long 0x4 "FLASH_SECKEYR,FLASH secure key register"
hexmask.long 0x4 0.--31. 1. "SECKEY,Flash memory secure key"
line.long 0x8 "FLASH_OPTKEYR,FLASH option key register"
hexmask.long 0x8 0.--31. 1. "OPTKEY,Option byte key"
wgroup.long 0x18++0x3
line.long 0x0 "FLASH_PDKEYR,FLASH power-down key register"
hexmask.long 0x0 0.--31. 1. "PDKEY1,Flash power-down key"
group.long 0x20++0x13
line.long 0x0 "FLASH_NSSR,FLASH status register"
rbitfld.long 0x0 20. "PD,Flash in power-down mode" "0,1"
rbitfld.long 0x0 19. "OEM2LOCK,OEM2 key RDP lock" "0,1"
newline
rbitfld.long 0x0 18. "OEM1LOCK,OEM1 key RDP lock" "0,1"
rbitfld.long 0x0 17. "WDW,Non-secure wait data to write" "0,1"
newline
rbitfld.long 0x0 16. "BSY,Non-secure busy" "0,1"
bitfld.long 0x0 13. "OPTWERR,Option write error" "0,1"
newline
bitfld.long 0x0 7. "PGSERR,Non-secure programming sequence error" "0,1"
bitfld.long 0x0 6. "SIZERR,Non-secure size error" "0,1"
newline
bitfld.long 0x0 5. "PGAERR,Non-secure programming alignment error" "0,1"
bitfld.long 0x0 4. "WRPERR,Non-secure write protection error" "0,1"
newline
bitfld.long 0x0 3. "PROGERR,Non-secure programming error" "0,1"
bitfld.long 0x0 1. "OPERR,Non-secure operation error" "0,1"
newline
bitfld.long 0x0 0. "EOP,Non-secure end of operation" "0,1"
line.long 0x4 "FLASH_SECSR,FLASH secure status register"
rbitfld.long 0x4 17. "WDW,Secure wait data to write" "0,1"
rbitfld.long 0x4 16. "BSY,Secure busy" "0,1"
newline
bitfld.long 0x4 7. "PGSERR,Secure programming sequence error" "0,1"
bitfld.long 0x4 6. "SIZERR,Secure size error" "0,1"
newline
bitfld.long 0x4 5. "PGAERR,Secure programming alignment error" "0,1"
bitfld.long 0x4 4. "WRPERR,Secure write protection error" "0,1"
newline
bitfld.long 0x4 3. "PROGERR,Secure programming error" "0,1"
bitfld.long 0x4 1. "OPERR,Secure operation error" "0,1"
newline
bitfld.long 0x4 0. "EOP,Secure end of operation" "0,1"
line.long 0x8 "FLASH_NSCR1,FLASH control register"
bitfld.long 0x8 31. "LOCK,Non-secure lock" "0,1"
bitfld.long 0x8 30. "OPTLOCK,Option lock" "0,1"
newline
bitfld.long 0x8 27. "OBL_LAUNCH,Force the option byte loading" "0: Option byte loading complete,1: Option byte loading requested"
bitfld.long 0x8 25. "ERRIE,Non-secure error interrupt enable" "0: Non-secure OPERR error interrupt disabled,1: Non-secure OPERR error interrupt enabled"
newline
bitfld.long 0x8 24. "EOPIE,Non-secure end of operation interrupt enable" "0: Non-secure EOP Interrupt disabled,1: Non-secure EOP Interrupt enabled"
bitfld.long 0x8 17. "OPTSTRT,Options modification start" "0,1"
newline
bitfld.long 0x8 16. "STRT,Non-secure operation start" "0,1"
bitfld.long 0x8 14. "BWR,Non-secure burst write programming mode" "0,1"
newline
hexmask.long.byte 0x8 3.--9. 1. "PNB,Non-secure page number selection"
bitfld.long 0x8 2. "MER,Non-secure Flash mass erase" "0,1"
newline
bitfld.long 0x8 1. "PER,Non-secure page erase" "0: Non-secure page erase disabled,1: Non-secure page erase enabled"
bitfld.long 0x8 0. "PG,Non-secure programming" "0: Non-secure Flash programming disabled,1: Non-secure Flash programming enabled"
line.long 0xC "FLASH_SECCR1,FLASH secure control register"
bitfld.long 0xC 31. "LOCK,Secure lock" "0,1"
bitfld.long 0xC 29. "INV,Flash memory security state invert" "0,1"
newline
bitfld.long 0xC 25. "ERRIE,Secure error interrupt enable" "0: Secure OPERR error interrupt disabled,1: Secure OPERR error interrupt enabled"
bitfld.long 0xC 24. "EOPIE,Secure End of operation interrupt enable" "0: Secure EOP Interrupt disabled,1: Secure EOP Interrupt enabled"
newline
bitfld.long 0xC 16. "STRT,Secure start" "0,1"
bitfld.long 0xC 14. "BWR,Secure burst write programming mode" "0,1"
newline
hexmask.long.byte 0xC 3.--9. 1. "PNB,Secure page number selection"
bitfld.long 0xC 2. "MER,Secure Flash mass erase" "0,1"
newline
bitfld.long 0xC 1. "PER,Secure page erase" "0: Secure page erase disabled,1: Secure page erase enabled"
bitfld.long 0xC 0. "PG,Secure programming" "0: Secure Flash programming disabled,1: Secure Flash programming enabled"
line.long 0x10 "FLASH_ECCR,FLASH ECC register"
bitfld.long 0x10 31. "ECCD,ECC detection" "0,1"
bitfld.long 0x10 30. "ECCC,ECC correction" "0,1"
newline
bitfld.long 0x10 24. "ECCIE,ECC correction interrupt enable" "0: ECCC interrupt disabled,1: ECCC interrupt enabled."
rbitfld.long 0x10 22. "SYSF_ECC,System Flash memory ECC fail" "0,1"
newline
hexmask.long.tbyte 0x10 0.--19. 1. "ADDR_ECC,ECC fail address"
rgroup.long 0x34++0x3
line.long 0x0 "FLASH_OPSR,FLASH operation status register"
bitfld.long 0x0 29.--31. "CODE_OP,Flash memory operation code" "0: No Flash operation interrupted by previous reset,1: Single write operation interrupted,2: Burst write operation interrupted,3: Page erase operation interrupted,4: Reserved,5: Mass erase operation interrupted,6: Option change operation interrupted,7: Reserved"
bitfld.long 0x0 22. "SYSF_OP,Operation in system Flash memory interrupted" "0,1"
newline
hexmask.long.tbyte 0x0 0.--19. 1. "ADDR_OP,Interrupted operation address"
group.long 0x38++0x27
line.long 0x0 "FLASH_NSCR2,FLASH control 2 register"
bitfld.long 0x0 1. "ES,Erase suspend request" "0: erase suspend disabled,1: erase suspend requested (enabled)"
bitfld.long 0x0 0. "PS,Program suspend request" "0: program suspend disabled,1: program suspend requested (enabled)"
line.long 0x4 "FLASH_SECCR2,FLASH secure control 2 register"
bitfld.long 0x4 1. "ES,Erase suspend request" "0: erase suspend disabled,1: erase suspend requested (enabled)"
bitfld.long 0x4 0. "PS,Program suspend request" "0: program suspend disabled,1: program suspend requested (enabled)"
line.long 0x8 "FLASH_OPTR,FLASH option register"
bitfld.long 0x8 31. "TZEN,Global TrustZone security enable" "0: Global TrustZone security disabled,1: Global TrustZone security enabled"
bitfld.long 0x8 27. "NBOOT0,NBOOT0 option bit" "0: NBOOT0 = 0,1: NBOOT0 = 1"
newline
bitfld.long 0x8 26. "NSWBOOT0,Software BOOT0" "0: BOOT0 taken from the option bit NBOOT0,1: BOOT0 taken from PH3/BOOT0 pin"
bitfld.long 0x8 25. "SRAM2_RST,SRAM2 erase when system reset" "0: SRAM2 erased when a system reset occurs,1: SRAM2 not erased when a system reset occurs"
newline
bitfld.long 0x8 24. "SRAM2_PE,SRAM2 parity check enable" "0: SRAM2 parity check enabled,1: SRAM2 parity check disabled"
bitfld.long 0x8 19. "WWDG_SW,Window watchdog selection" "0: Hardware window watchdog selected,1: Software window watchdog selected"
newline
bitfld.long 0x8 18. "IWDG_STDBY,Independent watchdog counter freeze in Standby mode" "0: Independent watchdog counter frozen in Standby..,1: Independent watchdog counter running in Standby.."
bitfld.long 0x8 17. "IWDG_STOP,Independent watchdog counter freeze in Stop mode" "0: Independent watchdog counter frozen in Stop mode,1: Independent watchdog counter running in Stop mode"
newline
bitfld.long 0x8 16. "IWDG_SW,Independent watchdog enable selection" "0: Hardware mode independent watchdog started..,1: Software mode independent watchdog started by.."
bitfld.long 0x8 15. "SRAM1_RST,SRAM1 erase upon system reset" "0: SRAM1erased when a system reset occurs,1: SRAM1 not erased when a system reset occurs"
newline
bitfld.long 0x8 13. "NRST_STDBY,Reset generation in Standby mode" "0: Reset generated when entering the Standby mode,1: No reset generated when entering the Standby mode"
bitfld.long 0x8 12. "NRST_STOP,Reset generation in Stop mode" "0: Reset generated when entering the Stop mode,1: No reset generated when entering the Stop mode"
newline
bitfld.long 0x8 8.--10. "BOR_LEV,BOR reset level" "0: BOR level 0 (reset level threshold around 1.7 V),1: BOR level 1 (reset level threshold around 2.0 V),2: BOR level 2 (reset level threshold around 2.2 V),3: BOR level 3 (reset level threshold around 2.5 V),4: BOR level 4 (reset level threshold around 2.8 V),?,?,?"
hexmask.long.byte 0x8 0.--7. 1. "RDP,Readout protection level"
line.long 0xC "FLASH_NSBOOTADD0R,FLASH boot address 0 register"
hexmask.long 0xC 7.--31. 1. "NSBOOTADD0,Non-secure boot base address 0"
line.long 0x10 "FLASH_NSBOOTADD1R,FLASH boot address 1 register"
hexmask.long 0x10 7.--31. 1. "NSBOOTADD1,Non-secure boot address 1"
line.long 0x14 "FLASH_SECBOOTADD0R,FLASH secure boot address 0 register"
hexmask.long 0x14 7.--31. 1. "SECBOOTADD0,Secure boot base address 0"
bitfld.long 0x14 0. "BOOT_LOCK,Boot lock" "0,1"
line.long 0x18 "FLASH_SECWMR1,FLASH secure watermark register 1"
hexmask.long.byte 0x18 16.--22. 1. "SECWM_PEND,End page of secure area"
hexmask.long.byte 0x18 0.--6. 1. "SECWM_PSTRT,Start page of secure area"
line.long 0x1C "FLASH_SECWMR2,FLASH secure watermark register 2"
bitfld.long 0x1C 31. "HDPEN,Secure Hide protection area enable" "0: No secure HDP area,1: Secure HDP area enabled"
hexmask.long.byte 0x1C 16.--22. 1. "HDP_PEND,End page of secure hide protection area"
line.long 0x20 "FLASH_WRPAR,FLASH WRP area A address register"
bitfld.long 0x20 31. "UNLOCK,WPR area A unlock" "0: WRPA start and end pages locked,1: WRPA start and end pages unlocked"
hexmask.long.byte 0x20 16.--22. 1. "WRPA_PEND,WPR area A end page"
newline
hexmask.long.byte 0x20 0.--6. 1. "WRPA_PSTRT,WPR area A start page"
line.long 0x24 "FLASH_WRPBR,FLASH WRP area B address register"
bitfld.long 0x24 31. "UNLOCK,WPR area B unlock" "0: WRPB start and end pages locked,1: WRPB start and end pages unlocked"
hexmask.long.byte 0x24 16.--22. 1. "WRPB_PEND,WRP area B end page"
newline
hexmask.long.byte 0x24 0.--6. 1. "WRPB_PSTRT,WRP area B start page"
wgroup.long 0x70++0xF
line.long 0x0 "FLASH_OEM1KEYR1,FLASH OEM1 key register 1"
hexmask.long 0x0 0.--31. 1. "OEM1KEY,OEM1 key least significant bytes"
line.long 0x4 "FLASH_OEM1KEYR2,FLASH OEM1 key register 2"
hexmask.long 0x4 0.--31. 1. "OEM1KEY,OEM1 key most significant bytes"
line.long 0x8 "FLASH_OEM2KEYR1,FLASH OEM2 key register 1"
hexmask.long 0x8 0.--31. 1. "OEM2KEY,OEM2 key least significant bytes"
line.long 0xC "FLASH_OEM2KEYR2,FLASH OEM2 key register 2"
hexmask.long 0xC 0.--31. 1. "OEM2KEY,OEM2 key most significant bytes"
group.long 0x80++0xF
line.long 0x0 "FLASH_SECBBR1,FLASH secure block based register 1"
bitfld.long 0x0 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x0 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x0 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0x4 "FLASH_SECBBR2,FLASH secure block based register 2"
bitfld.long 0x4 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x4 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x4 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0x8 "FLASH_SECBBR3,FLASH secure block based register 3"
bitfld.long 0x8 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0x8 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0x8 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
line.long 0xC "FLASH_SECBBR4,FLASH secure block based register 4"
bitfld.long 0xC 31. "SECBB31,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 30. "SECBB30,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 29. "SECBB29,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 28. "SECBB28,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 27. "SECBB27,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 26. "SECBB26,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 25. "SECBB25,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 24. "SECBB24,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 23. "SECBB23,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 22. "SECBB22,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 21. "SECBB21,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 20. "SECBB20,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 19. "SECBB19,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 18. "SECBB18,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 17. "SECBB17,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 16. "SECBB16,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 15. "SECBB15,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 14. "SECBB14,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 13. "SECBB13,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 12. "SECBB12,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 11. "SECBB11,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 10. "SECBB10,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 9. "SECBB9,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 8. "SECBB8,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 7. "SECBB7,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 6. "SECBB6,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 5. "SECBB5,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 4. "SECBB4,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 3. "SECBB3,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 2. "SECBB2,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
newline
bitfld.long 0xC 1. "SECBB1,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
bitfld.long 0xC 0. "SECBB0,page secure/non-secure attribution" "0: Not block-based secure,1: Block-based secure"
group.long 0xC0++0x7
line.long 0x0 "FLASH_SECHDPCR,FLASH secure HDP control register"
bitfld.long 0x0 0. "HDP_ACCDIS,Secure HDP area access disable" "0: Access to secure HDP area granted,1: Access to secure HDP area denied (SECWMRx option.."
line.long 0x4 "FLASH_PRIFCFGR,FLASH privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,Privileged protection for non-secure registers" "0: Non-secure Flash registers can be read and..,1: Non-secure Flash registers can be read and.."
bitfld.long 0x4 0. "SPRIV,Privileged protection for secure registers" "0: Secure Flash registers can be read and written..,1: Secure Flash registers can be read and written.."
group.long 0xD0++0xF
line.long 0x0 "FLASH_PRIVBBR1,FLASH privilege block based register 1"
bitfld.long 0x0 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x0 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x0 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0x4 "FLASH_PRIVBBR2,FLASH privilege block based register 2"
bitfld.long 0x4 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x4 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x4 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0x8 "FLASH_PRIVBBR3,FLASH privilege block based register 3"
bitfld.long 0x8 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0x8 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0x8 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
line.long 0xC "FLASH_PRIVBBR4,FLASH privilege block based register 4"
bitfld.long 0xC 31. "PRIVBB31,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 30. "PRIVBB30,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 29. "PRIVBB29,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 28. "PRIVBB28,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 27. "PRIVBB27,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 26. "PRIVBB26,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 25. "PRIVBB25,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 24. "PRIVBB24,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 23. "PRIVBB23,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 22. "PRIVBB22,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 21. "PRIVBB21,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 20. "PRIVBB20,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 19. "PRIVBB19,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 18. "PRIVBB18,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 17. "PRIVBB17,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 16. "PRIVBB16,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 15. "PRIVBB15,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 14. "PRIVBB14,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 13. "PRIVBB13,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 12. "PRIVBB12,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 11. "PRIVBB11,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 10. "PRIVBB10,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 9. "PRIVBB9,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 8. "PRIVBB8,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 7. "PRIVBB7,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 6. "PRIVBB6,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 5. "PRIVBB5,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 4. "PRIVBB4,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 3. "PRIVBB3,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 2. "PRIVBB2,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
newline
bitfld.long 0xC 1. "PRIVBB1,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
bitfld.long 0xC 0. "PRIVBB0,page privileged/unprivileged attribution" "0: Accessible by unprivileged access,1: Only accessible by privileged access"
tree.end
tree.end
tree "GPDMA (General Purpose Direct Memory Access Controller)"
base ad:0x0
tree "GPDMA"
base ad:0x40020000
group.long 0x0++0xB
line.long 0x0 "GPDMA_SECCFGR,GPDMA secure configuration register"
bitfld.long 0x0 7. "SEC7,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 6. "SEC6,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 5. "SEC5,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 4. "SEC4,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 3. "SEC3,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 2. "SEC2,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 1. "SEC1,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 0. "SEC0,secure state of channel x" "0: non-secure,1: secure"
line.long 0x4 "GPDMA_PRIVCFGR,GPDMA privileged configuration register"
bitfld.long 0x4 7. "PRIV7,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 6. "PRIV6,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 5. "PRIV5,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "PRIV4,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "PRIV3,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 2. "PRIV2,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "PRIV1,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "PRIV0,privileged state of channel x" "0: unprivileged,1: privileged"
line.long 0x8 "GPDMA_RCFGLOCKR,GPDMA configuration lock register"
bitfld.long 0x8 7. "LOCK7,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 6. "LOCK6,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 5. "LOCK5,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 4. "LOCK4,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 3. "LOCK3,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 2. "LOCK2,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 1. "LOCK1,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 0. "LOCK0,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
rgroup.long 0xC++0x7
line.long 0x0 "GPDMA_MISR,GPDMA non-secure masked interrupt status register"
bitfld.long 0x0 7. "MIS7,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 6. "MIS6,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 5. "MIS5,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 4. "MIS4,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 3. "MIS3,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 2. "MIS2,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 1. "MIS1,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 0. "MIS0,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
line.long 0x4 "GPDMA_SMISR,GPDMA secure masked interrupt status register"
bitfld.long 0x4 7. "MIS7,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 6. "MIS6,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 5. "MIS5,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 4. "MIS4,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 3. "MIS3,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 2. "MIS2,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 1. "MIS1,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 0. "MIS0,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
group.long 0x50++0x3
line.long 0x0 "GPDMA_C0LBAR,GPDMA channel 0 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x5C++0x3
line.long 0x0 "GPDMA_C0FCR,GPDMA channel 0 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x60++0x3
line.long 0x0 "GPDMA_C0SR,GPDMA channel 0 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x64++0x3
line.long 0x0 "GPDMA_C0CR,GPDMA channel 0 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x90++0x13
line.long 0x0 "GPDMA_C0TR1,GPDMA channel 0 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C0TR2,GPDMA channel 0 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C0BR1,GPDMA channel 0 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C0SAR,GPDMA channel 0 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C0DAR,GPDMA channel 0 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0xCC++0x7
line.long 0x0 "GPDMA_C0LLR,GPDMA channel 0 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C1LBAR,GPDMA channel 1 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0xDC++0x3
line.long 0x0 "GPDMA_C1FCR,GPDMA channel 1 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0xE0++0x3
line.long 0x0 "GPDMA_C1SR,GPDMA channel 1 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0xE4++0x3
line.long 0x0 "GPDMA_C1CR,GPDMA channel 1 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x110++0x13
line.long 0x0 "GPDMA_C1TR1,GPDMA channel 1 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C1TR2,GPDMA channel 1 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C1BR1,GPDMA channel 1 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C1SAR,GPDMA channel 1 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C1DAR,GPDMA channel 1 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x14C++0x7
line.long 0x0 "GPDMA_C1LLR,GPDMA channel 1 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C2LBAR,GPDMA channel 2 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x15C++0x3
line.long 0x0 "GPDMA_C2FCR,GPDMA channel 2 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x160++0x3
line.long 0x0 "GPDMA_C2SR,GPDMA channel 2 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x164++0x3
line.long 0x0 "GPDMA_C2CR,GPDMA channel 2 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x190++0x13
line.long 0x0 "GPDMA_C2TR1,GPDMA channel 2 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C2TR2,GPDMA channel 2 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C2BR1,GPDMA channel 2 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C2SAR,GPDMA channel 2 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C2DAR,GPDMA channel 2 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x1CC++0x7
line.long 0x0 "GPDMA_C2LLR,GPDMA channel 2 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C3LBAR,GPDMA channel 3 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x1DC++0x3
line.long 0x0 "GPDMA_C3FCR,GPDMA channel 3 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x1E0++0x3
line.long 0x0 "GPDMA_C3SR,GPDMA channel 3 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x1E4++0x3
line.long 0x0 "GPDMA_C3CR,GPDMA channel 3 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x210++0x13
line.long 0x0 "GPDMA_C3TR1,GPDMA channel 3 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C3TR2,GPDMA channel 3 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C3BR1,GPDMA channel 3 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C3SAR,GPDMA channel 3 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C3DAR,GPDMA channel 3 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x24C++0x7
line.long 0x0 "GPDMA_C3LLR,GPDMA channel 3 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C4LBAR,GPDMA channel 4 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x25C++0x3
line.long 0x0 "GPDMA_C4FCR,GPDMA channel 4 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x260++0x3
line.long 0x0 "GPDMA_C4SR,GPDMA channel 4 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x264++0x3
line.long 0x0 "GPDMA_C4CR,GPDMA channel 4 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x290++0x13
line.long 0x0 "GPDMA_C4TR1,GPDMA channel 4 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C4TR2,GPDMA channel 4 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C4BR1,GPDMA channel 4 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C4SAR,GPDMA channel 4 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C4DAR,GPDMA channel 4 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x2CC++0x7
line.long 0x0 "GPDMA_C4LLR,GPDMA channel 4 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C5LBAR,GPDMA channel 5 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x2DC++0x3
line.long 0x0 "GPDMA_C5FCR,GPDMA channel 5 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x2E0++0x3
line.long 0x0 "GPDMA_C5SR,GPDMA channel 5 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x2E4++0x3
line.long 0x0 "GPDMA_C5CR,GPDMA channel 5 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x310++0x13
line.long 0x0 "GPDMA_C5TR1,GPDMA channel 5 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C5TR2,GPDMA channel 5 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C5BR1,GPDMA channel 5 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C5SAR,GPDMA channel 5 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C5DAR,GPDMA channel 5 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x34C++0x7
line.long 0x0 "GPDMA_C5LLR,GPDMA channel 5 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C6LBAR,GPDMA channel 6 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x35C++0x3
line.long 0x0 "GPDMA_C6FCR,GPDMA channel 6 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x360++0x3
line.long 0x0 "GPDMA_C6SR,GPDMA channel 6 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x364++0x3
line.long 0x0 "GPDMA_C6CR,GPDMA channel 6 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x390++0x13
line.long 0x0 "GPDMA_C6TR1,GPDMA channel 6 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C6TR2,GPDMA channel 6 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C6BR1,GPDMA channel 6 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C6SAR,GPDMA channel 6 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C6DAR,GPDMA channel 6 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x3CC++0x7
line.long 0x0 "GPDMA_C6LLR,GPDMA channel 6 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C7LBAR,GPDMA channel 7 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x3DC++0x3
line.long 0x0 "GPDMA_C7FCR,GPDMA channel 7 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x3E0++0x3
line.long 0x0 "GPDMA_C7SR,GPDMA channel 7 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x3E4++0x3
line.long 0x0 "GPDMA_C7CR,GPDMA channel 7 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x410++0x13
line.long 0x0 "GPDMA_C7TR1,GPDMA channel 7 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C7TR2,GPDMA channel 7 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C7BR1,GPDMA channel 7 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C7SAR,GPDMA channel 7 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C7DAR,GPDMA channel 7 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x44C++0x3
line.long 0x0 "GPDMA_C7LLR,GPDMA channel 7 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
tree.end
tree "SEC_GPDMA"
base ad:0x50020000
group.long 0x0++0xB
line.long 0x0 "GPDMA_SECCFGR,GPDMA secure configuration register"
bitfld.long 0x0 7. "SEC7,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 6. "SEC6,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 5. "SEC5,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 4. "SEC4,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 3. "SEC3,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 2. "SEC2,secure state of channel x" "0: non-secure,1: secure"
newline
bitfld.long 0x0 1. "SEC1,secure state of channel x" "0: non-secure,1: secure"
bitfld.long 0x0 0. "SEC0,secure state of channel x" "0: non-secure,1: secure"
line.long 0x4 "GPDMA_PRIVCFGR,GPDMA privileged configuration register"
bitfld.long 0x4 7. "PRIV7,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 6. "PRIV6,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 5. "PRIV5,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 4. "PRIV4,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 3. "PRIV3,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 2. "PRIV2,privileged state of channel x" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "PRIV1,privileged state of channel x" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "PRIV0,privileged state of channel x" "0: unprivileged,1: privileged"
line.long 0x8 "GPDMA_RCFGLOCKR,GPDMA configuration lock register"
bitfld.long 0x8 7. "LOCK7,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 6. "LOCK6,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 5. "LOCK5,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 4. "LOCK4,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 3. "LOCK3,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 2. "LOCK2,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
newline
bitfld.long 0x8 1. "LOCK1,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
bitfld.long 0x8 0. "LOCK0,lock the configuration of GPDMA_SECCFGR.SECx and GPDMA_PRIVCFGR.PRIVx  until a global GPDMA reset" "0: secure privilege configuration of the channel x..,1: secure privilege configuration of the channel x.."
rgroup.long 0xC++0x7
line.long 0x0 "GPDMA_MISR,GPDMA non-secure masked interrupt status register"
bitfld.long 0x0 7. "MIS7,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 6. "MIS6,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 5. "MIS5,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 4. "MIS4,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 3. "MIS3,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 2. "MIS2,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
newline
bitfld.long 0x0 1. "MIS1,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
bitfld.long 0x0 0. "MIS0,masked interrupt status of channel x" "0: no interrupt occurred on channel x,1: an interrupt occurred on channel x"
line.long 0x4 "GPDMA_SMISR,GPDMA secure masked interrupt status register"
bitfld.long 0x4 7. "MIS7,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 6. "MIS6,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 5. "MIS5,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 4. "MIS4,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 3. "MIS3,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 2. "MIS2,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
newline
bitfld.long 0x4 1. "MIS1,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
bitfld.long 0x4 0. "MIS0,masked interrupt status of the secure channel x" "0: no interrupt occurred on the secure channel x,1: an interrupt occurred on the secure channel x"
group.long 0x50++0x3
line.long 0x0 "GPDMA_C0LBAR,GPDMA channel 0 linked-list base address register"
hexmask.long.word 0x0 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x5C++0x3
line.long 0x0 "GPDMA_C0FCR,GPDMA channel 0 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x60++0x3
line.long 0x0 "GPDMA_C0SR,GPDMA channel 0 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x64++0x3
line.long 0x0 "GPDMA_C0CR,GPDMA channel 0 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x90++0x13
line.long 0x0 "GPDMA_C0TR1,GPDMA channel 0 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C0TR2,GPDMA channel 0 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C0BR1,GPDMA channel 0 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C0SAR,GPDMA channel 0 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C0DAR,GPDMA channel 0 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0xCC++0x7
line.long 0x0 "GPDMA_C0LLR,GPDMA channel 0 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C1LBAR,GPDMA channel 1 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0xDC++0x3
line.long 0x0 "GPDMA_C1FCR,GPDMA channel 1 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0xE0++0x3
line.long 0x0 "GPDMA_C1SR,GPDMA channel 1 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0xE4++0x3
line.long 0x0 "GPDMA_C1CR,GPDMA channel 1 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x110++0x13
line.long 0x0 "GPDMA_C1TR1,GPDMA channel 1 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C1TR2,GPDMA channel 1 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C1BR1,GPDMA channel 1 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C1SAR,GPDMA channel 1 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C1DAR,GPDMA channel 1 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x14C++0x7
line.long 0x0 "GPDMA_C1LLR,GPDMA channel 1 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C2LBAR,GPDMA channel 2 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x15C++0x3
line.long 0x0 "GPDMA_C2FCR,GPDMA channel 2 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x160++0x3
line.long 0x0 "GPDMA_C2SR,GPDMA channel 2 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x164++0x3
line.long 0x0 "GPDMA_C2CR,GPDMA channel 2 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x190++0x13
line.long 0x0 "GPDMA_C2TR1,GPDMA channel 2 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C2TR2,GPDMA channel 2 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C2BR1,GPDMA channel 2 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C2SAR,GPDMA channel 2 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C2DAR,GPDMA channel 2 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x1CC++0x7
line.long 0x0 "GPDMA_C2LLR,GPDMA channel 2 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C3LBAR,GPDMA channel 3 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x1DC++0x3
line.long 0x0 "GPDMA_C3FCR,GPDMA channel 3 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x1E0++0x3
line.long 0x0 "GPDMA_C3SR,GPDMA channel 3 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x1E4++0x3
line.long 0x0 "GPDMA_C3CR,GPDMA channel 3 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x210++0x13
line.long 0x0 "GPDMA_C3TR1,GPDMA channel 3 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C3TR2,GPDMA channel 3 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C3BR1,GPDMA channel 3 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C3SAR,GPDMA channel 3 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C3DAR,GPDMA channel 3 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x24C++0x7
line.long 0x0 "GPDMA_C3LLR,GPDMA channel 3 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C4LBAR,GPDMA channel 4 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x25C++0x3
line.long 0x0 "GPDMA_C4FCR,GPDMA channel 4 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x260++0x3
line.long 0x0 "GPDMA_C4SR,GPDMA channel 4 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x264++0x3
line.long 0x0 "GPDMA_C4CR,GPDMA channel 4 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x290++0x13
line.long 0x0 "GPDMA_C4TR1,GPDMA channel 4 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C4TR2,GPDMA channel 4 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C4BR1,GPDMA channel 4 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C4SAR,GPDMA channel 4 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C4DAR,GPDMA channel 4 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x2CC++0x7
line.long 0x0 "GPDMA_C4LLR,GPDMA channel 4 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C5LBAR,GPDMA channel 5 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x2DC++0x3
line.long 0x0 "GPDMA_C5FCR,GPDMA channel 5 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x2E0++0x3
line.long 0x0 "GPDMA_C5SR,GPDMA channel 5 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x2E4++0x3
line.long 0x0 "GPDMA_C5CR,GPDMA channel 5 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x310++0x13
line.long 0x0 "GPDMA_C5TR1,GPDMA channel 5 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C5TR2,GPDMA channel 5 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C5BR1,GPDMA channel 5 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C5SAR,GPDMA channel 5 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C5DAR,GPDMA channel 5 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x34C++0x7
line.long 0x0 "GPDMA_C5LLR,GPDMA channel 5 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C6LBAR,GPDMA channel 6 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x35C++0x3
line.long 0x0 "GPDMA_C6FCR,GPDMA channel 6 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x360++0x3
line.long 0x0 "GPDMA_C6SR,GPDMA channel 6 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x364++0x3
line.long 0x0 "GPDMA_C6CR,GPDMA channel 6 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x390++0x13
line.long 0x0 "GPDMA_C6TR1,GPDMA channel 6 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C6TR2,GPDMA channel 6 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C6BR1,GPDMA channel 6 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C6SAR,GPDMA channel 6 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C6DAR,GPDMA channel 6 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x3CC++0x7
line.long 0x0 "GPDMA_C6LLR,GPDMA channel 6 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
line.long 0x4 "GPDMA_C7LBAR,GPDMA channel 7 linked-list base address register"
hexmask.long.word 0x4 16.--31. 1. "LBA,linked-list base address of GPDMA channel x"
wgroup.long 0x3DC++0x3
line.long 0x0 "GPDMA_C7FCR,GPDMA channel 7 flag clear register"
bitfld.long 0x0 14. "TOF,trigger overrun flag clear" "0: no effect,1: corresponding TOF flag cleared"
bitfld.long 0x0 13. "SUSPF,completed suspension flag clear" "0: no effect,1: corresponding SUSPF flag cleared"
newline
bitfld.long 0x0 12. "USEF,user setting error flag clear" "0: no effect,1: corresponding USEF flag cleared"
bitfld.long 0x0 11. "ULEF,update link transfer error flag clear" "0: no effect,1: corresponding ULEF flag cleared"
newline
bitfld.long 0x0 10. "DTEF,data transfer error flag clear" "0: no effect,1: corresponding DTEF flag cleared"
bitfld.long 0x0 9. "HTF,half transfer flag clear" "0: no effect,1: corresponding HTF flag cleared"
newline
bitfld.long 0x0 8. "TCF,transfer complete flag clear" "0: no effect,1: corresponding TCF flag cleared"
rgroup.long 0x3E0++0x3
line.long 0x0 "GPDMA_C7SR,GPDMA channel 7 status register"
hexmask.long.byte 0x0 16.--23. 1. "FIFOL,monitored FIFO level"
bitfld.long 0x0 14. "TOF,trigger overrun flag" "0: no trigger overrun event,1: a trigger overrun event occurred"
newline
bitfld.long 0x0 13. "SUSPF,completed suspension flag" "0: no completed suspension event,1: a completed suspension event occurred"
bitfld.long 0x0 12. "USEF,user setting error flag" "0: no user setting error event,1: a user setting error event occurred"
newline
bitfld.long 0x0 11. "ULEF,update link transfer error flag" "0: no update link transfer error event,1: a master bus error event occurred while updating.."
bitfld.long 0x0 10. "DTEF,data transfer error flag" "0: no data transfer error event,1: a master bus error event occurred on a data.."
newline
bitfld.long 0x0 9. "HTF,half transfer flag" "0: no half transfer event,1: a half transfer event occurred"
bitfld.long 0x0 8. "TCF,transfer complete flag" "0: no transfer complete event,1: a transfer complete event occurred"
newline
bitfld.long 0x0 0. "IDLEF,idle flag" "0: channel not in idle state,1: channel in idle state"
group.long 0x3E4++0x3
line.long 0x0 "GPDMA_C7CR,GPDMA channel 7 control register"
bitfld.long 0x0 22.--23. "PRIO,priority level of the channel x GPDMA transfer versus others" "0: low priority low weight,1: low priority mid weight,2: low priority high weight,3: high priority"
bitfld.long 0x0 17. "LAP,linked-list allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 16. "LSM,Link step mode" "0: channel executed for the full linked-list and..,1: channel executed once for the current LLI"
bitfld.long 0x0 14. "TOIE,trigger overrun interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 13. "SUSPIE,completed suspension interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 12. "USEIE,user setting error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 11. "ULEIE,update link transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 10. "DTEIE,data transfer error interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 9. "HTIE,half transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 8. "TCIE,transfer complete interrupt enable" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 2. "SUSP,suspend" "0: write: resume channel read: channel not suspended,1: write: suspend channel read: channel suspended."
bitfld.long 0x0 1. "RESET,reset" "0: no channel reset,1: channel reset"
newline
bitfld.long 0x0 0. "EN,enable" "0: write: ignored read: channel disabled,1: write: enable channel read: channel enabled"
group.long 0x410++0x13
line.long 0x0 "GPDMA_C7TR1,GPDMA channel 7 transfer register 1"
bitfld.long 0x0 31. "DSEC,security attribute of the GPDMA transfer to the destination" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
bitfld.long 0x0 30. "DAP,destination allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
newline
bitfld.long 0x0 27. "DHX,destination half-word exchange" "0: no halfword-based exchanged within word,1: the two consecutive (post PAM) half-words are.."
bitfld.long 0x0 26. "DBX,destination byte exchange" "0: no byte-based exchange within half-word,1: the two consecutive (post PAM) bytes are.."
newline
hexmask.long.byte 0x0 20.--25. 1. "DBL_1,destination burst length minus 1  between 0 and 63"
bitfld.long 0x0 19. "DINC,destination incrementing burst" "0: fixed burst,1: contiguously incremented burst"
newline
bitfld.long 0x0 16.--17. "DDW_LOG2,binary logarithm of the destination data width of a burst  in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
bitfld.long 0x0 15. "SSEC,security attribute of the GPDMA transfer from the source" "0: GPDMA transfer non-secure,1: GPDMA transfer secure"
newline
bitfld.long 0x0 14. "SAP,source allocated port" "0: port 0 (AHB) allocated,1: port 1 (AHB) allocated"
bitfld.long 0x0 13. "SBX,source byte exchange within the unaligned half-word of each source word" "0: no byte-based exchange within the unaligned..,1: the two consecutive bytes within the unaligned.."
newline
bitfld.long 0x0 11.--12. "PAM,padding/alignment mode" "0: source data is transferred as right aligned..,1: source data is transferred as left-aligned..,?,?"
hexmask.long.byte 0x0 4.--9. 1. "SBL_1,source burst length minus 1  between 0 and 63"
newline
bitfld.long 0x0 3. "SINC,source incrementing burst" "0: fixed burst,1: contiguously incremented burst"
bitfld.long 0x0 0.--1. "SDW_LOG2,binary logarithm of the source data width of a burst in bytes" "0: byte,1: half-word (2 bytes),2: word (4 bytes),3: user setting error reported and no transfer issued"
line.long 0x4 "GPDMA_C7TR2,GPDMA channel 7 transfer register 2"
bitfld.long 0x4 30.--31. "TCEM,transfer complete event mode" "0: at block level (when GPDMA_CxBR1.BNDT[15:0] =..,1: channel x (0 to 7 same as 00,2: at LLI level: the complete transfer event is..,3: at channel level: the complete transfer event is.."
bitfld.long 0x4 24.--25. "TRIGPOL,trigger event polarity" "0: no trigger (masked trigger event),1: trigger on the rising edge,2: trigger on the falling edge,3: same as 00"
newline
hexmask.long.byte 0x4 16.--20. 1. "TRIGSEL,trigger event input selection"
bitfld.long 0x4 14.--15. "TRIGM,trigger mode" "0: at block level: the first burst read of each..,1: Kbyte boundary address crossing): if the trigger..,?,3: at programmed burst level: If SWREQ = 1 each.."
newline
bitfld.long 0x4 11. "BREQ,Block hardware request" "0: the selected hardware request is driven by a..,1: the selected hardware request is driven by a.."
bitfld.long 0x4 10. "DREQ,destination hardware request" "0: selected hardware request driven by a source..,1: selected hardware request driven by a.."
newline
bitfld.long 0x4 9. "SWREQ,software request" "0: no software request. The selected hardware..,1: software request for a memory-to-memory.."
hexmask.long.byte 0x4 0.--5. 1. "REQSEL,GPDMA hardware request selection"
line.long 0x8 "GPDMA_C7BR1,GPDMA channel 7 block register 1"
hexmask.long.word 0x8 0.--15. 1. "BNDT,block number of data bytes to transfer from the source"
line.long 0xC "GPDMA_C7SAR,GPDMA channel 7 source address register"
hexmask.long 0xC 0.--31. 1. "SA,source address"
line.long 0x10 "GPDMA_C7DAR,GPDMA channel 7 destination address register"
hexmask.long 0x10 0.--31. 1. "DA,destination address"
group.long 0x44C++0x3
line.long 0x0 "GPDMA_C7LLR,GPDMA channel 7 linked-list address register"
bitfld.long 0x0 31. "UT1,Update GPDMA_CxTR1 from memory" "0: no GPDMA_CxTR1 update,1: GPDMA_CxTR1 update"
bitfld.long 0x0 30. "UT2,Update GPDMA_CxTR2 from memory" "0: no GPDMA_CxTR2 update,1: GPDMA_CxTR2 update"
newline
bitfld.long 0x0 29. "UB1,Update GPDMA_CxBR1 from memory" "0: no GPDMA_CxBR1 update from memory..,1: GPDMA_CxBR1 update"
bitfld.long 0x0 28. "USA,update GPDMA_CxSAR from memory" "0: no GPDMA_CxSAR update,1: GPDMA_CxSAR update"
newline
bitfld.long 0x0 27. "UDA,Update GPDMA_CxDAR register from memory" "0: no GPDMA_CxDAR update,1: GPDMA_CxDAR update"
bitfld.long 0x0 16. "ULL,Update GPDMA_CxLLR register from memory" "0: no GPDMA_CxLLR update,1: GPDMA_CxLLR update"
newline
hexmask.long.word 0x0 2.--15. 1. "LA,pointer (16-bit low-significant address) to the next linked-list data structure"
tree.end
tree.end
tree "GPIO (General-purpose I/Os)"
base ad:0x0
tree "GPIOA"
base ad:0x42020000
group.long 0x0++0xF
line.long 0x0 "GPIOA_MODER,GPIO port A mode register"
bitfld.long 0x0 30.--31. "MODE15,Port configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x0 22.--23. "MODE11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "MODE9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "MODE7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "MODE2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "MODE0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0x4 "GPIOA_OTYPER,GPIO port A output type register"
bitfld.long 0x4 15. "OT15,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 3. "OT3,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 2. "OT2,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 1. "OT1,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 0. "OT0,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOA_OSPEEDR,GPIO port A output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "OSPEED2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "OSPEED0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0xC "GPIOA_PUPDR,GPIO port A pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "PUPD2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "PUPD0,Port configuration I/O pin 0" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOA_IDR,GPIO port A input data register"
bitfld.long 0x0 15. "ID15,Port input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port input data I/O pin y" "0,1"
bitfld.long 0x0 12. "ID12,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port input data I/O pin y" "0,1"
bitfld.long 0x0 10. "ID10,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port input data I/O pin y" "0,1"
bitfld.long 0x0 8. "ID8,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port input data I/O pin y" "0,1"
bitfld.long 0x0 6. "ID6,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data I/O pin y" "0,1"
bitfld.long 0x0 3. "ID3,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 2. "ID2,Port input data I/O pin y" "0,1"
bitfld.long 0x0 1. "ID1,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 0. "ID0,Port input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOA_ODR,GPIO port A output data register"
bitfld.long 0x0 15. "OD15,Port output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port output data I/O pin y" "0,1"
bitfld.long 0x0 12. "OD12,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port output data I/O pin y" "0,1"
bitfld.long 0x0 10. "OD10,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port output data I/O pin y" "0,1"
bitfld.long 0x0 8. "OD8,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port output data I/O pin y" "0,1"
bitfld.long 0x0 6. "OD6,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data I/O pin y" "0,1"
bitfld.long 0x0 3. "OD3,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 2. "OD2,Port output data I/O pin y" "0,1"
bitfld.long 0x0 1. "OD1,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 0. "OD0,Port output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOA_BSRR,GPIO port A bit set/reset register"
bitfld.long 0x0 31. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 19. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 18. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 17. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 16. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 15. "BS15,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 14. "BS14,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 13. "BS13,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 12. "BS12,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 11. "BS11,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 10. "BS10,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 9. "BS9,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 8. "BS8,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 7. "BS7,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 6. "BS6,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 5. "BS5,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOA_LCKR,GPIO port A configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 3. "LCK3,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 2. "LCK2,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 1. "LCK1,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 0. "LCK0,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOA_AFRL,GPIO port A alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port I/O pin 7"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port I/O pin 6"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port I/O pin 5"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port I/O pin 3"
newline
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port I/O pin 2"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port I/O pin 1"
newline
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port I/O pin 0"
line.long 0x8 "GPIOA_AFRH,GPIO port A alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port I/O pin 15"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port I/O pin 14"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port I/O pin 13"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port I/O pin 12"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port I/O pin 11"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port I/O pin 10"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port I/O pin 9"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port I/O pin 8"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOA_BRR,GPIO port A bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 3. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 2. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 1. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 0. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOA_SECCFGR,GPIO port A secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 12. "SEC12,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 11. "SEC11,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 10. "SEC10,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 9. "SEC9,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 8. "SEC8,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 7. "SEC7,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 6. "SEC6,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 5. "SEC5,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 3. "SEC3,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 2. "SEC2,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 1. "SEC1,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 0. "SEC0,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "GPIOB"
base ad:0x42020400
group.long 0x0++0xF
line.long 0x0 "GPIOB_MODER,GPIO port B mode register"
bitfld.long 0x0 30.--31. "MODE15,Port configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x0 22.--23. "MODE11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "MODE9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "MODE7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "MODE3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0x0 2.--3. "MODE1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0x4 "GPIOB_OTYPER,GPIO port B output type register"
bitfld.long 0x4 15. "OT15,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOB_OSPEEDR,GPIO port B output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0xC "GPIOB_PUPDR,GPIO port B pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port configuration I/O pin 0" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOB_IDR,GPIO port B input data register"
bitfld.long 0x0 15. "ID15,Port input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port input data I/O pin y" "0,1"
bitfld.long 0x0 12. "ID12,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port input data I/O pin y" "0,1"
bitfld.long 0x0 10. "ID10,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port input data I/O pin y" "0,1"
bitfld.long 0x0 8. "ID8,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port input data I/O pin y" "0,1"
bitfld.long 0x0 6. "ID6,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data I/O pin y" "0,1"
bitfld.long 0x0 4. "ID4,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port input data I/O pin y" "0,1"
bitfld.long 0x0 2. "ID2,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port input data I/O pin y" "0,1"
bitfld.long 0x0 0. "ID0,Port input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOB_ODR,GPIO port B output data register"
bitfld.long 0x0 15. "OD15,Port output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port output data I/O pin y" "0,1"
bitfld.long 0x0 12. "OD12,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port output data I/O pin y" "0,1"
bitfld.long 0x0 10. "OD10,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port output data I/O pin y" "0,1"
bitfld.long 0x0 8. "OD8,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port output data I/O pin y" "0,1"
bitfld.long 0x0 6. "OD6,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data I/O pin y" "0,1"
bitfld.long 0x0 4. "OD4,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port output data I/O pin y" "0,1"
bitfld.long 0x0 2. "OD2,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port output data I/O pin y" "0,1"
bitfld.long 0x0 0. "OD0,Port output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOB_BSRR,GPIO port B bit set/reset register"
bitfld.long 0x0 31. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOB_LCKR,GPIO port B configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOB_AFRL,GPIO port B alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port I/O pin 7"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port I/O pin 6"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port I/O pin 5"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port I/O pin 4"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port I/O pin 3"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port I/O pin 2"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port I/O pin 1"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port I/O pin 0"
line.long 0x8 "GPIOB_AFRH,GPIO port B alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port I/O pin 15"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port I/O pin 14"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port I/O pin 13"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port I/O pin 12"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port I/O pin 11"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port I/O pin 10"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port I/O pin 9"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port I/O pin 8"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOB_BRR,GPIO port B bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOB_SECCFGR,GPIO port B secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 12. "SEC12,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 11. "SEC11,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 10. "SEC10,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 9. "SEC9,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 8. "SEC8,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 7. "SEC7,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 6. "SEC6,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 5. "SEC5,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 4. "SEC4,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 3. "SEC3,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 2. "SEC2,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 1. "SEC1,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 0. "SEC0,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "GPIOC"
base ad:0x42020800
group.long 0x0++0xF
line.long 0x0 "GPIOC_MODER,GPIO port C mode register"
bitfld.long 0x0 30.--31. "MODE15,Port C configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port C configuration I/O pin 13" "0,1,2,3"
line.long 0x4 "GPIOC_OTYPER,GPIO port C output type register"
bitfld.long 0x4 15. "OT15,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOC_OSPEEDR,GPIOC port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port C configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port C configuration I/O pin 13" "0,1,2,3"
line.long 0xC "GPIOC_PUPDR,GPIO port C pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port C configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port C configuration I/O pin 13" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOC_IDR,GPIO port C input data register"
bitfld.long 0x0 15. "ID15,Port C input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port C input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port C input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOC_ODR,GPIO port C output data register"
bitfld.long 0x0 15. "OD15,Port C output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port C output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port C output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOC_BSRR,GPIO port C bit set/reset register"
bitfld.long 0x0 31. "BR15,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 15. "BS15,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 14. "BS14,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 13. "BS13,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0x3
line.long 0x0 "GPIOC_LCKR,GPIO port C configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
group.long 0x24++0x3
line.long 0x0 "GPIOC_AFRH,GPIO port C alternate function high register"
hexmask.long.byte 0x0 28.--31. 1. "AFSEL15,Alternate function selection for port C I/O pin 15"
hexmask.long.byte 0x0 24.--27. 1. "AFSEL14,Alternate function selection for port C I/O pin 14"
newline
hexmask.long.byte 0x0 20.--23. 1. "AFSEL13,Alternate function selection for port C I/O pin 13"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOC_BRR,GPIO port C bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOC_SECCFGR,GPIO port C secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "GPIOH"
base ad:0x42021C00
group.long 0x0++0xF
line.long 0x0 "GPIOH_MODER,GPIO port H mode register"
bitfld.long 0x0 6.--7. "MODE3,Port H configuration I/O pin 3" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOH_OTYPER,GPIO port H output type register"
bitfld.long 0x4 3. "OT3,Port H configuration I/O pin 3" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOH_OSPEEDR,GPIO port H output speed register"
bitfld.long 0x8 6.--7. "OSPEED3,Port H configuration I/O pin 3" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
line.long 0xC "GPIOH_PUPDR,GPIO port H pull-up/pull-down register"
bitfld.long 0xC 6.--7. "PUPD3,Port H configuration I/O pin 3" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOH_IDR,GPIO port H input data register"
bitfld.long 0x0 3. "ID3,Port H input data I/O pin 3" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOH_ODR,GPIO port H output data register"
bitfld.long 0x0 3. "OD3,Port H output data I/O pin 3" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOH_BSRR,GPIO port H bit set/reset register"
bitfld.long 0x0 19. "BR3,Port H reset I/O pin 3" "0: No action on the corresponding OD3 bit,1: Resets the corresponding OD3 bit"
bitfld.long 0x0 3. "BS3,Port H set I/O pin 3" "0: No action on the corresponding OD3 bit,1: Sets the corresponding OD3 bit"
group.long 0x1C++0x7
line.long 0x0 "GPIOH_LCKR,GPIO port H configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 3. "LCK3,Port H lock I/O pin 3" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOH_AFRL,GPIO port H alternate function low register"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port H I/O pin 3"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOH_BRR,GPIO port H bit reset register"
bitfld.long 0x0 3. "BR3,Port H reset I/O pin 3" "0: No action on the corresponding OD3 bit,1: Reset the corresponding OD3 bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOH_SECCFGR,GPIO port H secure configuration register"
bitfld.long 0x0 3. "SEC3,I/O pin of port H secure bit enable 3" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "SEC_GPIOA"
base ad:0x52020000
group.long 0x0++0xF
line.long 0x0 "GPIOA_MODER,GPIO port A mode register"
bitfld.long 0x0 30.--31. "MODE15,Port configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x0 22.--23. "MODE11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "MODE9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "MODE7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x0 6.--7. "MODE3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0x0 4.--5. "MODE2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0x0 2.--3. "MODE1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0x0 0.--1. "MODE0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0x4 "GPIOA_OTYPER,GPIO port A output type register"
bitfld.long 0x4 15. "OT15,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 3. "OT3,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 2. "OT2,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 1. "OT1,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 0. "OT0,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOA_OSPEEDR,GPIO port A output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x8 6.--7. "OSPEED3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0x8 4.--5. "OSPEED2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0x8 2.--3. "OSPEED1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0x8 0.--1. "OSPEED0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0xC "GPIOA_PUPDR,GPIO port A pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0xC 6.--7. "PUPD3,Port configuration I/O pin 3" "0,1,2,3"
newline
bitfld.long 0xC 4.--5. "PUPD2,Port configuration I/O pin 2" "0,1,2,3"
bitfld.long 0xC 2.--3. "PUPD1,Port configuration I/O pin 1" "0,1,2,3"
newline
bitfld.long 0xC 0.--1. "PUPD0,Port configuration I/O pin 0" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOA_IDR,GPIO port A input data register"
bitfld.long 0x0 15. "ID15,Port input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port input data I/O pin y" "0,1"
bitfld.long 0x0 12. "ID12,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port input data I/O pin y" "0,1"
bitfld.long 0x0 10. "ID10,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port input data I/O pin y" "0,1"
bitfld.long 0x0 8. "ID8,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port input data I/O pin y" "0,1"
bitfld.long 0x0 6. "ID6,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data I/O pin y" "0,1"
bitfld.long 0x0 3. "ID3,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 2. "ID2,Port input data I/O pin y" "0,1"
bitfld.long 0x0 1. "ID1,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 0. "ID0,Port input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOA_ODR,GPIO port A output data register"
bitfld.long 0x0 15. "OD15,Port output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port output data I/O pin y" "0,1"
bitfld.long 0x0 12. "OD12,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port output data I/O pin y" "0,1"
bitfld.long 0x0 10. "OD10,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port output data I/O pin y" "0,1"
bitfld.long 0x0 8. "OD8,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port output data I/O pin y" "0,1"
bitfld.long 0x0 6. "OD6,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data I/O pin y" "0,1"
bitfld.long 0x0 3. "OD3,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 2. "OD2,Port output data I/O pin y" "0,1"
bitfld.long 0x0 1. "OD1,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 0. "OD0,Port output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOA_BSRR,GPIO port A bit set/reset register"
bitfld.long 0x0 31. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 19. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 18. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 17. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 16. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 15. "BS15,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 14. "BS14,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 13. "BS13,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 12. "BS12,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 11. "BS11,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 10. "BS10,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 9. "BS9,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 8. "BS8,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 7. "BS7,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 6. "BS6,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 5. "BS5,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOA_LCKR,GPIO port A configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 3. "LCK3,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 2. "LCK2,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 1. "LCK1,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 0. "LCK0,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOA_AFRL,GPIO port A alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port I/O pin 7"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port I/O pin 6"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port I/O pin 5"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port I/O pin 3"
newline
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port I/O pin 2"
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port I/O pin 1"
newline
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port I/O pin 0"
line.long 0x8 "GPIOA_AFRH,GPIO port A alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port I/O pin 15"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port I/O pin 14"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port I/O pin 13"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port I/O pin 12"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port I/O pin 11"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port I/O pin 10"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port I/O pin 9"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port I/O pin 8"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOA_BRR,GPIO port A bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 3. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 2. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 1. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 0. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOA_SECCFGR,GPIO port A secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 12. "SEC12,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 11. "SEC11,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 10. "SEC10,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 9. "SEC9,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 8. "SEC8,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 7. "SEC7,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 6. "SEC6,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 5. "SEC5,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 3. "SEC3,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 2. "SEC2,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 1. "SEC1,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 0. "SEC0,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "SEC_GPIOB"
base ad:0x52020400
group.long 0x0++0xF
line.long 0x0 "GPIOB_MODER,GPIO port B mode register"
bitfld.long 0x0 30.--31. "MODE15,Port configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x0 24.--25. "MODE12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x0 22.--23. "MODE11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x0 20.--21. "MODE10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x0 18.--19. "MODE9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x0 16.--17. "MODE8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x0 14.--15. "MODE7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x0 12.--13. "MODE6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x0 10.--11. "MODE5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x0 8.--9. "MODE4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0x0 6.--7. "MODE3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0x0 4.--5. "MODE2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0x0 2.--3. "MODE1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0x0 0.--1. "MODE0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0x4 "GPIOB_OTYPER,GPIO port B output type register"
bitfld.long 0x4 15. "OT15,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 12. "OT12,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 11. "OT11,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 10. "OT10,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 9. "OT9,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 8. "OT8,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 7. "OT7,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 6. "OT6,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 5. "OT5,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 4. "OT4,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 3. "OT3,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 2. "OT2,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 1. "OT1,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 0. "OT0,Port configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOB_OSPEEDR,GPIO port B output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0x8 24.--25. "OSPEED12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0x8 22.--23. "OSPEED11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0x8 20.--21. "OSPEED10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0x8 18.--19. "OSPEED9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0x8 16.--17. "OSPEED8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0x8 14.--15. "OSPEED7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0x8 12.--13. "OSPEED6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0x8 10.--11. "OSPEED5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0x8 8.--9. "OSPEED4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0x8 6.--7. "OSPEED3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0x8 4.--5. "OSPEED2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0x8 2.--3. "OSPEED1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0x8 0.--1. "OSPEED0,Port configuration I/O pin 0" "0,1,2,3"
line.long 0xC "GPIOB_PUPDR,GPIO port B pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port configuration I/O pin 13" "0,1,2,3"
bitfld.long 0xC 24.--25. "PUPD12,Port configuration I/O pin 12" "0,1,2,3"
newline
bitfld.long 0xC 22.--23. "PUPD11,Port configuration I/O pin 11" "0,1,2,3"
bitfld.long 0xC 20.--21. "PUPD10,Port configuration I/O pin 10" "0,1,2,3"
newline
bitfld.long 0xC 18.--19. "PUPD9,Port configuration I/O pin 9" "0,1,2,3"
bitfld.long 0xC 16.--17. "PUPD8,Port configuration I/O pin 8" "0,1,2,3"
newline
bitfld.long 0xC 14.--15. "PUPD7,Port configuration I/O pin 7" "0,1,2,3"
bitfld.long 0xC 12.--13. "PUPD6,Port configuration I/O pin 6" "0,1,2,3"
newline
bitfld.long 0xC 10.--11. "PUPD5,Port configuration I/O pin 5" "0,1,2,3"
bitfld.long 0xC 8.--9. "PUPD4,Port configuration I/O pin 4" "0,1,2,3"
newline
bitfld.long 0xC 6.--7. "PUPD3,Port configuration I/O pin 3" "0,1,2,3"
bitfld.long 0xC 4.--5. "PUPD2,Port configuration I/O pin 2" "0,1,2,3"
newline
bitfld.long 0xC 2.--3. "PUPD1,Port configuration I/O pin 1" "0,1,2,3"
bitfld.long 0xC 0.--1. "PUPD0,Port configuration I/O pin 0" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOB_IDR,GPIO port B input data register"
bitfld.long 0x0 15. "ID15,Port input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port input data I/O pin y" "0,1"
bitfld.long 0x0 12. "ID12,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "ID11,Port input data I/O pin y" "0,1"
bitfld.long 0x0 10. "ID10,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "ID9,Port input data I/O pin y" "0,1"
bitfld.long 0x0 8. "ID8,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "ID7,Port input data I/O pin y" "0,1"
bitfld.long 0x0 6. "ID6,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "ID5,Port input data I/O pin y" "0,1"
bitfld.long 0x0 4. "ID4,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 3. "ID3,Port input data I/O pin y" "0,1"
bitfld.long 0x0 2. "ID2,Port input data I/O pin y" "0,1"
newline
bitfld.long 0x0 1. "ID1,Port input data I/O pin y" "0,1"
bitfld.long 0x0 0. "ID0,Port input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOB_ODR,GPIO port B output data register"
bitfld.long 0x0 15. "OD15,Port output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port output data I/O pin y" "0,1"
bitfld.long 0x0 12. "OD12,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 11. "OD11,Port output data I/O pin y" "0,1"
bitfld.long 0x0 10. "OD10,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 9. "OD9,Port output data I/O pin y" "0,1"
bitfld.long 0x0 8. "OD8,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 7. "OD7,Port output data I/O pin y" "0,1"
bitfld.long 0x0 6. "OD6,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 5. "OD5,Port output data I/O pin y" "0,1"
bitfld.long 0x0 4. "OD4,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 3. "OD3,Port output data I/O pin y" "0,1"
bitfld.long 0x0 2. "OD2,Port output data I/O pin y" "0,1"
newline
bitfld.long 0x0 1. "OD1,Port output data I/O pin y" "0,1"
bitfld.long 0x0 0. "OD0,Port output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOB_BSRR,GPIO port B bit set/reset register"
bitfld.long 0x0 31. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 28. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 27. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 26. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 25. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 24. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 23. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 22. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 21. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 20. "BR4,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 19. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 18. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 17. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 16. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 15. "BS15,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 14. "BS14,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BS13,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 12. "BS12,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BS11,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 10. "BS10,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BS9,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 8. "BS8,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BS7,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 6. "BS6,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BS5,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 4. "BS4,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BS3,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 2. "BS2,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BS1,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 0. "BS0,Port set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0xB
line.long 0x0 "GPIOB_LCKR,GPIO port B configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 12. "LCK12,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 11. "LCK11,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 10. "LCK10,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 9. "LCK9,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 8. "LCK8,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 7. "LCK7,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 6. "LCK6,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 5. "LCK5,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 4. "LCK4,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 3. "LCK3,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 2. "LCK2,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 1. "LCK1,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 0. "LCK0,Port lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOB_AFRL,GPIO port B alternate function low register"
hexmask.long.byte 0x4 28.--31. 1. "AFSEL7,Alternate function selection for port I/O pin 7"
hexmask.long.byte 0x4 24.--27. 1. "AFSEL6,Alternate function selection for port I/O pin 6"
newline
hexmask.long.byte 0x4 20.--23. 1. "AFSEL5,Alternate function selection for port I/O pin 5"
hexmask.long.byte 0x4 16.--19. 1. "AFSEL4,Alternate function selection for port I/O pin 4"
newline
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port I/O pin 3"
hexmask.long.byte 0x4 8.--11. 1. "AFSEL2,Alternate function selection for port I/O pin 2"
newline
hexmask.long.byte 0x4 4.--7. 1. "AFSEL1,Alternate function selection for port I/O pin 1"
hexmask.long.byte 0x4 0.--3. 1. "AFSEL0,Alternate function selection for port I/O pin 0"
line.long 0x8 "GPIOB_AFRH,GPIO port B alternate function high register"
hexmask.long.byte 0x8 28.--31. 1. "AFSEL15,Alternate function selection for port I/O pin 15"
hexmask.long.byte 0x8 24.--27. 1. "AFSEL14,Alternate function selection for port I/O pin 14"
newline
hexmask.long.byte 0x8 20.--23. 1. "AFSEL13,Alternate function selection for port I/O pin 13"
hexmask.long.byte 0x8 16.--19. 1. "AFSEL12,Alternate function selection for port I/O pin 12"
newline
hexmask.long.byte 0x8 12.--15. 1. "AFSEL11,Alternate function selection for port I/O pin 11"
hexmask.long.byte 0x8 8.--11. 1. "AFSEL10,Alternate function selection for port I/O pin 10"
newline
hexmask.long.byte 0x8 4.--7. 1. "AFSEL9,Alternate function selection for port I/O pin 9"
hexmask.long.byte 0x8 0.--3. 1. "AFSEL8,Alternate function selection for port I/O pin 8"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOB_BRR,GPIO port B bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 12. "BR12,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 11. "BR11,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 10. "BR10,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 9. "BR9,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 8. "BR8,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 7. "BR7,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 6. "BR6,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 5. "BR5,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 4. "BR4,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 3. "BR3,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 2. "BR2,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 1. "BR1,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 0. "BR0,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOB_SECCFGR,GPIO port B secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 12. "SEC12,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 11. "SEC11,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 10. "SEC10,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 9. "SEC9,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 8. "SEC8,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 7. "SEC7,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 6. "SEC6,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 5. "SEC5,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 4. "SEC4,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 3. "SEC3,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 2. "SEC2,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 1. "SEC1,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 0. "SEC0,I/O pin of port secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "SEC_GPIOC"
base ad:0x52020800
group.long 0x0++0xF
line.long 0x0 "GPIOC_MODER,GPIO port C mode register"
bitfld.long 0x0 30.--31. "MODE15,Port C configuration I/O pin 15" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
bitfld.long 0x0 28.--29. "MODE14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x0 26.--27. "MODE13,Port C configuration I/O pin 13" "0,1,2,3"
line.long 0x4 "GPIOC_OTYPER,GPIO port C output type register"
bitfld.long 0x4 15. "OT15,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
bitfld.long 0x4 14. "OT14,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
newline
bitfld.long 0x4 13. "OT13,Port C configuration I/O pin y" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOC_OSPEEDR,GPIOC port output speed register"
bitfld.long 0x8 30.--31. "OSPEED15,Port C configuration I/O pin 15" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
bitfld.long 0x8 28.--29. "OSPEED14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0x8 26.--27. "OSPEED13,Port C configuration I/O pin 13" "0,1,2,3"
line.long 0xC "GPIOC_PUPDR,GPIO port C pull-up/pull-down register"
bitfld.long 0xC 30.--31. "PUPD15,Port C configuration I/O pin 15" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
bitfld.long 0xC 28.--29. "PUPD14,Port C configuration I/O pin 14" "0,1,2,3"
newline
bitfld.long 0xC 26.--27. "PUPD13,Port C configuration I/O pin 13" "0,1,2,3"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOC_IDR,GPIO port C input data register"
bitfld.long 0x0 15. "ID15,Port C input data I/O pin y" "0,1"
bitfld.long 0x0 14. "ID14,Port C input data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "ID13,Port C input data I/O pin y" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOC_ODR,GPIO port C output data register"
bitfld.long 0x0 15. "OD15,Port C output data I/O pin y" "0,1"
bitfld.long 0x0 14. "OD14,Port C output data I/O pin y" "0,1"
newline
bitfld.long 0x0 13. "OD13,Port C output data I/O pin y" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOC_BSRR,GPIO port C bit set/reset register"
bitfld.long 0x0 31. "BR15,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 30. "BR14,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
newline
bitfld.long 0x0 29. "BR13,Port C reset I/O pin y" "0: No action on the corresponding ODy bit,1: Resets the corresponding ODy bit"
bitfld.long 0x0 15. "BS15,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
newline
bitfld.long 0x0 14. "BS14,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
bitfld.long 0x0 13. "BS13,Port C set I/O pin y" "0: No action on the corresponding ODy bit,1: Sets the corresponding ODy bit"
group.long 0x1C++0x3
line.long 0x0 "GPIOC_LCKR,GPIO port C configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 15. "LCK15,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
newline
bitfld.long 0x0 14. "LCK14,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
bitfld.long 0x0 13. "LCK13,Port C lock I/O pin y" "0: Port configuration not locked,1: Port configuration locked"
group.long 0x24++0x3
line.long 0x0 "GPIOC_AFRH,GPIO port C alternate function high register"
hexmask.long.byte 0x0 28.--31. 1. "AFSEL15,Alternate function selection for port C I/O pin 15"
hexmask.long.byte 0x0 24.--27. 1. "AFSEL14,Alternate function selection for port C I/O pin 14"
newline
hexmask.long.byte 0x0 20.--23. 1. "AFSEL13,Alternate function selection for port C I/O pin 13"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOC_BRR,GPIO port C bit reset register"
bitfld.long 0x0 15. "BR15,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
bitfld.long 0x0 14. "BR14,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
newline
bitfld.long 0x0 13. "BR13,Port reset I/O pin y" "0: No action on the corresponding ODy bit,1: Reset the corresponding ODy bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOC_SECCFGR,GPIO port C secure configuration register"
bitfld.long 0x0 15. "SEC15,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
bitfld.long 0x0 14. "SEC14,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
newline
bitfld.long 0x0 13. "SEC13,I/O pin of port C secure bit enable y" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree "SEC_GPIOH"
base ad:0x52021C00
group.long 0x0++0xF
line.long 0x0 "GPIOH_MODER,GPIO port H mode register"
bitfld.long 0x0 6.--7. "MODE3,Port H configuration I/O pin 3" "0: Input mode,1: General purpose output mode,2: Alternate function mode,3: Analog mode (reset state)"
line.long 0x4 "GPIOH_OTYPER,GPIO port H output type register"
bitfld.long 0x4 3. "OT3,Port H configuration I/O pin 3" "0: Output push-pull (reset state),1: Output open-drain"
line.long 0x8 "GPIOH_OSPEEDR,GPIO port H output speed register"
bitfld.long 0x8 6.--7. "OSPEED3,Port H configuration I/O pin 3" "0: Low speed,1: Medium speed,2: High speed,3: Reserved"
line.long 0xC "GPIOH_PUPDR,GPIO port H pull-up/pull-down register"
bitfld.long 0xC 6.--7. "PUPD3,Port H configuration I/O pin 3" "0: No pull-up pull-down,1: Pull-up,2: Pull-down,3: Reserved"
rgroup.long 0x10++0x3
line.long 0x0 "GPIOH_IDR,GPIO port H input data register"
bitfld.long 0x0 3. "ID3,Port H input data I/O pin 3" "0,1"
group.long 0x14++0x3
line.long 0x0 "GPIOH_ODR,GPIO port H output data register"
bitfld.long 0x0 3. "OD3,Port H output data I/O pin 3" "0,1"
wgroup.long 0x18++0x3
line.long 0x0 "GPIOH_BSRR,GPIO port H bit set/reset register"
bitfld.long 0x0 19. "BR3,Port H reset I/O pin 3" "0: No action on the corresponding OD3 bit,1: Resets the corresponding OD3 bit"
bitfld.long 0x0 3. "BS3,Port H set I/O pin 3" "0: No action on the corresponding OD3 bit,1: Sets the corresponding OD3 bit"
group.long 0x1C++0x7
line.long 0x0 "GPIOH_LCKR,GPIO port H configuration lock register"
bitfld.long 0x0 16. "LCKK,Lock key" "0: Port configuration lock key not active,1: Port configuration lock key active. The.."
bitfld.long 0x0 3. "LCK3,Port H lock I/O pin 3" "0: Port configuration not locked,1: Port configuration locked"
line.long 0x4 "GPIOH_AFRL,GPIO port H alternate function low register"
hexmask.long.byte 0x4 12.--15. 1. "AFSEL3,Alternate function selection for port H I/O pin 3"
wgroup.long 0x28++0x3
line.long 0x0 "GPIOH_BRR,GPIO port H bit reset register"
bitfld.long 0x0 3. "BR3,Port H reset I/O pin 3" "0: No action on the corresponding OD3 bit,1: Reset the corresponding OD3 bit"
wgroup.long 0x30++0x3
line.long 0x0 "GPIOH_SECCFGR,GPIO port H secure configuration register"
bitfld.long 0x0 3. "SEC3,I/O pin of port H secure bit enable 3" "0: The I/O pin is non-secure,1: The I/O pin is secure. Refer to Table 112 for.."
tree.end
tree.end
tree "GTZC (Global TrustZone Controller)"
base ad:0x0
tree "GTZC1_MPCBB1"
base ad:0x40032C00
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 3. "SPLCK3,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 2. "SPLCK2,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
newline
bitfld.long 0x0 1. "SPLCK1,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0xF
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x4 "GTZC1_MPCBB_SECCFGR1,GTZC1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x8 "GTZC1_MPCBB_SECCFGR2,GTZC1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0xC "GTZC1_MPCBB_SECCFGR3,GTZC1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0xF
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x4 "GTZC1_MPCBB_PRIVCFGR1,GTZC1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x8 "GTZC1_MPCBB_PRIVCFGR2,GTZC1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0xC "GTZC1_MPCBB_PRIVCFGR3,GTZC1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "GTZC1_MPCBB2"
base ad:0x40033000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 3. "SPLCK3,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 2. "SPLCK2,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
newline
bitfld.long 0x0 1. "SPLCK1,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0xF
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x4 "GTZC1_MPCBB_SECCFGR1,GTZC1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x8 "GTZC1_MPCBB_SECCFGR2,GTZC1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0xC "GTZC1_MPCBB_SECCFGR3,GTZC1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0xF
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x4 "GTZC1_MPCBB_PRIVCFGR1,GTZC1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x8 "GTZC1_MPCBB_PRIVCFGR2,GTZC1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0xC "GTZC1_MPCBB_PRIVCFGR3,GTZC1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "GTZC1_MPCBB6"
base ad:0x40034000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0x3
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0x3
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "GTZC1_TZIC"
base ad:0x40032800
group.long 0x0++0xF
line.long 0x0 "GTZC1_TZIC_IER1,TZIC interrupt enable register 1"
bitfld.long 0x0 17. "LPTIM2IE,illegal access interrupt enable for LPTIM2" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 13. "I2C1IE,illegal access interrupt enable for I2C1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 9. "USART2IE,illegal access interrupt enable for USART2" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 7. "IWDGIE,illegal access interrupt enable for IWDG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 6. "WWDGIE,illegal access interrupt enable for WWDG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 1. "TIM3IE,illegal access interrupt enable for TIM3" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 0. "TIM2IE,illegal access interrupt enable for TIM2" "0: interrupt disabled,1: interrupt enabled"
line.long 0x4 "GTZC1_TZIC_IER2,GTZC1 TZIC interrupt enable register 2"
bitfld.long 0x4 24. "ADC4IE,illegal access interrupt enable for ADC4" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 23. "COMPIE,illegal access interrupt enable for COMP" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "LPTIM1IE,illegal access interrupt enable for LPTIM1" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 18. "I2C3IE,illegal access interrupt enable for I2C3" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "LPUART1IE,illegal access interrupt enable for LPUART1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 16. "SPI3IE,illegal access interrupt enable for SPI3" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 6. "TIM17IE,illegal access interrupt enable for TIM17" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "TIM16IE,illegal access interrupt enable for TIM16" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "USART1IE,illegal access interrupt enable for USART1" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 1. "SPI1IE,illegal access interrupt enable for SPI1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 0. "TIM1IE,illegal access interrupt enable for TIM1" "0: interrupt disabled,1: interrupt enabled"
line.long 0x8 "GTZC1_TZIC_IER3,GTZC1 TZIC interrupt enable register 3"
bitfld.long 0x8 23. "RADIOIE,illegal access interrupt enable for 2.4 GHz RADIO" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 22. "RAMCFGIE,illegal access interrupt enable for RAMCFG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 16. "PKAIE,illegal access interrupt enable for PKA" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 15. "HSEMIE,illegal access interrupt enable for HSEM" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 14. "SAESIE,illegal access interrupt enable for SAES" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 13. "RNGIE,illegal access interrupt enable for RNG" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 12. "HASHIE,illegal access interrupt enable for HASH" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 11. "AESIE,illegal access interrupt enable for AES" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 6. "ICACHEIE,illegal access interrupt enable for ICACHE registers" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 4. "TSCIE,illegal access interrupt enable for TSC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 3. "CRCIE,illegal access interrupt enable for CRC" "0: interrupt disabled,1: interrupt enabled"
line.long 0xC "GTZC1_TZIC_IER4,GTZC1 TZIC interrupt enable register 4"
bitfld.long 0xC 31. "MPCBB6IE,illegal access interrupt enable for MPCBB6" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 30. "SRAM6IE,illegal access interrupt enable for 2.4GHz RXTXRAM memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 25. "MPCBB2IE,illegal access interrupt enable for MPCBB2" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 24. "SRAM2IE,illegal access interrupt enable for SRAM2 memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 23. "MPCBB1IE,illegal access interrupt enable for MPCBB1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 22. "SRAM1IE,illegal access interrupt enable for SRAM1 memory" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 15. "TZICIE,illegal access interrupt enable for GTZC1 TZIC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 14. "TZSCIE,illegal access interrupt enable for GTZC1 TZSC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 13. "EXTIIE,illegal access interrupt enable for EXTI" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 11. "RCCIE,illegal access interrupt enable for RCC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 10. "PWRIE,illegal access interrupt enable for PWR" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 9. "TAMPIE,illegal access interrupt enable for TAMP" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 8. "RTCIE,illegal access interrupt enable for RTC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 7. "SYSCFGIE,illegal access interrupt enable for SYSCFG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 2. "FLASH_REGIE,illegal access interrupt enable for FLASH interface" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 1. "FLASHIE,illegal access interrupt enable for FLASH memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 0. "GPDMA1IE,illegal access interrupt enable for GPDMA1" "0: interrupt disabled,1: interrupt enabled"
rgroup.long 0x10++0xF
line.long 0x0 "GTZC1_TZIC_SR1,TZIC status register 1"
bitfld.long 0x0 17. "LPTIM2F,illegal access flag for LPTIM2" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 13. "I2C1F,illegal access flag for I2C1" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 9. "USART2F,illegal access flag for USART2" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x0 7. "IWDGF,illegal access flag for IWDG" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 6. "WWDGF,illegal access flag for WWDG" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 1. "TIM3F,illegal access flag for TIM3" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x0 0. "TIM2F,illegal access flag for TIM2" "0: no illegal access event,1: illegal access event"
line.long 0x4 "GTZC1_TZIC_SR2,TZIC status register 2"
bitfld.long 0x4 24. "ADC4F,ADC4F" "0,1"
bitfld.long 0x4 23. "COMPF,COMPF" "0,1"
bitfld.long 0x4 19. "LPTIM1F,LPTIM1F" "0,1"
newline
bitfld.long 0x4 18. "I2C3F,I2C3F" "0,1"
bitfld.long 0x4 17. "LPUART1F,LPUART1F" "0,1"
bitfld.long 0x4 16. "SPI3F,SPI3F" "0,1"
newline
bitfld.long 0x4 6. "TIM17F,illegal access flag for TIM7" "0,1"
bitfld.long 0x4 5. "TIM16F,illegal access flag for TIM6" "0,1"
bitfld.long 0x4 3. "USART1F,illegal access flag for USART1" "0,1"
newline
bitfld.long 0x4 1. "SPI1F,illegal access flag for SPI1" "0,1"
bitfld.long 0x4 0. "TIM1F,illegal access flag for TIM1" "0,1"
line.long 0x8 "GTZC1_TZIC_SR3,TZIC status register 3"
bitfld.long 0x8 23. "RADIOF,illegal access flag for 2.4 GHz RADIO" "0,1"
bitfld.long 0x8 22. "RAMCFGF,illegal access flag for RAMCFG" "0,1"
bitfld.long 0x8 16. "PKAF,illegal access flag for PKA" "0,1"
newline
bitfld.long 0x8 15. "HSEMF,illegal access flag for HSEM" "0,1"
bitfld.long 0x8 14. "SAESF,illegal access flag for SAES" "0,1"
bitfld.long 0x8 13. "RNGF,illegal access flag for RNG" "0,1"
newline
bitfld.long 0x8 12. "HASHF,illegal access flag for HASH" "0,1"
bitfld.long 0x8 11. "AESF,illegal access flag for AES" "0,1"
bitfld.long 0x8 6. "ICACHEF,illegal access flag for ICACHE registers" "0,1"
newline
bitfld.long 0x8 4. "TSCF,illegal access flag for TSC" "0,1"
bitfld.long 0x8 3. "CRCF,illegal access flag for CRC" "0,1"
line.long 0xC "GTZC1_TZIC_SR4,GTZC1 TZIC status register 4"
bitfld.long 0xC 31. "MPCBB6F,illegal access flag for MPCBB6" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 30. "SRAM6F,illegal access flag for 2.4 GHZ RADIO RXTXRAM memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 25. "MPCBB2F,illegal access flag for MPCBB2" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 24. "SRAM2F,illegal access flag for SRAM2 memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 23. "MPCBB1F,illegal access flag for MPCBB1" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 22. "SRAM1F,illegal access flag for SRAM1 memory" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 15. "TZICF,illegal access flag for GTZC1 TZIC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 14. "TZSCF,illegal access flag for GTZC1 TZSC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 13. "EXTIF,illegal access flag for EXTI" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 11. "RCCF,illegal access flag for RCC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 10. "PWRF,illegal access flag for PWR" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 9. "TAMPF,illegal access flag for TAMP" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 8. "RTCF,illegal access flag for RTC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 7. "SYSCFGF,illegal access flag for SYSCFG" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 2. "FLASH_REGF,illegal access flag for FLASH interface" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 1. "FLASHF,illegal access flag for FLASH memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 0. "GPDMA1F,illegal access flag for GPDMA1" "0: no illegal access event,1: illegal access event"
wgroup.long 0x20++0xF
line.long 0x0 "GTZC1_TZIC_FCR1,TZIC flag clear register 1"
bitfld.long 0x0 17. "CLPTIM2F,clear the illegal access flag for LPTIM2" "0,1"
bitfld.long 0x0 13. "CI2C1F,clear the illegal access flag for I2C1" "0,1"
bitfld.long 0x0 9. "CUSART2F,clear the illegal access flag for USART2" "0,1"
newline
bitfld.long 0x0 7. "CIWDGF,clear the illegal access flag for IWDG" "0,1"
bitfld.long 0x0 6. "CWWDGF,clear the illegal access flag for WWDG" "0,1"
bitfld.long 0x0 1. "CTIM3F,clear the illegal access flag for TIM3" "0,1"
newline
bitfld.long 0x0 0. "CTIM2F,clear the illegal access flag for TIM2" "0,1"
line.long 0x4 "GTZC1_TZIC_FCR2,TZIC flag clear register 2"
bitfld.long 0x4 24. "CADC4F,clear the illegal access flag for ADC4" "0,1"
bitfld.long 0x4 23. "CCOMPF,iclear the illegal access flag for COMP" "0,1"
bitfld.long 0x4 19. "CLPTIM1F,clear the illegal access flag for LPTIM1" "0,1"
newline
bitfld.long 0x4 18. "CI2C3F,clear the illegal access flag for I2C3" "0,1"
bitfld.long 0x4 17. "CLPUART1F,clear the illegal access flag for LPUART1" "0,1"
bitfld.long 0x4 16. "CSPI3F,clear the illegal access flag for SPI3" "0,1"
newline
bitfld.long 0x4 6. "CTIM17F,clear the illegal access flag for TIM7" "0,1"
bitfld.long 0x4 5. "CTIM16F,clear the illegal access flag for TIM6" "0,1"
bitfld.long 0x4 3. "CUSART1F,clear the illegal access flag for USART1" "0,1"
newline
bitfld.long 0x4 1. "CSPI1F,clear the illegal access flag for SPI1" "0,1"
bitfld.long 0x4 0. "CTIM1F,clear the illegal access flag for TIM1" "0,1"
line.long 0x8 "GTZC1_TZIC_FCR3,TZIC flag clear register 3"
bitfld.long 0x8 23. "CRADIOF,clear the illegal access flag for 2.4 GHz RADIO" "0,1"
bitfld.long 0x8 22. "CRAMCFGF,clear the illegal access flag for RAMCFG" "0,1"
bitfld.long 0x8 16. "CPKAF,clear the illegal access flag for PKA" "0,1"
newline
bitfld.long 0x8 15. "CHSEMF,clear the illegal access flag for HSEM" "0,1"
bitfld.long 0x8 14. "CSAESF,clear the illegal access flag for SAES" "0,1"
bitfld.long 0x8 13. "CRNGF,clear the illegal access flag for RNG" "0,1"
newline
bitfld.long 0x8 12. "CHASHF,clear the illegal access flag for HASH" "0,1"
bitfld.long 0x8 11. "CAESF,clear the illegal access flag for AES" "0,1"
bitfld.long 0x8 6. "CICACHEF,clear the illegal access flag for ICACHE registers" "0,1"
newline
bitfld.long 0x8 4. "CTSCF,clear the illegal access flag for TSC" "0,1"
bitfld.long 0x8 3. "CCRCF,clear the illegal access flag for CRC" "0,1"
line.long 0xC "GTZC1_TZIC_FCR4,GTZC1 TZIC flag clear register 4"
bitfld.long 0xC 31. "CMPCBB6F,clear the illegal access flag for MPCBB6" "0: no action,1: status flag cleared"
bitfld.long 0xC 30. "CSRAM6F,clear the illegal access flag for 2.4 GHz RADIO RXTXRAM memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 25. "CMPCBB2F,clear the illegal access flag for MPCBB2" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 24. "CSRAM2F,clear the illegal access flag for SRAM2 memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 23. "CMPCBB1F,clear the illegal access flag for MPCBB1" "0: no action,1: status flag cleared"
bitfld.long 0xC 22. "CSRAM1F,clear the illegal access flag for SRAM1 memory" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 15. "CTZICF,clear the illegal access flag for GTZC1 TZIC" "0: no action,1: status flag cleared"
bitfld.long 0xC 14. "CTZSCF,clear the illegal access flag for GTZC1 TZSC" "0: no action,1: status flag cleared"
bitfld.long 0xC 13. "CEXTIF,clear the illegal access flag for EXTI" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 11. "CRCCF,clear the illegal access flag for RCC" "0: no action,1: status flag cleared"
bitfld.long 0xC 10. "CPWRF,clear the illegal access flag for PWR" "0: no action,1: status flag cleared"
bitfld.long 0xC 9. "CTAMPF,clear the illegal access flag for TAMP" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 8. "CRTCF,clear the illegal access flag for RTC" "0: no action,1: status flag cleared"
bitfld.long 0xC 7. "CSYSCFGF,clear the illegal access flag for SYSCFG" "0: no action,1: status flag cleared"
bitfld.long 0xC 2. "CFLASH_REGF,clear the illegal access flag for FLASH interface" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 1. "CFLASHF,clear the illegal access flag for FLASH memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 0. "CGPDMA1F,clear the illegal access flag for GPDMA1" "0: no action,1: status flag cleared"
tree.end
tree "GTZC1_TZSC"
base ad:0x40032400
group.long 0x0++0x3
line.long 0x0 "GTZC1_TZSC_CR,GTZC1 TZSC control register"
bitfld.long 0x0 0. "LCK,lock the configuration of GTZC1_TZSC_SECCFGRn and GTZC1_TZSC_PRIVCFGRn registers until next reset" "0: configuration of all GTZC1_TZSC_SECCFGRn and..,1: configuration of all GTZC1_TZSC_SECCFGRn and.."
group.long 0x10++0xB
line.long 0x0 "GTZC1_TZSC_SECCFGR1,GTZC1 TZSC secure configuration register 1"
bitfld.long 0x0 17. "LPTIM2SEC,secure access mode for LPTIM2" "0: non-secure,1: secure"
bitfld.long 0x0 13. "I2C1SEC,secure access mode for I2C1" "0: non-secure,1: secure"
bitfld.long 0x0 9. "USART2SEC,secure access mode for USART2" "0: non-secure,1: secure"
newline
bitfld.long 0x0 7. "IWDGSEC,secure access mode for IWDG" "0: non-secure,1: secure"
bitfld.long 0x0 6. "WWDGSEC,secure access mode for WWDG" "0: non-secure,1: secure"
bitfld.long 0x0 1. "TIM3SEC,secure access mode for TIM3" "0: non-secure,1: secure"
newline
bitfld.long 0x0 0. "TIM2SEC,secure access mode for TIM2" "0: non-secure,1: secure"
line.long 0x4 "GTZC1_TZSC_SECCFGR2,GTZC1 TZSC secure configuration register 2"
bitfld.long 0x4 24. "ADC4SEC,secure access mode for ADC4" "0: non-secure,1: secure"
bitfld.long 0x4 23. "COMPSEC,secure access mode for COMP" "0: non-secure,1: secure"
bitfld.long 0x4 19. "LPTIM1SEC,secure access mode for LPTIM1" "0: non-secure,1: secure"
newline
bitfld.long 0x4 18. "I2C3SEC,secure access mode for I2C3" "0: non-secure,1: secure"
bitfld.long 0x4 17. "LPUART1SEC,secure access mode for LPUART1" "0: non-secure,1: secure"
bitfld.long 0x4 16. "SPI3SEC,secure access mode for SPI3" "0: non-secure,1: secure"
newline
bitfld.long 0x4 6. "TIM17SEC,secure access mode for TIM17" "0: non-secure,1: secure"
bitfld.long 0x4 5. "TIM16SEC,secure access mode for TIM16" "0: non-secure,1: secure"
bitfld.long 0x4 3. "USART1SEC,secure access mode for USART1" "0: non-secure,1: secure"
newline
bitfld.long 0x4 1. "SPI1SEC,secure access mode for SPI1" "0: non-secure,1: secure"
bitfld.long 0x4 0. "TIM1SEC,secure access mode for TIM1" "0: non-secure,1: secure"
line.long 0x8 "GTZC1_TZSC_SECCFGR3,GTZC1 TZSC secure configuration register 3"
bitfld.long 0x8 23. "RADIOSEC,secure access mode for 2.4 GHz RADIO" "0: non-secure,1: secure"
bitfld.long 0x8 22. "RAMCFGSEC,secure access mode for RAMCFG" "0: non-secure,1: secure"
bitfld.long 0x8 16. "PKASEC,secure access mode for PKA" "0: non-secure,1: secure"
newline
bitfld.long 0x8 14. "SAESSEC,secure access mode for SAES" "0: non-secure,1: secure"
bitfld.long 0x8 13. "RNGSEC,secure access mode for RNG" "0: non-secure,1: secure"
bitfld.long 0x8 12. "HASHSEC,secure access mode for HASH" "0: non-secure,1: secure"
newline
bitfld.long 0x8 11. "AESSEC,secure access mode for AES" "0: non-secure,1: secure"
bitfld.long 0x8 6. "ICACHE_REGSEC,secure access mode for ICACHE registers" "0: non-secure,1: secure"
bitfld.long 0x8 4. "TSCSEC,secure access mode for TSC" "0: non-secure,1: secure"
newline
bitfld.long 0x8 3. "CRCSEC,secure access mode for CRC" "0: non-secure,1: secure"
group.long 0x20++0xB
line.long 0x0 "GTZC1_TZSC_PRIVCFGR1,GTZC1 TZSC privilege configuration register 1"
bitfld.long 0x0 17. "LPTIM2PRIV,privileged access mode for LPTIM2" "0: unprivileged,1: privileged"
bitfld.long 0x0 13. "I2C1PRIV,privileged access mode for I2C1" "0: unprivileged,1: privileged"
bitfld.long 0x0 9. "USART2PRIV,privileged access mode for USART2" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 7. "IWDGPRIV,privileged access mode for IWDG" "0: unprivileged,1: privileged"
bitfld.long 0x0 6. "WWDGPRIV,privileged access mode for WWDG" "0: unprivileged,1: privileged"
bitfld.long 0x0 1. "TIM3PRIV,privileged access mode for TIM3" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 0. "TIM2PRIV,privileged access mode for TIM2" "0: unprivileged,1: privileged"
line.long 0x4 "GTZC1_TZSC_PRIVCFGR2,GTZC1 TZSC privilege configuration register 2"
bitfld.long 0x4 24. "ADC4PRIV,privileged access mode for ADC4" "0: unprivileged,1: privileged"
bitfld.long 0x4 23. "COMPPRIV,privileged access mode for COMP" "0: unprivileged,1: privileged"
bitfld.long 0x4 19. "LPTIM1PRIV,privileged access mode for LPTIM1" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 18. "I2C3PRIV,privileged access mode for I2C3" "0: unprivileged,1: privileged"
bitfld.long 0x4 17. "LPUART1PRIV,privileged access mode for LPUART1" "0: unprivileged,1: privileged"
bitfld.long 0x4 16. "SPI3PRIV,privileged access mode for SPI3" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 6. "TIM17PRIV,privileged access mode for TIM17" "0: unprivileged,1: privileged"
bitfld.long 0x4 5. "TIM16PRIV,privileged access mode for TIM16" "0: unprivileged,1: privileged"
bitfld.long 0x4 3. "USART1PRIV,privileged access mode for USART1" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "SPI1PRIV,privileged access mode for SPI1PRIV" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "TIM1PRIV,privileged access mode for TIM1" "0: unprivileged,1: privileged"
line.long 0x8 "GTZC1_TZSC_PRIVCFGR3,GTZC1 TZSC privilege configuration register 3"
bitfld.long 0x8 23. "RADIOPRIV,privileged access mode for 2.4 GHz RADIO" "0: unprivileged,1: privileged"
bitfld.long 0x8 22. "RAMCFGPRIV,privileged access mode for RAMCFG" "0: unprivileged,1: privileged"
bitfld.long 0x8 16. "PKAPRIV,privileged access mode for PKA" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 14. "SAESPRIV,privileged access mode for SAES" "0: unprivileged,1: privileged"
bitfld.long 0x8 13. "RNGPRIV,privileged access mode for RNG" "0: unprivileged,1: privileged"
bitfld.long 0x8 12. "HASHPRIV,privileged access mode for HASH" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 11. "AESPRIV,privileged access mode for AES" "0: unprivileged,1: privileged"
bitfld.long 0x8 6. "ICACHE_REGPRIV,privileged access mode for ICACHE registers" "0: unprivileged,1: privileged"
bitfld.long 0x8 4. "TSCPRIV,privileged access mode for TSC" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 3. "CRCPRIV,privileged access mode for CRC" "0: unprivileged,1: privileged"
tree.end
tree "SEC_GTZC1_MPCBB1"
base ad:0x50032C00
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 3. "SPLCK3,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 2. "SPLCK2,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
newline
bitfld.long 0x0 1. "SPLCK1,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0xF
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x4 "GTZC1_MPCBB_SECCFGR1,GTZC1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x8 "GTZC1_MPCBB_SECCFGR2,GTZC1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0xC "GTZC1_MPCBB_SECCFGR3,GTZC1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0xF
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x4 "GTZC1_MPCBB_PRIVCFGR1,GTZC1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x8 "GTZC1_MPCBB_PRIVCFGR2,GTZC1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0xC "GTZC1_MPCBB_PRIVCFGR3,GTZC1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "SEC_GTZC1_MPCBB2"
base ad:0x50033000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 3. "SPLCK3,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 2. "SPLCK2,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
newline
bitfld.long 0x0 1. "SPLCK1,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0xF
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x4 "GTZC1_MPCBB_SECCFGR1,GTZC1 MPCBB security configuration for super-block 1 register"
bitfld.long 0x4 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x4 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x4 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0x8 "GTZC1_MPCBB_SECCFGR2,GTZC1 MPCBB security configuration for super-block 2 register"
bitfld.long 0x8 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x8 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x8 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
line.long 0xC "GTZC1_MPCBB_SECCFGR3,GTZC1 MPCBB security configuration for super-block 3 register"
bitfld.long 0xC 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0xC 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0xC 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0xF
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x4 "GTZC1_MPCBB_PRIVCFGR1,GTZC1 MPCBB privileged configuration for super-block 1 register"
bitfld.long 0x4 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x4 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x4 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0x8 "GTZC1_MPCBB_PRIVCFGR2,GTZC1 MPCBB privileged configuration for super-block 2 register"
bitfld.long 0x8 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x8 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x8 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
line.long 0xC "GTZC1_MPCBB_PRIVCFGR3,GTZC1 MPCBB privileged configuration for super-block 3 register"
bitfld.long 0xC 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0xC 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0xC 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "SEC_GTZC1_MPCBB6"
base ad:0x50034000
group.long 0x0++0x3
line.long 0x0 "GTZC1_MPCBB_CR,MPCBB control register"
bitfld.long 0x0 31. "SRWILADIS,secure read/write illegal access disable;" "0: enabled secure read/write acces not allowed on..,1: disabled secure read/write access allowed on.."
bitfld.long 0x0 30. "INVSECSTATE,SRAM clocks security state;" "0: SRAM clock is secured if a secure area exists in..,1: SRAM clock is non-secure even if a secure area.."
newline
bitfld.long 0x0 0. "GLOCK,lock the control register of the MPCBB until next reset;" "0: control register not locked,1: control register locked"
group.long 0x10++0x3
line.long 0x0 "GTZC1_MPCBB_CFGLOCK,GTZC1 SRAMz MPCBB configuration lock register"
bitfld.long 0x0 0. "SPLCK0,Security/privilege configuration lock super-block;" "0: GTZC1_MPCBB_SECCFGRn and GTZC1_MPCBB_PRIVCFGRn..,1: Writes to GTZC1_MPCBB_SECCFGRn and.."
group.long 0x100++0x3
line.long 0x0 "GTZC1_MPCBB_SECCFGR0,GTZC1 MPCBB security configuration for super-block 0 register"
bitfld.long 0x0 31. "SEC31,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 30. "SEC30,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 29. "SEC29,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 28. "SEC28,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 27. "SEC27,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 26. "SEC26,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 25. "SEC25,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 24. "SEC24,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 23. "SEC23,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 22. "SEC22,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 21. "SEC21,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 20. "SEC20,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 19. "SEC19,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 18. "SEC18,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 17. "SEC17,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 16. "SEC16,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 15. "SEC15,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 14. "SEC14,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 13. "SEC13,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 12. "SEC12,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 11. "SEC11,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 10. "SEC10,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 9. "SEC9,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 8. "SEC8,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 7. "SEC7,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 6. "SEC6,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 5. "SEC5,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 4. "SEC4,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 3. "SEC3,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 2. "SEC2,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
newline
bitfld.long 0x0 1. "SEC1,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
bitfld.long 0x0 0. "SEC0,Security configuration for block y (y = 0 to 31) in super block n" "0: Non-secure access,1: Secure access"
group.long 0x200++0x3
line.long 0x0 "GTZC1_MPCBB_PRIVCFGR0,GTZC1 MPCBB privileged configuration for super-block 0 register"
bitfld.long 0x0 31. "PRIV31,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 30. "PRIV30,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 29. "PRIV29,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 28. "PRIV28,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 27. "PRIV27,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 26. "PRIV26,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 25. "PRIV25,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 24. "PRIV24,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 23. "PRIV23,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 22. "PRIV22,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 21. "PRIV21,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 20. "PRIV20,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 19. "PRIV19,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 18. "PRIV18,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 17. "PRIV17,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 16. "PRIV16,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 15. "PRIV15,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 14. "PRIV14,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 13. "PRIV13,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 12. "PRIV12,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 11. "PRIV11,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 10. "PRIV10,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 9. "PRIV9,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 8. "PRIV8,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 7. "PRIV7,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 6. "PRIV6,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 5. "PRIV5,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 4. "PRIV4,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 3. "PRIV3,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 2. "PRIV2,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
newline
bitfld.long 0x0 1. "PRIV1,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
bitfld.long 0x0 0. "PRIV0,Privileged configuration for block y (y = 0 to 31)  belonging to super-block n." "0: Privileged and unprivileged access,1: Only privileged access"
tree.end
tree "SEC_GTZC1_TZIC"
base ad:0x50032800
group.long 0x0++0xF
line.long 0x0 "GTZC1_TZIC_IER1,TZIC interrupt enable register 1"
bitfld.long 0x0 17. "LPTIM2IE,illegal access interrupt enable for LPTIM2" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 13. "I2C1IE,illegal access interrupt enable for I2C1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 9. "USART2IE,illegal access interrupt enable for USART2" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 7. "IWDGIE,illegal access interrupt enable for IWDG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 6. "WWDGIE,illegal access interrupt enable for WWDG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x0 1. "TIM3IE,illegal access interrupt enable for TIM3" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x0 0. "TIM2IE,illegal access interrupt enable for TIM2" "0: interrupt disabled,1: interrupt enabled"
line.long 0x4 "GTZC1_TZIC_IER2,GTZC1 TZIC interrupt enable register 2"
bitfld.long 0x4 24. "ADC4IE,illegal access interrupt enable for ADC4" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 23. "COMPIE,illegal access interrupt enable for COMP" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 19. "LPTIM1IE,illegal access interrupt enable for LPTIM1" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 18. "I2C3IE,illegal access interrupt enable for I2C3" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 17. "LPUART1IE,illegal access interrupt enable for LPUART1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 16. "SPI3IE,illegal access interrupt enable for SPI3" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 6. "TIM17IE,illegal access interrupt enable for TIM17" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 5. "TIM16IE,illegal access interrupt enable for TIM16" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 3. "USART1IE,illegal access interrupt enable for USART1" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x4 1. "SPI1IE,illegal access interrupt enable for SPI1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x4 0. "TIM1IE,illegal access interrupt enable for TIM1" "0: interrupt disabled,1: interrupt enabled"
line.long 0x8 "GTZC1_TZIC_IER3,GTZC1 TZIC interrupt enable register 3"
bitfld.long 0x8 23. "RADIOIE,illegal access interrupt enable for 2.4 GHz RADIO" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 22. "RAMCFGIE,illegal access interrupt enable for RAMCFG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 16. "PKAIE,illegal access interrupt enable for PKA" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 15. "HSEMIE,illegal access interrupt enable for HSEM" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 14. "SAESIE,illegal access interrupt enable for SAES" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 13. "RNGIE,illegal access interrupt enable for RNG" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 12. "HASHIE,illegal access interrupt enable for HASH" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 11. "AESIE,illegal access interrupt enable for AES" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 6. "ICACHEIE,illegal access interrupt enable for ICACHE registers" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0x8 4. "TSCIE,illegal access interrupt enable for TSC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0x8 3. "CRCIE,illegal access interrupt enable for CRC" "0: interrupt disabled,1: interrupt enabled"
line.long 0xC "GTZC1_TZIC_IER4,GTZC1 TZIC interrupt enable register 4"
bitfld.long 0xC 31. "MPCBB6IE,illegal access interrupt enable for MPCBB6" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 30. "SRAM6IE,illegal access interrupt enable for 2.4GHz RXTXRAM memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 25. "MPCBB2IE,illegal access interrupt enable for MPCBB2" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 24. "SRAM2IE,illegal access interrupt enable for SRAM2 memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 23. "MPCBB1IE,illegal access interrupt enable for MPCBB1" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 22. "SRAM1IE,illegal access interrupt enable for SRAM1 memory" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 15. "TZICIE,illegal access interrupt enable for GTZC1 TZIC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 14. "TZSCIE,illegal access interrupt enable for GTZC1 TZSC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 13. "EXTIIE,illegal access interrupt enable for EXTI" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 11. "RCCIE,illegal access interrupt enable for RCC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 10. "PWRIE,illegal access interrupt enable for PWR" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 9. "TAMPIE,illegal access interrupt enable for TAMP" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 8. "RTCIE,illegal access interrupt enable for RTC" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 7. "SYSCFGIE,illegal access interrupt enable for SYSCFG" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 2. "FLASH_REGIE,illegal access interrupt enable for FLASH interface" "0: interrupt disabled,1: interrupt enabled"
newline
bitfld.long 0xC 1. "FLASHIE,illegal access interrupt enable for FLASH memory" "0: interrupt disabled,1: interrupt enabled"
bitfld.long 0xC 0. "GPDMA1IE,illegal access interrupt enable for GPDMA1" "0: interrupt disabled,1: interrupt enabled"
rgroup.long 0x10++0xF
line.long 0x0 "GTZC1_TZIC_SR1,TZIC status register 1"
bitfld.long 0x0 17. "LPTIM2F,illegal access flag for LPTIM2" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 13. "I2C1F,illegal access flag for I2C1" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 9. "USART2F,illegal access flag for USART2" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x0 7. "IWDGF,illegal access flag for IWDG" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 6. "WWDGF,illegal access flag for WWDG" "0: no illegal access event,1: illegal access event"
bitfld.long 0x0 1. "TIM3F,illegal access flag for TIM3" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0x0 0. "TIM2F,illegal access flag for TIM2" "0: no illegal access event,1: illegal access event"
line.long 0x4 "GTZC1_TZIC_SR2,TZIC status register 2"
bitfld.long 0x4 24. "ADC4F,ADC4F" "0,1"
bitfld.long 0x4 23. "COMPF,COMPF" "0,1"
bitfld.long 0x4 19. "LPTIM1F,LPTIM1F" "0,1"
newline
bitfld.long 0x4 18. "I2C3F,I2C3F" "0,1"
bitfld.long 0x4 17. "LPUART1F,LPUART1F" "0,1"
bitfld.long 0x4 16. "SPI3F,SPI3F" "0,1"
newline
bitfld.long 0x4 6. "TIM17F,illegal access flag for TIM7" "0,1"
bitfld.long 0x4 5. "TIM16F,illegal access flag for TIM6" "0,1"
bitfld.long 0x4 3. "USART1F,illegal access flag for USART1" "0,1"
newline
bitfld.long 0x4 1. "SPI1F,illegal access flag for SPI1" "0,1"
bitfld.long 0x4 0. "TIM1F,illegal access flag for TIM1" "0,1"
line.long 0x8 "GTZC1_TZIC_SR3,TZIC status register 3"
bitfld.long 0x8 23. "RADIOF,illegal access flag for 2.4 GHz RADIO" "0,1"
bitfld.long 0x8 22. "RAMCFGF,illegal access flag for RAMCFG" "0,1"
bitfld.long 0x8 16. "PKAF,illegal access flag for PKA" "0,1"
newline
bitfld.long 0x8 15. "HSEMF,illegal access flag for HSEM" "0,1"
bitfld.long 0x8 14. "SAESF,illegal access flag for SAES" "0,1"
bitfld.long 0x8 13. "RNGF,illegal access flag for RNG" "0,1"
newline
bitfld.long 0x8 12. "HASHF,illegal access flag for HASH" "0,1"
bitfld.long 0x8 11. "AESF,illegal access flag for AES" "0,1"
bitfld.long 0x8 6. "ICACHEF,illegal access flag for ICACHE registers" "0,1"
newline
bitfld.long 0x8 4. "TSCF,illegal access flag for TSC" "0,1"
bitfld.long 0x8 3. "CRCF,illegal access flag for CRC" "0,1"
line.long 0xC "GTZC1_TZIC_SR4,GTZC1 TZIC status register 4"
bitfld.long 0xC 31. "MPCBB6F,illegal access flag for MPCBB6" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 30. "SRAM6F,illegal access flag for 2.4 GHZ RADIO RXTXRAM memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 25. "MPCBB2F,illegal access flag for MPCBB2" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 24. "SRAM2F,illegal access flag for SRAM2 memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 23. "MPCBB1F,illegal access flag for MPCBB1" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 22. "SRAM1F,illegal access flag for SRAM1 memory" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 15. "TZICF,illegal access flag for GTZC1 TZIC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 14. "TZSCF,illegal access flag for GTZC1 TZSC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 13. "EXTIF,illegal access flag for EXTI" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 11. "RCCF,illegal access flag for RCC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 10. "PWRF,illegal access flag for PWR" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 9. "TAMPF,illegal access flag for TAMP" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 8. "RTCF,illegal access flag for RTC" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 7. "SYSCFGF,illegal access flag for SYSCFG" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 2. "FLASH_REGF,illegal access flag for FLASH interface" "0: no illegal access event,1: illegal access event"
newline
bitfld.long 0xC 1. "FLASHF,illegal access flag for FLASH memory" "0: no illegal access event,1: illegal access event"
bitfld.long 0xC 0. "GPDMA1F,illegal access flag for GPDMA1" "0: no illegal access event,1: illegal access event"
wgroup.long 0x20++0xF
line.long 0x0 "GTZC1_TZIC_FCR1,TZIC flag clear register 1"
bitfld.long 0x0 17. "CLPTIM2F,clear the illegal access flag for LPTIM2" "0,1"
bitfld.long 0x0 13. "CI2C1F,clear the illegal access flag for I2C1" "0,1"
bitfld.long 0x0 9. "CUSART2F,clear the illegal access flag for USART2" "0,1"
newline
bitfld.long 0x0 7. "CIWDGF,clear the illegal access flag for IWDG" "0,1"
bitfld.long 0x0 6. "CWWDGF,clear the illegal access flag for WWDG" "0,1"
bitfld.long 0x0 1. "CTIM3F,clear the illegal access flag for TIM3" "0,1"
newline
bitfld.long 0x0 0. "CTIM2F,clear the illegal access flag for TIM2" "0,1"
line.long 0x4 "GTZC1_TZIC_FCR2,TZIC flag clear register 2"
bitfld.long 0x4 24. "CADC4F,clear the illegal access flag for ADC4" "0,1"
bitfld.long 0x4 23. "CCOMPF,iclear the illegal access flag for COMP" "0,1"
bitfld.long 0x4 19. "CLPTIM1F,clear the illegal access flag for LPTIM1" "0,1"
newline
bitfld.long 0x4 18. "CI2C3F,clear the illegal access flag for I2C3" "0,1"
bitfld.long 0x4 17. "CLPUART1F,clear the illegal access flag for LPUART1" "0,1"
bitfld.long 0x4 16. "CSPI3F,clear the illegal access flag for SPI3" "0,1"
newline
bitfld.long 0x4 6. "CTIM17F,clear the illegal access flag for TIM7" "0,1"
bitfld.long 0x4 5. "CTIM16F,clear the illegal access flag for TIM6" "0,1"
bitfld.long 0x4 3. "CUSART1F,clear the illegal access flag for USART1" "0,1"
newline
bitfld.long 0x4 1. "CSPI1F,clear the illegal access flag for SPI1" "0,1"
bitfld.long 0x4 0. "CTIM1F,clear the illegal access flag for TIM1" "0,1"
line.long 0x8 "GTZC1_TZIC_FCR3,TZIC flag clear register 3"
bitfld.long 0x8 23. "CRADIOF,clear the illegal access flag for 2.4 GHz RADIO" "0,1"
bitfld.long 0x8 22. "CRAMCFGF,clear the illegal access flag for RAMCFG" "0,1"
bitfld.long 0x8 16. "CPKAF,clear the illegal access flag for PKA" "0,1"
newline
bitfld.long 0x8 15. "CHSEMF,clear the illegal access flag for HSEM" "0,1"
bitfld.long 0x8 14. "CSAESF,clear the illegal access flag for SAES" "0,1"
bitfld.long 0x8 13. "CRNGF,clear the illegal access flag for RNG" "0,1"
newline
bitfld.long 0x8 12. "CHASHF,clear the illegal access flag for HASH" "0,1"
bitfld.long 0x8 11. "CAESF,clear the illegal access flag for AES" "0,1"
bitfld.long 0x8 6. "CICACHEF,clear the illegal access flag for ICACHE registers" "0,1"
newline
bitfld.long 0x8 4. "CTSCF,clear the illegal access flag for TSC" "0,1"
bitfld.long 0x8 3. "CCRCF,clear the illegal access flag for CRC" "0,1"
line.long 0xC "GTZC1_TZIC_FCR4,GTZC1 TZIC flag clear register 4"
bitfld.long 0xC 31. "CMPCBB6F,clear the illegal access flag for MPCBB6" "0: no action,1: status flag cleared"
bitfld.long 0xC 30. "CSRAM6F,clear the illegal access flag for 2.4 GHz RADIO RXTXRAM memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 25. "CMPCBB2F,clear the illegal access flag for MPCBB2" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 24. "CSRAM2F,clear the illegal access flag for SRAM2 memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 23. "CMPCBB1F,clear the illegal access flag for MPCBB1" "0: no action,1: status flag cleared"
bitfld.long 0xC 22. "CSRAM1F,clear the illegal access flag for SRAM1 memory" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 15. "CTZICF,clear the illegal access flag for GTZC1 TZIC" "0: no action,1: status flag cleared"
bitfld.long 0xC 14. "CTZSCF,clear the illegal access flag for GTZC1 TZSC" "0: no action,1: status flag cleared"
bitfld.long 0xC 13. "CEXTIF,clear the illegal access flag for EXTI" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 11. "CRCCF,clear the illegal access flag for RCC" "0: no action,1: status flag cleared"
bitfld.long 0xC 10. "CPWRF,clear the illegal access flag for PWR" "0: no action,1: status flag cleared"
bitfld.long 0xC 9. "CTAMPF,clear the illegal access flag for TAMP" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 8. "CRTCF,clear the illegal access flag for RTC" "0: no action,1: status flag cleared"
bitfld.long 0xC 7. "CSYSCFGF,clear the illegal access flag for SYSCFG" "0: no action,1: status flag cleared"
bitfld.long 0xC 2. "CFLASH_REGF,clear the illegal access flag for FLASH interface" "0: no action,1: status flag cleared"
newline
bitfld.long 0xC 1. "CFLASHF,clear the illegal access flag for FLASH memory" "0: no action,1: status flag cleared"
bitfld.long 0xC 0. "CGPDMA1F,clear the illegal access flag for GPDMA1" "0: no action,1: status flag cleared"
tree.end
tree "SEC_GTZC1_TZSC"
base ad:0x50032400
group.long 0x0++0x3
line.long 0x0 "GTZC1_TZSC_CR,GTZC1 TZSC control register"
bitfld.long 0x0 0. "LCK,lock the configuration of GTZC1_TZSC_SECCFGRn and GTZC1_TZSC_PRIVCFGRn registers until next reset" "0: configuration of all GTZC1_TZSC_SECCFGRn and..,1: configuration of all GTZC1_TZSC_SECCFGRn and.."
group.long 0x10++0xB
line.long 0x0 "GTZC1_TZSC_SECCFGR1,GTZC1 TZSC secure configuration register 1"
bitfld.long 0x0 17. "LPTIM2SEC,secure access mode for LPTIM2" "0: non-secure,1: secure"
bitfld.long 0x0 13. "I2C1SEC,secure access mode for I2C1" "0: non-secure,1: secure"
bitfld.long 0x0 9. "USART2SEC,secure access mode for USART2" "0: non-secure,1: secure"
newline
bitfld.long 0x0 7. "IWDGSEC,secure access mode for IWDG" "0: non-secure,1: secure"
bitfld.long 0x0 6. "WWDGSEC,secure access mode for WWDG" "0: non-secure,1: secure"
bitfld.long 0x0 1. "TIM3SEC,secure access mode for TIM3" "0: non-secure,1: secure"
newline
bitfld.long 0x0 0. "TIM2SEC,secure access mode for TIM2" "0: non-secure,1: secure"
line.long 0x4 "GTZC1_TZSC_SECCFGR2,GTZC1 TZSC secure configuration register 2"
bitfld.long 0x4 24. "ADC4SEC,secure access mode for ADC4" "0: non-secure,1: secure"
bitfld.long 0x4 23. "COMPSEC,secure access mode for COMP" "0: non-secure,1: secure"
bitfld.long 0x4 19. "LPTIM1SEC,secure access mode for LPTIM1" "0: non-secure,1: secure"
newline
bitfld.long 0x4 18. "I2C3SEC,secure access mode for I2C3" "0: non-secure,1: secure"
bitfld.long 0x4 17. "LPUART1SEC,secure access mode for LPUART1" "0: non-secure,1: secure"
bitfld.long 0x4 16. "SPI3SEC,secure access mode for SPI3" "0: non-secure,1: secure"
newline
bitfld.long 0x4 6. "TIM17SEC,secure access mode for TIM17" "0: non-secure,1: secure"
bitfld.long 0x4 5. "TIM16SEC,secure access mode for TIM16" "0: non-secure,1: secure"
bitfld.long 0x4 3. "USART1SEC,secure access mode for USART1" "0: non-secure,1: secure"
newline
bitfld.long 0x4 1. "SPI1SEC,secure access mode for SPI1" "0: non-secure,1: secure"
bitfld.long 0x4 0. "TIM1SEC,secure access mode for TIM1" "0: non-secure,1: secure"
line.long 0x8 "GTZC1_TZSC_SECCFGR3,GTZC1 TZSC secure configuration register 3"
bitfld.long 0x8 23. "RADIOSEC,secure access mode for 2.4 GHz RADIO" "0: non-secure,1: secure"
bitfld.long 0x8 22. "RAMCFGSEC,secure access mode for RAMCFG" "0: non-secure,1: secure"
bitfld.long 0x8 16. "PKASEC,secure access mode for PKA" "0: non-secure,1: secure"
newline
bitfld.long 0x8 14. "SAESSEC,secure access mode for SAES" "0: non-secure,1: secure"
bitfld.long 0x8 13. "RNGSEC,secure access mode for RNG" "0: non-secure,1: secure"
bitfld.long 0x8 12. "HASHSEC,secure access mode for HASH" "0: non-secure,1: secure"
newline
bitfld.long 0x8 11. "AESSEC,secure access mode for AES" "0: non-secure,1: secure"
bitfld.long 0x8 6. "ICACHE_REGSEC,secure access mode for ICACHE registers" "0: non-secure,1: secure"
bitfld.long 0x8 4. "TSCSEC,secure access mode for TSC" "0: non-secure,1: secure"
newline
bitfld.long 0x8 3. "CRCSEC,secure access mode for CRC" "0: non-secure,1: secure"
group.long 0x20++0xB
line.long 0x0 "GTZC1_TZSC_PRIVCFGR1,GTZC1 TZSC privilege configuration register 1"
bitfld.long 0x0 17. "LPTIM2PRIV,privileged access mode for LPTIM2" "0: unprivileged,1: privileged"
bitfld.long 0x0 13. "I2C1PRIV,privileged access mode for I2C1" "0: unprivileged,1: privileged"
bitfld.long 0x0 9. "USART2PRIV,privileged access mode for USART2" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 7. "IWDGPRIV,privileged access mode for IWDG" "0: unprivileged,1: privileged"
bitfld.long 0x0 6. "WWDGPRIV,privileged access mode for WWDG" "0: unprivileged,1: privileged"
bitfld.long 0x0 1. "TIM3PRIV,privileged access mode for TIM3" "0: unprivileged,1: privileged"
newline
bitfld.long 0x0 0. "TIM2PRIV,privileged access mode for TIM2" "0: unprivileged,1: privileged"
line.long 0x4 "GTZC1_TZSC_PRIVCFGR2,GTZC1 TZSC privilege configuration register 2"
bitfld.long 0x4 24. "ADC4PRIV,privileged access mode for ADC4" "0: unprivileged,1: privileged"
bitfld.long 0x4 23. "COMPPRIV,privileged access mode for COMP" "0: unprivileged,1: privileged"
bitfld.long 0x4 19. "LPTIM1PRIV,privileged access mode for LPTIM1" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 18. "I2C3PRIV,privileged access mode for I2C3" "0: unprivileged,1: privileged"
bitfld.long 0x4 17. "LPUART1PRIV,privileged access mode for LPUART1" "0: unprivileged,1: privileged"
bitfld.long 0x4 16. "SPI3PRIV,privileged access mode for SPI3" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 6. "TIM17PRIV,privileged access mode for TIM17" "0: unprivileged,1: privileged"
bitfld.long 0x4 5. "TIM16PRIV,privileged access mode for TIM16" "0: unprivileged,1: privileged"
bitfld.long 0x4 3. "USART1PRIV,privileged access mode for USART1" "0: unprivileged,1: privileged"
newline
bitfld.long 0x4 1. "SPI1PRIV,privileged access mode for SPI1PRIV" "0: unprivileged,1: privileged"
bitfld.long 0x4 0. "TIM1PRIV,privileged access mode for TIM1" "0: unprivileged,1: privileged"
line.long 0x8 "GTZC1_TZSC_PRIVCFGR3,GTZC1 TZSC privilege configuration register 3"
bitfld.long 0x8 23. "RADIOPRIV,privileged access mode for 2.4 GHz RADIO" "0: unprivileged,1: privileged"
bitfld.long 0x8 22. "RAMCFGPRIV,privileged access mode for RAMCFG" "0: unprivileged,1: privileged"
bitfld.long 0x8 16. "PKAPRIV,privileged access mode for PKA" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 14. "SAESPRIV,privileged access mode for SAES" "0: unprivileged,1: privileged"
bitfld.long 0x8 13. "RNGPRIV,privileged access mode for RNG" "0: unprivileged,1: privileged"
bitfld.long 0x8 12. "HASHPRIV,privileged access mode for HASH" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 11. "AESPRIV,privileged access mode for AES" "0: unprivileged,1: privileged"
bitfld.long 0x8 6. "ICACHE_REGPRIV,privileged access mode for ICACHE registers" "0: unprivileged,1: privileged"
bitfld.long 0x8 4. "TSCPRIV,privileged access mode for TSC" "0: unprivileged,1: privileged"
newline
bitfld.long 0x8 3. "CRCPRIV,privileged access mode for CRC" "0: unprivileged,1: privileged"
tree.end
tree.end
tree "HASH (Hash Processor)"
base ad:0x0
tree "HASH"
base ad:0x420C0400
group.long 0x0++0xB
line.long 0x0 "HASH_CR,HASH control register"
bitfld.long 0x0 18. "ALGO1,Algorithm selection" "0: SHA-1,1: MD5"
bitfld.long 0x0 16. "LKEY,Long key selection" "0: the HMAC key is shorter or equal to 64 bytes.,1: the HMAC key is longer than 64 bytes. The hash.."
newline
bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "0: DCAL is automatically set at the end of a DMA..,1: DCAL is not automatically set at the end of a.."
rbitfld.long 0x0 12. "DINNE,DIN not empty" "0: No data are present in the data input buffer,1: The input buffer contains at least one word of.."
newline
hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed"
bitfld.long 0x0 7. "ALGO0,Algorithm selection" "0: SHA-1,1: MD5"
newline
bitfld.long 0x0 6. "MODE,Mode selection" "0: Hash mode selected,1: HMAC mode selected. LKEY must be set if the key.."
bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "0: 32-bit data. The data written into HASH_DIN are..,1: 16-bit data or half-word. The data written into..,2: 8-bit data or bytes. The data written into..,3: bit data or bit-string. The data written into.."
newline
bitfld.long 0x0 3. "DMAE,DMA enable" "0: DMA transfers disabled,1: DMA transfers enabled. A DMA request is sent as.."
bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1"
line.long 0x4 "HASH_DIN,HASH data input register"
hexmask.long 0x4 0.--31. 1. "DATAIN,Data input"
line.long 0x8 "HASH_STR,HASH start register"
bitfld.long 0x8 8. "DCAL,Digest calculation" "0,1"
hexmask.long.byte 0x8 0.--4. 1. "NBLW,Number of valid bits in the last word"
rgroup.long 0xC++0x13
line.long 0x0 "HASH_HRA0,HASH aliased digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HRA1,HASH aliased digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HRA2,HASH aliased digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HRA3,HASH aliased digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HRA4,HASH aliased digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
group.long 0x20++0x7
line.long 0x0 "HASH_IMR,HASH interrupt enable register"
bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "0: Digest calculation completion interrupt disabled,1: Digest calculation completion interrupt enabled."
bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "0: Data input interrupt disabled,1: Data input interrupt enabled"
line.long 0x4 "HASH_SR,HASH status register"
rbitfld.long 0x4 3. "BUSY,Busy bit" "0: No block is currently being processed,1: The hash core is processing a block of data"
rbitfld.long 0x4 2. "DMAS,DMA Status" "0: DMA interface is disabled (DMAE = 0) and no..,1: DMA interface is enabled (DMAE = 1) or a.."
newline
bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "0: No digest available in the HASH_HRx registers..,1: Digest calculation complete a digest is.."
bitfld.long 0x4 0. "DINIS,Data input interrupt status" "0: Less than 16 locations are free in the input..,1: A new block can be entered into the input.."
group.long 0xF8++0xD7
line.long 0x0 "HASH_CSR0,HASH context swap register 0"
hexmask.long 0x0 0.--31. 1. "CS0,Context swap x"
line.long 0x4 "HASH_CSR1,HASH context swap register 1"
hexmask.long 0x4 0.--31. 1. "CS1,Context swap x"
line.long 0x8 "HASH_CSR2,HASH context swap register 2"
hexmask.long 0x8 0.--31. 1. "CS2,Context swap x"
line.long 0xC "HASH_CSR3,HASH context swap register 3"
hexmask.long 0xC 0.--31. 1. "CS3,Context swap x"
line.long 0x10 "HASH_CSR4,HASH context swap register 4"
hexmask.long 0x10 0.--31. 1. "CS4,Context swap x"
line.long 0x14 "HASH_CSR5,HASH context swap register 5"
hexmask.long 0x14 0.--31. 1. "CS5,Context swap x"
line.long 0x18 "HASH_CSR6,HASH context swap register 6"
hexmask.long 0x18 0.--31. 1. "CS6,Context swap x"
line.long 0x1C "HASH_CSR7,HASH context swap register 7"
hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x"
line.long 0x20 "HASH_CSR8,HASH context swap register 8"
hexmask.long 0x20 0.--31. 1. "CS8,Context swap x"
line.long 0x24 "HASH_CSR9,HASH context swap register 9"
hexmask.long 0x24 0.--31. 1. "CS9,Context swap x"
line.long 0x28 "HASH_CSR10,HASH context swap register 10"
hexmask.long 0x28 0.--31. 1. "CS10,Context swap x"
line.long 0x2C "HASH_CSR11,HASH context swap register 11"
hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x"
line.long 0x30 "HASH_CSR12,HASH context swap register 12"
hexmask.long 0x30 0.--31. 1. "CS12,Context swap x"
line.long 0x34 "HASH_CSR13,HASH context swap register 13"
hexmask.long 0x34 0.--31. 1. "CS13,Context swap x"
line.long 0x38 "HASH_CSR14,HASH context swap register 14"
hexmask.long 0x38 0.--31. 1. "CS14,Context swap x"
line.long 0x3C "HASH_CSR15,HASH context swap register 15"
hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x"
line.long 0x40 "HASH_CSR16,HASH context swap register 16"
hexmask.long 0x40 0.--31. 1. "CS16,Context swap x"
line.long 0x44 "HASH_CSR17,HASH context swap register 17"
hexmask.long 0x44 0.--31. 1. "CS17,Context swap x"
line.long 0x48 "HASH_CSR18,HASH context swap register 18"
hexmask.long 0x48 0.--31. 1. "CS18,Context swap x"
line.long 0x4C "HASH_CSR19,HASH context swap register 19"
hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x"
line.long 0x50 "HASH_CSR20,HASH context swap register 20"
hexmask.long 0x50 0.--31. 1. "CS20,Context swap x"
line.long 0x54 "HASH_CSR21,HASH context swap register 21"
hexmask.long 0x54 0.--31. 1. "CS21,Context swap x"
line.long 0x58 "HASH_CSR22,HASH context swap register 22"
hexmask.long 0x58 0.--31. 1. "CS22,Context swap x"
line.long 0x5C "HASH_CSR23,HASH context swap register 23"
hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x"
line.long 0x60 "HASH_CSR24,HASH context swap register 24"
hexmask.long 0x60 0.--31. 1. "CS24,Context swap x"
line.long 0x64 "HASH_CSR25,HASH context swap register 25"
hexmask.long 0x64 0.--31. 1. "CS25,Context swap x"
line.long 0x68 "HASH_CSR26,HASH context swap register 26"
hexmask.long 0x68 0.--31. 1. "CS26,Context swap x"
line.long 0x6C "HASH_CSR27,HASH context swap register 27"
hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x"
line.long 0x70 "HASH_CSR28,HASH context swap register 28"
hexmask.long 0x70 0.--31. 1. "CS28,Context swap x"
line.long 0x74 "HASH_CSR29,HASH context swap register 29"
hexmask.long 0x74 0.--31. 1. "CS29,Context swap x"
line.long 0x78 "HASH_CSR30,HASH context swap register 30"
hexmask.long 0x78 0.--31. 1. "CS30,Context swap x"
line.long 0x7C "HASH_CSR31,HASH context swap register 31"
hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x"
line.long 0x80 "HASH_CSR32,HASH context swap register 32"
hexmask.long 0x80 0.--31. 1. "CS32,Context swap x"
line.long 0x84 "HASH_CSR33,HASH context swap register 33"
hexmask.long 0x84 0.--31. 1. "CS33,Context swap x"
line.long 0x88 "HASH_CSR34,HASH context swap register 34"
hexmask.long 0x88 0.--31. 1. "CS34,Context swap x"
line.long 0x8C "HASH_CSR35,HASH context swap register 35"
hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x"
line.long 0x90 "HASH_CSR36,HASH context swap register 36"
hexmask.long 0x90 0.--31. 1. "CS36,Context swap x"
line.long 0x94 "HASH_CSR37,HASH context swap register 37"
hexmask.long 0x94 0.--31. 1. "CS37,Context swap x"
line.long 0x98 "HASH_CSR38,HASH context swap register 38"
hexmask.long 0x98 0.--31. 1. "CS38,Context swap x"
line.long 0x9C "HASH_CSR39,HASH context swap register 39"
hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x"
line.long 0xA0 "HASH_CSR40,HASH context swap register 40"
hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x"
line.long 0xA4 "HASH_CSR41,HASH context swap register 41"
hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x"
line.long 0xA8 "HASH_CSR42,HASH context swap register 42"
hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x"
line.long 0xAC "HASH_CSR43,HASH context swap register 43"
hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x"
line.long 0xB0 "HASH_CSR44,HASH context swap register 44"
hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x"
line.long 0xB4 "HASH_CSR45,HASH context swap register 45"
hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x"
line.long 0xB8 "HASH_CSR46,HASH context swap register 46"
hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x"
line.long 0xBC "HASH_CSR47,HASH context swap register 47"
hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x"
line.long 0xC0 "HASH_CSR48,HASH context swap register 48"
hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x"
line.long 0xC4 "HASH_CSR49,HASH context swap register 49"
hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x"
line.long 0xC8 "HASH_CSR50,HASH context swap register 50"
hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x"
line.long 0xCC "HASH_CSR51,HASH context swap register 51"
hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x"
line.long 0xD0 "HASH_CSR52,HASH context swap register 52"
hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x"
line.long 0xD4 "HASH_CSR53,HASH context swap register 53"
hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x"
rgroup.long 0x310++0x1F
line.long 0x0 "HASH_HR0,HASH digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HR1,HASH digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HR2,HASH digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HR3,HASH digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HR4,HASH digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
line.long 0x14 "HASH_HR5,HASH supplementary digest register 5"
hexmask.long 0x14 0.--31. 1. "H5,Hash data x"
line.long 0x18 "HASH_HR6,HASH supplementary digest register 6"
hexmask.long 0x18 0.--31. 1. "H6,Hash data x"
line.long 0x1C "HASH_HR7,HASH supplementary digest register 7"
hexmask.long 0x1C 0.--31. 1. "H7,Hash data x"
tree.end
tree "SEC_HASH"
base ad:0x520C0400
group.long 0x0++0xB
line.long 0x0 "HASH_CR,HASH control register"
bitfld.long 0x0 18. "ALGO1,Algorithm selection" "0: SHA-1,1: MD5"
bitfld.long 0x0 16. "LKEY,Long key selection" "0: the HMAC key is shorter or equal to 64 bytes.,1: the HMAC key is longer than 64 bytes. The hash.."
newline
bitfld.long 0x0 13. "MDMAT,Multiple DMA transfers" "0: DCAL is automatically set at the end of a DMA..,1: DCAL is not automatically set at the end of a.."
rbitfld.long 0x0 12. "DINNE,DIN not empty" "0: No data are present in the data input buffer,1: The input buffer contains at least one word of.."
newline
hexmask.long.byte 0x0 8.--11. 1. "NBW,Number of words already pushed"
bitfld.long 0x0 7. "ALGO0,Algorithm selection" "0: SHA-1,1: MD5"
newline
bitfld.long 0x0 6. "MODE,Mode selection" "0: Hash mode selected,1: HMAC mode selected. LKEY must be set if the key.."
bitfld.long 0x0 4.--5. "DATATYPE,Data type selection" "0: 32-bit data. The data written into HASH_DIN are..,1: 16-bit data or half-word. The data written into..,2: 8-bit data or bytes. The data written into..,3: bit data or bit-string. The data written into.."
newline
bitfld.long 0x0 3. "DMAE,DMA enable" "0: DMA transfers disabled,1: DMA transfers enabled. A DMA request is sent as.."
bitfld.long 0x0 2. "INIT,Initialize message digest calculation" "0,1"
line.long 0x4 "HASH_DIN,HASH data input register"
hexmask.long 0x4 0.--31. 1. "DATAIN,Data input"
line.long 0x8 "HASH_STR,HASH start register"
bitfld.long 0x8 8. "DCAL,Digest calculation" "0,1"
hexmask.long.byte 0x8 0.--4. 1. "NBLW,Number of valid bits in the last word"
rgroup.long 0xC++0x13
line.long 0x0 "HASH_HRA0,HASH aliased digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HRA1,HASH aliased digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HRA2,HASH aliased digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HRA3,HASH aliased digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HRA4,HASH aliased digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
group.long 0x20++0x7
line.long 0x0 "HASH_IMR,HASH interrupt enable register"
bitfld.long 0x0 1. "DCIE,Digest calculation completion interrupt enable" "0: Digest calculation completion interrupt disabled,1: Digest calculation completion interrupt enabled."
bitfld.long 0x0 0. "DINIE,Data input interrupt enable" "0: Data input interrupt disabled,1: Data input interrupt enabled"
line.long 0x4 "HASH_SR,HASH status register"
rbitfld.long 0x4 3. "BUSY,Busy bit" "0: No block is currently being processed,1: The hash core is processing a block of data"
rbitfld.long 0x4 2. "DMAS,DMA Status" "0: DMA interface is disabled (DMAE = 0) and no..,1: DMA interface is enabled (DMAE = 1) or a.."
newline
bitfld.long 0x4 1. "DCIS,Digest calculation completion interrupt status" "0: No digest available in the HASH_HRx registers..,1: Digest calculation complete a digest is.."
bitfld.long 0x4 0. "DINIS,Data input interrupt status" "0: Less than 16 locations are free in the input..,1: A new block can be entered into the input.."
group.long 0xF8++0xD7
line.long 0x0 "HASH_CSR0,HASH context swap register 0"
hexmask.long 0x0 0.--31. 1. "CS0,Context swap x"
line.long 0x4 "HASH_CSR1,HASH context swap register 1"
hexmask.long 0x4 0.--31. 1. "CS1,Context swap x"
line.long 0x8 "HASH_CSR2,HASH context swap register 2"
hexmask.long 0x8 0.--31. 1. "CS2,Context swap x"
line.long 0xC "HASH_CSR3,HASH context swap register 3"
hexmask.long 0xC 0.--31. 1. "CS3,Context swap x"
line.long 0x10 "HASH_CSR4,HASH context swap register 4"
hexmask.long 0x10 0.--31. 1. "CS4,Context swap x"
line.long 0x14 "HASH_CSR5,HASH context swap register 5"
hexmask.long 0x14 0.--31. 1. "CS5,Context swap x"
line.long 0x18 "HASH_CSR6,HASH context swap register 6"
hexmask.long 0x18 0.--31. 1. "CS6,Context swap x"
line.long 0x1C "HASH_CSR7,HASH context swap register 7"
hexmask.long 0x1C 0.--31. 1. "CS7,Context swap x"
line.long 0x20 "HASH_CSR8,HASH context swap register 8"
hexmask.long 0x20 0.--31. 1. "CS8,Context swap x"
line.long 0x24 "HASH_CSR9,HASH context swap register 9"
hexmask.long 0x24 0.--31. 1. "CS9,Context swap x"
line.long 0x28 "HASH_CSR10,HASH context swap register 10"
hexmask.long 0x28 0.--31. 1. "CS10,Context swap x"
line.long 0x2C "HASH_CSR11,HASH context swap register 11"
hexmask.long 0x2C 0.--31. 1. "CS11,Context swap x"
line.long 0x30 "HASH_CSR12,HASH context swap register 12"
hexmask.long 0x30 0.--31. 1. "CS12,Context swap x"
line.long 0x34 "HASH_CSR13,HASH context swap register 13"
hexmask.long 0x34 0.--31. 1. "CS13,Context swap x"
line.long 0x38 "HASH_CSR14,HASH context swap register 14"
hexmask.long 0x38 0.--31. 1. "CS14,Context swap x"
line.long 0x3C "HASH_CSR15,HASH context swap register 15"
hexmask.long 0x3C 0.--31. 1. "CS15,Context swap x"
line.long 0x40 "HASH_CSR16,HASH context swap register 16"
hexmask.long 0x40 0.--31. 1. "CS16,Context swap x"
line.long 0x44 "HASH_CSR17,HASH context swap register 17"
hexmask.long 0x44 0.--31. 1. "CS17,Context swap x"
line.long 0x48 "HASH_CSR18,HASH context swap register 18"
hexmask.long 0x48 0.--31. 1. "CS18,Context swap x"
line.long 0x4C "HASH_CSR19,HASH context swap register 19"
hexmask.long 0x4C 0.--31. 1. "CS19,Context swap x"
line.long 0x50 "HASH_CSR20,HASH context swap register 20"
hexmask.long 0x50 0.--31. 1. "CS20,Context swap x"
line.long 0x54 "HASH_CSR21,HASH context swap register 21"
hexmask.long 0x54 0.--31. 1. "CS21,Context swap x"
line.long 0x58 "HASH_CSR22,HASH context swap register 22"
hexmask.long 0x58 0.--31. 1. "CS22,Context swap x"
line.long 0x5C "HASH_CSR23,HASH context swap register 23"
hexmask.long 0x5C 0.--31. 1. "CS23,Context swap x"
line.long 0x60 "HASH_CSR24,HASH context swap register 24"
hexmask.long 0x60 0.--31. 1. "CS24,Context swap x"
line.long 0x64 "HASH_CSR25,HASH context swap register 25"
hexmask.long 0x64 0.--31. 1. "CS25,Context swap x"
line.long 0x68 "HASH_CSR26,HASH context swap register 26"
hexmask.long 0x68 0.--31. 1. "CS26,Context swap x"
line.long 0x6C "HASH_CSR27,HASH context swap register 27"
hexmask.long 0x6C 0.--31. 1. "CS27,Context swap x"
line.long 0x70 "HASH_CSR28,HASH context swap register 28"
hexmask.long 0x70 0.--31. 1. "CS28,Context swap x"
line.long 0x74 "HASH_CSR29,HASH context swap register 29"
hexmask.long 0x74 0.--31. 1. "CS29,Context swap x"
line.long 0x78 "HASH_CSR30,HASH context swap register 30"
hexmask.long 0x78 0.--31. 1. "CS30,Context swap x"
line.long 0x7C "HASH_CSR31,HASH context swap register 31"
hexmask.long 0x7C 0.--31. 1. "CS31,Context swap x"
line.long 0x80 "HASH_CSR32,HASH context swap register 32"
hexmask.long 0x80 0.--31. 1. "CS32,Context swap x"
line.long 0x84 "HASH_CSR33,HASH context swap register 33"
hexmask.long 0x84 0.--31. 1. "CS33,Context swap x"
line.long 0x88 "HASH_CSR34,HASH context swap register 34"
hexmask.long 0x88 0.--31. 1. "CS34,Context swap x"
line.long 0x8C "HASH_CSR35,HASH context swap register 35"
hexmask.long 0x8C 0.--31. 1. "CS35,Context swap x"
line.long 0x90 "HASH_CSR36,HASH context swap register 36"
hexmask.long 0x90 0.--31. 1. "CS36,Context swap x"
line.long 0x94 "HASH_CSR37,HASH context swap register 37"
hexmask.long 0x94 0.--31. 1. "CS37,Context swap x"
line.long 0x98 "HASH_CSR38,HASH context swap register 38"
hexmask.long 0x98 0.--31. 1. "CS38,Context swap x"
line.long 0x9C "HASH_CSR39,HASH context swap register 39"
hexmask.long 0x9C 0.--31. 1. "CS39,Context swap x"
line.long 0xA0 "HASH_CSR40,HASH context swap register 40"
hexmask.long 0xA0 0.--31. 1. "CS40,Context swap x"
line.long 0xA4 "HASH_CSR41,HASH context swap register 41"
hexmask.long 0xA4 0.--31. 1. "CS41,Context swap x"
line.long 0xA8 "HASH_CSR42,HASH context swap register 42"
hexmask.long 0xA8 0.--31. 1. "CS42,Context swap x"
line.long 0xAC "HASH_CSR43,HASH context swap register 43"
hexmask.long 0xAC 0.--31. 1. "CS43,Context swap x"
line.long 0xB0 "HASH_CSR44,HASH context swap register 44"
hexmask.long 0xB0 0.--31. 1. "CS44,Context swap x"
line.long 0xB4 "HASH_CSR45,HASH context swap register 45"
hexmask.long 0xB4 0.--31. 1. "CS45,Context swap x"
line.long 0xB8 "HASH_CSR46,HASH context swap register 46"
hexmask.long 0xB8 0.--31. 1. "CS46,Context swap x"
line.long 0xBC "HASH_CSR47,HASH context swap register 47"
hexmask.long 0xBC 0.--31. 1. "CS47,Context swap x"
line.long 0xC0 "HASH_CSR48,HASH context swap register 48"
hexmask.long 0xC0 0.--31. 1. "CS48,Context swap x"
line.long 0xC4 "HASH_CSR49,HASH context swap register 49"
hexmask.long 0xC4 0.--31. 1. "CS49,Context swap x"
line.long 0xC8 "HASH_CSR50,HASH context swap register 50"
hexmask.long 0xC8 0.--31. 1. "CS50,Context swap x"
line.long 0xCC "HASH_CSR51,HASH context swap register 51"
hexmask.long 0xCC 0.--31. 1. "CS51,Context swap x"
line.long 0xD0 "HASH_CSR52,HASH context swap register 52"
hexmask.long 0xD0 0.--31. 1. "CS52,Context swap x"
line.long 0xD4 "HASH_CSR53,HASH context swap register 53"
hexmask.long 0xD4 0.--31. 1. "CS53,Context swap x"
rgroup.long 0x310++0x1F
line.long 0x0 "HASH_HR0,HASH digest register 0"
hexmask.long 0x0 0.--31. 1. "H0,Hash data x"
line.long 0x4 "HASH_HR1,HASH digest register 1"
hexmask.long 0x4 0.--31. 1. "H1,Hash data x"
line.long 0x8 "HASH_HR2,HASH digest register 2"
hexmask.long 0x8 0.--31. 1. "H2,Hash data x"
line.long 0xC "HASH_HR3,HASH digest register 3"
hexmask.long 0xC 0.--31. 1. "H3,Hash data x"
line.long 0x10 "HASH_HR4,HASH digest register 4"
hexmask.long 0x10 0.--31. 1. "H4,Hash data x"
line.long 0x14 "HASH_HR5,HASH supplementary digest register 5"
hexmask.long 0x14 0.--31. 1. "H5,Hash data x"
line.long 0x18 "HASH_HR6,HASH supplementary digest register 6"
hexmask.long 0x18 0.--31. 1. "H6,Hash data x"
line.long 0x1C "HASH_HR7,HASH supplementary digest register 7"
hexmask.long 0x1C 0.--31. 1. "H7,Hash data x"
tree.end
tree.end
tree "HSEM (Hardware Semaphore)"
base ad:0x0
tree "HSEM"
base ad:0x420C1C00
group.long 0x420C1C00++0x3
line.long 0x0 "HSEM_R0,HSEM register semaphore 0"
bitfld.long 0x0 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID"
group.long 0x4++0x3B
line.long 0x0 "HSEM_R1,HSEM register semaphore 1"
bitfld.long 0x0 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x4 "HSEM_R2,HSEM register semaphore 2"
bitfld.long 0x4 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x4 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x4 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x8 "HSEM_R3,HSEM register semaphore 3"
bitfld.long 0x8 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x8 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x8 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0xC "HSEM_R4,HSEM register semaphore 4"
bitfld.long 0xC 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0xC 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0xC 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x10 "HSEM_R5,HSEM register semaphore 5"
bitfld.long 0x10 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x10 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x10 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x14 "HSEM_R6,HSEM register semaphore 6"
bitfld.long 0x14 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x14 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x14 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x18 "HSEM_R7,HSEM register semaphore 7"
bitfld.long 0x18 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x18 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x18 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x1C "HSEM_R8,HSEM register semaphore 8"
bitfld.long 0x1C 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x1C 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x20 "HSEM_R9,HSEM register semaphore 9"
bitfld.long 0x20 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x20 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x20 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x24 "HSEM_R10,HSEM register semaphore 10"
bitfld.long 0x24 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x24 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x24 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x28 "HSEM_R11,HSEM register semaphore 11"
bitfld.long 0x28 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x28 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x28 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x2C "HSEM_R12,HSEM register semaphore 12"
bitfld.long 0x2C 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x2C 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x30 "HSEM_R13,HSEM register semaphore 13"
bitfld.long 0x30 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x30 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x30 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x34 "HSEM_R14,HSEM register semaphore 14"
bitfld.long 0x34 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x34 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x34 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x38 "HSEM_R15,HSEM register semaphore 15"
bitfld.long 0x38 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x38 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x38 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore PROCID"
rgroup.long 0x80++0x3F
line.long 0x0 "HSEM_RLR0,HSEM read lock register semaphore 0"
bitfld.long 0x0 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x4 "HSEM_RLR1,HSEM read lock register semaphore 1"
bitfld.long 0x4 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x4 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x4 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x8 "HSEM_RLR2,HSEM read lock register semaphore 2"
bitfld.long 0x8 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x8 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x8 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0xC "HSEM_RLR3,HSEM read lock register semaphore 3"
bitfld.long 0xC 31. "LOCK,Lock indication" "0,1"
bitfld.long 0xC 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0xC 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x10 "HSEM_RLR4,HSEM read lock register semaphore 4"
bitfld.long 0x10 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x10 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x10 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x14 "HSEM_RLR5,HSEM read lock register semaphore 5"
bitfld.long 0x14 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x14 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x14 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x18 "HSEM_RLR6,HSEM read lock register semaphore 6"
bitfld.long 0x18 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x18 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x18 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x1C "HSEM_RLR7,HSEM read lock register semaphore 7"
bitfld.long 0x1C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x1C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x20 "HSEM_RLR8,HSEM read lock register semaphore 8"
bitfld.long 0x20 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x20 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x20 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x24 "HSEM_RLR9,HSEM read lock register semaphore 9"
bitfld.long 0x24 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x24 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x24 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x28 "HSEM_RLR10,HSEM read lock register semaphore 10"
bitfld.long 0x28 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x28 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x28 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x2C "HSEM_RLR11,HSEM read lock register semaphore 11"
bitfld.long 0x2C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x2C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x30 "HSEM_RLR12,HSEM read lock register semaphore 12"
bitfld.long 0x30 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x30 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x30 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x34 "HSEM_RLR13,HSEM read lock register semaphore 13"
bitfld.long 0x34 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x34 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x34 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x38 "HSEM_RLR14,HSEM read lock register semaphore 14"
bitfld.long 0x38 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x38 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x38 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x3C "HSEM_RLR15,HSEM read lock register semaphore 15"
bitfld.long 0x3C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x3C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore processor ID"
group.long 0x100++0x7
line.long 0x0 "HSEM_IER,HSEM non-secure interrupt enable register"
hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt semaphore x enable bit"
line.long 0x4 "HSEM_ICR,HSEM non-secure interrupt clear register"
hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt semaphore x clear bit"
rgroup.long 0x108++0x7
line.long 0x0 "HSEM_ISR,HSEM non-secure interrupt status register"
hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)"
line.long 0x4 "HSEM_MISR,HSEM non-secure interrupt status register"
hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt semaphore x status bit after enable (mask)"
group.long 0x180++0x7
line.long 0x0 "HSEM_SIER,HSEM secure interrupt enable register"
hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt semaphore x enable bit"
line.long 0x4 "HSEM_SICR,HSEM secure interrupt clear register"
hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt semaphore x clear bit"
rgroup.long 0x188++0x7
line.long 0x0 "HSEM_SISR,HSEM secure interrupt status register"
hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt semaphore x status bit before enable (mask)"
line.long 0x4 "HSEM_MSISR,HSEM secure masked interrupt status register"
hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt semaphore x status bit after enable (mask)"
group.long 0x200++0x3
line.long 0x0 "HSEM_SECCFGR,HSEM security configuration register"
hexmask.long.word 0x0 0.--15. 1. "SEC,Semaphore x security attribute"
group.long 0x210++0x3
line.long 0x0 "HSEM_PRIVCFGR,HSEM privilege configuration register"
hexmask.long.word 0x0 0.--15. 1. "PRIV,Semaphore x privilege attribute"
wgroup.long 0x230++0x3
line.long 0x0 "HSEM_CR,HSEM clear register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key"
bitfld.long 0x0 13. "PRIV,PRIV value of semaphores to be cleared." "0,1"
newline
bitfld.long 0x0 12. "SEC,SEC value of semaphores to be cleared." "0,1"
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,LOCKID of semaphores to be cleared"
group.long 0x234++0x3
line.long 0x0 "HSEM_KEYR,HSEM interrupt clear register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key"
tree.end
tree "SEC_HSEM"
base ad:0x520C1C00
group.long 0x420C1C00++0x3
line.long 0x0 "HSEM_R0,HSEM register semaphore 0"
bitfld.long 0x0 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID"
group.long 0x4++0x3B
line.long 0x0 "HSEM_R1,HSEM register semaphore 1"
bitfld.long 0x0 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x4 "HSEM_R2,HSEM register semaphore 2"
bitfld.long 0x4 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x4 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x4 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x8 "HSEM_R3,HSEM register semaphore 3"
bitfld.long 0x8 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x8 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x8 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0xC "HSEM_R4,HSEM register semaphore 4"
bitfld.long 0xC 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0xC 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0xC 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x10 "HSEM_R5,HSEM register semaphore 5"
bitfld.long 0x10 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x10 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x10 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x14 "HSEM_R6,HSEM register semaphore 6"
bitfld.long 0x14 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x14 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x14 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x18 "HSEM_R7,HSEM register semaphore 7"
bitfld.long 0x18 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x18 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x18 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x1C "HSEM_R8,HSEM register semaphore 8"
bitfld.long 0x1C 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x1C 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x20 "HSEM_R9,HSEM register semaphore 9"
bitfld.long 0x20 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x20 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x20 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x24 "HSEM_R10,HSEM register semaphore 10"
bitfld.long 0x24 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x24 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x24 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x28 "HSEM_R11,HSEM register semaphore 11"
bitfld.long 0x28 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x28 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x28 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x2C "HSEM_R12,HSEM register semaphore 12"
bitfld.long 0x2C 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x2C 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x30 "HSEM_R13,HSEM register semaphore 13"
bitfld.long 0x30 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x30 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x30 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x34 "HSEM_R14,HSEM register semaphore 14"
bitfld.long 0x34 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x34 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x34 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore PROCID"
line.long 0x38 "HSEM_R15,HSEM register semaphore 15"
bitfld.long 0x38 31. "LOCK,Lock indication" "0: On write free semaphore (only when LOCKID and..,1: On write try to lock semaphore on read semaphore.."
bitfld.long 0x38 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privilege compartment."
newline
bitfld.long 0x38 12. "SEC,Semaphore secure" "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore PROCID"
rgroup.long 0x80++0x3F
line.long 0x0 "HSEM_RLR0,HSEM read lock register semaphore 0"
bitfld.long 0x0 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x0 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x0 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x0 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x4 "HSEM_RLR1,HSEM read lock register semaphore 1"
bitfld.long 0x4 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x4 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x4 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x4 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x4 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x8 "HSEM_RLR2,HSEM read lock register semaphore 2"
bitfld.long 0x8 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x8 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x8 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x8 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x8 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0xC "HSEM_RLR3,HSEM read lock register semaphore 3"
bitfld.long 0xC 31. "LOCK,Lock indication" "0,1"
bitfld.long 0xC 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0xC 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0xC 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0xC 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x10 "HSEM_RLR4,HSEM read lock register semaphore 4"
bitfld.long 0x10 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x10 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x10 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x10 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x10 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x14 "HSEM_RLR5,HSEM read lock register semaphore 5"
bitfld.long 0x14 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x14 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x14 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x14 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x14 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x18 "HSEM_RLR6,HSEM read lock register semaphore 6"
bitfld.long 0x18 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x18 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x18 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x18 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x18 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x1C "HSEM_RLR7,HSEM read lock register semaphore 7"
bitfld.long 0x1C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x1C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x1C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x1C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x1C 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x20 "HSEM_RLR8,HSEM read lock register semaphore 8"
bitfld.long 0x20 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x20 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x20 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x20 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x20 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x24 "HSEM_RLR9,HSEM read lock register semaphore 9"
bitfld.long 0x24 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x24 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x24 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x24 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x24 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x28 "HSEM_RLR10,HSEM read lock register semaphore 10"
bitfld.long 0x28 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x28 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x28 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x28 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x28 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x2C "HSEM_RLR11,HSEM read lock register semaphore 11"
bitfld.long 0x2C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x2C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x2C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x2C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x2C 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x30 "HSEM_RLR12,HSEM read lock register semaphore 12"
bitfld.long 0x30 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x30 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x30 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x30 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x30 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x34 "HSEM_RLR13,HSEM read lock register semaphore 13"
bitfld.long 0x34 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x34 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x34 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x34 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x34 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x38 "HSEM_RLR14,HSEM read lock register semaphore 14"
bitfld.long 0x38 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x38 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x38 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x38 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x38 0.--7. 1. "PROCID,Semaphore processor ID"
line.long 0x3C "HSEM_RLR15,HSEM read lock register semaphore 15"
bitfld.long 0x3C 31. "LOCK,Lock indication" "0,1"
bitfld.long 0x3C 13. "PRIV,Semaphore privilege" "0: Semaphore free or locked by unprivileged..,1: Semaphore locked by privileged compartment."
newline
bitfld.long 0x3C 12. "SEC,Semaphore secure." "0: Semaphore free or locked by non-secure..,1: Semaphore locked by secure compartment."
hexmask.long.byte 0x3C 8.--11. 1. "LOCKID,Semaphore LOCKID"
newline
hexmask.long.byte 0x3C 0.--7. 1. "PROCID,Semaphore processor ID"
group.long 0x100++0x7
line.long 0x0 "HSEM_IER,HSEM non-secure interrupt enable register"
hexmask.long.word 0x0 0.--15. 1. "ISE,Non-secure Interrupt semaphore x enable bit"
line.long 0x4 "HSEM_ICR,HSEM non-secure interrupt clear register"
hexmask.long.word 0x4 0.--15. 1. "ISC,Non-secure Interrupt semaphore x clear bit"
rgroup.long 0x108++0x7
line.long 0x0 "HSEM_ISR,HSEM non-secure interrupt status register"
hexmask.long.word 0x0 0.--15. 1. "ISF,Interrupt semaphore x status bit before enable (mask)"
line.long 0x4 "HSEM_MISR,HSEM non-secure interrupt status register"
hexmask.long.word 0x4 0.--15. 1. "MISF,Masked non-secure interrupt semaphore x status bit after enable (mask)"
group.long 0x180++0x7
line.long 0x0 "HSEM_SIER,HSEM secure interrupt enable register"
hexmask.long.word 0x0 0.--15. 1. "SISE,Secure interrupt semaphore x enable bit"
line.long 0x4 "HSEM_SICR,HSEM secure interrupt clear register"
hexmask.long.word 0x4 0.--15. 1. "SISC,Secure interrupt semaphore x clear bit"
rgroup.long 0x188++0x7
line.long 0x0 "HSEM_SISR,HSEM secure interrupt status register"
hexmask.long.word 0x0 0.--15. 1. "SISF,Secure interrupt semaphore x status bit before enable (mask)"
line.long 0x4 "HSEM_MSISR,HSEM secure masked interrupt status register"
hexmask.long.word 0x4 0.--15. 1. "SMISF,Secure masked interrupt semaphore x status bit after enable (mask)"
group.long 0x200++0x3
line.long 0x0 "HSEM_SECCFGR,HSEM security configuration register"
hexmask.long.word 0x0 0.--15. 1. "SEC,Semaphore x security attribute"
group.long 0x210++0x3
line.long 0x0 "HSEM_PRIVCFGR,HSEM privilege configuration register"
hexmask.long.word 0x0 0.--15. 1. "PRIV,Semaphore x privilege attribute"
wgroup.long 0x230++0x3
line.long 0x0 "HSEM_CR,HSEM clear register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key"
bitfld.long 0x0 13. "PRIV,PRIV value of semaphores to be cleared." "0,1"
newline
bitfld.long 0x0 12. "SEC,SEC value of semaphores to be cleared." "0,1"
hexmask.long.byte 0x0 8.--11. 1. "LOCKID,LOCKID of semaphores to be cleared"
group.long 0x234++0x3
line.long 0x0 "HSEM_KEYR,HSEM interrupt clear register"
hexmask.long.word 0x0 16.--31. 1. "KEY,Semaphore clear key"
tree.end
tree.end
tree "I2C (Inter-Integrated Circuit)"
base ad:0x0
tree "I2C1"
base ad:0x40005400
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware and cleared by..,1: STOPF flag remains cleared by hardware. This.."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware and cleared by..,1: ADDR flag remains cleared by hardware. This mode.."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin (SMBA) is not supported in..,1: The SMBus alert pin is supported in host mode.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled. Address..,1: Device default address enabled. Address.."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled. Address 0b0001000x is..,1: Host address enabled. Address 0b0001000x is ACKed."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled. Address 0b00000000 is..,1: General call enabled. Address 0b00000000 is ACKed."
newline
bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable.,1: Wakeup from Stop mode enable."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,Stop detection Interrupt enable" "0: Stop detection (STOPF) interrupt disabled,1: Stop detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received Interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match Interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0: Receive (RXNE) interrupt disabled,1: Receive (RXNE) interrupt enabled"
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0: Transmit (TXIS) interrupt disabled,1: Transmit (TXIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disable,1: Peripheral enable"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer.,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation.,1: Stop generation after current byte transfer."
newline
bitfld.long 0x4 13. "START,Start generation" "0: No Start generation.,1: Restart/Start generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10 bit slave..,1: The master only sends the 1st 7 bits of the 10.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer.,1: Master requests a read transfer."
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled. The received slave..,1: Own address 1 enabled. The received slave.."
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled. The received slave..,1: Own address 2 enabled. The received slave.."
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and don't care. Only OA2[7:2]..,2: OA2[2:1] are masked and don't care. Only..,3: OA2[3:1] are masked and don't care. Only..,4: OA2[4:1] are masked and don't care. Only..,5: OA2[5:1] are masked and don't care. Only..,6: OA2[6:1] are masked and don't care. Only OA2[7]..,7: OA2[7:1] are masked and don't care. No.."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled: when SCL is.."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus Timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t<sub>LOW</sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RXDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TXDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section 52.4.3: FMPI2C pins and internal signals I2C interconnections tables)."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "I2C3"
base ad:0x46002800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware and cleared by..,1: STOPF flag remains cleared by hardware. This.."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware and cleared by..,1: ADDR flag remains cleared by hardware. This mode.."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin (SMBA) is not supported in..,1: The SMBus alert pin is supported in host mode.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled. Address..,1: Device default address enabled. Address.."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled. Address 0b0001000x is..,1: Host address enabled. Address 0b0001000x is ACKed."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled. Address 0b00000000 is..,1: General call enabled. Address 0b00000000 is ACKed."
newline
bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable.,1: Wakeup from Stop mode enable."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,Stop detection Interrupt enable" "0: Stop detection (STOPF) interrupt disabled,1: Stop detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received Interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match Interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0: Receive (RXNE) interrupt disabled,1: Receive (RXNE) interrupt enabled"
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0: Transmit (TXIS) interrupt disabled,1: Transmit (TXIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disable,1: Peripheral enable"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer.,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation.,1: Stop generation after current byte transfer."
newline
bitfld.long 0x4 13. "START,Start generation" "0: No Start generation.,1: Restart/Start generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10 bit slave..,1: The master only sends the 1st 7 bits of the 10.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer.,1: Master requests a read transfer."
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled. The received slave..,1: Own address 1 enabled. The received slave.."
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled. The received slave..,1: Own address 2 enabled. The received slave.."
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and don't care. Only OA2[7:2]..,2: OA2[2:1] are masked and don't care. Only..,3: OA2[3:1] are masked and don't care. Only..,4: OA2[4:1] are masked and don't care. Only..,5: OA2[5:1] are masked and don't care. Only..,6: OA2[6:1] are masked and don't care. Only OA2[7]..,7: OA2[7:1] are masked and don't care. No.."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled: when SCL is.."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus Timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t<sub>LOW</sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RXDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TXDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section 52.4.3: FMPI2C pins and internal signals I2C interconnections tables)."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "SEC_I2C1"
base ad:0x50005400
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware and cleared by..,1: STOPF flag remains cleared by hardware. This.."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware and cleared by..,1: ADDR flag remains cleared by hardware. This mode.."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin (SMBA) is not supported in..,1: The SMBus alert pin is supported in host mode.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled. Address..,1: Device default address enabled. Address.."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled. Address 0b0001000x is..,1: Host address enabled. Address 0b0001000x is ACKed."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled. Address 0b00000000 is..,1: General call enabled. Address 0b00000000 is ACKed."
newline
bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable.,1: Wakeup from Stop mode enable."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,Stop detection Interrupt enable" "0: Stop detection (STOPF) interrupt disabled,1: Stop detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received Interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match Interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0: Receive (RXNE) interrupt disabled,1: Receive (RXNE) interrupt enabled"
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0: Transmit (TXIS) interrupt disabled,1: Transmit (TXIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disable,1: Peripheral enable"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer.,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation.,1: Stop generation after current byte transfer."
newline
bitfld.long 0x4 13. "START,Start generation" "0: No Start generation.,1: Restart/Start generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10 bit slave..,1: The master only sends the 1st 7 bits of the 10.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer.,1: Master requests a read transfer."
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled. The received slave..,1: Own address 1 enabled. The received slave.."
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled. The received slave..,1: Own address 2 enabled. The received slave.."
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and don't care. Only OA2[7:2]..,2: OA2[2:1] are masked and don't care. Only..,3: OA2[3:1] are masked and don't care. Only..,4: OA2[4:1] are masked and don't care. Only..,5: OA2[5:1] are masked and don't care. Only..,6: OA2[6:1] are masked and don't care. Only OA2[7]..,7: OA2[7:1] are masked and don't care. No.."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled: when SCL is.."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus Timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t<sub>LOW</sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RXDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TXDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section 52.4.3: FMPI2C pins and internal signals I2C interconnections tables)."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree "SEC_I2C3"
base ad:0x56002800
group.long 0x0++0x1B
line.long 0x0 "I2C_CR1,I2C control register 1"
bitfld.long 0x0 31. "STOPFACLR,STOP detection flag (STOPF) automatic clear" "0: STOPF flag is set by hardware and cleared by..,1: STOPF flag remains cleared by hardware. This.."
bitfld.long 0x0 30. "ADDRACLR,Address match flag (ADDR) automatic clear" "0: ADDR flag is set by hardware and cleared by..,1: ADDR flag remains cleared by hardware. This mode.."
newline
bitfld.long 0x0 24. "FMP,Fast-mode Plus 20 mA drive enable" "0: 20 mA I/O drive disabled,1: 20 mA I/O drive enabled"
bitfld.long 0x0 23. "PECEN,PEC enable" "0: PEC calculation disabled,1: PEC calculation enabled"
newline
bitfld.long 0x0 22. "ALERTEN,SMBus alert enable" "0: The SMBus alert pin (SMBA) is not supported in..,1: The SMBus alert pin is supported in host mode.."
bitfld.long 0x0 21. "SMBDEN,SMBus device default address enable" "0: Device default address disabled. Address..,1: Device default address enabled. Address.."
newline
bitfld.long 0x0 20. "SMBHEN,SMBus host address enable" "0: Host address disabled. Address 0b0001000x is..,1: Host address enabled. Address 0b0001000x is ACKed."
bitfld.long 0x0 19. "GCEN,General call enable" "0: General call disabled. Address 0b00000000 is..,1: General call enabled. Address 0b00000000 is ACKed."
newline
bitfld.long 0x0 18. "WUPEN,Wakeup from Stop mode enable" "0: Wakeup from Stop mode disable.,1: Wakeup from Stop mode enable."
bitfld.long 0x0 17. "NOSTRETCH,Clock stretching disable" "0: Clock stretching enabled,1: Clock stretching disabled"
newline
bitfld.long 0x0 16. "SBC,Slave byte control" "0: Slave byte control disabled,1: Slave byte control enabled"
bitfld.long 0x0 15. "RXDMAEN,DMA reception requests enable" "0: DMA mode disabled for reception,1: DMA mode enabled for reception"
newline
bitfld.long 0x0 14. "TXDMAEN,DMA transmission requests enable" "0: DMA mode disabled for transmission,1: DMA mode enabled for transmission"
bitfld.long 0x0 12. "ANFOFF,Analog noise filter OFF" "0: Analog noise filter enabled,1: Analog noise filter disabled"
newline
hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter"
bitfld.long 0x0 7. "ERRIE,Error interrupts enable" "0: Error detection interrupts disabled,1: Error detection interrupts enabled"
newline
bitfld.long 0x0 6. "TCIE,Transfer Complete interrupt enable" "0: Transfer Complete interrupt disabled,1: Transfer Complete interrupt enabled"
bitfld.long 0x0 5. "STOPIE,Stop detection Interrupt enable" "0: Stop detection (STOPF) interrupt disabled,1: Stop detection (STOPF) interrupt enabled"
newline
bitfld.long 0x0 4. "NACKIE,Not acknowledge received Interrupt enable" "0: Not acknowledge (NACKF) received interrupts..,1: Not acknowledge (NACKF) received interrupts.."
bitfld.long 0x0 3. "ADDRIE,Address match Interrupt enable (slave only)" "0: Address match (ADDR) interrupts disabled,1: Address match (ADDR) interrupts enabled"
newline
bitfld.long 0x0 2. "RXIE,RX Interrupt enable" "0: Receive (RXNE) interrupt disabled,1: Receive (RXNE) interrupt enabled"
bitfld.long 0x0 1. "TXIE,TX Interrupt enable" "0: Transmit (TXIS) interrupt disabled,1: Transmit (TXIS) interrupt enabled"
newline
bitfld.long 0x0 0. "PE,Peripheral enable" "0: Peripheral disable,1: Peripheral enable"
line.long 0x4 "I2C_CR2,I2C control register 2"
bitfld.long 0x4 26. "PECBYTE,Packet error checking byte" "0: No PEC transfer.,1: PEC transmission/reception is requested"
bitfld.long 0x4 25. "AUTOEND,Automatic end mode (master mode)" "0: software end mode: TC flag is set when NBYTES..,1: Automatic end mode: a STOP condition is.."
newline
bitfld.long 0x4 24. "RELOAD,NBYTES reload mode" "0: The transfer is completed after the NBYTES data..,1: The transfer is not completed after the NBYTES.."
hexmask.long.byte 0x4 16.--23. 1. "NBYTES,Number of bytes"
newline
bitfld.long 0x4 15. "NACK,NACK generation (slave mode)" "0: an ACK is sent after current received byte.,1: a NACK is sent after current received byte."
bitfld.long 0x4 14. "STOP,Stop generation (master mode)" "0: No Stop generation.,1: Stop generation after current byte transfer."
newline
bitfld.long 0x4 13. "START,Start generation" "0: No Start generation.,1: Restart/Start generation:"
bitfld.long 0x4 12. "HEAD10R,10-bit address header only read direction (master receiver mode)" "0: The master sends the complete 10 bit slave..,1: The master only sends the 1st 7 bits of the 10.."
newline
bitfld.long 0x4 11. "ADD10,10-bit addressing mode (master mode)" "0: The master operates in 7-bit addressing mode,1: The master operates in 10-bit addressing mode"
bitfld.long 0x4 10. "RD_WRN,Transfer direction (master mode)" "0: Master requests a write transfer.,1: Master requests a read transfer."
newline
hexmask.long.word 0x4 0.--9. 1. "SADD,Slave address (master mode)"
line.long 0x8 "I2C_OAR1,I2C own address 1 register"
bitfld.long 0x8 15. "OA1EN,Own Address 1 enable" "0: Own address 1 disabled. The received slave..,1: Own address 1 enabled. The received slave.."
bitfld.long 0x8 10. "OA1MODE,Own Address 1 10-bit mode" "0: Own address 1 is a 7-bit address.,1: Own address 1 is a 10-bit address."
newline
hexmask.long.word 0x8 0.--9. 1. "OA1,Interface own slave address"
line.long 0xC "I2C_OAR2,I2C own address 2 register"
bitfld.long 0xC 15. "OA2EN,Own Address 2 enable" "0: Own address 2 disabled. The received slave..,1: Own address 2 enabled. The received slave.."
bitfld.long 0xC 8.--10. "OA2MSK,Own Address 2 masks" "0: No mask,1: OA2[1] is masked and don't care. Only OA2[7:2]..,2: OA2[2:1] are masked and don't care. Only..,3: OA2[3:1] are masked and don't care. Only..,4: OA2[4:1] are masked and don't care. Only..,5: OA2[5:1] are masked and don't care. Only..,6: OA2[6:1] are masked and don't care. Only OA2[7]..,7: OA2[7:1] are masked and don't care. No.."
newline
hexmask.long.byte 0xC 1.--7. 1. "OA2,Interface address"
line.long 0x10 "I2C_TIMINGR,I2C timing register"
hexmask.long.byte 0x10 28.--31. 1. "PRESC,Timing prescaler"
hexmask.long.byte 0x10 20.--23. 1. "SCLDEL,Data setup time"
newline
hexmask.long.byte 0x10 16.--19. 1. "SDADEL,Data hold time"
hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period (master mode)"
newline
hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period (master mode)"
line.long 0x14 "I2C_TIMEOUTR,I2C timeout register"
bitfld.long 0x14 31. "TEXTEN,Extended clock timeout enable" "0: Extended clock timeout detection is disabled,1: Extended clock timeout detection is enabled."
hexmask.long.word 0x14 16.--27. 1. "TIMEOUTB,Bus timeout B"
newline
bitfld.long 0x14 15. "TIMOUTEN,Clock timeout enable" "0: SCL timeout detection is disabled,1: SCL timeout detection is enabled: when SCL is.."
bitfld.long 0x14 12. "TIDLE,Idle clock timeout detection" "0: TIMEOUTA is used to detect SCL low timeout,1: TIMEOUTA is used to detect both SCL and SDA high.."
newline
hexmask.long.word 0x14 0.--11. 1. "TIMEOUTA,Bus Timeout A"
line.long 0x18 "I2C_ISR,I2C interrupt and status register"
hexmask.long.byte 0x18 17.--23. 1. "ADDCODE,Address match code (Slave mode)"
rbitfld.long 0x18 16. "DIR,Transfer direction (Slave mode)" "0: Write transfer slave enters receiver mode.,1: Read transfer slave enters transmitter mode."
newline
rbitfld.long 0x18 15. "BUSY,Bus busy" "0,1"
rbitfld.long 0x18 13. "ALERT,SMBus alert" "0,1"
newline
rbitfld.long 0x18 12. "TIMEOUT,Timeout or t<sub>LOW</sub> detection flag" "0,1"
rbitfld.long 0x18 11. "PECERR,PEC Error in reception" "0,1"
newline
rbitfld.long 0x18 10. "OVR,Overrun/Underrun (slave mode)" "0,1"
rbitfld.long 0x18 9. "ARLO,Arbitration lost" "0,1"
newline
rbitfld.long 0x18 8. "BERR,Bus error" "0,1"
rbitfld.long 0x18 7. "TCR,Transfer Complete Reload" "0,1"
newline
rbitfld.long 0x18 6. "TC,Transfer Complete (master mode)" "0,1"
rbitfld.long 0x18 5. "STOPF,Stop detection flag" "0,1"
newline
rbitfld.long 0x18 4. "NACKF,Not Acknowledge received flag" "0,1"
rbitfld.long 0x18 3. "ADDR,Address matched (slave mode)" "0,1"
newline
rbitfld.long 0x18 2. "RXNE,Receive data register not empty (receivers)" "0,1"
bitfld.long 0x18 1. "TXIS,Transmit interrupt status (transmitters)" "0,1"
newline
bitfld.long 0x18 0. "TXE,Transmit data register empty (transmitters)" "0,1"
wgroup.long 0x1C++0x3
line.long 0x0 "I2C_ICR,I2C interrupt clear register"
bitfld.long 0x0 13. "ALERTCF,Alert flag clear" "0,1"
bitfld.long 0x0 12. "TIMOUTCF,Timeout detection flag clear" "0,1"
newline
bitfld.long 0x0 11. "PECCF,PEC Error flag clear" "0,1"
bitfld.long 0x0 10. "OVRCF,Overrun/Underrun flag clear" "0,1"
newline
bitfld.long 0x0 9. "ARLOCF,Arbitration lost flag clear" "0,1"
bitfld.long 0x0 8. "BERRCF,Bus error flag clear" "0,1"
newline
bitfld.long 0x0 5. "STOPCF,STOP detection flag clear" "0,1"
bitfld.long 0x0 4. "NACKCF,Not Acknowledge flag clear" "0,1"
newline
bitfld.long 0x0 3. "ADDRCF,Address matched flag clear" "0,1"
rgroup.long 0x20++0x7
line.long 0x0 "I2C_PECR,I2C PEC register"
hexmask.long.byte 0x0 0.--7. 1. "PEC,Packet error checking register"
line.long 0x4 "I2C_RXDR,I2C receive data register"
hexmask.long.byte 0x4 0.--7. 1. "RXDATA,8-bit receive data"
group.long 0x28++0x7
line.long 0x0 "I2C_TXDR,I2C transmit data register"
hexmask.long.byte 0x0 0.--7. 1. "TXDATA,8-bit transmit data"
line.long 0x4 "I2C_AUTOCR,I2C Autonomous mode control register"
bitfld.long 0x4 21. "TRIGEN,Trigger enable" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x4 20. "TRIGPOL,Trigger polarity" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.byte 0x4 16.--19. 1. "TRIGSEL,Trigger selection (refer to Section 52.4.3: FMPI2C pins and internal signals I2C interconnections tables)."
bitfld.long 0x4 7. "TCRDMAEN,DMA request enable on Transfer Complete Reload event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete.."
newline
bitfld.long 0x4 6. "TCDMAEN,DMA request enable on Transfer Complete event" "0: DMA request not generated on Transfer Complete..,1: DMA request generated on Transfer Complete event"
tree.end
tree.end
tree "ICACHE (Instruction Cache)"
base ad:0x0
tree "ICACHE"
base ad:0x40030400
group.long 0x0++0x3
line.long 0x0 "ICACHE_CR,ICACHE control register"
bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "0: no effect,1: reset cache miss monitor"
bitfld.long 0x0 18. "HITMRST,hit monitor reset" "0: no effect,1: reset cache hit monitor"
newline
bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "0: cache miss monitor switched off. Stopping the..,1: cache miss monitor enabled"
bitfld.long 0x0 16. "HITMEN,hit monitor enable" "0: cache hit monitor switched off. Stopping the..,1: cache hit monitor enabled"
newline
bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "0: direct mapped cache (1-way cache),1: n-way set associative cache (reset value)"
bitfld.long 0x0 1. "CACHEINV,cache invalidation" "0: no effect,1: invalidate entire cache (all cache lines valid.."
newline
bitfld.long 0x0 0. "EN,enable" "0: cache disabled,1: cache enabled"
rgroup.long 0x4++0x3
line.long 0x0 "ICACHE_SR,ICACHE status register"
bitfld.long 0x0 2. "ERRF,cache error flag" "0: no error,1: an error occurred during the operation.."
bitfld.long 0x0 1. "BSYENDF,busy end flag" "0: cache busy,1: full invalidate CACHEINV operation finished"
newline
bitfld.long 0x0 0. "BUSYF,busy flag" "0: cache not busy on a CACHEINV operation,1: cache executing a full invalidate CACHEINV.."
group.long 0x8++0x3
line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register"
bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "0: interrupt disabled on error,1: interrupt enabled on error"
bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "0: interrupt disabled on busy end,1: interrupt enabled on busy end"
wgroup.long 0xC++0x3
line.long 0x0 "ICACHE_FCR,ICACHE flag clear register"
bitfld.long 0x0 2. "CERRF,clear cache error flag" "0: no effect,1: clears ERRF flag in ICACHE_SR"
bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "0: no effect,1: clears BSYENDF flag in ICACHE_SR."
rgroup.long 0x10++0x7
line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register"
hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter"
line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register"
hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter"
group.long 0x20++0xF
line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register"
bitfld.long 0x0 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x0 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x0 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register"
bitfld.long 0x4 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x4 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x4 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register"
bitfld.long 0x8 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x8 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x8 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x"
line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register"
bitfld.long 0xC 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0xC 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0xC 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x"
tree.end
tree "SEC_ICACHE"
base ad:0x50030400
group.long 0x0++0x3
line.long 0x0 "ICACHE_CR,ICACHE control register"
bitfld.long 0x0 19. "MISSMRST,miss monitor reset" "0: no effect,1: reset cache miss monitor"
bitfld.long 0x0 18. "HITMRST,hit monitor reset" "0: no effect,1: reset cache hit monitor"
newline
bitfld.long 0x0 17. "MISSMEN,miss monitor enable" "0: cache miss monitor switched off. Stopping the..,1: cache miss monitor enabled"
bitfld.long 0x0 16. "HITMEN,hit monitor enable" "0: cache hit monitor switched off. Stopping the..,1: cache hit monitor enabled"
newline
bitfld.long 0x0 2. "WAYSEL,cache associativity mode selection" "0: direct mapped cache (1-way cache),1: n-way set associative cache (reset value)"
bitfld.long 0x0 1. "CACHEINV,cache invalidation" "0: no effect,1: invalidate entire cache (all cache lines valid.."
newline
bitfld.long 0x0 0. "EN,enable" "0: cache disabled,1: cache enabled"
rgroup.long 0x4++0x3
line.long 0x0 "ICACHE_SR,ICACHE status register"
bitfld.long 0x0 2. "ERRF,cache error flag" "0: no error,1: an error occurred during the operation.."
bitfld.long 0x0 1. "BSYENDF,busy end flag" "0: cache busy,1: full invalidate CACHEINV operation finished"
newline
bitfld.long 0x0 0. "BUSYF,busy flag" "0: cache not busy on a CACHEINV operation,1: cache executing a full invalidate CACHEINV.."
group.long 0x8++0x3
line.long 0x0 "ICACHE_IER,ICACHE interrupt enable register"
bitfld.long 0x0 2. "ERRIE,interrupt enable on cache error" "0: interrupt disabled on error,1: interrupt enabled on error"
bitfld.long 0x0 1. "BSYENDIE,interrupt enable on busy end" "0: interrupt disabled on busy end,1: interrupt enabled on busy end"
wgroup.long 0xC++0x3
line.long 0x0 "ICACHE_FCR,ICACHE flag clear register"
bitfld.long 0x0 2. "CERRF,clear cache error flag" "0: no effect,1: clears ERRF flag in ICACHE_SR"
bitfld.long 0x0 1. "CBSYENDF,clear busy end flag" "0: no effect,1: clears BSYENDF flag in ICACHE_SR."
rgroup.long 0x10++0x7
line.long 0x0 "ICACHE_HMONR,ICACHE hit monitor register"
hexmask.long 0x0 0.--31. 1. "HITMON,cache hit monitor counter"
line.long 0x4 "ICACHE_MMONR,ICACHE miss monitor register"
hexmask.long.word 0x4 0.--15. 1. "MISSMON,cache miss monitor counter"
group.long 0x20++0xF
line.long 0x0 "ICACHE_CRR0,ICACHE region 0 configuration register"
bitfld.long 0x0 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x0 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x0 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x0 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x0 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x0 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x4 "ICACHE_CRR1,ICACHE region 1 configuration register"
bitfld.long 0x4 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x4 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x4 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x4 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x4 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x4 0.--7. 1. "BASEADDR,base address for region x"
line.long 0x8 "ICACHE_CRR2,ICACHE region 2 configuration register"
bitfld.long 0x8 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0x8 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0x8 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0x8 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0x8 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0x8 0.--7. 1. "BASEADDR,base address for region x"
line.long 0xC "ICACHE_CRR3,ICACHE region 3 configuration register"
bitfld.long 0xC 31. "HBURST,output burst type for region x" "0: WRAP,1: INCR"
bitfld.long 0xC 28. "MSTSEL,AHB cache master selection for region x" "0: no action (master1 selected by default),1: master2 selected"
newline
hexmask.long.word 0xC 16.--26. 1. "REMAPADDR,remapped address for region x"
bitfld.long 0xC 15. "REN,enable for region x" "0: disabled,1: enabled"
newline
bitfld.long 0xC 9.--11. "RSIZE,size for region x" "0: reserved,1: 2 Mbytes,2: 4 Mbytes,3: 8 Mbytes,4: 16 Mbytes,5: 32 Mbytes,6: 64 Mbytes,7: 128 Mbytes"
hexmask.long.byte 0xC 0.--7. 1. "BASEADDR,base address for region x"
tree.end
tree.end
tree "IWDG (Independent Watchdog)"
base ad:0x0
tree "IWDG"
base ad:0x40003000
wgroup.long 0x0++0x3
line.long 0x0 "IWDG_KR,IWDG key register"
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only  read 0x0000)"
group.long 0x4++0x7
line.long 0x0 "IWDG_PR,IWDG prescaler register"
hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider"
line.long 0x4 "IWDG_RLR,IWDG reload register"
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value"
rgroup.long 0xC++0x3
line.long 0x0 "IWDG_SR,IWDG status register"
bitfld.long 0x0 14. "EWIF,Watchdog early interrupt flag" "0,1"
bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "0: The IWDG is not activated,1: The IWDG is activated and needs to be refreshed.."
bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1"
bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1"
bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1"
newline
bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1"
group.long 0x10++0x7
line.long 0x0 "IWDG_WINR,IWDG window register"
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value"
line.long 0x4 "IWDG_EWCR,IWDG early wakeup interrupt register"
bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "0: The early interrupt interface is disabled.,1: The early interrupt interface is enabled."
bitfld.long 0x4 14. "EWIC,Watchdog early interrupt acknowledge" "0,1"
hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value"
tree.end
tree "SEC_IWDG"
base ad:0x50003000
wgroup.long 0x0++0x3
line.long 0x0 "IWDG_KR,IWDG key register"
hexmask.long.word 0x0 0.--15. 1. "KEY,Key value (write only  read 0x0000)"
group.long 0x4++0x7
line.long 0x0 "IWDG_PR,IWDG prescaler register"
hexmask.long.byte 0x0 0.--3. 1. "PR,Prescaler divider"
line.long 0x4 "IWDG_RLR,IWDG reload register"
hexmask.long.word 0x4 0.--11. 1. "RL,Watchdog counter reload value"
rgroup.long 0xC++0x3
line.long 0x0 "IWDG_SR,IWDG status register"
bitfld.long 0x0 14. "EWIF,Watchdog early interrupt flag" "0,1"
bitfld.long 0x0 8. "ONF,Watchdog enable status bit" "0: The IWDG is not activated,1: The IWDG is activated and needs to be refreshed.."
bitfld.long 0x0 3. "EWU,Watchdog interrupt comparator value update" "0,1"
bitfld.long 0x0 2. "WVU,Watchdog counter window value update" "0,1"
bitfld.long 0x0 1. "RVU,Watchdog counter reload value update" "0,1"
newline
bitfld.long 0x0 0. "PVU,Watchdog prescaler value update" "0,1"
group.long 0x10++0x7
line.long 0x0 "IWDG_WINR,IWDG window register"
hexmask.long.word 0x0 0.--11. 1. "WIN,Watchdog counter window value"
line.long 0x4 "IWDG_EWCR,IWDG early wakeup interrupt register"
bitfld.long 0x4 15. "EWIE,Watchdog early interrupt enable" "0: The early interrupt interface is disabled.,1: The early interrupt interface is enabled."
bitfld.long 0x4 14. "EWIC,Watchdog early interrupt acknowledge" "0,1"
hexmask.long.word 0x4 0.--11. 1. "EWIT,Watchdog counter window value"
tree.end
tree.end
tree "LPTIM (Low Power Timer)"
base ad:0x0
tree "LPTIM1"
base ad:0x46004400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_output,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_intput,Interrupt and Status Register (intput mode)"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_output,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_intput,Interrupt Clear Register (intput mode)"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_output,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_intput,LPTIM interrupt Enable Register (intput mode)"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled. Writing '0' to the..,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled. Writing '0' to the..,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
tree.end
tree "LPTIM2"
base ad:0x40009400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_output,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_intput,Interrupt and Status Register (intput mode)"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_output,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_intput,Interrupt Clear Register (intput mode)"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_output,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_intput,LPTIM interrupt Enable Register (intput mode)"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled. Writing '0' to the..,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled. Writing '0' to the..,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
tree.end
tree "SEC_LPTIM1"
base ad:0x56004400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_output,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_intput,Interrupt and Status Register (intput mode)"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_output,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_intput,Interrupt Clear Register (intput mode)"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_output,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_intput,LPTIM interrupt Enable Register (intput mode)"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled. Writing '0' to the..,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled. Writing '0' to the..,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
tree.end
tree "SEC_LPTIM2"
base ad:0x50009400
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_output,LPTIM1 interrupt and status register [alternate]"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 19. "CMP2OK,Compare register 2 update OK" "0,1"
newline
bitfld.long 0x0 9. "CC2IF,Compare 2 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
newline
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
newline
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
newline
bitfld.long 0x0 3. "CMP1OK,Compare register 1 update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,Compare 1 interrupt flag" "0: No match,1: The content of the counter LPTIM_CNT register.."
rgroup.long 0x0++0x3
line.long 0x0 "LPTIM1_ISR_intput,Interrupt and Status Register (intput mode)"
bitfld.long 0x0 24. "DIEROK,Interrupt enable register update OK" "0,1"
bitfld.long 0x0 13. "CC2OF,Capture 2 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
newline
bitfld.long 0x0 12. "CC1OF,Capture 1 over-capture flag" "0: No over-capture has been detected.,1: The counter value has been captured in.."
bitfld.long 0x0 9. "CC2IF,Capture 2 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
newline
bitfld.long 0x0 8. "REPOK,Repetition register update OK" "0,1"
bitfld.long 0x0 7. "UE,LPTIM update event occurred" "0,1"
newline
bitfld.long 0x0 6. "DOWN,Counter direction change up to down" "0,1"
bitfld.long 0x0 5. "UP,Counter direction change down to up" "0,1"
newline
bitfld.long 0x0 4. "ARROK,Autoreload register update OK" "0,1"
bitfld.long 0x0 2. "EXTTRIG,External trigger edge event" "0,1"
newline
bitfld.long 0x0 1. "ARRM,Autoreload match" "0,1"
bitfld.long 0x0 0. "CC1IF,capture 1 interrupt flag" "0: No input capture occurred,1: The counter value has been captured in the.."
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_output,LPTIM1 interrupt clear register [alternate]"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 19. "CMP2OKCF,Compare register 2 update OK clear flag" "0,1"
newline
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
newline
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
newline
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
newline
bitfld.long 0x0 3. "CMP1OKCF,Compare register 1 update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
wgroup.long 0x4++0x3
line.long 0x0 "LPTIM1_ICR_intput,Interrupt Clear Register (intput mode)"
bitfld.long 0x0 24. "DIEROKCF,Interrupt enable register update OK clear flag" "0,1"
bitfld.long 0x0 13. "CC2OCF,Capture/compare 2 over-capture clear flag" "0,1"
newline
bitfld.long 0x0 12. "CC1OCF,Capture/compare 1 over-capture clear flag" "0,1"
bitfld.long 0x0 9. "CC2CF,Capture/compare 2 clear flag" "0,1"
newline
bitfld.long 0x0 8. "REPOKCF,Repetition register update OK clear flag" "0,1"
bitfld.long 0x0 7. "UECF,Update event clear flag" "0,1"
newline
bitfld.long 0x0 6. "DOWNCF,Direction change to down clear flag" "0,1"
bitfld.long 0x0 5. "UPCF,Direction change to UP clear flag" "0,1"
newline
bitfld.long 0x0 4. "ARROKCF,Autoreload register update OK clear flag" "0,1"
bitfld.long 0x0 2. "EXTTRIGCF,External trigger valid edge clear flag" "0,1"
newline
bitfld.long 0x0 1. "ARRMCF,Autoreload match clear flag" "0,1"
bitfld.long 0x0 0. "CC1CF,Capture/compare 1 clear flag" "0,1"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_output,LPTIM1 interrupt enable register [alternate]"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
bitfld.long 0x0 19. "CMP2OKIE,Compare register 2 update OK interrupt enable" "0: CMPOK register 2 interrupt disabled,1: CMPOK register 2 interrupt enabled"
newline
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
newline
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
newline
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
newline
bitfld.long 0x0 3. "CMP1OKIE,Compare register 1 update OK interrupt enable" "0: CMPOK register 1 interrupt disabled,1: CMPOK register 1 interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
group.long 0x8++0x3
line.long 0x0 "LPTIM1_DIER_intput,LPTIM interrupt Enable Register (intput mode)"
bitfld.long 0x0 25. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled. Writing '0' to the..,1: CC2 DMA request enabled"
bitfld.long 0x0 23. "UEDE,Update event DMA request enable" "0: UE DMA request disabled. Writing '0' to the UEDE..,1: UE DMA request enabled"
newline
bitfld.long 0x0 16. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled. Writing '0' to the..,1: CC1 DMA request enabled"
bitfld.long 0x0 13. "CC2OIE,Capture/compare 2 over-capture interrupt enable" "0: CC2 over-capture interrupt disabled,1: CC2 over-capture interrupt enabled"
newline
bitfld.long 0x0 12. "CC1OIE,Capture/compare 1 over-capture interrupt enable" "0: CC1 over-capture interrupt disabled,1: CC1 over-capture interrupt enabled"
bitfld.long 0x0 9. "CC2IE,Capture/compare 2 interrupt enable" "0: Capture/compare 2 interrupt disabled,1: Capture/compare 2 interrupt enabled"
newline
bitfld.long 0x0 8. "REPOKIE,Repetition register update OK interrupt Enable" "0: Repetition register update OK interrupt disabled,1: Repetition register update OK interrupt enabled"
bitfld.long 0x0 7. "UEIE,Update event interrupt enable" "0: Update event interrupt disabled,1: Update event interrupt enabled"
newline
bitfld.long 0x0 6. "DOWNIE,Direction change to down Interrupt Enable" "0: DOWN interrupt disabled,1: DOWN interrupt enabled"
bitfld.long 0x0 5. "UPIE,Direction change to UP Interrupt Enable" "0: UP interrupt disabled,1: UP interrupt enabled"
newline
bitfld.long 0x0 4. "ARROKIE,Autoreload register update OK Interrupt Enable" "0: ARROK interrupt disabled,1: ARROK interrupt enabled"
bitfld.long 0x0 2. "EXTTRIGIE,External trigger valid edge Interrupt Enable" "0: EXTTRIG interrupt disabled,1: EXTTRIG interrupt enabled"
newline
bitfld.long 0x0 1. "ARRMIE,Autoreload match Interrupt Enable" "0: ARRM interrupt disabled,1: ARRM interrupt enabled"
bitfld.long 0x0 0. "CC1IE,Capture/compare 1 interrupt enable" "0: Capture/compare 1 interrupt disabled,1: Capture/compare 1 interrupt enabled"
tree.end
tree.end
tree "LPUART (Universal Synchronous Asynchronous Receiver Transmitter)"
base ad:0x0
tree "LPUART1"
base ad:0x46002400
group.long 0x0++0x3
line.long 0x0 "LPUART_CR1_enabled,LPUART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF=1 in.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE=1 in.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TXFNF.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
group.long 0x0++0xF
line.long 0x0 "LPUART_CR1_disabled,LPUART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TXE =1.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
line.long 0x4 "LPUART_CR2,LPUART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
newline
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
newline
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
newline
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,1: Reserved.,2: 2 stop bits,3: Reserved"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
line.long 0x8 "LPUART_CR3,LPUART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
newline
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
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bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
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bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
line.long 0xC "LPUART_BRR,LPUART baud rate register"
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)"
wgroup.long 0x18++0x3
line.long 0x0 "LPUART_RQR,LPUART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
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bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_enabled,LPUART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO is not Full.,1: RXFIFO is Full."
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO is not empty.,1: TXFIFO is empty."
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bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
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bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
newline
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
newline
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_disabled,LPUART interrupt and status register [alternate]"
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
newline
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
newline
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
newline
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "LPUART_RDR,LPUART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "LPUART_AUTOCR,LPUART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number"
tree.end
tree "SEC_LPUART1"
base ad:0x56002400
group.long 0x0++0x3
line.long 0x0 "LPUART_CR1_enabled,LPUART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when RXFF=1 in.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when TXFE=1 in.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TXFNF.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
group.long 0x0++0xF
line.long 0x0 "LPUART_CR1_disabled,LPUART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when the CMF bit.."
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
newline
bitfld.long 0x0 12. "M0,Word length" "0,1"
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
newline
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
newline
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever PE=1.."
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever TXE =1.."
newline
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever TC=1.."
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt is inhibited,1: A LPUART interrupt is generated whenever ORE=1.."
newline
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated whenever IDLE=1.."
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
newline
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
bitfld.long 0x0 1. "UESM,LPUART enable in low-power mode" "0: LPUART not functional in low-power mode.,1: LPUART functional in low-power mode."
newline
bitfld.long 0x0 0. "UE,LPUART enable" "0: LPUART prescaler and outputs disabled low-power..,1: LPUART enabled"
line.long 0x4 "LPUART_CR2,LPUART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the LPUART node"
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
newline
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
newline
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
newline
bitfld.long 0x4 12.--13. "STOP,STOP bits" "0: 1 stop bit,1: Reserved.,2: 2 stop bits,3: Reserved"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
line.long 0x8 "LPUART_CR3,LPUART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth.,1: TXFIFO reaches 1/4 of its depth.,?,3: TXFIFO reaches 3/4 of its depth.,4: TXFIFO reaches 7/8 of its depth.,5: TXFIFO becomes empty.,6: TXFIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: An LPUART interrupt is generated when Receive.."
newline
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth.,1: Receive FIFO reaches 1/4 of its depth.,?,3: Receive FIFO reaches 3/4 of its depth.,4: Receive FIFO reaches 7/8 of its depth.,5: Receive FIFO becomes full.,6: Receive FIFO reaches 1/2 of its depth.,?"
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt is inhibited,1: A LPUART interrupt is generated when TXFIFO.."
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
newline
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
newline
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
newline
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated when FE=1 or ORE=1 or.."
line.long 0xC "LPUART_BRR,LPUART baud rate register"
hexmask.long.tbyte 0xC 0.--19. 1. "BRR,LPUART baud rate division (LPUARTDIV)"
wgroup.long 0x18++0x3
line.long 0x0 "LPUART_RQR,LPUART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_enabled,LPUART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO is not Full.,1: RXFIFO is Full."
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO is not empty.,1: TXFIFO is empty."
newline
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
newline
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
newline
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
newline
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
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bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "LPUART_ISR_disabled,LPUART interrupt and status register [alternate]"
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
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bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
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bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
bitfld.long 0x0 16. "BUSY,Busy flag" "0: LPUART is idle (no reception),1: Reception on going"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
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bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register is full/Transmit FIFO is full.,1: Data register/Transmit FIFO is not full."
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
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bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
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bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
bitfld.long 0x0 2. "NE,Start bit noise detection flag" "0: No noise is detected,1: Noise is detected"
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bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "LPUART_ICR,LPUART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
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bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
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bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
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bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "LPUART_RDR,LPUART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "LPUART_TDR,LPUART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "LPUART_PRESC,LPUART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "LPUART_AUTOCR,LPUART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
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bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDC transmission data number"
tree.end
tree.end
tree "PKA (Private Key Accelerator)"
base ad:0x0
tree "PKA"
base ad:0x420C2000
group.long 0x0++0x3
line.long 0x0 "PKA_CR,PKA control register"
bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "0: No interrupt is generated when OPERRF flag is..,1: An interrupt is generated when OPERRF flag is.."
bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "0: No interrupt is generated when ADDRERRF flag is..,1: An interrupt is generated when ADDRERRF flag is.."
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bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "0: No interrupt is generated when RAMERRF flag is..,1: An interrupt is generated when RAMERRF flag is.."
bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "0: No interrupt is generated when PROCENDF flag is..,1: An interrupt is generated when PROCENDF flag is.."
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hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code"
bitfld.long 0x0 1. "START,start the operation" "0,1"
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bitfld.long 0x0 0. "EN,PKA enable." "0: Disable PKA,1: Enable PKA.PKA becomes functional when INITOK is.."
rgroup.long 0x4++0x3
line.long 0x0 "PKA_SR,PKA status register"
bitfld.long 0x0 21. "OPERRF,Operation error flag" "0: No event error,1: An illegal or unknown operation has been.."
bitfld.long 0x0 20. "ADDRERRF,Address error flag" "0: No address error,1: Address access is out of range (unmapped address)"
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bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "0: No PKA RAM access error,1: An AHB access to the PKA RAM occurred while the.."
bitfld.long 0x0 17. "PROCENDF,PKA End of Operation flag" "0: Operation in progress,1: PKA operation is completed. This flag is set.."
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bitfld.long 0x0 16. "BUSY,PKA operation is in progress" "0: No operation is in progress (default),1: An operation is in progress"
bitfld.long 0x0 1. "LMF,Limited mode flag" "0: All values documented in MODE bitfield can be..,1: Only ECDSA verification (MODE = 0x26) is.."
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bitfld.long 0x0 0. "INITOK,PKA initialization OK" "0: PKA is not initialized correctly. START bit..,1: PKA is initialized correctly and can be used.."
wgroup.long 0x8++0x3
line.long 0x0 "PKA_CLRFR,PKA clear flag register"
bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "0: No action,1: Clear the OPERRF flag in PKA_SR"
bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "0: No action,1: Clear the ADDRERRF flag in PKA_SR"
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bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "0: No action,1: Clear the RAMERRF flag in PKA_SR"
bitfld.long 0x0 17. "PROCENDFC,Clear PKA End of Operation flag" "0: No action,1: Clear the PROCENDF flag in PKA_SR"
tree.end
tree "SEC_PKA"
base ad:0x520C2000
group.long 0x0++0x3
line.long 0x0 "PKA_CR,PKA control register"
bitfld.long 0x0 21. "OPERRIE,Operation error interrupt enable" "0: No interrupt is generated when OPERRF flag is..,1: An interrupt is generated when OPERRF flag is.."
bitfld.long 0x0 20. "ADDRERRIE,Address error interrupt enable" "0: No interrupt is generated when ADDRERRF flag is..,1: An interrupt is generated when ADDRERRF flag is.."
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bitfld.long 0x0 19. "RAMERRIE,RAM error interrupt enable" "0: No interrupt is generated when RAMERRF flag is..,1: An interrupt is generated when RAMERRF flag is.."
bitfld.long 0x0 17. "PROCENDIE,End of operation interrupt enable" "0: No interrupt is generated when PROCENDF flag is..,1: An interrupt is generated when PROCENDF flag is.."
newline
hexmask.long.byte 0x0 8.--13. 1. "MODE,PKA operation code"
bitfld.long 0x0 1. "START,start the operation" "0,1"
newline
bitfld.long 0x0 0. "EN,PKA enable." "0: Disable PKA,1: Enable PKA.PKA becomes functional when INITOK is.."
rgroup.long 0x4++0x3
line.long 0x0 "PKA_SR,PKA status register"
bitfld.long 0x0 21. "OPERRF,Operation error flag" "0: No event error,1: An illegal or unknown operation has been.."
bitfld.long 0x0 20. "ADDRERRF,Address error flag" "0: No address error,1: Address access is out of range (unmapped address)"
newline
bitfld.long 0x0 19. "RAMERRF,PKA RAM error flag" "0: No PKA RAM access error,1: An AHB access to the PKA RAM occurred while the.."
bitfld.long 0x0 17. "PROCENDF,PKA End of Operation flag" "0: Operation in progress,1: PKA operation is completed. This flag is set.."
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bitfld.long 0x0 16. "BUSY,PKA operation is in progress" "0: No operation is in progress (default),1: An operation is in progress"
bitfld.long 0x0 1. "LMF,Limited mode flag" "0: All values documented in MODE bitfield can be..,1: Only ECDSA verification (MODE = 0x26) is.."
newline
bitfld.long 0x0 0. "INITOK,PKA initialization OK" "0: PKA is not initialized correctly. START bit..,1: PKA is initialized correctly and can be used.."
wgroup.long 0x8++0x3
line.long 0x0 "PKA_CLRFR,PKA clear flag register"
bitfld.long 0x0 21. "OPERRFC,Clear operation error flag" "0: No action,1: Clear the OPERRF flag in PKA_SR"
bitfld.long 0x0 20. "ADDRERRFC,Clear address error flag" "0: No action,1: Clear the ADDRERRF flag in PKA_SR"
newline
bitfld.long 0x0 19. "RAMERRFC,Clear PKA RAM error flag" "0: No action,1: Clear the RAMERRF flag in PKA_SR"
bitfld.long 0x0 17. "PROCENDFC,Clear PKA End of Operation flag" "0: No action,1: Clear the PROCENDF flag in PKA_SR"
tree.end
tree.end
tree "PWR (Power Control)"
base ad:0x0
tree "PWR"
base ad:0x46020800
group.long 0x0++0x1F
line.long 0x0 "PWR_CR1,PWR control register 1"
bitfld.long 0x0 12. "R1RSB1,SRAM1 retention in Standby mode" "0: SRAM1 content not retained in Standby mode,1: SRAM1 content retained in Standby mode"
bitfld.long 0x0 9. "RADIORSB,2.4 GHz RADIO SRAMs (RXTXRAM and Sequence RAM) and Sleep clock retention in Standby mode." "0: 2.4 GHz RADIO SRAMs and sleep timer content not..,1: 2.4 GHz RADIO SRAMs and sleep timer content.."
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bitfld.long 0x0 7. "ULPMEN,BOR0 ultra-low-power mode." "0: BOR0 operating in continuous (normal) mode in..,1: BOR0 operating in discontinuous.."
bitfld.long 0x0 5. "R2RSB1,SRAM2 retention in Standby mode" "0: SRAM2 content not retained in Standby mode,1: SRAM2 content retained in Standby mode"
newline
bitfld.long 0x0 0.--2. "LPMS,Low-power mode selection" "0: Stop 0 mode,1: Stop 1 mode,?,?,?,?,?,?"
line.long 0x4 "PWR_CR2,PWR control register 2"
bitfld.long 0x4 14. "FLASHFWU,Flash memory fast wakeup from Stop modes (Stop 0  1)" "0: Flash memory enters low-power mode in Stop 0 and..,1: Flash memory remains in normal mode in Stop 0.."
bitfld.long 0x4 8. "ICRAMPDS,ICACHE SRAM power-down in Stop modes (Stop 0  1)" "0: ICACHE SRAM content retained in Stop modes,1: ICACHE SRAM content lost in Stop modes"
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bitfld.long 0x4 4. "SRAM2PDS1,SRAM2 power-down in Stop modes (Stop 0  1)" "0: SRAM2 content retained in Stop modes,1: SRAM2 content lost in Stop modes"
bitfld.long 0x4 0. "SRAM1PDS1,SRAM1 power-down in Stop modes (Stop 0  1)" "0: SRAM1 content retained in Stop modes,1: SRAM1 content lost in Stop modes"
line.long 0x8 "PWR_CR3,PWR control register 3"
bitfld.long 0x8 2. "FSTEN,Fast soft start" "0: LDO fast startup disabled (limited inrush current),1: LDO fast startup enabled"
line.long 0xC "PWR_VOSR,PWR voltage scaling register"
bitfld.long 0xC 16. "VOS,Voltage scaling range selection" "0: Range 2 (lowest power),1: Range 1 (highest frequency)."
rbitfld.long 0xC 15. "VOSRDY,Ready bit for V<sub>CORE</sub> voltage scaling output selection" "0: Not ready voltage level < VOS selected level,1: Ready voltage level >= VOS selected level"
line.long 0x10 "PWR_SVMCR,PWR supply voltage monitoring control register"
bitfld.long 0x10 5.--7. "PVDLS,Programmable voltage detector level selection" "0: V<sub>PVD0</sub> ~ 2.0 V,1: V<sub>PVD1</sub> ~ 2.2 V,2: V<sub>PVD2</sub> ~ 2.4 V,3: V<sub>PVD3</sub> ~ 2.5 V,4: V<sub>PVD4</sub> ~ 2.6 V,5: V<sub>PVD5</sub> ~ 2.8 V,6: V<sub>PVD6</sub> ~ 2.9 V,7: External input analog voltage PVD_IN (compared.."
bitfld.long 0x10 4. "PVDE,Programmable voltage detector enable" "0: Programmable voltage detector disabled,1: Programmable voltage detector enabled"
line.long 0x14 "PWR_WUCR1,PWR wakeup control register 1"
bitfld.long 0x14 7. "WUPEN8,Wakeup and interrupt pin WKUP8 enable" "0: Wakeup and interrupt pin WKUP8 disabled,1: Wakeup and interrupt pin WKUP8 enabled"
bitfld.long 0x14 6. "WUPEN7,Wakeup and interrupt pin WKUP7 enable" "0: Wakeup and interrupt pin WKUP7 disabled,1: Wakeup and interrupt pin WKUP7 enabled"
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bitfld.long 0x14 5. "WUPEN6,Wakeup and interrupt pin WKUP6 enable" "0: Wakeup and interrupt pin WKUP6 disabled,1: Wakeup and interrupt pin WKUP6 enabled"
bitfld.long 0x14 4. "WUPEN5,Wakeup and interrupt pin WKUP5 enable" "0: Wakeup and interrupt pin WKUP5 disabled,1: Wakeup and interrupt pin WKUP5 enabled"
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bitfld.long 0x14 3. "WUPEN4,Wakeup and interrupt pin WKUP4 enable" "0: Wakeup and interrupt pin WKUP4 disabled,1: Wakeup and interrupt pin WKUP4 enabled"
bitfld.long 0x14 2. "WUPEN3,Wakeup and interrupt pin WKUP3 enable" "0: Wakeup and interrupt pin WKUP3 disabled,1: Wakeup and interrupt pin WKUP3 enabled"
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bitfld.long 0x14 1. "WUPEN2,Wakeup and interrupt pin WKUP2 enable" "0: Wakeup and interrupt pin WKUP2 disabled,1: Wakeup and interrupt pin WKUP2 enabled"
bitfld.long 0x14 0. "WUPEN1,Wakeup and interrupt pin WKUP1 enable" "0: Wakeup and interrupt pin WKUP1 disabled,1: Wakeup and interrupt pin WKUP1 enabled"
line.long 0x18 "PWR_WUCR2,PWR wakeup control register 2"
bitfld.long 0x18 7. "WUPP8,Wakeup pin WKUP8 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 6. "WUPP7,Wakeup pin WKUP7 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
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bitfld.long 0x18 5. "WUPP6,Wakeup pin WKUP6 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 4. "WUPP5,Wakeup pin WKUP5 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
newline
bitfld.long 0x18 3. "WUPP4,Wakeup pin WKUP4 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 2. "WUPP3,Wakeup pin WKUP3 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
newline
bitfld.long 0x18 1. "WUPP2,Wakeup pin WKUP2 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 0. "WUPP1,Wakeup pin WKUP1 polarity." "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
line.long 0x1C "PWR_WUCR3,PWR wakeup control register 3"
bitfld.long 0x1C 14.--15. "WUSEL8,Wakeup and interrupt pin WKUP8 selection" "0: reserved,1: WKUP8_1,2: WKUP8_2,3: WKUP8_3 (internal source does not generate a.."
bitfld.long 0x1C 12.--13. "WUSEL7,Wakeup and interrupt pin WKUP7 selection" "0: WKUP7_0,1: WKUP7_1,2: reserved,3: WKUP7_3 (internal source does not generate a.."
newline
bitfld.long 0x1C 10.--11. "WUSEL6,Wakeup and interrupt pin WKUP6 selection" "0: WKUP6_0,1: WKUP6_1,2: reserved,3: WKUP6_3 (internal source does not generate a.."
bitfld.long 0x1C 8.--9. "WUSEL5,Wakeup and interrupt pin WKUP5 selection" "0: reserved,1: WKUP5_1,2: WKUP5_2,3: reserved"
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bitfld.long 0x1C 6.--7. "WUSEL4,Wakeup and interrupt pin WKUP4 selection" "0: WKUP4_0,1: WKUP4_1,2: reserved,3: reserved"
bitfld.long 0x1C 4.--5. "WUSEL3,Wakeup and interrupt pin WKUP3 selection" "0: reserved,1: WKUP3_1,2: WKUP3_2,3: reserved"
newline
bitfld.long 0x1C 2.--3. "WUSEL2,Wakeup and interrupt pin WKUP2 selection" "0: reserved,1: WKUP2_1,2: reserved,3: reserved"
bitfld.long 0x1C 0.--1. "WUSEL1,Wakeup and interrupt pin WKUP1 selection" "0: WKUP1_0,1: WKUP1_1,2: reserved,3: reserved"
group.long 0x28++0x3
line.long 0x0 "PWR_DBPR,PWR disable Backup domain register"
bitfld.long 0x0 0. "DBP,Disable Backup domain write protection" "0: Write access to Backup domain disabled,1: Write access to Backup domain enabled"
group.long 0x30++0xB
line.long 0x0 "PWR_SECCFGR,PWR security configuration register"
bitfld.long 0x0 14. "VBSEC,Backup domain secure protection" "0: PWR_DBPR can be read and written with secure or..,1: PWR_DBPR can be read and written only with.."
bitfld.long 0x0 13. "VDMSEC,Voltage detection secure protection" "0: PWR_SVMCR and PWR_CR3 can be read and written..,1: PWR_SVMCR and PWR_CR3 can be read and written.."
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bitfld.long 0x0 12. "LPMSEC,Low-power modes secure protection" "0: PWR_CR1 PWR_CR2 and CSSF in the PWR_SR can be..,1: PWR_CR1 PWR_CR2 and CSSF in the PWR_SR can be.."
bitfld.long 0x0 7. "WUP8SEC,WUP8 secure protection" "0: Bits related to the WKUP8 pin in PWR_WUCR1..,1: Bits related to the WKUP8 pin in PWR_WUCR1.."
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bitfld.long 0x0 6. "WUP7SEC,WUP7 secure protection" "0: Bits related to the WKUP7 pin in PWR_WUCR1..,1: Bits related to the WKUP7 pin in PWR_WUCR1.."
bitfld.long 0x0 5. "WUP6SEC,WUP6 secure protection" "0: Bits related to the WKUP6 pin in PWR_WUCR1..,1: Bits related to the WKUP6 pin in PWR_WUCR1.."
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bitfld.long 0x0 4. "WUP5SEC,WUP5 secure protection" "0: Bits related to the WKUP5 pin in PWR_WUCR1..,1: Bits related to the WKUP5 pin in PWR_WUCR1.."
bitfld.long 0x0 3. "WUP4SEC,WUP4 secure protection" "0: Bits related to the WKUP4 pin in PWR_WUCR1..,1: Bits related to the WKUP4 pin in PWR_WUCR1.."
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bitfld.long 0x0 2. "WUP3SEC,WUP3 secure protection" "0: Bits related to the WKUP3 pin in PWR_WUCR1..,1: Bits related to the WKUP3 pin in PWR_WUCR1.."
bitfld.long 0x0 1. "WUP2SEC,WUP2 secure protection" "0: Bits related to the WKUP2 pin in PWR_WUCR1..,1: Bits related to the WKUP2 pin in PWR_WUCR1.."
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bitfld.long 0x0 0. "WUP1SEC,WUP1 secure protection" "0: Bits related to the WKUP1 pin in PWR_WUCR1..,1: Bits related to the WKUP1 pin in PWR_WUCR1.."
line.long 0x4 "PWR_PRIVCFGR,PWR privilege control register"
bitfld.long 0x4 1. "NSPRIV,PWR non-secure functions privilege configuration" "0: Read and write to PWR non-secure functions can..,1: Read and write to PWR non-secure functions can.."
bitfld.long 0x4 0. "SPRIV,PWR secure functions privilege configuration" "0: Read and write to PWR secure functions can be..,1: Read and write to PWR secure functions can be.."
line.long 0x8 "PWR_SR,PWR status register"
rbitfld.long 0x8 2. "SBF,Standby flag" "0: The device did not enter Standby mode.,1: The device entered Standby mode."
rbitfld.long 0x8 1. "STOPF,Stop flag" "0: The device did not enter any Stop mode.,1: The device entered a Stop mode."
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bitfld.long 0x8 0. "CSSF,Clear Stop and Standby flags" "0,1"
rgroup.long 0x3C++0x3
line.long 0x0 "PWR_SVMSR,PWR supply voltage monitoring status register"
bitfld.long 0x0 16. "ACTVOS,VOS currently applied to V<sub>CORE</sub>" "0: Range 2 (lowest power),1: Range 1 (highest frequency)"
bitfld.long 0x0 15. "ACTVOSRDY,Voltage level ready for currently used VOS" "0: V<sub>CORE</sub> is above or below the current..,1: V<sub>CORE </sub>is equal to the current voltage.."
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bitfld.long 0x0 4. "PVDO,Programmable voltage detector output" "0: V<sub>DD</sub> is equal or above the PVD..,1: V<sub>DD </sub>is below the PVD threshold.."
rgroup.long 0x44++0x3
line.long 0x0 "PWR_WUSR,PWR wakeup status register"
bitfld.long 0x0 7. "WUF8,Wakeup and interrupt pending flag 8" "0,1"
bitfld.long 0x0 6. "WUF7,Wakeup and interrupt pending flag 7" "0,1"
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bitfld.long 0x0 5. "WUF6,Wakeup and interrupt pending flag 6" "0,1"
bitfld.long 0x0 4. "WUF5,Wakeup and interrupt pending flag 5" "0,1"
newline
bitfld.long 0x0 3. "WUF4,Wakeup and interrupt pending flag 4" "0,1"
bitfld.long 0x0 2. "WUF3,Wakeup and interrupt pending flag 3" "0,1"
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bitfld.long 0x0 1. "WUF2,Wakeup and interrupt pending flag 2" "0,1"
bitfld.long 0x0 0. "WUF1,Wakeup and interrupt pending flag 1" "0,1"
wgroup.long 0x48++0x3
line.long 0x0 "PWR_WUSCR,PWR wakeup status clear register"
bitfld.long 0x0 7. "CWUF8,Clear wakeup flag 8" "0,1"
bitfld.long 0x0 6. "CWUF7,Clear wakeup flag 7" "0,1"
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bitfld.long 0x0 5. "CWUF6,Clear wakeup flag 6" "0,1"
bitfld.long 0x0 4. "CWUF5,Clear wakeup flag 5" "0,1"
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bitfld.long 0x0 3. "CWUF4,Clear wakeup flag 4" "0,1"
bitfld.long 0x0 2. "CWUF3,Clear wakeup flag 3" "0,1"
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bitfld.long 0x0 1. "CWUF2,Clear wakeup flag 2" "0,1"
bitfld.long 0x0 0. "CWUF1,Clear wakeup flag 1" "0,1"
group.long 0x50++0x17
line.long 0x0 "PWR_IORETENRA,PWR port A Standby IO retention enable register"
bitfld.long 0x0 15. "EN15,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 14. "EN14,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
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bitfld.long 0x0 13. "EN13,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 12. "EN12,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
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bitfld.long 0x0 11. "EN11,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 10. "EN10,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 9. "EN9,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 8. "EN8,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 7. "EN7,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 6. "EN6,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 5. "EN5,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 3. "EN3,Port A Standby GPIO retention enable" "0,1"
newline
bitfld.long 0x0 2. "EN2,Port A Standby GPIO retention enable" "0,1"
bitfld.long 0x0 1. "EN1,Port A Standby GPIO retention enable" "0,1"
newline
bitfld.long 0x0 0. "EN0,Port A Standby GPIO retention enable" "0,1"
line.long 0x4 "PWR_IORETRA,PWR port A Standby IO retention status register"
bitfld.long 0x4 15. "RET15,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 14. "RET14,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 13. "RET13,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 12. "RET12,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 11. "RET11,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 10. "RET10,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 9. "RET9,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 8. "RET8,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 7. "RET7,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 6. "RET6,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 5. "RET5,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 3. "RET3,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 2. "RET2,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 1. "RET1,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 0. "RET0,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
line.long 0x8 "PWR_IORETENRB,PWR port B Standby IO retention enable register"
bitfld.long 0x8 15. "EN15,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 14. "EN14,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 13. "EN13,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 12. "EN12,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 11. "EN11,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 10. "EN10,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 9. "EN9,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 8. "EN8,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 7. "EN7,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 6. "EN6,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 5. "EN5,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 4. "EN4,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 3. "EN3,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 2. "EN2,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 1. "EN1,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 0. "EN0,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
line.long 0xC "PWR_IORETRB,PWR port B Standby IO retention status register"
bitfld.long 0xC 15. "RET15,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 14. "RET14,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 13. "RET13,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 12. "RET12,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 11. "RET11,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 10. "RET10,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 9. "RET9,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 8. "RET8,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 7. "RET7,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 6. "RET6,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 5. "RET5,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 4. "RET4,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 3. "RET3,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 2. "RET2,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 1. "RET1,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 0. "RET0,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
line.long 0x10 "PWR_IORETENRC,PWR port C Standby IO retention enable register"
bitfld.long 0x10 15. "EN15,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
bitfld.long 0x10 14. "EN14,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
newline
bitfld.long 0x10 13. "EN13,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
line.long 0x14 "PWR_IORETRC,PWR port C Standby IO retention status register"
bitfld.long 0x14 15. "RET15,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
bitfld.long 0x14 14. "RET14,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
newline
bitfld.long 0x14 13. "RET13,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
group.long 0x88++0x7
line.long 0x0 "PWR_IORETENRH,PWR port H Standby IO retention enable register"
bitfld.long 0x0 3. "EN3,Port H Standby GPIO retention enable" "0: PHy Standby GPIO retention feature disabled.,1: PHy Standby GPIO retention feature enabled."
line.long 0x4 "PWR_IORETRH,PWR port H Standby IO retention status register"
bitfld.long 0x4 3. "RET3,Port H Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PHy is enabled.."
rgroup.long 0x100++0x3
line.long 0x0 "PWR_RADIOSCR,PWR 2.4 GHz RADIO status and control register"
bitfld.long 0x0 15. "REGPARDYVDDRFPA,Ready bit for V<sub>DDHPA</sub> voltage level when selecting VDDRFPA input." "0: Not ready V<sub>DDHPA</sub> voltage level <..,1: Ready V<sub>DDHPA</sub> voltage level >=.."
hexmask.long.byte 0x0 8.--12. 1. "RFVDDHPA,2.4 GHz RADIO VDDHPA control word."
newline
bitfld.long 0x0 3. "ENCMODE,2.4 GHz RADIO encryption function operating mode" "0: 2.4 GHz RADIO encryption function disabled,1: 2.4 GHz RADIO encryption function enabled"
bitfld.long 0x0 2. "PHYMODE,2.4 GHz RADIO PHY operating mode" "0: 2.4 GHz RADIO Sleep mode,1: 2.4 GHz RADIO Standby mode"
newline
bitfld.long 0x0 0.--1. "MODE,2.4 GHz RADIO operating mode." "0: 2.4 GHz RADIO deep sleep mode,1: 2.4 GHz RADIO sleep mode,?,?"
tree.end
tree "SEC_PWR"
base ad:0x56020800
group.long 0x0++0x1F
line.long 0x0 "PWR_CR1,PWR control register 1"
bitfld.long 0x0 12. "R1RSB1,SRAM1 retention in Standby mode" "0: SRAM1 content not retained in Standby mode,1: SRAM1 content retained in Standby mode"
bitfld.long 0x0 9. "RADIORSB,2.4 GHz RADIO SRAMs (RXTXRAM and Sequence RAM) and Sleep clock retention in Standby mode." "0: 2.4 GHz RADIO SRAMs and sleep timer content not..,1: 2.4 GHz RADIO SRAMs and sleep timer content.."
newline
bitfld.long 0x0 7. "ULPMEN,BOR0 ultra-low-power mode." "0: BOR0 operating in continuous (normal) mode in..,1: BOR0 operating in discontinuous.."
bitfld.long 0x0 5. "R2RSB1,SRAM2 retention in Standby mode" "0: SRAM2 content not retained in Standby mode,1: SRAM2 content retained in Standby mode"
newline
bitfld.long 0x0 0.--2. "LPMS,Low-power mode selection" "0: Stop 0 mode,1: Stop 1 mode,?,?,?,?,?,?"
line.long 0x4 "PWR_CR2,PWR control register 2"
bitfld.long 0x4 14. "FLASHFWU,Flash memory fast wakeup from Stop modes (Stop 0  1)" "0: Flash memory enters low-power mode in Stop 0 and..,1: Flash memory remains in normal mode in Stop 0.."
bitfld.long 0x4 8. "ICRAMPDS,ICACHE SRAM power-down in Stop modes (Stop 0  1)" "0: ICACHE SRAM content retained in Stop modes,1: ICACHE SRAM content lost in Stop modes"
newline
bitfld.long 0x4 4. "SRAM2PDS1,SRAM2 power-down in Stop modes (Stop 0  1)" "0: SRAM2 content retained in Stop modes,1: SRAM2 content lost in Stop modes"
bitfld.long 0x4 0. "SRAM1PDS1,SRAM1 power-down in Stop modes (Stop 0  1)" "0: SRAM1 content retained in Stop modes,1: SRAM1 content lost in Stop modes"
line.long 0x8 "PWR_CR3,PWR control register 3"
bitfld.long 0x8 2. "FSTEN,Fast soft start" "0: LDO fast startup disabled (limited inrush current),1: LDO fast startup enabled"
line.long 0xC "PWR_VOSR,PWR voltage scaling register"
bitfld.long 0xC 16. "VOS,Voltage scaling range selection" "0: Range 2 (lowest power),1: Range 1 (highest frequency)."
rbitfld.long 0xC 15. "VOSRDY,Ready bit for V<sub>CORE</sub> voltage scaling output selection" "0: Not ready voltage level < VOS selected level,1: Ready voltage level >= VOS selected level"
line.long 0x10 "PWR_SVMCR,PWR supply voltage monitoring control register"
bitfld.long 0x10 5.--7. "PVDLS,Programmable voltage detector level selection" "0: V<sub>PVD0</sub> ~ 2.0 V,1: V<sub>PVD1</sub> ~ 2.2 V,2: V<sub>PVD2</sub> ~ 2.4 V,3: V<sub>PVD3</sub> ~ 2.5 V,4: V<sub>PVD4</sub> ~ 2.6 V,5: V<sub>PVD5</sub> ~ 2.8 V,6: V<sub>PVD6</sub> ~ 2.9 V,7: External input analog voltage PVD_IN (compared.."
bitfld.long 0x10 4. "PVDE,Programmable voltage detector enable" "0: Programmable voltage detector disabled,1: Programmable voltage detector enabled"
line.long 0x14 "PWR_WUCR1,PWR wakeup control register 1"
bitfld.long 0x14 7. "WUPEN8,Wakeup and interrupt pin WKUP8 enable" "0: Wakeup and interrupt pin WKUP8 disabled,1: Wakeup and interrupt pin WKUP8 enabled"
bitfld.long 0x14 6. "WUPEN7,Wakeup and interrupt pin WKUP7 enable" "0: Wakeup and interrupt pin WKUP7 disabled,1: Wakeup and interrupt pin WKUP7 enabled"
newline
bitfld.long 0x14 5. "WUPEN6,Wakeup and interrupt pin WKUP6 enable" "0: Wakeup and interrupt pin WKUP6 disabled,1: Wakeup and interrupt pin WKUP6 enabled"
bitfld.long 0x14 4. "WUPEN5,Wakeup and interrupt pin WKUP5 enable" "0: Wakeup and interrupt pin WKUP5 disabled,1: Wakeup and interrupt pin WKUP5 enabled"
newline
bitfld.long 0x14 3. "WUPEN4,Wakeup and interrupt pin WKUP4 enable" "0: Wakeup and interrupt pin WKUP4 disabled,1: Wakeup and interrupt pin WKUP4 enabled"
bitfld.long 0x14 2. "WUPEN3,Wakeup and interrupt pin WKUP3 enable" "0: Wakeup and interrupt pin WKUP3 disabled,1: Wakeup and interrupt pin WKUP3 enabled"
newline
bitfld.long 0x14 1. "WUPEN2,Wakeup and interrupt pin WKUP2 enable" "0: Wakeup and interrupt pin WKUP2 disabled,1: Wakeup and interrupt pin WKUP2 enabled"
bitfld.long 0x14 0. "WUPEN1,Wakeup and interrupt pin WKUP1 enable" "0: Wakeup and interrupt pin WKUP1 disabled,1: Wakeup and interrupt pin WKUP1 enabled"
line.long 0x18 "PWR_WUCR2,PWR wakeup control register 2"
bitfld.long 0x18 7. "WUPP8,Wakeup pin WKUP8 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 6. "WUPP7,Wakeup pin WKUP7 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
newline
bitfld.long 0x18 5. "WUPP6,Wakeup pin WKUP6 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 4. "WUPP5,Wakeup pin WKUP5 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
newline
bitfld.long 0x18 3. "WUPP4,Wakeup pin WKUP4 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 2. "WUPP3,Wakeup pin WKUP3 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
newline
bitfld.long 0x18 1. "WUPP2,Wakeup pin WKUP2 polarity" "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
bitfld.long 0x18 0. "WUPP1,Wakeup pin WKUP1 polarity." "0: Detection on high level (rising edge),1: Detection on low level (falling edge)"
line.long 0x1C "PWR_WUCR3,PWR wakeup control register 3"
bitfld.long 0x1C 14.--15. "WUSEL8,Wakeup and interrupt pin WKUP8 selection" "0: reserved,1: WKUP8_1,2: WKUP8_2,3: WKUP8_3 (internal source does not generate a.."
bitfld.long 0x1C 12.--13. "WUSEL7,Wakeup and interrupt pin WKUP7 selection" "0: WKUP7_0,1: WKUP7_1,2: reserved,3: WKUP7_3 (internal source does not generate a.."
newline
bitfld.long 0x1C 10.--11. "WUSEL6,Wakeup and interrupt pin WKUP6 selection" "0: WKUP6_0,1: WKUP6_1,2: reserved,3: WKUP6_3 (internal source does not generate a.."
bitfld.long 0x1C 8.--9. "WUSEL5,Wakeup and interrupt pin WKUP5 selection" "0: reserved,1: WKUP5_1,2: WKUP5_2,3: reserved"
newline
bitfld.long 0x1C 6.--7. "WUSEL4,Wakeup and interrupt pin WKUP4 selection" "0: WKUP4_0,1: WKUP4_1,2: reserved,3: reserved"
bitfld.long 0x1C 4.--5. "WUSEL3,Wakeup and interrupt pin WKUP3 selection" "0: reserved,1: WKUP3_1,2: WKUP3_2,3: reserved"
newline
bitfld.long 0x1C 2.--3. "WUSEL2,Wakeup and interrupt pin WKUP2 selection" "0: reserved,1: WKUP2_1,2: reserved,3: reserved"
bitfld.long 0x1C 0.--1. "WUSEL1,Wakeup and interrupt pin WKUP1 selection" "0: WKUP1_0,1: WKUP1_1,2: reserved,3: reserved"
group.long 0x28++0x3
line.long 0x0 "PWR_DBPR,PWR disable Backup domain register"
bitfld.long 0x0 0. "DBP,Disable Backup domain write protection" "0: Write access to Backup domain disabled,1: Write access to Backup domain enabled"
group.long 0x30++0xB
line.long 0x0 "PWR_SECCFGR,PWR security configuration register"
bitfld.long 0x0 14. "VBSEC,Backup domain secure protection" "0: PWR_DBPR can be read and written with secure or..,1: PWR_DBPR can be read and written only with.."
bitfld.long 0x0 13. "VDMSEC,Voltage detection secure protection" "0: PWR_SVMCR and PWR_CR3 can be read and written..,1: PWR_SVMCR and PWR_CR3 can be read and written.."
newline
bitfld.long 0x0 12. "LPMSEC,Low-power modes secure protection" "0: PWR_CR1 PWR_CR2 and CSSF in the PWR_SR can be..,1: PWR_CR1 PWR_CR2 and CSSF in the PWR_SR can be.."
bitfld.long 0x0 7. "WUP8SEC,WUP8 secure protection" "0: Bits related to the WKUP8 pin in PWR_WUCR1..,1: Bits related to the WKUP8 pin in PWR_WUCR1.."
newline
bitfld.long 0x0 6. "WUP7SEC,WUP7 secure protection" "0: Bits related to the WKUP7 pin in PWR_WUCR1..,1: Bits related to the WKUP7 pin in PWR_WUCR1.."
bitfld.long 0x0 5. "WUP6SEC,WUP6 secure protection" "0: Bits related to the WKUP6 pin in PWR_WUCR1..,1: Bits related to the WKUP6 pin in PWR_WUCR1.."
newline
bitfld.long 0x0 4. "WUP5SEC,WUP5 secure protection" "0: Bits related to the WKUP5 pin in PWR_WUCR1..,1: Bits related to the WKUP5 pin in PWR_WUCR1.."
bitfld.long 0x0 3. "WUP4SEC,WUP4 secure protection" "0: Bits related to the WKUP4 pin in PWR_WUCR1..,1: Bits related to the WKUP4 pin in PWR_WUCR1.."
newline
bitfld.long 0x0 2. "WUP3SEC,WUP3 secure protection" "0: Bits related to the WKUP3 pin in PWR_WUCR1..,1: Bits related to the WKUP3 pin in PWR_WUCR1.."
bitfld.long 0x0 1. "WUP2SEC,WUP2 secure protection" "0: Bits related to the WKUP2 pin in PWR_WUCR1..,1: Bits related to the WKUP2 pin in PWR_WUCR1.."
newline
bitfld.long 0x0 0. "WUP1SEC,WUP1 secure protection" "0: Bits related to the WKUP1 pin in PWR_WUCR1..,1: Bits related to the WKUP1 pin in PWR_WUCR1.."
line.long 0x4 "PWR_PRIVCFGR,PWR privilege control register"
bitfld.long 0x4 1. "NSPRIV,PWR non-secure functions privilege configuration" "0: Read and write to PWR non-secure functions can..,1: Read and write to PWR non-secure functions can.."
bitfld.long 0x4 0. "SPRIV,PWR secure functions privilege configuration" "0: Read and write to PWR secure functions can be..,1: Read and write to PWR secure functions can be.."
line.long 0x8 "PWR_SR,PWR status register"
rbitfld.long 0x8 2. "SBF,Standby flag" "0: The device did not enter Standby mode.,1: The device entered Standby mode."
rbitfld.long 0x8 1. "STOPF,Stop flag" "0: The device did not enter any Stop mode.,1: The device entered a Stop mode."
newline
bitfld.long 0x8 0. "CSSF,Clear Stop and Standby flags" "0,1"
rgroup.long 0x3C++0x3
line.long 0x0 "PWR_SVMSR,PWR supply voltage monitoring status register"
bitfld.long 0x0 16. "ACTVOS,VOS currently applied to V<sub>CORE</sub>" "0: Range 2 (lowest power),1: Range 1 (highest frequency)"
bitfld.long 0x0 15. "ACTVOSRDY,Voltage level ready for currently used VOS" "0: V<sub>CORE</sub> is above or below the current..,1: V<sub>CORE </sub>is equal to the current voltage.."
newline
bitfld.long 0x0 4. "PVDO,Programmable voltage detector output" "0: V<sub>DD</sub> is equal or above the PVD..,1: V<sub>DD </sub>is below the PVD threshold.."
rgroup.long 0x44++0x3
line.long 0x0 "PWR_WUSR,PWR wakeup status register"
bitfld.long 0x0 7. "WUF8,Wakeup and interrupt pending flag 8" "0,1"
bitfld.long 0x0 6. "WUF7,Wakeup and interrupt pending flag 7" "0,1"
newline
bitfld.long 0x0 5. "WUF6,Wakeup and interrupt pending flag 6" "0,1"
bitfld.long 0x0 4. "WUF5,Wakeup and interrupt pending flag 5" "0,1"
newline
bitfld.long 0x0 3. "WUF4,Wakeup and interrupt pending flag 4" "0,1"
bitfld.long 0x0 2. "WUF3,Wakeup and interrupt pending flag 3" "0,1"
newline
bitfld.long 0x0 1. "WUF2,Wakeup and interrupt pending flag 2" "0,1"
bitfld.long 0x0 0. "WUF1,Wakeup and interrupt pending flag 1" "0,1"
wgroup.long 0x48++0x3
line.long 0x0 "PWR_WUSCR,PWR wakeup status clear register"
bitfld.long 0x0 7. "CWUF8,Clear wakeup flag 8" "0,1"
bitfld.long 0x0 6. "CWUF7,Clear wakeup flag 7" "0,1"
newline
bitfld.long 0x0 5. "CWUF6,Clear wakeup flag 6" "0,1"
bitfld.long 0x0 4. "CWUF5,Clear wakeup flag 5" "0,1"
newline
bitfld.long 0x0 3. "CWUF4,Clear wakeup flag 4" "0,1"
bitfld.long 0x0 2. "CWUF3,Clear wakeup flag 3" "0,1"
newline
bitfld.long 0x0 1. "CWUF2,Clear wakeup flag 2" "0,1"
bitfld.long 0x0 0. "CWUF1,Clear wakeup flag 1" "0,1"
group.long 0x50++0x17
line.long 0x0 "PWR_IORETENRA,PWR port A Standby IO retention enable register"
bitfld.long 0x0 15. "EN15,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 14. "EN14,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 13. "EN13,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 12. "EN12,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 11. "EN11,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 10. "EN10,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 9. "EN9,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 8. "EN8,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 7. "EN7,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 6. "EN6,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
newline
bitfld.long 0x0 5. "EN5,Port A Standby GPIO retention enable" "0: PAy Standby GPIO retention feature disabled.,1: PAy Standby GPIO retention feature enabled."
bitfld.long 0x0 3. "EN3,Port A Standby GPIO retention enable" "0,1"
newline
bitfld.long 0x0 2. "EN2,Port A Standby GPIO retention enable" "0,1"
bitfld.long 0x0 1. "EN1,Port A Standby GPIO retention enable" "0,1"
newline
bitfld.long 0x0 0. "EN0,Port A Standby GPIO retention enable" "0,1"
line.long 0x4 "PWR_IORETRA,PWR port A Standby IO retention status register"
bitfld.long 0x4 15. "RET15,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 14. "RET14,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 13. "RET13,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 12. "RET12,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 11. "RET11,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 10. "RET10,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 9. "RET9,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 8. "RET8,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 7. "RET7,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 6. "RET6,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 5. "RET5,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 3. "RET3,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 2. "RET2,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
bitfld.long 0x4 1. "RET1,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
newline
bitfld.long 0x4 0. "RET0,Port A Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PAy is enabled.."
line.long 0x8 "PWR_IORETENRB,PWR port B Standby IO retention enable register"
bitfld.long 0x8 15. "EN15,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 14. "EN14,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 13. "EN13,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 12. "EN12,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 11. "EN11,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 10. "EN10,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 9. "EN9,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 8. "EN8,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 7. "EN7,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 6. "EN6,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 5. "EN5,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 4. "EN4,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 3. "EN3,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 2. "EN2,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
newline
bitfld.long 0x8 1. "EN1,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
bitfld.long 0x8 0. "EN0,Port B Standby GPIO retention enable" "0: PBy Standby GPIO retention feature disabled.,1: PBy Standby GPIO retention feature enabled."
line.long 0xC "PWR_IORETRB,PWR port B Standby IO retention status register"
bitfld.long 0xC 15. "RET15,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 14. "RET14,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 13. "RET13,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 12. "RET12,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 11. "RET11,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 10. "RET10,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 9. "RET9,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 8. "RET8,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 7. "RET7,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 6. "RET6,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 5. "RET5,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 4. "RET4,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 3. "RET3,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 2. "RET2,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
newline
bitfld.long 0xC 1. "RET1,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
bitfld.long 0xC 0. "RET0,Port B Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PBy is enabled.."
line.long 0x10 "PWR_IORETENRC,PWR port C Standby IO retention enable register"
bitfld.long 0x10 15. "EN15,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
bitfld.long 0x10 14. "EN14,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
newline
bitfld.long 0x10 13. "EN13,Port C Standby GPIO retention enable" "0: PCy Standby GPIO retention feature disabled.,1: PCy Standby GPIO retention feature enabled."
line.long 0x14 "PWR_IORETRC,PWR port C Standby IO retention status register"
bitfld.long 0x14 15. "RET15,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
bitfld.long 0x14 14. "RET14,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
newline
bitfld.long 0x14 13. "RET13,Port C Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PCy is enabled.."
group.long 0x88++0x7
line.long 0x0 "PWR_IORETENRH,PWR port H Standby IO retention enable register"
bitfld.long 0x0 3. "EN3,Port H Standby GPIO retention enable" "0: PHy Standby GPIO retention feature disabled.,1: PHy Standby GPIO retention feature enabled."
line.long 0x4 "PWR_IORETRH,PWR port H Standby IO retention status register"
bitfld.long 0x4 3. "RET3,Port H Standby GPIO retention active" "0: Cleared by software writing 0. Standby GPIO..,1: Set by hardware when Standby GPIO PHy is enabled.."
rgroup.long 0x100++0x3
line.long 0x0 "PWR_RADIOSCR,PWR 2.4 GHz RADIO status and control register"
bitfld.long 0x0 15. "REGPARDYVDDRFPA,Ready bit for V<sub>DDHPA</sub> voltage level when selecting VDDRFPA input." "0: Not ready V<sub>DDHPA</sub> voltage level <..,1: Ready V<sub>DDHPA</sub> voltage level >=.."
hexmask.long.byte 0x0 8.--12. 1. "RFVDDHPA,2.4 GHz RADIO VDDHPA control word."
newline
bitfld.long 0x0 3. "ENCMODE,2.4 GHz RADIO encryption function operating mode" "0: 2.4 GHz RADIO encryption function disabled,1: 2.4 GHz RADIO encryption function enabled"
bitfld.long 0x0 2. "PHYMODE,2.4 GHz RADIO PHY operating mode" "0: 2.4 GHz RADIO Sleep mode,1: 2.4 GHz RADIO Standby mode"
newline
bitfld.long 0x0 0.--1. "MODE,2.4 GHz RADIO operating mode." "0: 2.4 GHz RADIO deep sleep mode,1: 2.4 GHz RADIO sleep mode,?,?"
tree.end
tree.end
tree "RAMCFG (RAMs Configuration Controller)"
base ad:0x0
tree "RAMCFG"
base ad:0x40026000
group.long 0x0++0x3
line.long 0x0 "RAMCFG_M1CR,RAMCFG SRAM1 control register"
bitfld.long 0x0 16.--18. "WSC,SRAM1 wait state configuration" "0: Zero wait states,1: One wait state,?,?,?,?,?,7: Seven wait states"
bitfld.long 0x0 8. "SRAMER,SRAM1 erase" "0: No erase operation ongoing,1: Erase operation ongoing"
rgroup.long 0x8++0x3
line.long 0x0 "RAMCFG_M1ISR,RAMCFG SRAM1 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation." "0: No memory erase operation ongoing,1: Memory erase operation ongoing"
wgroup.long 0x28++0x3
line.long 0x0 "RAMCFG_M1ERKEYR,RAMCFG SRAM1 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
group.long 0x40++0x7
line.long 0x0 "RAMCFG_M2CR,RAMCFG SRAM2 control register"
bitfld.long 0x0 16.--18. "WSC,SRAM2 wait state configuration" "0: 0 wait state,1: 1 wait state,?,?,?,?,?,7: 7 wait states"
bitfld.long 0x0 8. "SRAMER,SRAM2 erase" "0: No erase operation ongoing,1: Erase operation ongoing"
newline
bitfld.long 0x0 4. "ALE,SRAM2 parity fail address latch enable" "0: Failing address not stored in the SRAM2 parity..,1: Failing address stored in the SRAM2 parity error.."
line.long 0x4 "RAMCFG_M2IER,RAMCFG SRAM2 interrupt enable register"
bitfld.long 0x4 3. "PENMI,Parity error NMI." "0: NMI not generated in case of parity error,1: NMI generated in case of parity error"
bitfld.long 0x4 1. "PEIE,Parity error interrupt enable" "0: Parity error interrupt disabled,1: Parity error interrupt enabled"
rgroup.long 0x48++0x3
line.long 0x0 "RAMCFG_M2ISR,RAMCFG SRAM2 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM2 busy with erase operation." "0: No memory erase operation ongoing,1: Memory erase operation ongoing"
bitfld.long 0x0 1. "PED,Parity error detected" "0: No parity error detected,1: Parity error detected"
rgroup.long 0x50++0x3
line.long 0x0 "RAMCFG_M2PEAR,RAMCFG SRAM2 parity error address register"
hexmask.long.byte 0x0 28.--31. 1. "BYTE,Byte parity error flag."
hexmask.long.byte 0x0 24.--27. 1. "ID,Parity error AHB bus master ID."
newline
hexmask.long.word 0x0 0.--15. 1. "PEA,Parity error SRAM word aligned address offset.PEA[1:0] read 0b00."
group.long 0x54++0xB
line.long 0x0 "RAMCFG_M2ICR,RAMCFG SRAM2 interrupt clear register"
bitfld.long 0x0 1. "CPED,Clear parity error detect bit" "0,1"
line.long 0x4 "RAMCFG_M2WPR1,RAMCFG SRAM2 write protection register 1"
bitfld.long 0x4 31. "P31WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 30. "P30WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 29. "P29WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 28. "P28WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 27. "P27WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 26. "P26WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 25. "P25WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 24. "P24WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 23. "P23WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 22. "P22WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 21. "P21WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 20. "P20WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 19. "P19WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 18. "P18WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 17. "P17WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 16. "P16WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 15. "P15WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 14. "P14WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 13. "P13WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 12. "P12WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 11. "P11WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 10. "P10WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 9. "P9WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 8. "P8WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 7. "P7WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 6. "P6WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 5. "P5WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 4. "P4WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 3. "P3WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 2. "P2WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 1. "P1WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 0. "P0WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
line.long 0x8 "RAMCFG_M2WPR2,RAMCFG SRAM2 write protection register 2"
bitfld.long 0x8 31. "P63WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 30. "P62WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 29. "P61WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 28. "P60WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 27. "P59WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 26. "P58WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 25. "P57WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 24. "P56WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 23. "P55WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 22. "P54WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 21. "P53WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 20. "P52WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 19. "P51WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 18. "P50WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 17. "P49WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 16. "P48WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 15. "P47WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 14. "P46WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 13. "P45WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 12. "P44WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 11. "P43WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 10. "P42WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 9. "P41WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 8. "P40WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 7. "P39WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 6. "P38WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 5. "P37WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 4. "P36WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 3. "P35WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 2. "P34WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 1. "P33WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 0. "P32WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
wgroup.long 0x68++0x3
line.long 0x0 "RAMCFG_M2ERKEYR,RAMCFG SRAM2 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
tree.end
tree "SEC_RAMCFG"
base ad:0x50026000
group.long 0x0++0x3
line.long 0x0 "RAMCFG_M1CR,RAMCFG SRAM1 control register"
bitfld.long 0x0 16.--18. "WSC,SRAM1 wait state configuration" "0: Zero wait states,1: One wait state,?,?,?,?,?,7: Seven wait states"
bitfld.long 0x0 8. "SRAMER,SRAM1 erase" "0: No erase operation ongoing,1: Erase operation ongoing"
rgroup.long 0x8++0x3
line.long 0x0 "RAMCFG_M1ISR,RAMCFG SRAM1 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM busy with erase operation." "0: No memory erase operation ongoing,1: Memory erase operation ongoing"
wgroup.long 0x28++0x3
line.long 0x0 "RAMCFG_M1ERKEYR,RAMCFG SRAM1 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
group.long 0x40++0x7
line.long 0x0 "RAMCFG_M2CR,RAMCFG SRAM2 control register"
bitfld.long 0x0 16.--18. "WSC,SRAM2 wait state configuration" "0: 0 wait state,1: 1 wait state,?,?,?,?,?,7: 7 wait states"
bitfld.long 0x0 8. "SRAMER,SRAM2 erase" "0: No erase operation ongoing,1: Erase operation ongoing"
newline
bitfld.long 0x0 4. "ALE,SRAM2 parity fail address latch enable" "0: Failing address not stored in the SRAM2 parity..,1: Failing address stored in the SRAM2 parity error.."
line.long 0x4 "RAMCFG_M2IER,RAMCFG SRAM2 interrupt enable register"
bitfld.long 0x4 3. "PENMI,Parity error NMI." "0: NMI not generated in case of parity error,1: NMI generated in case of parity error"
bitfld.long 0x4 1. "PEIE,Parity error interrupt enable" "0: Parity error interrupt disabled,1: Parity error interrupt enabled"
rgroup.long 0x48++0x3
line.long 0x0 "RAMCFG_M2ISR,RAMCFG SRAM2 interrupt status register"
bitfld.long 0x0 8. "SRAMBUSY,SRAM2 busy with erase operation." "0: No memory erase operation ongoing,1: Memory erase operation ongoing"
bitfld.long 0x0 1. "PED,Parity error detected" "0: No parity error detected,1: Parity error detected"
rgroup.long 0x50++0x3
line.long 0x0 "RAMCFG_M2PEAR,RAMCFG SRAM2 parity error address register"
hexmask.long.byte 0x0 28.--31. 1. "BYTE,Byte parity error flag."
hexmask.long.byte 0x0 24.--27. 1. "ID,Parity error AHB bus master ID."
newline
hexmask.long.word 0x0 0.--15. 1. "PEA,Parity error SRAM word aligned address offset.PEA[1:0] read 0b00."
group.long 0x54++0xB
line.long 0x0 "RAMCFG_M2ICR,RAMCFG SRAM2 interrupt clear register"
bitfld.long 0x0 1. "CPED,Clear parity error detect bit" "0,1"
line.long 0x4 "RAMCFG_M2WPR1,RAMCFG SRAM2 write protection register 1"
bitfld.long 0x4 31. "P31WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 30. "P30WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 29. "P29WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 28. "P28WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 27. "P27WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 26. "P26WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 25. "P25WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 24. "P24WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 23. "P23WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 22. "P22WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 21. "P21WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 20. "P20WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 19. "P19WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 18. "P18WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 17. "P17WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 16. "P16WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 15. "P15WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 14. "P14WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 13. "P13WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 12. "P12WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 11. "P11WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 10. "P10WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 9. "P9WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 8. "P8WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 7. "P7WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 6. "P6WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 5. "P5WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 4. "P4WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 3. "P3WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 2. "P2WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x4 1. "P1WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x4 0. "P0WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
line.long 0x8 "RAMCFG_M2WPR2,RAMCFG SRAM2 write protection register 2"
bitfld.long 0x8 31. "P63WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 30. "P62WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 29. "P61WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 28. "P60WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 27. "P59WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 26. "P58WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 25. "P57WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 24. "P56WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 23. "P55WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 22. "P54WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 21. "P53WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 20. "P52WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 19. "P51WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 18. "P50WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 17. "P49WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 16. "P48WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 15. "P47WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 14. "P46WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 13. "P45WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 12. "P44WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 11. "P43WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 10. "P42WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 9. "P41WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 8. "P40WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 7. "P39WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 6. "P38WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 5. "P37WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 4. "P36WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 3. "P35WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 2. "P34WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
newline
bitfld.long 0x8 1. "P33WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
bitfld.long 0x8 0. "P32WP,SRAM2 1-Kbyte write protect page y write protection" "0: Write protection of SRAM2 1-Kbyte write protect..,1: Kbyte write protect page y write protection"
wgroup.long 0x68++0x3
line.long 0x0 "RAMCFG_M2ERKEYR,RAMCFG SRAM2 erase key register"
hexmask.long.byte 0x0 0.--7. 1. "ERASEKEY,Erase write protection key"
tree.end
tree.end
tree "RCC (Reset and Clock Control)"
base ad:0x0
tree "RCC"
base ad:0x46020C00
group.long 0x0++0x3
line.long 0x0 "RCC_CR,RCC clock control register"
rbitfld.long 0x0 25. "PLL1RDY,PLL1 clock ready flag" "0: PLL1 unlocked,1: PLL1 locked (PLL1RDY remains set when PLL1 is.."
newline
bitfld.long 0x0 24. "PLL1ON,PLL1 enable" "0: PLL1 off,1: PLL1 on"
newline
bitfld.long 0x0 20. "HSEPRE,HSE32 clock for SYSCLK prescaler" "0: HSE32 not divided SYSCLK = HSE32,1: HSE32 divided SYSCLK = HSE32/2"
newline
bitfld.long 0x0 19. "HSECSSON,HSE32 clock security system enable" "0: HSE32 clock security system off (clock detector..,1: HSE32 clock security system on (clock detector.."
newline
rbitfld.long 0x0 17. "HSERDY,HSE32 clock ready flag" "0: HSE32 oscillator not ready,1: HSE32 oscillator ready to be used by the CPU.."
newline
bitfld.long 0x0 16. "HSEON,HSE32 clock enable" "0: HSE32 oscillator not requested by the CPU.,1: HSE32 oscillator ON"
newline
rbitfld.long 0x0 10. "HSIRDY,HSI16 clock ready flag" "0: HSI16 oscillator not ready,1: HSI16 oscillator ready"
newline
bitfld.long 0x0 9. "HSIKERON,HSI16 enable for some peripheral kernels" "0: No effect on HSI16 oscillator,1: HSI16 oscillator forced on even in Stop mode"
newline
bitfld.long 0x0 8. "HSION,HSI16 clock enable" "0: HSI16 oscillator off,1: HSI16 oscillator on"
group.long 0x10++0x3
line.long 0x0 "RCC_ICSCR3,RCC internal clock sources calibration register 3"
hexmask.long.byte 0x0 16.--20. 1. "HSITRIM,HSI16 clock trimming"
newline
hexmask.long.word 0x0 0.--11. 1. "HSICAL,HSI16 clock calibration"
group.long 0x1C++0xF
line.long 0x0 "RCC_CFGR1,RCC clock configuration register 1"
bitfld.long 0x0 28.--30. "MCOPRE,microcontroller clock output prescaler" "0: MCO divided by 1,1: MCO divided by 2,2: MCO divided by 4,3: MCO divided by 8,4: MCO divided by 16,?,?,?"
newline
hexmask.long.byte 0x0 24.--27. 1. "MCOSEL,microcontroller clock output"
newline
rbitfld.long 0x0 2.--3. "SWS,system clock switch status" "0: HSI16 oscillator used as system clock,1: reserved,2: HSE32 or HSE32/2 as defined by HSEPRE used as..,3: pll1rclk used as system clock"
newline
bitfld.long 0x0 0.--1. "SW,system clock switch" "0: HSI16 selected as system clock,1: reserved,2: HSE32 or HSE32/2 as defined by HSEPRE selected..,3: pll1rclk selected as system clock"
line.long 0x4 "RCC_CFGR2,RCC clock configuration register 2"
bitfld.long 0x4 8.--10. "PPRE2,APB2 prescaler" "?,?,2: hclk1 not divided,?,4: pclk2 = hclk1 divided by 2,5: pclk2 = hclk1 divided by 4,6: pclk2 = hclk1 divided by 8,7: pclk2 = hclk1 divided by 16"
newline
bitfld.long 0x4 4.--6. "PPRE1,APB1 prescaler" "?,1: hclk1 not divided,?,?,4: pclk1 = hclk1 divided by 2,5: pclk1 = hclk1 divided by 4,6: pclk1 = hclk1 divided by 8,7: pclk1 = hclk1 divided by 16"
newline
bitfld.long 0x4 0.--2. "HPRE,AHB1  AHB2 and AHB4 prescaler" "?,1: SYSCLK not divided,?,?,4: hclk1 = SYSCLK divided by 2,5: hclk1 = SYSCLK divided by 4,6: hclk1 = SYSCLK divided by 8,7: hclk1 = SYSCLK divided by 16"
line.long 0x8 "RCC_CFGR3,RCC clock configuration register 3"
bitfld.long 0x8 4.--6. "PPRE7,APB7 prescaler" "?,?,?,?,4: hclk1 divided by 2,5: hclk1 divided by 4,6: hclk1 divided by 8,7: hclk1 divided by 16"
line.long 0xC "RCC_PLL1CFGR,RCC PLL1 configuration register"
rbitfld.long 0xC 22. "PLL1RCLKPRERDY,pll1rclkpre not divided ready." "0: pll1rclk divided,1: pll1rclk not divided ready"
newline
bitfld.long 0xC 21. "PLL1RCLKPRESTEP,pll1rclk clock for SYSCLK prescaler division step selection" "0: pll1rclk 2-step division,1: pll1rclk 3-step division"
newline
bitfld.long 0xC 20. "PLL1RCLKPRE,pll1rclk clock for SYSCLK prescaler division enable" "0: pll1rclk not divided sysclkpre = pll1rclk,1: pll1rclk divided sysclkpre = pll1rclk divided"
newline
bitfld.long 0xC 18. "PLL1REN,PLL1 DIVR divider output enable" "0: pll1rclk output disabled,1: pll1rclk output enabled"
newline
bitfld.long 0xC 17. "PLL1QEN,PLL1 DIVQ divider output enable" "0: pll1qclk output disabled,1: pll1qclk output enabled"
newline
bitfld.long 0xC 16. "PLL1PEN,PLL1 DIVP divider output enable" "0: pll1pclk output disabled,1: pll1pclk output enabled"
newline
bitfld.long 0xC 8.--10. "PLL1M,Prescaler for PLL1" "0: division by 1 (bypass),1: division by 2,2: division by 3,?,?,?,?,7: division by 8"
newline
bitfld.long 0xC 4. "PLL1FRACEN,PLL1 fractional latch enable" "?,1: the transition 0 to 1 transfers the content of.."
newline
bitfld.long 0xC 2.--3. "PLL1RGE,PLL1 input frequency range" "?,?,?,3: PLL1 input (ref1_ck) clock range frequency.."
newline
bitfld.long 0xC 0.--1. "PLL1SRC,PLL1 entry clock source" "0: no clock sent to PLL1,1: reserved,2: HSI16 clock selected as PLL1 clock entry,3: HSE32 clock after HSEPRE divider selected as.."
group.long 0x34++0x7
line.long 0x0 "RCC_PLL1DIVR,RCC PLL1 dividers register"
hexmask.long.byte 0x0 24.--30. 1. "PLL1R,PLL1 DIVR division factor"
newline
hexmask.long.byte 0x0 16.--22. 1. "PLL1Q,PLL1 DIVQ division factor"
newline
hexmask.long.byte 0x0 9.--15. 1. "PLL1P,PLL1 DIVP division factor"
newline
hexmask.long.word 0x0 0.--8. 1. "PLL1N,Multiplication factor for PLL1 VCO"
line.long 0x4 "RCC_PLL1FRACR,RCC PLL1 fractional divider register"
hexmask.long.word 0x4 3.--15. 1. "PLL1FRACN,Fractional part of the multiplication factor for PLL1 VCO"
group.long 0x50++0x3
line.long 0x0 "RCC_CIER,RCC clock interrupt enable register"
bitfld.long 0x0 6. "PLL1RDYIE,PLL1 ready interrupt enable" "0: PLL1 lock interrupt disabled,1: PLL1 lock interrupt enabled"
newline
bitfld.long 0x0 4. "HSERDYIE,HSE32 ready interrupt enable" "0: HSE32 ready interrupt disabled,1: HSE32 ready interrupt enabled"
newline
bitfld.long 0x0 3. "HSIRDYIE,HSI16 ready interrupt enable" "0: HSI16 ready interrupt disabled,1: HSI16 ready interrupt enabled"
newline
bitfld.long 0x0 1. "LSERDYIE,LSE ready interrupt enable" "0: LSE ready interrupt disabled,1: LSE ready interrupt enabled"
newline
bitfld.long 0x0 0. "LSI1RDYIE,LSI1 ready interrupt enable" "0: LSI1 ready interrupt disabled,1: LSI1 ready interrupt enabled"
rgroup.long 0x54++0x3
line.long 0x0 "RCC_CIFR,RCC clock interrupt flag register"
bitfld.long 0x0 10. "HSECSSF,HSE32 clock security system interrupt flag" "0: no clock security interrupt caused by HSE32..,1: clock security interrupt caused by HSE32 clock.."
newline
bitfld.long 0x0 6. "PLL1RDYF,PLL1 ready interrupt flag" "0: no clock ready interrupt caused by PLL1 lock,1: clock ready interrupt caused by PLL1 lock"
newline
bitfld.long 0x0 4. "HSERDYF,HSE32 ready interrupt flag" "0: no clock ready interrupt caused by the HSE32..,1: clock ready interrupt caused by the HSE32.."
newline
bitfld.long 0x0 3. "HSIRDYF,HSI16 ready interrupt flag" "0: no clock ready interrupt caused by the HSI16..,1: clock ready interrupt caused by the HSI16.."
newline
bitfld.long 0x0 1. "LSERDYF,LSE ready interrupt flag" "0: no clock ready interrupt caused by the LSE..,1: clock ready interrupt caused by the LSE oscillator"
newline
bitfld.long 0x0 0. "LSI1RDYF,LSI1 ready interrupt flag" "0: no clock ready interrupt caused by the LSI1..,1: clock ready interrupt caused by the LSI1.."
wgroup.long 0x58++0x3
line.long 0x0 "RCC_CICR,RCC clock interrupt clear register"
bitfld.long 0x0 10. "HSECSSC,High speed external clock security system interrupt clear" "0,1"
newline
bitfld.long 0x0 6. "PLL1RDYC,PLL1 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 4. "HSERDYC,HSE32 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 3. "HSIRDYC,HSI16 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 1. "LSERDYC,LSE ready interrupt clear" "0,1"
newline
bitfld.long 0x0 0. "LSI1RDYC,LSI1 ready interrupt clear" "0,1"
group.long 0x60++0x7
line.long 0x0 "RCC_AHB1RSTR,RCC AHB1 peripheral reset register"
bitfld.long 0x0 16. "TSCRST,TSC reset" "0: No effect,1: Reset TSC"
newline
bitfld.long 0x0 12. "CRCRST,CRC reset" "0: No effect,1: Reset CRC"
newline
bitfld.long 0x0 0. "GPDMA1RST,GPDMA1 reset" "0: No effect,1: Reset GPDMA1"
line.long 0x4 "RCC_AHB2RSTR,RCC AHB2 peripheral reset register"
bitfld.long 0x4 21. "PKARST,PKA reset" "0: No effect,1: Reset PKA"
newline
bitfld.long 0x4 20. "HSEMRST,HSEM hardware accelerator reset" "0: No effect,1: Reset HSEM"
newline
bitfld.long 0x4 19. "SAESRST,SAES hardware accelerator reset" "0: No effect,1: Reset SAES"
newline
bitfld.long 0x4 18. "RNGRST,Random number generator reset" "0: No effect,1: Reset RNG"
newline
bitfld.long 0x4 17. "HASHRST,Hash reset" "0: No effect,1: Reset HASH"
newline
bitfld.long 0x4 16. "AESRST,AES hardware accelerator reset" "0: No effect,1: Reset AES"
newline
bitfld.long 0x4 7. "GPIOHRST,IO port H reset" "0: No effect,1: Reset IO port H"
newline
bitfld.long 0x4 2. "GPIOCRST,IO port C reset" "0: No effect,1: Reset IO port C"
newline
bitfld.long 0x4 1. "GPIOBRST,IO port B reset" "0: No effect,1: Reset IO port B"
newline
bitfld.long 0x4 0. "GPIOARST,IO port A reset" "0: No effect,1: Reset IO port A"
group.long 0x6C++0x17
line.long 0x0 "RCC_AHB4RSTR,RCC AHB4 peripheral reset register"
bitfld.long 0x0 5. "ADC4RST,ADC4 reset" "0: No effect,1: Reset ADC4 interface"
line.long 0x4 "RCC_AHB5RSTR,RCC AHB5 peripheral reset register"
bitfld.long 0x4 0. "RADIORST,2.4 GHz RADIO reset" "0: No effect,1: Reset 2.4 GHz RADIO"
line.long 0x8 "RCC_APB1RSTR1,RCC APB1 peripheral reset register 1"
bitfld.long 0x8 21. "I2C1RST,I2C1 reset" "0: No effect,1: Reset I2C1"
newline
bitfld.long 0x8 17. "USART2RST,USART2 reset" "0: No effect,1: Reset USART2"
newline
bitfld.long 0x8 1. "TIM3RST,TIM3 reset" "0: No effect,1: Reset TIM3"
newline
bitfld.long 0x8 0. "TIM2RST,TIM2 reset" "0: No effect,1: Reset TIM2"
line.long 0xC "RCC_APB1RSTR2,RCC APB1 peripheral reset register 2"
bitfld.long 0xC 5. "LPTIM2RST,LPTIM2 reset" "0: No effect,1: Reset LPTIM2"
line.long 0x10 "RCC_APB2RSTR,RCC APB2 peripheral reset register"
bitfld.long 0x10 18. "TIM17RST,TIM17 reset" "0: No effect,1: Reset TIM17"
newline
bitfld.long 0x10 17. "TIM16RST,TIM16 reset" "0: No effect,1: Reset TIM16"
newline
bitfld.long 0x10 14. "USART1RST,USART1 reset" "0: No effect,1: Reset USART1"
newline
bitfld.long 0x10 12. "SPI1RST,SPI1 reset" "0: No effect,1: Reset SPI1"
newline
bitfld.long 0x10 11. "TIM1RST,TIM1 reset" "0: No effect,1: Reset TIM1"
line.long 0x14 "RCC_APB7RSTR,RCC APB7 peripheral reset register"
bitfld.long 0x14 11. "LPTIM1RST,LPTIM1 reset" "0: No effect,1: Reset LPTIM1"
newline
bitfld.long 0x14 7. "I2C3RST,I2C3 reset" "0: No effect,1: Reset I2C3"
newline
bitfld.long 0x14 6. "LPUART1RST,LPUART1 reset" "0: No effect,1: Reset LPUART1"
newline
bitfld.long 0x14 5. "SPI3RST,SPI3 reset" "0: No effect,1: Reset SPI3"
newline
bitfld.long 0x14 1. "SYSCFGRST,SYSCFG reset" "0: No effect,1: Reset SYSCFG"
group.long 0x88++0x7
line.long 0x0 "RCC_AHB1ENR,RCC AHB1 peripheral clock enable register"
bitfld.long 0x0 31. "SRAM1EN,SRAM1 bus clock enable" "0: SRAM1 bus clock disabled,1: SRAM1 bus clock enabled"
newline
bitfld.long 0x0 24. "GTZC1EN,GTZC1 bus clock enable" "0: GTZC1 bus clock disabled,1: GTZC1 bus clock enabled"
newline
bitfld.long 0x0 17. "RAMCFGEN,RAMCFG bus clock enable" "0: RAMCFG bus clock disabled,1: RAMCFG bus clock enabled"
newline
bitfld.long 0x0 16. "TSCEN,Touch sensing controller bus clock enable" "0: TSC bus clock disabled,1: TSC bus clock enabled"
newline
bitfld.long 0x0 12. "CRCEN,CRC bus clock enable" "0: CRC bus clock disabled,1: CRC bus clock enabled"
newline
bitfld.long 0x0 8. "FLASHEN,FLASH bus clock enable" "0: FLASH bus clock disabled,1: FLASH bus clock enabled"
newline
bitfld.long 0x0 0. "GPDMA1EN,GPDMA1 bus clock enable" "0: GPDMA1 bus clock disabled,1: GPDMA1 bus clock enabled"
line.long 0x4 "RCC_AHB2ENR,RCC AHB2 peripheral clock enable register"
bitfld.long 0x4 30. "SRAM2EN,SRAM2 bus clock enable" "0: SRAM2 bus clock disabled,1: SRAM2 bus clock enabled"
newline
bitfld.long 0x4 21. "PKAEN,PKA bus clock enable" "0: PKA bus clock disabled,1: PKA bus clock enabled"
newline
bitfld.long 0x4 20. "HSEMEN,HSEM bus clock enable" "0: HSEM bus clock disabled,1: HSEM bus clock enabled"
newline
bitfld.long 0x4 19. "SAESEN,SAES bus clock enable" "0: SAES bus clock disabled,1: SAES bus clock enabled"
newline
bitfld.long 0x4 18. "RNGEN,RNG bus and kernel clocks enable" "0: RNG bus and kernel clocks disabled,1: RNG bus and kernel clocks enabled"
newline
bitfld.long 0x4 17. "HASHEN,HASH bus clock enable" "0: HASH bus clock disabled,1: HASH bus clock enabled"
newline
bitfld.long 0x4 16. "AESEN,AES bus clock enable" "0: AES bus clock disabled,1: AES bus clock enabled"
newline
bitfld.long 0x4 7. "GPIOHEN,IO port H bus clock enable" "0: IO port H bus clock disabled,1: IO port H bus clock enabled"
newline
bitfld.long 0x4 2. "GPIOCEN,IO port C bus clock enable" "0: IO port C bus clock disabled,1: IO port C bus clock enabled"
newline
bitfld.long 0x4 1. "GPIOBEN,IO port B bus clock enable" "0: IO port B bus clock disabled,1: IO port B bus clock enabled"
newline
bitfld.long 0x4 0. "GPIOAEN,IO port A bus clock enable" "0: IO port A bus clock disabled,1: IO port A bus clock enabled"
group.long 0x94++0x17
line.long 0x0 "RCC_AHB4ENR,RCC AHB4 peripheral clock enable register"
bitfld.long 0x0 5. "ADC4EN,ADC4 bus and kernel clocks enable" "0: ADC4 bus and kernel clocks disabled,1: ADC4 bus and kernel clocks enabled"
newline
bitfld.long 0x0 2. "PWREN,PWR bus clock enable" "0: PWR bus clock disabled,1: PWR bus clock enabled"
line.long 0x4 "RCC_AHB5ENR,RCC AHB5 peripheral clock enable register"
bitfld.long 0x4 0. "RADIOEN,2.4 GHz RADIO bus clock enable" "0: 2.4 GHz RADIO bus clock disabled (The 2.4 GHz..,1: 2.4 GHz RADIO bus clock enabled"
line.long 0x8 "RCC_APB1ENR1,RCC APB1 peripheral clock enable register 1"
bitfld.long 0x8 21. "I2C1EN,I2C1 bus and kernel clocks enable" "0: I2C1 bus and kernel clocks disabled,1: I2C1 bus and kernel clocks enabled"
newline
bitfld.long 0x8 17. "USART2EN,USART2 bus and kernel clocks enable" "0: USART2 bus and kernel clocks disabled,1: USART2 bus and kernel clocks enabled"
newline
bitfld.long 0x8 11. "WWDGEN,WWDG bus clock enable" "0: WWDG bus clock disabled,1: WWDG bus clock enabled"
newline
bitfld.long 0x8 1. "TIM3EN,TIM3 bus and kernel clocks enable" "0: TIM3 bus and kernel clocks disabled,1: TIM3 bus and kernel clocks enabled"
newline
bitfld.long 0x8 0. "TIM2EN,TIM2 bus and kernel clocks enable" "0: TIM2 bus and kernel clocks disabled,1: TIM2 bus and kernel clocks enabled"
line.long 0xC "RCC_APB1ENR2,RCC APB1 peripheral clock enable register 2"
bitfld.long 0xC 5. "LPTIM2EN,LPTIM2 bus and kernel clocks enable" "0: LPTIM2 bus and kernel clocks disabled,1: LPTIM2 bus and kernel clocks enabled"
line.long 0x10 "RCC_APB2ENR,RCC APB2 peripheral clock enable register"
bitfld.long 0x10 18. "TIM17EN,TIM17 bus and kernel clocks enable" "0: TIM17 bus and kernel clocks disabled,1: TIM17 bus and kernel clocks enabled"
newline
bitfld.long 0x10 17. "TIM16EN,TIM16 bus and kernel clocks enable" "0: TIM16 bus and kernel clocks disabled,1: TIM16 bus and kernel clocks enabled"
newline
bitfld.long 0x10 14. "USART1EN,USART1bus and kernel clocks enable" "0: USART1 bus and kernel clocks disabled,1: USART1 bus and kernel clocks enabled"
newline
bitfld.long 0x10 12. "SPI1EN,SPI1 bus and kernel clocks enable" "0: SPI1 bus and kernel clocks disabled,1: SPI1 bus and kernel clocks enabled"
newline
bitfld.long 0x10 11. "TIM1EN,TIM1 bus and kernel clocks enable" "0: TIM1 bus and kernel clocks disabled,1: TIM1 bus and kernel clocks enabled"
line.long 0x14 "RCC_APB7ENR,RCC APB7 peripheral clock enable register"
bitfld.long 0x14 21. "RTCAPBEN,RTC and TAMP bus clock enable" "0: RTC bus clock disabled,1: RTC bus clock enabled"
newline
bitfld.long 0x14 11. "LPTIM1EN,LPTIM1 bus and kernel clocks enable" "0: LPTIM1 bus and kernel clocks disabled,1: LPTIM1 bus and kernel clocks enabled"
newline
bitfld.long 0x14 7. "I2C3EN,I2C3 bus and kernel clocks enable" "0: I2C3 bus and kernel clocks disabled,1: I2C3 bus and kernel clocks enabled"
newline
bitfld.long 0x14 6. "LPUART1EN,LPUART1 bus and kernel clocks enable" "0: LPUART1 bus and kernel clocks disabled,1: LPUART1 bus and kernel clocks enabled"
newline
bitfld.long 0x14 5. "SPI3EN,SPI3 bus and kernel clocks enable" "0: SPI3 bus and kernel clocks disabled,1: SPI3 bus and kernel clocks enabled"
newline
bitfld.long 0x14 1. "SYSCFGEN,SYSCFG bus clock enable" "0: SYSCFG bus clock disabled,1: SYSCFG bus clock enabled"
group.long 0xB0++0x7
line.long 0x0 "RCC_AHB1SMENR,RCC AHB1 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x0 31. "SRAM1SMEN,SRAM1 bus clock enable during Sleep and Stop modes" "0: SRAM1 bus clock disabled by the clock gating..,1: SRAM1 bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 29. "ICACHESMEN,ICACHE bus clock enable during Sleep and Stop modes" "0: ICACHE bus clock disabled by the clock gating..,1: ICACHE bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 24. "GTZC1SMEN,GTZC1 bus clock enable during Sleep and Stop modes" "0: GTZC1 bus clock disabled by the clock gating..,1: GTZC1 bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 17. "RAMCFGSMEN,RAMCFG bus clock enable during Sleep and Stop modes" "0: RAMCFG bus clock disabled by the clock gating..,1: RAMCFG bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 16. "TSCSMEN,TSC bus clock enable during Sleep and Stop modes" "0: TSC bus clock disabled by the clock gating..,1: TSC bus clock enabled by the clock gating during.."
newline
bitfld.long 0x0 12. "CRCSMEN,CRC bus clock enable during Sleep and Stop modes" "0: CRC bus clock disabled by the clock gating..,1: CRC bus clock enabled by the clock gating during.."
newline
bitfld.long 0x0 8. "FLASHSMEN,FLASH bus clock enable during Sleep and Stop modes" "0: FLASH bus clock disabled by the clock gating..,1: FLASH bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 0. "GPDMA1SMEN,GPDMA1 bus clock enable during Sleep and Stop modes" "0: GPDMA1 bus clock disabled by the clock gating..,1: GPDMA1 bus clock enabled by the clock gating.."
line.long 0x4 "RCC_AHB2SMENR,RCC AHB2 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x4 30. "SRAM2SMEN,SRAM2 bus clock enable during Sleep and Stop modes" "0: SRAM2 bus clock disabled by the clock gating..,1: SRAM2 bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 21. "PKASMEN,PKA bus clock enable during Sleep and Stop modes" "0: PKA bus clock disabled by the clock gating..,1: PKA bus clock enabled by the clock gating during.."
newline
bitfld.long 0x4 19. "SAESSMEN,SAES accelerator bus clock enable during Sleep and Stop modes" "0: SAES bus clock disabled by the clock gating..,1: SAES bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 18. "RNGSMEN,Random number generator (RNG) bus and kernel clocks enable during Sleep and Stop modes" "0: RNG bus and kernel clocks disabled by the clock..,1: RNG bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x4 17. "HASHSMEN,HASH bus clock enable during Sleep and Stop modes" "0: HASH bus clock disabled by the clock gating..,1: HASH bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 16. "AESSMEN,AES bus clock enable during Sleep and Stop modes" "0: AES bus clock disabled by the clock gating..,1: AES bus clock enabled by the clock gating during.."
newline
bitfld.long 0x4 7. "GPIOHSMEN,IO port H bus clock enable during Sleep and Stop modes" "0: IO port H bus clock disabled by the clock gating..,1: IO port H bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 2. "GPIOCSMEN,IO port C bus clock enable during Sleep and Stop modes" "0: IO port C bus clock disabled by the clock gating..,1: IO port C bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 1. "GPIOBSMEN,IO port B bus clock enable during Sleep and Stop modes" "0: IO port B bus clock disabled by the clock gating..,1: IO port B bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 0. "GPIOASMEN,IO port A bus clock enable during Sleep and Stop modes" "0: IO port A bus clock disabled by the clock gating..,1: IO port A bus clock enabled by the clock gating.."
group.long 0xBC++0x17
line.long 0x0 "RCC_AHB4SMENR,RCC AHB4 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x0 5. "ADC4SMEN,ADC4 bus and kernel clocks enable during Sleep and Stop modes" "0: ADC4 bus and kernel clocks disabled by the clock..,1: ADC4 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x0 2. "PWRSMEN,PWR bus clock enable during Sleep and Stop modes" "0: PWR bus clock disabled by the clock gating..,1: PWR bus clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB5SMENR,RCC AHB5 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x4 0. "RADIOSMEN,2.4 GHz RADIO bus clock enable during Sleep and Stop modes when the 2.4 GHz RADIO is active." "0: 2.4 GHz RADIO bus clock disabled by the clock..,1: 2.4 GHz RADIO bus clock enabled by the clock.."
line.long 0x8 "RCC_APB1SMENR1,RCC APB1 peripheral clocks enable in Sleep and Stop modes register 1"
bitfld.long 0x8 21. "I2C1SMEN,I2C1 bus and kernel clocks enable during Sleep and Stop modes" "0: I2C1 bus and kernel clocks disabled by the clock..,1: I2C1 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x8 17. "USART2SMEN,USART2 bus and kernel clocks enable during Sleep and Stop modes" "0: USART2 bus and kernel clocks disabled by the..,1: USART2 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x8 11. "WWDGSMEN,Window watchdog bus clock enable during Sleep and Stop modes" "0: WWDG bus clock disabled by the clock gating..,1: WWDG bus clock enabled by the clock gating.."
newline
bitfld.long 0x8 1. "TIM3SMEN,TIM3 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM3 bus and kernel clocks disabled by the clock..,1: TIM3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x8 0. "TIM2SMEN,TIM2 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM2 bus and kernel clocks disabled by the clock..,1: TIM2 bus and kernel clocks enabled by the clock.."
line.long 0xC "RCC_APB1SMENR2,RCC APB1 peripheral clocks enable in Sleep and Stop modes register 2"
bitfld.long 0xC 5. "LPTIM2SMEN,LPTIM2 bus and kernel clocks enable during Sleep and Stop modes" "0: LPTIM2 bus and kernel clocks disabled by the..,1: LPTIM2 bus and kernel clocks enabled by the.."
line.long 0x10 "RCC_APB2SMENR,RCC APB2 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x10 18. "TIM17SMEN,TIM17 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM17 bus and kernel clocks disabled by the..,1: TIM17 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 17. "TIM16SMEN,TIM16 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM16 bus and kernel clocks disabled by the..,1: TIM16 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 14. "USART1SMEN,USART1 bus and kernel clocks enable during Sleep and Stop modes" "0: USART1 bus and kernel clocks disabled by the..,1: USART1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x10 12. "SPI1SMEN,SPI1 bus and kernel clocks enable during Sleep and Stop modes" "0: SPI1 bus and kernel clocks disabled by the clock..,1: SPI1 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 11. "TIM1SMEN,TIM1 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM1 bus and kernel clocks disabled by the clock..,1: TIM1 bus and kernel clocks enabled by the clock.."
line.long 0x14 "RCC_APB7SMENR,RCC APB7 peripheral clock enable in Sleep and Stop modes register"
bitfld.long 0x14 21. "RTCAPBSMEN,RTC and TAMP APB clock enable during Sleep and Stop modes" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
newline
bitfld.long 0x14 11. "LPTIM1SMEN,LPTIM1 bus and kernel clocks enable during Sleep and Stop modes" "0: LPTIM1 bus and kernel clocks disabled by the..,1: LPTIM1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x14 7. "I2C3SMEN,I2C3 bus and kernel clocks enable during Sleep and Stop modes" "0: I2C3 bus and kernel clocks disabled by the clock..,1: I2C3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x14 6. "LPUART1SMEN,LPUART1 bus and kernel clocks enable during Sleep and Stop modes" "0: LPUART1 bus and kernel clocks disabled by the..,1: LPUART1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x14 5. "SPI3SMEN,SPI3 bus and kernel clocks enable during Sleep and Stop modes" "0: SPI3 bus and kernel clocks disabled by the clock..,1: SPI3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x14 1. "SYSCFGSMEN,SYSCFG bus clock enable during Sleep and Stop modes" "0: SYSCFG bus clock disabled by the clock gating..,1: SYSCFG bus clock enabled by the clock gating.."
group.long 0xE0++0xB
line.long 0x0 "RCC_CCIPR1,RCC peripherals independent clock configuration register 1"
bitfld.long 0x0 31. "TIMICSEL,Clocks sources for TIM16 TIM17 and LPTIM2 internal input capture" "0: HSI16 divider disabled,1: HSI16/256 generated and can be selected by TIM16.."
newline
bitfld.long 0x0 22.--23. "SYSTICKSEL,SysTick clock source selection" "0: hclk1 divided by 8 selected,1: LSI selected,2: LSE selected,3: reserved"
newline
bitfld.long 0x0 20.--21. "SPI1SEL,SPI1 kernel clock source selection" "0: pclk2 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x0 18.--19. "LPTIM2SEL,Low-power timer 2 kernel clock source selection" "0: pclk1 selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x0 10.--11. "I2C1SEL,I2C1 kernel clock source selection" "0: pclk1 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x0 2.--3. "USART2SEL,USART2 kernel clock source selection" "0: pclk1 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x0 0.--1. "USART1SEL,USART1 kernel clock source selection" "0: pclk2 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
line.long 0x4 "RCC_CCIPR2,RCC peripherals independent clock configuration register 2"
bitfld.long 0x4 12.--13. "RNGSEL,RNGSEL kernel clock source selection" "0: LSE selected,1: LSI selected,2: HSI16 selected,3: pll1qclk divide by 2 selected"
line.long 0x8 "RCC_CCIPR3,RCC peripherals independent clock configuration register 3"
bitfld.long 0x8 12.--14. "ADCSEL,ADC4 kernel clock source selection" "0: hclk1 clock selected,1: SYSCLK selected,2: pll1pclk selected,3: HSE32 clock selected,4: HSI16 clock selected,?,?,?"
newline
bitfld.long 0x8 10.--11. "LPTIM1SEL,LPTIM1 kernel clock source selection" "0: pclk7 selected.,1: LSI selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x8 6.--7. "I2C3SEL,I2C3 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x8 3.--4. "SPI3SEL,SPI3 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x8 0.--1. "LPUART1SEL,LPUART1 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
group.long 0xF0++0x7
line.long 0x0 "RCC_BDCR1,RCC backup domain control register"
bitfld.long 0x0 28. "LSI1PREDIV,LSI1 Low-speed clock divider configuration" "0: LSI1 not divided,1: LSI1 divided by 128"
newline
rbitfld.long 0x0 27. "LSI1RDY,LSI1 oscillator ready" "0: LSI1 oscillator not ready,1: LSI1 oscillator ready"
newline
bitfld.long 0x0 26. "LSI1ON,LSI1 oscillator enable" "0: LSI1 oscillator off,1: LSI1 oscillator on"
newline
bitfld.long 0x0 25. "LSCOSEL,Low-speed clock output selection" "0: LSI clock selected,1: LSE clock selected"
newline
bitfld.long 0x0 24. "LSCOEN,Low-speed clock output (LSCO) enable" "0: LSCO disabled,1: LSCO enabled"
newline
bitfld.long 0x0 18.--19. "RADIOSTSEL,2.4 GHz RADIO sleep timer kernel clock enable and selection" "0: no clock selected 2.4 GHz RADIO sleep timer..,1: LSE oscillator clock selected,2: Reserved,3: HSE32 oscillator clock divided by 1000 selected"
newline
bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0: Reset not activated,1: Reset the entire Backup domain"
newline
bitfld.long 0x0 13.--14. "LSETRIM,LSE trimming" "0: current source resistance 5/4 x R,1: current source resistance R,2: current source resistance 3/4 x R,3: current source resistance 2/3 x R"
newline
bitfld.long 0x0 12. "LSEGFON,LSE clock glitch filter enable" "0: LSE glitch filter disabled,1: LSE glitch filter enabled"
newline
rbitfld.long 0x0 11. "LSESYSRDY,LSE system clock (LSESYS) ready" "0: LSESYS clock not ready,1: LSESYS clock ready"
newline
bitfld.long 0x0 8.--9. "RTCSEL,RTC and TAMP kernel clock source enable and selection" "0: no clock selected RTC and TAMP kernel clock..,1: LSE oscillator clock selected and enabled,2: LSI oscillator clock selected and enabled,3: HSE32 oscillator clock divided by 32 selected.."
newline
bitfld.long 0x0 7. "LSESYSEN,LSE system clock (LSESYS) enable" "0: LSESYS clock disabled,1: LSESYS clock enabled"
newline
rbitfld.long 0x0 6. "LSECSSD,Low speed external clock security  LSE failure Detection" "0: no failure detected on LSE,1: failure detected on LSE"
newline
bitfld.long 0x0 5. "LSECSSON,Low speed external clock security enable" "0: LSECSS disabled off,1: LSECSS enabled on"
newline
bitfld.long 0x0 3.--4. "LSEDRV,LSE oscillator drive capability" "0: reserved,1: 'Xtal mode' medium-low driving capability,2: 'Xtal mode' medium-high driving capability,3: 'Xtal mode' higher driving capability"
newline
bitfld.long 0x0 2. "LSEBYP,LSE oscillator bypass" "0: LSE oscillator 'Xtal' mode,1: LSE oscillator bypassed"
newline
rbitfld.long 0x0 1. "LSERDY,LSE oscillator ready" "0: LSE oscillator not ready,1: LSE oscillator ready"
newline
bitfld.long 0x0 0. "LSEON,LSE oscillator enable" "0: LSE oscillator off,1: LSE oscillator on"
line.long 0x4 "RCC_CSR,RCC control/status register"
rbitfld.long 0x4 31. "LPWRRSTF,Low-power reset flag" "0: no illegal mode reset occurred,1: illegal mode reset occurred"
newline
rbitfld.long 0x4 30. "WWDGRSTF,Window watchdog reset flag" "0: no window watchdog reset occurred,1: window watchdog reset occurred"
newline
rbitfld.long 0x4 29. "IWDGRSTF,Independent watchdog reset flag" "0: no independent watchdog reset occurred,1: independent watchdog reset occurred"
newline
rbitfld.long 0x4 28. "SFTRSTF,Software reset flag" "0: no software reset occurred,1: software reset occurred"
newline
rbitfld.long 0x4 27. "BORRSTF,BOR flag" "0: no BOR occurred,1: BOR occurred"
newline
rbitfld.long 0x4 26. "PINRSTF,NRST pin reset flag" "0: No reset from NRST pin occurred,1: Reset from NRST pin occurred"
newline
rbitfld.long 0x4 25. "OBLRSTF,Option byte loader reset flag" "0: No reset from option byte loading occurred,1: Reset from option byte loading occurred"
newline
bitfld.long 0x4 23. "RMVF,Remove reset flag" "0: No effect,1: Clear the reset flags (once set by software bit.."
group.long 0x110++0x7
line.long 0x0 "RCC_SECCFGR,RCC secure configuration register"
bitfld.long 0x0 12. "RMVFSEC,Remove reset flag security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 7. "PLL1SEC,PLL1 clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 6. "PRESCSEC,AHBx/APBx prescaler configuration bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 5. "SYSCLKSEC,SYSCLK selection  clock output on MCO configuration security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 4. "LSESEC,LSE clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 3. "LSISEC,LSI clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 1. "HSESEC,HSE32 clock configuration bits  status bits and HSECSS security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 0. "HSISEC,HSI16 clock configuration and status bits security" "0: Non secure,1: Secure"
line.long 0x4 "RCC_PRIVCFGR,RCC privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,RCC non-secure functions privilege configuration" "0: Read and write to RCC non-secure functions can..,1: Read and write to RCC non-secure functions can.."
newline
bitfld.long 0x4 0. "SPRIV,RCC secure functions privilege configuration" "0: Read and write to RCC secure functions can be..,1: Read and write to RCC secure functions can be.."
group.long 0x200++0x3
line.long 0x0 "RCC_CFGR4,RCC clock configuration register 2"
bitfld.long 0x0 4. "HDIV5,AHB5 divider when SWS select HSI16 or HSE32" "0: hclk5 = SYSCLK not divided,1: HDIV5 is taken not taken into account"
newline
bitfld.long 0x0 0.--2. "HPRE5,AHB5 prescaler when SWS select PLL1" "?,1: HPRE5 is taken into account,?,?,4: hclk5 = SYSCLK divided by 2,5: SYSCLK not divided,6: hclk5 = SYSCLK divided by 4,7: hclk5 = SYSCLK divided by 6"
group.long 0x208++0x3
line.long 0x0 "RCC_RADIOENR,RCC RADIO peripheral clock enable register"
rbitfld.long 0x0 17. "RADIOCLKRDY,2.4 GHz RADIO bus clock ready." "0: 2.4 GHz RADIO bus clock not ready,1: 2.4 GHz RADIO bus clock ready"
newline
bitfld.long 0x0 16. "STRADIOCLKON,2.4 GHz RADIO bus clock enable and HSE32 oscillator enable by 2.4 GHz RADIO sleep timer wakeup event" "0: 2.4 GHz RADIO bus clock and HSE32 oscillator not..,1: 2.4 GHz RADIO bus clock and HSE32 oscillator.."
newline
bitfld.long 0x0 1. "BBCLKEN,2.4 GHz RADIO baseband kernel clock (aclk) enable" "0: 2.4 GHz RADIO baseband kernel clock disabled,1: 2.4 GHz RADIO baseband kernel clock enabled"
group.long 0x210++0x3
line.long 0x0 "RCC_ECSCR1,RCC external clock sources calibration register 1"
hexmask.long.byte 0x0 16.--21. 1. "HSETRIM,HSE32 clock trimming"
tree.end
tree "SEC_RCC"
base ad:0x56020C00
group.long 0x0++0x3
line.long 0x0 "RCC_CR,RCC clock control register"
rbitfld.long 0x0 25. "PLL1RDY,PLL1 clock ready flag" "0: PLL1 unlocked,1: PLL1 locked (PLL1RDY remains set when PLL1 is.."
newline
bitfld.long 0x0 24. "PLL1ON,PLL1 enable" "0: PLL1 off,1: PLL1 on"
newline
bitfld.long 0x0 20. "HSEPRE,HSE32 clock for SYSCLK prescaler" "0: HSE32 not divided SYSCLK = HSE32,1: HSE32 divided SYSCLK = HSE32/2"
newline
bitfld.long 0x0 19. "HSECSSON,HSE32 clock security system enable" "0: HSE32 clock security system off (clock detector..,1: HSE32 clock security system on (clock detector.."
newline
rbitfld.long 0x0 17. "HSERDY,HSE32 clock ready flag" "0: HSE32 oscillator not ready,1: HSE32 oscillator ready to be used by the CPU.."
newline
bitfld.long 0x0 16. "HSEON,HSE32 clock enable" "0: HSE32 oscillator not requested by the CPU.,1: HSE32 oscillator ON"
newline
rbitfld.long 0x0 10. "HSIRDY,HSI16 clock ready flag" "0: HSI16 oscillator not ready,1: HSI16 oscillator ready"
newline
bitfld.long 0x0 9. "HSIKERON,HSI16 enable for some peripheral kernels" "0: No effect on HSI16 oscillator,1: HSI16 oscillator forced on even in Stop mode"
newline
bitfld.long 0x0 8. "HSION,HSI16 clock enable" "0: HSI16 oscillator off,1: HSI16 oscillator on"
group.long 0x10++0x3
line.long 0x0 "RCC_ICSCR3,RCC internal clock sources calibration register 3"
hexmask.long.byte 0x0 16.--20. 1. "HSITRIM,HSI16 clock trimming"
newline
hexmask.long.word 0x0 0.--11. 1. "HSICAL,HSI16 clock calibration"
group.long 0x1C++0xF
line.long 0x0 "RCC_CFGR1,RCC clock configuration register 1"
bitfld.long 0x0 28.--30. "MCOPRE,microcontroller clock output prescaler" "0: MCO divided by 1,1: MCO divided by 2,2: MCO divided by 4,3: MCO divided by 8,4: MCO divided by 16,?,?,?"
newline
hexmask.long.byte 0x0 24.--27. 1. "MCOSEL,microcontroller clock output"
newline
rbitfld.long 0x0 2.--3. "SWS,system clock switch status" "0: HSI16 oscillator used as system clock,1: reserved,2: HSE32 or HSE32/2 as defined by HSEPRE used as..,3: pll1rclk used as system clock"
newline
bitfld.long 0x0 0.--1. "SW,system clock switch" "0: HSI16 selected as system clock,1: reserved,2: HSE32 or HSE32/2 as defined by HSEPRE selected..,3: pll1rclk selected as system clock"
line.long 0x4 "RCC_CFGR2,RCC clock configuration register 2"
bitfld.long 0x4 8.--10. "PPRE2,APB2 prescaler" "?,?,2: hclk1 not divided,?,4: pclk2 = hclk1 divided by 2,5: pclk2 = hclk1 divided by 4,6: pclk2 = hclk1 divided by 8,7: pclk2 = hclk1 divided by 16"
newline
bitfld.long 0x4 4.--6. "PPRE1,APB1 prescaler" "?,1: hclk1 not divided,?,?,4: pclk1 = hclk1 divided by 2,5: pclk1 = hclk1 divided by 4,6: pclk1 = hclk1 divided by 8,7: pclk1 = hclk1 divided by 16"
newline
bitfld.long 0x4 0.--2. "HPRE,AHB1  AHB2 and AHB4 prescaler" "?,1: SYSCLK not divided,?,?,4: hclk1 = SYSCLK divided by 2,5: hclk1 = SYSCLK divided by 4,6: hclk1 = SYSCLK divided by 8,7: hclk1 = SYSCLK divided by 16"
line.long 0x8 "RCC_CFGR3,RCC clock configuration register 3"
bitfld.long 0x8 4.--6. "PPRE7,APB7 prescaler" "?,?,?,?,4: hclk1 divided by 2,5: hclk1 divided by 4,6: hclk1 divided by 8,7: hclk1 divided by 16"
line.long 0xC "RCC_PLL1CFGR,RCC PLL1 configuration register"
rbitfld.long 0xC 22. "PLL1RCLKPRERDY,pll1rclkpre not divided ready." "0: pll1rclk divided,1: pll1rclk not divided ready"
newline
bitfld.long 0xC 21. "PLL1RCLKPRESTEP,pll1rclk clock for SYSCLK prescaler division step selection" "0: pll1rclk 2-step division,1: pll1rclk 3-step division"
newline
bitfld.long 0xC 20. "PLL1RCLKPRE,pll1rclk clock for SYSCLK prescaler division enable" "0: pll1rclk not divided sysclkpre = pll1rclk,1: pll1rclk divided sysclkpre = pll1rclk divided"
newline
bitfld.long 0xC 18. "PLL1REN,PLL1 DIVR divider output enable" "0: pll1rclk output disabled,1: pll1rclk output enabled"
newline
bitfld.long 0xC 17. "PLL1QEN,PLL1 DIVQ divider output enable" "0: pll1qclk output disabled,1: pll1qclk output enabled"
newline
bitfld.long 0xC 16. "PLL1PEN,PLL1 DIVP divider output enable" "0: pll1pclk output disabled,1: pll1pclk output enabled"
newline
bitfld.long 0xC 8.--10. "PLL1M,Prescaler for PLL1" "0: division by 1 (bypass),1: division by 2,2: division by 3,?,?,?,?,7: division by 8"
newline
bitfld.long 0xC 4. "PLL1FRACEN,PLL1 fractional latch enable" "?,1: the transition 0 to 1 transfers the content of.."
newline
bitfld.long 0xC 2.--3. "PLL1RGE,PLL1 input frequency range" "?,?,?,3: PLL1 input (ref1_ck) clock range frequency.."
newline
bitfld.long 0xC 0.--1. "PLL1SRC,PLL1 entry clock source" "0: no clock sent to PLL1,1: reserved,2: HSI16 clock selected as PLL1 clock entry,3: HSE32 clock after HSEPRE divider selected as.."
group.long 0x34++0x7
line.long 0x0 "RCC_PLL1DIVR,RCC PLL1 dividers register"
hexmask.long.byte 0x0 24.--30. 1. "PLL1R,PLL1 DIVR division factor"
newline
hexmask.long.byte 0x0 16.--22. 1. "PLL1Q,PLL1 DIVQ division factor"
newline
hexmask.long.byte 0x0 9.--15. 1. "PLL1P,PLL1 DIVP division factor"
newline
hexmask.long.word 0x0 0.--8. 1. "PLL1N,Multiplication factor for PLL1 VCO"
line.long 0x4 "RCC_PLL1FRACR,RCC PLL1 fractional divider register"
hexmask.long.word 0x4 3.--15. 1. "PLL1FRACN,Fractional part of the multiplication factor for PLL1 VCO"
group.long 0x50++0x3
line.long 0x0 "RCC_CIER,RCC clock interrupt enable register"
bitfld.long 0x0 6. "PLL1RDYIE,PLL1 ready interrupt enable" "0: PLL1 lock interrupt disabled,1: PLL1 lock interrupt enabled"
newline
bitfld.long 0x0 4. "HSERDYIE,HSE32 ready interrupt enable" "0: HSE32 ready interrupt disabled,1: HSE32 ready interrupt enabled"
newline
bitfld.long 0x0 3. "HSIRDYIE,HSI16 ready interrupt enable" "0: HSI16 ready interrupt disabled,1: HSI16 ready interrupt enabled"
newline
bitfld.long 0x0 1. "LSERDYIE,LSE ready interrupt enable" "0: LSE ready interrupt disabled,1: LSE ready interrupt enabled"
newline
bitfld.long 0x0 0. "LSI1RDYIE,LSI1 ready interrupt enable" "0: LSI1 ready interrupt disabled,1: LSI1 ready interrupt enabled"
rgroup.long 0x54++0x3
line.long 0x0 "RCC_CIFR,RCC clock interrupt flag register"
bitfld.long 0x0 10. "HSECSSF,HSE32 clock security system interrupt flag" "0: no clock security interrupt caused by HSE32..,1: clock security interrupt caused by HSE32 clock.."
newline
bitfld.long 0x0 6. "PLL1RDYF,PLL1 ready interrupt flag" "0: no clock ready interrupt caused by PLL1 lock,1: clock ready interrupt caused by PLL1 lock"
newline
bitfld.long 0x0 4. "HSERDYF,HSE32 ready interrupt flag" "0: no clock ready interrupt caused by the HSE32..,1: clock ready interrupt caused by the HSE32.."
newline
bitfld.long 0x0 3. "HSIRDYF,HSI16 ready interrupt flag" "0: no clock ready interrupt caused by the HSI16..,1: clock ready interrupt caused by the HSI16.."
newline
bitfld.long 0x0 1. "LSERDYF,LSE ready interrupt flag" "0: no clock ready interrupt caused by the LSE..,1: clock ready interrupt caused by the LSE oscillator"
newline
bitfld.long 0x0 0. "LSI1RDYF,LSI1 ready interrupt flag" "0: no clock ready interrupt caused by the LSI1..,1: clock ready interrupt caused by the LSI1.."
wgroup.long 0x58++0x3
line.long 0x0 "RCC_CICR,RCC clock interrupt clear register"
bitfld.long 0x0 10. "HSECSSC,High speed external clock security system interrupt clear" "0,1"
newline
bitfld.long 0x0 6. "PLL1RDYC,PLL1 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 4. "HSERDYC,HSE32 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 3. "HSIRDYC,HSI16 ready interrupt clear" "0,1"
newline
bitfld.long 0x0 1. "LSERDYC,LSE ready interrupt clear" "0,1"
newline
bitfld.long 0x0 0. "LSI1RDYC,LSI1 ready interrupt clear" "0,1"
group.long 0x60++0x7
line.long 0x0 "RCC_AHB1RSTR,RCC AHB1 peripheral reset register"
bitfld.long 0x0 16. "TSCRST,TSC reset" "0: No effect,1: Reset TSC"
newline
bitfld.long 0x0 12. "CRCRST,CRC reset" "0: No effect,1: Reset CRC"
newline
bitfld.long 0x0 0. "GPDMA1RST,GPDMA1 reset" "0: No effect,1: Reset GPDMA1"
line.long 0x4 "RCC_AHB2RSTR,RCC AHB2 peripheral reset register"
bitfld.long 0x4 21. "PKARST,PKA reset" "0: No effect,1: Reset PKA"
newline
bitfld.long 0x4 20. "HSEMRST,HSEM hardware accelerator reset" "0: No effect,1: Reset HSEM"
newline
bitfld.long 0x4 19. "SAESRST,SAES hardware accelerator reset" "0: No effect,1: Reset SAES"
newline
bitfld.long 0x4 18. "RNGRST,Random number generator reset" "0: No effect,1: Reset RNG"
newline
bitfld.long 0x4 17. "HASHRST,Hash reset" "0: No effect,1: Reset HASH"
newline
bitfld.long 0x4 16. "AESRST,AES hardware accelerator reset" "0: No effect,1: Reset AES"
newline
bitfld.long 0x4 7. "GPIOHRST,IO port H reset" "0: No effect,1: Reset IO port H"
newline
bitfld.long 0x4 2. "GPIOCRST,IO port C reset" "0: No effect,1: Reset IO port C"
newline
bitfld.long 0x4 1. "GPIOBRST,IO port B reset" "0: No effect,1: Reset IO port B"
newline
bitfld.long 0x4 0. "GPIOARST,IO port A reset" "0: No effect,1: Reset IO port A"
group.long 0x6C++0x17
line.long 0x0 "RCC_AHB4RSTR,RCC AHB4 peripheral reset register"
bitfld.long 0x0 5. "ADC4RST,ADC4 reset" "0: No effect,1: Reset ADC4 interface"
line.long 0x4 "RCC_AHB5RSTR,RCC AHB5 peripheral reset register"
bitfld.long 0x4 0. "RADIORST,2.4 GHz RADIO reset" "0: No effect,1: Reset 2.4 GHz RADIO"
line.long 0x8 "RCC_APB1RSTR1,RCC APB1 peripheral reset register 1"
bitfld.long 0x8 21. "I2C1RST,I2C1 reset" "0: No effect,1: Reset I2C1"
newline
bitfld.long 0x8 17. "USART2RST,USART2 reset" "0: No effect,1: Reset USART2"
newline
bitfld.long 0x8 1. "TIM3RST,TIM3 reset" "0: No effect,1: Reset TIM3"
newline
bitfld.long 0x8 0. "TIM2RST,TIM2 reset" "0: No effect,1: Reset TIM2"
line.long 0xC "RCC_APB1RSTR2,RCC APB1 peripheral reset register 2"
bitfld.long 0xC 5. "LPTIM2RST,LPTIM2 reset" "0: No effect,1: Reset LPTIM2"
line.long 0x10 "RCC_APB2RSTR,RCC APB2 peripheral reset register"
bitfld.long 0x10 18. "TIM17RST,TIM17 reset" "0: No effect,1: Reset TIM17"
newline
bitfld.long 0x10 17. "TIM16RST,TIM16 reset" "0: No effect,1: Reset TIM16"
newline
bitfld.long 0x10 14. "USART1RST,USART1 reset" "0: No effect,1: Reset USART1"
newline
bitfld.long 0x10 12. "SPI1RST,SPI1 reset" "0: No effect,1: Reset SPI1"
newline
bitfld.long 0x10 11. "TIM1RST,TIM1 reset" "0: No effect,1: Reset TIM1"
line.long 0x14 "RCC_APB7RSTR,RCC APB7 peripheral reset register"
bitfld.long 0x14 11. "LPTIM1RST,LPTIM1 reset" "0: No effect,1: Reset LPTIM1"
newline
bitfld.long 0x14 7. "I2C3RST,I2C3 reset" "0: No effect,1: Reset I2C3"
newline
bitfld.long 0x14 6. "LPUART1RST,LPUART1 reset" "0: No effect,1: Reset LPUART1"
newline
bitfld.long 0x14 5. "SPI3RST,SPI3 reset" "0: No effect,1: Reset SPI3"
newline
bitfld.long 0x14 1. "SYSCFGRST,SYSCFG reset" "0: No effect,1: Reset SYSCFG"
group.long 0x88++0x7
line.long 0x0 "RCC_AHB1ENR,RCC AHB1 peripheral clock enable register"
bitfld.long 0x0 31. "SRAM1EN,SRAM1 bus clock enable" "0: SRAM1 bus clock disabled,1: SRAM1 bus clock enabled"
newline
bitfld.long 0x0 24. "GTZC1EN,GTZC1 bus clock enable" "0: GTZC1 bus clock disabled,1: GTZC1 bus clock enabled"
newline
bitfld.long 0x0 17. "RAMCFGEN,RAMCFG bus clock enable" "0: RAMCFG bus clock disabled,1: RAMCFG bus clock enabled"
newline
bitfld.long 0x0 16. "TSCEN,Touch sensing controller bus clock enable" "0: TSC bus clock disabled,1: TSC bus clock enabled"
newline
bitfld.long 0x0 12. "CRCEN,CRC bus clock enable" "0: CRC bus clock disabled,1: CRC bus clock enabled"
newline
bitfld.long 0x0 8. "FLASHEN,FLASH bus clock enable" "0: FLASH bus clock disabled,1: FLASH bus clock enabled"
newline
bitfld.long 0x0 0. "GPDMA1EN,GPDMA1 bus clock enable" "0: GPDMA1 bus clock disabled,1: GPDMA1 bus clock enabled"
line.long 0x4 "RCC_AHB2ENR,RCC AHB2 peripheral clock enable register"
bitfld.long 0x4 30. "SRAM2EN,SRAM2 bus clock enable" "0: SRAM2 bus clock disabled,1: SRAM2 bus clock enabled"
newline
bitfld.long 0x4 21. "PKAEN,PKA bus clock enable" "0: PKA bus clock disabled,1: PKA bus clock enabled"
newline
bitfld.long 0x4 20. "HSEMEN,HSEM bus clock enable" "0: HSEM bus clock disabled,1: HSEM bus clock enabled"
newline
bitfld.long 0x4 19. "SAESEN,SAES bus clock enable" "0: SAES bus clock disabled,1: SAES bus clock enabled"
newline
bitfld.long 0x4 18. "RNGEN,RNG bus and kernel clocks enable" "0: RNG bus and kernel clocks disabled,1: RNG bus and kernel clocks enabled"
newline
bitfld.long 0x4 17. "HASHEN,HASH bus clock enable" "0: HASH bus clock disabled,1: HASH bus clock enabled"
newline
bitfld.long 0x4 16. "AESEN,AES bus clock enable" "0: AES bus clock disabled,1: AES bus clock enabled"
newline
bitfld.long 0x4 7. "GPIOHEN,IO port H bus clock enable" "0: IO port H bus clock disabled,1: IO port H bus clock enabled"
newline
bitfld.long 0x4 2. "GPIOCEN,IO port C bus clock enable" "0: IO port C bus clock disabled,1: IO port C bus clock enabled"
newline
bitfld.long 0x4 1. "GPIOBEN,IO port B bus clock enable" "0: IO port B bus clock disabled,1: IO port B bus clock enabled"
newline
bitfld.long 0x4 0. "GPIOAEN,IO port A bus clock enable" "0: IO port A bus clock disabled,1: IO port A bus clock enabled"
group.long 0x94++0x17
line.long 0x0 "RCC_AHB4ENR,RCC AHB4 peripheral clock enable register"
bitfld.long 0x0 5. "ADC4EN,ADC4 bus and kernel clocks enable" "0: ADC4 bus and kernel clocks disabled,1: ADC4 bus and kernel clocks enabled"
newline
bitfld.long 0x0 2. "PWREN,PWR bus clock enable" "0: PWR bus clock disabled,1: PWR bus clock enabled"
line.long 0x4 "RCC_AHB5ENR,RCC AHB5 peripheral clock enable register"
bitfld.long 0x4 0. "RADIOEN,2.4 GHz RADIO bus clock enable" "0: 2.4 GHz RADIO bus clock disabled (The 2.4 GHz..,1: 2.4 GHz RADIO bus clock enabled"
line.long 0x8 "RCC_APB1ENR1,RCC APB1 peripheral clock enable register 1"
bitfld.long 0x8 21. "I2C1EN,I2C1 bus and kernel clocks enable" "0: I2C1 bus and kernel clocks disabled,1: I2C1 bus and kernel clocks enabled"
newline
bitfld.long 0x8 17. "USART2EN,USART2 bus and kernel clocks enable" "0: USART2 bus and kernel clocks disabled,1: USART2 bus and kernel clocks enabled"
newline
bitfld.long 0x8 11. "WWDGEN,WWDG bus clock enable" "0: WWDG bus clock disabled,1: WWDG bus clock enabled"
newline
bitfld.long 0x8 1. "TIM3EN,TIM3 bus and kernel clocks enable" "0: TIM3 bus and kernel clocks disabled,1: TIM3 bus and kernel clocks enabled"
newline
bitfld.long 0x8 0. "TIM2EN,TIM2 bus and kernel clocks enable" "0: TIM2 bus and kernel clocks disabled,1: TIM2 bus and kernel clocks enabled"
line.long 0xC "RCC_APB1ENR2,RCC APB1 peripheral clock enable register 2"
bitfld.long 0xC 5. "LPTIM2EN,LPTIM2 bus and kernel clocks enable" "0: LPTIM2 bus and kernel clocks disabled,1: LPTIM2 bus and kernel clocks enabled"
line.long 0x10 "RCC_APB2ENR,RCC APB2 peripheral clock enable register"
bitfld.long 0x10 18. "TIM17EN,TIM17 bus and kernel clocks enable" "0: TIM17 bus and kernel clocks disabled,1: TIM17 bus and kernel clocks enabled"
newline
bitfld.long 0x10 17. "TIM16EN,TIM16 bus and kernel clocks enable" "0: TIM16 bus and kernel clocks disabled,1: TIM16 bus and kernel clocks enabled"
newline
bitfld.long 0x10 14. "USART1EN,USART1bus and kernel clocks enable" "0: USART1 bus and kernel clocks disabled,1: USART1 bus and kernel clocks enabled"
newline
bitfld.long 0x10 12. "SPI1EN,SPI1 bus and kernel clocks enable" "0: SPI1 bus and kernel clocks disabled,1: SPI1 bus and kernel clocks enabled"
newline
bitfld.long 0x10 11. "TIM1EN,TIM1 bus and kernel clocks enable" "0: TIM1 bus and kernel clocks disabled,1: TIM1 bus and kernel clocks enabled"
line.long 0x14 "RCC_APB7ENR,RCC APB7 peripheral clock enable register"
bitfld.long 0x14 21. "RTCAPBEN,RTC and TAMP bus clock enable" "0: RTC bus clock disabled,1: RTC bus clock enabled"
newline
bitfld.long 0x14 11. "LPTIM1EN,LPTIM1 bus and kernel clocks enable" "0: LPTIM1 bus and kernel clocks disabled,1: LPTIM1 bus and kernel clocks enabled"
newline
bitfld.long 0x14 7. "I2C3EN,I2C3 bus and kernel clocks enable" "0: I2C3 bus and kernel clocks disabled,1: I2C3 bus and kernel clocks enabled"
newline
bitfld.long 0x14 6. "LPUART1EN,LPUART1 bus and kernel clocks enable" "0: LPUART1 bus and kernel clocks disabled,1: LPUART1 bus and kernel clocks enabled"
newline
bitfld.long 0x14 5. "SPI3EN,SPI3 bus and kernel clocks enable" "0: SPI3 bus and kernel clocks disabled,1: SPI3 bus and kernel clocks enabled"
newline
bitfld.long 0x14 1. "SYSCFGEN,SYSCFG bus clock enable" "0: SYSCFG bus clock disabled,1: SYSCFG bus clock enabled"
group.long 0xB0++0x7
line.long 0x0 "RCC_AHB1SMENR,RCC AHB1 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x0 31. "SRAM1SMEN,SRAM1 bus clock enable during Sleep and Stop modes" "0: SRAM1 bus clock disabled by the clock gating..,1: SRAM1 bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 29. "ICACHESMEN,ICACHE bus clock enable during Sleep and Stop modes" "0: ICACHE bus clock disabled by the clock gating..,1: ICACHE bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 24. "GTZC1SMEN,GTZC1 bus clock enable during Sleep and Stop modes" "0: GTZC1 bus clock disabled by the clock gating..,1: GTZC1 bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 17. "RAMCFGSMEN,RAMCFG bus clock enable during Sleep and Stop modes" "0: RAMCFG bus clock disabled by the clock gating..,1: RAMCFG bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 16. "TSCSMEN,TSC bus clock enable during Sleep and Stop modes" "0: TSC bus clock disabled by the clock gating..,1: TSC bus clock enabled by the clock gating during.."
newline
bitfld.long 0x0 12. "CRCSMEN,CRC bus clock enable during Sleep and Stop modes" "0: CRC bus clock disabled by the clock gating..,1: CRC bus clock enabled by the clock gating during.."
newline
bitfld.long 0x0 8. "FLASHSMEN,FLASH bus clock enable during Sleep and Stop modes" "0: FLASH bus clock disabled by the clock gating..,1: FLASH bus clock enabled by the clock gating.."
newline
bitfld.long 0x0 0. "GPDMA1SMEN,GPDMA1 bus clock enable during Sleep and Stop modes" "0: GPDMA1 bus clock disabled by the clock gating..,1: GPDMA1 bus clock enabled by the clock gating.."
line.long 0x4 "RCC_AHB2SMENR,RCC AHB2 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x4 30. "SRAM2SMEN,SRAM2 bus clock enable during Sleep and Stop modes" "0: SRAM2 bus clock disabled by the clock gating..,1: SRAM2 bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 21. "PKASMEN,PKA bus clock enable during Sleep and Stop modes" "0: PKA bus clock disabled by the clock gating..,1: PKA bus clock enabled by the clock gating during.."
newline
bitfld.long 0x4 19. "SAESSMEN,SAES accelerator bus clock enable during Sleep and Stop modes" "0: SAES bus clock disabled by the clock gating..,1: SAES bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 18. "RNGSMEN,Random number generator (RNG) bus and kernel clocks enable during Sleep and Stop modes" "0: RNG bus and kernel clocks disabled by the clock..,1: RNG bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x4 17. "HASHSMEN,HASH bus clock enable during Sleep and Stop modes" "0: HASH bus clock disabled by the clock gating..,1: HASH bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 16. "AESSMEN,AES bus clock enable during Sleep and Stop modes" "0: AES bus clock disabled by the clock gating..,1: AES bus clock enabled by the clock gating during.."
newline
bitfld.long 0x4 7. "GPIOHSMEN,IO port H bus clock enable during Sleep and Stop modes" "0: IO port H bus clock disabled by the clock gating..,1: IO port H bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 2. "GPIOCSMEN,IO port C bus clock enable during Sleep and Stop modes" "0: IO port C bus clock disabled by the clock gating..,1: IO port C bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 1. "GPIOBSMEN,IO port B bus clock enable during Sleep and Stop modes" "0: IO port B bus clock disabled by the clock gating..,1: IO port B bus clock enabled by the clock gating.."
newline
bitfld.long 0x4 0. "GPIOASMEN,IO port A bus clock enable during Sleep and Stop modes" "0: IO port A bus clock disabled by the clock gating..,1: IO port A bus clock enabled by the clock gating.."
group.long 0xBC++0x17
line.long 0x0 "RCC_AHB4SMENR,RCC AHB4 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x0 5. "ADC4SMEN,ADC4 bus and kernel clocks enable during Sleep and Stop modes" "0: ADC4 bus and kernel clocks disabled by the clock..,1: ADC4 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x0 2. "PWRSMEN,PWR bus clock enable during Sleep and Stop modes" "0: PWR bus clock disabled by the clock gating..,1: PWR bus clock enabled by the clock gating during.."
line.long 0x4 "RCC_AHB5SMENR,RCC AHB5 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x4 0. "RADIOSMEN,2.4 GHz RADIO bus clock enable during Sleep and Stop modes when the 2.4 GHz RADIO is active." "0: 2.4 GHz RADIO bus clock disabled by the clock..,1: 2.4 GHz RADIO bus clock enabled by the clock.."
line.long 0x8 "RCC_APB1SMENR1,RCC APB1 peripheral clocks enable in Sleep and Stop modes register 1"
bitfld.long 0x8 21. "I2C1SMEN,I2C1 bus and kernel clocks enable during Sleep and Stop modes" "0: I2C1 bus and kernel clocks disabled by the clock..,1: I2C1 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x8 17. "USART2SMEN,USART2 bus and kernel clocks enable during Sleep and Stop modes" "0: USART2 bus and kernel clocks disabled by the..,1: USART2 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x8 11. "WWDGSMEN,Window watchdog bus clock enable during Sleep and Stop modes" "0: WWDG bus clock disabled by the clock gating..,1: WWDG bus clock enabled by the clock gating.."
newline
bitfld.long 0x8 1. "TIM3SMEN,TIM3 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM3 bus and kernel clocks disabled by the clock..,1: TIM3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x8 0. "TIM2SMEN,TIM2 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM2 bus and kernel clocks disabled by the clock..,1: TIM2 bus and kernel clocks enabled by the clock.."
line.long 0xC "RCC_APB1SMENR2,RCC APB1 peripheral clocks enable in Sleep and Stop modes register 2"
bitfld.long 0xC 5. "LPTIM2SMEN,LPTIM2 bus and kernel clocks enable during Sleep and Stop modes" "0: LPTIM2 bus and kernel clocks disabled by the..,1: LPTIM2 bus and kernel clocks enabled by the.."
line.long 0x10 "RCC_APB2SMENR,RCC APB2 peripheral clocks enable in Sleep and Stop modes register"
bitfld.long 0x10 18. "TIM17SMEN,TIM17 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM17 bus and kernel clocks disabled by the..,1: TIM17 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 17. "TIM16SMEN,TIM16 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM16 bus and kernel clocks disabled by the..,1: TIM16 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 14. "USART1SMEN,USART1 bus and kernel clocks enable during Sleep and Stop modes" "0: USART1 bus and kernel clocks disabled by the..,1: USART1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x10 12. "SPI1SMEN,SPI1 bus and kernel clocks enable during Sleep and Stop modes" "0: SPI1 bus and kernel clocks disabled by the clock..,1: SPI1 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x10 11. "TIM1SMEN,TIM1 bus and kernel clocks enable during Sleep and Stop modes" "0: TIM1 bus and kernel clocks disabled by the clock..,1: TIM1 bus and kernel clocks enabled by the clock.."
line.long 0x14 "RCC_APB7SMENR,RCC APB7 peripheral clock enable in Sleep and Stop modes register"
bitfld.long 0x14 21. "RTCAPBSMEN,RTC and TAMP APB clock enable during Sleep and Stop modes" "0: RTC and TAMP APB clock disabled by the clock..,1: RTC and TAMP APB clock enabled by the clock.."
newline
bitfld.long 0x14 11. "LPTIM1SMEN,LPTIM1 bus and kernel clocks enable during Sleep and Stop modes" "0: LPTIM1 bus and kernel clocks disabled by the..,1: LPTIM1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x14 7. "I2C3SMEN,I2C3 bus and kernel clocks enable during Sleep and Stop modes" "0: I2C3 bus and kernel clocks disabled by the clock..,1: I2C3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x14 6. "LPUART1SMEN,LPUART1 bus and kernel clocks enable during Sleep and Stop modes" "0: LPUART1 bus and kernel clocks disabled by the..,1: LPUART1 bus and kernel clocks enabled by the.."
newline
bitfld.long 0x14 5. "SPI3SMEN,SPI3 bus and kernel clocks enable during Sleep and Stop modes" "0: SPI3 bus and kernel clocks disabled by the clock..,1: SPI3 bus and kernel clocks enabled by the clock.."
newline
bitfld.long 0x14 1. "SYSCFGSMEN,SYSCFG bus clock enable during Sleep and Stop modes" "0: SYSCFG bus clock disabled by the clock gating..,1: SYSCFG bus clock enabled by the clock gating.."
group.long 0xE0++0xB
line.long 0x0 "RCC_CCIPR1,RCC peripherals independent clock configuration register 1"
bitfld.long 0x0 31. "TIMICSEL,Clocks sources for TIM16 TIM17 and LPTIM2 internal input capture" "0: HSI16 divider disabled,1: HSI16/256 generated and can be selected by TIM16.."
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bitfld.long 0x0 22.--23. "SYSTICKSEL,SysTick clock source selection" "0: hclk1 divided by 8 selected,1: LSI selected,2: LSE selected,3: reserved"
newline
bitfld.long 0x0 20.--21. "SPI1SEL,SPI1 kernel clock source selection" "0: pclk2 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x0 18.--19. "LPTIM2SEL,Low-power timer 2 kernel clock source selection" "0: pclk1 selected,1: LSI selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x0 10.--11. "I2C1SEL,I2C1 kernel clock source selection" "0: pclk1 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x0 2.--3. "USART2SEL,USART2 kernel clock source selection" "0: pclk1 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x0 0.--1. "USART1SEL,USART1 kernel clock source selection" "0: pclk2 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
line.long 0x4 "RCC_CCIPR2,RCC peripherals independent clock configuration register 2"
bitfld.long 0x4 12.--13. "RNGSEL,RNGSEL kernel clock source selection" "0: LSE selected,1: LSI selected,2: HSI16 selected,3: pll1qclk divide by 2 selected"
line.long 0x8 "RCC_CCIPR3,RCC peripherals independent clock configuration register 3"
bitfld.long 0x8 12.--14. "ADCSEL,ADC4 kernel clock source selection" "0: hclk1 clock selected,1: SYSCLK selected,2: pll1pclk selected,3: HSE32 clock selected,4: HSI16 clock selected,?,?,?"
newline
bitfld.long 0x8 10.--11. "LPTIM1SEL,LPTIM1 kernel clock source selection" "0: pclk7 selected.,1: LSI selected,2: HSI16 selected,3: LSE selected"
newline
bitfld.long 0x8 6.--7. "I2C3SEL,I2C3 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x8 3.--4. "SPI3SEL,SPI3 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: reserved"
newline
bitfld.long 0x8 0.--1. "LPUART1SEL,LPUART1 kernel clock source selection" "0: pclk7 selected,1: SYSCLK selected,2: HSI16 selected,3: LSE selected"
group.long 0xF0++0x7
line.long 0x0 "RCC_BDCR1,RCC backup domain control register"
bitfld.long 0x0 28. "LSI1PREDIV,LSI1 Low-speed clock divider configuration" "0: LSI1 not divided,1: LSI1 divided by 128"
newline
rbitfld.long 0x0 27. "LSI1RDY,LSI1 oscillator ready" "0: LSI1 oscillator not ready,1: LSI1 oscillator ready"
newline
bitfld.long 0x0 26. "LSI1ON,LSI1 oscillator enable" "0: LSI1 oscillator off,1: LSI1 oscillator on"
newline
bitfld.long 0x0 25. "LSCOSEL,Low-speed clock output selection" "0: LSI clock selected,1: LSE clock selected"
newline
bitfld.long 0x0 24. "LSCOEN,Low-speed clock output (LSCO) enable" "0: LSCO disabled,1: LSCO enabled"
newline
bitfld.long 0x0 18.--19. "RADIOSTSEL,2.4 GHz RADIO sleep timer kernel clock enable and selection" "0: no clock selected 2.4 GHz RADIO sleep timer..,1: LSE oscillator clock selected,2: Reserved,3: HSE32 oscillator clock divided by 1000 selected"
newline
bitfld.long 0x0 16. "BDRST,Backup domain software reset" "0: Reset not activated,1: Reset the entire Backup domain"
newline
bitfld.long 0x0 13.--14. "LSETRIM,LSE trimming" "0: current source resistance 5/4 x R,1: current source resistance R,2: current source resistance 3/4 x R,3: current source resistance 2/3 x R"
newline
bitfld.long 0x0 12. "LSEGFON,LSE clock glitch filter enable" "0: LSE glitch filter disabled,1: LSE glitch filter enabled"
newline
rbitfld.long 0x0 11. "LSESYSRDY,LSE system clock (LSESYS) ready" "0: LSESYS clock not ready,1: LSESYS clock ready"
newline
bitfld.long 0x0 8.--9. "RTCSEL,RTC and TAMP kernel clock source enable and selection" "0: no clock selected RTC and TAMP kernel clock..,1: LSE oscillator clock selected and enabled,2: LSI oscillator clock selected and enabled,3: HSE32 oscillator clock divided by 32 selected.."
newline
bitfld.long 0x0 7. "LSESYSEN,LSE system clock (LSESYS) enable" "0: LSESYS clock disabled,1: LSESYS clock enabled"
newline
rbitfld.long 0x0 6. "LSECSSD,Low speed external clock security  LSE failure Detection" "0: no failure detected on LSE,1: failure detected on LSE"
newline
bitfld.long 0x0 5. "LSECSSON,Low speed external clock security enable" "0: LSECSS disabled off,1: LSECSS enabled on"
newline
bitfld.long 0x0 3.--4. "LSEDRV,LSE oscillator drive capability" "0: reserved,1: 'Xtal mode' medium-low driving capability,2: 'Xtal mode' medium-high driving capability,3: 'Xtal mode' higher driving capability"
newline
bitfld.long 0x0 2. "LSEBYP,LSE oscillator bypass" "0: LSE oscillator 'Xtal' mode,1: LSE oscillator bypassed"
newline
rbitfld.long 0x0 1. "LSERDY,LSE oscillator ready" "0: LSE oscillator not ready,1: LSE oscillator ready"
newline
bitfld.long 0x0 0. "LSEON,LSE oscillator enable" "0: LSE oscillator off,1: LSE oscillator on"
line.long 0x4 "RCC_CSR,RCC control/status register"
rbitfld.long 0x4 31. "LPWRRSTF,Low-power reset flag" "0: no illegal mode reset occurred,1: illegal mode reset occurred"
newline
rbitfld.long 0x4 30. "WWDGRSTF,Window watchdog reset flag" "0: no window watchdog reset occurred,1: window watchdog reset occurred"
newline
rbitfld.long 0x4 29. "IWDGRSTF,Independent watchdog reset flag" "0: no independent watchdog reset occurred,1: independent watchdog reset occurred"
newline
rbitfld.long 0x4 28. "SFTRSTF,Software reset flag" "0: no software reset occurred,1: software reset occurred"
newline
rbitfld.long 0x4 27. "BORRSTF,BOR flag" "0: no BOR occurred,1: BOR occurred"
newline
rbitfld.long 0x4 26. "PINRSTF,NRST pin reset flag" "0: No reset from NRST pin occurred,1: Reset from NRST pin occurred"
newline
rbitfld.long 0x4 25. "OBLRSTF,Option byte loader reset flag" "0: No reset from option byte loading occurred,1: Reset from option byte loading occurred"
newline
bitfld.long 0x4 23. "RMVF,Remove reset flag" "0: No effect,1: Clear the reset flags (once set by software bit.."
group.long 0x110++0x7
line.long 0x0 "RCC_SECCFGR,RCC secure configuration register"
bitfld.long 0x0 12. "RMVFSEC,Remove reset flag security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 7. "PLL1SEC,PLL1 clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 6. "PRESCSEC,AHBx/APBx prescaler configuration bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 5. "SYSCLKSEC,SYSCLK selection  clock output on MCO configuration security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 4. "LSESEC,LSE clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 3. "LSISEC,LSI clock configuration and status bits security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 1. "HSESEC,HSE32 clock configuration bits  status bits and HSECSS security" "0: Non secure,1: Secure"
newline
bitfld.long 0x0 0. "HSISEC,HSI16 clock configuration and status bits security" "0: Non secure,1: Secure"
line.long 0x4 "RCC_PRIVCFGR,RCC privilege configuration register"
bitfld.long 0x4 1. "NSPRIV,RCC non-secure functions privilege configuration" "0: Read and write to RCC non-secure functions can..,1: Read and write to RCC non-secure functions can.."
newline
bitfld.long 0x4 0. "SPRIV,RCC secure functions privilege configuration" "0: Read and write to RCC secure functions can be..,1: Read and write to RCC secure functions can be.."
group.long 0x200++0x3
line.long 0x0 "RCC_CFGR4,RCC clock configuration register 2"
bitfld.long 0x0 4. "HDIV5,AHB5 divider when SWS select HSI16 or HSE32" "0: hclk5 = SYSCLK not divided,1: HDIV5 is taken not taken into account"
newline
bitfld.long 0x0 0.--2. "HPRE5,AHB5 prescaler when SWS select PLL1" "?,1: HPRE5 is taken into account,?,?,4: hclk5 = SYSCLK divided by 2,5: SYSCLK not divided,6: hclk5 = SYSCLK divided by 4,7: hclk5 = SYSCLK divided by 6"
group.long 0x208++0x3
line.long 0x0 "RCC_RADIOENR,RCC RADIO peripheral clock enable register"
rbitfld.long 0x0 17. "RADIOCLKRDY,2.4 GHz RADIO bus clock ready." "0: 2.4 GHz RADIO bus clock not ready,1: 2.4 GHz RADIO bus clock ready"
newline
bitfld.long 0x0 16. "STRADIOCLKON,2.4 GHz RADIO bus clock enable and HSE32 oscillator enable by 2.4 GHz RADIO sleep timer wakeup event" "0: 2.4 GHz RADIO bus clock and HSE32 oscillator not..,1: 2.4 GHz RADIO bus clock and HSE32 oscillator.."
newline
bitfld.long 0x0 1. "BBCLKEN,2.4 GHz RADIO baseband kernel clock (aclk) enable" "0: 2.4 GHz RADIO baseband kernel clock disabled,1: 2.4 GHz RADIO baseband kernel clock enabled"
group.long 0x210++0x3
line.long 0x0 "RCC_ECSCR1,RCC external clock sources calibration register 1"
hexmask.long.byte 0x0 16.--21. 1. "HSETRIM,HSE32 clock trimming"
tree.end
tree.end
tree "RNG (Random Number Generator)"
base ad:0x0
tree "RNG"
base ad:0x420C0800
group.long 0x0++0x7
line.long 0x0 "RNG_CR,RNG control register"
bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "0: Writes to the RNG_CR configuration bits [29:4]..,1: Writes to the RNG_CR configuration bits [29:4].."
bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1"
newline
hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1"
hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor"
newline
bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "NISTC,Non NIST compliant" "0: Hardware default values for NIST compliant RNG.,1: Custom values for NIST compliant RNG. See.."
newline
hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3"
bitfld.long 0x0 7. "ARDIS,Auto reset disable" "0: When a noise source error occurs RNG performs an..,1: When a noise source error occurs application.."
newline
bitfld.long 0x0 5. "CED,Clock error detection" "0: Clock error detection is enable,1: Clock error detection is disable"
bitfld.long 0x0 3. "IE,Interrupt Enable" "0: RNG Interrupt is disabled,1: RNG Interrupt is enabled. An interrupt is.."
newline
bitfld.long 0x0 2. "RNGEN,True random number generator enable" "0: True random number generator is disabled. Analog..,1: True random number generator is enabled."
line.long 0x4 "RNG_SR,RNG status register"
bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "0: No faulty sequence detected,1: At least one faulty sequence is detected. See.."
bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "0: The RNG clock is correct (fRNGCLK> fHCLK/32),1: The RNG clock before internal divider is.."
newline
rbitfld.long 0x4 2. "SECS,Seed error current status" "0: No faulty sequence has currently been detected.,1: At least one of the following faulty sequence.."
rbitfld.long 0x4 1. "CECS,Clock error current status" "0: The RNG clock is correct (fRNGCLK> fHCLK/32). If..,1: The RNG clock is too slow (fRNGCLK< fHCLK/32)."
newline
rbitfld.long 0x4 0. "DRDY,Data Ready" "0: The RNG_DR register is not yet valid no random..,1: The RNG_DR register contains valid random data."
rgroup.long 0x8++0x3
line.long 0x0 "RNG_DR,RNG data register"
hexmask.long 0x0 0.--31. 1. "RNDATA,Random data"
group.long 0x10++0x3
line.long 0x0 "RNG_HTCR,RNG health test control register"
hexmask.long 0x0 0.--31. 1. "HTCFG,health test configuration"
tree.end
tree "SEC_RNG"
base ad:0x520C0800
group.long 0x0++0x7
line.long 0x0 "RNG_CR,RNG control register"
bitfld.long 0x0 31. "CONFIGLOCK,RNG Config lock" "0: Writes to the RNG_CR configuration bits [29:4]..,1: Writes to the RNG_CR configuration bits [29:4].."
bitfld.long 0x0 30. "CONDRST,Conditioning soft reset" "0,1"
newline
hexmask.long.byte 0x0 20.--25. 1. "RNG_CONFIG1,RNG configuration 1"
hexmask.long.byte 0x0 16.--19. 1. "CLKDIV,Clock divider factor"
newline
bitfld.long 0x0 13.--15. "RNG_CONFIG2,RNG configuration 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 12. "NISTC,Non NIST compliant" "0: Hardware default values for NIST compliant RNG.,1: Custom values for NIST compliant RNG. See.."
newline
hexmask.long.byte 0x0 8.--11. 1. "RNG_CONFIG3,RNG configuration 3"
bitfld.long 0x0 7. "ARDIS,Auto reset disable" "0: When a noise source error occurs RNG performs an..,1: When a noise source error occurs application.."
newline
bitfld.long 0x0 5. "CED,Clock error detection" "0: Clock error detection is enable,1: Clock error detection is disable"
bitfld.long 0x0 3. "IE,Interrupt Enable" "0: RNG Interrupt is disabled,1: RNG Interrupt is enabled. An interrupt is.."
newline
bitfld.long 0x0 2. "RNGEN,True random number generator enable" "0: True random number generator is disabled. Analog..,1: True random number generator is enabled."
line.long 0x4 "RNG_SR,RNG status register"
bitfld.long 0x4 6. "SEIS,Seed error interrupt status" "0: No faulty sequence detected,1: At least one faulty sequence is detected. See.."
bitfld.long 0x4 5. "CEIS,Clock error interrupt status" "0: The RNG clock is correct (fRNGCLK> fHCLK/32),1: The RNG clock before internal divider is.."
newline
rbitfld.long 0x4 2. "SECS,Seed error current status" "0: No faulty sequence has currently been detected.,1: At least one of the following faulty sequence.."
rbitfld.long 0x4 1. "CECS,Clock error current status" "0: The RNG clock is correct (fRNGCLK> fHCLK/32). If..,1: The RNG clock is too slow (fRNGCLK< fHCLK/32)."
newline
rbitfld.long 0x4 0. "DRDY,Data Ready" "0: The RNG_DR register is not yet valid no random..,1: The RNG_DR register contains valid random data."
rgroup.long 0x8++0x3
line.long 0x0 "RNG_DR,RNG data register"
hexmask.long 0x0 0.--31. 1. "RNDATA,Random data"
group.long 0x10++0x3
line.long 0x0 "RNG_HTCR,RNG health test control register"
hexmask.long 0x0 0.--31. 1. "HTCFG,health test configuration"
tree.end
tree.end
tree "RTC (Real-Time Clock)"
base ad:0x0
tree "RTC"
base ad:0x46007800
group.long 0x0++0x7
line.long 0x0 "RTC_TR,RTC time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
line.long 0x4 "RTC_DR,RTC date register"
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
newline
bitfld.long 0x4 13.--15. "WDU,Week day units" "0: forbidden,1: Monday,?,?,?,?,?,7: Sunday"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
rgroup.long 0x8++0x3
line.long 0x0 "RTC_SSR,RTC subsecond register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter"
group.long 0xC++0x17
line.long 0x0 "RTC_ICSR,RTC initialization control and status register"
rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1"
bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "0: 1s calendar increment is generated each time..,1: 1s calendar increment is generated each time..,2: 1s calendar increment is generated each time..,3: 1s calendar increment is generated each time..,4: 1s calendar increment is generated each time..,5: 1s calendar increment is generated each time..,6: 1s calendar increment is generated each time..,7: 1s calendar increment is generated each time.."
newline
bitfld.long 0x0 8.--9. "BIN,Binary mode" "0: Free running BCD calendar mode (Binary mode..,1: Free running Binary mode (BCD mode disabled),2: Free running BCD calendar and Binary modes,3: Free running BCD calendar and Binary modes"
bitfld.long 0x0 7. "INIT,Initialization mode" "0: Free running mode,1: Initialization mode used to program time and.."
newline
rbitfld.long 0x0 6. "INITF,Initialization flag" "0: Calendar registers update is not allowed,1: Calendar registers update is allowed"
bitfld.long 0x0 5. "RSF,Registers synchronization flag" "0: Calendar shadow registers not yet synchronized,1: Calendar shadow registers synchronized"
newline
rbitfld.long 0x0 4. "INITS,Initialization status flag" "0: Calendar has not been initialized,1: Calendar has been initialized"
rbitfld.long 0x0 3. "SHPF,Shift operation pending" "0: No shift operation is pending,1: A shift operation is pending"
newline
rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "0: Wakeup timer configuration update not allowed..,1: Wakeup timer configuration update allowed"
line.long 0x4 "RTC_PRER,RTC prescaler register"
hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor"
hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor"
line.long 0x8 "RTC_WUTR,RTC wakeup timer register"
hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wakeup auto-reload output clear value"
hexmask.long.word 0x8 0.--15. 1. "WUT,Wakeup auto-reload value bits"
line.long 0xC "RTC_CR,RTC control register"
bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0: TAMPALRM is output on RTC_OUT2,1: CALIB is output on RTC_OUT2 and TAMPALRM is.."
bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "0: TAMPALRM is push-pull output,1: TAMPALRM is open-drain output"
newline
bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "0: No pull-up is applied on TAMPALRM output,1: A pull-up is applied on TAMPALRM output"
bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "0: Alarm B event generates a trigger event and..,1: Alarm B event generates a trigger event. ALRBF.."
newline
bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "0: Alarm A event generates a trigger event and..,1: Alarm A event generates a trigger event. ALRAF.."
bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "0: The tamper flag is not routed on TAMPALRM,1: The tamper flag is routed on TAMPALRM combined.."
newline
bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "0: Tamper detection event does not cause a RTC..,1: Save RTC timestamp on tamper detection event"
bitfld.long 0xC 23. "COE,Calibration output enable" "0: Calibration output disabled,1: Calibration output enabled"
newline
bitfld.long 0xC 21.--22. "OSEL,Output selection" "0: Output disabled,1: Alarm A output enabled,2: Alarm B output enabled,3: Wakeup output enabled"
bitfld.long 0xC 20. "POL,Output polarity" "0: The pin is high when ALRAF/ALRBF/WUTF is..,1: The pin is low when ALRAF/ALRBF/WUTF is asserted.."
newline
bitfld.long 0xC 19. "COSEL,Calibration output selection" "0: Calibration output is 512 Hz,1: Calibration output is 1 Hz"
bitfld.long 0xC 18. "BKP,Backup" "0,1"
newline
bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "0: No effect,1: Subtracts 1 hour to the current time. This can.."
bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "0: No effect,1: Adds 1 hour to the current time. This can be.."
newline
bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "0: Timestamp interrupt disable,1: Timestamp interrupt enable"
bitfld.long 0xC 14. "WUTIE,Wakeup timer interrupt enable" "0: Wakeup timer interrupt disabled,1: Wakeup timer interrupt enabled"
newline
bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "0: Alarm B interrupt disable,1: Alarm B interrupt enable"
bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "0: Alarm A interrupt disabled,1: Alarm A interrupt enabled"
newline
bitfld.long 0xC 11. "TSE,timestamp enable" "0: timestamp disable,1: timestamp enable"
bitfld.long 0xC 10. "WUTE,Wakeup timer enable" "0: Wakeup timer disabled,1: Wakeup timer enabled"
newline
bitfld.long 0xC 9. "ALRBE,Alarm B enable" "0: Alarm B disabled,1: Alarm B enabled"
bitfld.long 0xC 8. "ALRAE,Alarm A enable" "0: Alarm A disabled,1: Alarm A enabled"
newline
bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "0: SSR underflow interrupt disabled,1: SSR underflow interrupt enabled"
bitfld.long 0xC 6. "FMT,Hour format" "0: 24 hour/day format,1: AM/PM hour format"
newline
bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "0: Calendar values (when reading from RTC_SSR..,1: Calendar values (when reading from RTC_SSR.."
bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0: RTC_REFIN detection disabled,1: RTC_REFIN detection enabled"
newline
bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "0: RTC_TS input rising edge generates a timestamp..,1: RTC_TS input falling edge generates a timestamp.."
bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wakeup clock selection" "0: RTC/16 clock is selected,1: RTC/8 clock is selected,2: RTC/4 clock is selected,3: RTC/2 clock is selected,?,?,?,?"
line.long 0x10 "RTC_PRIVCFGR,RTC privilege mode control register"
bitfld.long 0x10 15. "PRIV,RTC privilege protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x10 13. "CALPRIV,Shift register  Delight saving  calibration and reference clock privilege protection" "0: Shift register Delight saving calibration and..,1: Shift register Delight saving calibration and.."
bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "0: RTC Timestamp configuration and interrupt clear..,1: RTC Timestamp configuration and interrupt clear.."
newline
bitfld.long 0x10 2. "WUTPRIV,Wakeup timer privilege protection" "0: RTC Wakeup timer configuration and interrupt..,1: RTC Wakeup timer configuration and interrupt.."
bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "0: RTC Alarm B configuration and interrupt clear..,1: RTC Alarm B configuration and interrupt clear.."
newline
bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "0: RTC Alarm A and SSR underflow configuration and..,1: RTC Alarm A and SSR underflow configuration and.."
line.long 0x14 "RTC_SECCFGR,RTC secure configuration register"
bitfld.long 0x14 15. "SEC,RTC global protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x14 14. "INITSEC,Initialization protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x14 13. "CALSEC,Shift register  daylight saving  calibration and reference clock protection" "0: Shift register daylight saving calibration and..,1: Shift register daylight saving calibration and.."
bitfld.long 0x14 3. "TSSEC,Timestamp protection" "0: RTC timestamp configuration and interrupt clear..,1: RTC timestamp configuration and interrupt clear.."
newline
bitfld.long 0x14 2. "WUTSEC,Wakeup timer protection" "0: RTC wakeup timer configuration and interrupt..,1: RTC wakeup timer configuration and interrupt.."
bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "0: RTC alarm B configuration and interrupt clear..,1: RTC alarm B configuration and interrupt clear.."
newline
bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "0: RTC alarm A and SSR underflow configuration and..,1: RTC alarm A and SSR underflow configuration and.."
wgroup.long 0x24++0x3
line.long 0x0 "RTC_WPR,RTC write protection register"
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
group.long 0x28++0x3
line.long 0x0 "RTC_CALR,RTC calibration register"
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5 ppm" "0: No RTCCLK pulses are added.,1: One RTCCLK pulse is effectively inserted every.."
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1"
newline
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1"
bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "0: Calibration window is 2<sup>20</sup> RTCCLK..,1: Calibration window is 2<sup>20</sup> ck_apre.."
newline
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
wgroup.long 0x2C++0x3
line.long 0x0 "RTC_SHIFTR,RTC shift control register"
bitfld.long 0x0 31. "ADD1S,Add one second" "0: No effect,1: Add one second to the clock/calendar"
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second"
rgroup.long 0x30++0xB
line.long 0x0 "RTC_TSTR,RTC timestamp time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_TSDR,RTC timestamp date register"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "RTC_TSSSR,RTC timestamp subsecond register"
hexmask.long 0x8 0.--31. 1. "SS,Subsecond value/synchronous binary counter values"
group.long 0x40++0xF
line.long 0x0 "RTC_ALRMAR,RTC alarm A register"
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0: Alarm A set if the date/day match,1: Date/day don't care in alarm A comparison"
bitfld.long 0x0 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day. DT[1:0] is.."
newline
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0: Alarm A set if the hours match,1: Hours don't care in alarm A comparison"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0: Alarm A set if the minutes match,1: Minutes don't care in alarm A comparison"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0: Alarm A set if the seconds match,1: Seconds don't care in alarm A comparison"
newline
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_ALRMASSR,RTC alarm A subsecond register"
bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0x4 0.--14. 1. "SS,Subseconds value"
line.long 0x8 "RTC_ALRMBR,RTC alarm B register"
bitfld.long 0x8 31. "MSK4,Alarm B date mask" "0: Alarm B set if the date and day match,1: Date and day don't care in alarm B comparison"
bitfld.long 0x8 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day. DT[1:0] is.."
newline
bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "0: Alarm B set if the hours match,1: Hours don't care in alarm B comparison"
bitfld.long 0x8 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "0: Alarm B set if the minutes match,1: Minutes don't care in alarm B comparison"
bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "0: Alarm B set if the seconds match,1: Seconds don't care in alarm B comparison"
newline
bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format"
line.long 0xC "RTC_ALRMBSSR,RTC alarm B subsecond register"
bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0xC 0.--14. 1. "SS,Subseconds value"
rgroup.long 0x50++0xB
line.long 0x0 "RTC_SR,RTC status register"
bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1"
bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1"
newline
bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1"
bitfld.long 0x0 2. "WUTF,Wakeup timer flag" "0,1"
newline
bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1"
bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1"
line.long 0x4 "RTC_MISR,RTC non-secure masked interrupt status register"
bitfld.long 0x4 6. "SSRUMF,SSR underflow non-secure masked flag" "0,1"
bitfld.long 0x4 4. "TSOVMF,Timestamp overflow non-secure masked flag" "0,1"
newline
bitfld.long 0x4 3. "TSMF,Timestamp non-secure masked flag" "0,1"
bitfld.long 0x4 2. "WUTMF,Wakeup timer non-secure masked flag" "0,1"
newline
bitfld.long 0x4 1. "ALRBMF,Alarm B non-secure masked flag" "0,1"
bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1"
line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register"
bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1"
bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1"
bitfld.long 0x8 2. "WUTMF,Wakeup timer interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1"
bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1"
wgroup.long 0x5C++0x3
line.long 0x0 "RTC_SCR,RTC status clear register"
bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1"
bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1"
newline
bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1"
bitfld.long 0x0 2. "CWUTF,Clear wakeup timer flag" "0,1"
newline
bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1"
bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1"
group.long 0x70++0x7
line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register"
hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
tree.end
tree "SEC_RTC"
base ad:0x56007800
group.long 0x0++0x7
line.long 0x0 "RTC_TR,RTC time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format"
line.long 0x4 "RTC_DR,RTC date register"
hexmask.long.byte 0x4 20.--23. 1. "YT,Year tens in BCD format"
hexmask.long.byte 0x4 16.--19. 1. "YU,Year units in BCD format"
newline
bitfld.long 0x4 13.--15. "WDU,Week day units" "0: forbidden,1: Monday,?,?,?,?,?,7: Sunday"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
rgroup.long 0x8++0x3
line.long 0x0 "RTC_SSR,RTC subsecond register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous binary counter"
group.long 0xC++0x17
line.long 0x0 "RTC_ICSR,RTC initialization control and status register"
rbitfld.long 0x0 16. "RECALPF,Recalibration pending Flag" "0,1"
bitfld.long 0x0 10.--12. "BCDU,BCD update (BIN = 10 or 11)" "0: 1s calendar increment is generated each time..,1: 1s calendar increment is generated each time..,2: 1s calendar increment is generated each time..,3: 1s calendar increment is generated each time..,4: 1s calendar increment is generated each time..,5: 1s calendar increment is generated each time..,6: 1s calendar increment is generated each time..,7: 1s calendar increment is generated each time.."
newline
bitfld.long 0x0 8.--9. "BIN,Binary mode" "0: Free running BCD calendar mode (Binary mode..,1: Free running Binary mode (BCD mode disabled),2: Free running BCD calendar and Binary modes,3: Free running BCD calendar and Binary modes"
bitfld.long 0x0 7. "INIT,Initialization mode" "0: Free running mode,1: Initialization mode used to program time and.."
newline
rbitfld.long 0x0 6. "INITF,Initialization flag" "0: Calendar registers update is not allowed,1: Calendar registers update is allowed"
bitfld.long 0x0 5. "RSF,Registers synchronization flag" "0: Calendar shadow registers not yet synchronized,1: Calendar shadow registers synchronized"
newline
rbitfld.long 0x0 4. "INITS,Initialization status flag" "0: Calendar has not been initialized,1: Calendar has been initialized"
rbitfld.long 0x0 3. "SHPF,Shift operation pending" "0: No shift operation is pending,1: A shift operation is pending"
newline
rbitfld.long 0x0 2. "WUTWF,Wakeup timer write flag" "0: Wakeup timer configuration update not allowed..,1: Wakeup timer configuration update allowed"
line.long 0x4 "RTC_PRER,RTC prescaler register"
hexmask.long.byte 0x4 16.--22. 1. "PREDIV_A,Asynchronous prescaler factor"
hexmask.long.word 0x4 0.--14. 1. "PREDIV_S,Synchronous prescaler factor"
line.long 0x8 "RTC_WUTR,RTC wakeup timer register"
hexmask.long.word 0x8 16.--31. 1. "WUTOCLR,Wakeup auto-reload output clear value"
hexmask.long.word 0x8 0.--15. 1. "WUT,Wakeup auto-reload value bits"
line.long 0xC "RTC_CR,RTC control register"
bitfld.long 0xC 31. "OUT2EN,RTC_OUT2 output enable" "0: TAMPALRM is output on RTC_OUT2,1: CALIB is output on RTC_OUT2 and TAMPALRM is.."
bitfld.long 0xC 30. "TAMPALRM_TYPE,TAMPALRM output type" "0: TAMPALRM is push-pull output,1: TAMPALRM is open-drain output"
newline
bitfld.long 0xC 29. "TAMPALRM_PU,TAMPALRM pull-up enable" "0: No pull-up is applied on TAMPALRM output,1: A pull-up is applied on TAMPALRM output"
bitfld.long 0xC 28. "ALRBFCLR,Alarm B flag automatic clear" "0: Alarm B event generates a trigger event and..,1: Alarm B event generates a trigger event. ALRBF.."
newline
bitfld.long 0xC 27. "ALRAFCLR,Alarm A flag automatic clear" "0: Alarm A event generates a trigger event and..,1: Alarm A event generates a trigger event. ALRAF.."
bitfld.long 0xC 26. "TAMPOE,Tamper detection output enable on TAMPALRM" "0: The tamper flag is not routed on TAMPALRM,1: The tamper flag is routed on TAMPALRM combined.."
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bitfld.long 0xC 25. "TAMPTS,Activate timestamp on tamper detection event" "0: Tamper detection event does not cause a RTC..,1: Save RTC timestamp on tamper detection event"
bitfld.long 0xC 23. "COE,Calibration output enable" "0: Calibration output disabled,1: Calibration output enabled"
newline
bitfld.long 0xC 21.--22. "OSEL,Output selection" "0: Output disabled,1: Alarm A output enabled,2: Alarm B output enabled,3: Wakeup output enabled"
bitfld.long 0xC 20. "POL,Output polarity" "0: The pin is high when ALRAF/ALRBF/WUTF is..,1: The pin is low when ALRAF/ALRBF/WUTF is asserted.."
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bitfld.long 0xC 19. "COSEL,Calibration output selection" "0: Calibration output is 512 Hz,1: Calibration output is 1 Hz"
bitfld.long 0xC 18. "BKP,Backup" "0,1"
newline
bitfld.long 0xC 17. "SUB1H,Subtract 1 hour (winter time change)" "0: No effect,1: Subtracts 1 hour to the current time. This can.."
bitfld.long 0xC 16. "ADD1H,Add 1 hour (summer time change)" "0: No effect,1: Adds 1 hour to the current time. This can be.."
newline
bitfld.long 0xC 15. "TSIE,Timestamp interrupt enable" "0: Timestamp interrupt disable,1: Timestamp interrupt enable"
bitfld.long 0xC 14. "WUTIE,Wakeup timer interrupt enable" "0: Wakeup timer interrupt disabled,1: Wakeup timer interrupt enabled"
newline
bitfld.long 0xC 13. "ALRBIE,Alarm B interrupt enable" "0: Alarm B interrupt disable,1: Alarm B interrupt enable"
bitfld.long 0xC 12. "ALRAIE,Alarm A interrupt enable" "0: Alarm A interrupt disabled,1: Alarm A interrupt enabled"
newline
bitfld.long 0xC 11. "TSE,timestamp enable" "0: timestamp disable,1: timestamp enable"
bitfld.long 0xC 10. "WUTE,Wakeup timer enable" "0: Wakeup timer disabled,1: Wakeup timer enabled"
newline
bitfld.long 0xC 9. "ALRBE,Alarm B enable" "0: Alarm B disabled,1: Alarm B enabled"
bitfld.long 0xC 8. "ALRAE,Alarm A enable" "0: Alarm A disabled,1: Alarm A enabled"
newline
bitfld.long 0xC 7. "SSRUIE,SSR underflow interrupt enable" "0: SSR underflow interrupt disabled,1: SSR underflow interrupt enabled"
bitfld.long 0xC 6. "FMT,Hour format" "0: 24 hour/day format,1: AM/PM hour format"
newline
bitfld.long 0xC 5. "BYPSHAD,Bypass the shadow registers" "0: Calendar values (when reading from RTC_SSR..,1: Calendar values (when reading from RTC_SSR.."
bitfld.long 0xC 4. "REFCKON,RTC_REFIN reference clock detection enable (50 or 60 Hz)" "0: RTC_REFIN detection disabled,1: RTC_REFIN detection enabled"
newline
bitfld.long 0xC 3. "TSEDGE,Timestamp event active edge" "0: RTC_TS input rising edge generates a timestamp..,1: RTC_TS input falling edge generates a timestamp.."
bitfld.long 0xC 0.--2. "WUCKSEL,ck_wut wakeup clock selection" "0: RTC/16 clock is selected,1: RTC/8 clock is selected,2: RTC/4 clock is selected,3: RTC/2 clock is selected,?,?,?,?"
line.long 0x10 "RTC_PRIVCFGR,RTC privilege mode control register"
bitfld.long 0x10 15. "PRIV,RTC privilege protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x10 14. "INITPRIV,Initialization privilege protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x10 13. "CALPRIV,Shift register  Delight saving  calibration and reference clock privilege protection" "0: Shift register Delight saving calibration and..,1: Shift register Delight saving calibration and.."
bitfld.long 0x10 3. "TSPRIV,Timestamp privilege protection" "0: RTC Timestamp configuration and interrupt clear..,1: RTC Timestamp configuration and interrupt clear.."
newline
bitfld.long 0x10 2. "WUTPRIV,Wakeup timer privilege protection" "0: RTC Wakeup timer configuration and interrupt..,1: RTC Wakeup timer configuration and interrupt.."
bitfld.long 0x10 1. "ALRBPRIV,Alarm B privilege protection" "0: RTC Alarm B configuration and interrupt clear..,1: RTC Alarm B configuration and interrupt clear.."
newline
bitfld.long 0x10 0. "ALRAPRIV,Alarm A and SSR underflow privilege protection" "0: RTC Alarm A and SSR underflow configuration and..,1: RTC Alarm A and SSR underflow configuration and.."
line.long 0x14 "RTC_SECCFGR,RTC secure configuration register"
bitfld.long 0x14 15. "SEC,RTC global protection" "0: All RTC registers can be written when the APB..,1: All RTC registers can be written only when the.."
bitfld.long 0x14 14. "INITSEC,Initialization protection" "0: RTC Initialization mode calendar and prescalers..,1: RTC Initialization mode calendar and prescalers.."
newline
bitfld.long 0x14 13. "CALSEC,Shift register  daylight saving  calibration and reference clock protection" "0: Shift register daylight saving calibration and..,1: Shift register daylight saving calibration and.."
bitfld.long 0x14 3. "TSSEC,Timestamp protection" "0: RTC timestamp configuration and interrupt clear..,1: RTC timestamp configuration and interrupt clear.."
newline
bitfld.long 0x14 2. "WUTSEC,Wakeup timer protection" "0: RTC wakeup timer configuration and interrupt..,1: RTC wakeup timer configuration and interrupt.."
bitfld.long 0x14 1. "ALRBSEC,Alarm B protection" "0: RTC alarm B configuration and interrupt clear..,1: RTC alarm B configuration and interrupt clear.."
newline
bitfld.long 0x14 0. "ALRASEC,Alarm A and SSR underflow protection" "0: RTC alarm A and SSR underflow configuration and..,1: RTC alarm A and SSR underflow configuration and.."
wgroup.long 0x24++0x3
line.long 0x0 "RTC_WPR,RTC write protection register"
hexmask.long.byte 0x0 0.--7. 1. "KEY,Write protection key"
group.long 0x28++0x3
line.long 0x0 "RTC_CALR,RTC calibration register"
bitfld.long 0x0 15. "CALP,Increase frequency of RTC by 488.5 ppm" "0: No RTCCLK pulses are added.,1: One RTCCLK pulse is effectively inserted every.."
bitfld.long 0x0 14. "CALW8,Use an 8-second calibration cycle period" "0,1"
newline
bitfld.long 0x0 13. "CALW16,Use a 16-second calibration cycle period" "0,1"
bitfld.long 0x0 12. "LPCAL,RTC low-power mode" "0: Calibration window is 2<sup>20</sup> RTCCLK..,1: Calibration window is 2<sup>20</sup> ck_apre.."
newline
hexmask.long.word 0x0 0.--8. 1. "CALM,Calibration minus"
wgroup.long 0x2C++0x3
line.long 0x0 "RTC_SHIFTR,RTC shift control register"
bitfld.long 0x0 31. "ADD1S,Add one second" "0: No effect,1: Add one second to the clock/calendar"
hexmask.long.word 0x0 0.--14. 1. "SUBFS,Subtract a fraction of a second"
rgroup.long 0x30++0xB
line.long 0x0 "RTC_TSTR,RTC timestamp time register"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format." "0,1,2,3"
newline
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format."
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format."
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_TSDR,RTC timestamp date register"
bitfld.long 0x4 13.--15. "WDU,Week day units" "0,1,2,3,4,5,6,7"
bitfld.long 0x4 12. "MT,Month tens in BCD format" "0,1"
newline
hexmask.long.byte 0x4 8.--11. 1. "MU,Month units in BCD format"
bitfld.long 0x4 4.--5. "DT,Date tens in BCD format" "0,1,2,3"
newline
hexmask.long.byte 0x4 0.--3. 1. "DU,Date units in BCD format"
line.long 0x8 "RTC_TSSSR,RTC timestamp subsecond register"
hexmask.long 0x8 0.--31. 1. "SS,Subsecond value/synchronous binary counter values"
group.long 0x40++0xF
line.long 0x0 "RTC_ALRMAR,RTC alarm A register"
bitfld.long 0x0 31. "MSK4,Alarm A date mask" "0: Alarm A set if the date/day match,1: Date/day don't care in alarm A comparison"
bitfld.long 0x0 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day. DT[1:0] is.."
newline
bitfld.long 0x0 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x0 23. "MSK3,Alarm A hours mask" "0: Alarm A set if the hours match,1: Hours don't care in alarm A comparison"
bitfld.long 0x0 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x0 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x0 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x0 15. "MSK2,Alarm A minutes mask" "0: Alarm A set if the minutes match,1: Minutes don't care in alarm A comparison"
bitfld.long 0x0 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x0 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x0 7. "MSK1,Alarm A seconds mask" "0: Alarm A set if the seconds match,1: Seconds don't care in alarm A comparison"
newline
bitfld.long 0x0 4.--6. "ST,Second tens in BCD format." "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 0.--3. 1. "SU,Second units in BCD format."
line.long 0x4 "RTC_ALRMASSR,RTC alarm A subsecond register"
bitfld.long 0x4 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0x4 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0x4 0.--14. 1. "SS,Subseconds value"
line.long 0x8 "RTC_ALRMBR,RTC alarm B register"
bitfld.long 0x8 31. "MSK4,Alarm B date mask" "0: Alarm B set if the date and day match,1: Date and day don't care in alarm B comparison"
bitfld.long 0x8 30. "WDSEL,Week day selection" "0: DU[3:0] represents the date units,1: DU[3:0] represents the week day. DT[1:0] is.."
newline
bitfld.long 0x8 28.--29. "DT,Date tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 24.--27. 1. "DU,Date units or day in BCD format"
newline
bitfld.long 0x8 23. "MSK3,Alarm B hours mask" "0: Alarm B set if the hours match,1: Hours don't care in alarm B comparison"
bitfld.long 0x8 22. "PM,AM/PM notation" "0: AM or 24-hour format,1: PM"
newline
bitfld.long 0x8 20.--21. "HT,Hour tens in BCD format" "0,1,2,3"
hexmask.long.byte 0x8 16.--19. 1. "HU,Hour units in BCD format"
newline
bitfld.long 0x8 15. "MSK2,Alarm B minutes mask" "0: Alarm B set if the minutes match,1: Minutes don't care in alarm B comparison"
bitfld.long 0x8 12.--14. "MNT,Minute tens in BCD format" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x8 8.--11. 1. "MNU,Minute units in BCD format"
bitfld.long 0x8 7. "MSK1,Alarm B seconds mask" "0: Alarm B set if the seconds match,1: Seconds don't care in alarm B comparison"
newline
bitfld.long 0x8 4.--6. "ST,Second tens in BCD format" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x8 0.--3. 1. "SU,Second units in BCD format"
line.long 0xC "RTC_ALRMBSSR,RTC alarm B subsecond register"
bitfld.long 0xC 31. "SSCLR,Clear synchronous counter on alarm (Binary mode only)" "0: The synchronous binary counter (SS[31:0] in..,1: The synchronous binary counter (SS[31:0] in.."
hexmask.long.byte 0xC 24.--29. 1. "MASKSS,Mask the most-significant bits starting at this bit"
newline
hexmask.long.word 0xC 0.--14. 1. "SS,Subseconds value"
rgroup.long 0x50++0xB
line.long 0x0 "RTC_SR,RTC status register"
bitfld.long 0x0 6. "SSRUF,SSR underflow flag" "0,1"
bitfld.long 0x0 4. "TSOVF,Timestamp overflow flag" "0,1"
newline
bitfld.long 0x0 3. "TSF,Timestamp flag" "0,1"
bitfld.long 0x0 2. "WUTF,Wakeup timer flag" "0,1"
newline
bitfld.long 0x0 1. "ALRBF,Alarm B flag" "0,1"
bitfld.long 0x0 0. "ALRAF,Alarm A flag" "0,1"
line.long 0x4 "RTC_MISR,RTC non-secure masked interrupt status register"
bitfld.long 0x4 6. "SSRUMF,SSR underflow non-secure masked flag" "0,1"
bitfld.long 0x4 4. "TSOVMF,Timestamp overflow non-secure masked flag" "0,1"
newline
bitfld.long 0x4 3. "TSMF,Timestamp non-secure masked flag" "0,1"
bitfld.long 0x4 2. "WUTMF,Wakeup timer non-secure masked flag" "0,1"
newline
bitfld.long 0x4 1. "ALRBMF,Alarm B non-secure masked flag" "0,1"
bitfld.long 0x4 0. "ALRAMF,Alarm A masked flag" "0,1"
line.long 0x8 "RTC_SMISR,RTC secure masked interrupt status register"
bitfld.long 0x8 6. "SSRUMF,SSR underflow secure masked flag" "0,1"
bitfld.long 0x8 4. "TSOVMF,Timestamp overflow interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 3. "TSMF,Timestamp interrupt secure masked flag" "0,1"
bitfld.long 0x8 2. "WUTMF,Wakeup timer interrupt secure masked flag" "0,1"
newline
bitfld.long 0x8 1. "ALRBMF,Alarm B interrupt secure masked flag" "0,1"
bitfld.long 0x8 0. "ALRAMF,Alarm A interrupt secure masked flag" "0,1"
wgroup.long 0x5C++0x3
line.long 0x0 "RTC_SCR,RTC status clear register"
bitfld.long 0x0 6. "CSSRUF,Clear SSR underflow flag" "0,1"
bitfld.long 0x0 4. "CTSOVF,Clear timestamp overflow flag" "0,1"
newline
bitfld.long 0x0 3. "CTSF,Clear timestamp flag" "0,1"
bitfld.long 0x0 2. "CWUTF,Clear wakeup timer flag" "0,1"
newline
bitfld.long 0x0 1. "CALRBF,Clear alarm B flag" "0,1"
bitfld.long 0x0 0. "CALRAF,Clear alarm A flag" "0,1"
group.long 0x70++0x7
line.long 0x0 "RTC_ALRABINR,RTC alarm A binary mode register"
hexmask.long 0x0 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
line.long 0x4 "RTC_ALRBBINR,RTC alarm B binary mode register"
hexmask.long 0x4 0.--31. 1. "SS,Synchronous counter alarm value in Binary mode"
tree.end
tree.end
tree "SAES (Secure AES Coprocessor)"
base ad:0x0
tree "SAES"
base ad:0x420C0C00
group.long 0x0++0x3
line.long 0x0 "SAES_CR,SAES control register"
bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1"
bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "0: Software key loaded in key registers SAES_KEYx,1: Derived hardware unique key (DHUK),2: Boot hardware key (BHK),?,4: XOR of DHUK and BHK,?,?,7: Test mode key (256-bit hardware constant.."
newline
bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "0: AES peripheral,?,?,?"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode. Key registers are freely usable..,1: Wrapped key mode. Key loaded in key registers..,2: Shared key mode. After a successful decryption..,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 19. "KEYPROT,Key protection" "0: When KEYVALID is set and KEYSEL[2:0] = 0..,1: When KEYVALID is set key error flag (KEIF) is.."
newline
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
newline
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: DMA for outgoing data transfer is disabled,1: DMA for outgoing data transfer is enabled"
newline
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: DMA for incoming data transfer is disabled,1: DMA for incoming data transfer is enabled"
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
newline
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,3: Reserved"
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
newline
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "SAES_SR,SAES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to SAES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to SAES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "SAES_DINR,SAES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Input data word"
rgroup.long 0xC++0x3
line.long 0x0 "SAES_DOUTR,SAES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Output data word"
wgroup.long 0x10++0xF
line.long 0x0 "SAES_KEYR0,SAES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [31:0]"
line.long 0x4 "SAES_KEYR1,SAES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [63:32]"
line.long 0x8 "SAES_KEYR2,SAES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [95:64]"
line.long 0xC "SAES_KEYR3,SAES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "SAES_IVR0,SAES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input  bits [31:0]"
line.long 0x4 "SAES_IVR1,SAES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input  bits [63:32]"
line.long 0x8 "SAES_IVR2,SAES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input  bits [95:64]"
line.long 0xC "SAES_IVR3,SAES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input  bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "SAES_KEYR4,SAES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [159:128]"
line.long 0x4 "SAES_KEYR5,SAES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [191:160]"
line.long 0x8 "SAES_KEYR6,SAES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [223:192]"
line.long 0xC "SAES_KEYR7,SAES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "SAES_SUSPR0,SAES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "SAES_SUSPR1,SAES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "SAES_SUSPR2,SAES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "SAES_SUSPR3,SAES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "SAES_SUSPR4,SAES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "SAES_SUSPR5,SAES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "SAES_SUSPR6,SAES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "SAES_SUSPR7,SAES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "SAES_IER,SAES interrupt enable register"
bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "SAES_ISR,SAES interrupt status register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "0: RNG bus is functional,1: Error detected on RNG bus interface (random seed.."
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key.."
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected (see SAES_SR.."
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "SAES_ICR,SAES interrupt clear register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree "SEC_SAES"
base ad:0x520C0C00
group.long 0x0++0x3
line.long 0x0 "SAES_CR,SAES control register"
bitfld.long 0x0 31. "IPRST,SAES peripheral software reset" "0,1"
bitfld.long 0x0 28.--30. "KEYSEL,Key selection" "0: Software key loaded in key registers SAES_KEYx,1: Derived hardware unique key (DHUK),2: Boot hardware key (BHK),?,4: XOR of DHUK and BHK,?,?,7: Test mode key (256-bit hardware constant.."
newline
bitfld.long 0x0 26.--27. "KSHAREID,Key share identification" "0: AES peripheral,?,?,?"
bitfld.long 0x0 24.--25. "KMOD,Key mode selection" "0: Normal key mode. Key registers are freely usable..,1: Wrapped key mode. Key loaded in key registers..,2: Shared key mode. After a successful decryption..,?"
newline
hexmask.long.byte 0x0 20.--23. 1. "NPBLB,Number of padding bytes in last block"
bitfld.long 0x0 19. "KEYPROT,Key protection" "0: When KEYVALID is set and KEYSEL[2:0] = 0..,1: When KEYVALID is set key error flag (KEIF) is.."
newline
bitfld.long 0x0 18. "KEYSIZE,Key size selection" "0: 128-bit,1: 256-bit"
bitfld.long 0x0 16. "CHMOD_1,CHMOD[2]" "0,1"
newline
bitfld.long 0x0 13.--14. "GCMPH,GCM or CCM phase selection" "0: Initialization phase,1: Header phase,2: Payload phase,3: Final phase"
bitfld.long 0x0 12. "DMAOUTEN,DMA output enable" "0: DMA for outgoing data transfer is disabled,1: DMA for outgoing data transfer is enabled"
newline
bitfld.long 0x0 11. "DMAINEN,DMA input enable" "0: DMA for incoming data transfer is disabled,1: DMA for incoming data transfer is enabled"
bitfld.long 0x0 5.--6. "CHMOD,CHMOD[1:0]: Chaining mode" "0: Electronic codebook (ECB),1: Cipher-block chaining (CBC),2: Counter mode (CTR),3: Galois counter mode (GCM) and Galois message.."
newline
bitfld.long 0x0 3.--4. "MODE,Operating mode" "0: Encryption,1: Key derivation (or key preparation) for ECB/CBC..,2: Decryption,3: Reserved"
bitfld.long 0x0 1.--2. "DATATYPE,Data type" "0: No swapping (32-bit data).,1: Half-word swapping (16-bit data),2: Byte swapping (8-bit data),3: Bit-level swapping"
newline
bitfld.long 0x0 0. "EN,Enable" "0: Disable,1: Enable"
rgroup.long 0x4++0x3
line.long 0x0 "SAES_SR,SAES status register"
bitfld.long 0x0 7. "KEYVALID,Key valid flag" "0: Key not valid,1: Key valid"
bitfld.long 0x0 3. "BUSY,Busy" "0: Idle,1: Busy"
newline
bitfld.long 0x0 2. "WRERRF,Write error flag" "0: No error,1: Unexpected write to SAES_DINR register occurred.."
bitfld.long 0x0 1. "RDERRF,Read error flag" "0: No error,1: Unexpected read to SAES_DOUTR register occurred.."
wgroup.long 0x8++0x3
line.long 0x0 "SAES_DINR,SAES data input register"
hexmask.long 0x0 0.--31. 1. "DIN,Input data word"
rgroup.long 0xC++0x3
line.long 0x0 "SAES_DOUTR,SAES data output register"
hexmask.long 0x0 0.--31. 1. "DOUT,Output data word"
wgroup.long 0x10++0xF
line.long 0x0 "SAES_KEYR0,SAES key register 0"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [31:0]"
line.long 0x4 "SAES_KEYR1,SAES key register 1"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [63:32]"
line.long 0x8 "SAES_KEYR2,SAES key register 2"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [95:64]"
line.long 0xC "SAES_KEYR3,SAES key register 3"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [127:96]"
group.long 0x20++0xF
line.long 0x0 "SAES_IVR0,SAES initialization vector register 0"
hexmask.long 0x0 0.--31. 1. "IVI,Initialization vector input  bits [31:0]"
line.long 0x4 "SAES_IVR1,SAES initialization vector register 1"
hexmask.long 0x4 0.--31. 1. "IVI,Initialization vector input  bits [63:32]"
line.long 0x8 "SAES_IVR2,SAES initialization vector register 2"
hexmask.long 0x8 0.--31. 1. "IVI,Initialization vector input  bits [95:64]"
line.long 0xC "SAES_IVR3,SAES initialization vector register 3"
hexmask.long 0xC 0.--31. 1. "IVI,Initialization vector input  bits [127:96]"
wgroup.long 0x30++0xF
line.long 0x0 "SAES_KEYR4,SAES key register 4"
hexmask.long 0x0 0.--31. 1. "KEY,Cryptographic key  bits [159:128]"
line.long 0x4 "SAES_KEYR5,SAES key register 5"
hexmask.long 0x4 0.--31. 1. "KEY,Cryptographic key  bits [191:160]"
line.long 0x8 "SAES_KEYR6,SAES key register 6"
hexmask.long 0x8 0.--31. 1. "KEY,Cryptographic key  bits [223:192]"
line.long 0xC "SAES_KEYR7,SAES key register 7"
hexmask.long 0xC 0.--31. 1. "KEY,Cryptographic key  bits [255:224]"
group.long 0x40++0x1F
line.long 0x0 "SAES_SUSPR0,SAES suspend registers"
hexmask.long 0x0 0.--31. 1. "SUSP,Suspend data"
line.long 0x4 "SAES_SUSPR1,SAES suspend registers"
hexmask.long 0x4 0.--31. 1. "SUSP,Suspend data"
line.long 0x8 "SAES_SUSPR2,SAES suspend registers"
hexmask.long 0x8 0.--31. 1. "SUSP,Suspend data"
line.long 0xC "SAES_SUSPR3,SAES suspend registers"
hexmask.long 0xC 0.--31. 1. "SUSP,Suspend data"
line.long 0x10 "SAES_SUSPR4,SAES suspend registers"
hexmask.long 0x10 0.--31. 1. "SUSP,Suspend data"
line.long 0x14 "SAES_SUSPR5,SAES suspend registers"
hexmask.long 0x14 0.--31. 1. "SUSP,Suspend data"
line.long 0x18 "SAES_SUSPR6,SAES suspend registers"
hexmask.long 0x18 0.--31. 1. "SUSP,Suspend data"
line.long 0x1C "SAES_SUSPR7,SAES suspend registers"
hexmask.long 0x1C 0.--31. 1. "SUSP,Suspend data"
group.long 0x300++0x3
line.long 0x0 "SAES_IER,SAES interrupt enable register"
bitfld.long 0x0 3. "RNGEIE,RNG error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 2. "KEIE,Key error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
newline
bitfld.long 0x0 1. "RWEIE,Read or write error interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
bitfld.long 0x0 0. "CCFIE,Computation complete flag interrupt enable" "0: Disabled (masked),1: Enabled (not masked)"
rgroup.long 0x304++0x3
line.long 0x0 "SAES_ISR,SAES interrupt status register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag" "0: RNG bus is functional,1: Error detected on RNG bus interface (random seed.."
bitfld.long 0x0 2. "KEIF,Key error interrupt flag" "0: No key error detected,1: Key information failed to load into key.."
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag" "0: No read or write error detected,1: Read or write error detected (see SAES_SR.."
bitfld.long 0x0 0. "CCF,Computation complete flag" "0: Not completed,1: Completed"
wgroup.long 0x308++0x3
line.long 0x0 "SAES_ICR,SAES interrupt clear register"
bitfld.long 0x0 3. "RNGEIF,RNG error interrupt flag clear" "0,1"
bitfld.long 0x0 2. "KEIF,Key error interrupt flag clear" "0,1"
newline
bitfld.long 0x0 1. "RWEIF,Read or write error interrupt flag clear" "0,1"
bitfld.long 0x0 0. "CCF,Computation complete flag clear" "0,1"
tree.end
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x0
tree "SEC_SPI1"
base ad:0x50013000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at Half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: TI mode),2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in at single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in Master mode" "0: SS is kept at active level till data transfer is..,1: SPI data frames are interleaved with SS non.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled. The SPI cannot work in a.."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI Master" "0: SPI Slave,1: SPI Master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "0: TXTF interrupt disabled,1: TXTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT  SUSP and TXC interrupt enable" "0: EOT/SUSP/TXC interrupt disabled,1: EOT/SUSP/TXC interrupt enabled"
bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "0: DXP interrupt disabled,1: DXP interrupt enabled"
newline
bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "0: TXP interrupt disabled,1: TXP interrupt enabled"
bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "0: RXP interrupt disabled,1: RXP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are available*,3: 3 frames are available*"
bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (Master mode active or other..,1: Master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected. When MODF is set SPE and.."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TXTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DXP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TXP,Tx-Packet space available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
newline
bitfld.long 0x0 0. "RXP,Rx-Packet available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,HW control of CSTART triggering enable" "0: HW control disabled,1: HW control enabled"
bitfld.long 0x0 20. "TRIGPOL,trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,trigger selection (refer Section : Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TXDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RXDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RXDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TXCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter"
line.long 0x4 "SPI_RXCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SEC_SPI3"
base ad:0x56002000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at Half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: TI mode),2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in at single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in Master mode" "0: SS is kept at active level till data transfer is..,1: SPI data frames are interleaved with SS non.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled. The SPI cannot work in a.."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI Master" "0: SPI Slave,1: SPI Master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "0: TXTF interrupt disabled,1: TXTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT  SUSP and TXC interrupt enable" "0: EOT/SUSP/TXC interrupt disabled,1: EOT/SUSP/TXC interrupt enabled"
bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "0: DXP interrupt disabled,1: DXP interrupt enabled"
newline
bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "0: TXP interrupt disabled,1: TXP interrupt enabled"
bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "0: RXP interrupt disabled,1: RXP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are available*,3: 3 frames are available*"
bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (Master mode active or other..,1: Master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected. When MODF is set SPE and.."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TXTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DXP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TXP,Tx-Packet space available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
newline
bitfld.long 0x0 0. "RXP,Rx-Packet available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,HW control of CSTART triggering enable" "0: HW control disabled,1: HW control enabled"
bitfld.long 0x0 20. "TRIGPOL,trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,trigger selection (refer Section : Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TXDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RXDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RXDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TXCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter"
line.long 0x4 "SPI_RXCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SPI1"
base ad:0x40013000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at Half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: TI mode),2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in at single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in Master mode" "0: SS is kept at active level till data transfer is..,1: SPI data frames are interleaved with SS non.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled. The SPI cannot work in a.."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI Master" "0: SPI Slave,1: SPI Master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "0: TXTF interrupt disabled,1: TXTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT  SUSP and TXC interrupt enable" "0: EOT/SUSP/TXC interrupt disabled,1: EOT/SUSP/TXC interrupt enabled"
bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "0: DXP interrupt disabled,1: DXP interrupt enabled"
newline
bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "0: TXP interrupt disabled,1: TXP interrupt enabled"
bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "0: RXP interrupt disabled,1: RXP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are available*,3: 3 frames are available*"
bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (Master mode active or other..,1: Master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected. When MODF is set SPE and.."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TXTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DXP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TXP,Tx-Packet space available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
newline
bitfld.long 0x0 0. "RXP,Rx-Packet available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,HW control of CSTART triggering enable" "0: HW control disabled,1: HW control enabled"
bitfld.long 0x0 20. "TRIGPOL,trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,trigger selection (refer Section : Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TXDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RXDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RXDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TXCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter"
line.long 0x4 "SPI_RXCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree "SPI3"
base ad:0x46002000
group.long 0x0++0x13
line.long 0x0 "SPI_CR1,SPI control register 1"
bitfld.long 0x0 16. "IOLOCK,locking the AF configuration of associated I/Os" "0: AF configuration is not locked,1: AF configuration is locked"
bitfld.long 0x0 15. "TCRCINI,CRC calculation initialization pattern control for transmitter" "0: all zero pattern is applied,1: all ones pattern is applied"
newline
bitfld.long 0x0 14. "RCRCINI,CRC calculation initialization pattern control for receiver" "0: All zero pattern is applied,1: All ones pattern is applied"
bitfld.long 0x0 13. "CRC33_17,32-bit CRC polynomial configuration" "0: Full size (33-bit or 17-bit) CRC polynomial is..,1: Full size (33-bit or 17-bit) CRC polynomial is.."
newline
bitfld.long 0x0 12. "SSI,internal SS signal input level" "0,1"
bitfld.long 0x0 11. "HDDIR,Rx/Tx direction at Half-duplex mode" "0: SPI is receiver,1: SPI is transmitter"
newline
bitfld.long 0x0 10. "CSUSP,master suspend request" "0,1"
bitfld.long 0x0 9. "CSTART,master transfer start" "0: master transfer is at idle,1: master transfer is ongoing or temporary.."
newline
bitfld.long 0x0 8. "MASRX,master automatic suspension in Receive mode" "0: SPI flow/clock generation is continuous..,1: SPI flow is suspended temporary on RxFIFO full.."
bitfld.long 0x0 0. "SPE,serial peripheral enable" "0: Serial peripheral disabled.,1: Serial peripheral enabled"
line.long 0x4 "SPI_CR2,SPI control register 2"
hexmask.long.word 0x4 0.--15. 1. "TSIZE,number of data at current transfer"
line.long 0x8 "SPI_CFG1,SPI configuration register 1"
bitfld.long 0x8 31. "BPASS,bypass of the prescaler at master baud rate clock generator" "0: bypass is disabled,1: bypass is enabled"
bitfld.long 0x8 28.--30. "MBR,master baud rate prescaler setting" "0: SPI master clock/2,1: TI mode),2: SPI master clock/8,3: SPI master clock/16,4: SPI master clock/32,5: SPI master clock/64,6: SPI master clock/128,7: SPI master clock/256"
newline
bitfld.long 0x8 22. "CRCEN,hardware CRC computation enable" "0: CRC calculation disabled,1: CRC calculation enabled"
hexmask.long.byte 0x8 16.--20. 1. "CRCSIZE,length of CRC frame to be transacted and compared"
newline
bitfld.long 0x8 15. "TXDMAEN,Tx DMA stream enable" "0: Tx DMA disabled,1: Tx DMA enabled"
bitfld.long 0x8 14. "RXDMAEN,Rx DMA stream enable" "0: Rx-DMA disabled,1: Rx-DMA enabled"
newline
bitfld.long 0x8 9. "UDRCFG,behavior of slave transmitter at underrun condition" "0: slave sends a constant pattern defined by the..,1: Slave repeats lastly received data from master."
hexmask.long.byte 0x8 5.--8. 1. "FTHLV,FIFO threshold level"
newline
hexmask.long.byte 0x8 0.--4. 1. "DSIZE,number of bits in at single SPI data frame"
line.long 0xC "SPI_CFG2,SPI configuration register 2"
bitfld.long 0xC 31. "AFCNTR,alternate function GPIOs control" "0: The peripheral takes no control of GPIOs while..,1: The peripheral keeps always control of all.."
bitfld.long 0xC 30. "SSOM,SS output management in Master mode" "0: SS is kept at active level till data transfer is..,1: SPI data frames are interleaved with SS non.."
newline
bitfld.long 0xC 29. "SSOE,SS output enable" "0: SS output is disabled and the SPI can work in..,1: SS output is enabled. The SPI cannot work in a.."
bitfld.long 0xC 28. "SSIOP,SS input/output polarity" "0: low level is active for SS signal,1: high level is active for SS signal"
newline
bitfld.long 0xC 26. "SSM,software management of SS signal input" "0: SS input value is determined by the SS PAD,1: SS input value is determined by the SSI bit"
bitfld.long 0xC 25. "CPOL,clock polarity" "0: SCK signal is at 0 when idle,1: SCK signal is at 1 when idle"
newline
bitfld.long 0xC 24. "CPHA,clock phase" "0: the first clock transition is the first data..,1: the second clock transition is the first data.."
bitfld.long 0xC 23. "LSBFRST,data frame format" "0: MSB transmitted first,1: LSB transmitted first"
newline
bitfld.long 0xC 22. "MASTER,SPI Master" "0: SPI Slave,1: SPI Master"
bitfld.long 0xC 19.--21. "SP,serial protocol" "0: SPI Motorola,1: SPI TI,?,?,?,?,?,?"
newline
bitfld.long 0xC 17.--18. "COMM,SPI Communication Mode" "0: full-duplex,1: simplex transmitter,2: simplex receiver,3: half-duplex"
bitfld.long 0xC 15. "IOSWP,swap functionality of MISO and MOSI pins" "0: no swap,1: MOSI and MISO are swapped"
newline
bitfld.long 0xC 14. "RDIOP,RDY signal input/output polarity" "0: high level of the signal means the slave is..,1: low level of the signal means the slave is ready.."
bitfld.long 0xC 13. "RDIOM,RDY signal input/output management" "0: RDY signal is defined internally fixed as..,1: RDY signal is overtaken from alternate function.."
newline
hexmask.long.byte 0xC 4.--7. 1. "MIDI,master Inter-Data Idleness"
hexmask.long.byte 0xC 0.--3. 1. "MSSI,Master SS Idleness"
line.long 0x10 "SPI_IER,SPI interrupt enable register"
bitfld.long 0x10 9. "MODFIE,mode Fault interrupt enable" "0: MODF interrupt disabled,1: MODF interrupt enabled"
bitfld.long 0x10 8. "TIFREIE,TIFRE interrupt enable" "0: TIFRE interrupt disabled,1: TIFRE interrupt enabled"
newline
bitfld.long 0x10 7. "CRCEIE,CRC error interrupt enable" "0: CRC interrupt disabled,1: CRC interrupt enabled"
bitfld.long 0x10 6. "OVRIE,OVR interrupt enable" "0: OVR interrupt disabled,1: OVR interrupt enabled"
newline
bitfld.long 0x10 5. "UDRIE,UDR interrupt enable" "0: UDR interrupt disabled,1: UDR interrupt enabled"
bitfld.long 0x10 4. "TXTFIE,TXTFIE interrupt enable" "0: TXTF interrupt disabled,1: TXTF interrupt enabled"
newline
bitfld.long 0x10 3. "EOTIE,EOT  SUSP and TXC interrupt enable" "0: EOT/SUSP/TXC interrupt disabled,1: EOT/SUSP/TXC interrupt enabled"
bitfld.long 0x10 2. "DXPIE,DXP interrupt enabled" "0: DXP interrupt disabled,1: DXP interrupt enabled"
newline
bitfld.long 0x10 1. "TXPIE,TXP interrupt enable" "0: TXP interrupt disabled,1: TXP interrupt enabled"
bitfld.long 0x10 0. "RXPIE,RXP interrupt enable" "0: RXP interrupt disabled,1: RXP interrupt enabled"
rgroup.long 0x14++0x3
line.long 0x0 "SPI_SR,SPI status register"
hexmask.long.word 0x0 16.--31. 1. "CTSIZE,number of data frames remaining in current TSIZE session"
bitfld.long 0x0 15. "RXWNE,RxFIFO word not empty" "0: less than four bytes of RxFIFO space is occupied..,1: at least four bytes of RxFIFO space is occupied.."
newline
bitfld.long 0x0 13.--14. "RXPLVL,RxFIFO packing level" "0: no next frame is available at RxFIFO,1: 1 frame is available,2: 2 frames are available*,3: 3 frames are available*"
bitfld.long 0x0 12. "TXC,TxFIFO transmission complete" "0: current data transaction is still ongoing data..,1: last TxFIFO frame transmission complete"
newline
bitfld.long 0x0 11. "SUSP,suspension status" "0: SPI not suspended (Master mode active or other..,1: Master mode is suspended (current frame.."
bitfld.long 0x0 9. "MODF,mode fault" "0: no mode fault,1: mode fault detected. When MODF is set SPE and.."
newline
bitfld.long 0x0 8. "TIFRE,TI frame format error" "0: no TI Frame Error,1: TI frame error detected"
bitfld.long 0x0 7. "CRCE,CRC error" "0: no CRC error,1: CRC error detected"
newline
bitfld.long 0x0 6. "OVR,overrun" "0: no overrun,1: overrun detected"
bitfld.long 0x0 5. "UDR,underrun" "0: no underrun,1: underrun detected"
newline
bitfld.long 0x0 4. "TXTF,transmission transfer filled" "0: upload of TxFIFO is ongoing or not started,1: TxFIFO upload is finished"
bitfld.long 0x0 3. "EOT,end of transfer" "0: transfer is ongoing or not started,1: transfer complete"
newline
bitfld.long 0x0 2. "DXP,duplex packet" "0: TxFIFO is Full and/or RxFIFO is Empty,1: both TxFIFO has space for write and RxFIFO.."
bitfld.long 0x0 1. "TXP,Tx-Packet space available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
newline
bitfld.long 0x0 0. "RXP,Rx-Packet available" "0: In SPI mode it must be interpreted as follow:..,1: In SPI mode it must be interpreted as follow:.."
wgroup.long 0x18++0x3
line.long 0x0 "SPI_IFCR,SPI interrupt/status flags clear register"
bitfld.long 0x0 11. "SUSPC,Suspend flag clear" "0,1"
bitfld.long 0x0 9. "MODFC,mode fault flag clear" "0,1"
newline
bitfld.long 0x0 8. "TIFREC,TI frame format error flag clear" "0,1"
bitfld.long 0x0 7. "CRCEC,CRC error flag clear" "0,1"
newline
bitfld.long 0x0 6. "OVRC,overrun flag clear" "0,1"
bitfld.long 0x0 5. "UDRC,underrun flag clear" "0,1"
newline
bitfld.long 0x0 4. "TXTFC,transmission transfer filled flag clear" "0,1"
bitfld.long 0x0 3. "EOTC,end of transfer flag clear" "0,1"
group.long 0x1C++0x3
line.long 0x0 "SPI_AUTOCR,SPI autonomous mode control register"
bitfld.long 0x0 21. "TRIGEN,HW control of CSTART triggering enable" "0: HW control disabled,1: HW control enabled"
bitfld.long 0x0 20. "TRIGPOL,trigger polarity" "0: trigger is active on raising edge,1: trigger is active on falling edge"
newline
hexmask.long.byte 0x0 16.--19. 1. "TRIGSEL,trigger selection (refer Section : Description of SPI interconnections)."
wgroup.long 0x20++0x3
line.long 0x0 "SPI_TXDR,SPI transmit data register"
hexmask.long 0x0 0.--31. 1. "TXDR,transmit data register"
rgroup.long 0x30++0x3
line.long 0x0 "SPI_RXDR,SPI receive data register"
hexmask.long 0x0 0.--31. 1. "RXDR,receive data register"
group.long 0x40++0x3
line.long 0x0 "SPI_CRCPOLY,SPI polynomial register"
hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC polynomial register"
rgroup.long 0x44++0x7
line.long 0x0 "SPI_TXCRC,SPI transmitter CRC register"
hexmask.long 0x0 0.--31. 1. "TXCRC,CRC register for transmitter"
line.long 0x4 "SPI_RXCRC,SPI receiver CRC register"
hexmask.long 0x4 0.--31. 1. "RXCRC,CRC register for receiver"
group.long 0x4C++0x3
line.long 0x0 "SPI_UDRDR,SPI underrun data register"
hexmask.long 0x0 0.--31. 1. "UDRDR,data at slave underrun condition"
tree.end
tree.end
tree "SYSCFG (System Configuration Controller)"
base ad:0x0
tree "SEC_SYSCFG"
base ad:0x56000400
group.long 0x0++0x1F
line.long 0x0 "SYSCFG_SECCFGR,SYSCFG secure configuration register"
bitfld.long 0x0 3. "FPUSEC,FPU security" "0: SYSCFG_FPUIMR register can be read and written..,1: SYSCFG_FPUIMR register can be read and written.."
bitfld.long 0x0 1. "CLASSBSEC,Class B security" "0: SYSCFG_CFGR2 register can be read and written by..,1: SYSCFG_CFGR2 register can be read and written by.."
newline
bitfld.long 0x0 0. "SYSCFGSEC,SYSCFG clock control  memory erase status and compensation cell registers security" "0: SYSCFG configuration clock in RCC registers..,1: SYSCFG configuration clock in RCC registers.."
line.long 0x4 "SYSCFG_CFGR1,SYSCFG configuration register 1"
bitfld.long 0x4 19. "PB3_FMP,Fast-mode Plus drive capability activation on PB3" "0: PB3 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PAB3 pin and.."
bitfld.long 0x4 18. "PA15_FMP,Fast-mode Plus drive capability activation on PA15" "0: PA15 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA15 pin and.."
newline
bitfld.long 0x4 17. "PA7_FMP,Fast-mode Plus drive capability activation on PA7" "0: PA7 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA7 pin and.."
bitfld.long 0x4 16. "PA6_FMP,Fast-mode Plus drive capability activation on PA6" "0: PA6 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA6 pin and.."
newline
bitfld.long 0x4 9. "ANASWVDD,GPIO analog switch control voltage selection" "0: I/O analog switches are supplied by..,1: I/O analog switches are supplied by.."
bitfld.long 0x4 8. "BOOSTEN,I/O analog switch voltage booster enable" "0: I/O analog switches are supplied by..,1: I/O analog switches are supplied by a dedicated.."
line.long 0x8 "SYSCFG_FPUIMR,SYSCFG FPU interrupt mask register"
hexmask.long.byte 0x8 0.--5. 1. "FPU_IE,Floating point unit interrupts enable bits"
line.long 0xC "SYSCFG_CNSLCKR,SYSCFG CPU non-secure lock register"
bitfld.long 0xC 1. "LOCKNSMPU,Non-secure MPU registers lock" "0: Non-secure MPU registers write enabled,1: Non-secure MPU registers write disabled"
bitfld.long 0xC 0. "LOCKNSVTOR,VTOR_NS register lock" "0: VTOR_NS register write enabled,1: VTOR_NS register write disabled"
line.long 0x10 "SYSCFG_CSLOCKR,SYSCFG CPU secure lock register"
bitfld.long 0x10 2. "LOCKSAU,SAU registers lock" "0: SAU registers write enabled,1: SAU registers write disabled"
bitfld.long 0x10 1. "LOCKSMPU,Secure MPU registers lock" "0: Secure MPU registers writes enabled,1: Secure MPU registers writes disabled"
newline
bitfld.long 0x10 0. "LOCKSVTAIRCR,VTOR_S register and AIRCR register bits lock" "0: VTOR_S register PRIS and BFHFNMINS bits in the..,1: VTOR_S register PRIS and BFHFNMINS bits in the.."
line.long 0x14 "SYSCFG_CFGR2,SYSCFG configuration register 2"
bitfld.long 0x14 3. "ECCL,ECC lock" "0: ECC double error disconnected from TIM1/16/17..,1: ECC double error connected to TIM1/16/17 break.."
bitfld.long 0x14 2. "PVDL,PVD lock enable bit" "0: PVD interrupt disconnected from TIM1/16/17 break..,1: PVD interrupt connected to TIM1/16/17 break.."
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bitfld.long 0x14 1. "SPL,SRAM2 parity lock bit" "0: SRAM2 parity error disconnected from TIM1/16/17..,1: SRAM2 parity error connected to TIM1/16/17 break.."
bitfld.long 0x14 0. "CLL,Cortex-M33 LOCKUP (hardfault) output enable" "0: Cortex-M33 LOCKUP output disconnected from..,1: Cortex-M33 LOCKUP output connected to TIM1/16/17.."
line.long 0x18 "SYSCFG_MESR,SYSCFG memory erase status register"
bitfld.long 0x18 16. "IPMEE,ICACHE and PKA SRAM erase status" "0: ICACHE and PKA SRAM erase ongoing if not yet..,1: ICACHE and PKA SRAM erase done"
bitfld.long 0x18 0. "MCLR,Device memories erase status" "0: Memory erase ongoing if not yet cleared by..,1: Memory erase done"
line.long 0x1C "SYSCFG_CCCSR,SYSCFG compensation cell control/status register"
rbitfld.long 0x1C 8. "RDY1,VDD I/Os compensation cell ready flag" "0: VDD I/Os compensation cell not ready,1: VDD I/Os compensation cell ready"
bitfld.long 0x1C 1. "CS1,VDD I/Os code selection" "0: VDD I/Os code from the cell (available in the..,1: VDD I/Os code from the SYSCFG compensation cell.."
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bitfld.long 0x1C 0. "EN1,VDD I/Os compensation cell enable" "0: VDD I/Os compensation cell disabled,1: VDD I/Os compensation cell enabled"
rgroup.long 0x20++0x3
line.long 0x0 "SYSCFG_CCVR,SYSCFG compensation cell value register"
hexmask.long.byte 0x0 4.--7. 1. "PCV1,PMOS compensation value of the I/Os supplied by V<sub>DD</sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCV1,NMOS compensation value of the I/Os supplied by V<sub>DD</sub>"
group.long 0x24++0x3
line.long 0x0 "SYSCFG_CCCR,SYSCFG compensation cell code register"
hexmask.long.byte 0x0 4.--7. 1. "PCC1,PMOS compensation code of the I/Os supplied by V<sub>DD</sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCC1,NMOS compensation code of the I/Os supplied by V<sub>DD</sub>"
group.long 0x2C++0x3
line.long 0x0 "SYSCFG_RSSCMDR,SYSCFG RSS command register"
hexmask.long.word 0x0 0.--15. 1. "RSSCMD,RSS commands"
tree.end
tree "SYSCFG"
base ad:0x46000400
group.long 0x0++0x1F
line.long 0x0 "SYSCFG_SECCFGR,SYSCFG secure configuration register"
bitfld.long 0x0 3. "FPUSEC,FPU security" "0: SYSCFG_FPUIMR register can be read and written..,1: SYSCFG_FPUIMR register can be read and written.."
bitfld.long 0x0 1. "CLASSBSEC,Class B security" "0: SYSCFG_CFGR2 register can be read and written by..,1: SYSCFG_CFGR2 register can be read and written by.."
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bitfld.long 0x0 0. "SYSCFGSEC,SYSCFG clock control  memory erase status and compensation cell registers security" "0: SYSCFG configuration clock in RCC registers..,1: SYSCFG configuration clock in RCC registers.."
line.long 0x4 "SYSCFG_CFGR1,SYSCFG configuration register 1"
bitfld.long 0x4 19. "PB3_FMP,Fast-mode Plus drive capability activation on PB3" "0: PB3 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PAB3 pin and.."
bitfld.long 0x4 18. "PA15_FMP,Fast-mode Plus drive capability activation on PA15" "0: PA15 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA15 pin and.."
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bitfld.long 0x4 17. "PA7_FMP,Fast-mode Plus drive capability activation on PA7" "0: PA7 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA7 pin and.."
bitfld.long 0x4 16. "PA6_FMP,Fast-mode Plus drive capability activation on PA6" "0: PA6 pin operates in standard mode when not used..,1: Fast-mode Plus mode is enabled on PA6 pin and.."
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bitfld.long 0x4 9. "ANASWVDD,GPIO analog switch control voltage selection" "0: I/O analog switches are supplied by..,1: I/O analog switches are supplied by.."
bitfld.long 0x4 8. "BOOSTEN,I/O analog switch voltage booster enable" "0: I/O analog switches are supplied by..,1: I/O analog switches are supplied by a dedicated.."
line.long 0x8 "SYSCFG_FPUIMR,SYSCFG FPU interrupt mask register"
hexmask.long.byte 0x8 0.--5. 1. "FPU_IE,Floating point unit interrupts enable bits"
line.long 0xC "SYSCFG_CNSLCKR,SYSCFG CPU non-secure lock register"
bitfld.long 0xC 1. "LOCKNSMPU,Non-secure MPU registers lock" "0: Non-secure MPU registers write enabled,1: Non-secure MPU registers write disabled"
bitfld.long 0xC 0. "LOCKNSVTOR,VTOR_NS register lock" "0: VTOR_NS register write enabled,1: VTOR_NS register write disabled"
line.long 0x10 "SYSCFG_CSLOCKR,SYSCFG CPU secure lock register"
bitfld.long 0x10 2. "LOCKSAU,SAU registers lock" "0: SAU registers write enabled,1: SAU registers write disabled"
bitfld.long 0x10 1. "LOCKSMPU,Secure MPU registers lock" "0: Secure MPU registers writes enabled,1: Secure MPU registers writes disabled"
newline
bitfld.long 0x10 0. "LOCKSVTAIRCR,VTOR_S register and AIRCR register bits lock" "0: VTOR_S register PRIS and BFHFNMINS bits in the..,1: VTOR_S register PRIS and BFHFNMINS bits in the.."
line.long 0x14 "SYSCFG_CFGR2,SYSCFG configuration register 2"
bitfld.long 0x14 3. "ECCL,ECC lock" "0: ECC double error disconnected from TIM1/16/17..,1: ECC double error connected to TIM1/16/17 break.."
bitfld.long 0x14 2. "PVDL,PVD lock enable bit" "0: PVD interrupt disconnected from TIM1/16/17 break..,1: PVD interrupt connected to TIM1/16/17 break.."
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bitfld.long 0x14 1. "SPL,SRAM2 parity lock bit" "0: SRAM2 parity error disconnected from TIM1/16/17..,1: SRAM2 parity error connected to TIM1/16/17 break.."
bitfld.long 0x14 0. "CLL,Cortex-M33 LOCKUP (hardfault) output enable" "0: Cortex-M33 LOCKUP output disconnected from..,1: Cortex-M33 LOCKUP output connected to TIM1/16/17.."
line.long 0x18 "SYSCFG_MESR,SYSCFG memory erase status register"
bitfld.long 0x18 16. "IPMEE,ICACHE and PKA SRAM erase status" "0: ICACHE and PKA SRAM erase ongoing if not yet..,1: ICACHE and PKA SRAM erase done"
bitfld.long 0x18 0. "MCLR,Device memories erase status" "0: Memory erase ongoing if not yet cleared by..,1: Memory erase done"
line.long 0x1C "SYSCFG_CCCSR,SYSCFG compensation cell control/status register"
rbitfld.long 0x1C 8. "RDY1,VDD I/Os compensation cell ready flag" "0: VDD I/Os compensation cell not ready,1: VDD I/Os compensation cell ready"
bitfld.long 0x1C 1. "CS1,VDD I/Os code selection" "0: VDD I/Os code from the cell (available in the..,1: VDD I/Os code from the SYSCFG compensation cell.."
newline
bitfld.long 0x1C 0. "EN1,VDD I/Os compensation cell enable" "0: VDD I/Os compensation cell disabled,1: VDD I/Os compensation cell enabled"
rgroup.long 0x20++0x3
line.long 0x0 "SYSCFG_CCVR,SYSCFG compensation cell value register"
hexmask.long.byte 0x0 4.--7. 1. "PCV1,PMOS compensation value of the I/Os supplied by V<sub>DD</sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCV1,NMOS compensation value of the I/Os supplied by V<sub>DD</sub>"
group.long 0x24++0x3
line.long 0x0 "SYSCFG_CCCR,SYSCFG compensation cell code register"
hexmask.long.byte 0x0 4.--7. 1. "PCC1,PMOS compensation code of the I/Os supplied by V<sub>DD</sub>"
hexmask.long.byte 0x0 0.--3. 1. "NCC1,NMOS compensation code of the I/Os supplied by V<sub>DD</sub>"
group.long 0x2C++0x3
line.long 0x0 "SYSCFG_RSSCMDR,SYSCFG RSS command register"
hexmask.long.word 0x0 0.--15. 1. "RSSCMD,RSS commands"
tree.end
tree.end
tree "TAMP (Tamper and Backup)"
base ad:0x0
tree "SEC_TAMP"
base ad:0x56007C00
group.long 0x0++0x13
line.long 0x0 "TAMP_CR1,TAMP control register 1"
bitfld.long 0x0 28. "ITAMP13E,Internal tamper 13 enable" "0: Internal tamper 13 disabled.,1: Internal tamper 13 enabled."
bitfld.long 0x0 27. "ITAMP12E,Internal tamper 12 enable" "0: Internal tamper 12 disabled.,1: Internal tamper 12 enabled."
newline
bitfld.long 0x0 26. "ITAMP11E,Internal tamper 11 enable" "0: Internal tamper 11 disabled.,1: Internal tamper 11 enabled."
bitfld.long 0x0 24. "ITAMP9E,Internal tamper 9 enable" "0: Internal tamper 9 disabled.,1: Internal tamper 9 enabled."
newline
bitfld.long 0x0 23. "ITAMP8E,Internal tamper 8 enable" "0: Internal tamper 8 disabled.,1: Internal tamper 8 enabled."
bitfld.long 0x0 22. "ITAMP7E,Internal tamper 7 enable" "0: Internal tamper 7 disabled.,1: Internal tamper 7 enabled"
newline
bitfld.long 0x0 21. "ITAMP6E,Internal tamper 6 enable" "0: Internal tamper 6 disabled.,1: Internal tamper 6 enabled."
bitfld.long 0x0 20. "ITAMP5E,Internal tamper 5 enable" "0: Internal tamper 5 disabled.,1: Internal tamper 5 enabled."
newline
bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "0: Internal tamper 3 disabled.,1: Internal tamper 3 enabled."
bitfld.long 0x0 5. "TAMP6E,Tamper detection on TAMP_IN6 enable" "0: Tamper detection on TAMP_IN6 is disabled.,1: Tamper detection on TAMP_IN6 is enabled."
newline
bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_IN5 enable" "0: Tamper detection on TAMP_IN5 is disabled.,1: Tamper detection on TAMP_IN5 is enabled."
bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_IN4 enable" "0: Tamper detection on TAMP_IN4 is disabled.,1: Tamper detection on TAMP_IN4 is enabled."
newline
bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_IN3 enable" "0: Tamper detection on TAMP_IN3 is disabled.,1: Tamper detection on TAMP_IN3 is enabled."
bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_IN2 enable" "0: Tamper detection on TAMP_IN2 is disabled.,1: Tamper detection on TAMP_IN2 is enabled."
newline
bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_IN1 enable" "0: Tamper detection on TAMP_IN1 is disabled.,1: Tamper detection on TAMP_IN1 is enabled."
line.long 0x4 "TAMP_CR2,TAMP control register 2"
bitfld.long 0x4 29. "TAMP6TRG,Active level for tamper 6 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 4 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 3 input" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 2 input" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 1 input" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 23. "BKERASE,Backup registers and device secrets<sup>(1)</sup> erase" "0,1"
bitfld.long 0x4 22. "BKBLOCK,Backup registers and device secrets<sup>(1)</sup> access blocked" "0: backup registers and device..,1: backup registers and device.."
newline
bitfld.long 0x4 18. "TAMP3MSK,Tamper 3 mask" "0: Tamper 3 event generates a trigger event and..,1: Tamper 3 event generates a trigger event. TAMP3F.."
bitfld.long 0x4 17. "TAMP2MSK,Tamper 2 mask" "0: Tamper 2 event generates a trigger event and..,1: Tamper 2 event generates a trigger event. TAMP2F.."
newline
bitfld.long 0x4 16. "TAMP1MSK,Tamper 1 mask" "0: Tamper 1 event generates a trigger event and..,1: Tamper 1 event generates a trigger event. TAMP1F.."
bitfld.long 0x4 5. "TAMP6NOER,Tamper 6 no erase" "0: Tamper 6 event erases the backup registers and..,1: Tamper 6 event does not erase the backup.."
newline
bitfld.long 0x4 4. "TAMP5NOER,Tamper 5 no erase" "0: Tamper 5 event erases the backup registers and..,1: Tamper 5 event does not erase the backup.."
bitfld.long 0x4 3. "TAMP4NOER,Tamper 4 no erase" "0: Tamper 4 event erases the backup registers and..,1: Tamper 4 event does not erase the backup.."
newline
bitfld.long 0x4 2. "TAMP3NOER,Tamper 3 no erase" "0: Tamper 3 event erases the backup registers and..,1: Tamper 3 event does not erase the backup.."
bitfld.long 0x4 1. "TAMP2NOER,Tamper 2 no erase" "0: Tamper 2 event erases the backup registers and..,1: Tamper 2 event does not erase the backup.."
newline
bitfld.long 0x4 0. "TAMP1NOER,Tamper 1 no erase" "0: Tamper 1 event erases the backup registers and..,1: Tamper 1 event does not erase the backup.."
line.long 0x8 "TAMP_CR3,TAMP control register 3"
bitfld.long 0x8 12. "ITAMP13NOER,Internal Tamper 13 no erase" "0: Internal Tamper 13 event erases the backup..,1: Internal Tamper 13 event does not erase the.."
bitfld.long 0x8 11. "ITAMP12NOER,Internal Tamper 12 no erase" "0: Internal Tamper 12 event erases the backup..,1: Internal Tamper 12 event does not erase the.."
newline
bitfld.long 0x8 10. "ITAMP11NOER,Internal Tamper 11 no erase" "0: Internal Tamper 11 event erases the backup..,1: Internal Tamper 11 event does not erase the.."
bitfld.long 0x8 8. "ITAMP9NOER,Internal Tamper 9 no erase" "0: Internal Tamper 9 event erases the backup..,1: Internal Tamper 9 event does not erase the.."
newline
bitfld.long 0x8 7. "ITAMP8NOER,Internal Tamper 8 no erase" "0: Internal Tamper 8 event erases the backup..,1: Internal Tamper 8 event does not erase the.."
bitfld.long 0x8 6. "ITAMP7NOER,Internal Tamper 7 no erase" "0: Internal Tamper 7 event erases the backup..,1: Internal Tamper 7 event does not erase the.."
newline
bitfld.long 0x8 5. "ITAMP6NOER,Internal Tamper 6 no erase" "0: Internal Tamper 6 event erases the backup..,1: Internal Tamper 6 event does not erase the.."
bitfld.long 0x8 4. "ITAMP5NOER,Internal Tamper 5 no erase" "0: Internal Tamper 5 event erases the backup..,1: Internal Tamper 5 event does not erase the.."
newline
bitfld.long 0x8 2. "ITAMP3NOER,Internal Tamper 3 no erase" "0: Internal Tamper 3 event erases the backup..,1: Internal Tamper 3 event does not erase the.."
line.long 0xC "TAMP_FLTCR,TAMP filter control register"
bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "0: Precharge TAMP_INx pins before sampling (enable..,1: Disable precharge of TAMP_INx pins."
bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "0: 1 RTCCLK cycle,1: 2 RTCCLK cycles,2: 4 RTCCLK cycles,3: 8 RTCCLK cycles"
newline
bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "0: Tamper event is activated on edge of TAMP_INx..,1: Tamper event is activated after 2 consecutive..,2: Tamper event is activated after 4 consecutive..,3: Tamper event is activated after 8 consecutive.."
bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "0: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz),1: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz),2: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz),3: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz),4: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz),5: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz),6: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz),7: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)"
line.long 0x10 "TAMP_ATCR1,TAMP active tamper control register 1"
bitfld.long 0x10 31. "FLTEN,Active tamper filter enable" "0: Active tamper filtering disable,1: Active tamper filtering enable: a tamper event.."
bitfld.long 0x10 30. "ATOSHARE,Active tamper output sharing" "0: Each active tamper input TAMP_INi is compared..,1: Each active tamper input TAMP_INi is compared.."
newline
bitfld.long 0x10 24.--26. "ATPER,Active tamper output change period" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 16.--18. "ATCKSEL,Active tamper RTC asynchronous prescaler clock selection" "0: RTCCLK is selected,1: RTCCLK/2 is selected,2: RTCCLK/4 is selected,?,?,?,?,7: RTCCLK/128 is selected"
newline
bitfld.long 0x10 14.--15. "ATOSEL4,Active tamper shared output 4 selection" "0: TAMPOUTSEL4 = TAMP_OUT1,1: TAMPOUTSEL4 = TAMP_OUT2,2: TAMPOUTSEL4 = TAMP_OUT3,3: TAMPOUTSEL4 = TAMP_OUT4"
bitfld.long 0x10 12.--13. "ATOSEL3,Active tamper shared output 3 selection" "0: TAMPOUTSEL3 = TAMP_OUT1,1: TAMPOUTSEL3 = TAMP_OUT2,2: TAMPOUTSEL3 = TAMP_OUT3,3: TAMPOUTSEL3 = TAMP_OUT4"
newline
bitfld.long 0x10 10.--11. "ATOSEL2,Active tamper shared output 2 selection" "0: TAMPOUTSEL2 = TAMP_OUT1,1: TAMPOUTSEL2 = TAMP_OUT2,2: TAMPOUTSEL2 = TAMP_OUT3,3: TAMPOUTSEL2 = TAMP_OUT4"
bitfld.long 0x10 8.--9. "ATOSEL1,Active tamper shared output 1 selection" "0: TAMPOUTSEL1 = TAMP_OUT1,1: TAMPOUTSEL1 = TAMP_OUT2,2: TAMPOUTSEL1 = TAMP_OUT3,3: TAMPOUTSEL1 = TAMP_OUT4"
newline
bitfld.long 0x10 5. "TAMP6AM,Tamper 6 active mode" "0: Tamper 6 detection mode is passive.,1: Tamper 6 detection mode is active."
bitfld.long 0x10 4. "TAMP5AM,Tamper 5 active mode" "0: Tamper 5 detection mode is passive.,1: Tamper 5 detection mode is active."
newline
bitfld.long 0x10 3. "TAMP4AM,Tamper 4 active mode" "0: Tamper 4 detection mode is passive.,1: Tamper 4 detection mode is active."
bitfld.long 0x10 2. "TAMP3AM,Tamper 3 active mode" "0: Tamper 3 detection mode is passive.,1: Tamper 3 detection mode is active."
newline
bitfld.long 0x10 1. "TAMP2AM,Tamper 2 active mode" "0: Tamper 2 detection mode is passive.,1: Tamper 2 detection mode is active."
bitfld.long 0x10 0. "TAMP1AM,Tamper 1 active mode" "0: Tamper 1 detection mode is passive.,1: Tamper 1 detection mode is active."
wgroup.long 0x14++0x3
line.long 0x0 "TAMP_ATSEEDR,TAMP active tamper seed register"
hexmask.long 0x0 0.--31. 1. "SEED,Pseudo-random generator seed value"
rgroup.long 0x18++0x3
line.long 0x0 "TAMP_ATOR,TAMP active tamper output register"
bitfld.long 0x0 15. "INITS,Active tamper initialization status" "0,1"
bitfld.long 0x0 14. "SEEDF,Seed running flag" "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "PRNG,Pseudo-random generator value"
group.long 0x1C++0xB
line.long 0x0 "TAMP_ATCR2,TAMP active tamper control register 2"
bitfld.long 0x0 23.--25. "ATOSEL6,Active tamper shared output 6 selection" "0: TAMPOUTSEL6 = TAMP_OUT1,1: TAMPOUTSEL6 = TAMP_OUT2,2: TAMPOUTSEL6 = TAMP_OUT3,3: TAMPOUTSEL6 = TAMP_OUT4,4: TAMPOUTSEL6 = TAMP_OUT5,5: TAMPOUTSEL6 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 20.--22. "ATOSEL5,Active tamper shared output 5 selection" "0: TAMPOUTSEL5 = TAMP_OUT1,1: TAMPOUTSEL5 = TAMP_OUT2,2: TAMPOUTSEL5 = TAMP_OUT3,3: TAMPOUTSEL5 = TAMP_OUT4,4: TAMPOUTSEL5 = TAMP_OUT5,5: TAMPOUTSEL5 = TAMP_OUT6,6: Reserved,7: Reserved"
newline
bitfld.long 0x0 17.--19. "ATOSEL4,Active tamper shared output 4 selection" "0: TAMPOUTSEL4 = TAMP_OUT1,1: TAMPOUTSEL4 = TAMP_OUT2,2: TAMPOUTSEL4 = TAMP_OUT3,3: TAMPOUTSEL4 = TAMP_OUT4,4: TAMPOUTSEL4 = TAMP_OUT5,5: TAMPOUTSEL4 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 14.--16. "ATOSEL3,Active tamper shared output 3 selection" "0: TAMPOUTSEL3 = TAMP_OUT1,1: TAMPOUTSEL3 = TAMP_OUT2,2: TAMPOUTSEL3 = TAMP_OUT3,3: TAMPOUTSEL3 = TAMP_OUT4,4: TAMPOUTSEL3 = TAMP_OUT5,5: TAMPOUTSEL3 = TAMP_OUT6,6: Reserved,7: Reserved"
newline
bitfld.long 0x0 11.--13. "ATOSEL2,Active tamper shared output 2 selection" "0: TAMPOUTSEL2 = TAMP_OUT1,1: TAMPOUTSEL2 = TAMP_OUT2,2: TAMPOUTSEL2 = TAMP_OUT3,3: TAMPOUTSEL2 = TAMP_OUT4,4: TAMPOUTSEL2 = TAMP_OUT5,5: TAMPOUTSEL2 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 8.--10. "ATOSEL1,Active tamper shared output 1 selection" "0: TAMPOUTSEL1 = TAMP_OUT1,1: TAMPOUTSEL1 = TAMP_OUT2,2: TAMPOUTSEL1 = TAMP_OUT3,3: TAMPOUTSEL1 = TAMP_OUT4,4: TAMPOUTSEL1 = TAMP_OUT5,5: TAMPOUTSEL1 = TAMP_OUT6,6: Reserved,7: Reserved"
line.long 0x4 "TAMP_SECCFGR,TAMP secure configuration register"
bitfld.long 0x4 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x4 30. "BHKLOCK,Boot hardware key lock" "0: The Backup registers from TAMP_BKP0R to..,1: The backup registers from TAMP_BKP0R to.."
newline
hexmask.long.byte 0x4 16.--23. 1. "BKPWSEC,Backup registers write protection offset"
bitfld.long 0x4 15. "CNT1SEC,Monotonic counter 1 secure protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
newline
hexmask.long.byte 0x4 0.--7. 1. "BKPRWSEC,Backup registers read/write protection offset"
line.long 0x8 "TAMP_PRIVCFGR,TAMP privilege configuration register"
bitfld.long 0x8 31. "TAMPPRIV,Tamper privilege protection (excluding backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x8 30. "BKPWPRIV,Backup registers zone 2 privilege protection" "0: Backup registers zone 2 can be written with..,1: Backup registers zone 2 can be written only with.."
newline
bitfld.long 0x8 29. "BKPRWPRIV,Backup registers zone 1 privilege protection" "0: Backup registers zone 1 can be read and written..,1: Backup registers zone 1 can be read and written.."
bitfld.long 0x8 15. "CNT1PRIV,Monotonic counter 1 privilege protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
group.long 0x2C++0x3
line.long 0x0 "TAMP_IER,TAMP interrupt enable register"
bitfld.long 0x0 28. "ITAMP13IE,Internal tamper 13 interrupt enable" "0: Internal tamper 13 interrupt disabled.,1: Internal tamper 13 interrupt enabled."
bitfld.long 0x0 27. "ITAMP12IE,Internal tamper 12 interrupt enable" "0: Internal tamper 12 interrupt disabled.,1: Internal tamper 12 interrupt enabled."
newline
bitfld.long 0x0 26. "ITAMP11IE,Internal tamper 11 interrupt enable" "0: Internal tamper 11 interrupt disabled.,1: Internal tamper 11 interrupt enabled."
bitfld.long 0x0 24. "ITAMP9IE,Internal tamper 9 interrupt enable" "0: Internal tamper 9 interrupt disabled.,1: Internal tamper 9 interrupt enabled."
newline
bitfld.long 0x0 23. "ITAMP8IE,Internal tamper 8 interrupt enable" "0: Internal tamper 8 interrupt disabled.,1: Internal tamper 8 interrupt enabled."
bitfld.long 0x0 22. "ITAMP7IE,Internal tamper 7 interrupt enable" "0: Internal tamper 7 interrupt disabled.,1: Internal tamper 7 interrupt enabled."
newline
bitfld.long 0x0 21. "ITAMP6IE,Internal tamper 6 interrupt enable" "0: Internal tamper 6 interrupt disabled.,1: Internal tamper 6 interrupt enabled."
bitfld.long 0x0 20. "ITAMP5IE,Internal tamper 5 interrupt enable" "0: Internal tamper 5 interrupt disabled.,1: Internal tamper 5 interrupt enabled."
newline
bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "0: Internal tamper 3 interrupt disabled.,1: Internal tamper 3 interrupt enabled."
bitfld.long 0x0 5. "TAMP6IE,Tamper 6 interrupt enable" "0: Tamper 6 interrupt disabled.,1: Tamper 6 interrupt enabled."
newline
bitfld.long 0x0 4. "TAMP5IE,Tamper 5 interrupt enable" "0: Tamper 5 interrupt disabled.,1: Tamper 5 interrupt enabled."
bitfld.long 0x0 3. "TAMP4IE,Tamper 4 interrupt enable" "0: Tamper 4 interrupt disabled.,1: Tamper 4 interrupt enabled."
newline
bitfld.long 0x0 2. "TAMP3IE,Tamper 3 interrupt enable" "0: Tamper 3 interrupt disabled.,1: Tamper 3 interrupt enabled.."
bitfld.long 0x0 1. "TAMP2IE,Tamper 2 interrupt enable" "0: Tamper 2 interrupt disabled.,1: Tamper 2 interrupt enabled."
newline
bitfld.long 0x0 0. "TAMP1IE,Tamper 1 interrupt enable" "0: Tamper 1 interrupt disabled.,1: Tamper 1 interrupt enabled."
rgroup.long 0x30++0xB
line.long 0x0 "TAMP_SR,TAMP status register"
bitfld.long 0x0 28. "ITAMP13F,Internal tamper 13 flag" "0,1"
bitfld.long 0x0 27. "ITAMP12F,Internal tamper 12 flag" "0,1"
newline
bitfld.long 0x0 26. "ITAMP11F,Internal tamper 11 flag" "0,1"
bitfld.long 0x0 24. "ITAMP9F,Internal tamper 9 flag" "0,1"
newline
bitfld.long 0x0 23. "ITAMP8F,Internal tamper 8 flag" "0,1"
bitfld.long 0x0 22. "ITAMP7F,Internal tamper 7 flag" "0,1"
newline
bitfld.long 0x0 21. "ITAMP6F,Internal tamper 6 flag" "0,1"
bitfld.long 0x0 20. "ITAMP5F,Internal tamper 5 flag" "0,1"
newline
bitfld.long 0x0 18. "ITAMP3F,Internal tamper 3 flag" "0,1"
bitfld.long 0x0 5. "TAMP6F,TAMP6 detection flag" "0,1"
newline
bitfld.long 0x0 4. "TAMP5F,TAMP5 detection flag" "0,1"
bitfld.long 0x0 3. "TAMP4F,TAMP4 detection flag" "0,1"
newline
bitfld.long 0x0 2. "TAMP3F,TAMP3 detection flag" "0,1"
bitfld.long 0x0 1. "TAMP2F,TAMP2 detection flag" "0,1"
newline
bitfld.long 0x0 0. "TAMP1F,TAMP1 detection flag" "0,1"
line.long 0x4 "TAMP_MISR,TAMP non-secure masked interrupt status register"
bitfld.long 0x4 28. "ITAMP13MF,internal tamper 13 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 27. "ITAMP12MF,internal tamper 12 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 26. "ITAMP11MF,internal tamper 11 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 24. "ITAMP9MF,internal tamper 9 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 23. "ITAMP8MF,Internal tamper 8 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 22. "ITAMP7MF,Internal tamper 7 tamper non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 21. "ITAMP6MF,Internal tamper 6 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 20. "ITAMP5MF,Internal tamper 5 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 18. "ITAMP3MF,Internal tamper 3 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 5. "TAMP6MF,TAMP6 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 4. "TAMP5MF,TAMP5 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 3. "TAMP4MF,TAMP4 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 2. "TAMP3MF,TAMP3 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 1. "TAMP2MF,TAMP2 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 0. "TAMP1MF,TAMP1 non-secure interrupt masked flag" "0,1"
line.long 0x8 "TAMP_SMISR,TAMP secure masked interrupt status register"
bitfld.long 0x8 28. "ITAMP13MF,internal tamper 13 secure interrupt masked flag" "0,1"
bitfld.long 0x8 27. "ITAMP12MF,internal tamper 12 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 26. "ITAMP11MF,internal tamper 11 secure interrupt masked flag" "0,1"
bitfld.long 0x8 24. "ITAMP9MF,internal tamper 9 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 23. "ITAMP8MF,Internal tamper 8 secure interrupt masked flag" "0,1"
bitfld.long 0x8 22. "ITAMP7MF,Internal tamper 7 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 21. "ITAMP6MF,Internal tamper 6 secure interrupt masked flag" "0,1"
bitfld.long 0x8 20. "ITAMP5MF,Internal tamper 5 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1"
bitfld.long 0x8 5. "TAMP6MF,TAMP6 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 4. "TAMP5MF,TAMP5 secure interrupt masked flag" "0,1"
bitfld.long 0x8 3. "TAMP4MF,TAMP4 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 2. "TAMP3MF,TAMP3 secure interrupt masked flag" "0,1"
bitfld.long 0x8 1. "TAMP2MF,TAMP2 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 0. "TAMP1MF,TAMP1 secure interrupt masked flag" "0,1"
wgroup.long 0x3C++0x3
line.long 0x0 "TAMP_SCR,TAMP status clear register"
bitfld.long 0x0 28. "CITAMP13F,Clear ITAMP13 detection flag" "0,1"
bitfld.long 0x0 27. "CITAMP12F,Clear ITAMP12 detection flag" "0,1"
newline
bitfld.long 0x0 26. "CITAMP11F,Clear ITAMP11 detection flag" "0,1"
bitfld.long 0x0 24. "CITAMP9F,Clear ITAMP9 detection flag" "0,1"
newline
bitfld.long 0x0 23. "CITAMP8F,Clear ITAMP8 detection flag" "0,1"
bitfld.long 0x0 22. "CITAMP7F,Clear ITAMP7 detection flag" "0,1"
newline
bitfld.long 0x0 21. "CITAMP6F,Clear ITAMP6 detection flag" "0,1"
bitfld.long 0x0 20. "CITAMP5F,Clear ITAMP5 detection flag" "0,1"
newline
bitfld.long 0x0 18. "CITAMP3F,Clear ITAMP3 detection flag" "0,1"
bitfld.long 0x0 5. "CTAMP6F,Clear TAMP6 detection flag" "0,1"
newline
bitfld.long 0x0 4. "CTAMP5F,Clear TAMP5 detection flag" "0,1"
bitfld.long 0x0 3. "CTAMP4F,Clear TAMP4 detection flag" "0,1"
newline
bitfld.long 0x0 2. "CTAMP3F,Clear TAMP3 detection flag" "0,1"
bitfld.long 0x0 1. "CTAMP2F,Clear TAMP2 detection flag" "0,1"
newline
bitfld.long 0x0 0. "CTAMP1F,Clear TAMP1 detection flag" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register"
hexmask.long 0x0 0.--31. 1. "COUNT,This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value."
group.long 0x54++0x3
line.long 0x0 "TAMP_ERCFGR,TAMP erase configuration register"
bitfld.long 0x0 5. "ERCFG5,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
bitfld.long 0x0 4. "ERCFG4,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
newline
bitfld.long 0x0 3. "ERCFG3,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
bitfld.long 0x0 2. "ERCFG2,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
newline
bitfld.long 0x0 1. "ERCFG1,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
group.long 0x100++0x7F
line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register"
hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register"
hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register"
hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0xC "TAMP_BKP3R,TAMP backup 3 register"
hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register"
hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register"
hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register"
hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register"
hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register"
hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register"
hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register"
hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register"
hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register"
hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register"
hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register"
hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register"
hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register"
hexmask.long 0x40 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register"
hexmask.long 0x44 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register"
hexmask.long 0x48 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register"
hexmask.long 0x4C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register"
hexmask.long 0x50 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register"
hexmask.long 0x54 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register"
hexmask.long 0x58 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register"
hexmask.long 0x5C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register"
hexmask.long 0x60 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register"
hexmask.long 0x64 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register"
hexmask.long 0x68 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register"
hexmask.long 0x6C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register"
hexmask.long 0x70 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register"
hexmask.long 0x74 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register"
hexmask.long 0x78 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register"
hexmask.long 0x7C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
tree.end
tree "TAMP"
base ad:0x46007C00
group.long 0x0++0x13
line.long 0x0 "TAMP_CR1,TAMP control register 1"
bitfld.long 0x0 28. "ITAMP13E,Internal tamper 13 enable" "0: Internal tamper 13 disabled.,1: Internal tamper 13 enabled."
bitfld.long 0x0 27. "ITAMP12E,Internal tamper 12 enable" "0: Internal tamper 12 disabled.,1: Internal tamper 12 enabled."
newline
bitfld.long 0x0 26. "ITAMP11E,Internal tamper 11 enable" "0: Internal tamper 11 disabled.,1: Internal tamper 11 enabled."
bitfld.long 0x0 24. "ITAMP9E,Internal tamper 9 enable" "0: Internal tamper 9 disabled.,1: Internal tamper 9 enabled."
newline
bitfld.long 0x0 23. "ITAMP8E,Internal tamper 8 enable" "0: Internal tamper 8 disabled.,1: Internal tamper 8 enabled."
bitfld.long 0x0 22. "ITAMP7E,Internal tamper 7 enable" "0: Internal tamper 7 disabled.,1: Internal tamper 7 enabled"
newline
bitfld.long 0x0 21. "ITAMP6E,Internal tamper 6 enable" "0: Internal tamper 6 disabled.,1: Internal tamper 6 enabled."
bitfld.long 0x0 20. "ITAMP5E,Internal tamper 5 enable" "0: Internal tamper 5 disabled.,1: Internal tamper 5 enabled."
newline
bitfld.long 0x0 18. "ITAMP3E,Internal tamper 3 enable" "0: Internal tamper 3 disabled.,1: Internal tamper 3 enabled."
bitfld.long 0x0 5. "TAMP6E,Tamper detection on TAMP_IN6 enable" "0: Tamper detection on TAMP_IN6 is disabled.,1: Tamper detection on TAMP_IN6 is enabled."
newline
bitfld.long 0x0 4. "TAMP5E,Tamper detection on TAMP_IN5 enable" "0: Tamper detection on TAMP_IN5 is disabled.,1: Tamper detection on TAMP_IN5 is enabled."
bitfld.long 0x0 3. "TAMP4E,Tamper detection on TAMP_IN4 enable" "0: Tamper detection on TAMP_IN4 is disabled.,1: Tamper detection on TAMP_IN4 is enabled."
newline
bitfld.long 0x0 2. "TAMP3E,Tamper detection on TAMP_IN3 enable" "0: Tamper detection on TAMP_IN3 is disabled.,1: Tamper detection on TAMP_IN3 is enabled."
bitfld.long 0x0 1. "TAMP2E,Tamper detection on TAMP_IN2 enable" "0: Tamper detection on TAMP_IN2 is disabled.,1: Tamper detection on TAMP_IN2 is enabled."
newline
bitfld.long 0x0 0. "TAMP1E,Tamper detection on TAMP_IN1 enable" "0: Tamper detection on TAMP_IN1 is disabled.,1: Tamper detection on TAMP_IN1 is enabled."
line.long 0x4 "TAMP_CR2,TAMP control register 2"
bitfld.long 0x4 29. "TAMP6TRG,Active level for tamper 6 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 28. "TAMP5TRG,Active level for tamper 5 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 27. "TAMP4TRG,Active level for tamper 4 input (active mode disabled)" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 26. "TAMP3TRG,Active level for tamper 3 input" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 25. "TAMP2TRG,Active level for tamper 2 input" "0: Low/Rising edge,1: High/Falling edge"
bitfld.long 0x4 24. "TAMP1TRG,Active level for tamper 1 input" "0: Low/Rising edge,1: High/Falling edge"
newline
bitfld.long 0x4 23. "BKERASE,Backup registers and device secrets<sup>(1)</sup> erase" "0,1"
bitfld.long 0x4 22. "BKBLOCK,Backup registers and device secrets<sup>(1)</sup> access blocked" "0: backup registers and device..,1: backup registers and device.."
newline
bitfld.long 0x4 18. "TAMP3MSK,Tamper 3 mask" "0: Tamper 3 event generates a trigger event and..,1: Tamper 3 event generates a trigger event. TAMP3F.."
bitfld.long 0x4 17. "TAMP2MSK,Tamper 2 mask" "0: Tamper 2 event generates a trigger event and..,1: Tamper 2 event generates a trigger event. TAMP2F.."
newline
bitfld.long 0x4 16. "TAMP1MSK,Tamper 1 mask" "0: Tamper 1 event generates a trigger event and..,1: Tamper 1 event generates a trigger event. TAMP1F.."
bitfld.long 0x4 5. "TAMP6NOER,Tamper 6 no erase" "0: Tamper 6 event erases the backup registers and..,1: Tamper 6 event does not erase the backup.."
newline
bitfld.long 0x4 4. "TAMP5NOER,Tamper 5 no erase" "0: Tamper 5 event erases the backup registers and..,1: Tamper 5 event does not erase the backup.."
bitfld.long 0x4 3. "TAMP4NOER,Tamper 4 no erase" "0: Tamper 4 event erases the backup registers and..,1: Tamper 4 event does not erase the backup.."
newline
bitfld.long 0x4 2. "TAMP3NOER,Tamper 3 no erase" "0: Tamper 3 event erases the backup registers and..,1: Tamper 3 event does not erase the backup.."
bitfld.long 0x4 1. "TAMP2NOER,Tamper 2 no erase" "0: Tamper 2 event erases the backup registers and..,1: Tamper 2 event does not erase the backup.."
newline
bitfld.long 0x4 0. "TAMP1NOER,Tamper 1 no erase" "0: Tamper 1 event erases the backup registers and..,1: Tamper 1 event does not erase the backup.."
line.long 0x8 "TAMP_CR3,TAMP control register 3"
bitfld.long 0x8 12. "ITAMP13NOER,Internal Tamper 13 no erase" "0: Internal Tamper 13 event erases the backup..,1: Internal Tamper 13 event does not erase the.."
bitfld.long 0x8 11. "ITAMP12NOER,Internal Tamper 12 no erase" "0: Internal Tamper 12 event erases the backup..,1: Internal Tamper 12 event does not erase the.."
newline
bitfld.long 0x8 10. "ITAMP11NOER,Internal Tamper 11 no erase" "0: Internal Tamper 11 event erases the backup..,1: Internal Tamper 11 event does not erase the.."
bitfld.long 0x8 8. "ITAMP9NOER,Internal Tamper 9 no erase" "0: Internal Tamper 9 event erases the backup..,1: Internal Tamper 9 event does not erase the.."
newline
bitfld.long 0x8 7. "ITAMP8NOER,Internal Tamper 8 no erase" "0: Internal Tamper 8 event erases the backup..,1: Internal Tamper 8 event does not erase the.."
bitfld.long 0x8 6. "ITAMP7NOER,Internal Tamper 7 no erase" "0: Internal Tamper 7 event erases the backup..,1: Internal Tamper 7 event does not erase the.."
newline
bitfld.long 0x8 5. "ITAMP6NOER,Internal Tamper 6 no erase" "0: Internal Tamper 6 event erases the backup..,1: Internal Tamper 6 event does not erase the.."
bitfld.long 0x8 4. "ITAMP5NOER,Internal Tamper 5 no erase" "0: Internal Tamper 5 event erases the backup..,1: Internal Tamper 5 event does not erase the.."
newline
bitfld.long 0x8 2. "ITAMP3NOER,Internal Tamper 3 no erase" "0: Internal Tamper 3 event erases the backup..,1: Internal Tamper 3 event does not erase the.."
line.long 0xC "TAMP_FLTCR,TAMP filter control register"
bitfld.long 0xC 7. "TAMPPUDIS,TAMP_INx pull-up disable" "0: Precharge TAMP_INx pins before sampling (enable..,1: Disable precharge of TAMP_INx pins."
bitfld.long 0xC 5.--6. "TAMPPRCH,TAMP_INx precharge duration" "0: 1 RTCCLK cycle,1: 2 RTCCLK cycles,2: 4 RTCCLK cycles,3: 8 RTCCLK cycles"
newline
bitfld.long 0xC 3.--4. "TAMPFLT,TAMP_INx filter count" "0: Tamper event is activated on edge of TAMP_INx..,1: Tamper event is activated after 2 consecutive..,2: Tamper event is activated after 4 consecutive..,3: Tamper event is activated after 8 consecutive.."
bitfld.long 0xC 0.--2. "TAMPFREQ,Tamper sampling frequency" "0: RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz),1: RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz),2: RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz),3: RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz),4: RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz),5: RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz),6: RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz),7: RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)"
line.long 0x10 "TAMP_ATCR1,TAMP active tamper control register 1"
bitfld.long 0x10 31. "FLTEN,Active tamper filter enable" "0: Active tamper filtering disable,1: Active tamper filtering enable: a tamper event.."
bitfld.long 0x10 30. "ATOSHARE,Active tamper output sharing" "0: Each active tamper input TAMP_INi is compared..,1: Each active tamper input TAMP_INi is compared.."
newline
bitfld.long 0x10 24.--26. "ATPER,Active tamper output change period" "0,1,2,3,4,5,6,7"
bitfld.long 0x10 16.--18. "ATCKSEL,Active tamper RTC asynchronous prescaler clock selection" "0: RTCCLK is selected,1: RTCCLK/2 is selected,2: RTCCLK/4 is selected,?,?,?,?,7: RTCCLK/128 is selected"
newline
bitfld.long 0x10 14.--15. "ATOSEL4,Active tamper shared output 4 selection" "0: TAMPOUTSEL4 = TAMP_OUT1,1: TAMPOUTSEL4 = TAMP_OUT2,2: TAMPOUTSEL4 = TAMP_OUT3,3: TAMPOUTSEL4 = TAMP_OUT4"
bitfld.long 0x10 12.--13. "ATOSEL3,Active tamper shared output 3 selection" "0: TAMPOUTSEL3 = TAMP_OUT1,1: TAMPOUTSEL3 = TAMP_OUT2,2: TAMPOUTSEL3 = TAMP_OUT3,3: TAMPOUTSEL3 = TAMP_OUT4"
newline
bitfld.long 0x10 10.--11. "ATOSEL2,Active tamper shared output 2 selection" "0: TAMPOUTSEL2 = TAMP_OUT1,1: TAMPOUTSEL2 = TAMP_OUT2,2: TAMPOUTSEL2 = TAMP_OUT3,3: TAMPOUTSEL2 = TAMP_OUT4"
bitfld.long 0x10 8.--9. "ATOSEL1,Active tamper shared output 1 selection" "0: TAMPOUTSEL1 = TAMP_OUT1,1: TAMPOUTSEL1 = TAMP_OUT2,2: TAMPOUTSEL1 = TAMP_OUT3,3: TAMPOUTSEL1 = TAMP_OUT4"
newline
bitfld.long 0x10 5. "TAMP6AM,Tamper 6 active mode" "0: Tamper 6 detection mode is passive.,1: Tamper 6 detection mode is active."
bitfld.long 0x10 4. "TAMP5AM,Tamper 5 active mode" "0: Tamper 5 detection mode is passive.,1: Tamper 5 detection mode is active."
newline
bitfld.long 0x10 3. "TAMP4AM,Tamper 4 active mode" "0: Tamper 4 detection mode is passive.,1: Tamper 4 detection mode is active."
bitfld.long 0x10 2. "TAMP3AM,Tamper 3 active mode" "0: Tamper 3 detection mode is passive.,1: Tamper 3 detection mode is active."
newline
bitfld.long 0x10 1. "TAMP2AM,Tamper 2 active mode" "0: Tamper 2 detection mode is passive.,1: Tamper 2 detection mode is active."
bitfld.long 0x10 0. "TAMP1AM,Tamper 1 active mode" "0: Tamper 1 detection mode is passive.,1: Tamper 1 detection mode is active."
wgroup.long 0x14++0x3
line.long 0x0 "TAMP_ATSEEDR,TAMP active tamper seed register"
hexmask.long 0x0 0.--31. 1. "SEED,Pseudo-random generator seed value"
rgroup.long 0x18++0x3
line.long 0x0 "TAMP_ATOR,TAMP active tamper output register"
bitfld.long 0x0 15. "INITS,Active tamper initialization status" "0,1"
bitfld.long 0x0 14. "SEEDF,Seed running flag" "0,1"
newline
hexmask.long.byte 0x0 0.--7. 1. "PRNG,Pseudo-random generator value"
group.long 0x1C++0xB
line.long 0x0 "TAMP_ATCR2,TAMP active tamper control register 2"
bitfld.long 0x0 23.--25. "ATOSEL6,Active tamper shared output 6 selection" "0: TAMPOUTSEL6 = TAMP_OUT1,1: TAMPOUTSEL6 = TAMP_OUT2,2: TAMPOUTSEL6 = TAMP_OUT3,3: TAMPOUTSEL6 = TAMP_OUT4,4: TAMPOUTSEL6 = TAMP_OUT5,5: TAMPOUTSEL6 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 20.--22. "ATOSEL5,Active tamper shared output 5 selection" "0: TAMPOUTSEL5 = TAMP_OUT1,1: TAMPOUTSEL5 = TAMP_OUT2,2: TAMPOUTSEL5 = TAMP_OUT3,3: TAMPOUTSEL5 = TAMP_OUT4,4: TAMPOUTSEL5 = TAMP_OUT5,5: TAMPOUTSEL5 = TAMP_OUT6,6: Reserved,7: Reserved"
newline
bitfld.long 0x0 17.--19. "ATOSEL4,Active tamper shared output 4 selection" "0: TAMPOUTSEL4 = TAMP_OUT1,1: TAMPOUTSEL4 = TAMP_OUT2,2: TAMPOUTSEL4 = TAMP_OUT3,3: TAMPOUTSEL4 = TAMP_OUT4,4: TAMPOUTSEL4 = TAMP_OUT5,5: TAMPOUTSEL4 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 14.--16. "ATOSEL3,Active tamper shared output 3 selection" "0: TAMPOUTSEL3 = TAMP_OUT1,1: TAMPOUTSEL3 = TAMP_OUT2,2: TAMPOUTSEL3 = TAMP_OUT3,3: TAMPOUTSEL3 = TAMP_OUT4,4: TAMPOUTSEL3 = TAMP_OUT5,5: TAMPOUTSEL3 = TAMP_OUT6,6: Reserved,7: Reserved"
newline
bitfld.long 0x0 11.--13. "ATOSEL2,Active tamper shared output 2 selection" "0: TAMPOUTSEL2 = TAMP_OUT1,1: TAMPOUTSEL2 = TAMP_OUT2,2: TAMPOUTSEL2 = TAMP_OUT3,3: TAMPOUTSEL2 = TAMP_OUT4,4: TAMPOUTSEL2 = TAMP_OUT5,5: TAMPOUTSEL2 = TAMP_OUT6,6: Reserved,7: Reserved"
bitfld.long 0x0 8.--10. "ATOSEL1,Active tamper shared output 1 selection" "0: TAMPOUTSEL1 = TAMP_OUT1,1: TAMPOUTSEL1 = TAMP_OUT2,2: TAMPOUTSEL1 = TAMP_OUT3,3: TAMPOUTSEL1 = TAMP_OUT4,4: TAMPOUTSEL1 = TAMP_OUT5,5: TAMPOUTSEL1 = TAMP_OUT6,6: Reserved,7: Reserved"
line.long 0x4 "TAMP_SECCFGR,TAMP secure configuration register"
bitfld.long 0x4 31. "TAMPSEC,Tamper protection (excluding monotonic counters and backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x4 30. "BHKLOCK,Boot hardware key lock" "0: The Backup registers from TAMP_BKP0R to..,1: The backup registers from TAMP_BKP0R to.."
newline
hexmask.long.byte 0x4 16.--23. 1. "BKPWSEC,Backup registers write protection offset"
bitfld.long 0x4 15. "CNT1SEC,Monotonic counter 1 secure protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
newline
hexmask.long.byte 0x4 0.--7. 1. "BKPRWSEC,Backup registers read/write protection offset"
line.long 0x8 "TAMP_PRIVCFGR,TAMP privilege configuration register"
bitfld.long 0x8 31. "TAMPPRIV,Tamper privilege protection (excluding backup registers)" "0: Tamper configuration and interrupt can be..,1: Tamper configuration and interrupt can be.."
bitfld.long 0x8 30. "BKPWPRIV,Backup registers zone 2 privilege protection" "0: Backup registers zone 2 can be written with..,1: Backup registers zone 2 can be written only with.."
newline
bitfld.long 0x8 29. "BKPRWPRIV,Backup registers zone 1 privilege protection" "0: Backup registers zone 1 can be read and written..,1: Backup registers zone 1 can be read and written.."
bitfld.long 0x8 15. "CNT1PRIV,Monotonic counter 1 privilege protection" "0: Monotonic counter 1 (TAMP_COUNT1R) can be read..,1: Monotonic counter 1 (TAMP_COUNT1R) can be read.."
group.long 0x2C++0x3
line.long 0x0 "TAMP_IER,TAMP interrupt enable register"
bitfld.long 0x0 28. "ITAMP13IE,Internal tamper 13 interrupt enable" "0: Internal tamper 13 interrupt disabled.,1: Internal tamper 13 interrupt enabled."
bitfld.long 0x0 27. "ITAMP12IE,Internal tamper 12 interrupt enable" "0: Internal tamper 12 interrupt disabled.,1: Internal tamper 12 interrupt enabled."
newline
bitfld.long 0x0 26. "ITAMP11IE,Internal tamper 11 interrupt enable" "0: Internal tamper 11 interrupt disabled.,1: Internal tamper 11 interrupt enabled."
bitfld.long 0x0 24. "ITAMP9IE,Internal tamper 9 interrupt enable" "0: Internal tamper 9 interrupt disabled.,1: Internal tamper 9 interrupt enabled."
newline
bitfld.long 0x0 23. "ITAMP8IE,Internal tamper 8 interrupt enable" "0: Internal tamper 8 interrupt disabled.,1: Internal tamper 8 interrupt enabled."
bitfld.long 0x0 22. "ITAMP7IE,Internal tamper 7 interrupt enable" "0: Internal tamper 7 interrupt disabled.,1: Internal tamper 7 interrupt enabled."
newline
bitfld.long 0x0 21. "ITAMP6IE,Internal tamper 6 interrupt enable" "0: Internal tamper 6 interrupt disabled.,1: Internal tamper 6 interrupt enabled."
bitfld.long 0x0 20. "ITAMP5IE,Internal tamper 5 interrupt enable" "0: Internal tamper 5 interrupt disabled.,1: Internal tamper 5 interrupt enabled."
newline
bitfld.long 0x0 18. "ITAMP3IE,Internal tamper 3 interrupt enable" "0: Internal tamper 3 interrupt disabled.,1: Internal tamper 3 interrupt enabled."
bitfld.long 0x0 5. "TAMP6IE,Tamper 6 interrupt enable" "0: Tamper 6 interrupt disabled.,1: Tamper 6 interrupt enabled."
newline
bitfld.long 0x0 4. "TAMP5IE,Tamper 5 interrupt enable" "0: Tamper 5 interrupt disabled.,1: Tamper 5 interrupt enabled."
bitfld.long 0x0 3. "TAMP4IE,Tamper 4 interrupt enable" "0: Tamper 4 interrupt disabled.,1: Tamper 4 interrupt enabled."
newline
bitfld.long 0x0 2. "TAMP3IE,Tamper 3 interrupt enable" "0: Tamper 3 interrupt disabled.,1: Tamper 3 interrupt enabled.."
bitfld.long 0x0 1. "TAMP2IE,Tamper 2 interrupt enable" "0: Tamper 2 interrupt disabled.,1: Tamper 2 interrupt enabled."
newline
bitfld.long 0x0 0. "TAMP1IE,Tamper 1 interrupt enable" "0: Tamper 1 interrupt disabled.,1: Tamper 1 interrupt enabled."
rgroup.long 0x30++0xB
line.long 0x0 "TAMP_SR,TAMP status register"
bitfld.long 0x0 28. "ITAMP13F,Internal tamper 13 flag" "0,1"
bitfld.long 0x0 27. "ITAMP12F,Internal tamper 12 flag" "0,1"
newline
bitfld.long 0x0 26. "ITAMP11F,Internal tamper 11 flag" "0,1"
bitfld.long 0x0 24. "ITAMP9F,Internal tamper 9 flag" "0,1"
newline
bitfld.long 0x0 23. "ITAMP8F,Internal tamper 8 flag" "0,1"
bitfld.long 0x0 22. "ITAMP7F,Internal tamper 7 flag" "0,1"
newline
bitfld.long 0x0 21. "ITAMP6F,Internal tamper 6 flag" "0,1"
bitfld.long 0x0 20. "ITAMP5F,Internal tamper 5 flag" "0,1"
newline
bitfld.long 0x0 18. "ITAMP3F,Internal tamper 3 flag" "0,1"
bitfld.long 0x0 5. "TAMP6F,TAMP6 detection flag" "0,1"
newline
bitfld.long 0x0 4. "TAMP5F,TAMP5 detection flag" "0,1"
bitfld.long 0x0 3. "TAMP4F,TAMP4 detection flag" "0,1"
newline
bitfld.long 0x0 2. "TAMP3F,TAMP3 detection flag" "0,1"
bitfld.long 0x0 1. "TAMP2F,TAMP2 detection flag" "0,1"
newline
bitfld.long 0x0 0. "TAMP1F,TAMP1 detection flag" "0,1"
line.long 0x4 "TAMP_MISR,TAMP non-secure masked interrupt status register"
bitfld.long 0x4 28. "ITAMP13MF,internal tamper 13 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 27. "ITAMP12MF,internal tamper 12 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 26. "ITAMP11MF,internal tamper 11 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 24. "ITAMP9MF,internal tamper 9 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 23. "ITAMP8MF,Internal tamper 8 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 22. "ITAMP7MF,Internal tamper 7 tamper non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 21. "ITAMP6MF,Internal tamper 6 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 20. "ITAMP5MF,Internal tamper 5 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 18. "ITAMP3MF,Internal tamper 3 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 5. "TAMP6MF,TAMP6 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 4. "TAMP5MF,TAMP5 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 3. "TAMP4MF,TAMP4 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 2. "TAMP3MF,TAMP3 non-secure interrupt masked flag" "0,1"
bitfld.long 0x4 1. "TAMP2MF,TAMP2 non-secure interrupt masked flag" "0,1"
newline
bitfld.long 0x4 0. "TAMP1MF,TAMP1 non-secure interrupt masked flag" "0,1"
line.long 0x8 "TAMP_SMISR,TAMP secure masked interrupt status register"
bitfld.long 0x8 28. "ITAMP13MF,internal tamper 13 secure interrupt masked flag" "0,1"
bitfld.long 0x8 27. "ITAMP12MF,internal tamper 12 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 26. "ITAMP11MF,internal tamper 11 secure interrupt masked flag" "0,1"
bitfld.long 0x8 24. "ITAMP9MF,internal tamper 9 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 23. "ITAMP8MF,Internal tamper 8 secure interrupt masked flag" "0,1"
bitfld.long 0x8 22. "ITAMP7MF,Internal tamper 7 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 21. "ITAMP6MF,Internal tamper 6 secure interrupt masked flag" "0,1"
bitfld.long 0x8 20. "ITAMP5MF,Internal tamper 5 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 18. "ITAMP3MF,Internal tamper 3 secure interrupt masked flag" "0,1"
bitfld.long 0x8 5. "TAMP6MF,TAMP6 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 4. "TAMP5MF,TAMP5 secure interrupt masked flag" "0,1"
bitfld.long 0x8 3. "TAMP4MF,TAMP4 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 2. "TAMP3MF,TAMP3 secure interrupt masked flag" "0,1"
bitfld.long 0x8 1. "TAMP2MF,TAMP2 secure interrupt masked flag" "0,1"
newline
bitfld.long 0x8 0. "TAMP1MF,TAMP1 secure interrupt masked flag" "0,1"
wgroup.long 0x3C++0x3
line.long 0x0 "TAMP_SCR,TAMP status clear register"
bitfld.long 0x0 28. "CITAMP13F,Clear ITAMP13 detection flag" "0,1"
bitfld.long 0x0 27. "CITAMP12F,Clear ITAMP12 detection flag" "0,1"
newline
bitfld.long 0x0 26. "CITAMP11F,Clear ITAMP11 detection flag" "0,1"
bitfld.long 0x0 24. "CITAMP9F,Clear ITAMP9 detection flag" "0,1"
newline
bitfld.long 0x0 23. "CITAMP8F,Clear ITAMP8 detection flag" "0,1"
bitfld.long 0x0 22. "CITAMP7F,Clear ITAMP7 detection flag" "0,1"
newline
bitfld.long 0x0 21. "CITAMP6F,Clear ITAMP6 detection flag" "0,1"
bitfld.long 0x0 20. "CITAMP5F,Clear ITAMP5 detection flag" "0,1"
newline
bitfld.long 0x0 18. "CITAMP3F,Clear ITAMP3 detection flag" "0,1"
bitfld.long 0x0 5. "CTAMP6F,Clear TAMP6 detection flag" "0,1"
newline
bitfld.long 0x0 4. "CTAMP5F,Clear TAMP5 detection flag" "0,1"
bitfld.long 0x0 3. "CTAMP4F,Clear TAMP4 detection flag" "0,1"
newline
bitfld.long 0x0 2. "CTAMP3F,Clear TAMP3 detection flag" "0,1"
bitfld.long 0x0 1. "CTAMP2F,Clear TAMP2 detection flag" "0,1"
newline
bitfld.long 0x0 0. "CTAMP1F,Clear TAMP1 detection flag" "0,1"
rgroup.long 0x40++0x3
line.long 0x0 "TAMP_COUNT1R,TAMP monotonic counter 1 register"
hexmask.long 0x0 0.--31. 1. "COUNT,This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value."
group.long 0x54++0x3
line.long 0x0 "TAMP_ERCFGR,TAMP erase configuration register"
bitfld.long 0x0 5. "ERCFG5,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
bitfld.long 0x0 4. "ERCFG4,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
newline
bitfld.long 0x0 3. "ERCFG3,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
bitfld.long 0x0 2. "ERCFG2,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
newline
bitfld.long 0x0 1. "ERCFG1,Configurable device secrets configuration" "0: Configurable device secrets are not included in..,1: Configurable device secrets are is included in.."
group.long 0x100++0x7F
line.long 0x0 "TAMP_BKP0R,TAMP backup 0 register"
hexmask.long 0x0 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x4 "TAMP_BKP1R,TAMP backup 1 register"
hexmask.long 0x4 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x8 "TAMP_BKP2R,TAMP backup 2 register"
hexmask.long 0x8 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0xC "TAMP_BKP3R,TAMP backup 3 register"
hexmask.long 0xC 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x10 "TAMP_BKP4R,TAMP backup 4 register"
hexmask.long 0x10 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x14 "TAMP_BKP5R,TAMP backup 5 register"
hexmask.long 0x14 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x18 "TAMP_BKP6R,TAMP backup 6 register"
hexmask.long 0x18 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x1C "TAMP_BKP7R,TAMP backup 7 register"
hexmask.long 0x1C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x20 "TAMP_BKP8R,TAMP backup 8 register"
hexmask.long 0x20 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x24 "TAMP_BKP9R,TAMP backup 9 register"
hexmask.long 0x24 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x28 "TAMP_BKP10R,TAMP backup 10 register"
hexmask.long 0x28 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x2C "TAMP_BKP11R,TAMP backup 11 register"
hexmask.long 0x2C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x30 "TAMP_BKP12R,TAMP backup 12 register"
hexmask.long 0x30 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x34 "TAMP_BKP13R,TAMP backup 13 register"
hexmask.long 0x34 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x38 "TAMP_BKP14R,TAMP backup 14 register"
hexmask.long 0x38 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x3C "TAMP_BKP15R,TAMP backup 15 register"
hexmask.long 0x3C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x40 "TAMP_BKP16R,TAMP backup 16 register"
hexmask.long 0x40 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x44 "TAMP_BKP17R,TAMP backup 17 register"
hexmask.long 0x44 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x48 "TAMP_BKP18R,TAMP backup 18 register"
hexmask.long 0x48 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x4C "TAMP_BKP19R,TAMP backup 19 register"
hexmask.long 0x4C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x50 "TAMP_BKP20R,TAMP backup 20 register"
hexmask.long 0x50 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x54 "TAMP_BKP21R,TAMP backup 21 register"
hexmask.long 0x54 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x58 "TAMP_BKP22R,TAMP backup 22 register"
hexmask.long 0x58 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x5C "TAMP_BKP23R,TAMP backup 23 register"
hexmask.long 0x5C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x60 "TAMP_BKP24R,TAMP backup 24 register"
hexmask.long 0x60 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x64 "TAMP_BKP25R,TAMP backup 25 register"
hexmask.long 0x64 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x68 "TAMP_BKP26R,TAMP backup 26 register"
hexmask.long 0x68 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x6C "TAMP_BKP27R,TAMP backup 27 register"
hexmask.long 0x6C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x70 "TAMP_BKP28R,TAMP backup 28 register"
hexmask.long 0x70 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x74 "TAMP_BKP29R,TAMP backup 29 register"
hexmask.long 0x74 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x78 "TAMP_BKP30R,TAMP backup 30 register"
hexmask.long 0x78 0.--31. 1. "BKP,The application can write or read data to and from these registers."
line.long 0x7C "TAMP_BKP31R,TAMP backup 31 register"
hexmask.long 0x7C 0.--31. 1. "BKP,The application can write or read data to and from these registers."
tree.end
tree.end
tree "TIM (Timers)"
base ad:0x0
tree "SEC_TIM1"
base ad:0x50012C00
group.word 0x0++0x1
line.word 0x0 "TIM1_CR1,TIM1 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved do not program this value"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM1_CR2,TIM1 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
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bitfld.long 0x0 18. "OIS6,Output idle state 6 (tim_oc6 output)" "0,1"
bitfld.long 0x0 16. "OIS5,Output idle state 5 (tim_oc5 output)" "0,1"
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bitfld.long 0x0 15. "OIS4N,Output idle state 4 (tim_oc4n output)" "0,1"
bitfld.long 0x0 14. "OIS4,Output idle state 4 (tim_oc4 output)" "0,1"
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bitfld.long 0x0 13. "OIS3N,Output idle state 3 (tim_oc3n output)" "0,1"
bitfld.long 0x0 12. "OIS3,Output idle state 3 (tim_oc3n output)" "0,1"
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bitfld.long 0x0 11. "OIS2N,Output idle state 2 (tim_oc2n output)" "0,1"
bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0,1"
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bitfld.long 0x0 9. "OIS1N,Output idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.long 0x0 8. "OIS1,Output idle state 1 (tim_oc1 output)" "0: tim_oc1=0 (after a dead-time) when MOE=0,1: tim_oc1=1 (after a dead-time) when MOE=0"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter Enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
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bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etr_in frequency divided by 2,2: tim_etr_in frequency divided by 4,3: tim_etr_in frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),7: External Trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1' then the..,1: Quadrature encoder mode 1 x2 mode- Counter..,2: Quadrature encoder mode 2 x2 mode - Counter..,3: Quadrature encoder mode 3 x4 mode - Counter..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index Change interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.long 0x8 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
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bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
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bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
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bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
bitfld.long 0x8 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
bitfld.long 0x8 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
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bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
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bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
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bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
line.long 0xC "TIM1_SR,TIM1 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1"
bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1"
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bitfld.long 0xC 13. "SBIF,System break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1"
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bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1"
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
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bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
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bitfld.long 0xC 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
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bitfld.long 0xC 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1"
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bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM1_EGR,TIM1 event generation register"
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated. MOE bit is cleared.."
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated. MOE bit is cleared.."
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bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "0: No action,1: When CCPC bit is set it allows to update CCxE.."
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bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
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bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
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bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0xB
line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen - The comparison between the output..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle - tim_oc3ref toggles when..,4: Force inactive level - tim_oc3ref is forced low.,5: Force active level - tim_oc3ref is forced high.,6: PWM mode 1 - In upcounting channel 3 is active..,7: PWM mode 2 - In upcounting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register"
bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1"
bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1"
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bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1"
bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1"
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bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1"
bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1"
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bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1"
bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1"
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bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1"
bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1"
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bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1"
bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1"
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bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1"
bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1"
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bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1"
bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1"
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bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "0: tim_oc1n active high.,1: tim_oc1n active low."
bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
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bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "0: the configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
line.long 0x8 "TIM1_CNT,TIM1 counter"
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM1_PSC,TIM1 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM1_ARR,TIM1 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM1_RCR,TIM1 repetition counter register"
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value"
group.long 0x34++0x33
line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3"
hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value"
line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4"
hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value"
line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register"
bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1"
bitfld.long 0x10 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
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bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1"
bitfld.long 0x10 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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bitfld.long 0x10 25. "BK2P,Break 2 polarity" "0: Break input tim_brk2 is active low,1: Break input tim_brk2 is active high"
bitfld.long 0x10 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
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hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter"
hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter"
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bitfld.long 0x10 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
bitfld.long 0x10 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
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bitfld.long 0x10 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
bitfld.long 0x10 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
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bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
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bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup"
line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5"
bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "0: No effect of tim_oc5ref on tim_oc3refc,1: tim_oc3refc is the logical AND of tim_oc3ref and.."
bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "0: No effect of tim_oc5ref on tim_oc2refc,1: tim_oc2refc is the logical AND of tim_oc2ref and.."
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bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "0: No effect of oc5ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc5ref"
hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value"
line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6"
hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value"
line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3"
bitfld.long 0x1C 24. "OC6M_1,OC6M[3]" "0,1"
bitfld.long 0x1C 16. "OC5M_1,OC5M[3]" "0,1"
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bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1"
bitfld.long 0x1C 12.--14. "OC6M,OC6M[2:0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1"
bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1"
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bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1"
bitfld.long 0x1C 4.--6. "OC5M,OC5M[2:0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1"
bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1"
line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2"
bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register"
bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width"
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bitfld.long 0x24 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x24 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x24 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled when tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x24 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
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bitfld.long 0x24 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register"
hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1"
hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection"
bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input polarity is not inverted..,1: tim_brk_cmp4 input polarity is inverted (active.."
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bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input polarity is not inverted..,1: tim_brk_cmp3 input polarity is inverted (active.."
bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input polarity is not inverted..,1: tim_brk_cmp2 input polarity is inverted (active.."
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bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input polarity is not inverted..,1: tim_brk_cmp1 input polarity is inverted (active.."
bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted (active..,1: TIMx_BKIN input polarity is inverted (active.."
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bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
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bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
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bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
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bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
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bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2"
bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM1 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "0: tim_brk2_cmp4 input polarity is not inverted..,1: tim_brk2_cmp4 input polarity is inverted (active.."
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bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "0: tim_brk2_cmp3 input polarity is not inverted..,1: tim_brk2_cmp3 input polarity is inverted (active.."
bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "0: tim_brk2_cmp2 input polarity is not inverted..,1: tim_brk2_cmp2 input polarity is inverted (active.."
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bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "0: tim_brk2_cmp1 input polarity is not inverted..,1: tim_brk2_cmp1 input polarity is inverted (active.."
bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted..,1: TIMx_BKIN2 input polarity is inverted (active.."
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bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "0: tim_brk2_cmp8 input disabled,1: tim_brk2_cmp8 input enabled"
bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "0: tim_brk2_cmp7 input disabled,1: tim_brk2_cmp7 input enabled"
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bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "0: tim_brk2_cmp6 input disabled,1: tim_brk2_cmp6 input enabled"
bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "0: tim_brk2_cmp5 input disabled,1: tim_brk2_cmp5 input enabled"
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bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "0: tim_brk2_cmp4 input disabled,1: tim_brk2_cmp4 input enabled"
bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "0: tim_brk2_cmp3 input disabled,1: tim_brk2_cmp3 input enabled"
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bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "0: tim_brk2_cmp2 input disabled,1: tim_brk2_cmp2 input enabled"
bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "0: tim_brk2_cmp1 input disabled,1: tim_brk2_cmp1 input enabled"
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bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM1_DCR,TIM1 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM2"
base ad:0x50000000
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub> = 2   t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub> = 4   t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
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bitfld.long 0x0 4.--6. "MMS,MMS[0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: TIM2/TIM3 pins and internal signals for product..,3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
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bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
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bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
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bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
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bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
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bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
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bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
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bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
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bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
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bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
newline
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: this configuration is reserved,1: non-inverted/both edges"
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY,UIF copy or CNT bit 31" "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 auto-reload register"
hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM2/TIM3 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM3"
base ad:0x50000400
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub> = 2   t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub> = 4   t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
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bitfld.long 0x0 4.--6. "MMS,MMS[0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: TIM2/TIM3 pins and internal signals for product..,3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
newline
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
newline
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
newline
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
newline
bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
newline
bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
newline
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: this configuration is reserved,1: non-inverted/both edges"
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY,UIF copy or CNT bit 31" "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 auto-reload register"
hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
newline
bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
newline
bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM2/TIM3 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM16"
base ad:0x50014400
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1=0 after a dead-time when MOE=0,1: tim_oc1=1 after a dead-time when MOE=0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_input,TIM16 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
newline
bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
newline
hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
newline
bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM16/TIM17 pins and internal signals for..,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "SEC_TIM17"
base ad:0x50014800
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1=0 after a dead-time when MOE=0,1: tim_oc1=1 after a dead-time when MOE=0"
newline
bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
newline
bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
newline
bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
newline
bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
newline
bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
newline
bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
newline
bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_input,TIM16 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
newline
bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
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bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
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bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
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bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
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hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
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bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
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bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
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bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
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bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
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bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
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bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM16/TIM17 pins and internal signals for..,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM1"
base ad:0x40012C00
group.word 0x0++0x1
line.word 0x0 "TIM1_CR1,TIM1 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved do not program this value"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM1_CR2,TIM1 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
hexmask.long.byte 0x0 20.--23. 1. "MMS2,Master mode selection 2"
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bitfld.long 0x0 18. "OIS6,Output idle state 6 (tim_oc6 output)" "0,1"
bitfld.long 0x0 16. "OIS5,Output idle state 5 (tim_oc5 output)" "0,1"
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bitfld.long 0x0 15. "OIS4N,Output idle state 4 (tim_oc4n output)" "0,1"
bitfld.long 0x0 14. "OIS4,Output idle state 4 (tim_oc4 output)" "0,1"
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bitfld.long 0x0 13. "OIS3N,Output idle state 3 (tim_oc3n output)" "0,1"
bitfld.long 0x0 12. "OIS3,Output idle state 3 (tim_oc3n output)" "0,1"
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bitfld.long 0x0 11. "OIS2N,Output idle state 2 (tim_oc2n output)" "0,1"
bitfld.long 0x0 10. "OIS2,Output idle state 2 (tim_oc2 output)" "0,1"
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bitfld.long 0x0 9. "OIS1N,Output idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.long 0x0 8. "OIS1,Output idle state 1 (tim_oc1 output)" "0: tim_oc1=0 (after a dead-time) when MOE=0,1: tim_oc1=1 (after a dead-time) when MOE=0"
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bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is..,1: tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
bitfld.long 0x0 4.--6. "MMS,MMS[2:0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter Enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
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bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.long 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
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bitfld.long 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
line.long 0x4 "TIM1_SMCR,TIM1 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
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bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
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bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
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bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etr_in frequency divided by 2,2: tim_etr_in frequency divided by 4,3: tim_etr_in frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
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bitfld.long 0x4 7. "MSM,Master/slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[2:0]: Trigger selection" "0: Internal Trigger 0 (tim_itr0),1: Internal Trigger 1 (tim_itr1),2: Internal Trigger 2 (tim_itr2),3: Internal Trigger 3 (tim_itr3),4: tim_ti1 Edge Detector (tim_ti1f_ed),5: Filtered Timer Input 1 (tim_ti1fp1),6: Filtered Timer Input 2 (tim_ti2fp2),7: External Trigger input (tim_etrf)"
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bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[2:0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1' then the..,1: Quadrature encoder mode 1 x2 mode- Counter..,2: Quadrature encoder mode 2 x2 mode - Counter..,3: Quadrature encoder mode 3 x4 mode - Counter..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM1_DIER,TIM1 DMA/interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
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bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction Change interrupt disabled,1: Direction Change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index Change interrupt enabled"
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bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled,1: Trigger DMA request enabled"
bitfld.long 0x8 13. "COMDE,COM DMA request enable" "0: COM DMA request disabled,1: COM DMA request enabled"
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bitfld.long 0x8 12. "CC4DE,Capture/compare 4 DMA request enable" "0: CC4 DMA request disabled,1: CC4 DMA request enabled"
bitfld.long 0x8 11. "CC3DE,Capture/compare 3 DMA request enable" "0: CC3 DMA request disabled,1: CC3 DMA request enabled"
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bitfld.long 0x8 10. "CC2DE,Capture/compare 2 DMA request enable" "0: CC2 DMA request disabled,1: CC2 DMA request enabled"
bitfld.long 0x8 9. "CC1DE,Capture/compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
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bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
bitfld.long 0x8 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
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bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled,1: Trigger interrupt enabled"
bitfld.long 0x8 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
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bitfld.long 0x8 4. "CC4IE,Capture/compare 4 interrupt enable" "0: CC4 interrupt disabled,1: CC4 interrupt enabled"
bitfld.long 0x8 3. "CC3IE,Capture/compare 3 interrupt enable" "0: CC3 interrupt disabled,1: CC3 interrupt enabled"
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bitfld.long 0x8 2. "CC2IE,Capture/compare 2 interrupt enable" "0: CC2 interrupt disabled,1: CC2 interrupt enabled"
bitfld.long 0x8 1. "CC1IE,Capture/compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
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bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
line.long 0xC "TIM1_SR,TIM1 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
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bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
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bitfld.long 0xC 17. "CC6IF,Compare 6 interrupt flag" "0,1"
bitfld.long 0xC 16. "CC5IF,Compare 5 interrupt flag" "0,1"
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bitfld.long 0xC 13. "SBIF,System break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the system.."
bitfld.long 0xC 12. "CC4OF,Capture/compare 4 overcapture flag" "0,1"
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bitfld.long 0xC 11. "CC3OF,Capture/compare 3 overcapture flag" "0,1"
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
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bitfld.long 0xC 9. "CC1OF,Capture/compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
bitfld.long 0xC 8. "B2IF,Break 2 interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break 2.."
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bitfld.long 0xC 7. "BIF,Break interrupt flag" "0: No break event occurred.,1: An active level has been detected on the break.."
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
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bitfld.long 0xC 5. "COMIF,COM interrupt flag" "0: No COM event occurred.,1: COM interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/compare 4 interrupt flag" "0,1"
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bitfld.long 0xC 3. "CC3IF,Capture/compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/compare 2 interrupt flag" "0,1"
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bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM1_EGR,TIM1 event generation register"
bitfld.word 0x0 8. "B2G,Break 2 generation" "0: No action,1: A break 2 event is generated. MOE bit is cleared.."
bitfld.word 0x0 7. "BG,Break generation" "0: No action,1: A break event is generated. MOE bit is cleared.."
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bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 5. "COMG,Capture/compare control update generation" "0: No action,1: When CCPC bit is set it allows to update CCxE.."
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bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
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bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
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bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM1_CCMR1_Input,TIM1 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
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bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 Selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM1_CCMR1_Output,TIM1 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM1_CCMR2_Input,TIM1 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
newline
bitfld.long 0x4 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0xB
line.long 0x0 "TIM1_CCMR2_Output,TIM1 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0: Frozen - The comparison between the output..,1: Set channel 3 to active level on match.,2: Set channel 3 to inactive level on match.,3: Toggle - tim_oc3ref toggles when..,4: Force inactive level - tim_oc3ref is forced low.,5: Force active level - tim_oc3ref is forced high.,6: PWM mode 1 - In upcounting channel 3 is active..,7: PWM mode 2 - In upcounting channel 3 is inactive.."
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
line.long 0x4 "TIM1_CCER,TIM1 capture/compare enable register"
bitfld.long 0x4 21. "CC6P,Capture/compare 6 output polarity" "0,1"
bitfld.long 0x4 20. "CC6E,Capture/compare 6 output enable" "0,1"
newline
bitfld.long 0x4 17. "CC5P,Capture/compare 5 output polarity" "0,1"
bitfld.long 0x4 16. "CC5E,Capture/compare 5 output enable" "0,1"
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bitfld.long 0x4 15. "CC4NP,Capture/compare 4 complementary output polarity" "0,1"
bitfld.long 0x4 14. "CC4NE,Capture/compare 4 complementary output enable" "0,1"
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bitfld.long 0x4 13. "CC4P,Capture/compare 4 output polarity" "0,1"
bitfld.long 0x4 12. "CC4E,Capture/compare 4 output enable" "0,1"
newline
bitfld.long 0x4 11. "CC3NP,Capture/compare 3 complementary output polarity" "0,1"
bitfld.long 0x4 10. "CC3NE,Capture/compare 3 complementary output enable" "0,1"
newline
bitfld.long 0x4 9. "CC3P,Capture/compare 3 output polarity" "0,1"
bitfld.long 0x4 8. "CC3E,Capture/compare 3 output enable" "0,1"
newline
bitfld.long 0x4 7. "CC2NP,Capture/compare 2 complementary output polarity" "0,1"
bitfld.long 0x4 6. "CC2NE,Capture/compare 2 complementary output enable" "0,1"
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bitfld.long 0x4 5. "CC2P,Capture/compare 2 output polarity" "0,1"
bitfld.long 0x4 4. "CC2E,Capture/compare 2 output enable" "0,1"
newline
bitfld.long 0x4 3. "CC1NP,Capture/compare 1 complementary output polarity" "0: tim_oc1n active high.,1: tim_oc1n active low."
bitfld.long 0x4 2. "CC1NE,Capture/compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
newline
bitfld.long 0x4 1. "CC1P,Capture/compare 1 output polarity" "0: the configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.long 0x4 0. "CC1E,Capture/compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
line.long 0x8 "TIM1_CNT,TIM1 counter"
rbitfld.long 0x8 31. "UIFCPY,UIF copy" "0,1"
hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM1_PSC,TIM1 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM1_ARR,TIM1 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM1_RCR,TIM1 repetition counter register"
hexmask.word 0x0 0.--15. 1. "REP,Repetition counter reload value"
group.long 0x34++0x33
line.long 0x0 "TIM1_CCR1,TIM1 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM1_CCR2,TIM1 capture/compare register 2"
hexmask.long.tbyte 0x4 0.--19. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM1_CCR3,TIM1 capture/compare register 3"
hexmask.long.tbyte 0x8 0.--19. 1. "CCR3,Capture/compare value"
line.long 0xC "TIM1_CCR4,TIM1 capture/compare register 4"
hexmask.long.tbyte 0xC 0.--19. 1. "CCR4,Capture/compare value"
line.long 0x10 "TIM1_BDTR,TIM1 break and dead-time register"
bitfld.long 0x10 29. "BK2BID,Break2 bidirectional" "0,1"
bitfld.long 0x10 28. "BKBID,Break bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
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bitfld.long 0x10 27. "BK2DSRM,Break2 disarm" "0,1"
bitfld.long 0x10 26. "BKDSRM,Break disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
newline
bitfld.long 0x10 25. "BK2P,Break 2 polarity" "0: Break input tim_brk2 is active low,1: Break input tim_brk2 is active high"
bitfld.long 0x10 24. "BK2E,Break 2 enable" "0: Break2 function disabled,1: Break2 function enabled"
newline
hexmask.long.byte 0x10 20.--23. 1. "BK2F,Break 2 filter"
hexmask.long.byte 0x10 16.--19. 1. "BKF,Break filter"
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bitfld.long 0x10 15. "MOE,Main output enable" "0: OC and OCN outputs are disabled or forced to..,1: OC and OCN outputs are enabled if their.."
bitfld.long 0x10 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
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bitfld.long 0x10 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
bitfld.long 0x10 12. "BKE,Break enable" "0: Break function disabled,1: Break function enabled"
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bitfld.long 0x10 11. "OSSR,Off-state selection for Run mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are enabled with.."
bitfld.long 0x10 10. "OSSI,Off-state selection for idle mode" "0: When inactive OC/OCN outputs are disabled (the..,1: When inactive OC/OCN outputs are first forced.."
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bitfld.long 0x10 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected.,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
hexmask.long.byte 0x10 0.--7. 1. "DTG,Dead-time generator setup"
line.long 0x14 "TIM1_CCR5,TIM1 capture/compare register 5"
bitfld.long 0x14 31. "GC5C3,Group channel 5 and channel 3" "0: No effect of tim_oc5ref on tim_oc3refc,1: tim_oc3refc is the logical AND of tim_oc3ref and.."
bitfld.long 0x14 30. "GC5C2,Group channel 5 and channel 2" "0: No effect of tim_oc5ref on tim_oc2refc,1: tim_oc2refc is the logical AND of tim_oc2ref and.."
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bitfld.long 0x14 29. "GC5C1,Group channel 5 and channel 1" "0: No effect of oc5ref on oc1refc,1: oc1refc is the logical AND of oc1ref and oc5ref"
hexmask.long.tbyte 0x14 0.--19. 1. "CCR5,Capture/compare 5 value"
line.long 0x18 "TIM1_CCR6,TIM1 capture/compare register 6"
hexmask.long.tbyte 0x18 0.--19. 1. "CCR6,Capture/compare 6 value"
line.long 0x1C "TIM1_CCMR3,TIM1 capture/compare mode register 3"
bitfld.long 0x1C 24. "OC6M_1,OC6M[3]" "0,1"
bitfld.long 0x1C 16. "OC5M_1,OC5M[3]" "0,1"
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bitfld.long 0x1C 15. "OC6CE,Output compare 6 clear enable" "0,1"
bitfld.long 0x1C 12.--14. "OC6M,OC6M[2:0]: Output compare 6 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 11. "OC6PE,Output compare 6 preload enable" "0,1"
bitfld.long 0x1C 10. "OC6FE,Output compare 6 fast enable" "0,1"
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bitfld.long 0x1C 7. "OC5CE,Output compare 5 clear enable" "0,1"
bitfld.long 0x1C 4.--6. "OC5M,OC5M[2:0]: Output compare 5 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x1C 3. "OC5PE,Output compare 5 preload enable" "0,1"
bitfld.long 0x1C 2. "OC5FE,Output compare 5 fast enable" "0,1"
line.long 0x20 "TIM1_DTR2,TIM1 timer deadtime register 2"
bitfld.long 0x20 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x20 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x20 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
line.long 0x24 "TIM1_ECR,TIM1 timer encoder control register"
bitfld.long 0x24 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x24 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x24 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x24 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x24 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled when tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x24 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
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bitfld.long 0x24 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x28 "TIM1_TISEL,TIM1 timer input selection register"
hexmask.long.byte 0x28 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x28 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x28 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x28 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x2C "TIM1_AF1,TIM1 alternate function option register 1"
hexmask.long.byte 0x2C 14.--17. 1. "ETRSEL,etr_in source selection"
bitfld.long 0x2C 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input polarity is not inverted..,1: tim_brk_cmp4 input polarity is inverted (active.."
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bitfld.long 0x2C 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input polarity is not inverted..,1: tim_brk_cmp3 input polarity is inverted (active.."
bitfld.long 0x2C 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input polarity is not inverted..,1: tim_brk_cmp2 input polarity is inverted (active.."
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bitfld.long 0x2C 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input polarity is not inverted..,1: tim_brk_cmp1 input polarity is inverted (active.."
bitfld.long 0x2C 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input polarity is not inverted (active..,1: TIMx_BKIN input polarity is inverted (active.."
newline
bitfld.long 0x2C 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
bitfld.long 0x2C 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
newline
bitfld.long 0x2C 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
bitfld.long 0x2C 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
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bitfld.long 0x2C 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
bitfld.long 0x2C 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
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bitfld.long 0x2C 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
bitfld.long 0x2C 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
newline
bitfld.long 0x2C 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x30 "TIM1_AF2,TIM1 alternate function register 2"
bitfld.long 0x30 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM1 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
bitfld.long 0x30 13. "BK2CMP4P,tim_brk2_cmp4 input polarity" "0: tim_brk2_cmp4 input polarity is not inverted..,1: tim_brk2_cmp4 input polarity is inverted (active.."
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bitfld.long 0x30 12. "BK2CMP3P,tim_brk2_cmp3 input polarity" "0: tim_brk2_cmp3 input polarity is not inverted..,1: tim_brk2_cmp3 input polarity is inverted (active.."
bitfld.long 0x30 11. "BK2CMP2P,tim_brk2_cmp2 input polarity" "0: tim_brk2_cmp2 input polarity is not inverted..,1: tim_brk2_cmp2 input polarity is inverted (active.."
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bitfld.long 0x30 10. "BK2CMP1P,tim_brk2_cmp1 input polarity" "0: tim_brk2_cmp1 input polarity is not inverted..,1: tim_brk2_cmp1 input polarity is inverted (active.."
bitfld.long 0x30 9. "BK2INP,TIMx_BKIN2 input polarity" "0: TIMx_BKIN2 input polarity is not inverted..,1: TIMx_BKIN2 input polarity is inverted (active.."
newline
bitfld.long 0x30 8. "BK2CMP8E,tim_brk2_cmp8 enable" "0: tim_brk2_cmp8 input disabled,1: tim_brk2_cmp8 input enabled"
bitfld.long 0x30 7. "BK2CMP7E,tim_brk2_cmp7 enable" "0: tim_brk2_cmp7 input disabled,1: tim_brk2_cmp7 input enabled"
newline
bitfld.long 0x30 6. "BK2CMP6E,tim_brk2_cmp6 enable" "0: tim_brk2_cmp6 input disabled,1: tim_brk2_cmp6 input enabled"
bitfld.long 0x30 5. "BK2CMP5E,tim_brk2_cmp5 enable" "0: tim_brk2_cmp5 input disabled,1: tim_brk2_cmp5 input enabled"
newline
bitfld.long 0x30 4. "BK2CMP4E,tim_brk2_cmp4 enable" "0: tim_brk2_cmp4 input disabled,1: tim_brk2_cmp4 input enabled"
bitfld.long 0x30 3. "BK2CMP3E,tim_brk2_cmp3 enable" "0: tim_brk2_cmp3 input disabled,1: tim_brk2_cmp3 input enabled"
newline
bitfld.long 0x30 2. "BK2CMP2E,tim_brk2_cmp2 enable" "0: tim_brk2_cmp2 input disabled,1: tim_brk2_cmp2 input enabled"
bitfld.long 0x30 1. "BK2CMP1E,tim_brk2_cmp1 enable" "0: tim_brk2_cmp1 input disabled,1: tim_brk2_cmp1 input enabled"
newline
bitfld.long 0x30 0. "BK2INE,TIMx_BKIN2 input enable" "0: TIMx_BKIN2 input disabled,1: TIMx_BKIN2 input enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM1_DCR,TIM1 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM1_DMAR,TIM1 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM2"
base ad:0x40000000
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub> = 2   t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub> = 4   t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
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bitfld.long 0x0 4.--6. "MMS,MMS[0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
newline
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
newline
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: TIM2/TIM3 pins and internal signals for product..,3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
newline
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
newline
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
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bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
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bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
newline
bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
newline
bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
newline
bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
newline
bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
newline
bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
newline
bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: this configuration is reserved,1: non-inverted/both edges"
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY,UIF copy or CNT bit 31" "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 auto-reload register"
hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
newline
bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
newline
bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
newline
hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM2/TIM3 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM3"
base ad:0x40000400
group.word 0x0++0x1
line.word 0x0 "TIM2_CR1,TIM2 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering Enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub> = t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub> = 2   t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub> = 4   t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
newline
bitfld.word 0x0 5.--6. "CMS,Center-aligned mode selection" "0: Edge-aligned mode. The counter counts up or down..,1: Center-aligned mode 1. The counter counts up and..,2: Center-aligned mode 2. The counter counts up and..,3: Center-aligned mode 3. The counter counts up and.."
bitfld.word 0x0 4. "DIR,Direction" "0: Counter used as upcounter,1: Counter used as downcounter"
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bitfld.word 0x0 3. "OPM,One-pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: Only counter overflow/underflow generates an.."
newline
bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.long 0x4++0xF
line.long 0x0 "TIM2_CR2,TIM2 control register 2"
bitfld.long 0x0 25. "MMS_1,MMS[3]" "0,1"
bitfld.long 0x0 7. "TI1S,tim_ti1 selection" "0: The tim_ti1_in[15:0] multiplexer output is to..,1: The tim_ti1_in[15:0] tim_ti2_in[15:0] and.."
newline
bitfld.long 0x0 4.--6. "MMS,MMS[0]: Master mode selection" "0: Reset - the UG bit from the TIMx_EGR register is..,1: Enable - the Counter enable signal CNT_EN is..,2: Update - The update event is selected as trigger..,3: Compare Pulse - The trigger output send a..,4: Compare - tim_oc1refc signal is used as trigger..,5: Compare - tim_oc2refc signal is used as trigger..,6: Compare - tim_oc3refc signal is used as trigger..,7: Compare - tim_oc4refc signal is used as trigger.."
bitfld.long 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
line.long 0x4 "TIM2_SMCR,TIM2 slave mode control register"
bitfld.long 0x4 25. "SMSPS,SMS preload source" "0: The transfer is triggered by the Timer's Update..,1: The transfer is triggered by the Index event"
bitfld.long 0x4 24. "SMSPE,SMS preload enable" "0: SMS[3:0] bitfield is not preloaded,1: SMS[3:0] preload is enabled"
newline
bitfld.long 0x4 20.--21. "TS_1,TS[4:3]" "0,1,2,3"
bitfld.long 0x4 16. "SMS_1,SMS[3]" "0,1"
newline
bitfld.long 0x4 15. "ETP,External trigger polarity" "0: tim_etr_in is non-inverted active at high level..,1: tim_etr_in is inverted active at low level or.."
bitfld.long 0x4 14. "ECE,External clock enable" "0: External clock mode 2 disabled,1: External clock mode 2 enabled. The counter is.."
newline
bitfld.long 0x4 12.--13. "ETPS,External trigger prescaler" "0: Prescaler OFF,1: tim_etrp frequency divided by 2,2: tim_etrp frequency divided by 4,3: tim_etrp frequency divided by 8"
hexmask.long.byte 0x4 8.--11. 1. "ETF,External trigger filter"
newline
bitfld.long 0x4 7. "MSM,Master/Slave mode" "0: No action,1: The effect of an event on the trigger input.."
bitfld.long 0x4 4.--6. "TS,TS[0]: Trigger selection" "0: Internal trigger 0 (tim_itr0),1: Internal trigger 1 (tim_itr1),2: TIM2/TIM3 pins and internal signals for product..,3: Internal trigger 3 (tim_itr3),4: tim_ti1 edge detector (tim_ti1f_ed),5: Filtered timer input 1 (tim_ti1fp1),6: Filtered timer input 2 (tim_ti2fp2),7: External trigger input (tim_etrf)"
newline
bitfld.long 0x4 3. "OCCS,OCREF clear selection" "0: tim_ocref_clr_int is connected to the..,1: tim_ocref_clr_int is connected to tim_etrf"
bitfld.long 0x4 0.--2. "SMS,SMS[0]: Slave mode selection" "0: Slave mode disabled - if CEN = '1 then the..,1: Encoder mode 1 - Counter counts up/down on..,2: Encoder mode 2 - Counter counts up/down on..,3: Encoder mode 3 - Counter counts up/down on both..,4: Reset Mode - Rising edge of the selected trigger..,5: Gated Mode - The counter clock is enabled when..,6: Trigger Mode - The counter starts at a rising..,7: External Clock Mode 1 - Rising edges of the.."
line.long 0x8 "TIM2_DIER,TIM2 DMA/Interrupt enable register"
bitfld.long 0x8 23. "TERRIE,Transition error interrupt enable" "0: Transition error interrupt disabled,1: Transition error interrupt enabled"
bitfld.long 0x8 22. "IERRIE,Index error interrupt enable" "0: Index error interrupt disabled,1: Index error interrupt enabled"
newline
bitfld.long 0x8 21. "DIRIE,Direction change interrupt enable" "0: Direction change interrupt disabled,1: Direction change interrupt enabled"
bitfld.long 0x8 20. "IDXIE,Index interrupt enable" "0: Index interrupt disabled,1: Index interrupt enabled"
newline
bitfld.long 0x8 14. "TDE,Trigger DMA request enable" "0: Trigger DMA request disabled.,1: Trigger DMA request enabled."
bitfld.long 0x8 12. "CC4DE,Capture/Compare 4 DMA request enable" "0: CC4 DMA request disabled.,1: CC4 DMA request enabled."
newline
bitfld.long 0x8 11. "CC3DE,Capture/Compare 3 DMA request enable" "0: CC3 DMA request disabled.,1: CC3 DMA request enabled."
bitfld.long 0x8 10. "CC2DE,Capture/Compare 2 DMA request enable" "0: CC2 DMA request disabled.,1: CC2 DMA request enabled."
newline
bitfld.long 0x8 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled.,1: CC1 DMA request enabled."
bitfld.long 0x8 8. "UDE,Update DMA request enable" "0: Update DMA request disabled.,1: Update DMA request enabled."
newline
bitfld.long 0x8 6. "TIE,Trigger interrupt enable" "0: Trigger interrupt disabled.,1: Trigger interrupt enabled."
bitfld.long 0x8 4. "CC4IE,Capture/Compare 4 interrupt enable" "0: CC4 interrupt disabled.,1: CC4 interrupt enabled."
newline
bitfld.long 0x8 3. "CC3IE,Capture/Compare 3 interrupt enable" "0: CC3 interrupt disabled.,1: CC3 interrupt enabled."
bitfld.long 0x8 2. "CC2IE,Capture/Compare 2 interrupt enable" "0: CC2 interrupt disabled.,1: CC2 interrupt enabled."
newline
bitfld.long 0x8 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled.,1: CC1 interrupt enabled."
bitfld.long 0x8 0. "UIE,Update interrupt enable" "0: Update interrupt disabled.,1: Update interrupt enabled."
line.long 0xC "TIM2_SR,TIM2 status register"
bitfld.long 0xC 23. "TERRF,Transition error interrupt flag" "0: No encoder transition error has been detected.,1: An encoder transition error has been detected"
bitfld.long 0xC 22. "IERRF,Index error interrupt flag" "0: No index error has been detected.,1: An index error has been detected"
newline
bitfld.long 0xC 21. "DIRF,Direction change interrupt flag" "0: No direction change,1: Direction change"
bitfld.long 0xC 20. "IDXF,Index interrupt flag" "0: No index event occurred.,1: An index event has occurred"
newline
bitfld.long 0xC 12. "CC4OF,Capture/Compare 4 overcapture flag" "0,1"
bitfld.long 0xC 11. "CC3OF,Capture/Compare 3 overcapture flag" "0,1"
newline
bitfld.long 0xC 10. "CC2OF,Capture/compare 2 overcapture flag" "0,1"
bitfld.long 0xC 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected.,1: The counter value has been captured in TIMx_CCR1.."
newline
bitfld.long 0xC 6. "TIF,Trigger interrupt flag" "0: No trigger event occurred.,1: Trigger interrupt pending."
bitfld.long 0xC 4. "CC4IF,Capture/Compare 4 interrupt flag" "0,1"
newline
bitfld.long 0xC 3. "CC3IF,Capture/Compare 3 interrupt flag" "0,1"
bitfld.long 0xC 2. "CC2IF,Capture/Compare 2 interrupt flag" "0,1"
newline
bitfld.long 0xC 1. "CC1IF,Capture/compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
bitfld.long 0xC 0. "UIF,Update interrupt flag" "0: No update occurred,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM2_EGR,TIM2 event generation register"
bitfld.word 0x0 6. "TG,Trigger generation" "0: No action,1: The TIF flag is set in TIMx_SR register. Related.."
bitfld.word 0x0 4. "CC4G,Capture/compare 4 generation" "0,1"
newline
bitfld.word 0x0 3. "CC3G,Capture/compare 3 generation" "0,1"
bitfld.word 0x0 2. "CC2G,Capture/compare 2 generation" "0,1"
newline
bitfld.word 0x0 1. "CC1G,Capture/compare 1 generation" "0: No action,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action,1: Re-initialize the counter and generates an.."
group.long 0x18++0x3
line.long 0x0 "TIM2_CCMR1_Input,TIM2 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 12.--15. 1. "IC2F,Input capture 2 filter"
bitfld.long 0x0 10.--11. "IC2PSC,Input capture 2 prescaler" "0,1,2,3"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/compare 2 selection" "0: CC2 channel is configured as output.,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
newline
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
group.long 0x18++0x7
line.long 0x0 "TIM2_CCMR1_Output,TIM2 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 24. "OC2M_1,OC2M[3]" "0,1"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
newline
bitfld.long 0x0 15. "OC2CE,Output compare 2 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC2M,OC2M[2:0]: Output compare 2 mode" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x0 11. "OC2PE,Output compare 2 preload enable" "0,1"
bitfld.long 0x0 10. "OC2FE,Output compare 2 fast enable" "0,1"
newline
bitfld.long 0x0 8.--9. "CC2S,Capture/Compare 2 selection" "0: CC2 channel is configured as output,1: CC2 channel is configured as input tim_ic2 is..,2: CC2 channel is configured as input tim_ic2 is..,3: CC2 channel is configured as input tim_ic2 is.."
bitfld.long 0x0 7. "OC1CE,Output compare 1 clear enable" "0: tim_oc1ref is not affected by the..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - In upcounting channel 1 is active..,7: PWM mode 2 - In upcounting channel 1 is inactive.."
bitfld.long 0x0 3. "OC1PE,Output compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output.,1: CC1 channel is configured as input tim_ic1 is..,2: CC1 channel is configured as input tim_ic1 is..,3: CC1 channel is configured as input tim_ic1 is.."
line.long 0x4 "TIM2_CCMR2_Input,TIM2 capture/compare mode register 2 [alternate]"
hexmask.long.byte 0x4 12.--15. 1. "IC4F,Input capture 4 filter"
bitfld.long 0x4 10.--11. "IC4PSC,Input capture 4 prescaler" "0,1,2,3"
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bitfld.long 0x4 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
hexmask.long.byte 0x4 4.--7. 1. "IC3F,Input capture 3 filter"
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bitfld.long 0x4 2.--3. "IC3PSC,Input capture 3 prescaler" "0,1,2,3"
bitfld.long 0x4 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.long 0x1C++0x3
line.long 0x0 "TIM2_CCMR2_Output,TIM2 capture/compare mode register 2 [alternate]"
bitfld.long 0x0 24. "OC4M_1,OC4M[3]" "0,1"
bitfld.long 0x0 16. "OC3M_1,OC3M[3]" "0,1"
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bitfld.long 0x0 15. "OC4CE,Output compare 4 clear enable" "0,1"
bitfld.long 0x0 12.--14. "OC4M,OC4M[2:0]: Output compare 4 mode" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 11. "OC4PE,Output compare 4 preload enable" "0,1"
bitfld.long 0x0 10. "OC4FE,Output compare 4 fast enable" "0,1"
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bitfld.long 0x0 8.--9. "CC4S,Capture/Compare 4 selection" "0: CC4 channel is configured as output,1: CC4 channel is configured as input tim_ic4 is..,2: CC4 channel is configured as input tim_ic4 is..,3: CC4 channel is configured as input tim_ic4 is.."
bitfld.long 0x0 7. "OC3CE,Output compare 3 clear enable" "0,1"
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bitfld.long 0x0 4.--6. "OC3M,OC3M[2:0]: Output compare 3 mode" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 3. "OC3PE,Output compare 3 preload enable" "0,1"
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bitfld.long 0x0 2. "OC3FE,Output compare 3 fast enable" "0,1"
bitfld.long 0x0 0.--1. "CC3S,Capture/Compare 3 selection" "0: CC3 channel is configured as output,1: CC3 channel is configured as input tim_ic3 is..,2: CC3 channel is configured as input tim_ic3 is..,3: CC3 channel is configured as input tim_ic3 is.."
group.word 0x20++0x1
line.word 0x0 "TIM2_CCER,TIM2 capture/compare enable register"
bitfld.word 0x0 15. "CC4NP,Capture/Compare 4 output Polarity." "0,1"
bitfld.word 0x0 13. "CC4P,Capture/Compare 4 output Polarity." "0,1"
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bitfld.word 0x0 12. "CC4E,Capture/Compare 4 output enable." "0,1"
bitfld.word 0x0 11. "CC3NP,Capture/Compare 3 output Polarity." "0,1"
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bitfld.word 0x0 9. "CC3P,Capture/Compare 3 output Polarity." "0,1"
bitfld.word 0x0 8. "CC3E,Capture/Compare 3 output enable." "0,1"
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bitfld.word 0x0 7. "CC2NP,Capture/Compare 2 output Polarity." "0,1"
bitfld.word 0x0 5. "CC2P,Capture/Compare 2 output Polarity." "0,1"
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bitfld.word 0x0 4. "CC2E,Capture/Compare 2 output enable." "0,1"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 output Polarity." "0,1"
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output Polarity." "0: this configuration is reserved,1: non-inverted/both edges"
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable." "0: Capture mode disabled / OC1 is not active,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM2_CNT,TIM2 counter"
bitfld.long 0x0 31. "UIFCPY,UIF copy or CNT bit 31" "0,1"
hexmask.long 0x0 0.--30. 1. "CNT,Least significant part of counter value"
group.word 0x28++0x1
line.word 0x0 "TIM2_PSC,TIM2 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM2_ARR,TIM2 auto-reload register"
hexmask.long 0x0 0.--31. 1. "ARR,Auto-reload value"
group.long 0x34++0xF
line.long 0x0 "TIM2_CCR1,TIM2 capture/compare register 1"
hexmask.long 0x0 0.--31. 1. "CCR1,Capture/compare 1 value"
line.long 0x4 "TIM2_CCR2,TIM2 capture/compare register 2"
hexmask.long 0x4 0.--31. 1. "CCR2,Capture/compare 2 value"
line.long 0x8 "TIM2_CCR3,TIM2 capture/compare register 3"
hexmask.long 0x8 0.--31. 1. "CCR3,Capture/compare 3 value"
line.long 0xC "TIM2_CCR4,TIM2 capture/compare register 4"
hexmask.long 0xC 0.--31. 1. "CCR4,Capture/compare 4 value"
group.long 0x58++0xF
line.long 0x0 "TIM2_ECR,TIM2 timer encoder control register"
bitfld.long 0x0 24.--26. "PWPRSC,Pulse width prescaler" "0,1,2,3,4,5,6,7"
hexmask.long.byte 0x0 16.--23. 1. "PW,Pulse width"
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bitfld.long 0x0 6.--7. "IPOS,Index positioning" "0: Index resets the counter when clock is 0,1: Index resets the counter when clock is 1,2: Index resets the counter when AB = 10,3: Index resets the counter when AB = 11"
bitfld.long 0x0 5. "FIDX,First index" "0: Index is always active,1: the first Index only resets the counter"
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bitfld.long 0x0 3.--4. "IBLK,Index blanking" "0: Index always active,1: Index disabled hen tim_ti3 input is active as..,2: Index disabled when tim_ti4 input is active as..,3: Reserved"
bitfld.long 0x0 1.--2. "IDIR,Index direction" "0: Index resets the counter whatever the direction,1: Index resets the counter when up-counting only,2: Index resets the counter when down-counting only,3: Reserved"
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bitfld.long 0x0 0. "IE,Index enable" "0: Index disabled,1: Index enabled"
line.long 0x4 "TIM2_TISEL,TIM2 timer input selection register"
hexmask.long.byte 0x4 24.--27. 1. "TI4SEL,Selects tim_ti4[15:0] input"
hexmask.long.byte 0x4 16.--19. 1. "TI3SEL,Selects tim_ti3[15:0] input"
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hexmask.long.byte 0x4 8.--11. 1. "TI2SEL,Selects tim_ti2[15:0] input"
hexmask.long.byte 0x4 0.--3. 1. "TI1SEL,Selects tim_ti1[15:0] input"
line.long 0x8 "TIM2_AF1,TIM2 alternate function register 1"
hexmask.long.byte 0x8 14.--17. 1. "ETRSEL,etr_in source selection"
line.long 0xC "TIM2_AF2,TIM2 alternate function register 2"
bitfld.long 0xC 16.--18. "OCRSEL,ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM2/TIM3 pins and internal signals for product..,?,?,?,?,7: tim_ocref_clr7"
group.long 0x3DC++0x7
line.long 0x0 "TIM2_DCR,TIM2 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM2_DMAR,TIM2 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM16"
base ad:0x40014400
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
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bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1=0 after a dead-time when MOE=0,1: tim_oc1=1 after a dead-time when MOE=0"
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bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
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bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
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bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
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bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
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bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
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bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
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bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_input,TIM16 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
newline
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
newline
bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
newline
bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
newline
bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
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bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
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hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
newline
bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
newline
bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
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bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
newline
bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
newline
bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
newline
bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM16/TIM17 pins and internal signals for..,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
newline
hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree "TIM17"
base ad:0x40014800
group.word 0x0++0x1
line.word 0x0 "TIM16_CR1,TIM16 control register 1"
bitfld.word 0x0 12. "DITHEN,Dithering enable" "0: Dithering disabled,1: Dithering enabled"
bitfld.word 0x0 11. "UIFREMAP,UIF status bit remapping" "0: No remapping. UIF status bit is not copied to..,1: Remapping enabled. UIF status bit is copied to.."
newline
bitfld.word 0x0 8.--9. "CKD,Clock division" "0: t<sub>DTS</sub>=t<sub>tim_ker_ck</sub>,1: t<sub>DTS</sub>=2*t<sub>tim_ker_ck</sub>,2: t<sub>DTS</sub>=4*t<sub>tim_ker_ck</sub>,3: Reserved"
bitfld.word 0x0 7. "ARPE,Auto-reload preload enable" "0: TIMx_ARR register is not buffered,1: TIMx_ARR register is buffered"
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bitfld.word 0x0 3. "OPM,One pulse mode" "0: Counter is not stopped at update event,1: Counter stops counting at the next update event.."
bitfld.word 0x0 2. "URS,Update request source" "0: Any of the following events generate an update..,1: nly counter overflow/underflow generates an.."
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bitfld.word 0x0 1. "UDIS,Update disable" "0: UEV enabled. The Update (UEV) event is generated..,1: UEV disabled. The Update event is not generated.."
bitfld.word 0x0 0. "CEN,Counter enable" "0: Counter disabled,1: Counter enabled"
group.word 0x4++0x1
line.word 0x0 "TIM16_CR2,TIM16 control register 2"
bitfld.word 0x0 9. "OIS1N,Output Idle state 1 (tim_oc1n output)" "0: tim_oc1n=0 after a dead-time when MOE=0,1: tim_oc1n=1 after a dead-time when MOE=0"
bitfld.word 0x0 8. "OIS1,Output Idle state 1 (tim_oc1 output)" "0: tim_oc1=0 after a dead-time when MOE=0,1: tim_oc1=1 after a dead-time when MOE=0"
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bitfld.word 0x0 3. "CCDS,Capture/compare DMA selection" "0: CCx DMA request sent when CCx event occurs,1: CCx DMA requests sent when update event occurs"
bitfld.word 0x0 2. "CCUS,Capture/compare control update selection" "0: When capture/compare control bits are preloaded..,1: When capture/compare control bits are preloaded.."
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bitfld.word 0x0 0. "CCPC,Capture/compare preloaded control" "0: CCxE CCxNE and OCxM bits are not preloaded,1: CCxE CCxNE and OCxM bits are preloaded after.."
group.word 0xC++0x1
line.word 0x0 "TIM16_DIER,TIM16 DMA/interrupt enable register"
bitfld.word 0x0 9. "CC1DE,Capture/Compare 1 DMA request enable" "0: CC1 DMA request disabled,1: CC1 DMA request enabled"
bitfld.word 0x0 8. "UDE,Update DMA request enable" "0: Update DMA request disabled,1: Update DMA request enabled"
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bitfld.word 0x0 7. "BIE,Break interrupt enable" "0: Break interrupt disabled,1: Break interrupt enabled"
bitfld.word 0x0 5. "COMIE,COM interrupt enable" "0: COM interrupt disabled,1: COM interrupt enabled"
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bitfld.word 0x0 1. "CC1IE,Capture/Compare 1 interrupt enable" "0: CC1 interrupt disabled,1: CC1 interrupt enabled"
bitfld.word 0x0 0. "UIE,Update interrupt enable" "0: Update interrupt disabled,1: Update interrupt enabled"
group.word 0x10++0x1
line.word 0x0 "TIM16_SR,TIM16 status register"
bitfld.word 0x0 9. "CC1OF,Capture/Compare 1 overcapture flag" "0: No overcapture has been detected,1: The counter value has been captured in TIMx_CCR1.."
bitfld.word 0x0 7. "BIF,Break interrupt flag" "0: No break event occurred,1: An active level has been detected on the break.."
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bitfld.word 0x0 5. "COMIF,COM interrupt flag" "0: No COM event occurred,1: COM interrupt pending"
bitfld.word 0x0 1. "CC1IF,Capture/Compare 1 interrupt flag" "0: No compare match / No input capture occurred,1: A compare match or an input capture occurred"
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bitfld.word 0x0 0. "UIF,Update interrupt flag" "0: No update occurred.,1: Update interrupt pending. This bit is set by.."
wgroup.word 0x14++0x1
line.word 0x0 "TIM16_EGR,TIM16 event generation register"
bitfld.word 0x0 7. "BG,Break generation" "0: No action.,1: A break event is generated. MOE bit is cleared.."
bitfld.word 0x0 5. "COMG,Capture/Compare control update generation" "0: No action,1: When the CCPC bit is set it is possible to.."
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bitfld.word 0x0 1. "CC1G,Capture/Compare 1 generation" "0: No action.,1: A capture/compare event is generated on channel 1:"
bitfld.word 0x0 0. "UG,Update generation" "0: No action.,1: Reinitialize the counter and generates an update.."
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_input,TIM16 capture/compare mode register 1 [alternate]"
hexmask.long.byte 0x0 4.--7. 1. "IC1F,Input capture 1 filter"
bitfld.long 0x0 2.--3. "IC1PSC,Input capture 1 prescaler" "0: no prescaler capture is done each time an edge..,1: capture is done once every 2 events,2: capture is done once every 4 events,3: capture is done once every 8 events"
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bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.long 0x18++0x3
line.long 0x0 "TIM16_CCMR1_Output,TIM16 capture/compare mode register 1 [alternate]"
bitfld.long 0x0 16. "OC1M_1,OC1M[3]" "0,1"
bitfld.long 0x0 7. "OC1CE,Output Compare 1 clear enable" "0: tim_oc1ref is not affected by the tim_ocref_clr..,1: tim_oc1ref is cleared as soon as a High level is.."
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bitfld.long 0x0 4.--6. "OC1M,OC1M[2:0]: Output Compare 1 mode" "0: Frozen - The comparison between the output..,1: Set channel 1 to active level on match.,2: Set channel 1 to inactive level on match.,3: Toggle - tim_oc1ref toggles when..,4: Force inactive level - tim_oc1ref is forced low.,5: Force active level - tim_oc1ref is forced high.,6: PWM mode 1 - Channel 1 is active as long as..,7: PWM mode 2 - Channel 1 is inactive as long as.."
bitfld.long 0x0 3. "OC1PE,Output Compare 1 preload enable" "0: Preload register on TIMx_CCR1 disabled.,1: Preload register on TIMx_CCR1 enabled."
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bitfld.long 0x0 2. "OC1FE,Output Compare 1 fast enable" "0: CC1 behaves normally depending on counter and..,1: An active edge on the trigger input acts like a.."
bitfld.long 0x0 0.--1. "CC1S,Capture/Compare 1 selection" "0: CC1 channel is configured as output,1: CC1 channel is configured as input tim_ic1 is..,?,?"
group.word 0x20++0x1
line.word 0x0 "TIM16_CCER,TIM16 capture/compare enable register"
bitfld.word 0x0 3. "CC1NP,Capture/Compare 1 complementary output polarity" "0: tim_oc1n active high,1: tim_oc1n active low"
bitfld.word 0x0 2. "CC1NE,Capture/Compare 1 complementary output enable" "0: Off - tim_oc1n is not active. tim_oc1n level is..,1: On - tim_oc1n signal is output on the.."
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bitfld.word 0x0 1. "CC1P,Capture/Compare 1 output polarity" "0: this configuration is reserved,1: non-inverted/both edges/ The circuit is.."
bitfld.word 0x0 0. "CC1E,Capture/Compare 1 output enable" "0: Capture mode disabled / OC1 is not active (see..,1: Capture mode enabled / OC1 signal is output on.."
group.long 0x24++0x3
line.long 0x0 "TIM16_CNT,TIM16 counter"
rbitfld.long 0x0 31. "UIFCPY,UIF Copy" "0,1"
hexmask.long.word 0x0 0.--15. 1. "CNT,Counter value"
group.word 0x28++0x1
line.word 0x0 "TIM16_PSC,TIM16 prescaler"
hexmask.word 0x0 0.--15. 1. "PSC,Prescaler value"
group.long 0x2C++0x3
line.long 0x0 "TIM16_ARR,TIM16 auto-reload register"
hexmask.long.tbyte 0x0 0.--19. 1. "ARR,Auto-reload value"
group.word 0x30++0x1
line.word 0x0 "TIM16_RCR,TIM16 repetition counter register"
hexmask.word.byte 0x0 0.--7. 1. "REP,Repetition counter reload value"
group.long 0x34++0x3
line.long 0x0 "TIM16_CCR1,TIM16 capture/compare register 1"
hexmask.long.tbyte 0x0 0.--19. 1. "CCR1,Capture/Compare 1 value"
group.long 0x44++0x3
line.long 0x0 "TIM16_BDTR,TIM16 break and dead-time register"
bitfld.long 0x0 28. "BKBID,Break Bidirectional" "0: Break input tim_brk in input mode,1: Break input tim_brk in bidirectional mode"
bitfld.long 0x0 26. "BKDSRM,Break Disarm" "0: Break input tim_brk is armed,1: Break input tim_brk is disarmed"
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hexmask.long.byte 0x0 16.--19. 1. "BKF,Break filter"
bitfld.long 0x0 15. "MOE,Main output enable" "0: tim_oc1 and tim_oc1n outputs are disabled or..,1: tim_oc1 and tim_oc1n outputs are enabled if.."
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bitfld.long 0x0 14. "AOE,Automatic output enable" "0: MOE can be set only by software,1: MOE can be set by software or automatically at.."
bitfld.long 0x0 13. "BKP,Break polarity" "0: Break input tim_brk is active low,1: Break input tim_brk is active high"
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bitfld.long 0x0 12. "BKE,Break enable" "0: Break inputs (tim_brk and tim_sys_brk event)..,?"
bitfld.long 0x0 11. "OSSR,Off-state selection for Run mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
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bitfld.long 0x0 10. "OSSI,Off-state selection for Idle mode" "0: When inactive tim_oc1/tim_oc1n outputs are..,1: When inactive tim_oc1/tim_oc1n outputs are.."
bitfld.long 0x0 8.--9. "LOCK,Lock configuration" "0: LOCK OFF - No bit is write protected,1: LOCK Level 1 = DTG bits in TIMx_BDTR register..,2: LOCK Level 2 = LOCK Level 1 + CC Polarity bits..,3: LOCK Level 3 = LOCK Level 2 + CC Control bits.."
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hexmask.long.byte 0x0 0.--7. 1. "DTG,Dead-time generator setup"
group.long 0x54++0x3
line.long 0x0 "TIM16_DTR2,TIM16 timer deadtime register 2"
bitfld.long 0x0 17. "DTPE,Deadtime preload enable" "0: Deadtime value is not preloaded,1: Deadtime value preload is enabled"
bitfld.long 0x0 16. "DTAE,Deadtime asymmetric enable" "0: Deadtime on rising and falling edges are..,1: Deadtime on rising edge is defined with DTG[7:0].."
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hexmask.long.byte 0x0 0.--7. 1. "DTGF,Dead-time falling edge generator setup"
group.long 0x5C++0xF
line.long 0x0 "TIM16_TISEL,TIM16 input selection register"
hexmask.long.byte 0x0 0.--3. 1. "TI1SEL,selects tim_ti1_in[15:0] input"
line.long 0x4 "TIM16_AF1,TIM16 alternate function register 1"
bitfld.long 0x4 13. "BKCMP4P,tim_brk_cmp4 input polarity" "0: tim_brk_cmp4 input is active high,1: tim_brk_cmp4 input is active low"
bitfld.long 0x4 12. "BKCMP3P,tim_brk_cmp3 input polarity" "0: tim_brk_cmp3 input is active high,1: tim_brk_cmp3 input is active low"
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bitfld.long 0x4 11. "BKCMP2P,tim_brk_cmp2 input polarity" "0: tim_brk_cmp2 input is active high,1: tim_brk_cmp2 input is active low"
bitfld.long 0x4 10. "BKCMP1P,tim_brk_cmp1 input polarity" "0: tim_brk_cmp1 input is active high,1: tim_brk_cmp1 input is active low"
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bitfld.long 0x4 9. "BKINP,TIMx_BKIN input polarity" "0: TIMx_BKIN input is active high,1: TIMx_BKIN input is active low"
bitfld.long 0x4 8. "BKCMP8E,tim_brk_cmp8 enable" "0: tim_brk_cmp8 input disabled,1: tim_brk_cmp8 input enabled"
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bitfld.long 0x4 7. "BKCMP7E,tim_brk_cmp7 enable" "0: tim_brk_cmp7 input disabled,1: tim_brk_cmp7 input enabled"
bitfld.long 0x4 6. "BKCMP6E,tim_brk_cmp6 enable" "0: tim_brk_cmp6 input disabled,1: tim_brk_cmp6 input enabled"
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bitfld.long 0x4 5. "BKCMP5E,tim_brk_cmp5 enable" "0: tim_brk_cmp5 input disabled,1: tim_brk_cmp5 input enabled"
bitfld.long 0x4 4. "BKCMP4E,tim_brk_cmp4 enable" "0: tim_brk_cmp4 input disabled,1: tim_brk_cmp4 input enabled"
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bitfld.long 0x4 3. "BKCMP3E,tim_brk_cmp3 enable" "0: tim_brk_cmp3 input disabled,1: tim_brk_cmp3 input enabled"
bitfld.long 0x4 2. "BKCMP2E,tim_brk_cmp2 enable" "0: tim_brk_cmp2 input disabled,1: tim_brk_cmp2 input enabled"
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bitfld.long 0x4 1. "BKCMP1E,tim_brk_cmp1 enable" "0: tim_brk_cmp1 input disabled,1: tim_brk_cmp1 input enabled"
bitfld.long 0x4 0. "BKINE,TIMx_BKIN input enable" "0: TIMx_BKIN input disabled,1: TIMx_BKIN input enabled"
line.long 0x8 "TIM16_AF2,TIM16 alternate function register 2"
bitfld.long 0x8 16.--18. "OCRSEL,tim_ocref_clr source selection" "0: tim_ocref_clr0,1: tim_ocref_clr1,2: TIM16/TIM17 pins and internal signals for..,3: tim_ocref_clr3,4: tim_ocref_clr4,5: tim_ocref_clr5,6: tim_ocref_clr6,7: tim_ocref_clr7"
line.long 0xC "TIM16_OR1,TIM16 option register 1"
bitfld.long 0xC 1. "HSE32EN,HSE Divided by 32 enable" "0: HSE divided by 32 disabled,1: HSE divided by 32 enabled"
group.long 0x3DC++0x7
line.long 0x0 "TIM16_DCR,TIM16 DMA control register"
hexmask.long.byte 0x0 16.--19. 1. "DBSS,DMA burst source selection"
hexmask.long.byte 0x0 8.--12. 1. "DBL,DMA burst length"
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hexmask.long.byte 0x0 0.--4. 1. "DBA,DMA base address"
line.long 0x4 "TIM16_DMAR,TIM16/TIM17 DMA address for full transfer"
hexmask.long 0x4 0.--31. 1. "DMAB,DMA register for burst accesses"
tree.end
tree.end
tree "TSC (Touch Sensing Controller)"
base ad:0x0
tree "SEC_TSC"
base ad:0x50024000
group.long 0x0++0xB
line.long 0x0 "TSC_CR,TSC control register"
hexmask.long.byte 0x0 28.--31. 1. "CTPH,Charge transfer pulse high"
hexmask.long.byte 0x0 24.--27. 1. "CTPL,Charge transfer pulse low"
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hexmask.long.byte 0x0 17.--23. 1. "SSD,Spread spectrum deviation"
bitfld.long 0x0 16. "SSE,Spread spectrum enable" "0: Spread spectrum disabled,1: Spread spectrum enabled"
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bitfld.long 0x0 15. "SSPSC,Spread spectrum prescaler" "0: f<sub>HCLK</sub>,1: f<sub>HCLK</sub> /2"
bitfld.long 0x0 12.--14. "PGPSC,Pulse generator prescaler" "0: f<sub>HCLK</sub>,1: f<sub>HCLK</sub> /2,2: f<sub>HCLK</sub> /4,3: f<sub>HCLK</sub> /8,4: Charge transfer acquisition sequence for details,5: f<sub>HCLK</sub> /32,6: f<sub>HCLK</sub> /64,7: f<sub>HCLK</sub> /128"
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bitfld.long 0x0 5.--7. "MCV,Max count value" "0: 255,1: 511,2: 1023,3: 2047,4: 4095,5: 8191,6: 16383,7: reserved"
bitfld.long 0x0 4. "IODEF,I/O Default mode" "0: I/Os are forced to output push-pull low,1: I/Os are in input floating"
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bitfld.long 0x0 3. "SYNCPOL,Synchronization pin polarity" "0: Falling edge only,1: Rising edge and high level"
bitfld.long 0x0 2. "AM,Acquisition mode" "0: Normal acquisition mode (acquisition starts as..,1: Synchronized acquisition mode (acquisition.."
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bitfld.long 0x0 1. "START,Start a new acquisition" "0: Acquisition not started,1: Start a new acquisition"
bitfld.long 0x0 0. "TSCE,Touch sensing controller enable" "0: Touch sensing controller disabled,1: Touch sensing controller enabled"
line.long 0x4 "TSC_IER,TSC interrupt enable register"
bitfld.long 0x4 1. "MCEIE,Max count error interrupt enable" "0: Max count error interrupt disabled,1: Max count error interrupt enabled"
bitfld.long 0x4 0. "EOAIE,End of acquisition interrupt enable" "0: End of acquisition interrupt disabled,1: End of acquisition interrupt enabled"
line.long 0x8 "TSC_ICR,TSC interrupt clear register"
bitfld.long 0x8 1. "MCEIC,Max count error interrupt clear" "0: No effect,1: Clears the corresponding MCEF of the TSC_ISR.."
bitfld.long 0x8 0. "EOAIC,End of acquisition interrupt clear" "0: No effect,1: Clears the corresponding EOAF of the TSC_ISR.."
rgroup.long 0xC++0x3
line.long 0x0 "TSC_ISR,TSC interrupt status register"
bitfld.long 0x0 1. "MCEF,Max count error flag" "0: No max count error (MCE) detected,1: Max count error (MCE) detected"
bitfld.long 0x0 0. "EOAF,End of acquisition flag" "0: Acquisition is ongoing or not started,1: Acquisition is complete"
group.long 0x10++0x3
line.long 0x0 "TSC_IOHCR,TSC I/O hysteresis control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 3. "G1_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
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bitfld.long 0x0 1. "G1_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
group.long 0x18++0x3
line.long 0x0 "TSC_IOASCR,TSC I/O analog switch control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
group.long 0x20++0x3
line.long 0x0 "TSC_IOSCR,TSC I/O sampling control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
group.long 0x28++0x3
line.long 0x0 "TSC_IOCCR,TSC I/O channel control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
group.long 0x30++0x3
line.long 0x0 "TSC_IOGCSR,TSC I/O group control status register"
rbitfld.long 0x0 21. "G6S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 20. "G5S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 19. "G4S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 18. "G3S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 17. "G2S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 16. "G1S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
newline
bitfld.long 0x0 5. "G6E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 4. "G5E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
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bitfld.long 0x0 3. "G4E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 2. "G3E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
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bitfld.long 0x0 1. "G2E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 0. "G1E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
rgroup.long 0x34++0x17
line.long 0x0 "TSC_IOG1CR,TSC I/O group 1 counter register"
hexmask.long.word 0x0 0.--13. 1. "CNT,Counter value"
line.long 0x4 "TSC_IOG2CR,TSC I/O group 2 counter register"
hexmask.long.word 0x4 0.--13. 1. "CNT,Counter value"
line.long 0x8 "TSC_IOG3CR,TSC I/O group 3 counter register"
hexmask.long.word 0x8 0.--13. 1. "CNT,Counter value"
line.long 0xC "TSC_IOG4CR,TSC I/O group 4 counter register"
hexmask.long.word 0xC 0.--13. 1. "CNT,Counter value"
line.long 0x10 "TSC_IOG5CR,TSC I/O group 5 counter register"
hexmask.long.word 0x10 0.--13. 1. "CNT,Counter value"
line.long 0x14 "TSC_IOG6CR,TSC I/O group 6 counter register"
hexmask.long.word 0x14 0.--13. 1. "CNT,Counter value"
tree.end
tree "TSC"
base ad:0x40024000
group.long 0x0++0xB
line.long 0x0 "TSC_CR,TSC control register"
hexmask.long.byte 0x0 28.--31. 1. "CTPH,Charge transfer pulse high"
hexmask.long.byte 0x0 24.--27. 1. "CTPL,Charge transfer pulse low"
newline
hexmask.long.byte 0x0 17.--23. 1. "SSD,Spread spectrum deviation"
bitfld.long 0x0 16. "SSE,Spread spectrum enable" "0: Spread spectrum disabled,1: Spread spectrum enabled"
newline
bitfld.long 0x0 15. "SSPSC,Spread spectrum prescaler" "0: f<sub>HCLK</sub>,1: f<sub>HCLK</sub> /2"
bitfld.long 0x0 12.--14. "PGPSC,Pulse generator prescaler" "0: f<sub>HCLK</sub>,1: f<sub>HCLK</sub> /2,2: f<sub>HCLK</sub> /4,3: f<sub>HCLK</sub> /8,4: Charge transfer acquisition sequence for details,5: f<sub>HCLK</sub> /32,6: f<sub>HCLK</sub> /64,7: f<sub>HCLK</sub> /128"
newline
bitfld.long 0x0 5.--7. "MCV,Max count value" "0: 255,1: 511,2: 1023,3: 2047,4: 4095,5: 8191,6: 16383,7: reserved"
bitfld.long 0x0 4. "IODEF,I/O Default mode" "0: I/Os are forced to output push-pull low,1: I/Os are in input floating"
newline
bitfld.long 0x0 3. "SYNCPOL,Synchronization pin polarity" "0: Falling edge only,1: Rising edge and high level"
bitfld.long 0x0 2. "AM,Acquisition mode" "0: Normal acquisition mode (acquisition starts as..,1: Synchronized acquisition mode (acquisition.."
newline
bitfld.long 0x0 1. "START,Start a new acquisition" "0: Acquisition not started,1: Start a new acquisition"
bitfld.long 0x0 0. "TSCE,Touch sensing controller enable" "0: Touch sensing controller disabled,1: Touch sensing controller enabled"
line.long 0x4 "TSC_IER,TSC interrupt enable register"
bitfld.long 0x4 1. "MCEIE,Max count error interrupt enable" "0: Max count error interrupt disabled,1: Max count error interrupt enabled"
bitfld.long 0x4 0. "EOAIE,End of acquisition interrupt enable" "0: End of acquisition interrupt disabled,1: End of acquisition interrupt enabled"
line.long 0x8 "TSC_ICR,TSC interrupt clear register"
bitfld.long 0x8 1. "MCEIC,Max count error interrupt clear" "0: No effect,1: Clears the corresponding MCEF of the TSC_ISR.."
bitfld.long 0x8 0. "EOAIC,End of acquisition interrupt clear" "0: No effect,1: Clears the corresponding EOAF of the TSC_ISR.."
rgroup.long 0xC++0x3
line.long 0x0 "TSC_ISR,TSC interrupt status register"
bitfld.long 0x0 1. "MCEF,Max count error flag" "0: No max count error (MCE) detected,1: Max count error (MCE) detected"
bitfld.long 0x0 0. "EOAF,End of acquisition flag" "0: Acquisition is ongoing or not started,1: Acquisition is complete"
group.long 0x10++0x3
line.long 0x0 "TSC_IOHCR,TSC I/O hysteresis control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy Schmitt trigger hysteresis mode  x = 8 to 1  y = 4 to 1." "0: Gx_IOy Schmitt trigger hysteresis disabled,1: Gx_IOy Schmitt trigger hysteresis enabled"
group.long 0x18++0x3
line.long 0x0 "TSC_IOASCR,TSC I/O analog switch control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 21. "G6_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 19. "G5_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 17. "G5_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 15. "G4_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 13. "G4_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 11. "G3_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 9. "G3_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 7. "G2_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 5. "G2_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 3. "G1_IO4,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
newline
bitfld.long 0x0 1. "G1_IO2,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy analog switch enable" "0: Gx_IOy analog switch disabled (opened),1: Gx_IOy analog switch enabled (closed)"
group.long 0x20++0x3
line.long 0x0 "TSC_IOSCR,TSC I/O sampling control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 3. "G1_IO4,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
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bitfld.long 0x0 1. "G1_IO2,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy sampling mode" "0: Gx_IOy unused,1: Gx_IOy used as sampling capacitor"
group.long 0x28++0x3
line.long 0x0 "TSC_IOCCR,TSC I/O channel control register"
bitfld.long 0x0 23. "G6_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 22. "G6_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 21. "G6_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 20. "G6_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 19. "G5_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 18. "G5_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 17. "G5_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 16. "G5_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 15. "G4_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 14. "G4_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 13. "G4_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 12. "G4_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 11. "G3_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 10. "G3_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 9. "G3_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 8. "G3_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 7. "G2_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 6. "G2_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 5. "G2_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 4. "G2_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 3. "G1_IO4,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 2. "G1_IO3,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
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bitfld.long 0x0 1. "G1_IO2,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
bitfld.long 0x0 0. "G1_IO1,Gx_IOy channel mode" "0: Gx_IOy unused,1: Gx_IOy used as channel"
group.long 0x30++0x3
line.long 0x0 "TSC_IOGCSR,TSC I/O group control status register"
rbitfld.long 0x0 21. "G6S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 20. "G5S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 19. "G4S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 18. "G3S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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rbitfld.long 0x0 17. "G2S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
rbitfld.long 0x0 16. "G1S,Analog I/O group x status" "0: Acquisition on analog I/O group x is ongoing or..,1: Acquisition on analog I/O group x is complete"
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bitfld.long 0x0 5. "G6E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 4. "G5E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
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bitfld.long 0x0 3. "G4E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 2. "G3E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
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bitfld.long 0x0 1. "G2E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
bitfld.long 0x0 0. "G1E,Analog I/O group x enable" "0: Acquisition on analog I/O group x disabled,1: Acquisition on analog I/O group x enabled"
rgroup.long 0x34++0x17
line.long 0x0 "TSC_IOG1CR,TSC I/O group 1 counter register"
hexmask.long.word 0x0 0.--13. 1. "CNT,Counter value"
line.long 0x4 "TSC_IOG2CR,TSC I/O group 2 counter register"
hexmask.long.word 0x4 0.--13. 1. "CNT,Counter value"
line.long 0x8 "TSC_IOG3CR,TSC I/O group 3 counter register"
hexmask.long.word 0x8 0.--13. 1. "CNT,Counter value"
line.long 0xC "TSC_IOG4CR,TSC I/O group 4 counter register"
hexmask.long.word 0xC 0.--13. 1. "CNT,Counter value"
line.long 0x10 "TSC_IOG5CR,TSC I/O group 5 counter register"
hexmask.long.word 0x10 0.--13. 1. "CNT,Counter value"
line.long 0x14 "TSC_IOG6CR,TSC I/O group 6 counter register"
hexmask.long.word 0x14 0.--13. 1. "CNT,Counter value"
tree.end
tree.end
tree "USART (Universal Synchronous Asynchronous Receiver Transmitter)"
base ad:0x0
tree "SEC_USART1"
base ad:0x50013800
group.long 0x0++0x3
line.long 0x0 "USART_CR1_enabled,USART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.."
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bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
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hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
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bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
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bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
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bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
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bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
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bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
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bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0x17
line.long 0x0 "USART_CR1_disabled,USART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
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bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
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bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
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bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
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bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
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bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
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bitfld.long 0x4 12.--13. "STOP,stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
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bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
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bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
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bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set  the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
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bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time  interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
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bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 4565,?,?,7: number of automatic retransmission attempts"
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bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
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bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0xC "USART_BRR,USART baud rate register"
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
line.long 0x14 "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
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bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_enabled,USART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
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bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO not full.,1: RXFIFO Full."
newline
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO not empty.,1: TXFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_disbled,USART interrupt and status register [alternate]"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "SEC_USART2"
base ad:0x50004400
group.long 0x0++0x3
line.long 0x0 "USART_CR1_enabled,USART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0x17
line.long 0x0 "USART_CR1_disabled,USART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set  the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time  interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 4565,?,?,7: number of automatic retransmission attempts"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0xC "USART_BRR,USART baud rate register"
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
line.long 0x14 "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_enabled,USART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO not full.,1: RXFIFO Full."
newline
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO not empty.,1: TXFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_disbled,USART interrupt and status register [alternate]"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
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bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
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bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "USART1"
base ad:0x40013800
group.long 0x0++0x3
line.long 0x0 "USART_CR1_enabled,USART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0x17
line.long 0x0 "USART_CR1_disabled,USART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set  the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time  interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 4565,?,?,7: number of automatic retransmission attempts"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0xC "USART_BRR,USART baud rate register"
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
line.long 0x14 "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_enabled,USART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO not full.,1: RXFIFO Full."
newline
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO not empty.,1: TXFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_disbled,USART interrupt and status register [alternate]"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree "USART2"
base ad:0x40004400
group.long 0x0++0x3
line.long 0x0 "USART_CR1_enabled,USART control register 1 [alternate]"
bitfld.long 0x0 31. "RXFFIE,RXFIFO Full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when RXFF=1 in the.."
bitfld.long 0x0 30. "TXFEIE,TXFIFO empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFE=1 in the.."
newline
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXFNFIE,TXFIFO not full interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TXFNF =1 in.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXFNEIE,RXFIFO not empty interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
group.long 0x0++0x17
line.long 0x0 "USART_CR1_disabled,USART control register 1 [alternate]"
bitfld.long 0x0 29. "FIFOEN,FIFO mode enable" "0: FIFO mode is disabled.,1: FIFO mode is enabled."
bitfld.long 0x0 28. "M1,Word length" "0,1"
newline
bitfld.long 0x0 27. "EOBIE,End of Block interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the EOBF flag is.."
bitfld.long 0x0 26. "RTOIE,Receiver timeout interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the RTOF bit is.."
newline
hexmask.long.byte 0x0 21.--25. 1. "DEAT,Driver Enable assertion time"
hexmask.long.byte 0x0 16.--20. 1. "DEDT,Driver Enable deassertion time"
newline
bitfld.long 0x0 15. "OVER8,Oversampling mode" "0: Oversampling by 16,1: Oversampling by 8"
bitfld.long 0x0 14. "CMIE,Character match interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when the CMF bit is.."
newline
bitfld.long 0x0 13. "MME,Mute mode enable" "0: Receiver in Active mode permanently,1: Receiver can switch between Mute mode and Active.."
bitfld.long 0x0 12. "M0,Word length" "0,1"
newline
bitfld.long 0x0 11. "WAKE,Receiver wakeup method" "0: Idle line,1: Address mark"
bitfld.long 0x0 10. "PCE,Parity control enable" "0: Parity control disabled,1: Parity control enabled"
newline
bitfld.long 0x0 9. "PS,Parity selection" "0: Even parity,1: Odd parity"
bitfld.long 0x0 8. "PEIE,PE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever PE=1 in the.."
newline
bitfld.long 0x0 7. "TXEIE,Transmit data register empty" "0: Interrupt inhibited,1: USART interrupt generated whenever TXE =1 in the.."
bitfld.long 0x0 6. "TCIE,Transmission complete interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TC=1 in the.."
newline
bitfld.long 0x0 5. "RXNEIE,Receive data register not empty" "0: Interrupt inhibited,1: USART interrupt generated whenever ORE=1 or.."
bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever IDLE=1 in the.."
newline
bitfld.long 0x0 3. "TE,Transmitter enable" "0: Transmitter is disabled,1: Transmitter is enabled"
bitfld.long 0x0 2. "RE,Receiver enable" "0: Receiver is disabled,1: Receiver is enabled and begins searching for a.."
newline
bitfld.long 0x0 1. "UESM,USART enable in low-power mode" "0: USART not functional in low-power mode.,1: USART functional in low-power mode."
bitfld.long 0x0 0. "UE,USART enable" "0: USART prescaler and outputs disabled low-power..,1: USART enabled"
line.long 0x4 "USART_CR2,USART control register 2"
hexmask.long.byte 0x4 24.--31. 1. "ADD,Address of the USART node"
bitfld.long 0x4 23. "RTOEN,Receiver timeout enable" "0: Receiver timeout feature disabled.,1: Receiver timeout feature enabled."
newline
bitfld.long 0x4 21.--22. "ABRMOD,Auto baud rate mode" "0: Measurement of the start bit is used to detect..,1: Falling edge to falling edge measurement (the..,2: 0x7F frame detection.,3: 0x55 frame detection"
bitfld.long 0x4 20. "ABREN,Auto baud rate enable" "0: Auto baud rate detection is disabled.,1: Auto baud rate detection is enabled."
newline
bitfld.long 0x4 19. "MSBFIRST,Most significant bit first" "0: data is transmitted/received with data bit 0..,1: data is transmitted/received with the MSB (bit.."
bitfld.long 0x4 18. "DATAINV,Binary data inversion" "0: Logical data from the data register are..,1: Logical data from the data register are.."
newline
bitfld.long 0x4 17. "TXINV,TX pin active level inversion" "0: TX pin signal works using the standard logic..,1: TX pin signal values are inverted."
bitfld.long 0x4 16. "RXINV,RX pin active level inversion" "0: RX pin signal works using the standard logic..,1: RX pin signal values are inverted."
newline
bitfld.long 0x4 15. "SWAP,Swap TX/RX pins" "0: TX/RX pins are used as defined in standard pinout,1: The TX and RX pins functions are swapped. This.."
bitfld.long 0x4 14. "LINEN,LIN mode enable" "0: LIN mode disabled,1: LIN mode enabled"
newline
bitfld.long 0x4 12.--13. "STOP,stop bits" "0: 1 stop bit,1: 0.5 stop bit.,2: 2 stop bits,3: 1.5 stop bits"
bitfld.long 0x4 11. "CLKEN,Clock enable" "0: CK pin disabled,1: CK pin enabled"
newline
bitfld.long 0x4 10. "CPOL,Clock polarity" "0: Steady low value on CK pin outside transmission..,1: Steady high value on CK pin outside transmission.."
bitfld.long 0x4 9. "CPHA,Clock phase" "0: The first clock transition is the first data..,1: The second clock transition is the first data.."
newline
bitfld.long 0x4 8. "LBCL,Last bit clock pulse" "0: The clock pulse of the last data bit is not..,1: The clock pulse of the last data bit is output.."
bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever LBDF=1 in the.."
newline
bitfld.long 0x4 5. "LBDL,LIN break detection length" "0: 10-bit break detection,1: 11-bit break detection"
bitfld.long 0x4 4. "ADDM7,7-bit Address Detection/4-bit Address Detection" "0: 4-bit address detection,1: 7-bit address detection (in 8-bit data mode)"
newline
bitfld.long 0x4 3. "DIS_NSS,When the DIS_NSS bit is set  the NSS pin input is ignored." "0: SPI slave selection depends on NSS input pin.,1: SPI slave is always selected and NSS input pin.."
bitfld.long 0x4 0. "SLVEN,Synchronous Slave mode enable" "0: Slave mode disabled.,1: Slave mode enabled."
line.long 0x8 "USART_CR3,USART control register 3"
bitfld.long 0x8 29.--31. "TXFTCFG,TXFIFO threshold configuration" "0: TXFIFO reaches 1/8 of its depth,1: TXFIFO reaches 1/4 of its depth,2: TXFIFO reaches 1/2 of its depth,3: TXFIFO reaches 3/4 of its depth,4: TXFIFO reaches 7/8 of its depth,5: TXFIFO becomes empty,?,?"
bitfld.long 0x8 28. "RXFTIE,RXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when Receive FIFO.."
newline
bitfld.long 0x8 25.--27. "RXFTCFG,Receive FIFO threshold configuration" "0: Receive FIFO reaches 1/8 of its depth,1: Receive FIFO reaches 1/4 of its depth,2: Receive FIFO reaches 1/2 of its depth,3: Receive FIFO reaches 3/4 of its depth,4: Receive FIFO reaches 7/8 of its depth,5: Receive FIFO becomes full,?,?"
bitfld.long 0x8 24. "TCBGTIE,Transmission Complete before guard time  interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated whenever TCBGT=1 in.."
newline
bitfld.long 0x8 23. "TXFTIE,TXFIFO threshold interrupt enable" "0: Interrupt inhibited,1: USART interrupt generated when TXFIFO reaches.."
bitfld.long 0x8 17.--19. "SCARCNT,Smartcard auto-retry count" "0: retransmission disabled - No automatic..,?,?,?,4: USART implementation on page 4565,?,?,7: number of automatic retransmission attempts"
newline
bitfld.long 0x8 15. "DEP,Driver enable polarity selection" "0: DE signal is active high.,1: DE signal is active low."
bitfld.long 0x8 14. "DEM,Driver enable mode" "0: DE function is disabled.,1: DE function is enabled. The DE signal is output.."
newline
bitfld.long 0x8 13. "DDRE,DMA Disable on Reception Error" "0: DMA is not disabled in case of reception error.,1: DMA is disabled following a reception error. The.."
bitfld.long 0x8 12. "OVRDIS,Overrun Disable" "0: Overrun Error Flag ORE is set when received data..,1: Overrun functionality is disabled. If new data.."
newline
bitfld.long 0x8 11. "ONEBIT,One sample bit method enable" "0: Three sample bit method,1: One sample bit method"
bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0: Interrupt is inhibited,1: An interrupt is generated whenever CTSIF=1 in.."
newline
bitfld.long 0x8 9. "CTSE,CTS enable" "0: CTS hardware flow control disabled,1: CTS mode enabled data is only transmitted when.."
bitfld.long 0x8 8. "RTSE,RTS enable" "0: RTS hardware flow control disabled,1: RTS output enabled data is only requested when.."
newline
bitfld.long 0x8 7. "DMAT,DMA enable transmitter" "0: DMA mode is disabled for transmission,1: DMA mode is enabled for transmission"
bitfld.long 0x8 6. "DMAR,DMA enable receiver" "0: DMA mode is disabled for reception,1: DMA mode is enabled for reception"
newline
bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0: Smartcard mode disabled,1: Smartcard mode enabled"
bitfld.long 0x8 4. "NACK,Smartcard NACK enable" "0: NACK transmission in case of parity error is..,1: NACK transmission during parity error is enabled"
newline
bitfld.long 0x8 3. "HDSEL,Half-duplex selection" "0: Half-duplex mode is not selected,1: Half-duplex mode is selected"
bitfld.long 0x8 2. "IRLP,IrDA low-power" "0: Normal mode,1: Low-power mode"
newline
bitfld.long 0x8 1. "IREN,IrDA mode enable" "0: IrDA disabled,1: IrDA enabled"
bitfld.long 0x8 0. "EIE,Error interrupt enable" "0: Interrupt inhibited,1: interrupt generated when FE=1 or ORE=1 or NE=1.."
line.long 0xC "USART_BRR,USART baud rate register"
hexmask.long.word 0xC 0.--15. 1. "BRR,USART baud rate"
line.long 0x10 "USART_GTPR,USART guard time and prescaler register"
hexmask.long.byte 0x10 8.--15. 1. "GT,Guard time value"
hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value"
line.long 0x14 "USART_RTOR,USART receiver timeout register"
hexmask.long.byte 0x14 24.--31. 1. "BLEN,Block Length"
hexmask.long.tbyte 0x14 0.--23. 1. "RTO,Receiver timeout value"
wgroup.long 0x18++0x3
line.long 0x0 "USART_RQR,USART request register"
bitfld.long 0x0 4. "TXFRQ,Transmit data flush request" "0,1"
bitfld.long 0x0 3. "RXFRQ,Receive data flush request" "0,1"
newline
bitfld.long 0x0 2. "MMRQ,Mute mode request" "0,1"
bitfld.long 0x0 1. "SBKRQ,Send break request" "0,1"
newline
bitfld.long 0x0 0. "ABRRQ,Auto baud rate request" "0,1"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_enabled,USART interrupt and status register [alternate]"
bitfld.long 0x0 27. "TXFT,TXFIFO threshold flag" "0: TXFIFO does not reach the programmed threshold.,1: TXFIFO reached the programmed threshold."
bitfld.long 0x0 26. "RXFT,RXFIFO threshold flag" "0: Receive FIFO does not reach the programmed..,1: Receive FIFO reached the programmed threshold."
newline
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 24. "RXFF,RXFIFO Full" "0: RXFIFO not full.,1: RXFIFO Full."
newline
bitfld.long 0x0 23. "TXFE,TXFIFO Empty" "0: TXFIFO not empty.,1: TXFIFO empty."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXFNF,TXFIFO not full" "0: Transmit FIFO is full,1: Transmit FIFO is not full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXFNE,RXFIFO not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
rgroup.long 0x1C++0x3
line.long 0x0 "USART_ISR_disbled,USART interrupt and status register [alternate]"
bitfld.long 0x0 25. "TCBGT,Transmission complete before guard time flag" "0: Transmission is not complete or transmission is..,1: Transmission is complete successfully (before.."
bitfld.long 0x0 22. "REACK,Receive enable acknowledge flag" "0,1"
newline
bitfld.long 0x0 21. "TEACK,Transmit enable acknowledge flag" "0,1"
bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute mode" "0: Receiver in Active mode,1: Receiver in Mute mode"
newline
bitfld.long 0x0 18. "SBKF,Send break flag" "0: No break character transmitted,1: Break character transmitted"
bitfld.long 0x0 17. "CMF,Character match flag" "0: No Character match detected,1: Character match detected"
newline
bitfld.long 0x0 16. "BUSY,Busy flag" "0: USART is idle (no reception),1: Reception on going"
bitfld.long 0x0 15. "ABRF,Auto baud rate flag" "0,1"
newline
bitfld.long 0x0 14. "ABRE,Auto baud rate error" "0,1"
bitfld.long 0x0 13. "UDR,SPI slave underrun error flag" "0: No underrun error,1: underrun error"
newline
bitfld.long 0x0 12. "EOBF,End of block flag" "0: End of Block not reached,1: End of Block (number of characters) reached"
bitfld.long 0x0 11. "RTOF,Receiver timeout" "0: Timeout value not reached,1: Timeout value reached without any data reception"
newline
bitfld.long 0x0 10. "CTS,CTS flag" "0: CTS line set,1: CTS line reset"
bitfld.long 0x0 9. "CTSIF,CTS interrupt flag" "0: No change occurred on the CTS status line,1: A change occurred on the CTS status line"
newline
bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0: LIN Break not detected,1: LIN break detected"
bitfld.long 0x0 7. "TXE,Transmit data register empty" "0: Data register full,1: Data register full"
newline
bitfld.long 0x0 6. "TC,Transmission complete" "0,1"
bitfld.long 0x0 5. "RXNE,Read data register not empty" "0: Data is not received,1: Received data is ready to be read."
newline
bitfld.long 0x0 4. "IDLE,Idle line detected" "0: No Idle line is detected,1: Idle line is detected"
bitfld.long 0x0 3. "ORE,Overrun error" "0: No overrun error,1: Overrun error is detected"
newline
bitfld.long 0x0 2. "NE,Noise detection flag" "0: No noise is detected,1: Noise is detected"
bitfld.long 0x0 1. "FE,Framing error" "0: No Framing error is detected,1: Framing error or break character is detected"
newline
bitfld.long 0x0 0. "PE,Parity error" "0: No parity error,1: Parity error"
wgroup.long 0x20++0x3
line.long 0x0 "USART_ICR,USART interrupt flag clear register"
bitfld.long 0x0 17. "CMCF,Character match clear flag" "0,1"
bitfld.long 0x0 13. "UDRCF,SPI slave underrun clear flag" "0,1"
newline
bitfld.long 0x0 12. "EOBCF,End of block clear flag" "0,1"
bitfld.long 0x0 11. "RTOCF,Receiver timeout clear flag" "0,1"
newline
bitfld.long 0x0 9. "CTSCF,CTS clear flag" "0,1"
bitfld.long 0x0 8. "LBDCF,LIN break detection clear flag" "0,1"
newline
bitfld.long 0x0 7. "TCBGTCF,Transmission complete before Guard time clear flag" "0,1"
bitfld.long 0x0 6. "TCCF,Transmission complete clear flag" "0,1"
newline
bitfld.long 0x0 5. "TXFECF,TXFIFO empty clear flag" "0,1"
bitfld.long 0x0 4. "IDLECF,Idle line detected clear flag" "0,1"
newline
bitfld.long 0x0 3. "ORECF,Overrun error clear flag" "0,1"
bitfld.long 0x0 2. "NECF,Noise detected clear flag" "0,1"
newline
bitfld.long 0x0 1. "FECF,Framing error clear flag" "0,1"
bitfld.long 0x0 0. "PECF,Parity error clear flag" "0,1"
rgroup.long 0x24++0x3
line.long 0x0 "USART_RDR,USART receive data register"
hexmask.long.word 0x0 0.--8. 1. "RDR,Receive data value"
group.long 0x28++0xB
line.long 0x0 "USART_TDR,USART transmit data register"
hexmask.long.word 0x0 0.--8. 1. "TDR,Transmit data value"
line.long 0x4 "USART_PRESC,USART prescaler register"
hexmask.long.byte 0x4 0.--3. 1. "PRESCALER,Clock prescaler"
line.long 0x8 "USART_AUTOCR,USART Autonomous mode control register"
hexmask.long.byte 0x8 19.--22. 1. "TRIGSEL,Trigger selection bits"
bitfld.long 0x8 18. "IDLEDIS,Idle frame transmission disable bit after enabling the transmitter" "0: Idle frame sent after enabling the transmitter..,1: Idle frame not sent after enabling the transmitter"
newline
bitfld.long 0x8 17. "TRIGEN,Trigger enable bit" "0: Trigger disabled,1: Trigger enabled"
bitfld.long 0x8 16. "TRIGPOL,Trigger polarity bit" "0: Trigger active on rising edge,1: Trigger active on falling edge"
newline
hexmask.long.word 0x8 0.--15. 1. "TDN,TDN transmission data number"
tree.end
tree.end
tree "WWDG (System Window Watchdog)"
base ad:0x0
tree "SEC_WWDG"
base ad:0x50002C00
group.long 0x0++0xB
line.long 0x0 "WWDG_CR,WWDG control register"
bitfld.long 0x0 7. "WDGA,Activation bit" "0: Watchdog disabled,1: Watchdog enabled"
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
line.long 0x4 "WWDG_CFR,WWDG configuration register"
bitfld.long 0x4 11.--13. "WDGTB,Timer base" "0: CK counter clock (PCLK div 4096) div 1,1: CK counter clock (PCLK div 4096) div 2,2: CK counter clock (PCLK div 4096) div 4,3: CK counter clock (PCLK div 4096) div 8,4: CK counter clock (PCLK div 4096) div 16,5: CK counter clock (PCLK div 4096) div 32,6: CK counter clock (PCLK div 4096) div 64,7: CK counter clock (PCLK div 4096) div 128"
bitfld.long 0x4 9. "EWI,Early wakeup interrupt" "0,1"
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
line.long 0x8 "WWDG_SR,WWDG status register"
bitfld.long 0x8 0. "EWIF,Early wakeup interrupt flag" "0,1"
tree.end
tree "WWDG"
base ad:0x40002C00
group.long 0x0++0xB
line.long 0x0 "WWDG_CR,WWDG control register"
bitfld.long 0x0 7. "WDGA,Activation bit" "0: Watchdog disabled,1: Watchdog enabled"
hexmask.long.byte 0x0 0.--6. 1. "T,7-bit counter (MSB to LSB)"
line.long 0x4 "WWDG_CFR,WWDG configuration register"
bitfld.long 0x4 11.--13. "WDGTB,Timer base" "0: CK counter clock (PCLK div 4096) div 1,1: CK counter clock (PCLK div 4096) div 2,2: CK counter clock (PCLK div 4096) div 4,3: CK counter clock (PCLK div 4096) div 8,4: CK counter clock (PCLK div 4096) div 16,5: CK counter clock (PCLK div 4096) div 32,6: CK counter clock (PCLK div 4096) div 64,7: CK counter clock (PCLK div 4096) div 128"
bitfld.long 0x4 9. "EWI,Early wakeup interrupt" "0,1"
hexmask.long.byte 0x4 0.--6. 1. "W,7-bit window value"
line.long 0x8 "WWDG_SR,WWDG status register"
bitfld.long 0x8 0. "EWIF,Early wakeup interrupt flag" "0,1"
tree.end
tree.end
AUTOINDENT.OFF