; -------------------------------------------------------------------------------- ; @Title: SPEAR1340 On-Chip Peripherals ; @Props: Released ; @Author: MKR, ZAK ; @Changelog: 2013-01-15 ; @Manufacturer: STM - ST Microelectronics N.V. ; @Doc: DM00024168.pdf (RM0078 2012-11) ; DM00030784.pdf (RM0089 2012-11) ; @Core: Cortex-A9 ; @Chip: SPEAR1340 ; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perspear1340.per 12761 2021-01-18 10:24:52Z pegold $ config 16. 8. width 0x0b tree "Core Registers (Cortex-A9MPCore)" width 0x8 ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- tree "ID Registers" rgroup.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7" bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" textline " " bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words" rgroup.long c15:0x200++0x0 line.long 0x0 "TCMTR,Tighly-Coupled Memory Type Register" rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries" bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128" textline " " bitfld.long 0x0 0. " nU ,Unified or Separate TLBs" "Unified,Separate" rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 8.--11. " ClusterID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "0,1,2,3" rgroup.long c15:0x0410++0x00 line.long 0x00 "MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..." bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported" bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..." bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Not supported,Supported,?..." rgroup.long c15:0x0020++0x00 line.long 0x00 "ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..." tree.end width 0x8 tree "System Control and Configuration" group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 9. " PARON ,Parity On" "Disabled,Enabled" bitfld.long 0x00 8. " ALIOW ,Enable allocation in one cache way only" "Disabled,Enabled" bitfld.long 0x00 7. " EXCL ,Exclusive cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SMP ,Signals if the Cortex-A9 processor is taking part in coherency or not" "0,1" bitfld.long 0x00 3. " FOZ ,Full Of Zero mode Enable" "Disabled,Enabled" bitfld.long 0x00 2. " DP1 ,L1 Dside prefetch Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PH2 ,L2 prefetch hint Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FW ,Cache and TLB maintenance broadcast" "Disabled,Enabled" group.long c15:0x201++0x0 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full" textline " " group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 6. " nET ,Not early termination" "Not early,Early" bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,FW-bit controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" textline " " bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" textline " " bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x111++0x0 line.long 0x0 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " TL ,Lockable Page Table Entries Allocation in Nonsecure World" "Denied,Permitted" bitfld.long 0x00 16. " PLE ,NS accesses to the Preload Engine resources control" "Secure,Non-secure" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Nonsecure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Nonsecure World Access Permission" "Denied,Permitted" group.long c15:0x0311++0x00 line.long 0x00 "VCR,Virtualization Control Register" bitfld.long 0x00 8. " AMO ,Abort Mask Override" "0,1" bitfld.long 0x00 7. " IMO ,IRQ Mask Override" "0,1" bitfld.long 0x00 6. " IFO ,FIQ Mask Override" "0,1" group.long c15:0xf++0x0 line.long 0x00 "PCR,Power Control Register" bitfld.long 0x00 8.--10. " MCL ,Max Clock Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EDCG ,Enable Dynamic Clock Gating" "Disabled,Enabled" textline " " group.long c15:0x000c++0x00 line.long 0x00 "VBAR,Secure or Nonsecure Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBA ,Base Address" group.long c15:0x10c++0x00 line.long 0x0 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBA , Monitor Vector Base Address" rgroup.long c15:0x1C++0x0 line.long 0x0 "ISR,Interrupt status Register" bitfld.long 0x0 8. " A ,Pending External Abort" "Not pending,Pending" bitfld.long 0x0 7. " I ,Pending IRQ" "Not pending,Pending" bitfld.long 0x0 6. " F ,Pending FIQ" "Not pending,Pending" group.long c15:0x11c++0x0 line.long 0x00 "VIR,Virtualization Interrupt Register" bitfld.long 0x00 8. " VA ,Virtual Abort" "0,1" bitfld.long 0x00 7. " VI ,Virtual IRQ" "0,1" bitfld.long 0x00 6. " VF ,Virtual FIQ" "0,1" tree.end width 0x0d tree "Memory Management Unit" group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " NMFI ,DNonmaskable Fast Interrupt enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big" bitfld.long 0x0 14. " RR ,Replacement strategy for caches, BTAC, and micro TLBs" "Random,Round robin" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long 0x00 14.--31. 0x4000 " TTB0 ,Translation Table Base Address" bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner" textline " " bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1" bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" textline " " bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long 0x00 14.--31. 0x4000 " TTB1 ,Translation Table Base Address" bitfld.long 0x00 0. 6. " IRGN[1:0] ,Indicates inner cacheability" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 5. " NOS ,Not Outer Shareable" "Outer,Inner" textline " " bitfld.long 0x00 3.--4. " RGN ,Outer Cacheable Attributes for Page Table Walking" "Noncacheable,Back/allocated,Through,Back/not allocated" bitfld.long 0x00 2. " IMP ,Implementation Defined" "0,1" bitfld.long 0x00 1. " S ,Page Table Walk to Shared Memory" "Nonshared,Shared" textline " " bitfld.long 0x00 0. " C ,Cacheable" "Non-cacheable,Cacheable" group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 5. " PD1 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 1" "Enable,Disable" bitfld.long 0x00 4. " PD0 ,Page Table Walk on a TLB Miss When Using Translation Table Base Register 0" "Enable,Disable" bitfld.long 0x0 0.--2. " N ,Translation Table Base Register 0 page table boundary size" "Off,0x80000000,0x40000000,0x20000000,0x10000000,0x08000000,0x04000000,0x02000000" textline " " group.long c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" hexmask.long 0x00 0.--31. 1. " DFA ,Data Fault Address" group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " SD ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" hexmask.long 0x00 0.--31. 1. " IFA ,Instruction Fault Address" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" hexmask.long 0x00 0.--31. 1. " DAFS ,Data Auxiliary Fault Status" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,AuxiliaryInstruction Fault Status Register" hexmask.long 0x00 0.--31. 1. " IAFS ,Instruction Auxiliary Fault Status" textline " " group.long c15:0xa++0x0 line.long 0x0 "TLBLR,TLB Lockdown Register" bitfld.long 0x0 28.--29. " VICTIM ,Victim Value Increments after Each Tabel Walk" "0,1,2,3" bitfld.long 0x0 0. " P ,Lockdown by Victim or Set Associative Region of TLB" "Associative,Lockdown" group.long c15:0x0047++0x00 line.long 0x00 "PAR,PA Register" hexmask.long 0x00 12.--31. 0x1000 " PA ,Physical Adress" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Not secured,Secured" bitfld.long 0x00 7. " SH ,Shareable attribute" "Non-shareable,Shareable" textline " " bitfld.long 0x00 4.--6. " Inner ,Signals region inner attributes" "Noncacheable,Strongly-ordered,Reserved,Device,Reserved,Write-back allocate,Write-through,Write-back" bitfld.long 0x00 2.--3. " Outer ,Signals region outer attributes for normal memory type" "Noncacheable,Write-back allocate,Write-through,Write-back" textline " " bitfld.long 0x00 1. " SS ,Supersection Enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " F ,Translation Successful" "Successful,No successful" textline " " group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attribute 7" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attribute 6" "Outer,Inner" textline " " bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attribute 5" "Outer,Inner" bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attribute 4" "Outer,Inner" textline " " bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attribute 3" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attribute 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attribute 1" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attribute 0" "Outer,Inner" textline " " bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,?..." textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,?..." bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,?..." group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncachable,Write-back allocate,Write-through,Write-back no allocate" textline " " group.long c15:0x400f++0x0 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long 0x00 0.--31. 1. " CBA ,Configuration Base Address" textline " " rgroup.long c15:0x000d++0x00 line.long 0x00 "FCSEIDR,FCSE PID Register" hexmask.long.byte 0x00 25.--31. 0x02 " PID ,Process for Fast Context Switch Identification and Specification" group.long c15:0x10d++0x0 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x0 8.--31. 1. " PROCID ,Process ID" hexmask.long.byte 0x0 0.--7. 1. " ASID ,Application Space ID" group.long c15:0x020d++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRURW ,User Read/Write Thread ID" group.long c15:0x030d++0x00 line.long 0x00 "TPIDRURO,User Read-only Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRURO ,User Read-only Thread ID" group.long c15:0x040d++0x00 line.long 0x00 "TPIDRPRW,Privileged Only Thread ID Register" hexmask.long 0x00 0.--31. 1. " TPIDRPRW ,Privileged Only Thread ID" tree.end width 0xC tree "Cache Control and Configuration" rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" textline " " bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 18.--20. " CType7 ,Cache type for levels 7" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 15.--17. " CType6 ,Cache type for levels 6" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 12.--14. " CType5 ,Cache type for levels 5" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 9.--11. " CType4 ,Cache type for levels 4" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 6.--8. " CType3 ,Cache type for levels 3" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." textline " " bitfld.long 0x00 3.--5. " CType2 ,Cache type for levels 2" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." bitfld.long 0x00 0.--2. " CType1 ,Cache type for levels 1" "No cache,I-cache,D-cache,Separate I/D,Unified,?..." rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" textline " " bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" textline " " hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words" group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Level" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8" bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data,Instruction" tree.end width 12. tree "System Performance Monitor" group.long c15:0xC9++0x0 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled" textline " " bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset" textline " " bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled" group.long c15:0x1C9++0x0 line.long 0x0 "PMCNTENSET,Count Enable Set Register" bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled" group.long c15:0x2C9++0x0 line.long 0x0 "PMCNTENCLR,Count Enable Clear Register" bitfld.long 0x00 31. " C ,CCNT Enabled" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMN5 Enabled" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMN3 Enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMN2 Enabled" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMN1 Enabled" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMN0 Enabled" "Disabled,Enabled" group.long c15:0x3C9++0x0 line.long 0x0 "PMOVSR,Overflow Flag Status Register" eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4C9++0x0 line.long 0x0 "PMSWINC,Software Increment Register" eventfld.long 0x00 5. " P5 ,Increment PMN2" "No action,Increment" eventfld.long 0x00 4. " P4 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" textline " " eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5C9++0x0 line.long 0x0 "PMSELR,Performance Counter Selection Register" bitfld.long 0x00 0.--5. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,CNT4,CNT5,?..." group.long c15:0xD9++0x0 line.long 0x00 "PMCCNTR,Cycle Count Register" hexmask.long 0x00 0.--31. 1. " CCNT ,Cycle Count" group.long c15:0x01d9++0x00 line.long 0x00 "PMXEVTYPER,Event Type Select Register" hexmask.long.byte 0x00 0.--7. 1. " EVCNT ,Event to count" group.long c15:0x02d9++0x00 line.long 0x00 "PMXEVCNTR,Event Count Register" hexmask.long 0x00 0.--31. 1. " PMNX ,Event Count" group.long c15:0xE9++0x0 line.long 0x0 "PMUSERENR,User Enable Register" bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled" group.long c15:0x1E9++0x0 line.long 0x0 "PMINTENSET,Interrupt Enable Set Register" bitfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2E9++0x0 line.long 0x0 "PMINTENCLR,Interrupt Enable Clear Register" eventfld.long 0x00 31. " C ,CCNT Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" tree.end width 8. tree "Preload Engine" rgroup.long c15:0x000b++0x00 line.long 0x00 "PLEIDR,PLE ID Register" bitfld.long 0x00 16.--20. " FIFOS ,PLE FIFO size" "Not present,Reserved,Reserved,Reserved,4,Reserved,Reserved,Reserved,8,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,?..." bitfld.long 0x00 0. " PEP ,Preload Engine presence" "Not present,Present" rgroup.long c15:0x020b++0x00 line.long 0x00 "PLEASR,PLE Activity Status Register" bitfld.long 0x00 0. " R ,PLE Channel running" "Not running,Running" rgroup.long c15:0x040b++0x00 line.long 0x00 "PLEFSR,PLE FIFO Status Register" bitfld.long 0x00 0.--4. " AE ,Number of available entries in the PLE FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x001b++0x00 line.long 0x00 "PLEUAR,Preload Engine User Accessibility Register" bitfld.long 0x00 0. " U ,User accessibility" "Not permited,Permited" group.long c15:0x011b++0x00 line.long 0x00 "PLEPCR,Preload Engine Parameters Control Register" hexmask.long.word 0x00 16.--29. 1. " BSM ,Block size mask" hexmask.long.byte 0x00 8.--15. 1. " BNM ,Block number mask" hexmask.long.byte 0x00 0.--7. 1. " WS ,PLE wait states" tree.end tree "NEON" rgroup.long c15:0x000f++0x00 line.long 0x00 "NEON,NEON busy Register" bitfld.long 0x00 0. " Busy ,NEON busy" "Not busy,Busy" tree.end width 0xb width 9. tree "Debug Registers" tree "Jazelle Register" group.long c14:0x7000++0x0 line.long 0x00 "JIDR,Jazelle ID Register" bitfld.long 0x00 28.--31. " ARCH ,Architecture code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 20.--27. 1. " DESIGN ,Implementor code of the designer of the subarchitecture" textline " " hexmask.long.byte 0x00 12.--19. 1. " SAMAJ ,The subarchitecture code" bitfld.long 0x00 8.--11. " SAMIN ,The subarchitecture minor code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 6. " TRTBFR ,Format of the Jazelle Configurable Opcode Translation Table Register" "0,1" bitfld.long 0x00 0.--5. " TRTBSZ ,Size of the Jazelle Configurable Opcode Translation Table Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long c14:0x7001++0x0 line.long 0x00 "JOSCR,Jazelle OS Control Register" bitfld.long 0x00 1. " CV ,Configuration Valid" "Not valid,Valid" bitfld.long 0x00 0. " CD ,Configuration Disabled" "No,Yes" group.long c14:0x7002++0x0 line.long 0x00 "JMCR,Jazelle Main Configuration Register" bitfld.long 0x00 31. " nAR ,Not Array Operations" "Disabled,Enabled" bitfld.long 0x00 30. " FP ,Floating-point opcodes handler" "VM implementation,VFP instructions" bitfld.long 0x00 29. " AP ,Array Pointer" "Handler,Pointer" textline " " bitfld.long 0x00 28. " OP ,Object Pointer" "Handler,Pointer" bitfld.long 0x00 27. " IS ,Index Size" "8 bits,16 bits" bitfld.long 0x00 26. " SP ,Static Pointer" "Handler,Pointer" textline " " bitfld.long 0x00 0. " JE ,Jazelle Enable" "Disabled,Enabled" group.long c14:0x7003++0x0 line.long 0x00 "JPR,Jazelle Parameters Register" bitfld.long 0x00 17.--21. " BSH ,Bounds SHift" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 12.--16. " sADO ,Signed Array Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--11. " ARO ,Array Reference Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " STO ,STatic Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " ODO ,Object Descriptor Offset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long c14:0x7004++0x0 line.long 0x00 "JCOTTRR,Jazelle Configurable Opcode Translation Table Register" bitfld.long 0x00 10.--15. " OPCODE ,Bottom bits of the configurable opcode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--3. " OPERATION ,Code for the operation" "0,1,2,3,4,5,6,7,8,9,?..." tree.end width 11. tree "Processor Identifier Registers" rgroup c14:0x340--0x340 line.long 0x00 "CPUID,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number" textline " " hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" textline " " hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision" rgroup c14:0x341--0x341 line.long 0x00 "CACHETYPE,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7" bitfld.long 0x0 24.--27. " CWG ,Cache Writeback Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " DMinLine ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." textline " " bitfld.long 0x00 14.--15. " L1_Ipolicy ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " IMinLine ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..." rgroup c14:0x343--0x343 line.long 0x00 "TLBTYPE,TLB Type Register" hexmask.long.byte 0x0 16.--23. 0x1 " ILsize ,Specifies the number of instruction TLB lockable entries" hexmask.long.byte 0x0 8.--15. 0x1 " DLsize ,Specifies the number of unified or data TLB lockable entries" textline " " bitfld.long 0x0 1. " TLB_size ,TLB Size" "64,128" bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate" rgroup c14:0x348--0x348 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " State3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " State2 ,Java Extension Interface Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " State1 ,Thumb Encoding Supported by the Processor Type" "Not supported,Supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " State0 ,ARM Instruction Set Support" "Not supported,Supported,?..." rgroup c14:0x349--0x349 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Not supported,Supported,?..." rgroup c14:0x34a--0x34a line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Not supported,Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,Reserved,Reserved,v6.1,v7,?..." bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,Reserved,v6,v6.1,v7,?..." rgroup c14:0x34c--0x34c line.long 0x00 "ID_MMFR0,Processor Feature Register 0" bitfld.long 0x00 28.--31. " ISB ,Innermost shareability bits" "Non-cacheable,Hardware coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " ARS ,Auxiliary Registers Support" "Not supported,Control only,Fault status and Control,?..." bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,IMPLEMENTATION DEFINED,?..." textline " " bitfld.long 0x00 12.--15. " SLS ,Shareability levels Support" "One level,Two levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outermost shareability Support" "Non-cacheable,Supported,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,IMPLEMENTATION DEFINED,PMSAv6,PMSAv7,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Not supported,IMPLEMENTATION DEFINED,VMSAv6,VMSAv7,?..." rgroup c14:0x34d--0x34d line.long 0x00 "ID_MMFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Disabled,Required,Required,Required,Not required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." rgroup c14:0x34e--0x34e line.long 0x00 "ID_MMFR2,Processor Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,Supported,?..." rgroup c14:0x34f--0x34f line.long 0x00 "ID_MMFR3,Processor Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Invalidate broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." rgroup c14:0x350--0x350 line.long 0x00 "ID_ISAR0,ISA Feature Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,Supported,?..." rgroup c14:0x351--0x351 line.long 0x00 "ID_ISAR1,ISA Feature Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Not supported,Supported,?..." rgroup c14:0x352--0x352 line.long 0x00 "ID_ISAR2,ISA Feature Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Not supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,Supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Not supported,Supported,?..." rgroup c14:0x353--0x353 line.long 0x00 "ID_ISAR3,ISA Feature Register 3" bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Not supported,Supported,?..." rgroup c14:0x354--0x354 line.long 0x00 "ID_ISAR4,ISA Feature Register 4" bitfld.long 0x00 28.--31. " SWP_frac ,SWAP_frac" "Not supported,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Not supported,Reserved,Reserved,Supported,?..." bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Not supported,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Not supported,Supported,Supported,Supported,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Not supported,Supported,Supported,?..." tree.end tree "Coresight Management Registers" width 0xC textline " " group c14:0x3c0--0x3c0 line.long 0x0 "ITCTRL,Integration Mode Control Register" bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group c14:0x3e8--0x3e8 line.long 0x0 "CLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set" group c14:0x3e9--0x3e9 line.long 0x0 "CLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared" textline " " bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared" bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared" textline " " bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared" wgroup c14:0x3ec--0x3ec line.long 0x0 "LAR,Lock Access Register" hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key" rgroup c14:0x3ed--0x3ed line.long 0x0 "LSR,Lock Status Register" bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed" bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored" textline " " bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required" width 0xc rgroup c14:0x3ee--0x3ee line.long 0x0 "AUTHSTATUS,Authentication Status Register" bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented" bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented" bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented" bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented" bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled" width 0xc rgroup c14:0x3f2--0x3f2 line.long 0x0 "DEVID,Device Identifier" bitfld.long 0x00 0.--3. " PCSAMPLE ,Level of Program Counter sampling support (DBGPCSR and DBGCIDSR)" "Not implemented,DBGPCSR,Both,?..." rgroup c14:0x3f3--0x3f3 line.long 0x0 "DEVTYPE,Device Type" hexmask.long.byte 0x0 4.--7. 1. " STPC ,Sub Type: Processor Core" hexmask.long.byte 0x0 0.--3. 1. " MCDL ,Main Class: Debug Logic" rgroup c14:0x3f8--0x3f8 line.long 0x0 "PID0,Peripherial ID0" hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]" rgroup c14:0x3f9--0x3f9 line.long 0x0 "PID1,Peripherial ID1" hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]" hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]" rgroup c14:0x3fa--0x3fa line.long 0x0 "PID2,Peripherial ID2" hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " JEPCD ,JEP 106 ID code" "Not used,Used" textline " " hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]" rgroup c14:0x3fb--0x3fb line.long 0x0 "PID3,Peripherial ID3" hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd" hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified" rgroup c14:0x3f4--0x3f4 line.long 0x0 "PID4,Peripherial ID4" bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768" bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" rgroup c14:0x3fc--0x3fc line.long 0x0 "COMPONENTID0,Component ID0" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" rgroup c14:0x3fd--0x3fd line.long 0x0 "COMPONENTID1,Component ID1" hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)" hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble" rgroup c14:0x3fe--0x3fe line.long 0x0 "COMPONENTID2,Component ID2" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" rgroup c14:0x3ff--0x3ff line.long 0x0 "COMPONENTID3,Component ID3" hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble" tree.end textline " " width 0x7 rgroup c14:0x000--0x000 line.long 0x0 "DIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x0 16.--19. " Version ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,ARMv7 no ext.,?..." textline " " bitfld.long 0x0 15. " DEVID_IMP ,Debug Device ID Register DBGDEVID implemented" "Not implemented,Implemented" bitfld.long 0x0 14. " NSUHD_IMP ,Secure User halting debug implemented" "Not implemented,Implemented" textline " " bitfld.long 0x0 13. " PCSR_IMP ,Program Counter Sampling Register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE_IMP ,Security Extensions implemented" "Not implemented,Implemented" textline " " bitfld.long 0x0 4.--7. " Variant ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " Revision ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x7 group c14:0x22--0x22 line.long 0x0 "DSCR,Debug Status and Control Register" bitfld.long 0x0 30. " DTRRXfull ,The DTRRX Full Flag" "Empty,Full" bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full" textline " " bitfld.long 0x00 27. " DTRRXfull_l ,The DTRRX Full Flag 1" "Empty,Full" bitfld.long 0x00 26. " DTRTXfull_l ,The DTRTX Full Flag 1" "Empty,Full" textline " " bitfld.long 0x0 25. " PIPEADV ,Sticky Pipeline Advance" "No effect,Instruction retired" bitfld.long 0x0 24. " INSTRCOMPL_L ,Latched Instruction Complete" "Executing,Not executing" textline " " bitfld.long 0x0 20.--21. " EXTDCCMODE ,External DCC access mode" "Non-blocking,Stall,Fast,?..." bitfld.long 0x0 19. " ADADISCARD ,Asynchronous Data Aborts Discarded" "Not discarded,Discarded" textline " " bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured" bitfld.long 0x0 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disabled" "No,Yes" textline " " bitfld.long 0x0 16. " SPIDDIS ,Secure Privileged Invasive Debug Disabled" "No,Yes" bitfld.long 0x0 15. " MDBGEN ,Monitor Debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0 14. " HDEn ,Halting Debug-mode enable" "Disabled,Enabled" bitfld.long 0x0 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " UDCCDIS ,User mode access to Comms Channel disable" "No,Yes" bitfld.long 0x0 11. " IntDis ,Disable Interrupts" "No,Yes" textline " " bitfld.long 0x0 10. " DbgAck ,Force Debug Acknowledge" "Not forced,Forced" bitfld.long 0x0 8. " UND_l ,Sticky Undefined Instruction" "No exception,Exception" textline " " bitfld.long 0x0 7. " ADABORT_l ,Sticky Asynchronous Data Abort" "Not aborted,Aborted" bitfld.long 0x0 6. " SDABORT_l ,Sticky Synchronous Data Abort" "Not aborted,Aborted" textline " " bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Halt request,Breakpoint,Asynchronous Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited" textline " " bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state" width 0x7 if (((data.long(c14:0x00))&0x01000)==0x00000) group c14:0x007--0x007 line.long 0x0 "VCR,Vector Catch Register" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled" bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" else group c14:0x007--0x007 line.long 0x0 "VCR,Vector Catch Register" bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled" bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled" bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled" bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled" bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled" textline " " bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled" bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled" bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled" bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled" endif ;rgroup c14:0x1++0x1 ; line.long 0x0 "DRAR,Debug ROM Address Register" ; hexmask.long 0x0 12.--31. 0x1000 " DBROMPA ,Debug bus ROM physical address" ; bitfld.long 0x0 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid" ; line.long 0x4 "DSAR,Debug Self Address Offset Register" ; hexmask.long 0x4 12.--31. 0x1000 " DBSAOV ,Debug bus self-address offset value" ; bitfld.long 0x4 0.--1. " VB ,Valid bits" "Not valid,Reserved,Reserved,Valid" ;hgroup c14:0x50++0x0 ; hide.long 0x0 "DTR,Data Transfer Register" ; in width 0x7 hgroup c14:0x020--0x020 hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register" in group c14:0x023--0x023 line.long 0x0 "DTRTX,Host -> Target Data Transfer Register" hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data" wgroup c14:0x21++0x00 line.long 0x00 "ITR,Instruction Transfer Register" hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute" wgroup c14:0x24++0x00 line.long 0x00 "DRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBIUR , Cancel Bus Interface Unit Requests" "Not canceled,Canceled" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared" textline " " bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared" bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested" rgroup c14:0xc4++0x00 line.long 0x00 "PRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 2. " HNDLR ,Hold non-debug logic reset" "No reset,Reset" bitfld.long 0x00 1. " WRR ,Warm reset request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high" hgroup c14:0xc5++0x00 hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register" in tree.end width 6. tree "Breakpoint Registers" group c14:0x40++0x00 line.long 0x00 "BVR0,Breakpoint Value Register 0" hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0" group c14:0x50++0x00 line.long 0x00 "BCR0,Breakpoint Control Register 0" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x41++0x00 line.long 0x00 "BVR1,Breakpoint Value Register 1" hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1" group c14:0x51++0x00 line.long 0x00 "BCR1,Breakpoint Control Register 1" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x42++0x00 line.long 0x00 "BVR2,Breakpoint Value Register 2" hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2" group c14:0x52++0x00 line.long 0x00 "BCR2,Breakpoint Control Register 2" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x43++0x00 line.long 0x00 "BVR3,Breakpoint Value Register 3" hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3" group c14:0x53++0x00 line.long 0x00 "BCR3,Breakpoint Control Register 3" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x44++0x00 line.long 0x00 "BVR4,Breakpoint Value Register 4" hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4" group c14:0x54++0x00 line.long 0x00 "BCR4,Breakpoint Control Register 4" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" group c14:0x45++0x00 line.long 0x00 "BVR5,Breakpoint Value Register 5" hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5" group c14:0x55++0x00 line.long 0x00 "BCR5,Breakpoint Control Register 5" bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked context ID,Linked context ID,IVA mismatch,Linked IVA mismatch,?..." bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x00 14.--15. " SSAC ,Secure state access control" "Both,Nonsecure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" bitfld.long 0x00 1.--2. " SP ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any" bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled" tree.end width 6. tree "Watchpoint Control Registers" group c14:0x60++0x00 line.long 0x00 "WVR0,Watchpoint Value Register 0" hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0" group c14:0x70--0x70 line.long 0x0 "WCR0,Watchpoint Control Register 0" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x61++0x00 line.long 0x00 "WVR1,Watchpoint Value Register 1" hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1" group c14:0x71--0x71 line.long 0x0 "WCR1,Watchpoint Control Register 1" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x62++0x00 line.long 0x00 "WVR2,Watchpoint Value Register 2" hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2" group c14:0x72--0x72 line.long 0x0 "WCR2,Watchpoint Control Register 2" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x63++0x00 line.long 0x00 "WVR3,Watchpoint Value Register 3" hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3" group c14:0x73--0x73 line.long 0x0 "WCR3,Watchpoint Control Register 3" bitfld.long 0x0 24.--28. " BAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled" textline " " bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..." textline " " bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " L/S ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" group c14:0x006--0x006 line.long 0x0 "WFAR,Watchpoint Fault Address Register" hexmask.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction" tree.end width 0xb width 9. base ad:(d.l(c15:0x400f)) tree "Snoop Control Unit (SCU)" group.long 0x00++0x03 line.long 0x00 "SCUCR,SCU Control Register" bitfld.long 0x00 6. " ICSE ,IC standby enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCUSE ,SCU standby enable" "Disabled,Enabled" bitfld.long 0x00 4. " FADTP0E ,Force all Device to port0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SCUSLE ,SCU Speculative linefills enable" "Disabled,Enabled" bitfld.long 0x00 2. " SCURPE ,SCU RAMs Parity enable" "Disabled,Enabled" bitfld.long 0x00 1. " AFE ,Address filtering enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SCUE ,SCU enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SCUCON,SCU Configuration Register" bitfld.long 0x00 14.--15. " RAM3 ,Cortex-A9 CPU3 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 12.--13. " RAM2 ,Cortex-A9 CPU2 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 10.--11. " RAM1 ,Cortex-A9 CPU1 Tag RAM Size" "16KB,32KB,64KB,?..." textline " " bitfld.long 0x00 8.--9. " RAM0 ,Cortex-A9 CPU0 Tag RAM Size" "16KB,32KB,64KB,?..." bitfld.long 0x00 7. " MOD3 ,CPU3 Mode" "AMP,SMP" bitfld.long 0x00 6. " MOD2 ,CPU2 Mode" "AMP,SMP" textline " " bitfld.long 0x00 5. " MOD1 ,CPU1 Mode" "AMP,SMP" bitfld.long 0x00 4. " MOD0 ,CPU0 Mode" "AMP,SMP" bitfld.long 0x00 0.--1. " NUM ,CPU Number" "CPU0,CPU0-CPU1,CPU0-CPU2,CPU0-CPU3" group.long 0x08++0x03 line.long 0x00 "SCUSTAT,SCU CPU Power Status Register" bitfld.long 0x00 24.--25. " STAT3 ,CPU3 Status" "Normal,Reserved,Dormant,Powered-off" bitfld.long 0x00 16.--17. " STAT2 ,CPU2 Status" "Normal,Reserved,Dormant,Powered-off" textline " " bitfld.long 0x00 8.--9. " STAT1 ,CPU1 Status" "Normal,Reserved,Dormant,Powered-off" bitfld.long 0x00 0.--1. " STAT0 ,CPU0 Status" "Normal,Reserved,Dormant,Powered-off" wgroup.long 0x0c++0x03 line.long 0x00 "INV,SCU Invalidate All Register" bitfld.long 0x00 12.--15. " WAY3 ,Cortex-A9 CPU3 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " WAY2 ,Cortex-A9 CPU2 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " WAY1 ,Cortex-A9 CPU1 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0.--3. " WAY0 ,Cortex-A9 CPU0 Invalidated Ways" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x40++0x03 line.long 0x00 "FSAR,Filtering Start Address Register" hexmask.long.word 0x00 20.--31. 0x10 " FSA ,Filtering start address" group.long 0x44++0x03 line.long 0x00 "FEAR,Filtering End Address Register" hexmask.long.word 0x00 20.--31. 0x10 " FEA ,Filtering end address" group.long 0x50++0x03 line.long 0x00 "SAC,SCU Access Control Register" bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access" bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access" bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access" textline " " bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access" group.long 0x54++0x03 line.long 0x00 "SSAC,SCU Secure Access Control Register" bitfld.long 0x00 11. " GCPU3 ,Global timer for CPU3" "Secure only,Secure/Non-secure" bitfld.long 0x00 10. " GCPU2 ,Global timer for CPU2" "Secure only,Secure/Non-secure" bitfld.long 0x00 9. " GCPU1 ,Global timer for CPU1" "Secure only,Secure/Non-secure" textline " " bitfld.long 0x00 8. " GCPU0 ,Global timer for CPU0" "Secure only,Secure/Non-secure" bitfld.long 0x00 7. " TCPU3 ,Private timer for CPU3 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 6. " TCPU2 ,Private timer for CPU2 Access" "Secure only,Secure/Non-secure" textline " " bitfld.long 0x00 5. " TCPU1 ,Private timer for CPU1 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 4. " TCPU0 ,Private timer for CPU0 Access" "Secure only,Secure/Non-secure" bitfld.long 0x00 3. " CPU3 ,CPU3 Access the SAC" "No access,Access" textline " " bitfld.long 0x00 2. " CPU2 ,CPU2 Access the SAC" "No access,Access" bitfld.long 0x00 1. " CPU1 ,CPU1 Access the SAC" "No access,Access" bitfld.long 0x00 0. " CPU0 ,CPU0 Access the SAC" "No access,Access" tree.end width 0xb width 8. tree "Timer and Watchdog Blocks" base ad:(d.l(c15:0x400f))+0x600 group.long 0x00++0xb "Timer" line.long 0x00 "TLR,Timer Load Register" line.long 0x04 "TCR,Timer Counter Register" line.long 0x08 "TCONR,Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled" bitfld.long 0x08 1. " AREL ,Auto reload" "Single shot,Auto-reload" bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled" group.long 0x0c++0x3 line.long 0x00 "TISR,Timer Interrupt Status Register" eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1" group.long 0x20++0x13 "Watchdog" line.long 0x00 "WLR,Watchdog Load Register" line.long 0x04 "WCR,Watchdog Counter Register" line.long 0x08 "WCONR,Watchdog Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 3. " WDM ,WD Mode" "Timer,Watchdog" bitfld.long 0x08 2. " ITEN ,IT Enable" "Disabled,Enabled" bitfld.long 0x08 1. " AREL ,Auto-Reload" "Single shot,Auto-reload" textline " " bitfld.long 0x08 0. " WEN ,Watchdog Enable" "Disabled,Enabled" line.long 0x0c "WISR,Watchdog Interrupt Status Register" eventfld.long 0x0C 0. " EFLAG ,Event Flag" "0,1" line.long 0x10 "WRSR,Watchdog Reset Sent Register" eventfld.long 0x10 0. " RFLAG ,Reset Flag" "No effect,Reset" wgroup.long 0x34++0x3 line.long 0x00 "WDR,Watchdog Disable Register" base ad:(d.l(c15:0x400f))+0x200 group.long 0x00++0xb "Global Timer" line.long 0x00 "GTLCR,Lower 32-bit Timer Counter Register" line.long 0x04 "GTUCR,Upper 32-bit Timer Counter Register" line.long 0x08 "GTCONR,Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRES ,Prescaler" bitfld.long 0x08 3. " AINC ,Auto Increment" "Single shot,Auto increment" bitfld.long 0x08 2. " IRQEN ,IRQ Enable" "Disabled,Enabled" bitfld.long 0x08 1. " COMPEN ,Comp Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " TEN ,Global Timer Enable" "Disabled,Enabled" group.long 0x0c++0x3 line.long 0x00 "GTSR,Timer Status Register" eventfld.long 0x00 0. " EFLAG ,Event Flag" "0,1" group.long 0x10++0xb line.long 0x00 "GTLCOMR,Lower 32-bit Comparator Register" line.long 0x04 "GTUCOMR,Upper 32-bit Comparator Register" line.long 0x08 "GTINCR,Auto-increment Register for Comparator" tree.end width 11. tree.open "Interrupt Controller (PL-390)" width 17. base AD:0xec801000 tree "Distributor Interface" if (((d.l(AD:0xec801000+0x04))&0x400)==0x400) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((d.l(AD:0xec801000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." hexmask.long.word 0x00 12.--23. 1. " REV_NUM ,Returns the revision number of the GIC" textline " " hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else hgroup.long 0x0084++0x03 hide.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else hgroup.long 0x0088++0x03 hide.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else hgroup.long 0x008C++0x03 hide.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else hgroup.long 0x0090++0x03 hide.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else hgroup.long 0x0094++0x03 hide.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else hgroup.long 0x0098++0x03 hide.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else hgroup.long 0x009C++0x03 hide.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else hgroup.long 0x00A0++0x03 hide.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else hgroup.long 0x00A4++0x03 hide.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else hgroup.long 0x00A8++0x03 hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else hgroup.long 0x00AC++0x03 hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else hgroup.long 0x00B0++0x03 hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else hgroup.long 0x00B4++0x03 hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else hgroup.long 0x00B8++0x03 hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else hgroup.long 0x00BC++0x03 hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else hgroup.long 0x00C0++0x03 hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else hgroup.long 0x00C4++0x03 hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else hgroup.long 0x00C8++0x03 hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else hgroup.long 0x00CC++0x03 hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else hgroup.long 0x00D0++0x03 hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else hgroup.long 0x00D4++0x03 hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else hgroup.long 0x00D8++0x03 hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else hgroup.long 0x00DC++0x03 hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else hgroup.long 0x0E0++0x03 hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else hgroup.long 0x00E4++0x03 hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else hgroup.long 0x00E8++0x03 hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else hgroup.long 0x00EC++0x03 hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else hgroup.long 0x0F0++0x03 hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else hgroup.long 0x00F4++0x03 hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else hgroup.long 0x00F8++0x03 hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else hgroup.long 0x00FC++0x03 hide.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else hgroup.long 0x0104++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else hgroup.long 0x0108++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else hgroup.long 0x010C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else hgroup.long 0x0110++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else hgroup.long 0x0114++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else hgroup.long 0x0118++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else hgroup.long 0x011C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else hgroup.long 0x0120++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else hgroup.long 0x0124++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else hgroup.long 0x0128++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else hgroup.long 0x012C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else hgroup.long 0x0130++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else hgroup.long 0x0134++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else hgroup.long 0x0138++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else hgroup.long 0x013C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else hgroup.long 0x0140++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else hgroup.long 0x0144++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else hgroup.long 0x0148++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else hgroup.long 0x014C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else hgroup.long 0x0150++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else hgroup.long 0x0154++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else hgroup.long 0x0158++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else hgroup.long 0x015C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else hgroup.long 0x0160++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else hgroup.long 0x0164++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else hgroup.long 0x0168++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else hgroup.long 0x016C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else hgroup.long 0x0170++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else hgroup.long 0x0174++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else hgroup.long 0x0178++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else hgroup.long 0x017C++0x03 hide.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Disabled,Enabled" if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Disabled,Enabled" else hgroup.long 0x0204++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Disabled,Enabled" else hgroup.long 0x0208++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Disabled,Enabled" else hgroup.long 0x020C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Disabled,Enabled" else hgroup.long 0x0210++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Disabled,Enabled" else hgroup.long 0x0214++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Disabled,Enabled" else hgroup.long 0x0218++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Disabled,Enabled" else hgroup.long 0x021C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Disabled,Enabled" else hgroup.long 0x0220++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Disabled,Enabled" else hgroup.long 0x0224++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Disabled,Enabled" else hgroup.long 0x0228++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Disabled,Enabled" else hgroup.long 0x022C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Disabled,Enabled" else hgroup.long 0x0230++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Disabled,Enabled" else hgroup.long 0x0234++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Disabled,Enabled" else hgroup.long 0x0238++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Disabled,Enabled" else hgroup.long 0x023C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Disabled,Enabled" else hgroup.long 0x0240++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Disabled,Enabled" else hgroup.long 0x0244++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Disabled,Enabled" else hgroup.long 0x0248++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Disabled,Enabled" else hgroup.long 0x024C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Disabled,Enabled" else hgroup.long 0x0250++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Disabled,Enabled" else hgroup.long 0x0254++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Disabled,Enabled" else hgroup.long 0x0258++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Disabled,Enabled" else hgroup.long 0x025C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Disabled,Enabled" else hgroup.long 0x0260++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Disabled,Enabled" else hgroup.long 0x0264++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Disabled,Enabled" else hgroup.long 0x0268++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Disabled,Enabled" else hgroup.long 0x026C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Disabled,Enabled" else hgroup.long 0x0270++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Disabled,Enabled" else hgroup.long 0x0274++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Disabled,Enabled" else hgroup.long 0x0278++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Disabled,Enabled" else hgroup.long 0x027C++0x03 hide.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else hgroup.long 0x0304++0x03 hide.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else hgroup.long 0x0308++0x03 hide.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else hgroup.long 0x030C++0x03 hide.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else hgroup.long 0x0310++0x03 hide.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else hgroup.long 0x0314++0x03 hide.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else hgroup.long 0x0318++0x03 hide.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else hgroup.long 0x031C++0x03 hide.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else hgroup.long 0x0320++0x03 hide.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else hgroup.long 0x0324++0x03 hide.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else hgroup.long 0x0328++0x03 hide.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else hgroup.long 0x032C++0x03 hide.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else hgroup.long 0x0330++0x03 hide.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else hgroup.long 0x0334++0x03 hide.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else hgroup.long 0x0338++0x03 hide.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else hgroup.long 0x033C++0x03 hide.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else hgroup.long 0x0340++0x03 hide.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else hgroup.long 0x0344++0x03 hide.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else hgroup.long 0x0348++0x03 hide.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else hgroup.long 0x034C++0x03 hide.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else hgroup.long 0x0350++0x03 hide.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else hgroup.long 0x0354++0x03 hide.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else hgroup.long 0x0358++0x03 hide.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else hgroup.long 0x035C++0x03 hide.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else hgroup.long 0x0360++0x03 hide.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else hgroup.long 0x0364++0x03 hide.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else hgroup.long 0x0368++0x03 hide.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else hgroup.long 0x036C++0x03 hide.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else hgroup.long 0x0370++0x03 hide.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else hgroup.long 0x0374++0x03 hide.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else hgroup.long 0x0378++0x03 hide.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else hgroup.long 0x037C++0x03 hide.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 20. tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else hgroup.long 0x420++0x03 hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hgroup.long 0x424++0x03 hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hgroup.long 0x428++0x03 hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hgroup.long 0x42C++0x03 hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hgroup.long 0x430++0x03 hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hgroup.long 0x434++0x03 hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hgroup.long 0x438++0x03 hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hgroup.long 0x43C++0x03 hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else hgroup.long 0x440++0x03 hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hgroup.long 0x444++0x03 hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hgroup.long 0x448++0x03 hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hgroup.long 0x44C++0x03 hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hgroup.long 0x450++0x03 hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hgroup.long 0x454++0x03 hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hgroup.long 0x458++0x03 hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hgroup.long 0x45C++0x03 hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else hgroup.long 0x460++0x03 hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hgroup.long 0x464++0x03 hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hgroup.long 0x468++0x03 hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hgroup.long 0x46C++0x03 hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hgroup.long 0x470++0x03 hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hgroup.long 0x474++0x03 hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hgroup.long 0x478++0x03 hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hgroup.long 0x47C++0x03 hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else hgroup.long 0x480++0x03 hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hgroup.long 0x484++0x03 hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hgroup.long 0x488++0x03 hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hgroup.long 0x48C++0x03 hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hgroup.long 0x490++0x03 hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hgroup.long 0x494++0x03 hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hgroup.long 0x498++0x03 hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hgroup.long 0x49C++0x03 hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else hgroup.long 0x4A0++0x03 hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hgroup.long 0x4A4++0x03 hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hgroup.long 0x4A8++0x03 hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hgroup.long 0x4AC++0x03 hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hgroup.long 0x4B0++0x03 hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hgroup.long 0x4B4++0x03 hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hgroup.long 0x4B8++0x03 hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hgroup.long 0x4BC++0x03 hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else hgroup.long 0x4C0++0x03 hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hgroup.long 0x4C4++0x03 hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hgroup.long 0x4C8++0x03 hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hgroup.long 0x4CC++0x03 hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hgroup.long 0x4D0++0x03 hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hgroup.long 0x4D4++0x03 hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hgroup.long 0x4D8++0x03 hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hgroup.long 0x4DC++0x03 hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else hgroup.long 0x4E0++0x03 hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hgroup.long 0x4E4++0x03 hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hgroup.long 0x4E8++0x03 hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hgroup.long 0x4EC++0x03 hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hgroup.long 0x4F0++0x03 hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hgroup.long 0x4F4++0x03 hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hgroup.long 0x4F8++0x03 hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hgroup.long 0x4FC++0x03 hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else hgroup.long 0x500++0x03 hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hgroup.long 0x504++0x03 hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hgroup.long 0x508++0x03 hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hgroup.long 0x50C++0x03 hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hgroup.long 0x510++0x03 hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hgroup.long 0x514++0x03 hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hgroup.long 0x518++0x03 hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hgroup.long 0x51C++0x03 hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else hgroup.long 0x520++0x03 hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hgroup.long 0x524++0x03 hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hgroup.long 0x528++0x03 hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hgroup.long 0x52C++0x03 hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hgroup.long 0x530++0x03 hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hgroup.long 0x534++0x03 hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hgroup.long 0x538++0x03 hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hgroup.long 0x53C++0x03 hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else hgroup.long 0x540++0x03 hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hgroup.long 0x544++0x03 hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hgroup.long 0x548++0x03 hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hgroup.long 0x54C++0x03 hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hgroup.long 0x550++0x03 hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hgroup.long 0x554++0x03 hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hgroup.long 0x558++0x03 hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hgroup.long 0x55C++0x03 hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else hgroup.long 0x560++0x03 hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hgroup.long 0x564++0x03 hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hgroup.long 0x568++0x03 hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hgroup.long 0x56C++0x03 hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hgroup.long 0x570++0x03 hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hgroup.long 0x574++0x03 hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hgroup.long 0x578++0x03 hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hgroup.long 0x57C++0x03 hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else hgroup.long 0x580++0x03 hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hgroup.long 0x584++0x03 hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hgroup.long 0x588++0x03 hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hgroup.long 0x58C++0x03 hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hgroup.long 0x590++0x03 hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hgroup.long 0x594++0x03 hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hgroup.long 0x598++0x03 hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hgroup.long 0x59C++0x03 hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else hgroup.long 0x5A0++0x03 hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hgroup.long 0x5A4++0x03 hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hgroup.long 0x5A8++0x03 hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hgroup.long 0x5AC++0x03 hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hgroup.long 0x5B0++0x03 hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hgroup.long 0x5B4++0x03 hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hgroup.long 0x5B8++0x03 hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hgroup.long 0x5BC++0x03 hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else hgroup.long 0x5C0++0x03 hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hgroup.long 0x5C4++0x03 hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hgroup.long 0x5C8++0x03 hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hgroup.long 0x5CC++0x03 hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hgroup.long 0x5D0++0x03 hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hgroup.long 0x5D4++0x03 hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hgroup.long 0x5D8++0x03 hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hgroup.long 0x5DC++0x03 hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else hgroup.long 0x5E0++0x03 hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hgroup.long 0x5E4++0x03 hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hgroup.long 0x5E8++0x03 hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hgroup.long 0x5EC++0x03 hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hgroup.long 0x5F0++0x03 hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hgroup.long 0x5F4++0x03 hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hgroup.long 0x5F8++0x03 hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hgroup.long 0x5FC++0x03 hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else hgroup.long 0x600++0x03 hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hgroup.long 0x604++0x03 hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hgroup.long 0x608++0x03 hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hgroup.long 0x60C++0x03 hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hgroup.long 0x610++0x03 hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hgroup.long 0x614++0x03 hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hgroup.long 0x618++0x03 hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hgroup.long 0x61C++0x03 hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else hgroup.long 0x620++0x03 hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hgroup.long 0x624++0x03 hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hgroup.long 0x628++0x03 hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hgroup.long 0x62C++0x03 hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hgroup.long 0x630++0x03 hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hgroup.long 0x634++0x03 hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hgroup.long 0x638++0x03 hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hgroup.long 0x63C++0x03 hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else hgroup.long 0x640++0x03 hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hgroup.long 0x644++0x03 hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hgroup.long 0x648++0x03 hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hgroup.long 0x64C++0x03 hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hgroup.long 0x650++0x03 hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hgroup.long 0x654++0x03 hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hgroup.long 0x658++0x03 hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hgroup.long 0x65C++0x03 hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else hgroup.long 0x660++0x03 hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hgroup.long 0x664++0x03 hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hgroup.long 0x668++0x03 hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hgroup.long 0x66C++0x03 hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hgroup.long 0x670++0x03 hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hgroup.long 0x674++0x03 hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hgroup.long 0x678++0x03 hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hgroup.long 0x67C++0x03 hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else hgroup.long 0x680++0x03 hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hgroup.long 0x684++0x03 hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hgroup.long 0x688++0x03 hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hgroup.long 0x68C++0x03 hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hgroup.long 0x690++0x03 hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hgroup.long 0x694++0x03 hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hgroup.long 0x698++0x03 hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hgroup.long 0x69C++0x03 hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else hgroup.long 0x6A0++0x03 hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hgroup.long 0x6A4++0x03 hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hgroup.long 0x6A8++0x03 hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hgroup.long 0x6AC++0x03 hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hgroup.long 0x6B0++0x03 hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hgroup.long 0x6B4++0x03 hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hgroup.long 0x6B8++0x03 hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hgroup.long 0x6BC++0x03 hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else hgroup.long 0x6C0++0x03 hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hgroup.long 0x6C4++0x03 hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hgroup.long 0x6C8++0x03 hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hgroup.long 0x6CC++0x03 hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hgroup.long 0x6D0++0x03 hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hgroup.long 0x6D4++0x03 hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hgroup.long 0x6D8++0x03 hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hgroup.long 0x6DC++0x03 hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else hgroup.long 0x6E0++0x03 hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hgroup.long 0x6E4++0x03 hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hgroup.long 0x6E8++0x03 hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hgroup.long 0x6EC++0x03 hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hgroup.long 0x6F0++0x03 hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hgroup.long 0x6F4++0x03 hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hgroup.long 0x6F8++0x03 hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hgroup.long 0x6FC++0x03 hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else hgroup.long 0x700++0x03 hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hgroup.long 0x704++0x03 hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hgroup.long 0x708++0x03 hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hgroup.long 0x70C++0x03 hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hgroup.long 0x710++0x03 hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hgroup.long 0x714++0x03 hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hgroup.long 0x718++0x03 hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hgroup.long 0x71C++0x03 hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else hgroup.long 0x720++0x03 hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hgroup.long 0x724++0x03 hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hgroup.long 0x728++0x03 hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hgroup.long 0x72C++0x03 hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hgroup.long 0x730++0x03 hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hgroup.long 0x734++0x03 hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hgroup.long 0x738++0x03 hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hgroup.long 0x73C++0x03 hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else hgroup.long 0x740++0x03 hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hgroup.long 0x744++0x03 hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hgroup.long 0x748++0x03 hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hgroup.long 0x74C++0x03 hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hgroup.long 0x750++0x03 hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hgroup.long 0x754++0x03 hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hgroup.long 0x758++0x03 hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hgroup.long 0x75C++0x03 hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else hgroup.long 0x760++0x03 hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hgroup.long 0x764++0x03 hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hgroup.long 0x768++0x03 hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hgroup.long 0x76C++0x03 hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hgroup.long 0x770++0x03 hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hgroup.long 0x774++0x03 hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hgroup.long 0x778++0x03 hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hgroup.long 0x77C++0x03 hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else hgroup.long 0x780++0x03 hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hgroup.long 0x784++0x03 hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hgroup.long 0x788++0x03 hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hgroup.long 0x78C++0x03 hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hgroup.long 0x790++0x03 hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hgroup.long 0x794++0x03 hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hgroup.long 0x798++0x03 hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hgroup.long 0x79C++0x03 hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else hgroup.long 0x7A0++0x03 hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hgroup.long 0x7A4++0x03 hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hgroup.long 0x7A8++0x03 hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hgroup.long 0x7AC++0x03 hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hgroup.long 0x7B0++0x03 hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hgroup.long 0x7B4++0x03 hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hgroup.long 0x7B8++0x03 hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hgroup.long 0x7BC++0x03 hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else hgroup.long 0x7C0++0x03 hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hgroup.long 0x7C4++0x03 hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hgroup.long 0x7C8++0x03 hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hgroup.long 0x7CC++0x03 hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hgroup.long 0x7D0++0x03 hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hgroup.long 0x7D4++0x03 hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hgroup.long 0x7D8++0x03 hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hgroup.long 0x7DC++0x03 hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else hgroup.long 0x7E0++0x03 hide.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hgroup.long 0x7E4++0x03 hide.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hgroup.long 0x7E8++0x03 hide.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hgroup.long 0x7EC++0x03 hide.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hgroup.long 0x7F0++0x03 hide.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hgroup.long 0x7F4++0x03 hide.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hgroup.long 0x7F8++0x03 hide.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((d.l(AD:0xec801000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else hgroup.long 0x820++0x03 hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hgroup.long 0x824++0x03 hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hgroup.long 0x828++0x03 hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hgroup.long 0x82C++0x03 hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hgroup.long 0x830++0x03 hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hgroup.long 0x834++0x03 hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hgroup.long 0x838++0x03 hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hgroup.long 0x83C++0x03 hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else hgroup.long 0x840++0x03 hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hgroup.long 0x844++0x03 hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hgroup.long 0x848++0x03 hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hgroup.long 0x84C++0x03 hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hgroup.long 0x850++0x03 hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hgroup.long 0x854++0x03 hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hgroup.long 0x858++0x03 hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hgroup.long 0x85C++0x03 hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else hgroup.long 0x860++0x03 hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hgroup.long 0x864++0x03 hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hgroup.long 0x868++0x03 hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hgroup.long 0x86C++0x03 hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hgroup.long 0x870++0x03 hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hgroup.long 0x874++0x03 hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hgroup.long 0x878++0x03 hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hgroup.long 0x87C++0x03 hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else hgroup.long 0x880++0x03 hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hgroup.long 0x884++0x03 hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hgroup.long 0x888++0x03 hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hgroup.long 0x88C++0x03 hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hgroup.long 0x890++0x03 hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hgroup.long 0x894++0x03 hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hgroup.long 0x898++0x03 hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hgroup.long 0x89C++0x03 hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else hgroup.long 0x8A0++0x03 hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hgroup.long 0x8A4++0x03 hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hgroup.long 0x8A8++0x03 hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hgroup.long 0x8AC++0x03 hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hgroup.long 0x8B0++0x03 hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hgroup.long 0x8B4++0x03 hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hgroup.long 0x8B8++0x03 hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hgroup.long 0x8BC++0x03 hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else hgroup.long 0x8C0++0x03 hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hgroup.long 0x8C4++0x03 hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hgroup.long 0x8C8++0x03 hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hgroup.long 0x8CC++0x03 hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hgroup.long 0x8D0++0x03 hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hgroup.long 0x8D4++0x03 hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hgroup.long 0x8D8++0x03 hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hgroup.long 0x8DC++0x03 hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else hgroup.long 0x8E0++0x03 hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hgroup.long 0x8E4++0x03 hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hgroup.long 0x8E8++0x03 hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hgroup.long 0x8EC++0x03 hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hgroup.long 0x8F0++0x03 hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hgroup.long 0x8F4++0x03 hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hgroup.long 0x8F8++0x03 hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hgroup.long 0x8FC++0x03 hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else hgroup.long 0x900++0x03 hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hgroup.long 0x904++0x03 hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hgroup.long 0x908++0x03 hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hgroup.long 0x90C++0x03 hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hgroup.long 0x910++0x03 hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hgroup.long 0x914++0x03 hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hgroup.long 0x918++0x03 hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hgroup.long 0x91C++0x03 hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else hgroup.long 0x920++0x03 hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hgroup.long 0x924++0x03 hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hgroup.long 0x928++0x03 hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hgroup.long 0x92C++0x03 hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hgroup.long 0x930++0x03 hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hgroup.long 0x934++0x03 hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hgroup.long 0x938++0x03 hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hgroup.long 0x93C++0x03 hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else hgroup.long 0x940++0x03 hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hgroup.long 0x944++0x03 hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hgroup.long 0x948++0x03 hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hgroup.long 0x94C++0x03 hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hgroup.long 0x950++0x03 hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hgroup.long 0x954++0x03 hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hgroup.long 0x958++0x03 hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hgroup.long 0x95C++0x03 hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else hgroup.long 0x960++0x03 hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hgroup.long 0x964++0x03 hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hgroup.long 0x968++0x03 hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hgroup.long 0x96C++0x03 hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hgroup.long 0x970++0x03 hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hgroup.long 0x974++0x03 hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hgroup.long 0x978++0x03 hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hgroup.long 0x97C++0x03 hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else hgroup.long 0x980++0x03 hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hgroup.long 0x984++0x03 hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hgroup.long 0x988++0x03 hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hgroup.long 0x98C++0x03 hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hgroup.long 0x990++0x03 hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hgroup.long 0x994++0x03 hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hgroup.long 0x998++0x03 hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hgroup.long 0x99C++0x03 hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else hgroup.long 0x9A0++0x03 hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hgroup.long 0x9A4++0x03 hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hgroup.long 0x9A8++0x03 hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hgroup.long 0x9AC++0x03 hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hgroup.long 0x9B0++0x03 hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hgroup.long 0x9B4++0x03 hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hgroup.long 0x9B8++0x03 hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hgroup.long 0x9BC++0x03 hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else hgroup.long 0x9C0++0x03 hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hgroup.long 0x9C4++0x03 hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hgroup.long 0x9C8++0x03 hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hgroup.long 0x9CC++0x03 hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hgroup.long 0x9D0++0x03 hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hgroup.long 0x9D4++0x03 hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hgroup.long 0x9D8++0x03 hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hgroup.long 0x9DC++0x03 hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else hgroup.long 0x9E0++0x03 hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hgroup.long 0x9E4++0x03 hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hgroup.long 0x9E8++0x03 hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hgroup.long 0x9EC++0x03 hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hgroup.long 0x9F0++0x03 hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hgroup.long 0x9F4++0x03 hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hgroup.long 0x9F8++0x03 hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hgroup.long 0x9FC++0x03 hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else hgroup.long 0xA00++0x03 hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hgroup.long 0xA04++0x03 hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hgroup.long 0xA08++0x03 hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hgroup.long 0xA0C++0x03 hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hgroup.long 0xA10++0x03 hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hgroup.long 0xA14++0x03 hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hgroup.long 0xA18++0x03 hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hgroup.long 0xA1C++0x03 hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else hgroup.long 0xA20++0x03 hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hgroup.long 0xA24++0x03 hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hgroup.long 0xA28++0x03 hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hgroup.long 0xA2C++0x03 hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hgroup.long 0xA30++0x03 hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hgroup.long 0xA34++0x03 hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hgroup.long 0xA38++0x03 hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hgroup.long 0xA3C++0x03 hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else hgroup.long 0xA40++0x03 hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hgroup.long 0xA44++0x03 hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hgroup.long 0xA48++0x03 hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hgroup.long 0xA4C++0x03 hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hgroup.long 0xA50++0x03 hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hgroup.long 0xA54++0x03 hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hgroup.long 0xA58++0x03 hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hgroup.long 0xA5C++0x03 hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else hgroup.long 0xA60++0x03 hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hgroup.long 0xA64++0x03 hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hgroup.long 0xA68++0x03 hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hgroup.long 0xA6C++0x03 hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hgroup.long 0xA70++0x03 hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hgroup.long 0xA74++0x03 hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hgroup.long 0xA78++0x03 hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hgroup.long 0xA7C++0x03 hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else hgroup.long 0xA80++0x03 hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hgroup.long 0xA84++0x03 hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hgroup.long 0xA88++0x03 hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hgroup.long 0xA8C++0x03 hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hgroup.long 0xA90++0x03 hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hgroup.long 0xA94++0x03 hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hgroup.long 0xA98++0x03 hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hgroup.long 0xA9C++0x03 hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else hgroup.long 0xAA0++0x03 hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hgroup.long 0xAA4++0x03 hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hgroup.long 0xAA8++0x03 hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hgroup.long 0xAAC++0x03 hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hgroup.long 0xAB0++0x03 hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hgroup.long 0xAB4++0x03 hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hgroup.long 0xAB8++0x03 hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hgroup.long 0xABC++0x03 hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else hgroup.long 0xAC0++0x03 hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hgroup.long 0xAC4++0x03 hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hgroup.long 0xAC8++0x03 hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hgroup.long 0xACC++0x03 hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hgroup.long 0xAD0++0x03 hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hgroup.long 0xAD4++0x03 hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hgroup.long 0xAD8++0x03 hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hgroup.long 0xADC++0x03 hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else hgroup.long 0xAE0++0x03 hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hgroup.long 0xAE4++0x03 hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hgroup.long 0xAE8++0x03 hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hgroup.long 0xAEC++0x03 hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hgroup.long 0xAF0++0x03 hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hgroup.long 0xAF4++0x03 hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hgroup.long 0xAF8++0x03 hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hgroup.long 0xAFC++0x03 hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else hgroup.long 0xB00++0x03 hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hgroup.long 0xB04++0x03 hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hgroup.long 0xB08++0x03 hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hgroup.long 0xB0C++0x03 hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hgroup.long 0xB10++0x03 hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hgroup.long 0xB14++0x03 hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hgroup.long 0xB18++0x03 hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hgroup.long 0xB1C++0x03 hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else hgroup.long 0xB20++0x03 hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hgroup.long 0xB24++0x03 hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hgroup.long 0xB28++0x03 hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hgroup.long 0xB2C++0x03 hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hgroup.long 0xB30++0x03 hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hgroup.long 0xB34++0x03 hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hgroup.long 0xB38++0x03 hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hgroup.long 0xB3C++0x03 hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else hgroup.long 0xB40++0x03 hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hgroup.long 0xB44++0x03 hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hgroup.long 0xB48++0x03 hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hgroup.long 0xB4C++0x03 hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hgroup.long 0xB50++0x03 hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hgroup.long 0xB54++0x03 hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hgroup.long 0xB58++0x03 hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hgroup.long 0xB5C++0x03 hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else hgroup.long 0xB60++0x03 hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hgroup.long 0xB64++0x03 hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hgroup.long 0xB68++0x03 hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hgroup.long 0xB6C++0x03 hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hgroup.long 0xB70++0x03 hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hgroup.long 0xB74++0x03 hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hgroup.long 0xB78++0x03 hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hgroup.long 0xB7C++0x03 hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else hgroup.long 0xB80++0x03 hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hgroup.long 0xB84++0x03 hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hgroup.long 0xB88++0x03 hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hgroup.long 0xB8C++0x03 hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hgroup.long 0xB90++0x03 hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hgroup.long 0xB94++0x03 hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hgroup.long 0xB98++0x03 hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hgroup.long 0xB9C++0x03 hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else hgroup.long 0xBA0++0x03 hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hgroup.long 0xBA4++0x03 hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hgroup.long 0xBA8++0x03 hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hgroup.long 0xBAC++0x03 hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hgroup.long 0xBB0++0x03 hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hgroup.long 0xBB4++0x03 hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hgroup.long 0xBB8++0x03 hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hgroup.long 0xBBC++0x03 hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else hgroup.long 0xBC0++0x03 hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hgroup.long 0xBC4++0x03 hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hgroup.long 0xBC8++0x03 hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hgroup.long 0xBCC++0x03 hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hgroup.long 0xBD0++0x03 hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hgroup.long 0xBD4++0x03 hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hgroup.long 0xBD8++0x03 hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hgroup.long 0xBDC++0x03 hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else hgroup.long 0xBE0++0x03 hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hgroup.long 0xBE4++0x03 hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hgroup.long 0xBE8++0x03 hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hgroup.long 0xBEC++0x03 hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hgroup.long 0xBF0++0x03 hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hgroup.long 0xBF4++0x03 hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hgroup.long 0xBF8++0x03 hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else hgroup.long 0x800++0x03 hide.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " hgroup.long 0x804++0x03 hide.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " hgroup.long 0x808++0x03 hide.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " hgroup.long 0x80C++0x03 hide.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " hgroup.long 0x810++0x03 hide.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " hgroup.long 0x814++0x03 hide.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " hgroup.long 0x818++0x03 hide.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " hgroup.long 0x81C++0x03 hide.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " hgroup.long 0x820++0x03 hide.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " hgroup.long 0x824++0x03 hide.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " hgroup.long 0x828++0x03 hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " hgroup.long 0x82C++0x03 hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " hgroup.long 0x830++0x03 hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " hgroup.long 0x834++0x03 hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " hgroup.long 0x838++0x03 hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " hgroup.long 0x83C++0x03 hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " hgroup.long 0x840++0x03 hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " hgroup.long 0x844++0x03 hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " hgroup.long 0x848++0x03 hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " hgroup.long 0x84C++0x03 hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " hgroup.long 0x850++0x03 hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " hgroup.long 0x854++0x03 hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " hgroup.long 0x858++0x03 hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " hgroup.long 0x85C++0x03 hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " hgroup.long 0x860++0x03 hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " hgroup.long 0x864++0x03 hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " hgroup.long 0x868++0x03 hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " hgroup.long 0x86C++0x03 hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " hgroup.long 0x870++0x03 hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " hgroup.long 0x874++0x03 hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " hgroup.long 0x878++0x03 hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " hgroup.long 0x87C++0x03 hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " hgroup.long 0x880++0x03 hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " hgroup.long 0x884++0x03 hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " hgroup.long 0x888++0x03 hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " hgroup.long 0x88C++0x03 hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " hgroup.long 0x890++0x03 hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " hgroup.long 0x894++0x03 hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " hgroup.long 0x898++0x03 hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " hgroup.long 0x89C++0x03 hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " hgroup.long 0x8A0++0x03 hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " hgroup.long 0x8A4++0x03 hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " hgroup.long 0x8A8++0x03 hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " hgroup.long 0x8AC++0x03 hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " hgroup.long 0x8B0++0x03 hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " hgroup.long 0x8B4++0x03 hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " hgroup.long 0x8B8++0x03 hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " hgroup.long 0x8BC++0x03 hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " hgroup.long 0x8C0++0x03 hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " hgroup.long 0x8C4++0x03 hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " hgroup.long 0x8C8++0x03 hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " hgroup.long 0x8CC++0x03 hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " hgroup.long 0x8D0++0x03 hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " hgroup.long 0x8D4++0x03 hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " hgroup.long 0x8D8++0x03 hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " hgroup.long 0x8DC++0x03 hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " hgroup.long 0x8E0++0x03 hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " hgroup.long 0x8E4++0x03 hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " hgroup.long 0x8E8++0x03 hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " hgroup.long 0x8EC++0x03 hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " hgroup.long 0x8F0++0x03 hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " hgroup.long 0x8F4++0x03 hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " hgroup.long 0x8F8++0x03 hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " hgroup.long 0x8FC++0x03 hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " hgroup.long 0x900++0x03 hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " hgroup.long 0x904++0x03 hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " hgroup.long 0x908++0x03 hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " hgroup.long 0x90C++0x03 hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " hgroup.long 0x910++0x03 hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " hgroup.long 0x914++0x03 hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " hgroup.long 0x918++0x03 hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " hgroup.long 0x91C++0x03 hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " hgroup.long 0x920++0x03 hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " hgroup.long 0x924++0x03 hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " hgroup.long 0x928++0x03 hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " hgroup.long 0x92C++0x03 hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " hgroup.long 0x930++0x03 hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " hgroup.long 0x934++0x03 hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " hgroup.long 0x938++0x03 hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " hgroup.long 0x93C++0x03 hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " hgroup.long 0x940++0x03 hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " hgroup.long 0x944++0x03 hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " hgroup.long 0x948++0x03 hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " hgroup.long 0x94C++0x03 hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " hgroup.long 0x950++0x03 hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " hgroup.long 0x954++0x03 hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " hgroup.long 0x958++0x03 hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " hgroup.long 0x95C++0x03 hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " hgroup.long 0x960++0x03 hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " hgroup.long 0x964++0x03 hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " hgroup.long 0x968++0x03 hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " hgroup.long 0x96C++0x03 hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " hgroup.long 0x970++0x03 hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " hgroup.long 0x974++0x03 hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " hgroup.long 0x978++0x03 hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " hgroup.long 0x97C++0x03 hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " hgroup.long 0x980++0x03 hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " hgroup.long 0x984++0x03 hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " hgroup.long 0x988++0x03 hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " hgroup.long 0x98C++0x03 hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " hgroup.long 0x990++0x03 hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hgroup.long 0x994++0x03 hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hgroup.long 0x998++0x03 hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hgroup.long 0x99C++0x03 hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hgroup.long 0x9A0++0x03 hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hgroup.long 0x9A4++0x03 hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hgroup.long 0x9A8++0x03 hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hgroup.long 0x9AC++0x03 hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hgroup.long 0x9B0++0x03 hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hgroup.long 0x9B4++0x03 hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hgroup.long 0x9B8++0x03 hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hgroup.long 0x9BC++0x03 hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hgroup.long 0x9C0++0x03 hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hgroup.long 0x9C4++0x03 hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hgroup.long 0x9C8++0x03 hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hgroup.long 0x9CC++0x03 hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hgroup.long 0x9D0++0x03 hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hgroup.long 0x9D4++0x03 hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hgroup.long 0x9D8++0x03 hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hgroup.long 0x9DC++0x03 hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hgroup.long 0x9E0++0x03 hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hgroup.long 0x9E4++0x03 hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hgroup.long 0x9E8++0x03 hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hgroup.long 0x9EC++0x03 hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hgroup.long 0x9F0++0x03 hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hgroup.long 0x9F4++0x03 hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hgroup.long 0x9F8++0x03 hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hgroup.long 0x9FC++0x03 hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hgroup.long 0xA00++0x03 hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hgroup.long 0xA04++0x03 hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hgroup.long 0xA08++0x03 hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hgroup.long 0xA0C++0x03 hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hgroup.long 0xA10++0x03 hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hgroup.long 0xA14++0x03 hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hgroup.long 0xA18++0x03 hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hgroup.long 0xA1C++0x03 hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hgroup.long 0xA20++0x03 hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hgroup.long 0xA24++0x03 hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hgroup.long 0xA28++0x03 hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hgroup.long 0xA2C++0x03 hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hgroup.long 0xA30++0x03 hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hgroup.long 0xA34++0x03 hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hgroup.long 0xA38++0x03 hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hgroup.long 0xA3C++0x03 hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hgroup.long 0xA40++0x03 hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hgroup.long 0xA44++0x03 hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hgroup.long 0xA48++0x03 hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hgroup.long 0xA4C++0x03 hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hgroup.long 0xA50++0x03 hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hgroup.long 0xA54++0x03 hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hgroup.long 0xA58++0x03 hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hgroup.long 0xA5C++0x03 hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hgroup.long 0xA60++0x03 hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hgroup.long 0xA64++0x03 hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hgroup.long 0xA68++0x03 hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hgroup.long 0xA6C++0x03 hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hgroup.long 0xA70++0x03 hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hgroup.long 0xA74++0x03 hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hgroup.long 0xA78++0x03 hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hgroup.long 0xA7C++0x03 hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hgroup.long 0xA80++0x03 hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hgroup.long 0xA84++0x03 hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hgroup.long 0xA88++0x03 hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hgroup.long 0xA8C++0x03 hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hgroup.long 0xA90++0x03 hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hgroup.long 0xA94++0x03 hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hgroup.long 0xA98++0x03 hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hgroup.long 0xA9C++0x03 hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hgroup.long 0xAA0++0x03 hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hgroup.long 0xAA4++0x03 hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hgroup.long 0xAA8++0x03 hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hgroup.long 0xAAC++0x03 hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hgroup.long 0xAB0++0x03 hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hgroup.long 0xAB4++0x03 hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hgroup.long 0xAB8++0x03 hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hgroup.long 0xABC++0x03 hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hgroup.long 0xAC0++0x03 hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hgroup.long 0xAC4++0x03 hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hgroup.long 0xAC8++0x03 hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hgroup.long 0xACC++0x03 hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hgroup.long 0xAD0++0x03 hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hgroup.long 0xAD4++0x03 hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hgroup.long 0xAD8++0x03 hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hgroup.long 0xADC++0x03 hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hgroup.long 0xAE0++0x03 hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hgroup.long 0xAE4++0x03 hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hgroup.long 0xAE8++0x03 hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hgroup.long 0xAEC++0x03 hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hgroup.long 0xAF0++0x03 hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hgroup.long 0xAF4++0x03 hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hgroup.long 0xAF8++0x03 hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hgroup.long 0xAFC++0x03 hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hgroup.long 0xB00++0x03 hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hgroup.long 0xB04++0x03 hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hgroup.long 0xB08++0x03 hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hgroup.long 0xB0C++0x03 hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hgroup.long 0xB10++0x03 hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hgroup.long 0xB14++0x03 hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hgroup.long 0xB18++0x03 hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hgroup.long 0xB1C++0x03 hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hgroup.long 0xB20++0x03 hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hgroup.long 0xB24++0x03 hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hgroup.long 0xB28++0x03 hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hgroup.long 0xB2C++0x03 hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hgroup.long 0xB30++0x03 hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hgroup.long 0xB34++0x03 hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hgroup.long 0xB38++0x03 hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hgroup.long 0xB3C++0x03 hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hgroup.long 0xB40++0x03 hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hgroup.long 0xB44++0x03 hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hgroup.long 0xB48++0x03 hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hgroup.long 0xB4C++0x03 hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hgroup.long 0xB50++0x03 hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hgroup.long 0xB54++0x03 hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hgroup.long 0xB58++0x03 hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hgroup.long 0xB5C++0x03 hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hgroup.long 0xB60++0x03 hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hgroup.long 0xB64++0x03 hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hgroup.long 0xB68++0x03 hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hgroup.long 0xB6C++0x03 hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hgroup.long 0xB70++0x03 hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hgroup.long 0xB74++0x03 hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hgroup.long 0xB78++0x03 hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hgroup.long 0xB7C++0x03 hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hgroup.long 0xB80++0x03 hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hgroup.long 0xB84++0x03 hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hgroup.long 0xB88++0x03 hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hgroup.long 0xB8C++0x03 hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hgroup.long 0xB90++0x03 hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hgroup.long 0xB94++0x03 hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hgroup.long 0xB98++0x03 hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hgroup.long 0xB9C++0x03 hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hgroup.long 0xBA0++0x03 hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hgroup.long 0xBA4++0x03 hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hgroup.long 0xBA8++0x03 hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hgroup.long 0xBAC++0x03 hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hgroup.long 0xBB0++0x03 hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hgroup.long 0xBB4++0x03 hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hgroup.long 0xBB8++0x03 hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hgroup.long 0xBBC++0x03 hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hgroup.long 0xBC0++0x03 hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hgroup.long 0xBC4++0x03 hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hgroup.long 0xBC8++0x03 hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hgroup.long 0xBCC++0x03 hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hgroup.long 0xBD0++0x03 hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hgroup.long 0xBD4++0x03 hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hgroup.long 0xBD8++0x03 hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hgroup.long 0xBDC++0x03 hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hgroup.long 0xBE0++0x03 hide.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hgroup.long 0xBE4++0x03 hide.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hgroup.long 0xBE8++0x03 hide.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hgroup.long 0xBEC++0x03 hide.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hgroup.long 0xBF0++0x03 hide.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hgroup.long 0xBF4++0x03 hide.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hgroup.long 0xBF8++0x03 hide.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" hgroup.long 0xC00++0x03 hide.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC08++0x03 hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" hgroup.long 0xC0C++0x03 hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC10++0x03 hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" hgroup.long 0xC14++0x03 hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC18++0x03 hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" hgroup.long 0xC1C++0x03 hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC20++0x03 hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" hgroup.long 0xC24++0x03 hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC28++0x03 hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" hgroup.long 0xC2C++0x03 hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC30++0x03 hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" hgroup.long 0xC34++0x03 hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC38++0x03 hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" hgroup.long 0xC3C++0x03 hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC40++0x03 hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" hgroup.long 0xC44++0x03 hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC48++0x03 hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" hgroup.long 0xC4C++0x03 hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC50++0x03 hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" hgroup.long 0xC54++0x03 hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC58++0x03 hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" hgroup.long 0xC5C++0x03 hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC60++0x03 hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" hgroup.long 0xC64++0x03 hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC68++0x03 hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" hgroup.long 0xC6C++0x03 hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC70++0x03 hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" hgroup.long 0xC74++0x03 hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC78++0x03 hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" hgroup.long 0xC7C++0x03 hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC80++0x03 hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" hgroup.long 0xC84++0x03 hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC88++0x03 hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" hgroup.long 0xC8C++0x03 hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC90++0x03 hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" hgroup.long 0xC94++0x03 hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xC98++0x03 hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" hgroup.long 0xC9C++0x03 hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCA0++0x03 hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" hgroup.long 0xCA4++0x03 hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCA8++0x03 hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" hgroup.long 0xCAC++0x03 hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCB0++0x03 hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" hgroup.long 0xCB4++0x03 hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCB8++0x03 hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" hgroup.long 0xCBC++0x03 hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCC0++0x03 hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" hgroup.long 0xCC4++0x03 hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCC8++0x03 hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" hgroup.long 0xCCC++0x03 hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCD0++0x03 hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" hgroup.long 0xCD4++0x03 hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCD8++0x03 hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" hgroup.long 0xCDC++0x03 hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCE0++0x03 hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" hgroup.long 0xCE4++0x03 hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCE8++0x03 hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" hgroup.long 0xCEC++0x03 hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCF0++0x03 hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" hgroup.long 0xCF4++0x03 hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else hgroup.long 0xCF8++0x03 hide.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" hgroup.long 0xCFC++0x03 hide.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI_C[15] ,Returns the status of the ppi_c[15] inputs on the Distributor" "Low,High" bitfld.long 0x00 14. " PPI_C[14] ,Returns the status of the ppi_c[14] inputs on the Distributor" "Low,High" bitfld.long 0x00 13. " PPI_C[13] ,Returns the status of the ppi_c[13] inputs on the Distributor" "Low,High" bitfld.long 0x00 12. " PPI_C[12] ,Returns the status of the ppi_c[12] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 11. " PPI_C[11] ,Returns the status of the ppi_c[11] inputs on the Distributor" "Low,High" bitfld.long 0x00 10. " PPI_C[10] ,Returns the status of the ppi_c[10] inputs on the Distributor" "Low,High" bitfld.long 0x00 9. " PPI_C[9] ,Returns the status of the ppi_c[9] inputs on the Distributor" "Low,High" bitfld.long 0x00 8. " PPI_C[8] ,Returns the status of the ppi_c[8] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 7. " PPI_C[7] ,Returns the status of the ppi_c[7] inputs on the Distributor" "Low,High" bitfld.long 0x00 6. " PPI_C[6] ,Returns the status of the ppi_c[6] inputs on the Distributor" "Low,High" bitfld.long 0x00 5. " PPI_C[5] ,Returns the status of the ppi_c[5] inputs on the Distributor" "Low,High" bitfld.long 0x00 4. " PPI_C[4] ,Returns the status of the ppi_c[4] inputs on the Distributor" "Low,High" textline " " bitfld.long 0x00 3. " PPI_C[3] ,Returns the status of the ppi_c[3] inputs on the Distributor" "Low,High" bitfld.long 0x00 2. " PPI_C[2] ,Returns the status of the ppi_c[2] inputs on the Distributor" "Low,High" bitfld.long 0x00 1. " PPI_C[1] ,Returns the status of the ppi_c[1] inputs on the Distributor" "Low,High" bitfld.long 0x00 0. " PPI_C[0] ,Returns the status of the ppi_c[0] inputs on the Distributor" "Low,High" textline " " width 22. if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else hgroup.long 0x0D04++0x03 hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else hgroup.long 0x0D08++0x03 hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else hgroup.long 0x0D0C++0x03 hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else hgroup.long 0x0D10++0x03 hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else hgroup.long 0x0D14++0x03 hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else hgroup.long 0x0D18++0x03 hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else hgroup.long 0x0D1C++0x03 hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else hgroup.long 0x0D20++0x03 hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else hgroup.long 0x0D24++0x03 hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else hgroup.long 0x0D28++0x03 hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else hgroup.long 0x0D2C++0x03 hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else hgroup.long 0x0D30++0x03 hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else hgroup.long 0x0D34++0x03 hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else hgroup.long 0x0D38++0x03 hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else hgroup.long 0x0D3C++0x03 hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else hgroup.long 0x0D40++0x03 hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else hgroup.long 0x0D44++0x03 hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else hgroup.long 0x0D48++0x03 hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else hgroup.long 0x0D4C++0x03 hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else hgroup.long 0x0D50++0x03 hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else hgroup.long 0x0D54++0x03 hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else hgroup.long 0x0D58++0x03 hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else hgroup.long 0x0D5C++0x03 hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else hgroup.long 0x0D60++0x03 hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else hgroup.long 0x0D64++0x03 hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else hgroup.long 0x0D68++0x03 hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else hgroup.long 0x0D6C++0x03 hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else hgroup.long 0x0D70++0x03 hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else hgroup.long 0x0D74++0x03 hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else hgroup.long 0x0D78++0x03 hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((d.l(AD:0xec801000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else hgroup.long 0x0D7C++0x03 hide.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((d.l(AD:0xec801000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Returns 0x90" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " JEP106_ID_3_0 ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PART_NUMBER_1 ,Returns 0x3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHITECTURE ,Identifies the architecture version of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " JEDEC_USED ,This indicates that the GIC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Low,High" bitfld.byte 0x00 0.--2. " JEP106_ID_CODE ,JEP106 identity code field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVAND ,The top-level RTL provides four AND gates that are tied-off to provide an output value of 0x0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the GIC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 4.--7. " 4KB_COUNT ,The number of 4KB address blocks you require to access the registers expressed in powers of 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " JEP106_C_CODE ,The JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" bitfld.byte 0x00 5.--7. " PPI_NUMBER_0 ,The LSBs of the number of PPIs that the GIC provides" "0,1,2,3,4,5,6,7" bitfld.byte 0x00 0.--4. " SGI_NUMBER ,The number of SGIs that the GIC provides" "None,INTID0,INTID[1:0],INTID[2:0],INTID[3:0],INTID[4:0],INTID[5:0],INTID[6:0],INTID[7:0],INTID[8:0],INTID[9:0],INTID[10:0],INTID[11:0],INTID[12:0],INTID[13:0],INTID[14:0],INTID[15:0],?..." rgroup.byte 0x0FD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" bitfld.byte 0x00 2.--7. " SPI_NUMBER_0 ,The LSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.byte 0x00 0.--1. " PPI_NUMBER_1 ,The MSBs of the number of PPIs that the GIC provides" "0,1,2,3" rgroup.byte 0x0FDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" bitfld.byte 0x00 7. " TZ ,Identifies the number of security states that the GIC supports" "S,NS&S" bitfld.byte 0x00 4.--6. " PRIORITY ,The number of priority levels that the GIC provides" "16,32,64,128,256,?..." bitfld.byte 0x00 0.--3. " SPI_NUMBER_1 ,The MSBs of the number of SPIs that the GIC provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FC0++0x00 line.byte 0x00 "GICD_PIDR8,Peripheral ID8 Register" bitfld.byte 0x00 7. " IDENTIFIER ,Identifies the AMBA interface that this register belongs to" "Distributor,CPU Interface" bitfld.byte 0x00 5.--6. " IF_TYPE ,Identifies the AMBA protocol that the GIC supports" "AXI,AHB-Lite,?..." bitfld.byte 0x00 2.--4. " CPU_IF ,Identifies the number of CPU Interfaces that the GIC contains" "1,2,3,4,5,6,7,8" textline " " bitfld.byte 0x00 1. " FIQ_LEGACY ,Identifies if the GIC provides a legacy FIQ input signal for each CPU Interface" "Not supported,Supported" bitfld.byte 0x00 0. " IRQ_LEGACY ,Identifies if the GIC provides a legacy IRQ input signal for each CPU Interface" "Not supported,Supported" tree.end tree.end base AD:0xec800100 width 17. tree "CPU Interface" if (((d.l(AD:0xec801000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " textline " " else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " textline " " endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((d.l(AD:0xec801000+0x04))&0x400)==0x400) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((d.l(AD:0xec801000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" tree.end width 0x0B tree.end tree.end tree "A9SM (CPU Subsystem)" base ad:0xE07A0000 tree "CORTEXA9ROM registers" width 15. rgroup.long 0x00++0x43 line.long 0x0 "CORTEXA9ROM0, CORTEX-A9 ROM Entry 0" hexmask.long.tbyte 0x0 12.--31. 0x10 " BASE_ADDR , CP14_0 offset" bitfld.long 0x0 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x0 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long (0x0+0x04) "CORTEXA9ROM1, CORTEX-A9 ROM Entry 1" hexmask.long.tbyte (0x0+0x04) 12.--31. 0x10 " BASE_ADDR , PMU0 offset" bitfld.long (0x0+0x04) 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long (0x0+0x04) 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x8 "CORTEXA9ROM2, CORTEX-A9 ROM Entry 2" hexmask.long.tbyte 0x8 12.--31. 0x10 " BASE_ADDR , CP14_2 offset" bitfld.long 0x8 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x8 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long (0x8+0x04) "CORTEXA9ROM3, CORTEX-A9 ROM Entry 3" hexmask.long.tbyte (0x8+0x04) 12.--31. 0x10 " BASE_ADDR , PMU2 offset" bitfld.long (0x8+0x04) 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long (0x8+0x04) 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x10 "CORTEXA9ROM4, CORTEX-A9 ROM Entry 4" hexmask.long.tbyte 0x10 12.--31. 0x10 " BASE_ADDR , CP14_4 offset" bitfld.long 0x10 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x10 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long (0x10+0x04) "CORTEXA9ROM5, CORTEX-A9 ROM Entry 5" hexmask.long.tbyte (0x10+0x04) 12.--31. 0x10 " BASE_ADDR , PMU4 offset" bitfld.long (0x10+0x04) 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long (0x10+0x04) 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x18 "CORTEXA9ROM6, CORTEX-A9 ROM Entry 6" hexmask.long.tbyte 0x18 12.--31. 0x10 " BASE_ADDR , CP14_6 offset" bitfld.long 0x18 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x18 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long (0x18+0x04) "CORTEXA9ROM7, CORTEX-A9 ROM Entry 7" hexmask.long.tbyte (0x18+0x04) 12.--31. 0x10 " BASE_ADDR , PMU6 offset" bitfld.long (0x18+0x04) 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long (0x18+0x04) 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x20 "CORTEXA9ROM8, CORTEX-A9 ROM Entry 8" hexmask.long.tbyte 0x20 12.--31. 0x10 " BASE_ADDR , CTI0 offset" bitfld.long 0x20 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x20 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x24 "CORTEXA9ROM9, CORTEX-A9 ROM Entry 9" hexmask.long.tbyte 0x24 12.--31. 0x10 " BASE_ADDR , CTI1 offset" bitfld.long 0x24 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x24 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x28 "CORTEXA9ROM10, CORTEX-A9 ROM Entry 10" hexmask.long.tbyte 0x28 12.--31. 0x10 " BASE_ADDR , CTI2 offset" bitfld.long 0x28 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x28 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x2C "CORTEXA9ROM11, CORTEX-A9 ROM Entry 11" hexmask.long.tbyte 0x2C 12.--31. 0x10 " BASE_ADDR , CTI3 offset" bitfld.long 0x2C 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x2C 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x30 "CORTEXA9ROM12, CORTEX-A9 ROM Entry 12" hexmask.long.tbyte 0x30 12.--31. 0x10 " BASE_ADDR , PTM0 offset" bitfld.long 0x30 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x30 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x34 "CORTEXA9ROM13, CORTEX-A9 ROM Entry 13" hexmask.long.tbyte 0x34 12.--31. 0x10 " BASE_ADDR , PTM1 offset" bitfld.long 0x34 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x34 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x38 "CORTEXA9ROM14, CORTEX-A9 ROM Entry 14" hexmask.long.tbyte 0x38 12.--31. 0x10 " BASE_ADDR , PTM2 offset" bitfld.long 0x38 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x38 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x3C "CORTEXA9ROM15, CORTEX-A9 ROM Entry 15" hexmask.long.tbyte 0x3C 12.--31. 0x10 " BASE_ADDR , PTM3 offset" bitfld.long 0x3C 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x3C 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x40 "CORTEXA9ROM16, End of CORTEX-A9 ROM Entry table" hexmask.long.tbyte 0x40 12.--31. 0x10 " BASE_ADDR , No entry" bitfld.long 0x40 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x40 0. " ENTRY_PRESENT , Entry present" "Not present,Present" tree.end tree "DAPROM registers" width 9. base ad:0xE0780000 rgroup.long 0x00++0x1F line.long 0x0 "DAPROM0, DAP ROM Entry 0" hexmask.long.tbyte 0x0 12.--31. 0x10 " BASE_ADDR , TPIU offset" bitfld.long 0x0 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x0 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x4 "DAPROM1, DAP ROM Entry 1" hexmask.long.tbyte 0x4 12.--31. 0x10 " BASE_ADDR , CTI-TPIU offset" bitfld.long 0x4 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x4 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x8 "DAPROM2, DAP ROM Entry 2" hexmask.long.tbyte 0x8 12.--31. 0x10 " BASE_ADDR , ETB offset" bitfld.long 0x8 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x8 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0xC "DAPROM3, DAP ROM Entry 3" hexmask.long.tbyte 0xC 12.--31. 0x10 " BASE_ADDR , FUNNEL1 offset" bitfld.long 0xC 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0xC 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x10 "DAPROM4, DAP ROM Entry 4" hexmask.long.tbyte 0x10 12.--31. 0x10 " BASE_ADDR , FUNNEL2 offset" bitfld.long 0x10 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x10 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x14 "DAPROM5, DAP ROM Entry 5" hexmask.long.tbyte 0x14 12.--31. 0x10 " BASE_ADDR , A9 DAPROM offset" bitfld.long 0x14 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x14 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x18 "DAPROM6, DAP ROM Entry 6" hexmask.long.tbyte 0x18 12.--31. 0x10 " BASE_ADDR , External offset" bitfld.long 0x18 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x18 0. " ENTRY_PRESENT , Entry present" "Not present,Present" line.long 0x1C "DAPROM7, End of DAP ROM Entry table" hexmask.long.tbyte 0x1C 12.--31. 0x10 " BASE_ADDR , No entry" bitfld.long 0x1C 1. " ENTRY_FORMAT , Format" "0,1" textline " " bitfld.long 0x1C 0. " ENTRY_PRESENT , Entry present" "Not present,Present" tree.end tree "Clock manager (CMR) registers" width 8. base ad:0xE07C0000 group.long 0x00++0x03 line.long 0x00 "PR_REG, Power register" bitfld.long 0x00 0. " CK_ACT , CoreSight clock activation" "Not activated,Activated" rgroup.long 0x04++0x03 line.long 0x00 "DR_REG, Dap Power register" bitfld.long 0x00 0. " PWRUP_REQ , Dap Power Up requested" "Not requested,Requested" group.long 0x08++0x03 line.long 0x00 "RR_REG, Reset register" bitfld.long 0x00 0. " RST_REQ , Reset request" "Not requested,Requested" group.long 0x0C++0x03 line.long 0x00 "CR_REG, Counter register" rgroup.long 0x10++0x03 line.long 0x00 "ID_REG, ID register" tree.end tree "Snoop control unit (SCU) registers" width 15. base ad:0xEC800000 group.long 0x00++0x03 line.long 0x00 "CONTROL,SCU Control Register" bitfld.long 0x00 6. " IC_STANDBY_ENABLE ,IC standby enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCU_STANDBY_ENABLE ,SCU standby enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " FORCE_ALL_DEVICE_TO_PORT0_ENABLE ,Force all Device to port 0 enable" "Disabled,Enabled" bitfld.long 0x00 3. " SCU_SPECULATIVE_LINEFILLS_ENABLE ,SCU Speculative linefills enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SCU_RAMS_PARITY_ENABLE ,SCU RAM parity enable" "Disabled,Enabled" bitfld.long 0x00 1. " ADDRESS_FILTERING_ENABLE ,Addres filtering enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SCU_ENABLE ,SCU enabled" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "CONFIGURATION,SCU Configuration Register" bitfld.long 0x00 14.--15. " TAG_RAM_SIZE_3 ,Tag RAM sizes CPU 3" "16KB cache - 64 indexes,32KB cache - 128 indexes,64KB cache - 256 indexes,?..." bitfld.long 0x00 12.--13. " TAG_RAM_SIZE_2 ,Tag RAM sizes CPU 2" "16KB cache - 64 indexes,32KB cache - 128 indexes,64KB cache - 256 indexes,?..." textline " " bitfld.long 0x00 10.--11. " TAG_RAM_SIZE_1 ,Tag RAM sizes CPU 1" "16KB cache - 64 indexes,32KB cache - 128 indexes,64KB cache - 256 indexes,?..." bitfld.long 0x00 8.--9. " TAG_RAM_SIZE_0 ,Tag RAM sizes CPU 0" "16KB cache - 64 indexes,32KB cache - 128 indexes,64KB cache - 256 indexes,?..." textline " " bitfld.long 0x00 7. " CPU3SMP ,SMP or AMP mode - CPU3" "AMP,SMP" bitfld.long 0x00 6. " CPU2SMP ,SMP or AMP mode - CPU2" "AMP,SMP" textline " " bitfld.long 0x00 5. " CPU1SMP ,SMP or AMP mode - CPU1" "AMP,SMP" bitfld.long 0x00 4. " CPU0SMP ,SMP or AMP mode - CPU0" "AMP,SMP" textline " " bitfld.long 0x00 0.--1. " CPU_NR ,CPU number" "1,2,3,4" group.long 0x08++0x03 line.long 0x00 "POWER,SCU CPU Power Status Register" bitfld.long 0x00 24.--25. " CPU3_STATUS ,Power Status of the Cortex-A9 processor - CPU3" "Present,Reserved,Dormant,Not present" bitfld.long 0x00 16.--17. " CPU2_STATUS ,Power Status of the Cortex-A9 processor - CPU2" "Present,Reserved,Dormant,Not present" textline " " bitfld.long 0x00 8.--9. " CPU1_STATUS ,Power Status of the Cortex-A9 processor - CPU1" "Present,Reserved,Dormant,Not present" bitfld.long 0x00 0.--1. " CPU0_STATUS ,Power Status of the Cortex-A9 processor - CPU0" "Present,Reserved,Dormant,Not present" wgroup.long 0x0C++0x03 line.long 0x00 "INVALIDATEALL,SCU Invalidate All Registers in Secure State Register" bitfld.long 0x00 12.--15. " CPU3_WAYS ,Specifies the ways that must be invalidated for CPU3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " CPU2_WAYS ,Specifies the ways that must be invalidated for CPU2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 4.--7. " CPU1_WAYS ,Specifies the ways that must be invalidated for CPU1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " CPU0_WAYS ,Specifies the ways that must be invalidated for CPU0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if ((per.l(ad:0xEC800000)&0x2)==0x2) group.long 0x40++0x07 line.long 0x00 "FILTERSTART,Filtering Start Address Register" hexmask.long.word 0x00 20.--31. 0x10 " FILTER_STR_ADDR ,Start address for use with master port 1 in a two-master port configuration" line.long 0x04 "FILTEREND,Filtering End Address Register" hexmask.long.word 0x04 20.--31. 0x10 " FILTER_END_ADDR ,End address for use with master port 1 in a two-master port configuration" endif group.long 0x50++0x03 line.long 0x00 "SAC,SCU Access Control Register" bitfld.long 0x00 3. " CPU3 ,CPU3 access the registers" "Not accessed,Accessed" bitfld.long 0x00 2. " CPU2 ,CPU2 access the registers" "Not accessed,Accessed" textline " " bitfld.long 0x00 1. " CPU1 ,CPU1 access the registers" "Not accessed,Accessed" bitfld.long 0x00 0. " CPU0 ,CPU0 access the registers" "Not accessed,Accessed" group.long 0x54++0x03 line.long 0x00 "SNSAC,SCU Non-secure Access Control Register" bitfld.long 0x00 11. " GLOB_TIM_CPU3 ,CPU3 global timer" "Secure,Secure & Non-secure" bitfld.long 0x00 10. " GLOB_TIM_CPU2 ,CPU2 global timer" "Secure,Secure & Non-secure" textline " " bitfld.long 0x00 9. " GLOB_TIM_CPU1 ,CPU1 global timer" "Secure,Secure & Non-secure" bitfld.long 0x00 8. " GLOB_TIM_CPU0 ,CPU0 global timer" "Secure,Secure & Non-secure" textline " " bitfld.long 0x00 7. " PRIV_TIM_CPU3 ,Non-secure access to the private timer and watchdog for CPU3" "Secure,Secure & Non-secure" bitfld.long 0x00 6. " PRIV_TIM_CPU2 ,Non-secure access to the private timer and watchdog for CPU2" "Secure,Secure & Non-secure" textline " " bitfld.long 0x00 5. " PRIV_TIM_CPU1 ,Non-secure access to the private timer and watchdog for CPU1" "Secure,Secure & Non-secure" bitfld.long 0x00 4. " PRIV_TIM_CPU0 ,Non-secure access to the private timer and watchdog for CPU0" "Secure,Secure & Non-secure" textline " " bitfld.long 0x00 3. " REG_ACC_CPU3 ,Register access for CPU3" "Not accessed,Accessed" bitfld.long 0x00 2. " REG_ACC_CPU2 ,Register access for CPU2" "Not accessed,Accessed" textline " " bitfld.long 0x00 1. " REG_ACC_CPU1 ,Register access for CPU1" "Not accessed,Accessed" bitfld.long 0x00 0. " REG_ACC_CPU0 ,Register access for CPU0" "Not accessed,Accessed" tree.end tree "Generic interrupt controller (GIC) registers" width 9. base ad:0xEC800100 group.long 0x00++0x0B line.long 0x00 "ICCICR,CPU Interface Control Register" bitfld.long 0x00 4. " SBPR ,CPU interface uses the Secure or Non-secure Binary Point Register for preemption" "0,1" bitfld.long 0x00 3. " FIQEN ,GIC signals Secure interrupts to a target processor using the FIQ or the IRQ signal" "0,1" textline " " bitfld.long 0x00 2. " ACKCTL ,Secure read of the ICCIAR" "0,1" bitfld.long 0x00 1. " NSEN ,Alias enable bit in the Non-secure ICCICR" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " SEN ,Global enable for the signalling of Secure interrupts by the CPU interfaces to the connected processors" "Disabled,Enabled" line.long 0x04 "ICCPMR,Interrupt Priority Mask Register" hexmask.long.byte 0x04 0.--7. 1. " PRI ,Priority mask level for the CPU interface" line.long 0x08 "ICCBPR,Binary Point Register" bitfld.long 0x08 0.--2. " BINPT ,Binary point" "0,1,2,3,4,5,6,7" rgroup.long 0x0C++0x03 line.long 0x00 "ICCIAR,Interrupt Acknowledge Register" bitfld.long 0x00 10.--12. " SCPUID ,Identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " ACKINTID ,The interrupt ID" wgroup.long 0x10++0x03 line.long 0x00 "ICCEOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " SCPUID ,Contains the CPUID value from the corresponding ICCIAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,ACKINTID value from the corresponding ICCIAR access" rgroup.long 0x14++0x07 line.long 0x00 "ICCRPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRI ,Priority value of the highest priority interrupt that is active on the CPU interface" line.long 0x04 "ICCHPIR,Highest Pending Interrupt Register" bitfld.long 0x04 10.--12. " SCPUID ,CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 0.--9. 1. " PENDINTID ,Interrupt ID of the highest priority pending interrupt" group.long 0x1C++0x03 line.long 0x00 "ICCABPR,Aliased Non-secure Binary Point Register" bitfld.long 0x00 0.--2. " BINPT ,Binary point" "0,1,2,3,4,5,6,7" rgroup.long 0xFC++0x03 line.long 0x00 "ICCIDR,CPU Interface Implementer Identification Register" hexmask.long.word 0x00 20.--31. 1. " PART_NUMBER ,Identifies the peripheral" bitfld.long 0x00 16.--19. " ARCHITECTURE_VERSION ,Identifies the architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REVISION_NUMBER ,Returns the revision number of the Interrupt Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. " IMPLEMENTER[11:8] ,JEP106 continuation code [11:8] of the implementer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 7. " IMPLEMENTER[7] ,The JEP106 code [7] of the implementer" "0,1" hexmask.long.byte 0x00 0.--6. 1. " IMPLEMENTER[6:0] ,JEP106 code [6:0] of the implementer" tree.end tree "Global timer (GTIM) registers" width 16. base ad:0xEC800200 group.long 0x00++0x1B line.long 0x00 "GTIMCOUNTERL,Global Timer Counter Low Register" line.long 0x04 "GTIMCOUNTERU,Global Timer Counter Upper Register" line.long 0x08 "GTIMCONTROL,Global Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRESCALER ,Prescaler modifies the clock period for the decrementing event for the Counter Register" bitfld.long 0x08 3. " AUTO_INC ,Single shot mode / Auto increment mode" "Single shot,Auto increment" textline " " bitfld.long 0x08 2. " IRQ_EN ,Interrupt ID 27 is set as pending in the Interrupt Distributor when the event flag is set in the Timer Status Register" "Disabled,Enabled" bitfld.long 0x08 1. " COMP_EN ,Enables the comparison between the 64-bit Timer Counter and the related 64-bit Comparator Register." "Disabled,Enabled" textline " " bitfld.long 0x08 0. " TIMER_EN ,Timer enable" "Disabled,Enabled" line.long 0x0C "GTIMINTSTATUS,Global Timer Interrupt Status Register" eventfld.long 0x0C 0. " EVENT_FLG ,Event flag" "0,1" line.long 0x10 "GTIMCOMPVALUEL,Comparator Value Register - Lower" line.long 0x14 "GTIMCOMPVALUEU,Comparator Value Register - Upper" line.long 0x18 "GTIMAUTOINC,Auto-increment Register" tree.end tree "Timer and watchdog (WDTIM) registers" width 17. base ad:0xEC800600 group.long 0x00++0x0F line.long 0x00 "TIMLOAD,Private Timer Load Register" line.long 0x04 "TIMCOUNTER,Private Timer Load Register" line.long 0x08 "TIMCONTROL,Private Timer Control Register" hexmask.long.byte 0x08 8.--15. 1. " PRESCALER ,Prescaler modifies the clock period for the decrementing event for the Counter Register" bitfld.long 0x08 2. " IRQ_EN ,Interrupt ID 29 is set as pending in the Interrupt Distributor when the event flag is set in the Timer Status Register" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " AUTO_RELOAD ,Single shot mode / Auto-reload mode" "Single shot,Auto-reload" bitfld.long 0x08 0. " TIMER_EN ,Timer enable" "Disabled,Enabled" line.long 0x0C "TIMINTSTATUS,Private Timer Interrupt Status Register" eventfld.long 0x0C 0. " EVENT_FLG ,Event flag" "No event,Event" group.long 0x20++0x07 line.long 0x00 "WDOGLOAD,Watchdog Load Register" line.long 0x04 "WDOGCOUNTER,Watchdog Counter Register" if (((per.l(ad:0xEC800600+0x28))&0x8)==0x8) group.long 0x28++0x03 line.long 0x00 "WDOGCONTROL,Watchdog Control Register" hexmask.long.byte 0x00 8.--15. 1. " PRESCALER ,Prescaler modifies the clock period for the decrementing event for the Counter Register" bitfld.long 0x00 3. " WATCHDOG_MODE ,Timer mode / Watchdog mode" "Timer,Watchdog" textline " " bitfld.long 0x00 1. " AUTO_RELOAD ,Single shot mode / Auto-reload mode" "Single shot,Auto-reload" textline " " bitfld.long 0x00 0. " WATCHDOG_EN ,Global watchdog enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "WDOGCONTROL,Watchdog Control Register" hexmask.long.byte 0x00 8.--15. 1. " PRESCALER ,Prescaler modifies the clock period for the decrementing event for the Counter Register" bitfld.long 0x00 3. " WATCHDOG_MODE ,Timer mode / Watchdog mode" "Timer,Watchdog" textline " " bitfld.long 0x00 2. " IT_ENABLE ,Interrupt ID 30 is set as pending in the Interrupt Distributor when the event flag is set in the watchdog Status Register" "Disabled,Enabled" bitfld.long 0x00 1. " AUTO_RELOAD ,Single shot mode / Auto-reload mode" "Single shot,Auto-reload" textline " " bitfld.long 0x00 0. " WATCHDOG_EN ,Global watchdog enable" "Disabled,Enabled" endif group.long 0x2C++0x07 line.long 0x00 "WDOGINTSTATUS,Watchdog Interrupt Status Register" eventfld.long 0x00 0. " EVENT_FLG ,Event flag" "No event,Event" line.long 0x04 "WDOGRESETSTATUS,Watchdog Reset Status Register" eventfld.long 0x04 0. " RESET_FLG ,Reset flag" "No reset,Reset" wgroup.long 0x34++0x03 line.long 0x00 "WDOGDISABLE,Watchdog Disable Register" tree.end tree "Interrupt controller dispatcher registers" width 12. base ad:0xEC801000 group.long 0x00++0x03 line.long 0x00 "ICDDCR,Distributor Control Register" bitfld.long 0x00 1. " EN_NON-SECURE ,Enables the distributor to update register locations for Non-secure interrupts" "Disabled,Enabled" bitfld.long 0x00 0. " EN_SECURE ,Enables the distributor to update register locations for Secure interrupts" "Disabled,Enabled" rgroup.long 0x04++0x07 line.long 0x00 "ICDICTR,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Number of Lockable Shared Peripheral Interrupts (LSPIs) that the controller contains" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Number of security domains that the controller contains" "Reserved,2" textline " " bitfld.long 0x00 5.--7. " CPU_NUMBER ,Cortex-A9 MPCore configuration contains Cortex-A9 processor" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " IT_LINES_NUMBER ,IT Lines number (interrupts/external interrupt lines)" "32/No lines,64/32,96/64,128/96,160/128,192/160,224/192,256/224,?..." line.long 0x04 "ICDIIDR,Distributor Implementer Identification Register" hexmask.long.byte 0x04 24.--31. 1. " IMPLEMENTATION_VERSION ,Gives implementation version number" hexmask.long.word 0x04 12.--23. 1. " REVISION_NUMBER ,Returns the revision number of the controller" textline " " hexmask.long.word 0x04 0.--11. 1. " IMPLEMENTER ,Implementer number" tree "Interrupt Security Registers (0-7)" group.long 0x80++0x1F line.long 0x0 "ICDISR0,Interrupt Security Register_0" bitfld.long 0x0 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x0 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x0 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x0 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x0 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x0 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x0 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x0 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x0 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x0 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x0 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x0 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x0 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x0 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x0 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x0 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x0 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x0 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x0 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x0 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x0 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x0 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x0 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x0 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x0 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x0 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x0 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x0 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x0 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x0 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x0 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x0 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x4 "ICDISR1,Interrupt Security Register_1" bitfld.long 0x4 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x4 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x4 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x4 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x4 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x4 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x4 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x4 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x4 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x4 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x4 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x4 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x4 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x4 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x4 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x4 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x4 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x4 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x4 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x4 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x4 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x4 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x4 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x4 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x4 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x4 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x4 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x4 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x4 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x4 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x4 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x4 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x8 "ICDISR2,Interrupt Security Register_2" bitfld.long 0x8 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x8 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x8 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x8 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x8 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x8 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x8 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x8 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x8 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x8 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x8 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x8 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x8 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x8 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x8 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x8 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x8 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x8 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x8 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x8 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x8 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x8 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x8 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x8 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x8 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x8 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x8 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x8 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x8 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x8 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x8 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x8 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0xC "ICDISR3,Interrupt Security Register_3" bitfld.long 0xC 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0xC 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0xC 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0xC 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0xC 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0xC 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0xC 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0xC 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0xC 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0xC 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0xC 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0xC 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0xC 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0xC 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0xC 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0xC 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0xC 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0xC 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0xC 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0xC 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0xC 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0xC 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0xC 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0xC 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0xC 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0xC 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0xC 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0xC 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0xC 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0xC 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0xC 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0xC 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x10 "ICDISR4,Interrupt Security Register_4" bitfld.long 0x10 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x10 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x10 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x10 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x10 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x10 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x10 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x10 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x10 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x10 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x10 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x10 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x10 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x10 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x10 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x10 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x10 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x10 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x10 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x10 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x10 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x10 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x10 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x10 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x10 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x10 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x10 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x10 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x10 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x10 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x10 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x10 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x14 "ICDISR5,Interrupt Security Register_5" bitfld.long 0x14 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x14 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x14 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x14 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x14 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x14 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x14 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x14 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x14 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x14 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x14 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x14 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x14 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x14 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x14 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x14 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x14 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x14 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x14 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x14 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x14 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x14 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x14 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x14 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x14 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x14 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x14 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x14 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x14 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x14 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x14 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x14 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x18 "ICDISR6,Interrupt Security Register_6" bitfld.long 0x18 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x18 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x18 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x18 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x18 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x18 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x18 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x18 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x18 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x18 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x18 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x18 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x18 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x18 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x18 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x18 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x18 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x18 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x18 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x18 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x18 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x18 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x18 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x18 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x18 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x18 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x18 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x18 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x18 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x18 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x18 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x18 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" line.long 0x1C "ICDISR7,Interrupt Security Register_7" bitfld.long 0x1C 31. " SEC_STATUS_31 ,Security status bit 31" "Non-secure,Secure" bitfld.long 0x1C 30. " SEC_STATUS_30 ,Security status bit 30" "Non-secure,Secure" bitfld.long 0x1C 29. " SEC_STATUS_29 ,Security status bit 29" "Non-secure,Secure" textline " " bitfld.long 0x1C 28. " SEC_STATUS_28 ,Security status bit 28" "Non-secure,Secure" bitfld.long 0x1C 27. " SEC_STATUS_27 ,Security status bit 27" "Non-secure,Secure" bitfld.long 0x1C 26. " SEC_STATUS_26 ,Security status bit 26" "Non-secure,Secure" textline " " bitfld.long 0x1C 25. " SEC_STATUS_25 ,Security status bit 25" "Non-secure,Secure" bitfld.long 0x1C 24. " SEC_STATUS_24 ,Security status bit 24" "Non-secure,Secure" bitfld.long 0x1C 23. " SEC_STATUS_23 ,Security status bit 23" "Non-secure,Secure" textline " " bitfld.long 0x1C 22. " SEC_STATUS_22 ,Security status bit 22" "Non-secure,Secure" bitfld.long 0x1C 21. " SEC_STATUS_21 ,Security status bit 21" "Non-secure,Secure" bitfld.long 0x1C 20. " SEC_STATUS_20 ,Security status bit 20" "Non-secure,Secure" textline " " bitfld.long 0x1C 19. " SEC_STATUS_19 ,Security status bit 19" "Non-secure,Secure" bitfld.long 0x1C 18. " SEC_STATUS_18 ,Security status bit 18" "Non-secure,Secure" bitfld.long 0x1C 17. " SEC_STATUS_17 ,Security status bit 17" "Non-secure,Secure" textline " " bitfld.long 0x1C 16. " SEC_STATUS_16 ,Security status bit 16" "Non-secure,Secure" bitfld.long 0x1C 15. " SEC_STATUS_15 ,Security status bit 15" "Non-secure,Secure" bitfld.long 0x1C 14. " SEC_STATUS_14 ,Security status bit 14" "Non-secure,Secure" textline " " bitfld.long 0x1C 13. " SEC_STATUS_13 ,Security status bit 13" "Non-secure,Secure" bitfld.long 0x1C 12. " SEC_STATUS_12 ,Security status bit 12" "Non-secure,Secure" bitfld.long 0x1C 11. " SEC_STATUS_11 ,Security status bit 11" "Non-secure,Secure" textline " " bitfld.long 0x1C 10. " SEC_STATUS_10 ,Security status bit 10" "Non-secure,Secure" bitfld.long 0x1C 9. " SEC_STATUS_9 ,Security status bit 9" "Non-secure,Secure" bitfld.long 0x1C 8. " SEC_STATUS_8 ,Security status bit 8" "Non-secure,Secure" textline " " bitfld.long 0x1C 7. " SEC_STATUS_7 ,Security status bit 7" "Non-secure,Secure" bitfld.long 0x1C 6. " SEC_STATUS_6 ,Security status bit 6" "Non-secure,Secure" bitfld.long 0x1C 5. " SEC_STATUS_5 ,Security status bit 5" "Non-secure,Secure" textline " " bitfld.long 0x1C 4. " SEC_STATUS_4 ,Security status bit 4" "Non-secure,Secure" bitfld.long 0x1C 3. " SEC_STATUS_3 ,Security status bit 3" "Non-secure,Secure" bitfld.long 0x1C 2. " SEC_STATUS_2 ,Security status bit 2" "Non-secure,Secure" textline " " bitfld.long 0x1C 1. " SEC_STATUS_1 ,Security status bit 1" "Non-secure,Secure" bitfld.long 0x1C 0. " SEC_STATUS_0 ,Security status bit 0" "Non-secure,Secure" tree.end tree "Interrupt Set-Enable Registers (0-7)" group.long 0x100++0x1F line.long 0x0 "ICDISER0,Interrupt Set-Enable Register_0" bitfld.long 0x0 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x0 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x0 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x0 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x0 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x0 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x0 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x0 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x0 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x0 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x0 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x0 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x0 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x0 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x0 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x0 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x0 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x0 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x0 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x0 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x0 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x0 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x0 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x0 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x0 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x0 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x0 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x0 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x0 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x4 "ICDISER1,Interrupt Set-Enable Register_1" bitfld.long 0x4 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x4 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x4 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x4 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x4 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x4 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x4 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x4 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x4 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x4 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x4 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x4 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x4 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x4 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x4 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x4 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x4 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x4 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x4 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x4 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x4 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x4 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x4 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x4 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x4 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x4 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x4 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x4 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x4 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x8 "ICDISER2,Interrupt Set-Enable Register_2" bitfld.long 0x8 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x8 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x8 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x8 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x8 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x8 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x8 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x8 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x8 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x8 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x8 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x8 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x8 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x8 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x8 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x8 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x8 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x8 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x8 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x8 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x8 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x8 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x8 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x8 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x8 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x8 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x8 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x8 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x8 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x8 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x8 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0xC "ICDISER3,Interrupt Set-Enable Register_3" bitfld.long 0xC 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0xC 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0xC 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0xC 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0xC 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0xC 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0xC 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0xC 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0xC 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0xC 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0xC 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0xC 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0xC 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0xC 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0xC 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0xC 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0xC 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0xC 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0xC 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0xC 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0xC 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0xC 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0xC 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0xC 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0xC 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0xC 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0xC 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0xC 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0xC 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0xC 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0xC 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x10 "ICDISER4,Interrupt Set-Enable Register_4" bitfld.long 0x10 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x10 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x10 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x10 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x10 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x10 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x10 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x10 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x10 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x10 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x10 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x10 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x10 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x10 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x10 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x10 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x10 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x10 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x10 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x10 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x10 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x10 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x10 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x10 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x10 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x14 "ICDISER5,Interrupt Set-Enable Register_5" bitfld.long 0x14 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x14 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x14 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x14 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x14 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x14 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x14 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x14 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x14 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x14 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x14 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x14 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x14 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x14 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x14 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x14 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x14 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x14 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x14 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x14 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x14 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x14 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x14 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x14 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x14 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x14 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x14 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x14 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x18 "ICDISER6,Interrupt Set-Enable Register_6" bitfld.long 0x18 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x18 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x18 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x18 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x18 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x18 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x18 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x18 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x18 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x18 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x18 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x18 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x18 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x18 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x18 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x18 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x18 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x18 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x18 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x18 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x18 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x18 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x18 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x18 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x18 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x18 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x18 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x18 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" line.long 0x1C "ICDISER7,Interrupt Set-Enable Register_7" bitfld.long 0x1C 31. " SET_EN_31 ,Set-enable bit 31" "Disabled,Enabled" bitfld.long 0x1C 30. " SET_EN_30 ,Set-enable bit 30" "Disabled,Enabled" bitfld.long 0x1C 29. " SET_EN_29 ,Set-enable bit 29" "Disabled,Enabled" textline " " bitfld.long 0x1C 28. " SET_EN_28 ,Set-enable bit 28" "Disabled,Enabled" bitfld.long 0x1C 27. " SET_EN_27 ,Set-enable bit 27" "Disabled,Enabled" bitfld.long 0x1C 26. " SET_EN_26 ,Set-enable bit 26" "Disabled,Enabled" textline " " bitfld.long 0x1C 25. " SET_EN_25 ,Set-enable bit 25" "Disabled,Enabled" bitfld.long 0x1C 24. " SET_EN_24 ,Set-enable bit 24" "Disabled,Enabled" bitfld.long 0x1C 23. " SET_EN_23 ,Set-enable bit 23" "Disabled,Enabled" textline " " bitfld.long 0x1C 22. " SET_EN_22 ,Set-enable bit 22" "Disabled,Enabled" bitfld.long 0x1C 21. " SET_EN_21 ,Set-enable bit 21" "Disabled,Enabled" bitfld.long 0x1C 20. " SET_EN_20 ,Set-enable bit 20" "Disabled,Enabled" textline " " bitfld.long 0x1C 19. " SET_EN_19 ,Set-enable bit 19" "Disabled,Enabled" bitfld.long 0x1C 18. " SET_EN_18 ,Set-enable bit 18" "Disabled,Enabled" bitfld.long 0x1C 17. " SET_EN_17 ,Set-enable bit 17" "Disabled,Enabled" textline " " bitfld.long 0x1C 16. " SET_EN_16 ,Set-enable bit 16" "Disabled,Enabled" bitfld.long 0x1C 15. " SET_EN_15 ,Set-enable bit 15" "Disabled,Enabled" bitfld.long 0x1C 14. " SET_EN_14 ,Set-enable bit 14" "Disabled,Enabled" textline " " bitfld.long 0x1C 13. " SET_EN_13 ,Set-enable bit 13" "Disabled,Enabled" bitfld.long 0x1C 12. " SET_EN_12 ,Set-enable bit 12" "Disabled,Enabled" bitfld.long 0x1C 11. " SET_EN_11 ,Set-enable bit 11" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " SET_EN_10 ,Set-enable bit 10" "Disabled,Enabled" bitfld.long 0x1C 9. " SET_EN_9 ,Set-enable bit 9" "Disabled,Enabled" bitfld.long 0x1C 8. " SET_EN_8 ,Set-enable bit 8" "Disabled,Enabled" textline " " bitfld.long 0x1C 7. " SET_EN_7 ,Set-enable bit 7" "Disabled,Enabled" bitfld.long 0x1C 6. " SET_EN_6 ,Set-enable bit 6" "Disabled,Enabled" bitfld.long 0x1C 5. " SET_EN_5 ,Set-enable bit 5" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " SET_EN_4 ,Set-enable bit 4" "Disabled,Enabled" bitfld.long 0x1C 3. " SET_EN_3 ,Set-enable bit 3" "Disabled,Enabled" bitfld.long 0x1C 2. " SET_EN_2 ,Set-enable bit 2" "Disabled,Enabled" textline " " bitfld.long 0x1C 1. " SET_EN_1 ,Set-enable bit 1" "Disabled,Enabled" bitfld.long 0x1C 0. " SET_EN_0 ,Set-enable bit 0" "Disabled,Enabled" tree.end tree "Interrupt Clear-Enable Registers (0-7)" group.long 0x180++0x1F line.long 0x0 "ICDICER0,Interrupt Clear-Enable Register_0" bitfld.long 0x0 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x0 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x0 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x0 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x0 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x0 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x0 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x0 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x0 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x0 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x0 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x0 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x0 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x0 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x0 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x0 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x0 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x0 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x0 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x0 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x0 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x0 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x0 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x0 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x0 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x0 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x0 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x0 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x0 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x0 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x4 "ICDICER1,Interrupt Clear-Enable Register_1" bitfld.long 0x4 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x4 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x4 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x4 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x4 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x4 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x4 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x4 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x4 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x4 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x4 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x4 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x4 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x4 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x4 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x4 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x4 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x4 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x4 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x4 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x4 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x4 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x4 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x4 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x4 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x4 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x4 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x4 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x4 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x4 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x4 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x4 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x8 "ICDICER2,Interrupt Clear-Enable Register_2" bitfld.long 0x8 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x8 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x8 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x8 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x8 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x8 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x8 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x8 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x8 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x8 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x8 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x8 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x8 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x8 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x8 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x8 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x8 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x8 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x8 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x8 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x8 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x8 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x8 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x8 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x8 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x8 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x8 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x8 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x8 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x8 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x8 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x8 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0xC "ICDICER3,Interrupt Clear-Enable Register_3" bitfld.long 0xC 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0xC 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0xC 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0xC 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0xC 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0xC 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0xC 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0xC 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0xC 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0xC 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0xC 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0xC 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0xC 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0xC 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0xC 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0xC 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0xC 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0xC 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0xC 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0xC 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0xC 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0xC 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0xC 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0xC 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0xC 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0xC 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0xC 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0xC 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0xC 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0xC 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0xC 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0xC 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x10 "ICDICER4,Interrupt Clear-Enable Register_4" bitfld.long 0x10 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x10 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x10 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x10 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x10 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x10 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x10 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x10 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x10 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x10 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x10 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x10 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x10 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x10 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x10 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x10 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x10 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x10 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x10 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x10 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x10 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x10 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x10 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x10 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x10 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x10 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x10 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x10 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x10 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x10 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x10 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x10 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x14 "ICDICER5,Interrupt Clear-Enable Register_5" bitfld.long 0x14 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x14 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x14 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x14 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x14 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x14 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x14 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x14 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x14 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x14 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x14 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x14 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x14 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x14 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x14 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x14 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x14 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x14 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x14 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x14 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x14 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x14 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x14 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x14 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x14 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x14 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x14 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x14 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x14 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x14 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x14 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x14 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x18 "ICDICER6,Interrupt Clear-Enable Register_6" bitfld.long 0x18 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x18 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x18 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x18 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x18 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x18 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x18 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x18 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x18 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x18 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x18 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x18 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x18 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x18 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x18 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x18 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x18 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x18 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x18 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x18 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x18 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x18 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x18 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x18 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x18 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x18 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x18 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x18 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x18 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x18 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x18 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x18 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" line.long 0x1C "ICDICER7,Interrupt Clear-Enable Register_7" bitfld.long 0x1C 31. " CLR_EN_31 ,Clear-enable bit 31" "Not cleared,Cleared" bitfld.long 0x1C 30. " CLR_EN_30 ,Clear-enable bit 30" "Not cleared,Cleared" bitfld.long 0x1C 29. " CLR_EN_29 ,Clear-enable bit 29" "Not cleared,Cleared" textline " " bitfld.long 0x1C 28. " CLR_EN_28 ,Clear-enable bit 28" "Not cleared,Cleared" bitfld.long 0x1C 27. " CLR_EN_27 ,Clear-enable bit 27" "Not cleared,Cleared" bitfld.long 0x1C 26. " CLR_EN_26 ,Clear-enable bit 26" "Not cleared,Cleared" textline " " bitfld.long 0x1C 25. " CLR_EN_25 ,Clear-enable bit 25" "Not cleared,Cleared" bitfld.long 0x1C 24. " CLR_EN_24 ,Clear-enable bit 24" "Not cleared,Cleared" bitfld.long 0x1C 23. " CLR_EN_23 ,Clear-enable bit 23" "Not cleared,Cleared" textline " " bitfld.long 0x1C 22. " CLR_EN_22 ,Clear-enable bit 22" "Not cleared,Cleared" bitfld.long 0x1C 21. " CLR_EN_21 ,Clear-enable bit 21" "Not cleared,Cleared" bitfld.long 0x1C 20. " CLR_EN_20 ,Clear-enable bit 20" "Not cleared,Cleared" textline " " bitfld.long 0x1C 19. " CLR_EN_19 ,Clear-enable bit 19" "Not cleared,Cleared" bitfld.long 0x1C 18. " CLR_EN_18 ,Clear-enable bit 18" "Not cleared,Cleared" bitfld.long 0x1C 17. " CLR_EN_17 ,Clear-enable bit 17" "Not cleared,Cleared" textline " " bitfld.long 0x1C 16. " CLR_EN_16 ,Clear-enable bit 16" "Not cleared,Cleared" bitfld.long 0x1C 15. " CLR_EN_15 ,Clear-enable bit 15" "Not cleared,Cleared" bitfld.long 0x1C 14. " CLR_EN_14 ,Clear-enable bit 14" "Not cleared,Cleared" textline " " bitfld.long 0x1C 13. " CLR_EN_13 ,Clear-enable bit 13" "Not cleared,Cleared" bitfld.long 0x1C 12. " CLR_EN_12 ,Clear-enable bit 12" "Not cleared,Cleared" bitfld.long 0x1C 11. " CLR_EN_11 ,Clear-enable bit 11" "Not cleared,Cleared" textline " " bitfld.long 0x1C 10. " CLR_EN_10 ,Clear-enable bit 10" "Not cleared,Cleared" bitfld.long 0x1C 9. " CLR_EN_9 ,Clear-enable bit 9" "Not cleared,Cleared" bitfld.long 0x1C 8. " CLR_EN_8 ,Clear-enable bit 8" "Not cleared,Cleared" textline " " bitfld.long 0x1C 7. " CLR_EN_7 ,Clear-enable bit 7" "Not cleared,Cleared" bitfld.long 0x1C 6. " CLR_EN_6 ,Clear-enable bit 6" "Not cleared,Cleared" bitfld.long 0x1C 5. " CLR_EN_5 ,Clear-enable bit 5" "Not cleared,Cleared" textline " " bitfld.long 0x1C 4. " CLR_EN_4 ,Clear-enable bit 4" "Not cleared,Cleared" bitfld.long 0x1C 3. " CLR_EN_3 ,Clear-enable bit 3" "Not cleared,Cleared" bitfld.long 0x1C 2. " CLR_EN_2 ,Clear-enable bit 2" "Not cleared,Cleared" textline " " bitfld.long 0x1C 1. " CLR_EN_1 ,Clear-enable bit 1" "Not cleared,Cleared" bitfld.long 0x1C 0. " CLR_EN_0 ,Clear-enable bit 0" "Not cleared,Cleared" tree.end tree "Interrupt Set-Pending Registers (0-7)" group.long 0x200++0x1F line.long 0x0 "ICDISPR0,Interrupt Set-Pending Register_0" bitfld.long 0x0 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x0 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x0 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x0 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x0 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x0 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x0 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x0 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x0 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x0 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x0 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x0 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x0 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x0 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x0 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x0 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x0 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x0 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x0 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x0 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x0 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x0 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x0 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x0 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x0 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x0 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x0 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x0 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x0 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x0 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x0 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x0 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x4 "ICDISPR1,Interrupt Set-Pending Register_1" bitfld.long 0x4 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x4 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x4 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x4 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x4 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x4 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x4 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x4 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x4 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x4 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x4 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x4 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x4 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x4 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x4 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x4 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x4 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x4 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x4 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x4 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x4 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x4 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x4 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x4 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x4 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x4 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x4 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x4 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x4 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x4 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x4 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x4 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x8 "ICDISPR2,Interrupt Set-Pending Register_2" bitfld.long 0x8 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x8 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x8 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x8 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x8 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x8 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x8 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x8 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x8 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x8 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x8 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x8 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x8 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x8 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x8 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x8 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x8 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x8 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x8 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x8 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x8 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x8 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x8 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x8 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x8 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x8 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x8 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x8 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x8 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x8 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x8 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x8 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0xC "ICDISPR3,Interrupt Set-Pending Register_3" bitfld.long 0xC 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0xC 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0xC 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0xC 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0xC 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0xC 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0xC 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0xC 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0xC 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0xC 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0xC 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0xC 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0xC 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0xC 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0xC 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0xC 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0xC 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0xC 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0xC 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0xC 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0xC 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0xC 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0xC 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0xC 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0xC 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0xC 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0xC 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0xC 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0xC 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0xC 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0xC 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0xC 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x10 "ICDISPR4,Interrupt Set-Pending Register_4" bitfld.long 0x10 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x10 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x10 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x10 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x10 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x10 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x10 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x10 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x10 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x10 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x10 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x10 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x10 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x10 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x10 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x10 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x10 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x10 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x10 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x10 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x10 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x10 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x10 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x10 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x10 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x10 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x10 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x10 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x10 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x10 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x10 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x10 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x14 "ICDISPR5,Interrupt Set-Pending Register_5" bitfld.long 0x14 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x14 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x14 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x14 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x14 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x14 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x14 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x14 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x14 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x14 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x14 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x14 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x14 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x14 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x14 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x14 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x14 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x14 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x14 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x14 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x14 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x14 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x14 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x14 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x14 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x14 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x14 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x14 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x14 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x14 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x14 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x14 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x18 "ICDISPR6,Interrupt Set-Pending Register_6" bitfld.long 0x18 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x18 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x18 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x18 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x18 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x18 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x18 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x18 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x18 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x18 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x18 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x18 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x18 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x18 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x18 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x18 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x18 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x18 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x18 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x18 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x18 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x18 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x18 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x18 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x18 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x18 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x18 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x18 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x18 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x18 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x18 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x18 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" line.long 0x1C "ICDISPR7,Interrupt Set-Pending Register_7" bitfld.long 0x1C 31. " SET_PEND_31 ,Set-pending bit 31" "0,1" bitfld.long 0x1C 30. " SET_PEND_30 ,Set-pending bit 30" "0,1" bitfld.long 0x1C 29. " SET_PEND_29 ,Set-pending bit 29" "0,1" textline " " bitfld.long 0x1C 28. " SET_PEND_28 ,Set-pending bit 28" "0,1" bitfld.long 0x1C 27. " SET_PEND_27 ,Set-pending bit 27" "0,1" bitfld.long 0x1C 26. " SET_PEND_26 ,Set-pending bit 26" "0,1" textline " " bitfld.long 0x1C 25. " SET_PEND_25 ,Set-pending bit 25" "0,1" bitfld.long 0x1C 24. " SET_PEND_24 ,Set-pending bit 24" "0,1" bitfld.long 0x1C 23. " SET_PEND_23 ,Set-pending bit 23" "0,1" textline " " bitfld.long 0x1C 22. " SET_PEND_22 ,Set-pending bit 22" "0,1" bitfld.long 0x1C 21. " SET_PEND_21 ,Set-pending bit 21" "0,1" bitfld.long 0x1C 20. " SET_PEND_20 ,Set-pending bit 20" "0,1" textline " " bitfld.long 0x1C 19. " SET_PEND_19 ,Set-pending bit 19" "0,1" bitfld.long 0x1C 18. " SET_PEND_18 ,Set-pending bit 18" "0,1" bitfld.long 0x1C 17. " SET_PEND_17 ,Set-pending bit 17" "0,1" textline " " bitfld.long 0x1C 16. " SET_PEND_16 ,Set-pending bit 16" "0,1" bitfld.long 0x1C 15. " SET_PEND_15 ,Set-pending bit 15" "0,1" bitfld.long 0x1C 14. " SET_PEND_14 ,Set-pending bit 14" "0,1" textline " " bitfld.long 0x1C 13. " SET_PEND_13 ,Set-pending bit 13" "0,1" bitfld.long 0x1C 12. " SET_PEND_12 ,Set-pending bit 12" "0,1" bitfld.long 0x1C 11. " SET_PEND_11 ,Set-pending bit 11" "0,1" textline " " bitfld.long 0x1C 10. " SET_PEND_10 ,Set-pending bit 10" "0,1" bitfld.long 0x1C 9. " SET_PEND_9 ,Set-pending bit 9" "0,1" bitfld.long 0x1C 8. " SET_PEND_8 ,Set-pending bit 8" "0,1" textline " " bitfld.long 0x1C 7. " SET_PEND_7 ,Set-pending bit 7" "0,1" bitfld.long 0x1C 6. " SET_PEND_6 ,Set-pending bit 6" "0,1" bitfld.long 0x1C 5. " SET_PEND_5 ,Set-pending bit 5" "0,1" textline " " bitfld.long 0x1C 4. " SET_PEND_4 ,Set-pending bit 4" "0,1" bitfld.long 0x1C 3. " SET_PEND_3 ,Set-pending bit 3" "0,1" bitfld.long 0x1C 2. " SET_PEND_2 ,Set-pending bit 2" "0,1" textline " " bitfld.long 0x1C 1. " SET_PEND_1 ,Set-pending bit 1" "0,1" bitfld.long 0x1C 0. " SET_PEND_0 ,Set-pending bit 0" "0,1" tree.end tree "Interrupt Clear-Pending Registers (0-7)" group.long 0x280++0x1F line.long 0x0 "ICDICPR0,Interrupt Clear-Pending Register_0" bitfld.long 0x0 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x0 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x0 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x0 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x0 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x0 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x0 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x0 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x0 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x0 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x0 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x0 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x0 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x0 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x0 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x0 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x0 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x0 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x0 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x0 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x0 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x0 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x0 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x0 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x0 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x0 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x0 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x0 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x0 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x0 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x0 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x0 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x4 "ICDICPR1,Interrupt Clear-Pending Register_1" bitfld.long 0x4 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x4 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x4 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x4 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x4 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x4 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x4 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x4 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x4 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x4 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x4 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x4 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x4 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x4 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x4 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x4 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x4 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x4 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x4 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x4 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x4 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x4 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x4 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x4 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x4 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x4 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x4 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x4 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x4 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x4 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x4 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x4 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x8 "ICDICPR2,Interrupt Clear-Pending Register_2" bitfld.long 0x8 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x8 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x8 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x8 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x8 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x8 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x8 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x8 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x8 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x8 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x8 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x8 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x8 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x8 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x8 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x8 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x8 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x8 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x8 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x8 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x8 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x8 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x8 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x8 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x8 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x8 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x8 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x8 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x8 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x8 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x8 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x8 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0xC "ICDICPR3,Interrupt Clear-Pending Register_3" bitfld.long 0xC 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0xC 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0xC 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0xC 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0xC 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0xC 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0xC 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0xC 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0xC 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0xC 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0xC 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0xC 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0xC 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0xC 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0xC 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0xC 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0xC 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0xC 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0xC 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0xC 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0xC 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0xC 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0xC 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0xC 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0xC 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0xC 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0xC 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0xC 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0xC 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0xC 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0xC 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0xC 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x10 "ICDICPR4,Interrupt Clear-Pending Register_4" bitfld.long 0x10 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x10 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x10 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x10 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x10 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x10 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x10 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x10 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x10 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x10 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x10 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x10 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x10 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x10 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x10 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x10 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x10 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x10 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x10 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x10 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x10 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x10 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x10 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x10 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x10 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x10 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x10 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x10 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x10 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x10 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x10 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x10 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x14 "ICDICPR5,Interrupt Clear-Pending Register_5" bitfld.long 0x14 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x14 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x14 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x14 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x14 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x14 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x14 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x14 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x14 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x14 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x14 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x14 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x14 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x14 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x14 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x14 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x14 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x14 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x14 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x14 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x14 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x14 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x14 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x14 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x14 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x14 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x14 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x14 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x14 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x14 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x14 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x14 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x18 "ICDICPR6,Interrupt Clear-Pending Register_6" bitfld.long 0x18 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x18 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x18 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x18 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x18 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x18 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x18 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x18 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x18 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x18 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x18 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x18 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x18 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x18 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x18 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x18 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x18 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x18 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x18 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x18 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x18 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x18 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x18 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x18 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x18 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x18 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x18 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x18 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x18 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x18 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x18 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x18 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" line.long 0x1C "ICDICPR7,Interrupt Clear-Pending Register_7" bitfld.long 0x1C 31. " CLR_PEND_31 ,Clear-pending bit 31" "0,1" bitfld.long 0x1C 30. " CLR_PEND_30 ,Clear-pending bit 30" "0,1" bitfld.long 0x1C 29. " CLR_PEND_29 ,Clear-pending bit 29" "0,1" textline " " bitfld.long 0x1C 28. " CLR_PEND_28 ,Clear-pending bit 28" "0,1" bitfld.long 0x1C 27. " CLR_PEND_27 ,Clear-pending bit 27" "0,1" bitfld.long 0x1C 26. " CLR_PEND_26 ,Clear-pending bit 26" "0,1" textline " " bitfld.long 0x1C 25. " CLR_PEND_25 ,Clear-pending bit 25" "0,1" bitfld.long 0x1C 24. " CLR_PEND_24 ,Clear-pending bit 24" "0,1" bitfld.long 0x1C 23. " CLR_PEND_23 ,Clear-pending bit 23" "0,1" textline " " bitfld.long 0x1C 22. " CLR_PEND_22 ,Clear-pending bit 22" "0,1" bitfld.long 0x1C 21. " CLR_PEND_21 ,Clear-pending bit 21" "0,1" bitfld.long 0x1C 20. " CLR_PEND_20 ,Clear-pending bit 20" "0,1" textline " " bitfld.long 0x1C 19. " CLR_PEND_19 ,Clear-pending bit 19" "0,1" bitfld.long 0x1C 18. " CLR_PEND_18 ,Clear-pending bit 18" "0,1" bitfld.long 0x1C 17. " CLR_PEND_17 ,Clear-pending bit 17" "0,1" textline " " bitfld.long 0x1C 16. " CLR_PEND_16 ,Clear-pending bit 16" "0,1" bitfld.long 0x1C 15. " CLR_PEND_15 ,Clear-pending bit 15" "0,1" bitfld.long 0x1C 14. " CLR_PEND_14 ,Clear-pending bit 14" "0,1" textline " " bitfld.long 0x1C 13. " CLR_PEND_13 ,Clear-pending bit 13" "0,1" bitfld.long 0x1C 12. " CLR_PEND_12 ,Clear-pending bit 12" "0,1" bitfld.long 0x1C 11. " CLR_PEND_11 ,Clear-pending bit 11" "0,1" textline " " bitfld.long 0x1C 10. " CLR_PEND_10 ,Clear-pending bit 10" "0,1" bitfld.long 0x1C 9. " CLR_PEND_9 ,Clear-pending bit 9" "0,1" bitfld.long 0x1C 8. " CLR_PEND_8 ,Clear-pending bit 8" "0,1" textline " " bitfld.long 0x1C 7. " CLR_PEND_7 ,Clear-pending bit 7" "0,1" bitfld.long 0x1C 6. " CLR_PEND_6 ,Clear-pending bit 6" "0,1" bitfld.long 0x1C 5. " CLR_PEND_5 ,Clear-pending bit 5" "0,1" textline " " bitfld.long 0x1C 4. " CLR_PEND_4 ,Clear-pending bit 4" "0,1" bitfld.long 0x1C 3. " CLR_PEND_3 ,Clear-pending bit 3" "0,1" bitfld.long 0x1C 2. " CLR_PEND_2 ,Clear-pending bit 2" "0,1" textline " " bitfld.long 0x1C 1. " CLR_PEND_1 ,Clear-pending bit 1" "0,1" bitfld.long 0x1C 0. " CLR_PEND_0 ,Clear-pending bit 0" "0,1" tree.end tree "Active status registers (0-7)" rgroup.long 0x300++0x1F line.long 0x0 "ICDABR0,Active Bit register_0" bitfld.long 0x0 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x0 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x0 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x0 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x0 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x0 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x0 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x0 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x0 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x0 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x0 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x0 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x0 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x0 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x0 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x0 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x0 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x0 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x0 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x0 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x0 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x0 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x0 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x0 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x0 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x0 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x0 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x0 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x0 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x0 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x0 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x0 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x4 "ICDABR1,Active Bit register_1" bitfld.long 0x4 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x4 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x4 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x4 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x4 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x4 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x4 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x4 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x4 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x4 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x4 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x4 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x4 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x4 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x4 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x4 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x4 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x4 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x4 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x4 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x4 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x4 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x4 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x4 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x4 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x4 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x4 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x4 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x4 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x4 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x4 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x4 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x8 "ICDABR2,Active Bit register_2" bitfld.long 0x8 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x8 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x8 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x8 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x8 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x8 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x8 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x8 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x8 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x8 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x8 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x8 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x8 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x8 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x8 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x8 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x8 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x8 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x8 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x8 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x8 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x8 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x8 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x8 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x8 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x8 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x8 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x8 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x8 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x8 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x8 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x8 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0xC "ICDABR3,Active Bit register_3" bitfld.long 0xC 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0xC 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0xC 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0xC 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0xC 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0xC 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0xC 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0xC 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0xC 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0xC 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0xC 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0xC 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0xC 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0xC 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0xC 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0xC 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0xC 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0xC 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0xC 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0xC 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0xC 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0xC 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0xC 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0xC 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0xC 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0xC 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0xC 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0xC 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0xC 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0xC 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0xC 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0xC 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x10 "ICDABR4,Active Bit register_4" bitfld.long 0x10 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x10 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x10 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x10 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x10 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x10 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x10 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x10 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x10 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x10 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x10 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x10 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x10 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x10 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x10 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x10 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x10 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x10 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x10 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x10 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x10 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x10 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x10 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x10 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x10 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x10 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x10 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x10 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x10 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x10 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x10 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x10 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x14 "ICDABR5,Active Bit register_5" bitfld.long 0x14 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x14 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x14 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x14 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x14 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x14 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x14 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x14 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x14 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x14 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x14 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x14 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x14 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x14 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x14 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x14 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x14 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x14 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x14 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x14 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x14 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x14 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x14 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x14 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x14 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x14 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x14 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x14 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x14 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x14 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x14 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x14 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x18 "ICDABR6,Active Bit register_6" bitfld.long 0x18 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x18 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x18 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x18 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x18 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x18 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x18 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x18 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x18 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x18 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x18 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x18 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x18 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x18 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x18 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x18 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x18 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x18 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x18 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x18 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x18 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x18 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x18 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x18 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x18 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x18 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x18 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x18 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x18 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x18 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x18 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x18 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" line.long 0x1C "ICDABR7,Active Bit register_7" bitfld.long 0x1C 31. " ACT_STATUS_31 ,Active bit 31" "Not activated,Activated" bitfld.long 0x1C 30. " ACT_STATUS_30 ,Active bit 30" "Not activated,Activated" bitfld.long 0x1C 29. " ACT_STATUS_29 ,Active bit 29" "Not activated,Activated" textline " " bitfld.long 0x1C 28. " ACT_STATUS_28 ,Active bit 28" "Not activated,Activated" bitfld.long 0x1C 27. " ACT_STATUS_27 ,Active bit 27" "Not activated,Activated" bitfld.long 0x1C 26. " ACT_STATUS_26 ,Active bit 26" "Not activated,Activated" textline " " bitfld.long 0x1C 25. " ACT_STATUS_25 ,Active bit 25" "Not activated,Activated" bitfld.long 0x1C 24. " ACT_STATUS_24 ,Active bit 24" "Not activated,Activated" bitfld.long 0x1C 23. " ACT_STATUS_23 ,Active bit 23" "Not activated,Activated" textline " " bitfld.long 0x1C 22. " ACT_STATUS_22 ,Active bit 22" "Not activated,Activated" bitfld.long 0x1C 21. " ACT_STATUS_21 ,Active bit 21" "Not activated,Activated" bitfld.long 0x1C 20. " ACT_STATUS_20 ,Active bit 20" "Not activated,Activated" textline " " bitfld.long 0x1C 19. " ACT_STATUS_19 ,Active bit 19" "Not activated,Activated" bitfld.long 0x1C 18. " ACT_STATUS_18 ,Active bit 18" "Not activated,Activated" bitfld.long 0x1C 17. " ACT_STATUS_17 ,Active bit 17" "Not activated,Activated" textline " " bitfld.long 0x1C 16. " ACT_STATUS_16 ,Active bit 16" "Not activated,Activated" bitfld.long 0x1C 15. " ACT_STATUS_15 ,Active bit 15" "Not activated,Activated" bitfld.long 0x1C 14. " ACT_STATUS_14 ,Active bit 14" "Not activated,Activated" textline " " bitfld.long 0x1C 13. " ACT_STATUS_13 ,Active bit 13" "Not activated,Activated" bitfld.long 0x1C 12. " ACT_STATUS_12 ,Active bit 12" "Not activated,Activated" bitfld.long 0x1C 11. " ACT_STATUS_11 ,Active bit 11" "Not activated,Activated" textline " " bitfld.long 0x1C 10. " ACT_STATUS_10 ,Active bit 10" "Not activated,Activated" bitfld.long 0x1C 9. " ACT_STATUS_9 ,Active bit 9" "Not activated,Activated" bitfld.long 0x1C 8. " ACT_STATUS_8 ,Active bit 8" "Not activated,Activated" textline " " bitfld.long 0x1C 7. " ACT_STATUS_7 ,Active bit 7" "Not activated,Activated" bitfld.long 0x1C 6. " ACT_STATUS_6 ,Active bit 6" "Not activated,Activated" bitfld.long 0x1C 5. " ACT_STATUS_5 ,Active bit 5" "Not activated,Activated" textline " " bitfld.long 0x1C 4. " ACT_STATUS_4 ,Active bit 4" "Not activated,Activated" bitfld.long 0x1C 3. " ACT_STATUS_3 ,Active bit 3" "Not activated,Activated" bitfld.long 0x1C 2. " ACT_STATUS_2 ,Active bit 2" "Not activated,Activated" textline " " bitfld.long 0x1C 1. " ACT_STATUS_1 ,Active bit 1" "Not activated,Activated" bitfld.long 0x1C 0. " ACT_STATUS_0 ,Active bit 0" "Not activated,Activated" tree.end tree "Priority level registers (0-63)" group.long 0x400++0xFF line.long 0x0 "ICDIPTR0,Interrupt Priority Register_0" hexmask.long.byte 0x0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x4 "ICDIPTR1,Interrupt Priority Register_1" hexmask.long.byte 0x4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x8 "ICDIPTR2,Interrupt Priority Register_2" hexmask.long.byte 0x8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xC "ICDIPTR3,Interrupt Priority Register_3" hexmask.long.byte 0xC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x10 "ICDIPTR4,Interrupt Priority Register_4" hexmask.long.byte 0x10 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x10 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x10 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x10 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x14 "ICDIPTR5,Interrupt Priority Register_5" hexmask.long.byte 0x14 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x14 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x14 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x14 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x18 "ICDIPTR6,Interrupt Priority Register_6" hexmask.long.byte 0x18 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x18 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x18 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x18 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x1C "ICDIPTR7,Interrupt Priority Register_7" hexmask.long.byte 0x1C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x1C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x1C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x1C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x20 "ICDIPTR8,Interrupt Priority Register_8" hexmask.long.byte 0x20 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x20 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x20 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x20 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x24 "ICDIPTR9,Interrupt Priority Register_9" hexmask.long.byte 0x24 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x24 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x24 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x24 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x28 "ICDIPTR10,Interrupt Priority Register_10" hexmask.long.byte 0x28 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x28 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x28 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x28 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x2C "ICDIPTR11,Interrupt Priority Register_11" hexmask.long.byte 0x2C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x2C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x2C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x2C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x30 "ICDIPTR12,Interrupt Priority Register_12" hexmask.long.byte 0x30 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x30 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x30 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x30 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x34 "ICDIPTR13,Interrupt Priority Register_13" hexmask.long.byte 0x34 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x34 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x34 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x34 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x38 "ICDIPTR14,Interrupt Priority Register_14" hexmask.long.byte 0x38 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x38 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x38 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x38 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x3C "ICDIPTR15,Interrupt Priority Register_15" hexmask.long.byte 0x3C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x3C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x3C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x3C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x40 "ICDIPTR16,Interrupt Priority Register_16" hexmask.long.byte 0x40 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x40 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x40 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x40 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x44 "ICDIPTR17,Interrupt Priority Register_17" hexmask.long.byte 0x44 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x44 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x44 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x44 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x48 "ICDIPTR18,Interrupt Priority Register_18" hexmask.long.byte 0x48 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x48 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x48 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x48 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x4C "ICDIPTR19,Interrupt Priority Register_19" hexmask.long.byte 0x4C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x4C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x4C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x4C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x50 "ICDIPTR20,Interrupt Priority Register_20" hexmask.long.byte 0x50 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x50 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x50 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x50 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x54 "ICDIPTR21,Interrupt Priority Register_21" hexmask.long.byte 0x54 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x54 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x54 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x54 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x58 "ICDIPTR22,Interrupt Priority Register_22" hexmask.long.byte 0x58 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x58 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x58 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x58 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x5C "ICDIPTR23,Interrupt Priority Register_23" hexmask.long.byte 0x5C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x5C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x5C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x5C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x60 "ICDIPTR24,Interrupt Priority Register_24" hexmask.long.byte 0x60 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x60 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x60 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x60 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x64 "ICDIPTR25,Interrupt Priority Register_25" hexmask.long.byte 0x64 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x64 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x64 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x64 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x68 "ICDIPTR26,Interrupt Priority Register_26" hexmask.long.byte 0x68 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x68 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x68 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x68 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x6C "ICDIPTR27,Interrupt Priority Register_27" hexmask.long.byte 0x6C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x6C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x6C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x6C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x70 "ICDIPTR28,Interrupt Priority Register_28" hexmask.long.byte 0x70 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x70 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x70 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x70 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x74 "ICDIPTR29,Interrupt Priority Register_29" hexmask.long.byte 0x74 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x74 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x74 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x74 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x78 "ICDIPTR30,Interrupt Priority Register_30" hexmask.long.byte 0x78 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x78 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x78 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x78 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x7C "ICDIPTR31,Interrupt Priority Register_31" hexmask.long.byte 0x7C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x7C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x7C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x7C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x80 "ICDIPTR32,Interrupt Priority Register_32" hexmask.long.byte 0x80 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x80 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x80 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x80 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x84 "ICDIPTR33,Interrupt Priority Register_33" hexmask.long.byte 0x84 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x84 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x84 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x84 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x88 "ICDIPTR34,Interrupt Priority Register_34" hexmask.long.byte 0x88 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x88 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x88 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x88 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x8C "ICDIPTR35,Interrupt Priority Register_35" hexmask.long.byte 0x8C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x8C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x8C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x8C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x90 "ICDIPTR36,Interrupt Priority Register_36" hexmask.long.byte 0x90 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x90 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x90 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x90 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x94 "ICDIPTR37,Interrupt Priority Register_37" hexmask.long.byte 0x94 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x94 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x94 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x94 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x98 "ICDIPTR38,Interrupt Priority Register_38" hexmask.long.byte 0x98 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x98 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x98 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x98 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0x9C "ICDIPTR39,Interrupt Priority Register_39" hexmask.long.byte 0x9C 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0x9C 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0x9C 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0x9C 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xA0 "ICDIPTR40,Interrupt Priority Register_40" hexmask.long.byte 0xA0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xA0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xA0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xA0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xA4 "ICDIPTR41,Interrupt Priority Register_41" hexmask.long.byte 0xA4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xA4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xA4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xA4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xA8 "ICDIPTR42,Interrupt Priority Register_42" hexmask.long.byte 0xA8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xA8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xA8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xA8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xAC "ICDIPTR43,Interrupt Priority Register_43" hexmask.long.byte 0xAC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xAC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xAC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xAC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xB0 "ICDIPTR44,Interrupt Priority Register_44" hexmask.long.byte 0xB0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xB0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xB0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xB0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xB4 "ICDIPTR45,Interrupt Priority Register_45" hexmask.long.byte 0xB4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xB4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xB4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xB4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xB8 "ICDIPTR46,Interrupt Priority Register_46" hexmask.long.byte 0xB8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xB8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xB8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xB8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xBC "ICDIPTR47,Interrupt Priority Register_47" hexmask.long.byte 0xBC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xBC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xBC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xBC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xC0 "ICDIPTR48,Interrupt Priority Register_48" hexmask.long.byte 0xC0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xC0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xC0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xC0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xC4 "ICDIPTR49,Interrupt Priority Register_49" hexmask.long.byte 0xC4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xC4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xC4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xC4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xC8 "ICDIPTR50,Interrupt Priority Register_50" hexmask.long.byte 0xC8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xC8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xC8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xC8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xCC "ICDIPTR51,Interrupt Priority Register_51" hexmask.long.byte 0xCC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xCC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xCC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xCC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xD0 "ICDIPTR52,Interrupt Priority Register_52" hexmask.long.byte 0xD0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xD0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xD0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xD0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xD4 "ICDIPTR53,Interrupt Priority Register_53" hexmask.long.byte 0xD4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xD4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xD4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xD4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xD8 "ICDIPTR54,Interrupt Priority Register_54" hexmask.long.byte 0xD8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xD8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xD8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xD8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xDC "ICDIPTR55,Interrupt Priority Register_55" hexmask.long.byte 0xDC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xDC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xDC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xDC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xE0 "ICDIPTR56,Interrupt Priority Register_56" hexmask.long.byte 0xE0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xE0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xE0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xE0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xE4 "ICDIPTR57,Interrupt Priority Register_57" hexmask.long.byte 0xE4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xE4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xE4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xE4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xE8 "ICDIPTR58,Interrupt Priority Register_58" hexmask.long.byte 0xE8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xE8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xE8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xE8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xEC "ICDIPTR59,Interrupt Priority Register_59" hexmask.long.byte 0xEC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xEC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xEC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xEC 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xF0 "ICDIPTR60,Interrupt Priority Register_60" hexmask.long.byte 0xF0 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xF0 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xF0 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xF0 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xF4 "ICDIPTR61,Interrupt Priority Register_61" hexmask.long.byte 0xF4 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xF4 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xF4 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xF4 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xF8 "ICDIPTR62,Interrupt Priority Register_62" hexmask.long.byte 0xF8 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xF8 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xF8 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xF8 0.--7. 1. " PRI0 ,Priority byte offset 0" line.long 0xFC "ICDIPTR63,Interrupt Priority Register_63" hexmask.long.byte 0xFC 24.--31. 1. " PRI3 ,Priority byte offset 3" hexmask.long.byte 0xFC 16.--23. 1. " PRI2 ,Priority byte offset 2" hexmask.long.byte 0xFC 8.--15. 1. " PRI1 ,Priority byte offset 1" hexmask.long.byte 0xFC 0.--7. 1. " PRI0 ,Priority byte offset 0" tree.end tree "SPI Target registers (0-63)" group.long 0x800++0xFF line.long 0x0 "ICDIPTR0,Interrupt Processor Targets Register_0" hexmask.long.byte 0x0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x4 "ICDIPTR1,Interrupt Processor Targets Register_1" hexmask.long.byte 0x4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x8 "ICDIPTR2,Interrupt Processor Targets Register_2" hexmask.long.byte 0x8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xC "ICDIPTR3,Interrupt Processor Targets Register_3" hexmask.long.byte 0xC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x10 "ICDIPTR4,Interrupt Processor Targets Register_4" hexmask.long.byte 0x10 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x10 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x10 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x10 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x14 "ICDIPTR5,Interrupt Processor Targets Register_5" hexmask.long.byte 0x14 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x14 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x14 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x14 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x18 "ICDIPTR6,Interrupt Processor Targets Register_6" hexmask.long.byte 0x18 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x18 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x18 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x18 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x1C "ICDIPTR7,Interrupt Processor Targets Register_7" hexmask.long.byte 0x1C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x1C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x1C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x1C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x20 "ICDIPTR8,Interrupt Processor Targets Register_8" hexmask.long.byte 0x20 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x20 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x20 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x20 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x24 "ICDIPTR9,Interrupt Processor Targets Register_9" hexmask.long.byte 0x24 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x24 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x24 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x24 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x28 "ICDIPTR10,Interrupt Processor Targets Register_10" hexmask.long.byte 0x28 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x28 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x28 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x28 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x2C "ICDIPTR11,Interrupt Processor Targets Register_11" hexmask.long.byte 0x2C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x2C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x2C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x2C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x30 "ICDIPTR12,Interrupt Processor Targets Register_12" hexmask.long.byte 0x30 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x30 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x30 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x30 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x34 "ICDIPTR13,Interrupt Processor Targets Register_13" hexmask.long.byte 0x34 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x34 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x34 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x34 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x38 "ICDIPTR14,Interrupt Processor Targets Register_14" hexmask.long.byte 0x38 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x38 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x38 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x38 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x3C "ICDIPTR15,Interrupt Processor Targets Register_15" hexmask.long.byte 0x3C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x3C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x3C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x3C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x40 "ICDIPTR16,Interrupt Processor Targets Register_16" hexmask.long.byte 0x40 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x40 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x40 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x40 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x44 "ICDIPTR17,Interrupt Processor Targets Register_17" hexmask.long.byte 0x44 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x44 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x44 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x44 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x48 "ICDIPTR18,Interrupt Processor Targets Register_18" hexmask.long.byte 0x48 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x48 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x48 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x48 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x4C "ICDIPTR19,Interrupt Processor Targets Register_19" hexmask.long.byte 0x4C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x4C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x4C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x4C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x50 "ICDIPTR20,Interrupt Processor Targets Register_20" hexmask.long.byte 0x50 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x50 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x50 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x50 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x54 "ICDIPTR21,Interrupt Processor Targets Register_21" hexmask.long.byte 0x54 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x54 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x54 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x54 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x58 "ICDIPTR22,Interrupt Processor Targets Register_22" hexmask.long.byte 0x58 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x58 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x58 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x58 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x5C "ICDIPTR23,Interrupt Processor Targets Register_23" hexmask.long.byte 0x5C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x5C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x5C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x5C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x60 "ICDIPTR24,Interrupt Processor Targets Register_24" hexmask.long.byte 0x60 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x60 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x60 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x60 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x64 "ICDIPTR25,Interrupt Processor Targets Register_25" hexmask.long.byte 0x64 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x64 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x64 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x64 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x68 "ICDIPTR26,Interrupt Processor Targets Register_26" hexmask.long.byte 0x68 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x68 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x68 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x68 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x6C "ICDIPTR27,Interrupt Processor Targets Register_27" hexmask.long.byte 0x6C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x6C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x6C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x6C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x70 "ICDIPTR28,Interrupt Processor Targets Register_28" hexmask.long.byte 0x70 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x70 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x70 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x70 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x74 "ICDIPTR29,Interrupt Processor Targets Register_29" hexmask.long.byte 0x74 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x74 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x74 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x74 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x78 "ICDIPTR30,Interrupt Processor Targets Register_30" hexmask.long.byte 0x78 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x78 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x78 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x78 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x7C "ICDIPTR31,Interrupt Processor Targets Register_31" hexmask.long.byte 0x7C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x7C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x7C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x7C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x80 "ICDIPTR32,Interrupt Processor Targets Register_32" hexmask.long.byte 0x80 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x80 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x80 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x80 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x84 "ICDIPTR33,Interrupt Processor Targets Register_33" hexmask.long.byte 0x84 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x84 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x84 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x84 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x88 "ICDIPTR34,Interrupt Processor Targets Register_34" hexmask.long.byte 0x88 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x88 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x88 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x88 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x8C "ICDIPTR35,Interrupt Processor Targets Register_35" hexmask.long.byte 0x8C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x8C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x8C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x8C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x90 "ICDIPTR36,Interrupt Processor Targets Register_36" hexmask.long.byte 0x90 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x90 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x90 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x90 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x94 "ICDIPTR37,Interrupt Processor Targets Register_37" hexmask.long.byte 0x94 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x94 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x94 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x94 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x98 "ICDIPTR38,Interrupt Processor Targets Register_38" hexmask.long.byte 0x98 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x98 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x98 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x98 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0x9C "ICDIPTR39,Interrupt Processor Targets Register_39" hexmask.long.byte 0x9C 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0x9C 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0x9C 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0x9C 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xA0 "ICDIPTR40,Interrupt Processor Targets Register_40" hexmask.long.byte 0xA0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xA0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xA0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xA0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xA4 "ICDIPTR41,Interrupt Processor Targets Register_41" hexmask.long.byte 0xA4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xA4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xA4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xA4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xA8 "ICDIPTR42,Interrupt Processor Targets Register_42" hexmask.long.byte 0xA8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xA8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xA8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xA8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xAC "ICDIPTR43,Interrupt Processor Targets Register_43" hexmask.long.byte 0xAC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xAC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xAC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xAC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xB0 "ICDIPTR44,Interrupt Processor Targets Register_44" hexmask.long.byte 0xB0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xB0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xB0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xB0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xB4 "ICDIPTR45,Interrupt Processor Targets Register_45" hexmask.long.byte 0xB4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xB4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xB4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xB4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xB8 "ICDIPTR46,Interrupt Processor Targets Register_46" hexmask.long.byte 0xB8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xB8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xB8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xB8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xBC "ICDIPTR47,Interrupt Processor Targets Register_47" hexmask.long.byte 0xBC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xBC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xBC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xBC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xC0 "ICDIPTR48,Interrupt Processor Targets Register_48" hexmask.long.byte 0xC0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xC0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xC0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xC0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xC4 "ICDIPTR49,Interrupt Processor Targets Register_49" hexmask.long.byte 0xC4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xC4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xC4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xC4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xC8 "ICDIPTR50,Interrupt Processor Targets Register_50" hexmask.long.byte 0xC8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xC8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xC8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xC8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xCC "ICDIPTR51,Interrupt Processor Targets Register_51" hexmask.long.byte 0xCC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xCC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xCC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xCC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xD0 "ICDIPTR52,Interrupt Processor Targets Register_52" hexmask.long.byte 0xD0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xD0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xD0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xD0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xD4 "ICDIPTR53,Interrupt Processor Targets Register_53" hexmask.long.byte 0xD4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xD4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xD4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xD4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xD8 "ICDIPTR54,Interrupt Processor Targets Register_54" hexmask.long.byte 0xD8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xD8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xD8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xD8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xDC "ICDIPTR55,Interrupt Processor Targets Register_55" hexmask.long.byte 0xDC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xDC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xDC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xDC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xE0 "ICDIPTR56,Interrupt Processor Targets Register_56" hexmask.long.byte 0xE0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xE0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xE0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xE0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xE4 "ICDIPTR57,Interrupt Processor Targets Register_57" hexmask.long.byte 0xE4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xE4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xE4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xE4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xE8 "ICDIPTR58,Interrupt Processor Targets Register_58" hexmask.long.byte 0xE8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xE8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xE8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xE8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xEC "ICDIPTR59,Interrupt Processor Targets Register_59" hexmask.long.byte 0xEC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xEC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xEC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xEC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xF0 "ICDIPTR60,Interrupt Processor Targets Register_60" hexmask.long.byte 0xF0 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xF0 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xF0 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xF0 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xF4 "ICDIPTR61,Interrupt Processor Targets Register_61" hexmask.long.byte 0xF4 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xF4 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xF4 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xF4 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xF8 "ICDIPTR62,Interrupt Processor Targets Register_62" hexmask.long.byte 0xF8 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xF8 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xF8 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xF8 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" line.long 0xFC "ICDIPTR63,Interrupt Processor Targets Register_63" hexmask.long.byte 0xFC 24.--31. 1. " CPU_TGT3 ,CPU targets byte offset 3" hexmask.long.byte 0xFC 16.--23. 1. " CPU_TGT2 ,CPU targets byte offset 2" hexmask.long.byte 0xFC 8.--15. 1. " CPU_TGT1 ,CPU targets byte offset 1" hexmask.long.byte 0xFC 0.--7. 1. " CPU_TGT0 ,CPU targets byte offset 0" tree.end tree "Interrupt Configuration Registers (0-15)" group.long 0xC00++0x3F line.long 0x0 "ICDICFR0,Interrupt Configuration Register_0" bitfld.long 0x0 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x0 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x0 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x0 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x0 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x0 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x0 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x0 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x0 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x0 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x0 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x0 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x0 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x0 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x0 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x0 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x4 "ICDICFR1,Interrupt Configuration Register_1" bitfld.long 0x4 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x4 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x4 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x4 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x4 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x4 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x4 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x4 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x4 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x4 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x4 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x4 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x4 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x4 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x4 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x4 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x8 "ICDICFR2,Interrupt Configuration Register_2" bitfld.long 0x8 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x8 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x8 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x8 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x8 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x8 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x8 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x8 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x8 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x8 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x8 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x8 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x8 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x8 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x8 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x8 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0xC "ICDICFR3,Interrupt Configuration Register_3" bitfld.long 0xC 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0xC 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0xC 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0xC 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0xC 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0xC 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0xC 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0xC 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0xC 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0xC 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0xC 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0xC 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0xC 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0xC 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0xC 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0xC 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x10 "ICDICFR4,Interrupt Configuration Register_4" bitfld.long 0x10 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x10 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x10 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x10 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x10 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x10 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x10 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x10 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x10 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x10 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x10 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x10 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x10 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x10 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x10 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x10 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x14 "ICDICFR5,Interrupt Configuration Register_5" bitfld.long 0x14 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x14 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x14 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x14 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x14 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x14 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x14 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x14 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x14 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x14 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x14 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x14 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x14 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x14 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x14 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x14 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x18 "ICDICFR6,Interrupt Configuration Register_6" bitfld.long 0x18 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x18 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x18 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x18 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x18 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x18 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x18 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x18 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x18 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x18 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x18 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x18 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x18 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x18 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x18 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x18 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x1C "ICDICFR7,Interrupt Configuration Register_7" bitfld.long 0x1C 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x1C 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x1C 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x1C 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x1C 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x1C 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x1C 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x1C 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x1C 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x1C 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x1C 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x1C 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x1C 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x1C 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x1C 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x1C 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x20 "ICDICFR8,Interrupt Configuration Register_8" bitfld.long 0x20 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x20 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x20 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x20 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x20 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x20 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x20 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x20 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x20 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x20 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x20 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x20 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x20 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x20 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x20 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x20 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x24 "ICDICFR9,Interrupt Configuration Register_9" bitfld.long 0x24 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x24 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x24 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x24 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x24 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x24 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x24 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x24 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x24 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x24 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x24 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x24 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x24 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x24 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x24 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x24 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x28 "ICDICFR10,Interrupt Configuration Register_10" bitfld.long 0x28 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x28 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x28 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x28 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x28 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x28 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x28 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x28 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x28 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x28 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x28 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x28 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x28 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x28 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x28 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x28 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x2C "ICDICFR11,Interrupt Configuration Register_11" bitfld.long 0x2C 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x2C 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x2C 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x2C 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x2C 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x2C 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x2C 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x2C 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x2C 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x2C 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x2C 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x2C 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x2C 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x2C 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x2C 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x2C 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x30 "ICDICFR12,Interrupt Configuration Register_12" bitfld.long 0x30 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x30 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x30 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x30 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x30 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x30 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x30 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x30 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x30 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x30 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x30 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x30 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x30 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x30 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x30 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x30 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x34 "ICDICFR13,Interrupt Configuration Register_13" bitfld.long 0x34 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x34 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x34 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x34 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x34 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x34 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x34 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x34 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x34 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x34 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x34 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x34 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x34 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x34 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x34 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x34 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x38 "ICDICFR14,Interrupt Configuration Register_14" bitfld.long 0x38 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x38 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x38 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x38 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x38 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x38 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x38 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x38 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x38 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x38 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x38 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x38 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x38 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x38 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x38 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x38 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" line.long 0x3C "ICDICFR15,Interrupt Configuration Register_15" bitfld.long 0x3C 30.--31. " CONF15 ,Int level/edge-triggered Field 15 + base" "0,1,2,3" bitfld.long 0x3C 28.--29. " CONF14 ,Int level/edge-triggered Field 14 + base" "0,1,2,3" bitfld.long 0x3C 26.--27. " CONF13 ,Int level/edge-triggered Field 13 + base" "0,1,2,3" textline " " bitfld.long 0x3C 24.--25. " CONF12 ,Int level/edge-triggered Field 12 + base" "0,1,2,3" bitfld.long 0x3C 22.--23. " CONF11 ,Int level/edge-triggered Field 11 + base" "0,1,2,3" bitfld.long 0x3C 20.--21. " CONF10 ,Int level/edge-triggered Field 10 + base" "0,1,2,3" textline " " bitfld.long 0x3C 18.--19. " CONF9 ,Int level/edge-triggered Field 9 + base" "0,1,2,3" bitfld.long 0x3C 16.--17. " CONF8 ,Int level/edge-triggered Field 8 + base" "0,1,2,3" bitfld.long 0x3C 14.--15. " CONF7 ,Int level/edge-triggered Field 7 + base" "0,1,2,3" textline " " bitfld.long 0x3C 12.--13. " CONF6 ,Int level/edge-triggered Field 6 + base" "0,1,2,3" bitfld.long 0x3C 10.--11. " CONF5 ,Int level/edge-triggered Field 5 + base" "0,1,2,3" bitfld.long 0x3C 8.--9. " CONF4 ,Int level/edge-triggered Field 4 + base" "0,1,2,3" textline " " bitfld.long 0x3C 6.--7. " CONF3 ,Int level/edge-triggered Field 3 + base" "0,1,2,3" bitfld.long 0x3C 4.--5. " CONF2 ,Int level/edge-triggered Field 2 + base" "0,1,2,3" bitfld.long 0x3C 2.--3. " CONF1 ,Int level/edge-triggered Field 1 + base" "0,1,2,3" textline " " bitfld.long 0x3C 0.--1. " CONF0 ,Int level/edge-triggered Field 0 + base" "0,1,2,3" tree.end tree "PPI & SPI STATUS Registers" rgroup.long 0xD00++0x1F line.long 0x00 "PPI_STATUS,PPI Status Register" bitfld.long 0x00 15. " PPI4_STATUS ,NIRQ status" "Low,High" bitfld.long 0x00 14. " PPI3_STATUS ,Private watchdog status" "Low,High" bitfld.long 0x00 13. " PPI2_STATUS ,Private timer status" "Low,High" textline " " bitfld.long 0x00 12. " PPI1_STATUS ,NFIQ status" "Low,High" bitfld.long 0x00 11. " PPI0_STATUS ,Global timer status" "Low,High" line.long 0x04 "SPI_STATUS0,SPI Status Register 0" bitfld.long 0x04 31. " SPI31_STATUS ,Status of the IRQSS31" "Low,High" bitfld.long 0x04 30. " SPI30_STATUS ,Status of the IRQSS30" "Low,High" bitfld.long 0x04 29. " SPI29_STATUS ,Status of the IRQSS29" "Low,High" textline " " bitfld.long 0x04 28. " SPI28_STATUS ,Status of the IRQS28" "Low,High" bitfld.long 0x04 27. " SPI27_STATUS ,Status of the IRQS27" "Low,High" bitfld.long 0x04 26. " SPI26_STATUS ,Status of the IRQS26" "Low,High" textline " " bitfld.long 0x04 25. " SPI25_STATUS ,Status of the IRQS25" "Low,High" bitfld.long 0x04 24. " SPI24_STATUS ,Status of the IRQS24" "Low,High" bitfld.long 0x04 23. " SPI23_STATUS ,Status of the IRQS23" "Low,High" textline " " bitfld.long 0x04 22. " SPI22_STATUS ,Status of the IRQS22" "Low,High" bitfld.long 0x04 21. " SPI21_STATUS ,Status of the IRQS21" "Low,High" bitfld.long 0x04 20. " SPI20_STATUS ,Status of the IRQS20" "Low,High" textline " " bitfld.long 0x04 19. " SPI19_STATUS ,Status of the IRQS19" "Low,High" bitfld.long 0x04 18. " SPI18_STATUS ,Status of the IRQS18" "Low,High" bitfld.long 0x04 17. " SPI17_STATUS ,Status of the IRQS17" "Low,High" textline " " bitfld.long 0x04 16. " SPI16_STATUS ,Status of the IRQS16" "Low,High" bitfld.long 0x04 15. " SPI15_STATUS ,Status of the IRQS15" "Low,High" bitfld.long 0x04 14. " SPI14_STATUS ,Status of the IRQS14" "Low,High" textline " " bitfld.long 0x04 13. " SPI13_STATUS ,Status of the IRQS13" "Low,High" bitfld.long 0x04 12. " SPI12_STATUS ,Status of the IRQS12" "Low,High" bitfld.long 0x04 11. " SPI11_STATUS ,Status of the IRQS11" "Low,High" textline " " bitfld.long 0x04 10. " SPI10_STATUS ,Status of the IRQS10" "Low,High" bitfld.long 0x04 9. " SPI9_STATUS ,Status of the IRQS9" "Low,High" bitfld.long 0x04 8. " SPI8_STATUS ,Status of the IRQS8" "Low,High" textline " " bitfld.long 0x04 7. " SPI7_STATUS ,Status of the IRQS7" "Low,High" bitfld.long 0x04 6. " SPI6_STATUS ,Status of the IRQS6" "Low,High" bitfld.long 0x04 5. " SPI5_STATUS ,Status of the IRQS5" "Low,High" textline " " bitfld.long 0x04 4. " SPI4_STATUS ,Status of the IRQS4" "Low,High" bitfld.long 0x04 3. " SPI3_STATUS ,Status of the IRQS3" "Low,High" bitfld.long 0x04 2. " SPI2_STATUS ,Status of the IRQS2" "Low,High" textline " " bitfld.long 0x04 1. " SPI1_STATUS ,Status of the IRQS1" "Low,High" bitfld.long 0x04 0. " SPI0_STATUS ,Status of the IRQS0" "Low,High" line.long 0x08 "SPI_STATUS1,SPI Status Register 1" bitfld.long 0x08 31. " SPI63_STATUS ,Status of the IRQS63" "Low,High" bitfld.long 0x08 30. " SPI62_STATUS ,Status of the IRQS62" "Low,High" bitfld.long 0x08 29. " SPI61_STATUS ,Status of the IRQS61" "Low,High" textline " " bitfld.long 0x08 28. " SPI60_STATUS ,Status of the IRQS60" "Low,High" bitfld.long 0x08 27. " SPI59_STATUS ,Status of the IRQS59" "Low,High" bitfld.long 0x08 26. " SPI58_STATUS ,Status of the IRQS58" "Low,High" textline " " bitfld.long 0x08 25. " SPI57_STATUS ,Status of the IRQS57" "Low,High" bitfld.long 0x08 24. " SPI56_STATUS ,Status of the IRQS56" "Low,High" bitfld.long 0x08 23. " SPI55_STATUS ,Status of the IRQS55" "Low,High" textline " " bitfld.long 0x08 22. " SPI54_STATUS ,Status of the IRQS54" "Low,High" bitfld.long 0x08 21. " SPI53_STATUS ,Status of the IRQS53" "Low,High" bitfld.long 0x08 20. " SPI52_STATUS ,Status of the IRQS52" "Low,High" textline " " bitfld.long 0x08 19. " SPI51_STATUS ,Status of the IRQS51" "Low,High" bitfld.long 0x08 18. " SPI50_STATUS ,Status of the IRQS50" "Low,High" bitfld.long 0x08 17. " SPI49_STATUS ,Status of the IRQS49" "Low,High" textline " " bitfld.long 0x08 16. " SPI48_STATUS ,Status of the IRQS48" "Low,High" bitfld.long 0x08 15. " SPI47_STATUS ,Status of the IRQS47" "Low,High" bitfld.long 0x08 14. " SPI46_STATUS ,Status of the IRQS46" "Low,High" textline " " bitfld.long 0x08 13. " SPI45_STATUS ,Status of the IRQS45" "Low,High" bitfld.long 0x08 12. " SPI44_STATUS ,Status of the IRQS44" "Low,High" bitfld.long 0x08 11. " SPI43_STATUS ,Status of the IRQS43" "Low,High" textline " " bitfld.long 0x08 10. " SPI42_STATUS ,Status of the IRQS42" "Low,High" bitfld.long 0x08 9. " SPI41_STATUS ,Status of the IRQS41" "Low,High" bitfld.long 0x08 8. " SPI40_STATUS ,Status of the IRQS40" "Low,High" textline " " bitfld.long 0x08 7. " SPI39_STATUS ,Status of the IRQS39" "Low,High" bitfld.long 0x08 6. " SPI38_STATUS ,Status of the IRQS38" "Low,High" bitfld.long 0x08 5. " SPI37_STATUS ,Status of the IRQS37" "Low,High" textline " " bitfld.long 0x08 4. " SPI36_STATUS ,Status of the IRQS36" "Low,High" bitfld.long 0x08 3. " SPI35_STATUS ,Status of the IRQS35" "Low,High" bitfld.long 0x08 2. " SPI34_STATUS ,Status of the IRQS34" "Low,High" textline " " bitfld.long 0x08 1. " SPI33_STATUS ,Status of the IRQS33" "Low,High" bitfld.long 0x08 0. " SPI32_STATUS ,Status of the IRQS32" "Low,High" line.long 0x0C "SPI_STATUS2,SPI Status Register 2" bitfld.long 0x0C 31. " SPI95_STATUS ,Status of the IRQS95" "Low,High" bitfld.long 0x0C 30. " SPI94_STATUS ,Status of the IRQS94" "Low,High" bitfld.long 0x0C 29. " SPI93_STATUS ,Status of the IRQS93" "Low,High" textline " " bitfld.long 0x0C 28. " SPI92_STATUS ,Status of the IRQS92" "Low,High" bitfld.long 0x0C 27. " SPI91_STATUS ,Status of the IRQS91" "Low,High" bitfld.long 0x0C 26. " SPI90_STATUS ,Status of the IRQS90" "Low,High" textline " " bitfld.long 0x0C 25. " SPI89_STATUS ,Status of the IRQS89" "Low,High" bitfld.long 0x0C 24. " SPI88_STATUS ,Status of the IRQS88" "Low,High" bitfld.long 0x0C 23. " SPI87_STATUS ,Status of the IRQS87" "Low,High" textline " " bitfld.long 0x0C 22. " SPI86_STATUS ,Status of the IRQS86" "Low,High" bitfld.long 0x0C 21. " SPI85_STATUS ,Status of the IRQS85" "Low,High" bitfld.long 0x0C 20. " SPI84_STATUS ,Status of the IRQS84" "Low,High" textline " " bitfld.long 0x0C 19. " SPI83_STATUS ,Status of the IRQS83" "Low,High" bitfld.long 0x0C 18. " SPI82_STATUS ,Status of the IRQS82" "Low,High" bitfld.long 0x0C 17. " SPI81_STATUS ,Status of the IRQS81" "Low,High" textline " " bitfld.long 0x0C 16. " SPI80_STATUS ,Status of the IRQS80" "Low,High" bitfld.long 0x0C 15. " SPI79_STATUS ,Status of the IRQS79" "Low,High" bitfld.long 0x0C 14. " SPI78_STATUS ,Status of the IRQS78" "Low,High" textline " " bitfld.long 0x0C 13. " SPI77_STATUS ,Status of the IRQS77" "Low,High" bitfld.long 0x0C 12. " SPI76_STATUS ,Status of the IRQS76" "Low,High" bitfld.long 0x0C 11. " SPI75_STATUS ,Status of the IRQS75" "Low,High" textline " " bitfld.long 0x0C 10. " SPI74_STATUS ,Status of the IRQS74" "Low,High" bitfld.long 0x0C 9. " SPI73_STATUS ,Status of the IRQS73" "Low,High" bitfld.long 0x0C 8. " SPI72_STATUS ,Status of the IRQS72" "Low,High" textline " " bitfld.long 0x0C 7. " SPI71_STATUS ,Status of the IRQS71" "Low,High" bitfld.long 0x0C 6. " SPI70_STATUS ,Status of the IRQS70" "Low,High" bitfld.long 0x0C 5. " SPI69_STATUS ,Status of the IRQS69" "Low,High" textline " " bitfld.long 0x0C 4. " SPI68_STATUS ,Status of the IRQS68" "Low,High" bitfld.long 0x0C 3. " SPI67_STATUS ,Status of the IRQS67" "Low,High" bitfld.long 0x0C 2. " SPI66_STATUS ,Status of the IRQS66" "Low,High" textline " " bitfld.long 0x0C 1. " SPI65_STATUS ,Status of the IRQS65" "Low,High" bitfld.long 0x0C 0. " SPI64_STATUS ,Status of the IRQS64" "Low,High" line.long 0x10 "SPI_STATUS3,SPI Status Register 3" bitfld.long 0x10 31. " SPI127_STATUS ,Status of the IRQS127" "Low,High" bitfld.long 0x10 30. " SPI126_STATUS ,Status of the IRQS126" "Low,High" bitfld.long 0x10 29. " SPI125_STATUS ,Status of the IRQS125" "Low,High" textline " " bitfld.long 0x10 28. " SPI124_STATUS ,Status of the IRQS124" "Low,High" bitfld.long 0x10 27. " SPI123_STATUS ,Status of the IRQS123" "Low,High" bitfld.long 0x10 26. " SPI122_STATUS ,Status of the IRQS122" "Low,High" textline " " bitfld.long 0x10 25. " SPI121_STATUS ,Status of the IRQS121" "Low,High" bitfld.long 0x10 24. " SPI120_STATUS ,Status of the IRQS120" "Low,High" bitfld.long 0x10 23. " SPI119_STATUS ,Status of the IRQS119" "Low,High" textline " " bitfld.long 0x10 22. " SPI118_STATUS ,Status of the IRQS118" "Low,High" bitfld.long 0x10 21. " SPI117_STATUS ,Status of the IRQS117" "Low,High" bitfld.long 0x10 20. " SPI116_STATUS ,Status of the IRQS116" "Low,High" textline " " bitfld.long 0x10 19. " SPI115_STATUS ,Status of the IRQS115" "Low,High" bitfld.long 0x10 18. " SPI114_STATUS ,Status of the IRQS114" "Low,High" bitfld.long 0x10 17. " SPI113_STATUS ,Status of the IRQS113" "Low,High" textline " " bitfld.long 0x10 16. " SPI112_STATUS ,Status of the IRQS112" "Low,High" bitfld.long 0x10 15. " SPI111_STATUS ,Status of the IRQS111" "Low,High" bitfld.long 0x10 14. " SPI110_STATUS ,Status of the IRQS110" "Low,High" textline " " bitfld.long 0x10 13. " SPI109_STATUS ,Status of the IRQS109" "Low,High" bitfld.long 0x10 12. " SPI108_STATUS ,Status of the IRQS108" "Low,High" bitfld.long 0x10 11. " SPI107_STATUS ,Status of the IRQS107" "Low,High" textline " " bitfld.long 0x10 10. " SPI106_STATUS ,Status of the IRQS106" "Low,High" bitfld.long 0x10 9. " SPI105_STATUS ,Status of the IRQS105" "Low,High" bitfld.long 0x10 8. " SPI104_STATUS ,Status of the IRQS104" "Low,High" textline " " bitfld.long 0x10 7. " SPI103_STATUS ,Status of the IRQS103" "Low,High" bitfld.long 0x10 6. " SPI102_STATUS ,Status of the IRQS102" "Low,High" bitfld.long 0x10 5. " SPI101_STATUS ,Status of the IRQS101" "Low,High" textline " " bitfld.long 0x10 4. " SPI100_STATUS ,Status of the IRQS100" "Low,High" bitfld.long 0x10 3. " SPI99_STATUS ,Status of the IRQS99" "Low,High" bitfld.long 0x10 2. " SPI98_STATUS ,Status of the IRQS98" "Low,High" textline " " bitfld.long 0x10 1. " SPI97_STATUS ,Status of the IRQS97" "Low,High" bitfld.long 0x10 0. " SPI96_STATUS ,Status of the IRQS96" "Low,High" line.long 0x14 "SPI_STATUS4,SPI Status Register 4" bitfld.long 0x14 31. " SPI159_STATUS ,Status of the IRQS159" "Low,High" bitfld.long 0x14 30. " SPI158_STATUS ,Status of the IRQS158" "Low,High" bitfld.long 0x14 29. " SPI157_STATUS ,Status of the IRQS157" "Low,High" textline " " bitfld.long 0x14 28. " SPI156_STATUS ,Status of the IRQS156" "Low,High" bitfld.long 0x14 27. " SPI155_STATUS ,Status of the IRQS155" "Low,High" bitfld.long 0x14 26. " SPI154_STATUS ,Status of the IRQS154" "Low,High" textline " " bitfld.long 0x14 25. " SPI153_STATUS ,Status of the IRQS153" "Low,High" bitfld.long 0x14 24. " SPI152_STATUS ,Status of the IRQS152" "Low,High" bitfld.long 0x14 23. " SPI151_STATUS ,Status of the IRQS151" "Low,High" textline " " bitfld.long 0x14 22. " SPI150_STATUS ,Status of the IRQS150" "Low,High" bitfld.long 0x14 21. " SPI149_STATUS ,Status of the IRQS149" "Low,High" bitfld.long 0x14 20. " SPI148_STATUS ,Status of the IRQS148" "Low,High" textline " " bitfld.long 0x14 19. " SPI147_STATUS ,Status of the IRQS147" "Low,High" bitfld.long 0x14 18. " SPI146_STATUS ,Status of the IRQS146" "Low,High" bitfld.long 0x14 17. " SPI145_STATUS ,Status of the IRQS145" "Low,High" textline " " bitfld.long 0x14 16. " SPI144_STATUS ,Status of the IRQS144" "Low,High" bitfld.long 0x14 15. " SPI143_STATUS ,Status of the IRQS143" "Low,High" bitfld.long 0x14 14. " SPI142_STATUS ,Status of the IRQS142" "Low,High" textline " " bitfld.long 0x14 13. " SPI141_STATUS ,Status of the IRQS141" "Low,High" bitfld.long 0x14 12. " SPI140_STATUS ,Status of the IRQS140" "Low,High" bitfld.long 0x14 11. " SPI139_STATUS ,Status of the IRQS139" "Low,High" textline " " bitfld.long 0x14 10. " SPI138_STATUS ,Status of the IRQS138" "Low,High" bitfld.long 0x14 9. " SPI137_STATUS ,Status of the IRQS137" "Low,High" bitfld.long 0x14 8. " SPI136_STATUS ,Status of the IRQS136" "Low,High" textline " " bitfld.long 0x14 7. " SPI135_STATUS ,Status of the IRQS135" "Low,High" bitfld.long 0x14 6. " SPI134_STATUS ,Status of the IRQS134" "Low,High" bitfld.long 0x14 5. " SPI133_STATUS ,Status of the IRQS133" "Low,High" textline " " bitfld.long 0x14 4. " SPI132_STATUS ,Status of the IRQS132" "Low,High" bitfld.long 0x14 3. " SPI131_STATUS ,Status of the IRQS131" "Low,High" bitfld.long 0x14 2. " SPI130_STATUS ,Status of the IRQS130" "Low,High" textline " " bitfld.long 0x14 1. " SPI129_STATUS ,Status of the IRQS129" "Low,High" bitfld.long 0x14 0. " SPI128_STATUS ,Status of the IRQS128" "Low,High" line.long 0x18 "SPI_STATUS5,SPI Status Register 5" bitfld.long 0x18 31. " SPI191_STATUS ,Status of the IRQS191" "Low,High" bitfld.long 0x18 30. " SPI190_STATUS ,Status of the IRQS190" "Low,High" bitfld.long 0x18 29. " SPI189_STATUS ,Status of the IRQS189" "Low,High" textline " " bitfld.long 0x18 28. " SPI188_STATUS ,Status of the IRQS188" "Low,High" bitfld.long 0x18 27. " SPI187_STATUS ,Status of the IRQS187" "Low,High" bitfld.long 0x18 26. " SPI186_STATUS ,Status of the IRQS186" "Low,High" textline " " bitfld.long 0x18 25. " SPI185_STATUS ,Status of the IRQS185" "Low,High" bitfld.long 0x18 24. " SPI184_STATUS ,Status of the IRQS184" "Low,High" bitfld.long 0x18 23. " SPI183_STATUS ,Status of the IRQS183" "Low,High" textline " " bitfld.long 0x18 22. " SPI182_STATUS ,Status of the IRQS182" "Low,High" bitfld.long 0x18 21. " SPI181_STATUS ,Status of the IRQS181" "Low,High" bitfld.long 0x18 20. " SPI180_STATUS ,Status of the IRQS180" "Low,High" textline " " bitfld.long 0x18 19. " SPI179_STATUS ,Status of the IRQS179" "Low,High" bitfld.long 0x18 18. " SPI178_STATUS ,Status of the IRQS178" "Low,High" bitfld.long 0x18 17. " SPI177_STATUS ,Status of the IRQS177" "Low,High" textline " " bitfld.long 0x18 16. " SPI176_STATUS ,Status of the IRQS176" "Low,High" bitfld.long 0x18 15. " SPI175_STATUS ,Status of the IRQS175" "Low,High" bitfld.long 0x18 14. " SPI174_STATUS ,Status of the IRQS174" "Low,High" textline " " bitfld.long 0x18 13. " SPI173_STATUS ,Status of the IRQS173" "Low,High" bitfld.long 0x18 12. " SPI172_STATUS ,Status of the IRQS172" "Low,High" bitfld.long 0x18 11. " SPI171_STATUS ,Status of the IRQS171" "Low,High" textline " " bitfld.long 0x18 10. " SPI170_STATUS ,Status of the IRQS170" "Low,High" bitfld.long 0x18 9. " SPI169_STATUS ,Status of the IRQS169" "Low,High" bitfld.long 0x18 8. " SPI168_STATUS ,Status of the IRQS168" "Low,High" textline " " bitfld.long 0x18 7. " SPI167_STATUS ,Status of the IRQS167" "Low,High" bitfld.long 0x18 6. " SPI166_STATUS ,Status of the IRQS166" "Low,High" bitfld.long 0x18 5. " SPI165_STATUS ,Status of the IRQS165" "Low,High" textline " " bitfld.long 0x18 4. " SPI164_STATUS ,Status of the IRQS164" "Low,High" bitfld.long 0x18 3. " SPI163_STATUS ,Status of the IRQS163" "Low,High" bitfld.long 0x18 2. " SPI162_STATUS ,Status of the IRQS162" "Low,High" textline " " bitfld.long 0x18 1. " SPI161_STATUS ,Status of the IRQS161" "Low,High" bitfld.long 0x18 0. " SPI160_STATUS ,Status of the IRQS160" "Low,High" line.long 0x1C "SPI_STATUS6,SPI Status Register 6" bitfld.long 0x1C 31. " SPI223_STATUS ,Status of the IRQS223" "Low,High" bitfld.long 0x1C 30. " SPI222_STATUS ,Status of the IRQS222" "Low,High" bitfld.long 0x1C 29. " SPI221_STATUS ,Status of the IRQS221" "Low,High" textline " " bitfld.long 0x1C 28. " SPI220_STATUS ,Status of the IRQS220" "Low,High" bitfld.long 0x1C 27. " SPI219_STATUS ,Status of the IRQS219" "Low,High" bitfld.long 0x1C 26. " SPI218_STATUS ,Status of the IRQS218" "Low,High" textline " " bitfld.long 0x1C 25. " SPI217_STATUS ,Status of the IRQS217" "Low,High" bitfld.long 0x1C 24. " SPI216_STATUS ,Status of the IRQS216" "Low,High" bitfld.long 0x1C 23. " SPI215_STATUS ,Status of the IRQS215" "Low,High" textline " " bitfld.long 0x1C 22. " SPI214_STATUS ,Status of the IRQS214" "Low,High" bitfld.long 0x1C 21. " SPI213_STATUS ,Status of the IRQS213" "Low,High" bitfld.long 0x1C 20. " SPI212_STATUS ,Status of the IRQS212" "Low,High" textline " " bitfld.long 0x1C 19. " SPI211_STATUS ,Status of the IRQS211" "Low,High" bitfld.long 0x1C 18. " SPI210_STATUS ,Status of the IRQS210" "Low,High" bitfld.long 0x1C 17. " SPI209_STATUS ,Status of the IRQS209" "Low,High" textline " " bitfld.long 0x1C 16. " SPI208_STATUS ,Status of the IRQS208" "Low,High" bitfld.long 0x1C 15. " SPI207_STATUS ,Status of the IRQS207" "Low,High" bitfld.long 0x1C 14. " SPI206_STATUS ,Status of the IRQS206" "Low,High" textline " " bitfld.long 0x1C 13. " SPI205_STATUS ,Status of the IRQS205" "Low,High" bitfld.long 0x1C 12. " SPI204_STATUS ,Status of the IRQS204" "Low,High" bitfld.long 0x1C 11. " SPI203_STATUS ,Status of the IRQS203" "Low,High" textline " " bitfld.long 0x1C 10. " SPI202_STATUS ,Status of the IRQS202" "Low,High" bitfld.long 0x1C 9. " SPI201_STATUS ,Status of the IRQS201" "Low,High" bitfld.long 0x1C 8. " SPI200_STATUS ,Status of the IRQS200" "Low,High" textline " " bitfld.long 0x1C 7. " SPI199_STATUS ,Status of the IRQS199" "Low,High" bitfld.long 0x1C 6. " SPI198_STATUS ,Status of the IRQS198" "Low,High" bitfld.long 0x1C 5. " SPI197_STATUS ,Status of the IRQS197" "Low,High" textline " " bitfld.long 0x1C 4. " SPI196_STATUS ,Status of the IRQS196" "Low,High" bitfld.long 0x1C 3. " SPI195_STATUS ,Status of the IRQS195" "Low,High" bitfld.long 0x1C 2. " SPI194_STATUS ,Status of the IRQS194" "Low,High" textline " " bitfld.long 0x1C 1. " SPI193_STATUS ,Status of the IRQS193" "Low,High" bitfld.long 0x1C 0. " SPI192_STATUS ,Status of the IRQS192" "Low,High" tree.end wgroup.long 0xF00++0x03 line.long 0x00 "ICDSGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TGT_LIST_FILT ,Target list filter" "0,1,2,3" hexmask.long.byte 0x00 16.--23. 1. " CPU_TGT_LIST ,CPU target list" bitfld.long 0x00 15. " SATT ,Specifies the required security value of the SGI" "0,1" textline " " bitfld.long 0x00 0.--3. " SGIINTID ,Interrupt ID of the SGI to send to the specified CPU interfaces" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 13. tree "Peripheral Identification Registers" rgroup.long 0xFD0++0x03 line.long 0x00 "PERIPH_ID_4,Peripheral Identification Register 4" bitfld.long 0x00 4.--7. " COUNT_4KB ,Number of 4KB address blocks you require" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " JEP106_C_CODE ,JEP106 continuation code value represents how many 0x7F continuation characters occur in the manufacturers identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0xFD4++0x03 line.long 0x00 "PERIPH_ID_5,Peripheral Identification Register 5" rgroup.long 0xFD8++0x03 line.long 0x00 "PERIPH_ID_6,Peripheral Identification Register 6" rgroup.long 0xFDC++0x03 line.long 0x00 "PERIPH_ID_7,Peripheral Identification Register 7" rgroup.long 0xFE0++0x0F line.long 0x00 "PERIPH_ID_0,Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0 ,Part_number" line.long 0x04 "PERIPH_ID_1,Peripheral Identification Register 1" bitfld.long 0x04 4.--7. " JEP106_ID_3_0 ,JEP106" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PART_NUMBER_1 ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "PERIPH_ID_2,Peripheral Identification Register 2" bitfld.long 0x08 4.--7. " ARCH_NUMBER ,Architecture number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 3. " JEDEC_USED ,Indicates that the IC uses a manufacturers identity code that was allocated by JEDEC according to JEP106" "Not used,Used" textline " " bitfld.long 0x08 0.--2. " JEP106_ID_6_4 ,JEP106" "0,1,2,3,4,5,6,7" line.long 0x0C "PERIPH_ID_3,Peripheral Identification Register 3" bitfld.long 0x0C 4.--7. " REVAND ,RevAnd" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " MOD_NUMBER ,The customer can update this field if they modify the RTL of the Interrupt Controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 17. tree "Component ID" rgroup.long 0xFF0++0x03 line.long 0x00 "COMPONENT_ID_0,Component ID0 register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Component ID 0" rgroup.long 0xFF4++0x03 line.long 0x00 "COMPONENT_ID_1,Component ID1 register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Component ID 1" rgroup.long 0xFF8++0x03 line.long 0x00 "COMPONENT_ID_2,Component ID2 register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Component ID 2" rgroup.long 0xFFC++0x03 line.long 0x00 "COMPONENT_ID_3,Component ID3 register" hexmask.long.byte 0x00 0.--7. 1. " ID ,Component ID 3" tree.end tree.end tree "L2 cache controller (PL310) registers" width 16. base ad:0xed000000 rgroup.long 0x00++0x07 line.long 0x00 "ID,Cache ID Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer" bitfld.long 0x00 10.--15. " CACHE_ID ,CACHE ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " bitfld.long 0x00 6.--9. " PART_NR ,Part_number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--5. " RTL_REL ,RTL release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "TYPE,Cache Type Register" bitfld.long 0x04 31. " DATA_BANKING ,Data banking impement" "Not implemented,Implemented" bitfld.long 0x04 25.--28. " CTYPE ,Ctype" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 24. " H ,H" "Unified,Harvard" bitfld.long 0x04 20.--22. " DSIZE ,L2 cache way size - Read from Auxiliary Control Register [19:17]" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 18. " L2_ASSOCIATIVITY ,L2 associativity - Read from Auxiliary Control Register[16]" "0,1" bitfld.long 0x04 12.--13. " L2_CACHE_LINE_LENGTH ,L2 cache line length" "0,1,2,3" textline " " bitfld.long 0x04 8.--10. " ISIZE ,L2 cache way size - Read from Auxiliary Control Register[19:17]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6. " L2_ASSOCIATIVITY ,Read from Auxiliary Control Register[16]" "0,1" textline " " bitfld.long 0x04 0.--1. " L2_CACHE_LINE_LENGTH ,L2 cache line length" "0,1,2,3" group.long 0x100++0x0F line.long 0x00 "CONTROL,Control Register" bitfld.long 0x00 0. " L2_CACHE_EN ,L2 Cache enable" "Disabled,Enabled" line.long 0x04 "AUXCONTROL,Auxiliary Control Register" bitfld.long 0x04 30. " EBRESPEN ,Early BRESP enable" "Disabled,Enabled" bitfld.long 0x04 29. " IPEN ,Instruction prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " DPEN ,Data prefetch enable" "Disabled,Enabled" bitfld.long 0x04 27. " NSIAC ,Non-secure interrupt access control" "Secure accesses,Secure or non-secure accesses" textline " " bitfld.long 0x04 26. " NSLEN ,Non-secure lockdown enable" "Disabled,Enabled" bitfld.long 0x04 25. " CRP ,Cache replacement policy" "Disabled,Enabled" textline " " bitfld.long 0x04 23.--24. " FWA ,Force write allocate" "Use AWCACHE attributes for WA,Force no allocate - set WA=0,Override AWCACHE attributes,Internally mapped to 00" bitfld.long 0x04 22. " SAOE ,Shared attribute override enable" "Disabled,Enabled" textline " " bitfld.long 0x04 21. " PEN ,Parity enable" "Disabled,Enabled" bitfld.long 0x04 20. " EMBEN ,Event monitor bus enable" "Disabled,Enabled" textline " " bitfld.long 0x04 17.--19. " WS ,Way-size" "Reserved,16KB,32KB,64KB,128KB,256KB,512KB,?..." bitfld.long 0x04 16. " ASSO ,Associativity" "8-way,16-way" textline " " bitfld.long 0x04 13. " SAIEN ,Shared Attribute Invalidate Enable" "Disabled,Enabled" bitfld.long 0x04 12. " ECCEN ,Exclusive cache configuration" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " SBDLEN ,Store buffer device limitation Enable" "Disabled,Enabled" bitfld.long 0x04 10. " HPSDREN ,High Priority for SO and Dev Reads Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " FLZEN ,Full Line of Zero Enable" "Disabled,Enabled" line.long 0x08 "TAGLATCONTROL,Tag RAM Latency Control Register" bitfld.long 0x08 8.--10. " RAMWAL ,RAM write access latency - pl310_TAG_WRITE_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x08 4.--6. " RAMRAL ,RAM read access latency - pl310_TAG_READ_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x08 0.--2. " RAMSL ,RAM setup latency - pl310_TAG_SETUP_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" line.long 0x0C "DATALATCONTROL,Data RAM Latency Control Register" bitfld.long 0x0C 8.--10. " RAMWAL ,RAM write access latency - pl310_DATA_WRITE_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x0C 4.--6. " RAMRAL ,RAM read access latency - pl310_DATA_READ_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x0C 0.--2. " RAMSL ,RAM setup latency - pl310_DATA_SETUP_LAT" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" width 19. group.long 0x200++0x13 line.long 0x00 "EVENTCOUNTCONTROL,Event Counter Control Register" bitfld.long 0x00 2. " CNT1RST ,Counter 1 reset" "No reset,Reset" bitfld.long 0x00 1. " CNT0RST ,Counter 0 reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " ECNTEN ,Event counter enable" "Disabled,Enabled" line.long 0x04 "EVENTCOUNT1CONF,Event Counter Configuration Register 1" bitfld.long 0x04 2.--5. " CNTES ,Counter event source" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD" bitfld.long 0x04 0.--1. " ECNTINTG ,Event counter interrupt generation" "Disabled,Enabled - Increment condition,Enabled - Overflow condition,Interrupt generation disabled" line.long 0x08 "EVENTCOUNT0CONF,Event Counter Configuration Register 0" bitfld.long 0x08 2.--5. " CNTES ,Counter event source" "Disabled,CO,DRHIT,DRREQ,DWHIT,DWREQ,DWTREQ,IRHIT,IRREQ,WA,IPFALLOC,EPFHIT,EPFALLOC,SRRCVD,SRCONF,EPFRCVD" bitfld.long 0x08 0.--1. " ECNTINTG ,Event counter interrupt generation" "Disabled,Enabled - Increment condition,Enabled - Overflow condition,Interrupt generation disabled" line.long 0x0C "EVENTCOUNT1VALUE,Event counter value register 1" line.long 0x10 "EVENTCOUNT0VALUE,Event counter value register 0" group.long 0x18++0x03 line.long 0x00 "INTMASK,Masked Interrupt Status Register" bitfld.long 0x00 8. " DECERR ,DECERR from L3" "Masked,Not masked" bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "Masked,Not masked" textline " " bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM - Read" "Masked,Not masked" bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM - Read" "Masked,Not masked" textline " " bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM - Write" "Masked,Not masked" bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM - Write" "Masked,Not masked" textline " " bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM - Read" "Masked,Not masked" bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM - Read" "Masked,Not masked" textline " " bitfld.long 0x00 0. " ECNTR ,Event Counter1 and Event Counter 0 Overflow Increment" "Masked,Not masked" rgroup.long 0x18++0x03 line.long 0x00 "INTMASK,Masked Interrupt Status Register" bitfld.long 0x00 8. " DECERR ,DECERR from L3" "Low,High" bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "Low,High" textline " " bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM - Read" "Low,High" bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM - Read" "Low,High" textline " " bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM - Write" "Low,High" bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM - Write" "Low,High" textline " " bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM - Read" "Low,High" bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM - Read" "Low,High" textline " " bitfld.long 0x00 0. " ECNTR ,Event Counter1 and Event Counter 0 Overflow Increment" "Low,High" rgroup.long 0x1C++0x03 line.long 0x00 "RAWINTSTATUS,Interrupt raw status register" bitfld.long 0x00 8. " DECERR ,DECERR from L3" "No interrupt,Interrupt" bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM - Read" "No interrupt,Interrupt" bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM - Read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM - Write" "No interrupt,Interrupt" bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM - Write" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM - Read" "No interrupt,Interrupt" bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM - Read" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " ECNTR ,Event Counter1 and Event Counter 0 Overflow Increment" "No interrupt,Interrupt" wgroup.long 0x20++0x03 line.long 0x00 "INTCLEAR,Interrupt clear register" bitfld.long 0x00 8. " DECERR ,DECERR from L3" "No effect,Clear" bitfld.long 0x00 7. " SLVERR ,SLVERR from L3" "No effect,Clear" textline " " bitfld.long 0x00 6. " ERRRD ,Error on L2 data RAM - Read" "No effect,Clear" bitfld.long 0x00 5. " ERRRT ,Error on L2 tag RAM - Read" "No effect,Clear" textline " " bitfld.long 0x00 4. " ERRWD ,Error on L2 data RAM - Write" "No effect,Clear" bitfld.long 0x00 3. " ERRWT ,Error on L2 tag RAM - Write" "No effect,Clear" textline " " bitfld.long 0x00 2. " PARRD ,Parity Error on L2 data RAM - Read" "No effect,Clear" bitfld.long 0x00 1. " PARRT ,Parity Error on L2 tag RAM - Read" "No effect,Clear" textline " " bitfld.long 0x00 0. " ECNTR ,Event Counter1 and Event Counter 0 Overflow Increment" "No effect,Clear" group.long 0x730++0x03 line.long 0x00 "CACHESYNC,Cache Maintenance Cache Sync Operation register" bitfld.long 0x00 0. " C , C" "0,1" group.long 0x770++0x03 line.long 0x00 "INVALIDATELINE,Cache Maintenance Invalidate PA Operation register" hexmask.long 0x00 5.--31. 1. " TAG_INDEX ,TAG INDEX" bitfld.long 0x00 0. " C ,C" "0,1" group.long 0x77C++0x03 line.long 0x00 "INVALIDATEBYWAY,Cache Maintenance Invalidate Way Operation register" hexmask.long.word 0x00 0.--15. 1. " WB ,Way bits" group.long 0x7B0++0x03 line.long 0x00 "CLEANLINE,Cache Maintenance Clean PA Operation register" bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " INDEX ,Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " C ,C" "0,1" group.long 0x7B8++0x07 line.long 0x00 "CLEANLINEBYWAY,Cache Maintenance Clean Index Operation register" bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " INDEX ,Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " C ,C" "0,1" line.long 0x04 "CLEANBYWAY,Cache Maintenance Clean Way Operation register" hexmask.long.word 0x04 0.--15. 1. " WB ,Way bits" group.long 0x7F0++0x03 line.long 0x00 "CLEANINVLINE,Cache Maintenance Clean Invalidate PA Operation register" hexmask.long 0x00 5.--31. 1. " TAG_INDEX ,TAG INDEX" bitfld.long 0x00 0. " C ,C" "0,1" group.long 0x7F8++0x07 line.long 0x00 "CLEANINVLINEBYWAY,Cache Maintenance Clean Invalidate Index Operation register" bitfld.long 0x00 28.--31. " WAY ,Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " INDEX ,Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 0. " C ,C" "0,1" line.long 0x04 "CLEANINVBYWAY,Cache Maintenance Clean Invalidate Way Operation register" hexmask.long.word 0x04 0.--15. 1. " WB ,Way bits" width 22. group.long 0x900++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_0,Cache lockdown Data0 register" bitfld.long 0x00 15. " DATALOCK000[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK000[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK000[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK000[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK000[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK000[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK000[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK000[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK000[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK000[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK000[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK000[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK000[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK000[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK000[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK000[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_0,Cache lockdown Instr0 register" bitfld.long 0x04 15. " INSTRLOCK000[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK000[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK000[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK000[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK000[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK000[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK000[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK000[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK000[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK000[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK000[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK000[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK000[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK000[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK000[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK000[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x908++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_1,Cache lockdown Data1 register" bitfld.long 0x00 15. " DATALOCK001[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK001[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK001[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK001[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK001[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK001[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK001[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK001[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK001[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK001[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK001[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK001[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK001[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK001[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK001[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK001[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_1,Cache lockdown Instr1 register" bitfld.long 0x04 15. " INSTRLOCK001[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK001[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK001[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK001[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK001[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK001[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK001[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK001[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK001[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK001[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK001[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK001[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK001[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK001[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK001[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK001[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x910++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_2,Cache lockdown Data2 register" bitfld.long 0x00 15. " DATALOCK010[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK010[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK010[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK010[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK010[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK010[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK010[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK010[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK010[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK010[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK010[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK010[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK010[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK010[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK010[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK010[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_2,Cache lockdown Instr2 register" bitfld.long 0x04 15. " INSTRLOCK010[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK010[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK010[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK010[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK010[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK010[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK010[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK010[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK010[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK010[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK010[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK010[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK010[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK010[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK010[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK010[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x918++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_3,Cache lockdown Data3 register" bitfld.long 0x00 15. " DATALOCK011[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK011[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK011[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK011[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK011[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK011[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK011[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK011[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK011[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK011[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK011[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK011[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK011[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK011[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK011[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK011[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_3,Cache lockdown Instr3 register" bitfld.long 0x04 15. " INSTRLOCK011[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK011[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK011[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK011[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK011[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK011[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK011[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK011[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK011[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK011[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK011[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK011[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK011[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK011[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK011[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK011[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x920++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_4,Cache lockdown Data4 register" bitfld.long 0x00 15. " DATALOCK100[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK100[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK100[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK100[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK100[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK100[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK100[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK100[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK100[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK100[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK100[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK100[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK100[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK100[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK100[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK100[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_4,Cache lockdown Instr4 register" bitfld.long 0x04 15. " INSTRLOCK100[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK100[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK100[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK100[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK100[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK100[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK100[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK100[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK100[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK100[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK100[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK100[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK100[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK100[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK100[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK100[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x928++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_5,Cache lockdown Data5 register" bitfld.long 0x00 15. " DATALOCK101[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK101[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK101[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK101[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK101[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK101[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK101[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK101[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK101[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK101[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK101[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK101[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK101[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK101[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK101[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK101[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_5,Cache lockdown Instr5 register" bitfld.long 0x04 15. " INSTRLOCK101[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK101[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK101[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK101[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK101[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK101[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK101[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK101[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK101[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK101[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK101[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK101[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK101[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK101[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK101[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK101[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x930++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_6,Cache lockdown Data6 register" bitfld.long 0x00 15. " DATALOCK110[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK110[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK110[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK110[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK110[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK110[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK110[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK110[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK110[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK110[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK110[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK110[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK110[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK110[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK110[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK110[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_6,Cache lockdown Instr6 register" bitfld.long 0x04 15. " INSTRLOCK110[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK110[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK110[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK110[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK110[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK110[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK110[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK110[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK110[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK110[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK110[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK110[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK110[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK110[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK110[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK110[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x938++0x07 line.long 0x00 "DATALOCKDOWNBYWAY_7,Cache lockdown Data7 register" bitfld.long 0x00 15. " DATALOCK111[15] ,Data lockdown bit 15" "Not locked,Locked" bitfld.long 0x00 14. " DATALOCK111[14] ,Data lockdown bit 14" "Not locked,Locked" textline " " bitfld.long 0x00 13. " DATALOCK111[13] ,Data lockdown bit 13" "Not locked,Locked" bitfld.long 0x00 12. " DATALOCK111[12] ,Data lockdown bit 12" "Not locked,Locked" textline " " bitfld.long 0x00 11. " DATALOCK111[11] ,Data lockdown bit 11" "Not locked,Locked" bitfld.long 0x00 10. " DATALOCK111[10] ,Data lockdown bit 10" "Not locked,Locked" textline " " bitfld.long 0x00 9. " DATALOCK111[9] ,Data lockdown bit 9" "Not locked,Locked" bitfld.long 0x00 8. " DATALOCK111[8] ,Data lockdown bit 8" "Not locked,Locked" textline " " bitfld.long 0x00 7. " DATALOCK111[7] ,Data lockdown bit 7" "Not locked,Locked" bitfld.long 0x00 6. " DATALOCK111[6] ,Data lockdown bit 6" "Not locked,Locked" textline " " bitfld.long 0x00 5. " DATALOCK111[5] ,Data lockdown bit 5" "Not locked,Locked" bitfld.long 0x00 4. " DATALOCK111[4] ,Data lockdown bit 4" "Not locked,Locked" textline " " bitfld.long 0x00 3. " DATALOCK111[3] ,Data lockdown bit 3" "Not locked,Locked" bitfld.long 0x00 2. " DATALOCK111[2] ,Data lockdown bit 2" "Not locked,Locked" textline " " bitfld.long 0x00 1. " DATALOCK111[1] ,Data lockdown bit 1" "Not locked,Locked" bitfld.long 0x00 0. " DATALOCK111[0] ,Data lockdown bit 0" "Not locked,Locked" line.long 0x04 "INSTLOCKDOWNBYWAY_7,Cache lockdown Instr7 register" bitfld.long 0x04 15. " INSTRLOCK111[15] ,Instruction Lockdown 15" "Not locked,Locked" bitfld.long 0x04 14. " INSTRLOCK111[14] ,Instruction Lockdown 14" "Not locked,Locked" textline " " bitfld.long 0x04 13. " INSTRLOCK111[13] ,Instruction Lockdown 13" "Not locked,Locked" bitfld.long 0x04 12. " INSTRLOCK111[12] ,Instruction Lockdown 12" "Not locked,Locked" textline " " bitfld.long 0x04 11. " INSTRLOCK111[11] ,Instruction Lockdown 11" "Not locked,Locked" bitfld.long 0x04 10. " INSTRLOCK111[10] ,Instruction Lockdown 10" "Not locked,Locked" textline " " bitfld.long 0x04 9. " INSTRLOCK111[9] ,Instruction Lockdown 9" "Not locked,Locked" bitfld.long 0x04 8. " INSTRLOCK111[8] ,Instruction Lockdown 8" "Not locked,Locked" textline " " bitfld.long 0x04 7. " INSTRLOCK111[7] ,Instruction Lockdown 7" "Not locked,Locked" bitfld.long 0x04 6. " INSTRLOCK111[6] ,Instruction Lockdown 6" "Not locked,Locked" textline " " bitfld.long 0x04 5. " INSTRLOCK111[5] ,Instruction Lockdown 5" "Not locked,Locked" bitfld.long 0x04 4. " INSTRLOCK111[4] ,Instruction Lockdown 4" "Not locked,Locked" textline " " bitfld.long 0x04 3. " INSTRLOCK111[3] ,Instruction Lockdown 3" "Not locked,Locked" bitfld.long 0x04 2. " INSTRLOCK111[2] ,Instruction Lockdown 2" "Not locked,Locked" textline " " bitfld.long 0x04 1. " INSTRLOCK111[1] ,Instruction Lockdown 1" "Not locked,Locked" bitfld.long 0x04 0. " INSTRLOCK111[0] ,Instruction Lockdown 0" "Not locked,Locked" group.long 0x950++0x07 line.long 0x00 "LOCKDOWNBYLINEENABLE,Lockdown by Line Enable Register" bitfld.long 0x00 0. " LOCKDOWN_BY_LINE_ENABLE ,Lockdown by line enable" "Disabled,Enabled" line.long 0x04 "UNLOCKALLLINESBYWAY,Unlock All Lines Register" bitfld.long 0x04 15. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[15] ,Unlock all lines by way operation bit 15" "No,Yes" textline " " bitfld.long 0x04 14. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[14] ,Unlock all lines by way operation bit 14" "No,Yes" textline " " bitfld.long 0x04 13. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[13] ,Unlock all lines by way operation bit 13" "No,Yes" textline " " bitfld.long 0x04 12. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[12] ,Unlock all lines by way operation bit 12" "No,Yes" textline " " bitfld.long 0x04 11. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[11] ,Unlock all lines by way operation bit 11" "No,Yes" textline " " bitfld.long 0x04 10. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[10] ,Unlock all lines by way operation bit 10" "No,Yes" textline " " bitfld.long 0x04 9. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[9] ,Unlock all lines by way operation bit 9" "No,Yes" textline " " bitfld.long 0x04 8. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[8] ,Unlock all lines by way operation bit 8" "No,Yes" textline " " bitfld.long 0x04 7. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[7] ,Unlock all lines by way operation bit 7" "No,Yes" textline " " bitfld.long 0x04 6. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[6] ,Unlock all lines by way operation bit 6" "No,Yes" textline " " bitfld.long 0x04 5. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[5] ,Unlock all lines by way operation bit 5" "No,Yes" textline " " bitfld.long 0x04 4. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[4] ,Unlock all lines by way operation bit 4" "No,Yes" textline " " bitfld.long 0x04 3. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[3] ,Unlock all lines by way operation bit 3" "No,Yes" textline " " bitfld.long 0x04 2. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[2] ,Unlock all lines by way operation bit 2" "No,Yes" textline " " bitfld.long 0x04 1. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[1] ,Unlock all lines by way operation bit 1" "No,Yes" textline " " bitfld.long 0x04 0. " UNLOCK_ALL_LINES_BY_WAY_OPERATION[0] ,Unlock all lines by way operation bit 0" "No,Yes" group.long 0xC00++0x07 line.long 0x00 "ADDRFILTERSTART,Address filtering start register" hexmask.long.word 0x00 20.--31. 0x10 " ADDRESS_FILTERING_START ,Address filtering start address for bits [31:20] of the filtering address" textline " " bitfld.long 0x00 0. " ADDRESS_FILTERING_ENABLE ,Address filtering enable" "Disabled,Enabled" line.long 0x04 "ADDRFILTEREND,Address filtering end register" hexmask.long.word 0x04 20.--31. 0x10 " ADDRESS_FILTERING_END ,Address filtering end address for bits [31:20] of the filtering address" group.long 0xF40++0x03 line.long 0x00 "DEBUGCONTROL,Debug Register" bitfld.long 0x00 2. " SPNIDEN ,Reads value of SPNIDEN input" "0,1" bitfld.long 0x00 1. " DWB ,Disable write-back - force WT" "No,Yes" textline " " bitfld.long 0x00 0. " DCL ,Disable cache linefill" "No,Yes" group.long 0xF60++0x03 line.long 0x00 "PREFETCHCONTROL,Prefetch Control Register" bitfld.long 0x00 30. " DLEN ,Double linefill enable" "Disabled,Enabled" bitfld.long 0x00 29. " IPREFEN ,Instruction prefetch enable" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " PREFDROPEN ,Data prefetch enable" "Disabled,Enabled" bitfld.long 0x00 27. " DLWRAPDIS ,Double linefill on WRAP read disable" "No,Yes" textline " " bitfld.long 0x00 24. " PREFDROPEN ,Prefetch drop enable" "Disabled,Enabled" bitfld.long 0x00 23. " INCRDLEN ,Incr double Linefill enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " NSIDESEN ,Not same ID on exclusive sequence enable" "Disabled,Enabled" bitfld.long 0x00 0.--4. " PREF_OFFSET ,Prefetch offset" "0,1,2,3,4,5,6,7,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,15,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,23,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,31" group.long 0xF80++0x03 line.long 0x00 "PWRCTRLOFFSET,Power Control Register" bitfld.long 0x00 1. " DYNAMIC_CLK_GATING_EN ,Dynamic clock gating enable" "Disabled,Enabled" bitfld.long 0x00 0. " STANDBY_MODE_EN ,Standby mode enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree "BUSMATRIX (Multilayer interconnect matrix)" base ad:0xEF800000 tree.open "SMX registers" tree "RT0.RT Registers" width 17. rgroup.quad 0x00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x0 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x0 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x10++0x07 line.quad 0x00 "NETWORK,Interconnect identification" hexmask.quad.word 0x00 48.--63. 1. " ID ,Unique interconnect ID" hexmask.quad.word 0x00 32.--47. 1. " REV ,Revision code of the interconnect instance" rgroup.quad 0x70++0x07 line.quad 0x00 "INITID_READBACK,Initiator ID read-back" hexmask.quad.byte 0x00 0.--7. 1. " INITID ,Returns initiator ID of core thread that initiated the read" group.quad 0x78++0x07 line.quad 0x00 "NETWORK_CONTROL,Control over interconnect-wide functions" bitfld.quad 0x00 56. " CLOCK_GATE_DISABLE ,Clock gating disable" "No,Yes" bitfld.quad 0x00 8.--10. " TIMEOUT_BASE ,Timeout base period in register target clock cycles" "Reserved,26 cycles,28 cycles,210 cycles,212 cycles,?..." tree.end width 15. tree "TA_PCIE0_C5.TA Registers" rgroup.quad 0x400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x0 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x0 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x400+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad (0x400+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 25. " REQ_TIMEOUT_REP ,Request timeout reporting" "Not requested,Requested" bitfld.quad 0x00 8.--10. " REQ_TIMEOUT ,Request timeout control" "No timeout,1 base cycle,4 base cycles,16 base cycles,64 base cycles,?..." bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad (0x400+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 12.--15. " TIMEBASE ,Observation of timebase signals for internal verification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 8. " REQ_TIMEOUT ,Request timeout status" "Not requested,Requested" bitfld.quad 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of OCP open bursts" "Low,High" bitfld.quad 0x00 5. " RESP_ACTIVE ,OCP responses outstanding" "Low,High" bitfld.quad 0x00 4. " REQ_WAITING ,Requests waiting" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad (0x400+0x100)++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" group.quad (0x400+0x200)++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_PCIESATA0_C6.TA registers" rgroup.quad 0x800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x0 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x0 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x800+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad (0x800+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 25. " REQ_TIMEOUT_REP ,Request timeout reporting" "Not requested,Requested" bitfld.quad 0x00 8.--10. " REQ_TIMEOUT ,Request timeout control" "No timeout,1 base cycle,4 base cycles,16 base cycles,64 base cycles,?..." bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad (0x800+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 12.--15. " TIMEBASE ,Observation of timebase signals for internal verification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 8. " REQ_TIMEOUT ,Request timeout status" "Not requested,Requested" bitfld.quad 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of OCP open bursts" "Low,High" bitfld.quad 0x00 5. " RESP_ACTIVE ,OCP responses outstanding" "Low,High" bitfld.quad 0x00 4. " REQ_WAITING ,Requests waiting" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad (0x800+0x100)++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" group.quad (0x800+0x200)++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end width 15. tree "RT0.SI Registers" rgroup.quad 0x1C20++0x07 line.quad 0x00 "CONTROL,Control of register and sideband interconnect" bitfld.quad 0x0 56. " CLOCK_GATE_DISABLE ,Overrides fine-grained hardware clock gating in the register and sideband interconnect" "No,Yes" rgroup.quad 0x1D10++0x07 line.quad 0x00 "FLAG_STATUS_0,Composite flag status observation per composite flag" bitfld.quad 0x00 63. " STATUS[63] ,Status of sideband signals making up composite interconnect flag 63" "Not occurred,Occurred" bitfld.quad 0x00 62. " STATUS[62] ,Status of sideband signals making up composite interconnect flag 62" "Not occurred,Occurred" bitfld.quad 0x00 61. " STATUS[61] ,Status of sideband signals making up composite interconnect flag 61" "Not occurred,Occurred" textline " " bitfld.quad 0x00 60. " STATUS[60] ,Status of sideband signals making up composite interconnect flag 60" "Not occurred,Occurred" bitfld.quad 0x00 59. " STATUS[59] ,Status of sideband signals making up composite interconnect flag 59" "Not occurred,Occurred" bitfld.quad 0x00 58. " STATUS[58] ,Status of sideband signals making up composite interconnect flag 58" "Not occurred,Occurred" textline " " bitfld.quad 0x00 57. " STATUS[57] ,Status of sideband signals making up composite interconnect flag 57" "Not occurred,Occurred" bitfld.quad 0x00 56. " STATUS[56] ,Status of sideband signals making up composite interconnect flag 56" "Not occurred,Occurred" bitfld.quad 0x00 55. " STATUS[55] ,Status of sideband signals making up composite interconnect flag 55" "Not occurred,Occurred" textline " " bitfld.quad 0x00 54. " STATUS[54] ,Status of sideband signals making up composite interconnect flag 54" "Not occurred,Occurred" bitfld.quad 0x00 53. " STATUS[53] ,Status of sideband signals making up composite interconnect flag 53" "Not occurred,Occurred" bitfld.quad 0x00 52. " STATUS[52] ,Status of sideband signals making up composite interconnect flag 52" "Not occurred,Occurred" textline " " bitfld.quad 0x00 51. " STATUS[51] ,Status of sideband signals making up composite interconnect flag 51" "Not occurred,Occurred" bitfld.quad 0x00 50. " STATUS[50] ,Status of sideband signals making up composite interconnect flag 50" "Not occurred,Occurred" bitfld.quad 0x00 49. " STATUS[49] ,Status of sideband signals making up composite interconnect flag 49" "Not occurred,Occurred" textline " " bitfld.quad 0x00 48. " STATUS[48] ,Status of sideband signals making up composite interconnect flag 48" "Not occurred,Occurred" bitfld.quad 0x00 47. " STATUS[47] ,Status of sideband signals making up composite interconnect flag 47" "Not occurred,Occurred" bitfld.quad 0x00 46. " STATUS[46] ,Status of sideband signals making up composite interconnect flag 46" "Not occurred,Occurred" textline " " bitfld.quad 0x00 45. " STATUS[45] ,Status of sideband signals making up composite interconnect flag 45" "Not occurred,Occurred" bitfld.quad 0x00 44. " STATUS[44] ,Status of sideband signals making up composite interconnect flag 44" "Not occurred,Occurred" bitfld.quad 0x00 43. " STATUS[43] ,Status of sideband signals making up composite interconnect flag 43" "Not occurred,Occurred" textline " " bitfld.quad 0x00 42. " STATUS[42] ,Status of sideband signals making up composite interconnect flag 42" "Not occurred,Occurred" bitfld.quad 0x00 41. " STATUS[41] ,Status of sideband signals making up composite interconnect flag 41" "Not occurred,Occurred" bitfld.quad 0x00 40. " STATUS[40] ,Status of sideband signals making up composite interconnect flag 40" "Not occurred,Occurred" textline " " bitfld.quad 0x00 39. " STATUS[39] ,Status of sideband signals making up composite interconnect flag 39" "Not occurred,Occurred" bitfld.quad 0x00 38. " STATUS[38] ,Status of sideband signals making up composite interconnect flag 38" "Not occurred,Occurred" bitfld.quad 0x00 37. " STATUS[37] ,Status of sideband signals making up composite interconnect flag 37" "Not occurred,Occurred" textline " " bitfld.quad 0x00 36. " STATUS[36] ,Status of sideband signals making up composite interconnect flag 36" "Not occurred,Occurred" bitfld.quad 0x00 35. " STATUS[35] ,Status of sideband signals making up composite interconnect flag 35" "Not occurred,Occurred" bitfld.quad 0x00 34. " STATUS[34] ,Status of sideband signals making up composite interconnect flag 34" "Not occurred,Occurred" textline " " bitfld.quad 0x00 33. " STATUS[33] ,Status of sideband signals making up composite interconnect flag 33" "Not occurred,Occurred" bitfld.quad 0x00 32. " STATUS[32] ,Status of sideband signals making up composite interconnect flag 32" "Not occurred,Occurred" bitfld.quad 0x00 31. " STATUS[31] ,Status of sideband signals making up composite interconnect flag 31" "Not occurred,Occurred" textline " " bitfld.quad 0x00 30. " STATUS[30] ,Status of sideband signals making up composite interconnect flag 30" "Not occurred,Occurred" bitfld.quad 0x00 29. " STATUS[29] ,Status of sideband signals making up composite interconnect flag 29" "Not occurred,Occurred" bitfld.quad 0x00 28. " STATUS[28] ,Status of sideband signals making up composite interconnect flag 28" "Not occurred,Occurred" textline " " bitfld.quad 0x00 27. " STATUS[27] ,Status of sideband signals making up composite interconnect flag 27" "Not occurred,Occurred" bitfld.quad 0x00 26. " STATUS[26] ,Status of sideband signals making up composite interconnect flag 26" "Not occurred,Occurred" bitfld.quad 0x00 25. " STATUS[25] ,Status of sideband signals making up composite interconnect flag 25" "Not occurred,Occurred" textline " " bitfld.quad 0x00 24. " STATUS[24] ,Status of sideband signals making up composite interconnect flag 24" "Not occurred,Occurred" bitfld.quad 0x00 23. " STATUS[23] ,Status of sideband signals making up composite interconnect flag 23" "Not occurred,Occurred" bitfld.quad 0x00 22. " STATUS[22] ,Status of sideband signals making up composite interconnect flag 22" "Not occurred,Occurred" textline " " bitfld.quad 0x00 21. " STATUS[21] ,Status of sideband signals making up composite interconnect flag 21" "Not occurred,Occurred" bitfld.quad 0x00 20. " STATUS[20] ,Status of sideband signals making up composite interconnect flag 20" "Not occurred,Occurred" bitfld.quad 0x00 19. " STATUS[19] ,Status of sideband signals making up composite interconnect flag 19" "Not occurred,Occurred" textline " " bitfld.quad 0x00 18. " STATUS[18] ,Status of sideband signals making up composite interconnect flag 18" "Not occurred,Occurred" bitfld.quad 0x00 17. " STATUS[17] ,Status of sideband signals making up composite interconnect flag 17" "Not occurred,Occurred" bitfld.quad 0x00 16. " STATUS[16] ,Status of sideband signals making up composite interconnect flag 16" "Not occurred,Occurred" textline " " bitfld.quad 0x00 15. " STATUS[15] ,Status of sideband signals making up composite interconnect flag 15" "Not occurred,Occurred" bitfld.quad 0x00 14. " STATUS[14] ,Status of sideband signals making up composite interconnect flag 14" "Not occurred,Occurred" bitfld.quad 0x00 13. " STATUS[13] ,Status of sideband signals making up composite interconnect flag 13" "Not occurred,Occurred" textline " " bitfld.quad 0x00 12. " STATUS[12] ,Status of sideband signals making up composite interconnect flag 12" "Not occurred,Occurred" bitfld.quad 0x00 11. " STATUS[11] ,Status of sideband signals making up composite interconnect flag 11" "Not occurred,Occurred" bitfld.quad 0x00 10. " STATUS[10] ,Status of sideband signals making up composite interconnect flag 10" "Not occurred,Occurred" textline " " bitfld.quad 0x00 9. " STATUS[9] ,Status of sideband signals making up composite interconnect flag 9" "Not occurred,Occurred" bitfld.quad 0x00 8. " STATUS[8] ,Status of sideband signals making up composite interconnect flag 8" "Not occurred,Occurred" bitfld.quad 0x00 7. " STATUS[7] ,Status of sideband signals making up composite interconnect flag 7" "Not occurred,Occurred" textline " " bitfld.quad 0x00 6. " STATUS[6] ,Status of sideband signals making up composite interconnect flag 6" "Not occurred,Occurred" bitfld.quad 0x00 5. " STATUS[5] ,Status of sideband signals making up composite interconnect flag 5" "Not occurred,Occurred" bitfld.quad 0x00 4. " STATUS[4] ,Status of sideband signals making up composite interconnect flag 4" "Not occurred,Occurred" textline " " bitfld.quad 0x00 3. " STATUS[3] ,Status of sideband signals making up composite interconnect flag 3" "Not occurred,Occurred" bitfld.quad 0x00 2. " STATUS[2] ,Status of sideband signals making up composite interconnect flag 2" "Not occurred,Occurred" bitfld.quad 0x00 1. " STATUS[1] ,Status of sideband signals making up composite interconnect flag 1" "Not occurred,Occurred" textline " " bitfld.quad 0x00 0. " STATUS[0] ,Status of sideband signals making up composite interconnect flag 0" "Not occurred,Occurred" tree.end tree "IA_A9SM_10.IA registers" width 15. rgroup.quad 0x2000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x2018++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x2020++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" rgroup.quad 0x2028++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "No error,Error" bitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x2068++0x07 line.quad 0x00 "CORE_FLAG,Enabling of core output flags" bitfld.quad 0x00 0. " ENABLE_0 ,Core output flag enable for core flag 0" "Disabled,Enabled" group.quad 0x2100++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_A9SM_20.IA Registers" width 15. rgroup.quad 0x2400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x2418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x2420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" rgroup.quad 0x2428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" bitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x2500++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_DMAC_40.IA Registers" rgroup.quad 0x2800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x2818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x2820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x2828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" bitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x2858++0x0F line.quad 0x00 "ERROR_LOG,ERROR LOG" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" line.quad 0x08 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x08 3.--31. 0x8 " ADDR ,Address of command that caused the error after address fill-in" group.quad 0x2900++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_DMAC_50.IA Registers" rgroup.quad 0x2C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x2C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x2C20++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x2C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" textline " " bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x2C58++0x0F line.quad 0x00 "ERROR_LOG,ERROR LOG" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" line.quad 0x08 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x08 3.--31. 0x8 " ADDR ,Address of command that caused the error after address fill-in" group.quad 0x2D00++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_GPU_100.IA Registers" rgroup.quad 0x3400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x3418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x3420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x3428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "No error,Error" bitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x3500++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_GMAC_36.IA Registers" rgroup.quad 0x3800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x3818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x3820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x3828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" bitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x3900++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_VENC_75.IA Registers" rgroup.quad 0x3C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x3C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x3C20++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x3C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" textline " " rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x3D00++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_CLCD_60.IA Registers" rgroup.quad 0x4000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x4018++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x4020++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" rgroup.quad 0x4028++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x4100++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_PCIESATA0_35.IA Registers" rgroup.quad 0x4400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x4418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x4420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x4428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" textline " " rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x4500++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_VDEC_55.IA Registers" rgroup.quad 0x4800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x4818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x4820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x4828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 7. " READEX ,Status of ReadEx/Write" "Low,High" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" textline " " rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x4500++0x07 line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_VIP_72.IA Registers" rgroup.quad 0x4C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x4C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x4C20++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x4C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x4C58++0x07 line.quad 0x00 "ERROR_LOG,Error log" rbitfld.quad 0x00 32. " REQ_INFO ,MReqInfo bits of command that caused the error" "Low,High" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad 0x4C60++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 3.--31. 0x8 " ERROR_LOG_ADDR ,Address for error log" group.quad 0x4D00++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_C3_70.IA Registers" rgroup.quad 0x5000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x5018++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x5020++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x5028++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x5058++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad 0x5060++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 3.--31. 0x8 " ERROR_LOG_ADDR ,Address for error log" group.quad 0x5100++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_MCIF_71.IA Registers" rgroup.quad 0x5400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x5418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad 0x5420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad 0x5428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x5458++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad 0x5460++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 3.--31. 0x8 " ERROR_LOG_ADDR ,Address for error log" group.quad 0x5500++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_UOC_34.IA Registers" rgroup.quad 0x6000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x6000+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad (0x6000+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad (0x6000+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad (0x6000+0x58)++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad (0x6000+0x60)++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 2.--31. 0x4 " ERROR_LOG_ADDR ,Address for error log" group.quad (0x6000+0x100)++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_UHC1_33.IA Registers" rgroup.quad 0x6400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x6400+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad (0x6400+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad (0x6400+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad (0x6400+0x58)++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad (0x6400+0x60)++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 2.--31. 0x4 " ERROR_LOG_ADDR ,Address for error log" group.quad (0x6400+0x100)++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_UHC1_32.IA Registers" rgroup.quad 0x6800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x6800+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad (0x6800+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad (0x6800+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad (0x6800+0x58)++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad (0x6800+0x60)++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 2.--31. 0x4 " ERROR_LOG_ADDR ,Address for error log" group.quad (0x6800+0x100)++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_UHC0_31.IA Registers" rgroup.quad 0x6C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x6C00+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad (0x6C00+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad (0x6C00+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad (0x6C00+0x58)++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad (0x6C00+0x60)++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 2.--31. 0x4 " ERROR_LOG_ADDR ,Address for error log" group.quad (0x6C00+0x100)++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "IA_UHC0_30.IA Registers" rgroup.quad 0x7000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad (0x7000+0x18)++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" rgroup.quad (0x7000+0x20)++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY_REP ,Reporting of in-band errors with MErrSteer indicating a primary error" "Low,High" bitfld.quad 0x00 27. " ALL_INBAND_ERROR_REP ,Reporting of all in-band errors as out-of-band errors" "No error,Error" group.quad (0x7000+0x28)++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 28. " INBAND_ERROR_PRIMARY ,Rror status for in-band errors with MErrSteer indicating a primary error" "Disabled,Enabled" rbitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" rbitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" textline " " rbitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" rbitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad (0x7000+0x58)++0x07 line.quad 0x00 "ERROR_LOG,Error log" hexmask.quad.word 0x00 32.--44. 1. " REQ_INFO ,MReqInfo bits of command that caused the error" bitfld.quad 0x00 31. " MULTI ,Multiple errors" "Low,High" bitfld.quad 0x00 24.--26. " CODE ,Error code" "No error,Unsupported command,Address hole,Reserved,In-band error,?..." textline " " rbitfld.quad 0x00 8.--13. " INITID ,Initiator ID from which the command was launched" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rbitfld.quad 0x00 0.--2. " CMD ,Command that caused the error" "0,1,2,3,4,5,6,7" rgroup.quad (0x7000+0x60)++0x07 line.quad 0x00 "ERROR_LOG_ADDR,Address for error log" hexmask.quad.long 0x00 2.--31. 0x4 " ERROR_LOG_ADDR ,Address for error log" group.quad (0x7000+0x100)++0x07 line.quad 0x00 "BANDWIDTH_0,Bandwidth weights per target group" hexmask.quad.byte 0x00 16.--23. 1. " TARGET_GROUP_2 ,Bandwidth weight for access to target group 8n+2" hexmask.quad.byte 0x00 8.--15. 1. " TARGET_GROUP_1 ,Bandwidth weight for access to target group 8n+1" hexmask.quad.byte 0x00 0.--7. 1. " TARGET_GROUP_0 ,Bandwidth weight for access to target group 8n" tree.end tree "TA_PORT_D11.TA Registers" rgroup.quad 0x7800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x7818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x7820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" rbitfld.quad 0x00 25. " REQ_TIMEOUT_REP ,Request timeout reporting" "Low,High" bitfld.quad 0x00 8.--10. " REQ_TIMEOUT ,Request timeout control" "No timeout,1 base cycle,4 base cycles,16 base cycles,64 base cycles,?..." bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x7828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 12.--15. " TIMEBASE ,Observation of timebase signals for internal verification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 8. " REQ_TIMEOUT ,Request timeout status" "Not requested,Requested" textline " " bitfld.quad 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" textline " " bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x7900++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" group.quad 0x7A00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_PORT_I.TA Registers" rgroup.quad 0x7C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x7C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x78C0++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x7C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" textline " " bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" group.quad 0x7D00++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" group.quad 0x8000++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_I2S_A5.TA Registers" rgroup.quad 0x8400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x8418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x84C0++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x8428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x8500++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" group.quad 0x8600++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MCIF_C3.TA Registers" rgroup.quad 0x8800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x8818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x8820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x8828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 4. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x8900++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0x8A00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MCIF_C4.TA Registers" rgroup.quad 0x8C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x8C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x8C20++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x8C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x8D00++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0x8E00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_A9SM_Q.TA Registers" rgroup.quad 0x9400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x9418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x9420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 25. " REQ_TIMEOUT_REP ,Request timeout reporting" "Low,High" bitfld.long 0x00 8.--10. " REQ_TIMEOUT ,Request timeout control" "No timeout,1 base cycle,4 base cycles,16 base cycles,64 base cycles,?..." bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x9428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 12.--15. " TIMEBASE ,Observation of timebase signals for internal verification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " REQ_TIMEOUT ,Request timeout status" "Not requested,Requested" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" textline " " bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" textline " " bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x9500++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0x9600++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MPMC_J.TA Registers" rgroup.quad 0x9800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x9818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x9820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x9828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x9900++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0x9A00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MPMC_K.TA Registers" rgroup.quad 0x9C00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0x9C18++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0x9C20++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0x9C28++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0x9D00++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0x9E00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MPMC_L.TA Registers" rgroup.quad 0xA000++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0xA018++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0xA020++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0xA028++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0xA100++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0xA200++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MPMC_M.TA Registers" rgroup.quad 0xA400++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0xA418++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0xA420++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0xA428++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0xA500++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0xA600++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree "TA_MPMC_N.TA Registers" rgroup.quad 0xA800++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Component code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Revision of the component" rgroup.quad 0xA818++0x07 line.quad 0x00 "CORE,Attached core identification" hexmask.quad.word 0x00 32.--47. 1. " VENDOR_CODE ,Vendor code" hexmask.quad.word 0x00 16.--31. 1. " CORE_CODE ,Core code" hexmask.quad.word 0x00 0.--15. 1. " REV_CODE ,Revision code" group.quad 0xA820++0x07 line.quad 0x00 "AGENT_CONTROL,Control over agent functions" bitfld.quad 0x00 4. " REJECT ,Request rejection control" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset control for agent and reset output on core interface" "No reset,Reset" rgroup.quad 0xA828++0x07 line.quad 0x00 "AGENT_STATUS,Observability of agent status" bitfld.long 0x00 7. " READEX ,Status of OCP ReadEx/Write" "Low,High" bitfld.quad 0x00 6. " BURST ,Status of open burst" "Low,High" bitfld.quad 0x00 5. " REQ_ACTIVE ,Requests outstanding" "Not requested,Requested" textline " " bitfld.quad 0x00 4. " RESP_WAITING ,Responses waiting" "Low,High" bitfld.quad 0x00 0. " CORE_RESET ,Reset observation for agent and reset input from core interface" "No reset,Reset" rgroup.quad 0xA900++0x1F line.quad 0x00 "BANDWIDTH_0,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x00 56.--63. 1. " FRACTION_3 ,Fractional bandwidth allocation for thread 4n+3" hexmask.quad.byte 0x00 40.--47. 1. " FRACTION_2 ,Fractional bandwidth allocation for thread 4n+2" hexmask.quad.byte 0x00 24.--31. 1. " FRACTION_1 ,Fractional bandwidth allocation for thread 4n+1" textline " " hexmask.quad.byte 0x00 8.--15. 1. " FRACTION_0 ,Fractional bandwidth allocation for thread 4n" line.quad 0x08 "BANDWIDTH_1,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x08 56.--63. 1. " FRACTION_7 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 40.--47. 1. " FRACTION_6 ,Fractional bandwidth allocation" hexmask.quad.byte 0x08 24.--31. 1. " FRACTION_5 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x08 8.--15. 1. " FRACTION_4 ,Fractional bandwidth allocation" line.quad 0x10 "BANDWIDTH_2,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x10 56.--63. 1. " FRACTION_11 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 40.--47. 1. " FRACTION_10 ,Fractional bandwidth allocation" hexmask.quad.byte 0x10 24.--31. 1. " FRACTION_9 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x10 8.--15. 1. " FRACTION_8 ,Fractional bandwidth allocation" line.quad 0x18 "BANDWIDTH_3,Fractional bandwidth allocations per thread" hexmask.quad.byte 0x18 56.--63. 1. " FRACTION_15 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 40.--47. 1. " FRACTION_14 ,Fractional bandwidth allocation" hexmask.quad.byte 0x18 24.--31. 1. " FRACTION_13 ,Fractional bandwidth allocation" textline " " hexmask.quad.byte 0x18 8.--15. 1. " FRACTION_12 ,Fractional bandwidth allocation" rgroup.quad 0xAA00++0x07 line.quad 0x00 "ALLOC_LIMIT_0,Min and max allocation count limits per thread" hexmask.quad.byte 0x00 8.--15. 1. " MAX_VALUE_0 ,Maximum allocation count limit for thread 4n" hexmask.quad.byte 0x00 0.--7. 1. " MIN_VALUE_0 ,Minimum allocation count limit for thread 4n" tree.end tree.end width 17. tree "S3220 Registers" rgroup.quad 0x00++0x07 line.quad 0x00 "COMPONENT,Component identification" hexmask.quad.word 0x00 16.--31. 1. " CODE ,Interconnect code" hexmask.quad.word 0x00 0.--15. 1. " REV ,Sonics3220 revision" rgroup.quad 0x10++0x0F line.quad 0x00 "NETWORK,ID of the interconnect" hexmask.quad.long 0x00 32.--63. 1. " ID ,Unique on-chip interconnect ID" line.quad 0x08 "INITIATOR_INFO,Initiator subsystem information" bitfld.quad 0x08 48.--50. " THREADS ,Number of initiator threads" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 44.--46. " CONNID_WIDTH ,Initiator subsystem connID width" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 40.--42. " BYTE_DATA_WIDTH_EXP ,Initiator subsystem data width" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 32.--37. " ADDR_WIDTH ,Initiator subsystem address width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.quad 0x08 24.--27. " PROT_GROUPS ,Number of protection groups" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x08 16.--23. 1. " NUMBER_REGIONS ,Number of regions" textline " " bitfld.quad 0x08 0.--3. " SEGMENTS ,Number of segments" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.quad 0x20++0x07 line.quad 0x00 "NETWORK_CONTROL,Global network control function" rbitfld.quad 0x00 56. " CLOCK_GATE_DISABLE ,Overrides clock gating" "No,Yes" rbitfld.quad 0x00 52. " THREAD0_PRI ,Set thread priority" "Low,High" rbitfld.quad 0x00 40. " EXT_CLOCK ,Global external clock control" "Low,High" textline " " bitfld.quad 0x00 8.--10. " TIMEOUT_BASE ,Timeout period" "Disabled,2^6 Sonics3220 clock cycles,2^8 Sonics3220 clock cycles,2^10 Sonics3220 clock cycles,2^12 Sonics3220 clock cycles,?..." tree.end width 0xB tree.end tree "MISC (System configuration registers)" base ad:0xE0700000 width 15. group.long 0x00++0x03 line.long 0x00 "SOC_CFG,SOC Configuration Register" bitfld.long 0x0 23.--24. " GPT_DBG_EN ,Disable clk_timer when CPUs are in debug state" "Enabled,Disabled - CPU0,Disabled - CPU1,Disabled - CPU0 or CPU1" bitfld.long 0x0 0.--4. " SOC_CFG ,Soc configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long 0x04++0x03 line.long 0x00 "BOOTSTRAP_CFG,Bootstrap register" bitfld.long 0x00 6. " GMII_SEL ,Reflects the inverted logic value of pad STRAP6 at reset release" "2V5 - STRAP6=1,3V3 - STRAP6=0" bitfld.long 0x00 5. " FLASH_SEL_16 ,Reflects the logic value of pad STRAP5 at reset release" "1V8,3V3" textline " " bitfld.long 0x00 4. " FLASH_SEL_8 ,Reflects the logic value of pad STRAP4 at reset release" "1V8,3V3" bitfld.long 0x00 0.--3. " BOOT_SEL ,Reflects the logic value of pads STRAP[3:0] at reset release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x100++0x0B line.long 0x00 "PCM_CFG,PCM configuration register" bitfld.long 0x00 20. " DDR_PHY_NO_SHUTOFF ,Selects whether the DDRIO_VDD1V8_1V5_OFF,DDRPHY_VDD1V2_OFF pads are used as control lines for the switching of DDRPHY external power supplies or as signals of GPIO_B block" "Low,High" bitfld.long 0x00 16.--19. " ACK_POWER_STATE ,Current power state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 15. " CONFIG_BAD ,Indicates that the current configuration could not be served" "No,Yes" bitfld.long 0x00 14. " CONFIG_ACK ,Acknowledges that the current configuration is active" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 13. " SW_CONFIG_ARM ,Expected final state to be reached by PCM - ARM" "Off,On" bitfld.long 0x00 12. " SW_CONFIG_GPU ,Expected final state to be reached by PCM - GPU" "Off,On" textline " " bitfld.long 0x00 11. " SW_CONFIG_CODEC ,Expected final state to be reached by PCM - CODEC" "Off,On" bitfld.long 0x00 10. " SW_CONFIG_BUS ,Expected final state to be reached by PCM - BUS" "Off,On" textline " " bitfld.long 0x00 9. " WAKEUP_TRIG[4] ,Ethernet (PMT interrupt) wakeup " "Not triggered,Triggered" bitfld.long 0x00 8. " WAKEUP_TRIG[3] ,RTC wakeup " "Not triggered,Triggered" textline " " bitfld.long 0x00 7. " WAKEUP_TRIG[2] ,GPIO (wakeup source on GPIO_WKUP_TRIG pad)" "Not triggered,Triggered" bitfld.long 0x00 6. " WAKEUP_TRIG[1] ,UOC wakeup " "Not triggered,Triggered" textline " " bitfld.long 0x00 4. " WAKEUP_EN[4] ,Ethernet wakeup enable" "Disabled,Enabled" bitfld.long 0x00 3. " WAKEUP_EN[3] ,RTC wakeup enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " WAKEUP_EN[2] ,GPIO wakeup enable" "Disabled,Enabled" bitfld.long 0x00 1. " WAKEUP_EN[1] ,UOC wakeup enable" "Disabled,Enabled" line.long 0x04 "PCM_WKUP_CFG,PCM wake-up configuration register" bitfld.long 0x04 19. " ETHERNET_WKUP_CONFIG_ARM ,Power island configuration to be reached when receiving wakeup trigger from ETHERNET" "Off,On" bitfld.long 0x04 18. " ETHERNET_WKUP_CONFIG_GPU ,Power island configuration to be reached when receiving wakeup trigger from ETHERNET" "Off,On" textline " " bitfld.long 0x04 17. " ETHERNET_WKUP_CONFIG_CODEC ,Power island configuration to be reached when receiving wakeup trigger from ETHERNET" "Off,On" bitfld.long 0x04 16. " ETHERNET_WKUP_CONFIG_BUS ,Power island configuration to be reached when receiving wakeup trigger from ETHERNET" "Off,On" textline " " bitfld.long 0x04 15. " USBDEV_WKUP_CONFIG_ARM ,Power island configuration to be reached when receiving wakeup trigger from USB DEVICE" "Off,On" bitfld.long 0x04 14. " USBDEV_WKUP_CONFIG_GPU ,Power island configuration to be reached when receiving wakeup trigger from USB DEVICE" "Off,On" textline " " bitfld.long 0x04 13. " USBDEV_WKUP_CONFIG_CODEC ,Power island configuration to be reached when receiving wakeup trigger from USB DEVICE" "Off,On" bitfld.long 0x04 12. " USBDEV_WKUP_CONFIG_BUS ,Power island configuration to be reached when receiving wakeup trigger from USB DEVICE" "Off,On" textline " " bitfld.long 0x04 11. " GPIO_WKUP_CONFIG_ARM ,Power island configuration to be reached when receiving wakeup trigger from GPIO" "Off,On" bitfld.long 0x04 10. " GPIO_WKUP_CONFIG_GPU ,Power island configuration to be reached when receiving wakeup trigger from GPIO" "Off,On" textline " " bitfld.long 0x04 9. " GPIO_WKUP_CONFIG_CODEC ,Power island configuration to be reached when receiving wakeup trigger from GPIO" "Off,On" bitfld.long 0x04 8. " GPIO_WKUP_CONFIG_BUS ,Power island configuration to be reached when receiving wakeup trigger from GPIO" "Off,On" textline " " bitfld.long 0x04 7. " RTC_WKUP_CONFIG_ARM ,Power island configuration to be reached when receiving wakeup trigger from RTC" "Off,On" bitfld.long 0x04 6. " RTC_WKUP_CONFIG_GPU ,Power island configuration to be reached when receiving wakeup trigger from RTC" "Off,On" textline " " bitfld.long 0x04 5. " RTC_WKUP_CONFIG_CODEC ,Power island configuration to be reached when receiving wakeup trigger from RTC" "Off,On" bitfld.long 0x04 4. " RTC_WKUP_CONFIG_BUS ,Power island configuration to be reached when receiving wakeup trigger from RTC" "Off,On" line.long 0x08 "SWITCH_CTR,Switch control register" bitfld.long 0x08 6.--7. " PD4_CTRL ,Maximum current available through switch ring of pd4 (ARM) during its powerup transien" "MIN,1,2,MAX" bitfld.long 0x08 4.--5. " PD3_CTRL ,Maximum current available through switch ring of pd3 (GPU) during its powerup transient" "MIN,1,2,MAX" textline " " bitfld.long 0x08 2.--3. " PD2_CTRL ,Maximum current available through switch ring of pd2 (CODEC) during its powerup transient" "MIN,1,2,MAX" bitfld.long 0x08 0.--1. " PD1_CTRL ,Maximum current available through switch ring of pd1 (BUS) during its powerup transient" "MIN,1,2,MAX" width 19. group.long 0x200++0x13 line.long 0x00 "SYS_CLK_CTRL,System Clocks Register" bitfld.long 0x00 27. " HCLK_SEL ,HCLK selector" "CPU_CLK/3,SSCG6" bitfld.long 0x00 23.--25. " CLKSYS_SRC ,System clock source (sys_clk) in NORMAL mode" "PLL1,PLL1,PLL1,PLL1,SSCG4,SSCG4,PLL2,PLL3" textline " " bitfld.long 0x00 21.--22. " OSCIDIV_CFG ,Osci1 divider factor in SLOW mode" "/2,/4,/16,/32" bitfld.long 0x00 20. " OSCIDIV_EN ,Enable OSCI1 divider in SLOW mode" "Disabled,Enabled" textline " " rbitfld.long 0x00 16.--19. " SYS_STATUS ,System Clock Status" "DOZE,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,XTALCNTRL/SWFROMXTAL,Reserved,SWTOXTAL/SLOW,Reserved,Reserved,Reserved,PLLCNTRL/SWFROMPLL,SWTOPLL/NORMAL" rbitfld.long 0x00 9. " OSCI30_OK ,OSCI30 (24 MHz OSCI1 clock) status" "Not stable,Stable" textline " " rbitfld.long 0x00 8. " OSCI32K_OK ,OSCI32K (32KHz osci2 clock) status" "Not stable,Stable" bitfld.long 0x00 4. " XTALTIMEOUT_EN ,XTAL Timer enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " PLLTIMEOUT_EN ,PLL Timer enable" "Disabled,Enabled" bitfld.long 0x00 0.--2. " SYS_MODE_REQ: ,Clock Mode Selector" "Reserved,DOZE - osci2 32KHz,SLOW - OSCI1 24 MHz,NORMAL,?..." line.long 0x04 "SYS_SW_RES,System SW reset" setclrfld.long 0x04 2. 0x04 0. 0x04 1. " SW_RESET_STATUS_set/clr ,System reset" "No reset,Reset" line.long 0x08 "SYS_CLK_PLLTIMER,TimerOut value for SLOW to NORMAL switch" hexmask.long 0x08 0.--24. 1. " PLLCOUNT ,TimerOut value for SLOW to NORMAL switch" line.long 0x0C "SYS_CLK_OSCITIMER,TimerOut value for DOZE to SLOW switch" hexmask.long 0x0C 0.--24. 1. " PLLCOUNT ,TimerOut value for DOZE to SLOW switch" line.long 0x10 "PLL_CFG,Pll sources configuration" bitfld.long 0x10 31. " CLCD_SYNTH_SEL ,SSCG5 input clock source selector" "Vco1div4,Pll2out" bitfld.long 0x10 29.--30. " GEN_SSCG23_SEL ,SSCG[2,3] clock source selector" "Vco1div4,Vco2div2,Pll2out,?..." textline " " bitfld.long 0x10 27.--28. " GEN_SSCG01_SEL ,SSCG[0,1] clock source selector" "Vco1div4,Co3div2,Pll3out,?..." bitfld.long 0x10 24.--25. " PLL3_CLK_SEL ,PLL3 input clock source selector" "OSCI1 - 24 MHz,Osci3 - 25 MHz,XGPIO132 pad,?..." textline " " bitfld.long 0x10 22.--23. " PLL2_CLK_SEL ,PLL2 input clock source selector" "OSCI1 - 24 MHz,Osci3 - 25 MHz,XGPIO132 pad,?..." bitfld.long 0x10 20.--21. " PLL1_CLK_SEL ,PLL1 input clock source selector" "OSCI1 - 24 MHz,Osci3 - 25 MHz,XGPIO90 pad,?..." group.long 0x214++0x2F line.long 0x0 "PLL1_CTR,Pll control register" bitfld.long 0x0 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration" "8 uA,8.5 uA,9 uA,9 uA,10 uA,10.5 uA,11 uA,11.5 uA,12 uA,12.5 uA,13 uA,13.5 uA,14 uA,14.5 uA,15 uA,15.5 uA,16 uA,16.5 uA,17 uA,17.5 uA,18 uA,18.5 uA,19 uA,19.5 uA,20 uA,20.5 uA,21 uA,21.5 uA,22 uA,22.5 uA,23 uA,23.5 uA" bitfld.long 0x0 8. " PLL_CONTROL1[5] ,Fbkclk_sel" "Internal feedback,External feedback" textline " " bitfld.long 0x0 6.--7. " PLL_CONTROL1[4:3] ,Sigma-delta order" "1st,2nd,?..." bitfld.long 0x0 4.--5. " PLL_CONTROL1[2:1] ,DITHER-MODE" "Normal,Fractional-N,Dithering - DSM,Dithering - SSM" textline " " bitfld.long 0x0 3. " PLL_CONTROL1[0] ,Sample" "Parameters sample,No action" bitfld.long 0x0 2. " PLL_ENABLE ,Pll enable" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " PLL_RESETN ,Pll soft reset command" "No reset,Reset" rbitfld.long 0x0 0. " PLL_LOCK ,Pll lock status" "Unlocked,Locked" line.long 0x0+0x04 "PLL1_FRQ,Pll frequency register" hexmask.long.word 0x0+0x04 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long 0x0+0x04 8.--10. " PLL_POSTDIV_P ,Pll post divisor values" "Fvco,Fvco / 2,Fvco / 4,Fvco / 8,Fvco / 16,Fvco / 32,Fvco / 64,?..." textline " " hexmask.long.byte 0x0+0x04 0.--7. 1. " PLL_PREDIV_N ,Pll pre divisor values" line.long 0x0+0x08 "PLL1_MOD,Pll modulation parameter register" hexmask.long.word 0x0+0x08 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word 0x0+0x08 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0xC "PLL2_CTR,Pll control register" bitfld.long 0xC 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration" "8 uA,8.5 uA,9 uA,9 uA,10 uA,10.5 uA,11 uA,11.5 uA,12 uA,12.5 uA,13 uA,13.5 uA,14 uA,14.5 uA,15 uA,15.5 uA,16 uA,16.5 uA,17 uA,17.5 uA,18 uA,18.5 uA,19 uA,19.5 uA,20 uA,20.5 uA,21 uA,21.5 uA,22 uA,22.5 uA,23 uA,23.5 uA" bitfld.long 0xC 8. " PLL_CONTROL1[5] ,Fbkclk_sel" "Internal feedback,External feedback" textline " " bitfld.long 0xC 6.--7. " PLL_CONTROL1[4:3] ,Sigma-delta order" "1st,2nd,?..." bitfld.long 0xC 4.--5. " PLL_CONTROL1[2:1] ,DITHER-MODE" "Normal,Fractional-N,Dithering - DSM,Dithering - SSM" textline " " bitfld.long 0xC 3. " PLL_CONTROL1[0] ,Sample" "Parameters sample,No action" bitfld.long 0xC 2. " PLL_ENABLE ,Pll enable" "Disabled,Enabled" textline " " bitfld.long 0xC 1. " PLL_RESETN ,Pll soft reset command" "No reset,Reset" rbitfld.long 0xC 0. " PLL_LOCK ,Pll lock status" "Unlocked,Locked" line.long 0xC+0x04 "PLL2_FRQ,Pll frequency register" hexmask.long.word 0xC+0x04 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long 0xC+0x04 8.--10. " PLL_POSTDIV_P ,Pll post divisor values" "Fvco,Fvco / 2,Fvco / 4,Fvco / 8,Fvco / 16,Fvco / 32,Fvco / 64,?..." textline " " hexmask.long.byte 0xC+0x04 0.--7. 1. " PLL_PREDIV_N ,Pll pre divisor values" line.long 0xC+0x08 "PLL2_MOD,Pll modulation parameter register" hexmask.long.word 0xC+0x08 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word 0xC+0x08 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x18 "PLL3_CTR,Pll control register" bitfld.long 0x18 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration" "8 uA,8.5 uA,9 uA,9 uA,10 uA,10.5 uA,11 uA,11.5 uA,12 uA,12.5 uA,13 uA,13.5 uA,14 uA,14.5 uA,15 uA,15.5 uA,16 uA,16.5 uA,17 uA,17.5 uA,18 uA,18.5 uA,19 uA,19.5 uA,20 uA,20.5 uA,21 uA,21.5 uA,22 uA,22.5 uA,23 uA,23.5 uA" bitfld.long 0x18 8. " PLL_CONTROL1[5] ,Fbkclk_sel" "Internal feedback,External feedback" textline " " bitfld.long 0x18 6.--7. " PLL_CONTROL1[4:3] ,Sigma-delta order" "1st,2nd,?..." bitfld.long 0x18 4.--5. " PLL_CONTROL1[2:1] ,DITHER-MODE" "Normal,Fractional-N,Dithering - DSM,Dithering - SSM" textline " " bitfld.long 0x18 3. " PLL_CONTROL1[0] ,Sample" "Parameters sample,No action" bitfld.long 0x18 2. " PLL_ENABLE ,Pll enable" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " PLL_RESETN ,Pll soft reset command" "No reset,Reset" rbitfld.long 0x18 0. " PLL_LOCK ,Pll lock status" "Unlocked,Locked" line.long 0x18+0x04 "PLL3_FRQ,Pll frequency register" hexmask.long.word 0x18+0x04 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long 0x18+0x04 8.--10. " PLL_POSTDIV_P ,Pll post divisor values" "Fvco,Fvco / 2,Fvco / 4,Fvco / 8,Fvco / 16,Fvco / 32,Fvco / 64,?..." textline " " hexmask.long.byte 0x18+0x04 0.--7. 1. " PLL_PREDIV_N ,Pll pre divisor values" line.long 0x18+0x08 "PLL3_MOD,Pll modulation parameter register" hexmask.long.word 0x18+0x08 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word 0x18+0x08 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" line.long 0x24 "PLL4_CTR,Pll control register" bitfld.long 0x24 9.--13. " PLL_CONTROL2 ,Pll charge pump configuration" "8 uA,8.5 uA,9 uA,9 uA,10 uA,10.5 uA,11 uA,11.5 uA,12 uA,12.5 uA,13 uA,13.5 uA,14 uA,14.5 uA,15 uA,15.5 uA,16 uA,16.5 uA,17 uA,17.5 uA,18 uA,18.5 uA,19 uA,19.5 uA,20 uA,20.5 uA,21 uA,21.5 uA,22 uA,22.5 uA,23 uA,23.5 uA" bitfld.long 0x24 8. " PLL_CONTROL1[5] ,Fbkclk_sel" "Internal feedback,External feedback" textline " " bitfld.long 0x24 6.--7. " PLL_CONTROL1[4:3] ,Sigma-delta order" "1st,2nd,?..." bitfld.long 0x24 4.--5. " PLL_CONTROL1[2:1] ,DITHER-MODE" "Normal,Fractional-N,Dithering - DSM,Dithering - SSM" textline " " bitfld.long 0x24 3. " PLL_CONTROL1[0] ,Sample" "Parameters sample,No action" bitfld.long 0x24 2. " PLL_ENABLE ,Pll enable" "Disabled,Enabled" textline " " bitfld.long 0x24 1. " PLL_RESETN ,Pll soft reset command" "No reset,Reset" rbitfld.long 0x24 0. " PLL_LOCK ,Pll lock status" "Unlocked,Locked" line.long 0x24+0x04 "PLL4_FRQ,Pll frequency register" hexmask.long.word 0x24+0x04 16.--31. 1. " PLL_FBKDIV_M ,Pll feedback divisor values" bitfld.long 0x24+0x04 8.--10. " PLL_POSTDIV_P ,Pll post divisor values" "Fvco,Fvco / 2,Fvco / 4,Fvco / 8,Fvco / 16,Fvco / 32,Fvco / 64,?..." textline " " hexmask.long.byte 0x24+0x04 0.--7. 1. " PLL_PREDIV_N ,Pll pre divisor values" line.long 0x24+0x08 "PLL4_MOD,Pll modulation parameter register" hexmask.long.word 0x24+0x08 16.--28. 1. " PLL_MODPERIOD ,Pll modulation wave parameters" hexmask.long.word 0x24+0x08 0.--15. 1. " PLL_SLOPE ,Pll slope modulation wave parameters" group.long 0x244++0x23 line.long 0x00 "PERIP_CLK_CFG,Peripheral clocks configuration" bitfld.long 0x00 15. " SPDIFOUT_CLK_SEL ,SPDIF_OUT clock selector" "XGPIO102 pad,SSCG2" bitfld.long 0x00 14. " SPDIFIN_CLK_SEL ,SPDIFIN clock selector" "Pll2out,SSCG3" textline " " bitfld.long 0x00 13. " GPT3_CLK_SEL ,GPT3 clk_timer selector" "OSCI1 - 24 MHz,PCLK - synchronous" bitfld.long 0x00 12. " GPT2_CLK_SEL ,GPT2 clk_timer selector" "OSCI1 - 24 MHz,PCLK - synchronous" textline " " bitfld.long 0x00 9. " GPT1_CLK_SEL ,GPT1 clk_timer selector" "OSCI1 - 24 MHz,PCLK - synchronous" bitfld.long 0x00 8. " GPT0_CLK_SEL ,GPT0 clk_timer selector" "OSCI1 - 24 MHz,PCLK - synchronous" textline " " bitfld.long 0x00 6.--7. " UARTCLK1_SEL ,UART1 clock selector" "48 MHz USB PHY,24 MHz OSCI1,UART1_CLK_SYNT,?..." bitfld.long 0x00 4.--5. " UARTCLK0_SEL ,UART0 clock selector" "48 MHz USB PHY,24 MHz OSCI1,UART0_CLK_SYNT,?..." textline " " bitfld.long 0x00 2.--3. " CLCDCLK_SEL ,CLCD clock selector" "48 MHz USB PHY,SSCG5,XGPIO132 pad,Pll3out" bitfld.long 0x00 1. " C3CLK_SEL ,C3 clock selector" "48 MHz USB PHY,C3_CLK_SYNT" textline " " bitfld.long 0x00 0. " OSCI2_DIS ,Disable osci2 as system clock source" "No,Yes" line.long 0x04 "GMAC_CLK_CFG,GMAC clocks configuration register" bitfld.long 0x04 3.--5. " MACPHY_SEL ,GMAC PHY Interface Selector" "GMII/MII,RGMII,Reserved,Reserved,RMII,?..." bitfld.long 0x04 2. " SYNTH_EN ,GMAC clock synthesizer source enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--1. " CLK_SEL ,GMAC internal source clock definition" "MAC_GTXCLK125 pad,Pll2out,Osci3 (25/100 MHz),?..." line.long 0x08 "I2S_CLK_CFG,I2S_M clock configuration register" bitfld.long 0x08 27.--31. " SCLK_DIV_X ,I2S_M clock synthesizer X parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22.--26. " SCLK_DIV_Y ,I2S_M clock synthesizer Y parameter ; with X less than or equal to Y/2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x08 21. " SCLK_DIV_SEL ,I2S_M clock synthesizer Fout selection" "Duty cycle 50%,Duty cycle X/Y*100%" bitfld.long 0x08 20. " SCLK_DIV_EN ,I2S_M clock synthesizer enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x08 12.--19. 1. " REFOUT_DIV_X ,I2S refout clock X synthesizer parameter" hexmask.long.byte 0x08 4.--11. 1. " REFOUT_DIV_Y ,I2S refout clock Y synthesizer parameter ; with X less than or equal to Y/2" textline " " bitfld.long 0x08 3. " REFOUT_DIV_SEL ,I2S refout clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" bitfld.long 0x08 2. " REFOUT_DIV_EN ,I2S refout clock synthesizer enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--1. " REFOUT_DIV_SRC ,I2S refout synthesizer source selection" "Vco1div2,Pll2out,Pll3out,I2S_OUT_REFCLK pad" line.long 0x0C "C3_CLK_SYNT,C3 clock synthesizer configuration" bitfld.long 0x0C 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x0C 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x0C 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x0C 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x10 "UART0_CLK_SYNT,UART0 clock synthesizer configuration" bitfld.long 0x10 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x10 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x10 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x10 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x14 "UART1_CLK_SYNT,UART1 clock synthesizer configuration" bitfld.long 0x14 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x14 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x14 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x14 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x18 "GMAC_CLK_SYNT,GMAC clock synthesizer configuration" bitfld.long 0x18 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x18 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Fin * X / (2 * Y),Fin * X / Y" textline " " hexmask.long.word 0x18 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x18 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x1C "MCIF_SD_CLK_SYNT,MCIF_SD clock synthesizer configuration" bitfld.long 0x1C 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x1C 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x1C 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x1C 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x20 "MCIF_CFXD_CLK_SYNT,MCIF_CF_XD clock synthesizer configuration" bitfld.long 0x20 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x20 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x20 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x20 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" group.long 0x270++0x2F line.long 0x00 "ADC_CLK_SYNT,ADC converter clock synthesizer configuration register" bitfld.long 0x00 31. " SYNT_CLK_ENB ,Synthesizer enable" "Disabled,Enabled" bitfld.long 0x00 30. " SYNT_CLKOUT_SEL ,Output clock synthesizer selection" "Duty cycle 50%,Duty cycle X/Y*100%" textline " " hexmask.long.word 0x00 16.--27. 1. " SYNT_XDIV ,X synthesizer parameter ; with X less than or equal to Y/2" hexmask.long.word 0x00 0.--11. 1. " SYNT_YDIV ,Y synthesizer parameter" line.long 0x04 "AMBA_CLK_SSCG,SSCG6 configuration register" bitfld.long 0x04 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x04 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x04 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x04 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x04 0.--16. 1. " TO ,Division factor" line.long 0x08 "AMBA_CLK_SSCG_MOD,SSCG6 modulation configuration" bitfld.long 0x08 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte 0x08 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte 0x08 0.--7. 1. " DT ,Modulation depth" line.long 0x0C "CLCD_CLK_SSCG,SSCG5 configuration" bitfld.long 0x0C 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x0C 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x0C 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x0C 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x0C 0.--16. 1. " TO ,Division factor" line.long 0x10 "CLCD_CLK_SSCG_MOD,SSCG5 modulation configuration" bitfld.long 0x10 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte 0x10 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte 0x10 0.--7. 1. " DT ,Modulation depth" line.long 0x14 "SYS_CLK_SSCG,SSCG4 configuration" bitfld.long 0x14 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x14 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x14 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x14 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x14 0.--16. 1. " TO ,Division factor" line.long 0x18 "SYS_CLK_SSCG_MOD,SSCG4 modulation configuration" bitfld.long 0x18 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte 0x18 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte 0x18 0.--7. 1. " DT ,Modulation depth" line.long 0x1C "GEN_CLK_SSCG0,SSCG0 configuration" bitfld.long 0x1C 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x1C 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x1C 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x1C 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x1C 0.--16. 1. " TO ,Division factor" line.long (0x1C+0x04) "GEN_CLK_SSCG0_MOD,SSCG0 modulation configuration" bitfld.long (0x1C+0x04) 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte (0x1C+0x04) 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte (0x1C+0x04) 0.--7. 1. " DT ,Modulation depth" line.long 0x24 "GEN_CLK_SSCG1,SSCG1 configuration" bitfld.long 0x24 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x24 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x24 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x24 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x24 0.--16. 1. " TO ,Division factor" line.long (0x24+0x04) "GEN_CLK_SSCG1_MOD,SSCG1 modulation configuration" bitfld.long (0x24+0x04) 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte (0x24+0x04) 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte (0x24+0x04) 0.--7. 1. " DT ,Modulation depth" line.long 0x2C "GEN_CLK_SSCG2,SSCG2 configuration" bitfld.long 0x2C 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x2C 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x2C 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x2C 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x2C 0.--16. 1. " TO ,Division factor" group.long 0x300++0x0B line.long 0x00 "GEN_CLK_SSCG2_MOD,SSCG2 modulation configuration" bitfld.long 0x00 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte 0x00 0.--7. 1. " DT ,Modulation depth" line.long 0x04 "GEN_CLK_SSCG3,SSCG3 configuration" bitfld.long 0x04 31. " STOPMEAS ,SSCG Measurement Unit disable" "No,Yes" hexmask.long.word 0x04 19.--28. 1. " TIN_TR ,Tin/Tr value" textline " " rbitfld.long 0x04 18. " LOCK ,Lock status" "Not locked,Locked" bitfld.long 0x04 17. " SWRST ,Active high software reset" "No reset,Reset" textline " " hexmask.long.tbyte 0x04 0.--16. 1. " TO ,Division factor" line.long 0x08 "GEN_CLK_SSCG3_MOD,SSCG3 modulation configuration" bitfld.long 0x08 16. " MOD_EN ,Modulation enable" "Disabled,Enabled" hexmask.long.byte 0x08 8.--15. 1. " FMOD ,Modulation frequency parameter" textline " " hexmask.long.byte 0x08 0.--7. 1. " DT ,Modulation depth" group.long 0x30C++0x0B line.long 0x00 "PERIP1_CLK_ENB,Peripherial clock enable register" bitfld.long 0x00 31. " RTC_CLKEN ,RTC APB clock enable" "Disabled,Enabled" bitfld.long 0x00 30. " ADC_CLKEN ,ADC APB and Converter clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " C3_CLKEN ,C3 AHB and clk48 clocks enable" "Disabled,Enabled" bitfld.long 0x00 27. " CLCD_CLKEN ,CLCD AHB and clcdclk clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " DMA_CLKEN ,DMA0 | DMA1 AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 24. " GPIOB_CLKEN ,GPIO-B8 APB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " GPIOA_CLKEN ,GPIO-B7 APB clock enable" "Disabled,Enabled" bitfld.long 0x00 22. " GPT1_CLKEN ,GPT-B5 APB and clk_timer clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " GPT0_CLKEN ,GPT-B4 APB and clk_timer clocks enable" "Disabled,Enabled" bitfld.long 0x00 20. " I2S_M_CLKEN ,I2S_M APB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " I2S_S_CLKEN ,I2S_S APB clock enable" "Disabled,Enabled" bitfld.long 0x00 18. " I2C0_CLKEN ,I2C0 APB and i2cclk clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " SSP_CLKEN ,SSP APB clock enable" "Disabled,Enabled" bitfld.long 0x00 15. " UART0_CLKEN ,UART0 APB and uartclk clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCIE_SATA_CLKEN ,PCIE SATA AXI clock enable" "Disabled,Enabled" bitfld.long 0x00 11. " UOC_CLKEN ,UOC AHB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UHC1_CLKEN ,UHC1 AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 9. " UHC0_CLKEN ,UHC0 AHB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " GMAC_CLKEN ,GMAC AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 7. " CF_XD_CLKEN ,MIF_CF_XD AHB and cf_xd_clk clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " SD_CLKEN ,MIF_SD AHB and sd_clk clocks enable" "Disabled,Enabled" bitfld.long 0x00 5. " SMI_CLKEN ,SMI AHB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " FSMC_CLKEN ,FSMC AHB clock enable" "Disabled,Enabled" bitfld.long 0x00 3. " SYSRAM0_CLKEN ,System RAM clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SYSRAM1_CLKEN ,Always On RAM clock enable" "Disabled,Enabled" bitfld.long 0x00 1. " SYSROM_CLKEN ,System ROM clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " BUS_CLKEN ,Busmatrix AHB-AXI clock enable" "Disabled,Enabled" line.long 0x04 "PERIP2_CLK_ENB,Peripherial clock enable register" bitfld.long 0x04 8. " THSENS_CLKEN ,Thermal sensor clock enable" "Disabled,Enabled" bitfld.long 0x04 7. " I2S_REFOUT_CLKEN ,I2S reference clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " ACP_CLKEN ,ACP (HCLK) clock enable" "Disabled,Enabled" bitfld.long 0x04 5. " GPT3_CLKEN ,GPT-B16 APB and clk_timer clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " GPT2_CLKEN ,GPT-B15 APB and clk_timer clocks enable" "Disabled,Enabled" bitfld.long 0x04 3. " KBD_CLKEN ,Keyboard APB clock enable" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " CPU_DBG_CLKEN ,CPU CoreSight clocks enable" "Disabled,Enabled" bitfld.long 0x04 1. " MPMC_CTRL_PHY_CLKEN ,MPMC clk and clkd2 clocks enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " MPMC_AMBA_CLKEN ,MPMC AMBA clock enable" "Disabled,Enabled" line.long 0x08 "PERIP3_CLK_ENB,Peripherial clock enable register" bitfld.long 0x08 18. " XGPIO_CLKEN ,Thermal sensor clock enable" "Disabled,Enabled" bitfld.long 0x08 16. " VDEC_CLKEN ,VIDEO DECODER clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " VENC_CLKEN ,VIDEO ENCODER clock enable" "Disabled,Enabled" bitfld.long 0x08 13. " SPDIF_OUT_CLKEN ,SPDIF_OUT clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " SPDIF_IN_CLKEN ,SPDIF_IN clock enable" "Disabled,Enabled" bitfld.long 0x08 11. " VIDEO_IN_CLKEN ,VIDEO INPUT (VIP) clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " CAM1_CLKEN ,CAM1 clock enable" "Disabled,Enabled" bitfld.long 0x08 9. " CAM2_CLKEN ,CAM2 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " CAM3_CLKEN ,CAM3 clock enable" "Disabled,Enabled" bitfld.long 0x08 7. " CAM4_CLKEN ,CAM4 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " GPU_CLKEN ,GPU clock enable" "Disabled,Enabled" bitfld.long 0x08 5. " CEC0_CLKEN ,CEC0 clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " CEC1_CLKEN ,CEC1 clock enable" "Disabled,Enabled" bitfld.long 0x08 3. " PWM_CLKEN ,PWM clock enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " I2C1_CLKEN ,I2C1 clock enable" "Disabled,Enabled" bitfld.long 0x08 1. " UART1_CLKEN ,UART1 clock enable" "Disabled,Enabled" group.long 0x318++0x0B line.long 0x00 "PERIP1_SW_RST,Peripherial reset register" bitfld.long 0x00 31. " RTC_SWRST ,RTC APB soft reset" "No reset,Reset" bitfld.long 0x00 30. " ADC_SWRST ,ADC APB and Converter soft reset" "No reset,Reset" textline " " bitfld.long 0x00 29. " C3_SWRST ,C3 AHB and clk48 soft reset" "No reset,Reset" bitfld.long 0x00 27. " CLCD_SWRST ,CLCD AHB and clcdclk soft reset" "No reset,Reset" textline " " bitfld.long 0x00 25. " DMA_SWRST ,DMA0 | DMA1 AHB soft reset" "No reset,Reset" bitfld.long 0x00 24. " GPIOB_SWRST ,GPIO-B8 APB soft reset" "No reset,Reset" textline " " bitfld.long 0x00 23. " GPIOA_SWRST ,GPIO-B7 APB soft reset" "No reset,Reset" bitfld.long 0x00 22. " GPT1_SWRST ,GPT-B5 APB and clk_timer soft reset" "No reset,Reset" textline " " bitfld.long 0x00 21. " GPT0_SWRST ,GPT-B4 APB and clk_timer soft reset" "No reset,Reset" bitfld.long 0x00 20. " I2S_M_SWRST ,I2S_M APB soft reset" "No reset,Reset" textline " " bitfld.long 0x00 19. " I2S_S_SWRST ,I2S_S APB soft reset" "No reset,Reset" bitfld.long 0x00 18. " I2C0_SWRST ,I2C0 APB and i2cclk soft reset" "No reset,Reset" textline " " bitfld.long 0x00 17. " SSP_SWRST ,SSP APB soft reset" "No reset,Reset" bitfld.long 0x00 15. " UART0_SWRST ,UART0 APB and uartclk soft reset" "No reset,Reset" textline " " bitfld.long 0x00 12. " PCIE_SATA_SWRST ,PCIE SATA AXI soft reset" "No reset,Reset" bitfld.long 0x00 11. " UOC_SWRST ,UOC AHB soft reset" "No reset,Reset" textline " " bitfld.long 0x00 10. " UHC1_SWRST ,UHC1 AHB soft reset" "No reset,Reset" bitfld.long 0x00 9. " UHC0_SWRST ,UHC0 AHB soft reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " GMAC_SWRST ,GMAC AHB soft reset" "No reset,Reset" bitfld.long 0x00 7. " CF_XD_SWRST ,MIF_CF_XD AHB and cf_xd_clk soft reset" "No reset,Reset" textline " " bitfld.long 0x00 6. " SD_SWRST ,MIF_SD AHB and sd_clk soft reset" "No reset,Reset" bitfld.long 0x00 5. " SMI_SWRST ,SMI AHB soft reset" "No reset,Reset" textline " " bitfld.long 0x00 4. " FSMC_SWRST ,FSMC AHB soft reset" "No reset,Reset" bitfld.long 0x00 3. " SYSRAM0_SWRST ,System RAM soft reset" "No reset,Reset" textline " " bitfld.long 0x00 2. " SYSRAM1_SWRST ,Always On RAM soft reset" "No reset,Reset" bitfld.long 0x00 1. " SYSROM_SWRST ,System ROM soft reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " BUS_SWRST ,Busmatrix AHB-AXI soft reset" "No reset,Reset" line.long 0x04 "PERIP2_SW_RST,Peripherial soft reset register" bitfld.long 0x04 8. " THSENS_SWRST ,Thermal sensor soft reset" "No reset,Reset" bitfld.long 0x04 7. " I2S_REFOUT_SWRST ,I2S reference soft reset" "No reset,Reset" textline " " bitfld.long 0x04 6. " ACP_SWRST ,ACP (HCLK) soft reset" "No reset,Reset" bitfld.long 0x04 5. " GPT3_SWRST ,GPT-B16 APB and clk_timer soft reset" "No reset,Reset" textline " " bitfld.long 0x04 4. " GPT2_SWRST ,GPT-B15 APB and clk_timer soft reset" "No reset,Reset" bitfld.long 0x04 3. " KBD_SWRST ,Keyboard APB soft reset" "No reset,Reset" textline " " bitfld.long 0x04 2. " CPU_DBG_SWRST ,CPU CoreSight soft reset" "No reset,Reset" bitfld.long 0x04 1. " MPMC_CTRL_PHY_SWRST ,MPMC clk and clkd2 soft reset" "No reset,Reset" textline " " bitfld.long 0x04 0. " MPMC_AMBA_SWRST ,MPMC AMBA soft reset" "No reset,Reset" line.long 0x08 "PERIP3_SW_RST,Peripherial soft reset register" bitfld.long 0x08 18. " XGPIO_SWRST ,Thermal sensor soft reset" "No reset,Reset" bitfld.long 0x08 16. " VDEC_SWRST ,VIDEO DECODER soft reset" "No reset,Reset" textline " " bitfld.long 0x08 15. " VENC_SWRST ,VIDEO ENCODER soft reset" "No reset,Reset" bitfld.long 0x08 13. " SPDIF_OUT_SWRST ,SPDIF_OUT soft reset" "No reset,Reset" textline " " bitfld.long 0x08 12. " SPDIF_IN_SWRST ,SPDIF_IN soft reset" "No reset,Reset" bitfld.long 0x08 11. " VIDEO_IN_SWRST ,VIDEO INPUT (VIP) soft reset" "No reset,Reset" textline " " bitfld.long 0x08 10. " CAM1_SWRST ,CAM1 soft reset" "No reset,Reset" bitfld.long 0x08 9. " CAM2_SWRST ,CAM2 soft reset" "No reset,Reset" textline " " bitfld.long 0x08 8. " CAM3_SWRST ,CAM3 soft reset" "No reset,Reset" bitfld.long 0x08 7. " CAM4_SWRST ,CAM4 soft reset" "No reset,Reset" textline " " bitfld.long 0x08 6. " GPU_SWRST ,GPU soft reset" "No reset,Reset" bitfld.long 0x08 5. " CEC0_SWRST ,CEC0 soft reset" "No reset,Reset" textline " " bitfld.long 0x08 4. " CEC1_SWRST ,CEC1 soft reset" "No reset,Reset" bitfld.long 0x08 3. " PWM_SWRST ,PWM soft reset" "No reset,Reset" textline " " bitfld.long 0x08 2. " I2C1_SWRST ,I2C1 soft reset" "No reset,Reset" bitfld.long 0x08 1. " UART1_SWRST ,UART1 soft reset" "No reset,Reset" hgroup.long 0x400++0x03 hide.long 0x00 "DMAC_HS_SEL,DMAC HandShake Selection register" group.long 0x404++0x3B line.long 0x00 "DMAC_SEL,DMA Selection" bitfld.long 0x00 11. " HS11_27_MAP ,DMA Selection" "Hs11DMA0 / hs27 DMA1,Hs11DMA1 / hs27DMA0" bitfld.long 0x00 10. " HS10_26_MAP ,DMA Selection" "Hs10DMA0 / hs26DMA1,Hs10DMA1 / hs26DMA0" textline " " bitfld.long 0x00 9. " HS10_25_MAP ,DMA Selection" "Hs9DMA0 / hs25DMA1,Hs9DMA1 / hs25DMA0" bitfld.long 0x00 8. " HS10_24_MAP ,DMA Selection" "Hs8DMA0 / hs24DMA1,Hs8DMA1 / hs24DMA0" textline " " bitfld.long 0x00 7. " HS10_23_MAP ,DMA Selection" "Hs7DMA0 / hs23DMA1,Hs7DMA1 / hs23DMA0" bitfld.long 0x00 6. " HS10_22_MAP ,DMA Selection" "Hs6DMA0 / hs22DMA1,Hs6DMA1 / hs22DMA0" textline " " bitfld.long 0x00 5. " HS10_21_MAP ,DMA Selection" "Hs5DMA0 / hs21DMA1,Hs5DMA1 / hs21DMA0" bitfld.long 0x00 4. " HS10_20_MAP ,DMA Selection" "Hs4DMA0 / hs20DMA1,Hs4DMA1 / hs20DMA0" textline " " bitfld.long 0x00 3. " HS10_19_MAP ,DMA Selection" "Hs3DMA0 / hs19DMA1,Hs3DMA1 / hs19DMA0" bitfld.long 0x00 2. " HS10_18_MAP ,DMA Selection" "Hs2DMA0 / hs18DMA1,Hs2DMA1 / hs18DMA0" textline " " bitfld.long 0x00 1. " HS10_17_MAP ,DMA Selection" "Hs1DMA0 / hs17DMA1,Hs1DMA1 / hs17DMA0" bitfld.long 0x00 0. " HS10_16_MAP ,DMA Selection" "Hs0DMA0 / hs16DMA1,Hs0DMA1 / hs16DMA0" line.long 0x04 "DMAC_FLOW_SEL,DMA flow selection" bitfld.long 0x04 31. " HS31_FLOW ,Flow controller 31" "DMA,Peripheral" bitfld.long 0x04 30. " HS30_FLOW ,Flow controller 30" "DMA,Peripheral" textline " " bitfld.long 0x04 29. " HS29_FLOW ,Flow controller 29" "DMA,Peripheral" bitfld.long 0x04 28. " HS28_FLOW ,Flow controller 28" "DMA,Peripheral" textline " " bitfld.long 0x04 27. " HS27_FLOW ,Flow controller 27" "DMA,Peripheral" bitfld.long 0x04 26. " HS26_FLOW ,Flow controller 26" "DMA,Peripheral" textline " " bitfld.long 0x04 25. " HS25_FLOW ,Flow controller 25" "DMA,Peripheral" bitfld.long 0x04 24. " HS24_FLOW ,Flow controller 24" "DMA,Peripheral" textline " " bitfld.long 0x04 23. " HS23_FLOW ,Flow controller 23" "DMA,Peripheral" bitfld.long 0x04 22. " HS22_FLOW ,Flow controller 22" "DMA,Peripheral" textline " " bitfld.long 0x04 21. " HS21_FLOW ,Flow controller 21" "DMA,Peripheral" bitfld.long 0x04 20. " HS20_FLOW ,Flow controller 20" "DMA,Peripheral" textline " " bitfld.long 0x04 19. " HS19_FLOW ,Flow controller 19" "DMA,Peripheral" bitfld.long 0x04 18. " HS18_FLOW ,Flow controller 18" "DMA,Peripheral" textline " " bitfld.long 0x04 17. " HS17_FLOW ,Flow controller 17" "DMA,Peripheral" bitfld.long 0x04 16. " HS16_FLOW ,Flow controller 16" "DMA,Peripheral" textline " " bitfld.long 0x04 15. " HS15_FLOW ,Flow controller 15" "DMA,Peripheral" bitfld.long 0x04 14. " HS14_FLOW ,Flow controller 14" "DMA,Peripheral" textline " " bitfld.long 0x04 13. " HS13_FLOW ,Flow controller 13" "DMA,Peripheral" bitfld.long 0x04 12. " HS12_FLOW ,Flow controller 12" "DMA,Peripheral" textline " " bitfld.long 0x04 11. " HS11_FLOW ,Flow controller 11" "DMA,Peripheral" bitfld.long 0x04 10. " HS10_FLOW ,Flow controller 10" "DMA,Peripheral" textline " " bitfld.long 0x04 9. " HS9_FLOW ,Flow controller 9" "DMA,Peripheral" bitfld.long 0x04 8. " HS8_FLOW ,Flow controller 8" "DMA,Peripheral" textline " " bitfld.long 0x04 7. " HS7_FLOW ,Flow controller 7" "DMA,Peripheral" bitfld.long 0x04 6. " HS6_FLOW ,Flow controller 6" "DMA,Peripheral" textline " " bitfld.long 0x04 5. " HS5_FLOW ,Flow controller 5" "DMA,Peripheral" bitfld.long 0x04 4. " HS4_FLOW ,Flow controller 4" "DMA,Peripheral" textline " " bitfld.long 0x04 3. " HS3_FLOW ,Flow controller 3" "DMA,Peripheral" bitfld.long 0x04 2. " HS2_FLOW ,Flow controller 2" "DMA,Peripheral" textline " " bitfld.long 0x04 1. " HS1_FLOW ,Flow controller 1" "DMA,Peripheral" bitfld.long 0x04 0. " HS0_FLOW ,Flow controller 0" "DMA,Peripheral" line.long 0x08 "DMAC_DIR_SEL,DMA Peripherial Direction Selection" bitfld.long 0x08 31. " HS31_DIR ,Peripherial Direction Selection 31" "Source,Destination" bitfld.long 0x08 30. " HS30_DIR ,Peripherial Direction Selection 30" "Source,Destination" textline " " bitfld.long 0x08 29. " HS29_DIR ,Peripherial Direction Selection 29" "Source,Destination" bitfld.long 0x08 28. " HS28_DIR ,Peripherial Direction Selection 28" "Source,Destination" textline " " bitfld.long 0x08 27. " HS27_DIR ,Peripherial Direction Selection 27" "Source,Destination" bitfld.long 0x08 26. " HS26_DIR ,Peripherial Direction Selection 26" "Source,Destination" textline " " bitfld.long 0x08 25. " HS25_DIR ,Peripherial Direction Selection 25" "Source,Destination" bitfld.long 0x08 24. " HS24_DIR ,Peripherial Direction Selection 24" "Source,Destination" textline " " bitfld.long 0x08 23. " HS23_DIR ,Peripherial Direction Selection 23" "Source,Destination" bitfld.long 0x08 22. " HS22_DIR ,Peripherial Direction Selection 22" "Source,Destination" textline " " bitfld.long 0x08 21. " HS21_DIR ,Peripherial Direction Selection 21" "Source,Destination" bitfld.long 0x08 20. " HS20_DIR ,Peripherial Direction Selection 20" "Source,Destination" textline " " bitfld.long 0x08 19. " HS19_DIR ,Peripherial Direction Selection 19" "Source,Destination" bitfld.long 0x08 18. " HS18_DIR ,Peripherial Direction Selection 18" "Source,Destination" textline " " bitfld.long 0x08 17. " HS17_DIR ,Peripherial Direction Selection 17" "Source,Destination" bitfld.long 0x08 16. " HS16_DIR ,Peripherial Direction Selection 16" "Source,Destination" textline " " bitfld.long 0x08 15. " HS15_DIR ,Peripherial Direction Selection 15" "Source,Destination" bitfld.long 0x08 14. " HS14_DIR ,Peripherial Direction Selection 14" "Source,Destination" textline " " bitfld.long 0x08 13. " HS13_DIR ,Peripherial Direction Selection 13" "Source,Destination" bitfld.long 0x08 12. " HS12_DIR ,Peripherial Direction Selection 12" "Source,Destination" textline " " bitfld.long 0x08 11. " HS11_DIR ,Peripherial Direction Selection 11" "Source,Destination" bitfld.long 0x08 10. " HS10_DIR ,Peripherial Direction Selection 10" "Source,Destination" textline " " bitfld.long 0x08 9. " HS9_DIR ,Peripherial Direction Selection 9" "Source,Destination" bitfld.long 0x08 8. " HS8_DIR ,Peripherial Direction Selection 8" "Source,Destination" textline " " bitfld.long 0x08 7. " HS7_DIR ,Peripherial Direction Selection 7" "Source,Destination" bitfld.long 0x08 6. " HS6_DIR ,Peripherial Direction Selection 6" "Source,Destination" textline " " bitfld.long 0x08 5. " HS5_DIR ,Peripherial Direction Selection 5" "Source,Destination" bitfld.long 0x08 4. " HS4_DIR ,Peripherial Direction Selection 4" "Source,Destination" textline " " bitfld.long 0x08 3. " HS3_DIR ,Peripherial Direction Selection 3" "Source,Destination" bitfld.long 0x08 2. " HS2_DIR ,Peripherial Direction Selection 2" "Source,Destination" textline " " bitfld.long 0x08 1. " HS1_DIR ,Peripherial Direction Selection 1" "Source,Destination" bitfld.long 0x08 0. " HS0_DIR ,Peripherial Direction Selection 0" "Source,Destination" line.long 0xC "ENDIANNESS_CFG,DMA Master endianness configuration" bitfld.long 0x0C 7. " BIG_ENDIAN_GMAC ,GMAC Master endianness configuration" "Little endian,Big endian" bitfld.long 0x0C 6. " BIG_ENDIAN_UOTG: ,UOC Master endianness configuration" "Little endian,Big endian" textline " " bitfld.long 0x0C 5. " BIG_ENDIAN_UHC2 ,UHC1 Master endianness configuration" "Little endian,Big endian" bitfld.long 0x0C 4. " BIG_ENDIAN_UHC1 ,UHC0 Master endianness configuration" "Little endian,Big endian" textline " " bitfld.long 0x0C 3. " BIG_ENDIAN_DMA1_MASTER_50 ,DMA1 Master 50 endianness configuration" "Little endian,Big endian" bitfld.long 0x0C 2. " BIG_ENDIAN_DMA1_MASTER_40 ,DMA1 Master 40 endianness configuration" "Little endian,Big endian" textline " " bitfld.long 0x0C 1. " BIG_ENDIAN_DMA0_MASTER_50 ,DMA0 Master 50 endianness configuration" "Little endian,Big endian" bitfld.long 0x0C 0. " BIG_ENDIAN_DMA0_MASTER_40 ,DMA0 Master 40 endianness configuration" "Little endian,Big endian" line.long 0x10 "USBPHY_GEN_CFG,USB Phy General configuration register" bitfld.long 0x10 28. " USBPHY_SIDDQ ,USB PHY IDDQ Low Power State Enable" "Powered up,Powered down" bitfld.long 0x10 25.--27. " OTG_TUNE ,VBUS Valid Threshold Adjustment" "12%,9%,6%,3%,Default,+3%,+6%,+9%" textline " " bitfld.long 0x10 24. " USB_PLL_LOCK ,USB 2.0 nanoPHY PLL lock signal" "Unlocked,Locked" bitfld.long 0x10 16. " USB_UTMI_RST2 ,Customer-specific signal resets the corresponding port" "No reset,Reset" textline " " bitfld.long 0x10 15. " USB_UTMI_RST1: ,Customer-specific signal resets the corresponding port" "No reset,Reset" bitfld.long 0x10 14. " USB_UTMI_RST0 ,Customer-specific signal resets the corresponding port" "No reset,Reset" textline " " bitfld.long 0x10 12. " USB_PHY_POR ,Power-On Reset" "No reset,Reset" bitfld.long 0x10 5. " SS_AUTOPPD_ON_OVERCUR ,Enables automatic port power disable in the host controllers" "Low,High" textline " " bitfld.long 0x10 3.--4. " SS_FLADJ_VAL ,Feature adjusts any offset from the clock source that drives the uSOF counter" "Reserved,Reserved,24MHz,12MHz" bitfld.long 0x10 1.--2. " REFCLKDIV ,Reference Clock Frequency Select" "0,1,2,3" textline " " bitfld.long 0x10 0. " COMMONONN ,Common Block Power-Down Control" "Remain powered,Powered down" line.long 0x14 "USBPHY_P1_CFG,USB phy P1 configuration (UHC0)" bitfld.long 0x14 16.--17. " TXHSXVTUNE ,I Transmitter High-Speed Crossover Adjustment" "Default setting,Crossover - 15mV,Crossover + 15mV,?..." bitfld.long 0x14 12.--15. " TXVREFTUNE ,HS DC Voltage Level Adjustment" "- 6.25%,- 5%,- 3.75%,- 2.5%,- 1.25%,Design default,+ 1.25%,+ 2.5%,+ 3.75%,+ 5%,+ 6.25%,+ 7.5%,+ 8.75%,+ 10%,+ 11.25%,+ 12.5%" textline " " bitfld.long 0x14 11. " TXRISETUNE ,HS Transmitter Rise/Fall Time Adjustment" "Design default,-8%" bitfld.long 0x14 10. " TXPREEMPHASISTUNE ,HS Transmitter Pre-Emphasis Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6.--9. " TXFSLSTUNE ,FS/LS Source Impedance Adjustment" "+ 5%,+ 2.5%,Reserved,Design default,Reserved,Reserved,Reserved,- 2.5%,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,- 5%" bitfld.long 0x14 3.--5. " SQRXTUNE ,Squelch Threshold Adjustment" "+ 20%,+ 15%,+ 10%,+ 5%,Design default,- 5%,- 10%,- 15%" textline " " bitfld.long 0x14 0.--2. " COMPDISTUNE ,Disconnect Threshold Adjustment" "Design default,+ 1.5%,+ 3%,+ 4.5%,+ 6%,+ 7.5%,+ 9%,+ 10.5%" line.long 0x18 "USBPHY_P2_CFG,USB phy P2 configuration (UOC)" bitfld.long 0x18 16.--17. " TXHSXVTUNE ,Transmitter High-Speed Crossover Adjustment" "Default setting,- 15 mV,+ 15 mV,?..." bitfld.long 0x18 12.--15. " TXVREFTUNE ,HS DC Voltage Level Adjustment" "- 6.25%,- 5%,- 3.75%,- 2.5%,- 1.25%,Design default,+ 1.25%,+ 2.5%,+ 3.75%,+ 5%,+ 6.25%,+ 7.5%,+ 8.75%,+ 10%,+ 11.25%,+ 12.5%" textline " " bitfld.long 0x18 11. " TXRISETUNE ,HS Transmitter Rise/Fall Time Adjustment" "Design default,- 8%" bitfld.long 0x18 10. " TXPREEMPHASISTUNE ,HS Transmitter Pre-Emphasis Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 6.--9. " TXFSLSTUNE ,FS/LS Source Impedance Adjustment" "+ 5%,+ 2.5%,Reserved,Design default- 2.5%,Reserved,Reserved,Reserved,- 2.5%,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,- 5%" bitfld.long 0x18 3.--5. " SQRXTUNE ,Squelch Threshold Adjustment" "+ 20%,+ 15%,+ 10%,+ 5%,Design default,- 5%,- 10%,- 15%" textline " " bitfld.long 0x18 0.--2. " COMPDISTUNE ,Disconnect Threshold Adjustment" "Design default,+ 1.5%,+ 3%,+ 4.5%,+ 6%,+ 7.5%,+ 9%,+ 10.5%" line.long 0x1C "USBPHY_P3_CFG,USB phy P3 configuration (UHC1)" bitfld.long 0x1C 16.--17. " TXHSXVTUNE ,I Transmitter High-Speed Crossover Adjustment" "Default setting,Crossover - 15mV,Crossover + 15mV,?..." bitfld.long 0x1C 12.--15. " TXVREFTUNE ,HS DC Voltage Level Adjustment" "- 6.25%,- 5%,- 3.75%,- 2.5%,- 1.25%,Design default,+ 1.25%,+ 2.5%,+ 3.75%,+ 5%,+ 6.25%,+ 7.5%,+ 8.75%,+ 10%,+ 11.25%,+ 12.5%" textline " " bitfld.long 0x1C 11. " TXRISETUNE ,HS Transmitter Rise/Fall Time Adjustment" "Design default,-8%" bitfld.long 0x1C 10. " TXPREEMPHASISTUNE ,HS Transmitter Pre-Emphasis Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6.--9. " TXFSLSTUNE ,FS/LS Source Impedance Adjustment" "+ 5%,+ 2.5%,Reserved,Design default,Reserved,Reserved,Reserved,- 2.5%,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,- 5%" bitfld.long 0x1C 3.--5. " SQRXTUNE ,Squelch Threshold Adjustment" "+ 20%,+ 15%,+ 10%,+ 5%,Design default,- 5%,- 10%,- 15%" textline " " bitfld.long 0x1C 0.--2. " COMPDISTUNE ,Disconnect Threshold Adjustment" "Design default,+ 1.5%,+ 3%,+ 4.5%,+ 6%,+ 7.5%,+ 9%,+ 10.5%" line.long 0x20 "PCIE_SATA_CFG,PCIE - SATA configuration register" bitfld.long 0x20 11. " PCIE_DEVICE_PRESENT ,Presence Detect State" "Slot empty,Card in the slot" bitfld.long 0x20 10. " PCIE_POWER_UP_RST_N ,PCIe power up reset" "Active,Inactive" textline " " bitfld.long 0x20 9. " PCIE_CORE_CLK_EN ,PCIe Core clock enable" "Disabled,Enabled" bitfld.long 0x20 8. " PCIE_AUX_CLK_EN ,PCIe auxiliary clock enable" "Disabled,Enabled" textline " " bitfld.long 0x20 4. " SATA_TX_CLK_EN ,SATA tx clock enable" "Disabled,Enabled" bitfld.long 0x20 3. " SATA_RX_CLK_EN ,SATA rx clock enable" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " SATA_PWR_RST_N ,SATA power reset" "Active,Inactive" bitfld.long 0x20 1. " SATA_PM_CLK_EN ,SATA pm clock enable" "Disabled,Enabled" textline " " bitfld.long 0x20 0. " PCIE_SATA_SEL ,PCIe - SATA selection bit" "PCIe,SATA" line.long 0x24 "PCIE_MIPHY_CFG,PCIE MIPHY configuration register" bitfld.long 0x24 31. " MIPHY_OSC_BYPASS ,This signal controls selection of Reference clock to MIPHY PLL" "External,Crystal" textline " " bitfld.long 0x24 30. " MIPHY_OSC_FORCE_EXT ,This signal controls selection of Reference clock to MIPHY PLL" "External,Internall" textline " " bitfld.long 0x24 27.--28. " MIPHY_CLK_REF_DIV ,MIPHY PLL reference clock divider factor" "/1,/2,/4,/8" bitfld.long 0x24 26. " MIPHY_CLK_OSC_ZO_EN ,Clk_osc_zo enable bit" "Disabled,Enabled" textline " " bitfld.long 0x24 25. " MIPHY_SSC_EN ,Enables to PCIe PHY PLL to apply a Spread Spectrum Clocking (SSC)" "Disabled,Enabled" bitfld.long 0x24 24. " MIPHY_P0_TX_LSPD ,Sets Serializer mode for Power and Performance" "Low speed,High speed" textline " " bitfld.long 0x24 21. " MIPHY_P0_RX_LSPD ,Sets De-Serializer mode for Power and Performance" "Low speed,High speed" bitfld.long 0x24 16. " MIPHY_OSC_MODE[1] ,MIPHY oscillator settings" "Gm = 5ms,Gm = 10ms" textline " " bitfld.long 0x24 15. " MIPHY_OSC_MODE[0] ,MIPHY oscillator settings - miller capacitor enable" "Disabled,Enabled" bitfld.long 0x24 14. " MIPHY_P0_ENA8B10B ,Controls 8b10b encoder in port 0 of PHY" "Disabled,Enabled" textline " " hexmask.long.byte 0x24 0.--7. 1. " MIPHY_PLL_RATIO_TOP ,Divider ratio for PLL of PCIe PHY" line.long 0x28 "PERIP_CFG,Peripheral configuration register" bitfld.long 0x28 21. " HS_SSP_EN ,SSP Chip Select SW enable" "Disabled,Enabled" bitfld.long 0x28 20. " HS_SSP_SW_CS ,SSP sw control chip select" "Low,High" textline " " bitfld.long 0x28 18.--19. " SSP_CS_EN ,Chip Select on PAD configuration" "SSP_SS0n,SSP_SS1n,SSP_SS2n,SSP_SS3n" rbitfld.long 0x28 16. " CEC1_WAKEUP ,Wakeup from standby for CEC1" "Low,High" textline " " rbitfld.long 0x28 15. " CEC1_EN ,Active low peripheral Tristate Enable for CEC1" "Low,High" rbitfld.long 0x28 14. " CEC0_WAKEUP ,Wakeup from standby for CEC0" "Low,High" textline " " rbitfld.long 0x28 13. " CEC0_EN ,Active low peripheral Tristate Enable for CEC0" "Low,High" bitfld.long 0x28 12. " UART0_SIR_UART_SEL ,UART0 UART/SIR interface selector" "UART,SIR" textline " " bitfld.long 0x28 11. " UART1_SIR_UART_SEL ,UART1 UART/SIR interface selector" "UART,SIR" bitfld.long 0x28 10. " MALI_SUBSYS_CLK_GATING_EN ,Mali core clock gating enable" "Disabled,Enabled" textline " " bitfld.long 0x28 8. " I2S_WS_DELAY ,Setting this bit WS signal of I2S_M controller is delayed by one clock cycle" "Low,High" bitfld.long 0x28 6.--7. " I2S_MODE_S ,Mode bits define the number of Audio Channels the I2S_M controller is working in" "Upto 2.0,Upto 3.1,Upto 5.1,Upto 7.1" textline " " bitfld.long 0x28 4.--5. " I2S_MODE_M ,Mode bits define the number of Audio Channels the I2S_S controller is working in" "Upto 2.0,Upto 3.1,Upto 5.1,Upto 7.1" bitfld.long 0x28 2. " SPDIF_OUT_DEVICE_EN ,This bit is used as a global enable for SPDIF_OUT block" "Low,High" textline " " bitfld.long 0x28 0.--1. " MCIF_SEL ,Memory card interface selection" "No card,SD/SDIO/MMC active,CF active,XD active" line.long 0x2C "FSMC_CFG,FSMC configuration Register" bitfld.long 0x2C 4. " EXTDEVWIDTH ,ExtDevWidth" "8 bit,16 bit" bitfld.long 0x2C 0.--1. " NAND_NOR_SRAM_SEL ,Device type selection" "NOR,NAND,SRAM,?..." line.long 0x30 "MPMC_CFG,MPMC Control Status Register" bitfld.long 0x30 30. " TWO_GIGA_MODE_CTRL_O ,Enable 2 gigabyte address space for DDR" "Disabled,Enabled" bitfld.long 0x30 29. " AXI[5]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" textline " " bitfld.long 0x30 28. " AXI[4]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" bitfld.long 0x30 27. " AXI[3]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" textline " " bitfld.long 0x30 26. " AXI[2]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" bitfld.long 0x30 25. " AXI[1]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" textline " " bitfld.long 0x30 24. " AXI[0]_AWCOBUF ,Enable coherent write to be applied to related port" "Disabled,Enabled" bitfld.long 0x30 20.--23. " AXI[5]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 16.--19. " AXI[4]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 12.--15. " AXI[3]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 8.--11. " AXI[2]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 4.--7. " AXI[1]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x30 0.--3. " AXI[0]_AXI_CMD_THRESHOLD ,Control for max number of AXI read commands manageable by the related port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "MPMC_CTR_STS,MPMC Control Status Register" rbitfld.long 0x34 19. " PORT_BUSY[5] ,Busy status port 5" "Not busy,Busy" rbitfld.long 0x34 18. " PORT_BUSY[4] ,Busy status port 4" "Not busy,Busy" textline " " rbitfld.long 0x34 17. " PORT_BUSY[3] ,Busy status port 3" "Not busy,Busy" rbitfld.long 0x34 16. " PORT_BUSY[2] ,Busy status port 2" "Not busy,Busy" textline " " rbitfld.long 0x34 15. " PORT_BUSY[1] ,Busy status port 1" "Not busy,Busy" rbitfld.long 0x34 14. " PORT_BUSY[0] ,Busy status port 0" "Not busy,Busy" textline " " rbitfld.long 0x34 13. " CKE_STATUS ,Indicates the memory devices are either in self-refresh or in power-down mode" "Low,High" textline " " rbitfld.long 0x34 12. " Q_ALMOST_FULL ,Indicates the queue has reached the q-fullness parameter value" "Not reached,Reached" rbitfld.long 0x34 5. " REFRESH_IN_PROCESS ,High when controller is executing a refresh command" "Not refreshed,Refreshed" textline " " rbitfld.long 0x34 4. " CONTROLLER_BUSY ,Busy status signal for memory controller" "Not busy,Busy" rbitfld.long 0x34 3. " SREFRESH_ACK ,Acknowledge signal to indicate the memory devices are in self-refresh mode" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x34 2. " SREFRESH_ENTER ,Initiates a self-refresh command to the DRAMs" "Not initiated,Initiated" rbitfld.long 0x34 1. " PARAM_ECC_REMOVED ,Status signal to indicate ECC feature is removed" "Not removed,Removed" textline " " rbitfld.long 0x34 0. " MEM_RST_VALID ,Indicates that the command queue is idle" "Not valid,Valid" line.long 0x38 "SATA_CORE_ID,SATA controller core id Register" rgroup.long 0x440++0x07 line.long 0x00 "MALI_GEN_PURPOSE_1,Mali GPU general purpose register 1" line.long 0x04 "MALI_GEN_PURPOSE_2,Mali GPU general purpose register 2" group.long 0x500++0x0B line.long 0x0 "PRC1_LOCK_CTR,HW lock configuration register 1" bitfld.long 0x0 30. " STS_LOC_LOCK_15 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 29. " STS_LOC_LOCK_14 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 28. " STS_LOC_LOCK_13 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 27. " STS_LOC_LOCK_12 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 26. " STS_LOC_LOCK_11 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 25. " STS_LOC_LOCK_10 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 24. " STS_LOC_LOCK_9 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 23. " STS_LOC_LOCK_8 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 22. " STS_LOC_LOCK_7 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 21. " STS_LOC_LOCK_6 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 20. " STS_LOC_LOCK_5 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 19. " STS_LOC_LOCK_4 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 18. " STS_LOC_LOCK_3 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 17. " STS_LOC_LOCK_2 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x0 16. " STS_LOC_LOCK_1 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x0 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No effect,Reset loc_lock_1,Reset loc_lock_2,Reset loc_lock_3,Reset loc_lock_4,Reset loc_lock_5,Reset loc_lock_6,Reset loc_lock_7,Reset loc_lock_8,Reset loc_lock_9,Reset loc_lock_10,Reset loc_lock_11,Reset loc_lock_12,Reset loc_lock_13,Reset loc_lock_14,Reset loc_lock_15" textline " " bitfld.long 0x0 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No effect,Request loc_lock_1,Request loc_lock_2,Request loc_lock_3,Request loc_lock_4,Request loc_lock_5,Request loc_lock_6,Request loc_lock_7,Request loc_lock_8,Request loc_lock_9,Request loc_lock_10,Request loc_lock_11,Request loc_lock_12,Request loc_lock_13,Request loc_lock_14,Request loc_lock_15" line.long 0x4 "PRC2_LOCK_CTR,HW lock configuration register 2" bitfld.long 0x4 30. " STS_LOC_LOCK_15 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 29. " STS_LOC_LOCK_14 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 28. " STS_LOC_LOCK_13 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 27. " STS_LOC_LOCK_12 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 26. " STS_LOC_LOCK_11 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 25. " STS_LOC_LOCK_10 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 24. " STS_LOC_LOCK_9 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 23. " STS_LOC_LOCK_8 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 22. " STS_LOC_LOCK_7 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 21. " STS_LOC_LOCK_6 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 20. " STS_LOC_LOCK_5 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 19. " STS_LOC_LOCK_4 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 18. " STS_LOC_LOCK_3 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 17. " STS_LOC_LOCK_2 ,Local lock semaphores status" "Not locked,Locked" textline " " bitfld.long 0x4 16. " STS_LOC_LOCK_1 ,Local lock semaphores status" "Not locked,Locked" bitfld.long 0x4 4.--7. " LOCK_RESET ,Reset lock semaphores pulse command" "No effect,Reset loc_lock_1,Reset loc_lock_2,Reset loc_lock_3,Reset loc_lock_4,Reset loc_lock_5,Reset loc_lock_6,Reset loc_lock_7,Reset loc_lock_8,Reset loc_lock_9,Reset loc_lock_10,Reset loc_lock_11,Reset loc_lock_12,Reset loc_lock_13,Reset loc_lock_14,Reset loc_lock_15" textline " " bitfld.long 0x4 0.--3. " LOCK_REQUEST ,Request lock semaphores pulse command" "No effect,Request loc_lock_1,Request loc_lock_2,Request loc_lock_3,Request loc_lock_4,Request loc_lock_5,Request loc_lock_6,Request loc_lock_7,Request loc_lock_8,Request loc_lock_9,Request loc_lock_10,Request loc_lock_11,Request loc_lock_12,Request loc_lock_13,Request loc_lock_14,Request loc_lock_15" line.long 0x08 "PRC1_IRQ_CTR,SW Interrupt register for inter-processor communication" bitfld.long 0x08 17. " INT1_REQ_PRC2_2 ,Interrupt clear on interrupt line ID[147]" "No effect,Cleared" bitfld.long 0x08 16. " INT1_REQ_PRC2_1 ,Interrupt clear on interrupt line ID[146]" "No effect,Cleared" textline " " bitfld.long 0x08 1. " INT2_REQ_PRC1_2 ,Interrupt request on interrupt line ID[145]" "No effect,Requested" bitfld.long 0x08 0. " INT2_REQ_PRC1_1 ,Interrupt request on interrupt line ID[144]" "No effect,Requested" group.long 0x51C++0x03 line.long 0x00 "PRC2_IRQ_CTR,SW Interrupt register for inter-processor communication" bitfld.long 0x00 17. " INT2_REQ_PRC1_2 ,Interrupt clear on interrupt line ID[145]" "No effect,Cleared" bitfld.long 0x00 16. " INT2_REQ_PRC1_1 ,Interrupt clear on interrupt line ID[144]." "No effect,Cleared" textline " " bitfld.long 0x00 1. " INT1_REQ_PRC2_2 ,Interrupt request on interrupt line ID[147]" "No effect,Requested" bitfld.long 0x00 0. " INT1_REQ_PRC2_1 ,Interrupt request on interrupt line ID[146]" "No effect,Requested" group.long 0x600++0x1F line.long 0x00 "PAD_PU_CFG_1,PAD Pull Up Configuration" bitfld.long 0x00 31. " PU_DIS[31] ,Pull Up XGPIO31 disable" "No,Yes" bitfld.long 0x00 30. " PU_DIS[30] ,Pull Up XGPIO30 disable" "No,Yes" bitfld.long 0x00 29. " PU_DIS[29] ,Pull Up XGPIO29 disable" "No,Yes" bitfld.long 0x00 28. " PU_DIS[28] ,Pull Up XGPIO28 disable" "No,Yes" textline " " bitfld.long 0x00 27. " PU_DIS[27] ,Pull Up XGPIO27 disable" "No,Yes" bitfld.long 0x00 26. " PU_DIS[26] ,Pull Up XGPIO26 disable" "No,Yes" bitfld.long 0x00 25. " PU_DIS[25] ,Pull Up XGPIO25 disable" "No,Yes" bitfld.long 0x00 24. " PU_DIS[24] ,Pull Up XGPIO24 disable" "No,Yes" textline " " bitfld.long 0x00 23. " PU_DIS[23] ,Pull Up GPIO_B7 disable" "No,Yes" bitfld.long 0x00 22. " PU_DIS[22] ,Pull Up GPIO_B6 disable" "No,Yes" bitfld.long 0x00 21. " PU_DIS[21] ,Pull Up GPIO_B5 disable" "No,Yes" bitfld.long 0x00 20. " PU_DIS[20] ,Pull Up GPIO_B4 disable" "No,Yes" textline " " bitfld.long 0x00 19. " PU_DIS[19] ,Pull Up GPIO_B3 disable" "No,Yes" bitfld.long 0x00 18. " PU_DIS[18] ,Pull Up GPIO_B2 disable" "No,Yes" bitfld.long 0x00 17. " PU_DIS[17] ,Pull Up GPIO_B1 disable" "No,Yes" bitfld.long 0x00 16. " PU_DIS[16] ,Pull Up GPIO_B0 disable" "No,Yes" textline " " bitfld.long 0x00 15. " PU_DIS[15] ,Pull Up GPIO_A7 disable" "No,Yes" bitfld.long 0x00 14. " PU_DIS[14] ,Pull Up GPIO_A6 disable" "No,Yes" bitfld.long 0x00 13. " PU_DIS[13] ,Pull Up GPIO_A5 disable" "No,Yes" bitfld.long 0x00 12. " PU_DIS[12] ,Pull Up GPIO_A4 disable" "No,Yes" textline " " bitfld.long 0x00 11. " PU_DIS[11] ,Pull Up GPIO_A3 disable" "No,Yes" bitfld.long 0x00 10. " PU_DIS[10] ,Pull Up GPIO_A2 disable" "No,Yes" bitfld.long 0x00 9. " PU_DIS[9] ,Pull Up GPIO_A1 disable" "No,Yes" bitfld.long 0x00 8. " PU_DIS[8] ,Pull Up GPIO_A0 disable" "No,Yes" textline " " bitfld.long 0x00 7. " PU_DIS[7] ,Pull Up XGPIO7 disable" "No,Yes" bitfld.long 0x00 6. " PU_DIS[6] ,Pull Up XGPIO6 disable" "No,Yes" bitfld.long 0x00 5. " PU_DIS[5] ,Pull Up XGPIO5 disable" "No,Yes" bitfld.long 0x00 4. " PU_DIS[4] ,Pull Up XGPIO4 disable" "No,Yes" textline " " bitfld.long 0x00 3. " PU_DIS[3] ,Pull Up XGPIO3 disable" "No,Yes" bitfld.long 0x00 2. " PU_DIS[2] ,Pull Up XGPIO2 disable" "No,Yes" bitfld.long 0x00 1. " PU_DIS[1] ,Pull Up XGPIO1 disable" "No,Yes" bitfld.long 0x00 0. " PU_DIS[0] ,Pull Up XGPIO0 disable" "No,Yes" line.long 0x04 "PAD_PU_CFG_2,PAD Pull Up Configuration" bitfld.long 0x04 31. " PU_DIS[31] ,Pull Up XGPIO63 disable" "No,Yes" bitfld.long 0x04 30. " PU_DIS[30] ,Pull Up XGPIO62 disable" "No,Yes" bitfld.long 0x04 29. " PU_DIS[29] ,Pull Up XGPIO61 disable" "No,Yes" bitfld.long 0x04 28. " PU_DIS[28] ,Pull Up XGPIO60 disable" "No,Yes" textline " " bitfld.long 0x04 27. " PU_DIS[27] ,Pull Up XGPIO59 disable" "No,Yes" bitfld.long 0x04 26. " PU_DIS[26] ,Pull Up XGPIO58 disable" "No,Yes" bitfld.long 0x04 25. " PU_DIS[25] ,Pull Up XGPIO57 disable" "No,Yes" bitfld.long 0x04 24. " PU_DIS[24] ,Pull Up XGPIO56 disable" "No,Yes" textline " " bitfld.long 0x04 23. " PU_DIS[23] ,Pull Up GPIO_55 disable" "No,Yes" bitfld.long 0x04 22. " PU_DIS[22] ,Pull Up GPIO_54 disable" "No,Yes" bitfld.long 0x04 21. " PU_DIS[21] ,Pull Up GPIO_53 disable" "No,Yes" bitfld.long 0x04 20. " PU_DIS[20] ,Pull Up GPIO_52 disable" "No,Yes" textline " " bitfld.long 0x04 19. " PU_DIS[19] ,Pull Up GPIO_51 disable" "No,Yes" bitfld.long 0x04 18. " PU_DIS[18] ,Pull Up GPIO_50 disable" "No,Yes" bitfld.long 0x04 17. " PU_DIS[17] ,Pull Up GPIO_49 disable" "No,Yes" bitfld.long 0x04 16. " PU_DIS[16] ,Pull Up GPIO_48 disable" "No,Yes" textline " " bitfld.long 0x04 15. " PU_DIS[15] ,Pull Up GPIO_47 disable" "No,Yes" bitfld.long 0x04 14. " PU_DIS[14] ,Pull Up GPIO_46 disable" "No,Yes" bitfld.long 0x04 13. " PU_DIS[13] ,Pull Up GPIO_45 disable" "No,Yes" bitfld.long 0x04 12. " PU_DIS[12] ,Pull Up GPIO_44 disable" "No,Yes" textline " " bitfld.long 0x04 11. " PU_DIS[11] ,Pull Up GPIO_43 disable" "No,Yes" bitfld.long 0x04 10. " PU_DIS[10] ,Pull Up GPIO_42 disable" "No,Yes" bitfld.long 0x04 9. " PU_DIS[9] ,Pull Up GPIO_41 disable" "No,Yes" bitfld.long 0x04 8. " PU_DIS[8] ,Pull Up GPIO_40 disable" "No,Yes" textline " " bitfld.long 0x04 7. " PU_DIS[7] ,Pull Up XGPIO39 disable" "No,Yes" bitfld.long 0x04 6. " PU_DIS[6] ,Pull Up XGPIO38 disable" "No,Yes" bitfld.long 0x04 5. " PU_DIS[5] ,Pull Up XGPIO37 disable" "No,Yes" bitfld.long 0x04 4. " PU_DIS[4] ,Pull Up XGPIO36 disable" "No,Yes" textline " " bitfld.long 0x04 3. " PU_DIS[3] ,Pull Up XGPIO35 disable" "No,Yes" bitfld.long 0x04 2. " PU_DIS[2] ,Pull Up XGPIO34 disable" "No,Yes" bitfld.long 0x04 1. " PU_DIS[1] ,Pull Up XGPIO33 disable" "No,Yes" bitfld.long 0x04 0. " PU_DIS[0] ,Pull Up XGPIO32 disable" "No,Yes" line.long 0x08 "PAD_PU_CFG_3,PAD Pull Up Configuration" bitfld.long 0x08 31. " PU_DIS[31] ,Pull Up XGPIO95 disable" "No,Yes" bitfld.long 0x08 30. " PU_DIS[30] ,Pull Up XGPIO94 disable" "No,Yes" bitfld.long 0x08 29. " PU_DIS[29] ,Pull Up XGPIO93 disable" "No,Yes" bitfld.long 0x08 28. " PU_DIS[28] ,Pull Up XGPIO92 disable" "No,Yes" textline " " bitfld.long 0x08 27. " PU_DIS[27] ,Pull Up XGPIO91 disable" "No,Yes" bitfld.long 0x08 26. " PU_DIS[26] ,Pull Up XGPIO90 disable" "No,Yes" bitfld.long 0x08 25. " PU_DIS[25] ,Pull Up XGPIO89 disable" "No,Yes" bitfld.long 0x08 24. " PU_DIS[24] ,Pull Up XGPIO88 disable" "No,Yes" textline " " bitfld.long 0x08 23. " PU_DIS[23] ,Pull Up XGPIO87 disable" "No,Yes" bitfld.long 0x08 22. " PU_DIS[22] ,Pull Up XGPIO86 disable" "No,Yes" bitfld.long 0x08 21. " PU_DIS[21] ,Pull Up XGPIO85 disable" "No,Yes" bitfld.long 0x08 20. " PU_DIS[20] ,Pull Up XGPIO84 disable" "No,Yes" textline " " bitfld.long 0x08 19. " PU_DIS[19] ,Pull Up XGPIO83 disable" "No,Yes" bitfld.long 0x08 18. " PU_DIS[18] ,Pull Up XGPIO82 disable" "No,Yes" bitfld.long 0x08 17. " PU_DIS[17] ,Pull Up XGPIO81 disable" "No,Yes" bitfld.long 0x08 16. " PU_DIS[16] ,Pull Up XGPIO80 disable" "No,Yes" textline " " bitfld.long 0x08 15. " PU_DIS[15] ,Pull Up XGPIO79 disable" "No,Yes" bitfld.long 0x08 14. " PU_DIS[14] ,Pull Up XGPIO78 disable" "No,Yes" bitfld.long 0x08 13. " PU_DIS[13] ,Pull Up XGPIO77 disable" "No,Yes" bitfld.long 0x08 12. " PU_DIS[12] ,Pull Up XGPIO76 disable" "No,Yes" textline " " bitfld.long 0x08 11. " PU_DIS[11] ,Pull Up XGPIO75 disable" "No,Yes" bitfld.long 0x08 10. " PU_DIS[10] ,Pull Up XGPIO74 disable" "No,Yes" bitfld.long 0x08 9. " PU_DIS[9] ,Pull Up XGPIO73 disable" "No,Yes" bitfld.long 0x08 8. " PU_DIS[8] ,Pull Up XGPIO72 disable" "No,Yes" textline " " bitfld.long 0x08 7. " PU_DIS[7] ,Pull Up XGPIO71 disable" "No,Yes" bitfld.long 0x08 6. " PU_DIS[6] ,Pull Up XGPIO70 disable" "No,Yes" bitfld.long 0x08 5. " PU_DIS[5] ,Pull Up XGPIO69 disable" "No,Yes" bitfld.long 0x08 4. " PU_DIS[4] ,Pull Up XGPIO68 disable" "No,Yes" textline " " bitfld.long 0x08 3. " PU_DIS[3] ,Pull Up XGPIO67 disable" "No,Yes" bitfld.long 0x08 2. " PU_DIS[2] ,Pull Up XGPIO66 disable" "No,Yes" bitfld.long 0x08 1. " PU_DIS[1] ,Pull Up XGPIO65 disable" "No,Yes" bitfld.long 0x08 0. " PU_DIS[0] ,Pull Up XGPIO64 disable" "No,Yes" line.long 0x0C "PAD_PU_CFG_4,PAD Pull Up Configuration" bitfld.long 0x0C 31. " PU_DIS[31] ,Pull Up XGPIO127 disable" "No,Yes" bitfld.long 0x0C 30. " PU_DIS[30] ,Pull Up XGPIO126 disable" "No,Yes" bitfld.long 0x0C 29. " PU_DIS[29] ,Pull Up XGPIO125 disable" "No,Yes" bitfld.long 0x0C 28. " PU_DIS[28] ,Pull Up XGPIO124 disable" "No,Yes" textline " " bitfld.long 0x0C 27. " PU_DIS[27] ,Pull Up XGPIO123 disable" "No,Yes" bitfld.long 0x0C 26. " PU_DIS[26] ,Pull Up XGPIO122 disable" "No,Yes" bitfld.long 0x0C 25. " PU_DIS[25] ,Pull Up XGPIO121 disable" "No,Yes" bitfld.long 0x0C 24. " PU_DIS[24] ,Pull Up XGPIO120 disable" "No,Yes" textline " " bitfld.long 0x0C 23. " PU_DIS[23] ,Pull Up XGPIO119 disable" "No,Yes" bitfld.long 0x0C 22. " PU_DIS[22] ,Pull Up XGPIO118 disable" "No,Yes" bitfld.long 0x0C 21. " PU_DIS[21] ,Pull Up XGPIO117 disable" "No,Yes" bitfld.long 0x0C 20. " PU_DIS[20] ,Pull Up XGPIO116 disable" "No,Yes" textline " " bitfld.long 0x0C 19. " PU_DIS[19] ,Pull Up XGPIO115 disable" "No,Yes" bitfld.long 0x0C 18. " PU_DIS[18] ,Pull Up XGPIO114 disable" "No,Yes" bitfld.long 0x0C 17. " PU_DIS[17] ,Pull Up XGPIO113 disable" "No,Yes" bitfld.long 0x0C 16. " PU_DIS[16] ,Pull Up XGPIO112 disable" "No,Yes" textline " " bitfld.long 0x0C 15. " PU_DIS[15] ,Pull Up XGPIO111 disable" "No,Yes" bitfld.long 0x0C 14. " PU_DIS[14] ,Pull Up XGPIO110 disable" "No,Yes" bitfld.long 0x0C 13. " PU_DIS[13] ,Pull Up XGPIO109 disable" "No,Yes" bitfld.long 0x0C 12. " PU_DIS[12] ,Pull Up XGPIO108 disable" "No,Yes" textline " " bitfld.long 0x0C 11. " PU_DIS[11] ,Pull Up XGPIO107 disable" "No,Yes" bitfld.long 0x0C 10. " PU_DIS[10] ,Pull Up XGPIO106 disable" "No,Yes" bitfld.long 0x0C 9. " PU_DIS[9] ,Pull Up XGPIO105 disable" "No,Yes" bitfld.long 0x0C 8. " PU_DIS[8] ,Pull Up XGPIO104 disable" "No,Yes" textline " " bitfld.long 0x0C 7. " PU_DIS[7] ,Pull Up XGPIO103 disable" "No,Yes" bitfld.long 0x0C 6. " PU_DIS[6] ,Pull Up XGPIO102 disable" "No,Yes" bitfld.long 0x0C 5. " PU_DIS[5] ,Pull Up XGPIO101 disable" "No,Yes" bitfld.long 0x0C 4. " PU_DIS[4] ,Pull Up XGPIO100 disable" "No,Yes" textline " " bitfld.long 0x0C 3. " PU_DIS[3] ,Pull Up XGPIO99 disable" "No,Yes" bitfld.long 0x0C 2. " PU_DIS[2] ,Pull Up XGPIO98 disable" "No,Yes" bitfld.long 0x0C 1. " PU_DIS[1] ,Pull Up XGPIO97 disable" "No,Yes" bitfld.long 0x0C 0. " PU_DIS[0] ,Pull Up XGPIO96 disable" "No,Yes" line.long 0x10 "PAD_PU_CFG_5,PAD Pull Up Configuration" bitfld.long 0x10 31. " PU_DIS[31] ,Pull Up XGPIO159 disable" "No,Yes" bitfld.long 0x10 30. " PU_DIS[30] ,Pull Up XGPIO158 disable" "No,Yes" bitfld.long 0x10 29. " PU_DIS[29] ,Pull Up XGPIO157 disable" "No,Yes" bitfld.long 0x10 28. " PU_DIS[28] ,Pull Up XGPIO156 disable" "No,Yes" textline " " bitfld.long 0x10 27. " PU_DIS[27] ,Pull Up XGPIO155 disable" "No,Yes" bitfld.long 0x10 26. " PU_DIS[26] ,Pull Up XGPIO154 disable" "No,Yes" bitfld.long 0x10 25. " PU_DIS[25] ,Pull Up XGPIO153 disable" "No,Yes" bitfld.long 0x10 24. " PU_DIS[24] ,Pull Up XGPIO152 disable" "No,Yes" textline " " bitfld.long 0x10 23. " PU_DIS[23] ,Pull Up XGPIO151 disable" "No,Yes" bitfld.long 0x10 22. " PU_DIS[22] ,Pull Up XGPIO150 disable" "No,Yes" bitfld.long 0x10 21. " PU_DIS[21] ,Pull Up XGPIO149 disable" "No,Yes" bitfld.long 0x10 20. " PU_DIS[20] ,Pull Up XGPIO148 disable" "No,Yes" textline " " bitfld.long 0x10 19. " PU_DIS[19] ,Pull Up XGPIO147 disable" "No,Yes" bitfld.long 0x10 18. " PU_DIS[18] ,Pull Up XGPIO146 disable" "No,Yes" bitfld.long 0x10 17. " PU_DIS[17] ,Pull Up XGPIO145 disable" "No,Yes" bitfld.long 0x10 16. " PU_DIS[16] ,Pull Up XGPIO144 disable" "No,Yes" textline " " bitfld.long 0x10 15. " PU_DIS[15] ,Pull Up XGPIO143 disable" "No,Yes" bitfld.long 0x10 14. " PU_DIS[14] ,Pull Up XGPIO142 disable" "No,Yes" bitfld.long 0x10 13. " PU_DIS[13] ,Pull Up XGPIO141 disable" "No,Yes" bitfld.long 0x10 12. " PU_DIS[12] ,Pull Up XGPIO140 disable" "No,Yes" textline " " bitfld.long 0x10 11. " PU_DIS[11] ,Pull Up XGPIO139 disable" "No,Yes" bitfld.long 0x10 10. " PU_DIS[10] ,Pull Up XGPIO138 disable" "No,Yes" bitfld.long 0x10 9. " PU_DIS[9] ,Pull Up XGPIO137 disable" "No,Yes" bitfld.long 0x10 8. " PU_DIS[8] ,Pull Up XGPIO136 disable" "No,Yes" textline " " bitfld.long 0x10 7. " PU_DIS[7] ,Pull Up XGPIO135 disable" "No,Yes" bitfld.long 0x10 6. " PU_DIS[6] ,Pull Up XGPIO134 disable" "No,Yes" bitfld.long 0x10 5. " PU_DIS[5] ,Pull Up XGPIO133 disable" "No,Yes" bitfld.long 0x10 4. " PU_DIS[4] ,Pull Up XGPIO132 disable" "No,Yes" textline " " bitfld.long 0x10 3. " PU_DIS[3] ,Pull Up XGPIO131 disable" "No,Yes" bitfld.long 0x10 2. " PU_DIS[2] ,Pull Up XGPIO130 disable" "No,Yes" bitfld.long 0x10 1. " PU_DIS[1] ,Pull Up XGPIO129 disable" "No,Yes" bitfld.long 0x10 0. " PU_DIS[0] ,Pull Up XGPIO128 disable" "No,Yes" line.long 0x14 "PAD_PU_CFG_6,PAD Pull Up Configuration" bitfld.long 0x14 31. " PU_DIS[31] ,Pull Up XGPIO191 disable" "No,Yes" bitfld.long 0x14 30. " PU_DIS[30] ,Pull Up XGPIO190 disable" "No,Yes" bitfld.long 0x14 29. " PU_DIS[29] ,Pull Up XGPIO189 disable" "No,Yes" bitfld.long 0x14 28. " PU_DIS[28] ,Pull Up XGPIO188 disable" "No,Yes" textline " " bitfld.long 0x14 27. " PU_DIS[27] ,Pull Up XGPIO187 disable" "No,Yes" bitfld.long 0x14 26. " PU_DIS[26] ,Pull Up XGPIO186 disable" "No,Yes" bitfld.long 0x14 25. " PU_DIS[25] ,Pull Up XGPIO185 disable" "No,Yes" bitfld.long 0x14 24. " PU_DIS[24] ,Pull Up XGPIO184 disable" "No,Yes" textline " " bitfld.long 0x14 23. " PU_DIS[23] ,Pull Up XGPIO183 disable" "No,Yes" bitfld.long 0x14 22. " PU_DIS[22] ,Pull Up XGPIO182 disable" "No,Yes" bitfld.long 0x14 21. " PU_DIS[21] ,Pull Up XGPIO181 disable" "No,Yes" bitfld.long 0x14 20. " PU_DIS[20] ,Pull Up XGPIO180 disable" "No,Yes" textline " " bitfld.long 0x14 19. " PU_DIS[19] ,Pull Up XGPIO179 disable" "No,Yes" bitfld.long 0x14 18. " PU_DIS[18] ,Pull Up XGPIO178 disable" "No,Yes" bitfld.long 0x14 17. " PU_DIS[17] ,Pull Up XGPIO177 disable" "No,Yes" bitfld.long 0x14 16. " PU_DIS[16] ,Pull Up XGPIO176 disable" "No,Yes" textline " " bitfld.long 0x14 15. " PU_DIS[15] ,Pull Up XGPIO175 disable" "No,Yes" bitfld.long 0x14 14. " PU_DIS[14] ,Pull Up XGPIO174 disable" "No,Yes" bitfld.long 0x14 13. " PU_DIS[13] ,Pull Up XGPIO173 disable" "No,Yes" bitfld.long 0x14 12. " PU_DIS[12] ,Pull Up XGPIO172 disable" "No,Yes" textline " " bitfld.long 0x14 11. " PU_DIS[11] ,Pull Up XGPIO171 disable" "No,Yes" bitfld.long 0x14 10. " PU_DIS[10] ,Pull Up XGPIO170 disable" "No,Yes" bitfld.long 0x14 9. " PU_DIS[9] ,Pull Up XGPIO169 disable" "No,Yes" bitfld.long 0x14 8. " PU_DIS[8] ,Pull Up XGPIO168 disable" "No,Yes" textline " " bitfld.long 0x14 7. " PU_DIS[7] ,Pull Up XGPIO167 disable" "No,Yes" bitfld.long 0x14 6. " PU_DIS[6] ,Pull Up XGPIO166 disable" "No,Yes" bitfld.long 0x14 5. " PU_DIS[5] ,Pull Up XGPIO165 disable" "No,Yes" bitfld.long 0x14 4. " PU_DIS[4] ,Pull Up XGPIO164 disable" "No,Yes" textline " " bitfld.long 0x14 3. " PU_DIS[3] ,Pull Up XGPIO163 disable" "No,Yes" bitfld.long 0x14 2. " PU_DIS[2] ,Pull Up XGPIO162 disable" "No,Yes" bitfld.long 0x14 1. " PU_DIS[1] ,Pull Up XGPIO161 disable" "No,Yes" bitfld.long 0x14 0. " PU_DIS[0] ,Pull Up XGPIO160 disable" "No,Yes" line.long 0x18 "PAD_PU_CFG_7,PAD Pull Up Configuration" bitfld.long 0x18 31. " PU_DIS[31] ,Pull Up XGPIO223 disable" "No,Yes" bitfld.long 0x18 30. " PU_DIS[30] ,Pull Up XGPIO222 disable" "No,Yes" bitfld.long 0x18 29. " PU_DIS[29] ,Pull Up XGPIO221 disable" "No,Yes" bitfld.long 0x18 28. " PU_DIS[28] ,Pull Up XGPIO220 disable" "No,Yes" textline " " bitfld.long 0x18 27. " PU_DIS[27] ,Pull Up XGPIO219 disable" "No,Yes" bitfld.long 0x18 26. " PU_DIS[26] ,Pull Up XGPIO218 disable" "No,Yes" bitfld.long 0x18 25. " PU_DIS[25] ,Pull Up XGPIO217 disable" "No,Yes" bitfld.long 0x18 24. " PU_DIS[24] ,Pull Up XGPIO216 disable" "No,Yes" textline " " bitfld.long 0x18 23. " PU_DIS[23] ,Pull Up XGPIO215 disable" "No,Yes" bitfld.long 0x18 22. " PU_DIS[22] ,Pull Up XGPIO214 disable" "No,Yes" bitfld.long 0x18 21. " PU_DIS[21] ,Pull Up XGPIO213 disable" "No,Yes" bitfld.long 0x18 20. " PU_DIS[20] ,Pull Up XGPIO212 disable" "No,Yes" textline " " bitfld.long 0x18 19. " PU_DIS[19] ,Pull Up XGPIO211 disable" "No,Yes" bitfld.long 0x18 18. " PU_DIS[18] ,Pull Up XGPIO210 disable" "No,Yes" bitfld.long 0x18 17. " PU_DIS[17] ,Pull Up XGPIO209 disable" "No,Yes" bitfld.long 0x18 16. " PU_DIS[16] ,Pull Up XGPIO208 disable" "No,Yes" textline " " bitfld.long 0x18 15. " PU_DIS[15] ,Pull Up XGPIO207 disable" "No,Yes" bitfld.long 0x18 14. " PU_DIS[14] ,Pull Up XGPIO206 disable" "No,Yes" bitfld.long 0x18 13. " PU_DIS[13] ,Pull Up XGPIO205 disable" "No,Yes" bitfld.long 0x18 12. " PU_DIS[12] ,Pull Up XGPIO204 disable" "No,Yes" textline " " bitfld.long 0x18 11. " PU_DIS[11] ,Pull Up XGPIO203 disable" "No,Yes" bitfld.long 0x18 10. " PU_DIS[10] ,Pull Up XGPIO202 disable" "No,Yes" bitfld.long 0x18 9. " PU_DIS[9] ,Pull Up XGPIO201 disable" "No,Yes" bitfld.long 0x18 8. " PU_DIS[8] ,Pull Up XGPIO200 disable" "No,Yes" textline " " bitfld.long 0x18 7. " PU_DIS[7] ,Pull Up XGPIO199 disable" "No,Yes" bitfld.long 0x18 6. " PU_DIS[6] ,Pull Up XGPIO198 disable" "No,Yes" bitfld.long 0x18 5. " PU_DIS[5] ,Pull Up XGPIO197 disable" "No,Yes" bitfld.long 0x18 4. " PU_DIS[4] ,Pull Up XGPIO196 disable" "No,Yes" textline " " bitfld.long 0x18 3. " PU_DIS[3] ,Pull Up XGPIO195 disable" "No,Yes" bitfld.long 0x18 2. " PU_DIS[2] ,Pull Up XGPIO194 disable" "No,Yes" bitfld.long 0x18 1. " PU_DIS[1] ,Pull Up XGPIO193 disable" "No,Yes" bitfld.long 0x18 0. " PU_DIS[0] ,Pull Up XGPIO192 disable" "No,Yes" line.long 0x1C "PAD_PU_CFG_8,PAD Pull Up Configuration" bitfld.long 0x1C 25. " PU_DIS[25] ,Pull Up XGPIO249 disable" "No,Yes" bitfld.long 0x1C 24. " PU_DIS[24] ,Pull Up XGPIO248 disable" "No,Yes" bitfld.long 0x1C 23. " PU_DIS[23] ,Pull Up XGPIO247 disable" "No,Yes" bitfld.long 0x1C 22. " PU_DIS[22] ,Pull Up XGPIO246 disable" "No,Yes" textline " " bitfld.long 0x1C 21. " PU_DIS[21] ,Pull Up XGPIO245 disable" "No,Yes" bitfld.long 0x1C 20. " PU_DIS[20] ,Pull Up XGPIO244 disable" "No,Yes" bitfld.long 0x1C 19. " PU_DIS[19] ,Pull Up XGPIO243 disable" "No,Yes" bitfld.long 0x1C 18. " PU_DIS[18] ,Pull Up XGPIO242 disable" "No,Yes" textline " " bitfld.long 0x1C 17. " PU_DIS[17] ,Pull Up XGPIO241 disable" "No,Yes" bitfld.long 0x1C 16. " PU_DIS[16] ,Pull Up XGPIO240 disable" "No,Yes" bitfld.long 0x1C 15. " PU_DIS[15] ,Pull Up XGPIO239 disable" "No,Yes" bitfld.long 0x1C 14. " PU_DIS[14] ,Pull Up XGPIO238 disable" "No,Yes" textline " " bitfld.long 0x1C 13. " PU_DIS[13] ,Pull Up XGPIO237 disable" "No,Yes" bitfld.long 0x1C 12. " PU_DIS[12] ,Pull Up XGPIO236 disable" "No,Yes" bitfld.long 0x1C 11. " PU_DIS[11] ,Pull Up XGPIO235 disable" "No,Yes" bitfld.long 0x1C 10. " PU_DIS[10] ,Pull Up XGPIO234 disable" "No,Yes" textline " " bitfld.long 0x1C 9. " PU_DIS[9] ,Pull Up XGPIO233 disable" "No,Yes" bitfld.long 0x1C 8. " PU_DIS[8] ,Pull Up XGPIO232 disable" "No,Yes" bitfld.long 0x1C 7. " PU_DIS[7] ,Pull Up XGPIO231 disable" "No,Yes" bitfld.long 0x1C 6. " PU_DIS[6] ,Pull Up XGPIO230 disable" "No,Yes" textline " " bitfld.long 0x1C 5. " PU_DIS[5] ,Pull Up XGPIO229 disable" "No,Yes" bitfld.long 0x1C 4. " PU_DIS[4] ,Pull Up XGPIO228 disable" "No,Yes" bitfld.long 0x1C 3. " PU_DIS[3] ,Pull Up XGPIO227 disable" "No,Yes" bitfld.long 0x1C 2. " PU_DIS[2] ,Pull Up XGPIO226 disable" "No,Yes" textline " " bitfld.long 0x1C 1. " PU_DIS[1] ,Pull Up XGPIO225 disable" "No,Yes" bitfld.long 0x1C 0. " PU_DIS[0] ,Pull Up XGPIO224 disable" "No,Yes" group.long 0x620++0x1F line.long 0x00 "PAD_PD_CFG_1,PAD Pull Down Configuration" bitfld.long 0x00 31. " PD_DIS[31] ,Pull Down XGPIO31 disable" "No,Yes" bitfld.long 0x00 30. " PD_DIS[30] ,Pull Down XGPIO30 disable" "No,Yes" bitfld.long 0x00 29. " PD_DIS[29] ,Pull Down XGPIO29 disable" "No,Yes" bitfld.long 0x00 28. " PD_DIS[28] ,Pull Down XGPIO28 disable" "No,Yes" textline " " bitfld.long 0x00 27. " PD_DIS[27] ,Pull Down XGPIO27 disable" "No,Yes" bitfld.long 0x00 26. " PD_DIS[26] ,Pull Down XGPIO26 disable" "No,Yes" bitfld.long 0x00 25. " PD_DIS[25] ,Pull Down XGPIO25 disable" "No,Yes" bitfld.long 0x00 24. " PD_DIS[24] ,Pull Down XGPIO24 disable" "No,Yes" textline " " bitfld.long 0x00 23. " PD_DIS[23] ,Pull Down GPIO_B7 disable" "No,Yes" bitfld.long 0x00 22. " PD_DIS[22] ,Pull Down GPIO_B6 disable" "No,Yes" bitfld.long 0x00 21. " PD_DIS[21] ,Pull Down GPIO_B5 disable" "No,Yes" bitfld.long 0x00 20. " PD_DIS[20] ,Pull Down GPIO_B4 disable" "No,Yes" textline " " bitfld.long 0x00 19. " PD_DIS[19] ,Pull Down GPIO_B3 disable" "No,Yes" bitfld.long 0x00 18. " PD_DIS[18] ,Pull Down GPIO_B2 disable" "No,Yes" bitfld.long 0x00 17. " PD_DIS[17] ,Pull Down GPIO_B1 disable" "No,Yes" bitfld.long 0x00 16. " PD_DIS[16] ,Pull Down GPIO_B0 disable" "No,Yes" textline " " bitfld.long 0x00 15. " PD_DIS[15] ,Pull Down GPIO_A7 disable" "No,Yes" bitfld.long 0x00 14. " PD_DIS[14] ,Pull Down GPIO_A6 disable" "No,Yes" bitfld.long 0x00 13. " PD_DIS[13] ,Pull Down GPIO_A5 disable" "No,Yes" bitfld.long 0x00 12. " PD_DIS[12] ,Pull Down GPIO_A4 disable" "No,Yes" textline " " bitfld.long 0x00 11. " PD_DIS[11] ,Pull Down GPIO_A3 disable" "No,Yes" bitfld.long 0x00 10. " PD_DIS[10] ,Pull Down GPIO_A2 disable" "No,Yes" bitfld.long 0x00 9. " PD_DIS[9] ,Pull Down GPIO_A1 disable" "No,Yes" bitfld.long 0x00 8. " PD_DIS[8] ,Pull Down GPIO_A0 disable" "No,Yes" textline " " bitfld.long 0x00 7. " PD_DIS[7] ,Pull Down XGPIO7 disable" "No,Yes" bitfld.long 0x00 6. " PD_DIS[6] ,Pull Down XGPIO6 disable" "No,Yes" bitfld.long 0x00 5. " PD_DIS[5] ,Pull Down XGPIO5 disable" "No,Yes" bitfld.long 0x00 4. " PD_DIS[4] ,Pull Down XGPIO4 disable" "No,Yes" textline " " bitfld.long 0x00 3. " PD_DIS[3] ,Pull Down XGPIO3 disable" "No,Yes" bitfld.long 0x00 2. " PD_DIS[2] ,Pull Down XGPIO2 disable" "No,Yes" bitfld.long 0x00 1. " PD_DIS[1] ,Pull Down XGPIO1 disable" "No,Yes" bitfld.long 0x00 0. " PD_DIS[0] ,Pull Down XGPIO0 disable" "No,Yes" line.long 0x04 "PAD_PD_CFG_2,PAD Pull Down Configuration" bitfld.long 0x04 31. " PD_DIS[31] ,Pull Down XGPIO63 disable" "No,Yes" bitfld.long 0x04 30. " PD_DIS[30] ,Pull Down XGPIO62 disable" "No,Yes" bitfld.long 0x04 29. " PD_DIS[29] ,Pull Down XGPIO61 disable" "No,Yes" bitfld.long 0x04 28. " PD_DIS[28] ,Pull Down XGPIO60 disable" "No,Yes" textline " " bitfld.long 0x04 27. " PD_DIS[27] ,Pull Down XGPIO59 disable" "No,Yes" bitfld.long 0x04 26. " PD_DIS[26] ,Pull Down XGPIO58 disable" "No,Yes" bitfld.long 0x04 25. " PD_DIS[25] ,Pull Down XGPIO57 disable" "No,Yes" bitfld.long 0x04 24. " PD_DIS[24] ,Pull Down XGPIO56 disable" "No,Yes" textline " " bitfld.long 0x04 23. " PD_DIS[23] ,Pull Down GPIO_55 disable" "No,Yes" bitfld.long 0x04 22. " PD_DIS[22] ,Pull Down GPIO_54 disable" "No,Yes" bitfld.long 0x04 21. " PD_DIS[21] ,Pull Down GPIO_53 disable" "No,Yes" bitfld.long 0x04 20. " PD_DIS[20] ,Pull Down GPIO_52 disable" "No,Yes" textline " " bitfld.long 0x04 19. " PD_DIS[19] ,Pull Down GPIO_51 disable" "No,Yes" bitfld.long 0x04 18. " PD_DIS[18] ,Pull Down GPIO_50 disable" "No,Yes" bitfld.long 0x04 17. " PD_DIS[17] ,Pull Down GPIO_49 disable" "No,Yes" bitfld.long 0x04 16. " PD_DIS[16] ,Pull Down GPIO_48 disable" "No,Yes" textline " " bitfld.long 0x04 15. " PD_DIS[15] ,Pull Down GPIO_47 disable" "No,Yes" bitfld.long 0x04 14. " PD_DIS[14] ,Pull Down GPIO_46 disable" "No,Yes" bitfld.long 0x04 13. " PD_DIS[13] ,Pull Down GPIO_45 disable" "No,Yes" bitfld.long 0x04 12. " PD_DIS[12] ,Pull Down GPIO_44 disable" "No,Yes" textline " " bitfld.long 0x04 11. " PD_DIS[11] ,Pull Down GPIO_43 disable" "No,Yes" bitfld.long 0x04 10. " PD_DIS[10] ,Pull Down GPIO_42 disable" "No,Yes" bitfld.long 0x04 9. " PD_DIS[9] ,Pull Down GPIO_41 disable" "No,Yes" bitfld.long 0x04 8. " PD_DIS[8] ,Pull Down GPIO_40 disable" "No,Yes" textline " " bitfld.long 0x04 7. " PD_DIS[7] ,Pull Down XGPIO39 disable" "No,Yes" bitfld.long 0x04 6. " PD_DIS[6] ,Pull Down XGPIO38 disable" "No,Yes" bitfld.long 0x04 5. " PD_DIS[5] ,Pull Down XGPIO37 disable" "No,Yes" bitfld.long 0x04 4. " PD_DIS[4] ,Pull Down XGPIO36 disable" "No,Yes" textline " " bitfld.long 0x04 3. " PD_DIS[3] ,Pull Down XGPIO35 disable" "No,Yes" bitfld.long 0x04 2. " PD_DIS[2] ,Pull Down XGPIO34 disable" "No,Yes" bitfld.long 0x04 1. " PD_DIS[1] ,Pull Down XGPIO33 disable" "No,Yes" bitfld.long 0x04 0. " PD_DIS[0] ,Pull Down XGPIO32 disable" "No,Yes" line.long 0x08 "PAD_PD_CFG_3,PAD Pull Down Configuration" bitfld.long 0x08 31. " PD_DIS[31] ,Pull Down XGPIO95 disable" "No,Yes" bitfld.long 0x08 30. " PD_DIS[30] ,Pull Down XGPIO94 disable" "No,Yes" bitfld.long 0x08 29. " PD_DIS[29] ,Pull Down XGPIO93 disable" "No,Yes" bitfld.long 0x08 28. " PD_DIS[28] ,Pull Down XGPIO92 disable" "No,Yes" textline " " bitfld.long 0x08 27. " PD_DIS[27] ,Pull Down XGPIO91 disable" "No,Yes" bitfld.long 0x08 26. " PD_DIS[26] ,Pull Down XGPIO90 disable" "No,Yes" bitfld.long 0x08 25. " PD_DIS[25] ,Pull Down XGPIO89 disable" "No,Yes" bitfld.long 0x08 24. " PD_DIS[24] ,Pull Down XGPIO88 disable" "No,Yes" textline " " bitfld.long 0x08 23. " PD_DIS[23] ,Pull Down XGPIO87 disable" "No,Yes" bitfld.long 0x08 22. " PD_DIS[22] ,Pull Down XGPIO86 disable" "No,Yes" bitfld.long 0x08 21. " PD_DIS[21] ,Pull Down XGPIO85 disable" "No,Yes" bitfld.long 0x08 20. " PD_DIS[20] ,Pull Down XGPIO84 disable" "No,Yes" textline " " bitfld.long 0x08 19. " PD_DIS[19] ,Pull Down XGPIO83 disable" "No,Yes" bitfld.long 0x08 18. " PD_DIS[18] ,Pull Down XGPIO82 disable" "No,Yes" bitfld.long 0x08 17. " PD_DIS[17] ,Pull Down XGPIO81 disable" "No,Yes" bitfld.long 0x08 16. " PD_DIS[16] ,Pull Down XGPIO80 disable" "No,Yes" textline " " bitfld.long 0x08 15. " PD_DIS[15] ,Pull Down XGPIO79 disable" "No,Yes" bitfld.long 0x08 14. " PD_DIS[14] ,Pull Down XGPIO78 disable" "No,Yes" bitfld.long 0x08 13. " PD_DIS[13] ,Pull Down XGPIO77 disable" "No,Yes" bitfld.long 0x08 12. " PD_DIS[12] ,Pull Down XGPIO76 disable" "No,Yes" textline " " bitfld.long 0x08 11. " PD_DIS[11] ,Pull Down XGPIO75 disable" "No,Yes" bitfld.long 0x08 10. " PD_DIS[10] ,Pull Down XGPIO74 disable" "No,Yes" bitfld.long 0x08 9. " PD_DIS[9] ,Pull Down XGPIO73 disable" "No,Yes" bitfld.long 0x08 8. " PD_DIS[8] ,Pull Down XGPIO72 disable" "No,Yes" textline " " bitfld.long 0x08 7. " PD_DIS[7] ,Pull Down XGPIO71 disable" "No,Yes" bitfld.long 0x08 6. " PD_DIS[6] ,Pull Down XGPIO70 disable" "No,Yes" bitfld.long 0x08 5. " PD_DIS[5] ,Pull Down XGPIO69 disable" "No,Yes" bitfld.long 0x08 4. " PD_DIS[4] ,Pull Down XGPIO68 disable" "No,Yes" textline " " bitfld.long 0x08 3. " PD_DIS[3] ,Pull Down XGPIO67 disable" "No,Yes" bitfld.long 0x08 2. " PD_DIS[2] ,Pull Down XGPIO66 disable" "No,Yes" bitfld.long 0x08 1. " PD_DIS[1] ,Pull Down XGPIO65 disable" "No,Yes" bitfld.long 0x08 0. " PD_DIS[0] ,Pull Down XGPIO64 disable" "No,Yes" line.long 0x0C "PAD_PD_CFG_4,PAD Pull Down Configuration" bitfld.long 0x0C 31. " PD_DIS[31] ,Pull Down XGPIO127 disable" "No,Yes" bitfld.long 0x0C 30. " PD_DIS[30] ,Pull Down XGPIO126 disable" "No,Yes" bitfld.long 0x0C 29. " PD_DIS[29] ,Pull Down XGPIO125 disable" "No,Yes" bitfld.long 0x0C 28. " PD_DIS[28] ,Pull Down XGPIO124 disable" "No,Yes" textline " " bitfld.long 0x0C 27. " PD_DIS[27] ,Pull Down XGPIO123 disable" "No,Yes" bitfld.long 0x0C 26. " PD_DIS[26] ,Pull Down XGPIO122 disable" "No,Yes" bitfld.long 0x0C 25. " PD_DIS[25] ,Pull Down XGPIO121 disable" "No,Yes" bitfld.long 0x0C 24. " PD_DIS[24] ,Pull Down XGPIO120 disable" "No,Yes" textline " " bitfld.long 0x0C 23. " PD_DIS[23] ,Pull Down XGPIO119 disable" "No,Yes" bitfld.long 0x0C 22. " PD_DIS[22] ,Pull Down XGPIO118 disable" "No,Yes" bitfld.long 0x0C 21. " PD_DIS[21] ,Pull Down XGPIO117 disable" "No,Yes" bitfld.long 0x0C 20. " PD_DIS[20] ,Pull Down XGPIO116 disable" "No,Yes" textline " " bitfld.long 0x0C 19. " PD_DIS[19] ,Pull Down XGPIO115 disable" "No,Yes" bitfld.long 0x0C 18. " PD_DIS[18] ,Pull Down XGPIO114 disable" "No,Yes" bitfld.long 0x0C 17. " PD_DIS[17] ,Pull Down XGPIO113 disable" "No,Yes" bitfld.long 0x0C 16. " PD_DIS[16] ,Pull Down XGPIO112 disable" "No,Yes" textline " " bitfld.long 0x0C 15. " PD_DIS[15] ,Pull Down XGPIO111 disable" "No,Yes" bitfld.long 0x0C 14. " PD_DIS[14] ,Pull Down XGPIO110 disable" "No,Yes" bitfld.long 0x0C 13. " PD_DIS[13] ,Pull Down XGPIO109 disable" "No,Yes" bitfld.long 0x0C 12. " PD_DIS[12] ,Pull Down XGPIO108 disable" "No,Yes" textline " " bitfld.long 0x0C 11. " PD_DIS[11] ,Pull Down XGPIO107 disable" "No,Yes" bitfld.long 0x0C 10. " PD_DIS[10] ,Pull Down XGPIO106 disable" "No,Yes" bitfld.long 0x0C 9. " PD_DIS[9] ,Pull Down XGPIO105 disable" "No,Yes" bitfld.long 0x0C 8. " PD_DIS[8] ,Pull Down XGPIO104 disable" "No,Yes" textline " " bitfld.long 0x0C 7. " PD_DIS[7] ,Pull Down XGPIO103 disable" "No,Yes" bitfld.long 0x0C 6. " PD_DIS[6] ,Pull Down XGPIO102 disable" "No,Yes" bitfld.long 0x0C 5. " PD_DIS[5] ,Pull Down XGPIO101 disable" "No,Yes" bitfld.long 0x0C 4. " PD_DIS[4] ,Pull Down XGPIO100 disable" "No,Yes" textline " " bitfld.long 0x0C 3. " PD_DIS[3] ,Pull Down XGPIO99 disable" "No,Yes" bitfld.long 0x0C 2. " PD_DIS[2] ,Pull Down XGPIO98 disable" "No,Yes" bitfld.long 0x0C 1. " PD_DIS[1] ,Pull Down XGPIO97 disable" "No,Yes" bitfld.long 0x0C 0. " PD_DIS[0] ,Pull Down XGPIO96 disable" "No,Yes" line.long 0x10 "PAD_PD_CFG_5,PAD Pull Down Configuration" bitfld.long 0x10 31. " PD_DIS[31] ,Pull Down XGPIO159 disable" "No,Yes" bitfld.long 0x10 30. " PD_DIS[30] ,Pull Down XGPIO158 disable" "No,Yes" bitfld.long 0x10 29. " PD_DIS[29] ,Pull Down XGPIO157 disable" "No,Yes" bitfld.long 0x10 28. " PD_DIS[28] ,Pull Down XGPIO156 disable" "No,Yes" textline " " bitfld.long 0x10 27. " PD_DIS[27] ,Pull Down XGPIO155 disable" "No,Yes" bitfld.long 0x10 26. " PD_DIS[26] ,Pull Down XGPIO154 disable" "No,Yes" bitfld.long 0x10 25. " PD_DIS[25] ,Pull Down XGPIO153 disable" "No,Yes" bitfld.long 0x10 24. " PD_DIS[24] ,Pull Down XGPIO152 disable" "No,Yes" textline " " bitfld.long 0x10 23. " PD_DIS[23] ,Pull Down XGPIO151 disable" "No,Yes" bitfld.long 0x10 22. " PD_DIS[22] ,Pull Down XGPIO150 disable" "No,Yes" bitfld.long 0x10 21. " PD_DIS[21] ,Pull Down XGPIO149 disable" "No,Yes" bitfld.long 0x10 20. " PD_DIS[20] ,Pull Down XGPIO148 disable" "No,Yes" textline " " bitfld.long 0x10 19. " PD_DIS[19] ,Pull Down XGPIO147 disable" "No,Yes" bitfld.long 0x10 18. " PD_DIS[18] ,Pull Down XGPIO146 disable" "No,Yes" bitfld.long 0x10 17. " PD_DIS[17] ,Pull Down XGPIO145 disable" "No,Yes" bitfld.long 0x10 16. " PD_DIS[16] ,Pull Down XGPIO144 disable" "No,Yes" textline " " bitfld.long 0x10 15. " PD_DIS[15] ,Pull Down XGPIO143 disable" "No,Yes" bitfld.long 0x10 14. " PD_DIS[14] ,Pull Down XGPIO142 disable" "No,Yes" bitfld.long 0x10 13. " PD_DIS[13] ,Pull Down XGPIO141 disable" "No,Yes" bitfld.long 0x10 12. " PD_DIS[12] ,Pull Down XGPIO140 disable" "No,Yes" textline " " bitfld.long 0x10 11. " PD_DIS[11] ,Pull Down XGPIO139 disable" "No,Yes" bitfld.long 0x10 10. " PD_DIS[10] ,Pull Down XGPIO138 disable" "No,Yes" bitfld.long 0x10 9. " PD_DIS[9] ,Pull Down XGPIO137 disable" "No,Yes" bitfld.long 0x10 8. " PD_DIS[8] ,Pull Down XGPIO136 disable" "No,Yes" textline " " bitfld.long 0x10 7. " PD_DIS[7] ,Pull Down XGPIO135 disable" "No,Yes" bitfld.long 0x10 6. " PD_DIS[6] ,Pull Down XGPIO134 disable" "No,Yes" bitfld.long 0x10 5. " PD_DIS[5] ,Pull Down XGPIO133 disable" "No,Yes" bitfld.long 0x10 4. " PD_DIS[4] ,Pull Down XGPIO132 disable" "No,Yes" textline " " bitfld.long 0x10 3. " PD_DIS[3] ,Pull Down XGPIO131 disable" "No,Yes" bitfld.long 0x10 2. " PD_DIS[2] ,Pull Down XGPIO130 disable" "No,Yes" bitfld.long 0x10 1. " PD_DIS[1] ,Pull Down XGPIO129 disable" "No,Yes" bitfld.long 0x10 0. " PD_DIS[0] ,Pull Down XGPIO128 disable" "No,Yes" line.long 0x14 "PAD_PD_CFG_6,PAD Pull Down Configuration" bitfld.long 0x14 31. " PD_DIS[31] ,Pull Down XGPIO191 disable" "No,Yes" bitfld.long 0x14 30. " PD_DIS[30] ,Pull Down XGPIO190 disable" "No,Yes" bitfld.long 0x14 29. " PD_DIS[29] ,Pull Down XGPIO189 disable" "No,Yes" bitfld.long 0x14 28. " PD_DIS[28] ,Pull Down XGPIO188 disable" "No,Yes" textline " " bitfld.long 0x14 27. " PD_DIS[27] ,Pull Down XGPIO187 disable" "No,Yes" bitfld.long 0x14 26. " PD_DIS[26] ,Pull Down XGPIO186 disable" "No,Yes" bitfld.long 0x14 25. " PD_DIS[25] ,Pull Down XGPIO185 disable" "No,Yes" bitfld.long 0x14 24. " PD_DIS[24] ,Pull Down XGPIO184 disable" "No,Yes" textline " " bitfld.long 0x14 23. " PD_DIS[23] ,Pull Down XGPIO183 disable" "No,Yes" bitfld.long 0x14 22. " PD_DIS[22] ,Pull Down XGPIO182 disable" "No,Yes" bitfld.long 0x14 21. " PD_DIS[21] ,Pull Down XGPIO181 disable" "No,Yes" bitfld.long 0x14 20. " PD_DIS[20] ,Pull Down XGPIO180 disable" "No,Yes" textline " " bitfld.long 0x14 19. " PD_DIS[19] ,Pull Down XGPIO179 disable" "No,Yes" bitfld.long 0x14 18. " PD_DIS[18] ,Pull Down XGPIO178 disable" "No,Yes" bitfld.long 0x14 17. " PD_DIS[17] ,Pull Down XGPIO177 disable" "No,Yes" bitfld.long 0x14 16. " PD_DIS[16] ,Pull Down XGPIO176 disable" "No,Yes" textline " " bitfld.long 0x14 15. " PD_DIS[15] ,Pull Down XGPIO175 disable" "No,Yes" bitfld.long 0x14 14. " PD_DIS[14] ,Pull Down XGPIO174 disable" "No,Yes" bitfld.long 0x14 13. " PD_DIS[13] ,Pull Down XGPIO173 disable" "No,Yes" bitfld.long 0x14 12. " PD_DIS[12] ,Pull Down XGPIO172 disable" "No,Yes" textline " " bitfld.long 0x14 11. " PD_DIS[11] ,Pull Down XGPIO171 disable" "No,Yes" bitfld.long 0x14 10. " PD_DIS[10] ,Pull Down XGPIO170 disable" "No,Yes" bitfld.long 0x14 9. " PD_DIS[9] ,Pull Down XGPIO169 disable" "No,Yes" bitfld.long 0x14 8. " PD_DIS[8] ,Pull Down XGPIO168 disable" "No,Yes" textline " " bitfld.long 0x14 7. " PD_DIS[7] ,Pull Down XGPIO167 disable" "No,Yes" bitfld.long 0x14 6. " PD_DIS[6] ,Pull Down XGPIO166 disable" "No,Yes" bitfld.long 0x14 5. " PD_DIS[5] ,Pull Down XGPIO165 disable" "No,Yes" bitfld.long 0x14 4. " PD_DIS[4] ,Pull Down XGPIO164 disable" "No,Yes" textline " " bitfld.long 0x14 3. " PD_DIS[3] ,Pull Down XGPIO163 disable" "No,Yes" bitfld.long 0x14 2. " PD_DIS[2] ,Pull Down XGPIO162 disable" "No,Yes" bitfld.long 0x14 1. " PD_DIS[1] ,Pull Down XGPIO161 disable" "No,Yes" bitfld.long 0x14 0. " PD_DIS[0] ,Pull Down XGPIO160 disable" "No,Yes" line.long 0x18 "PAD_PD_CFG_7,PAD Pull Down Configuration" bitfld.long 0x18 31. " PD_DIS[31] ,Pull Down XGPIO223 disable" "No,Yes" bitfld.long 0x18 30. " PD_DIS[30] ,Pull Down XGPIO222 disable" "No,Yes" bitfld.long 0x18 29. " PD_DIS[29] ,Pull Down XGPIO221 disable" "No,Yes" bitfld.long 0x18 28. " PD_DIS[28] ,Pull Down XGPIO220 disable" "No,Yes" textline " " bitfld.long 0x18 27. " PD_DIS[27] ,Pull Down XGPIO219 disable" "No,Yes" bitfld.long 0x18 26. " PD_DIS[26] ,Pull Down XGPIO218 disable" "No,Yes" bitfld.long 0x18 25. " PD_DIS[25] ,Pull Down XGPIO217 disable" "No,Yes" bitfld.long 0x18 24. " PD_DIS[24] ,Pull Down XGPIO216 disable" "No,Yes" textline " " bitfld.long 0x18 23. " PD_DIS[23] ,Pull Down XGPIO215 disable" "No,Yes" bitfld.long 0x18 22. " PD_DIS[22] ,Pull Down XGPIO214 disable" "No,Yes" bitfld.long 0x18 21. " PD_DIS[21] ,Pull Down XGPIO213 disable" "No,Yes" bitfld.long 0x18 20. " PD_DIS[20] ,Pull Down XGPIO212 disable" "No,Yes" textline " " bitfld.long 0x18 19. " PD_DIS[19] ,Pull Down XGPIO211 disable" "No,Yes" bitfld.long 0x18 18. " PD_DIS[18] ,Pull Down XGPIO210 disable" "No,Yes" bitfld.long 0x18 17. " PD_DIS[17] ,Pull Down XGPIO209 disable" "No,Yes" bitfld.long 0x18 16. " PD_DIS[16] ,Pull Down XGPIO208 disable" "No,Yes" textline " " bitfld.long 0x18 15. " PD_DIS[15] ,Pull Down XGPIO207 disable" "No,Yes" bitfld.long 0x18 14. " PD_DIS[14] ,Pull Down XGPIO206 disable" "No,Yes" bitfld.long 0x18 13. " PD_DIS[13] ,Pull Down XGPIO205 disable" "No,Yes" bitfld.long 0x18 12. " PD_DIS[12] ,Pull Down XGPIO204 disable" "No,Yes" textline " " bitfld.long 0x18 11. " PD_DIS[11] ,Pull Down XGPIO203 disable" "No,Yes" bitfld.long 0x18 10. " PD_DIS[10] ,Pull Down XGPIO202 disable" "No,Yes" bitfld.long 0x18 9. " PD_DIS[9] ,Pull Down XGPIO201 disable" "No,Yes" bitfld.long 0x18 8. " PD_DIS[8] ,Pull Down XGPIO200 disable" "No,Yes" textline " " bitfld.long 0x18 7. " PD_DIS[7] ,Pull Down XGPIO199 disable" "No,Yes" bitfld.long 0x18 6. " PD_DIS[6] ,Pull Down XGPIO198 disable" "No,Yes" bitfld.long 0x18 5. " PD_DIS[5] ,Pull Down XGPIO197 disable" "No,Yes" bitfld.long 0x18 4. " PD_DIS[4] ,Pull Down XGPIO196 disable" "No,Yes" textline " " bitfld.long 0x18 3. " PD_DIS[3] ,Pull Down XGPIO195 disable" "No,Yes" bitfld.long 0x18 2. " PD_DIS[2] ,Pull Down XGPIO194 disable" "No,Yes" bitfld.long 0x18 1. " PD_DIS[1] ,Pull Down XGPIO193 disable" "No,Yes" bitfld.long 0x18 0. " PD_DIS[0] ,Pull Down XGPIO192 disable" "No,Yes" line.long 0x1C "PAD_PD_CFG_8,PAD Pull Down Configuration" bitfld.long 0x1C 25. " PD_DIS[25] ,Pull Down XGPIO249 disable" "No,Yes" bitfld.long 0x1C 24. " PD_DIS[24] ,Pull Down XGPIO248 disable" "No,Yes" bitfld.long 0x1C 23. " PD_DIS[23] ,Pull Down XGPIO247 disable" "No,Yes" bitfld.long 0x1C 22. " PD_DIS[22] ,Pull Down XGPIO246 disable" "No,Yes" textline " " bitfld.long 0x1C 21. " PD_DIS[21] ,Pull Down XGPIO245 disable" "No,Yes" bitfld.long 0x1C 20. " PD_DIS[20] ,Pull Down XGPIO244 disable" "No,Yes" bitfld.long 0x1C 19. " PD_DIS[19] ,Pull Down XGPIO243 disable" "No,Yes" bitfld.long 0x1C 18. " PD_DIS[18] ,Pull Down XGPIO242 disable" "No,Yes" textline " " bitfld.long 0x1C 17. " PD_DIS[17] ,Pull Down XGPIO241 disable" "No,Yes" bitfld.long 0x1C 16. " PD_DIS[16] ,Pull Down XGPIO240 disable" "No,Yes" bitfld.long 0x1C 15. " PD_DIS[15] ,Pull Down XGPIO239 disable" "No,Yes" bitfld.long 0x1C 14. " PD_DIS[14] ,Pull Down XGPIO238 disable" "No,Yes" textline " " bitfld.long 0x1C 13. " PD_DIS[13] ,Pull Down XGPIO237 disable" "No,Yes" bitfld.long 0x1C 12. " PD_DIS[12] ,Pull Down XGPIO236 disable" "No,Yes" bitfld.long 0x1C 11. " PD_DIS[11] ,Pull Down XGPIO235 disable" "No,Yes" bitfld.long 0x1C 10. " PD_DIS[10] ,Pull Down XGPIO234 disable" "No,Yes" textline " " bitfld.long 0x1C 9. " PD_DIS[9] ,Pull Down XGPIO233 disable" "No,Yes" bitfld.long 0x1C 8. " PD_DIS[8] ,Pull Down XGPIO232 disable" "No,Yes" bitfld.long 0x1C 7. " PD_DIS[7] ,Pull Down XGPIO231 disable" "No,Yes" bitfld.long 0x1C 6. " PD_DIS[6] ,Pull Down XGPIO230 disable" "No,Yes" textline " " bitfld.long 0x1C 5. " PD_DIS[5] ,Pull Down XGPIO229 disable" "No,Yes" bitfld.long 0x1C 4. " PD_DIS[4] ,Pull Down XGPIO228 disable" "No,Yes" bitfld.long 0x1C 3. " PD_DIS[3] ,Pull Up XGPIO227 disable" "No,Yes" bitfld.long 0x1C 2. " PD_DIS[2] ,Pull Up XGPIO226 disable" "No,Yes" textline " " bitfld.long 0x1C 1. " PD_DIS[1] ,Pull Up XGPIO225 disable" "No,Yes" bitfld.long 0x1C 0. " PD_DIS[0] ,Pull Up XGPIO224 disable" "No,Yes" group.long 0x648++0xF line.long 0x0 "PAD_DRV_CFG_1,PAD Drive level Configuration" bitfld.long 0x0 30.--31. " DRV_15 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 28.--29. " DRV_14 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 26.--27. " DRV_13 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 24.--25. " DRV_12 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x0 22.--23. " DRV_11 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 20.--21. " DRV_10 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 18.--19. " DRV_9 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 16.--17. " DRV_8 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x0 14.--15. " DRV_7 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 12.--13. " DRV_6 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 10.--11. " DRV_5 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 8.--9. " DRV_4 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x0 6.--7. " DRV_3 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 4.--5. " DRV_2 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 2.--3. " DRV_1 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x0 0.--1. " DRV_0 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" line.long 0x4 "PAD_DRV_CFG_2,PAD Drive level Configuration" bitfld.long 0x4 30.--31. " DRV_15 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 28.--29. " DRV_14 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 26.--27. " DRV_13 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 24.--25. " DRV_12 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x4 22.--23. " DRV_11 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 20.--21. " DRV_10 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 18.--19. " DRV_9 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 16.--17. " DRV_8 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x4 14.--15. " DRV_7 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 12.--13. " DRV_6 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 10.--11. " DRV_5 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 8.--9. " DRV_4 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x4 6.--7. " DRV_3 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 4.--5. " DRV_2 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 2.--3. " DRV_1 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x4 0.--1. " DRV_0 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" line.long 0x8 "PAD_DRV_CFG_3,PAD Drive level Configuration" bitfld.long 0x8 30.--31. " DRV_15 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 28.--29. " DRV_14 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 26.--27. " DRV_13 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 24.--25. " DRV_12 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x8 22.--23. " DRV_11 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 20.--21. " DRV_10 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 18.--19. " DRV_9 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 16.--17. " DRV_8 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x8 14.--15. " DRV_7 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 12.--13. " DRV_6 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 10.--11. " DRV_5 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 8.--9. " DRV_4 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0x8 6.--7. " DRV_3 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 4.--5. " DRV_2 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 2.--3. " DRV_1 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0x8 0.--1. " DRV_0 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" line.long 0xC "PAD_DRV_CFG_4,PAD Drive level Configuration" bitfld.long 0xC 30.--31. " DRV_15 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 28.--29. " DRV_14 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 26.--27. " DRV_13 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 24.--25. " DRV_12 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0xC 22.--23. " DRV_11 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 20.--21. " DRV_10 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 18.--19. " DRV_9 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 16.--17. " DRV_8 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0xC 14.--15. " DRV_7 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 12.--13. " DRV_6 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 10.--11. " DRV_5 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 8.--9. " DRV_4 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" textline " " bitfld.long 0xC 6.--7. " DRV_3 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 4.--5. " DRV_2 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 2.--3. " DRV_1 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" bitfld.long 0xC 0.--1. " DRV_0 ,PAD Drive level Configuration" "4 mA,8 mA,6 mA,10 mA" group.long 0x65C++0x07 line.long 0x0 "PAD_SLEW_CFG_0,PAD Slew level Configuration" bitfld.long 0x0 31. " SLEW[31] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 30. " SLEW[30] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 29. " SLEW[29] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 28. " SLEW[28] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 27. " SLEW[27] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 26. " SLEW[26] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 25. " SLEW[25] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 24. " SLEW[24] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 23. " SLEW[23] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 22. " SLEW[22] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 21. " SLEW[21] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 20. " SLEW[20] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 19. " SLEW[19] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 18. " SLEW[18] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 17. " SLEW[17] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 16. " SLEW[16] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 15. " SLEW[15] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 14. " SLEW[14] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 13. " SLEW[13] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 12. " SLEW[12] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 11. " SLEW[11] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 10. " SLEW[10] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 9. " SLEW[9] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 8. " SLEW[8] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 7. " SLEW[7] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 6. " SLEW[6] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 5. " SLEW[5] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 4. " SLEW[4] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x0 3. " SLEW[3] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 2. " SLEW[2] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 1. " SLEW[1] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x0 0. " SLEW[0] ,PAD Slew level Configuration" "Nominal,Fast" line.long 0x4 "PAD_SLEW_CFG_1,PAD Slew level Configuration" bitfld.long 0x4 31. " SLEW[31] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 30. " SLEW[30] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 29. " SLEW[29] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 28. " SLEW[28] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 27. " SLEW[27] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 26. " SLEW[26] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 25. " SLEW[25] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 24. " SLEW[24] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 23. " SLEW[23] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 22. " SLEW[22] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 21. " SLEW[21] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 20. " SLEW[20] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 19. " SLEW[19] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 18. " SLEW[18] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 17. " SLEW[17] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 16. " SLEW[16] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 15. " SLEW[15] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 14. " SLEW[14] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 13. " SLEW[13] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 12. " SLEW[12] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 11. " SLEW[11] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 10. " SLEW[10] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 9. " SLEW[9] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 8. " SLEW[8] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 7. " SLEW[7] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 6. " SLEW[6] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 5. " SLEW[5] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 4. " SLEW[4] ,PAD Slew level Configuration" "Nominal,Fast" textline " " bitfld.long 0x4 3. " SLEW[3] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 2. " SLEW[2] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 1. " SLEW[1] ,PAD Slew level Configuration" "Nominal,Fast" bitfld.long 0x4 0. " SLEW[0] ,PAD Slew level Configuration" "Nominal,Fast" group.long 0x668++0x1F line.long 0x0 "PAD_FUNCTION_EN_1,Pad Function selection" bitfld.long 0x0 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x0 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x0 0. " DIR_EN ,PAD direction" "Set to input,Controlled by IPs" line.long 0x4 "PAD_FUNCTION_EN_2,Pad Function selection" bitfld.long 0x4 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x4 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x4 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0x8 "PAD_FUNCTION_EN_3,Pad Function selection" bitfld.long 0x8 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x8 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x8 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0xC "PAD_FUNCTION_EN_4,Pad Function selection" bitfld.long 0xC 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0xC 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0xC 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0x10 "PAD_FUNCTION_EN_5,Pad Function selection" bitfld.long 0x10 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x10 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x10 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0x14 "PAD_FUNCTION_EN_6,Pad Function selection" bitfld.long 0x14 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x14 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x14 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0x18 "PAD_FUNCTION_EN_7,Pad Function selection" bitfld.long 0x18 31. " IP_EN[31] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 30. " IP_EN[30] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 29. " IP_EN[29] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 28. " IP_EN[28] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 27. " IP_EN[27] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x18 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x18 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" line.long 0x1C "PAD_FUNCTION_EN_8,Pad Function selection" bitfld.long 0x1C 26. " IP_EN[26] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 25. " IP_EN[25] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 24. " IP_EN[24] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 23. " IP_EN[23] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 22. " IP_EN[22] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 21. " IP_EN[21] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 20. " IP_EN[20] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 19. " IP_EN[19] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 18. " IP_EN[18] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 17. " IP_EN[17] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 16. " IP_EN[16] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 15. " IP_EN[15] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 14. " IP_EN[14] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 13. " IP_EN[13] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 12. " IP_EN[12] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 11. " IP_EN[11] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 10. " IP_EN[10] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 9. " IP_EN[9] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 8. " IP_EN[8] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 7. " IP_EN[7] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 6. " IP_EN[6] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 5. " IP_EN[5] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 4. " IP_EN[4] ,Pad Function select GPIO/IP" "GPIO,IP" textline " " bitfld.long 0x1C 3. " IP_EN[3] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 2. " IP_EN[2] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 1. " IP_EN[1] ,Pad Function select GPIO/IP" "GPIO,IP" bitfld.long 0x1C 0. " IP_EN[0] ,Pad Function select GPIO/IP" "GPIO,IP" group.long 0x6A0++0x03 line.long 0x00 "PAD_SHARED_IP_EN_1,Pad Function selection" bitfld.long 0x00 31. " SHARED_IP_EN[31] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 30. " SHARED_IP_EN[30] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 29. " SHARED_IP_EN[29] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 28. " SHARED_IP_EN[28] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 27. " SHARED_IP_EN[27] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 26. " SHARED_IP_EN[26] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 25. " SHARED_IP_EN[25] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 24. " SHARED_IP_EN[24] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 23. " SHARED_IP_EN[23] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 22. " SHARED_IP_EN[22] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 21. " SHARED_IP_EN[21] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 20. " SHARED_IP_EN[20] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 19. " SHARED_IP_EN[19] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 18. " SHARED_IP_EN[18] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 17. " SHARED_IP_EN[17] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 16. " SHARED_IP_EN[16] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 15. " SHARED_IP_EN[15] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 14. " SHARED_IP_EN[14] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 13. " SHARED_IP_EN[13] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 12. " SHARED_IP_EN[12] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 11. " SHARED_IP_EN[11] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 10. " SHARED_IP_EN[10] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 9. " SHARED_IP_EN[9] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 8. " SHARED_IP_EN[8] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 7. " SHARED_IP_EN[7] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 6. " SHARED_IP_EN[6] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 5. " SHARED_IP_EN[5] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 4. " SHARED_IP_EN[4] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 3. " SHARED_IP_EN[3] ,Pad Function select" "IP 1,IP 2" bitfld.long 0x00 2. " SHARED_IP_EN[2] ,Pad Function select" "IP 1,IP 2" textline " " bitfld.long 0x00 1. " SHARED_IP_EN[1] ,Pad Function select" "IP 1,IP 2" group.long 0x6A8++0x03 line.long 0x00 "DDR_PAD_CFG,DDR PAD Configuration" bitfld.long 0x00 9. " PAD_VREF ,PADs voltage reference" "Integrated,External" bitfld.long 0x00 8. " DATA_PROGB ,Output Buffer AC characteristics - data pads" "0,1" textline " " bitfld.long 0x00 7. " DATA_PROGA ,Output Buffer AC characteristics - data pads" "0,1" bitfld.long 0x00 6. " CLK_PROGB ,Output Buffer AC characteristics - clock pads" "0,1" textline " " bitfld.long 0x00 5. " CLK_PROGA ,Output Buffer AC characteristics - clock pads" "0,1" bitfld.long 0x00 4. " CTRL_PROGB ,Output Buffer AC characteristics - ctrl/addr pads" "0,1" textline " " bitfld.long 0x00 3. " CTRL_PROGA ,Output Buffer AC characteristics - ctrl/addr pads" "0,1" bitfld.long 0x00 2. " DDR3_PAD_SW_SEL ,Controllability mode for DDR pads voltage" "HW,SW" textline " " rbitfld.long 0x00 1. " DDR3_PAD_SEL ,Status of DDR_MEM_DDR2_3 pad" "DDR2,DDR3" bitfld.long 0x00 0. " DDR3_SW_SEL ,Software selection" "DDR2,DDR3" tree "Compensation configuration registers" width 29. group.long 0x700++0x17 line.long 0x0 "COMPENSATION_1V8_3V3_1_CFG,IO_COMP1_1V8_3V3 configuration" hexmask.long.byte 0x0 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x0 16.--22. 1. " NASRC ,Readcode compensation parameter" textline " " bitfld.long 0x0 5. " PAD_TQ ,IDDQ mode command enable" "Disabled,Enabled" rbitfld.long 0x0 4. " STS_OK ,Valid code compensation" "No effect,Compensated" textline " " bitfld.long 0x0 3. " ACCURATE ,Compensation cell internal/external resistance definition" "No effect,External" bitfld.long 0x0 2. " FREEZE ,Freeze command" "No effect,Freezed" textline " " bitfld.long 0x0 1. " TQ ,Compensation cell COMTQ command" "No effect,Compensated" bitfld.long 0x0 0. " EN ,Compensation cell COMEN command" "No effect,Compensated" line.long 0x4 "COMPENSATION_1V8_3V3_2_CFG,IO_COMP2_1V8_3V3 configuration" hexmask.long.byte 0x4 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x4 16.--22. 1. " NASRC ,Readcode compensation parameter" textline " " bitfld.long 0x4 5. " PAD_TQ ,IDDQ mode command enable" "Disabled,Enabled" rbitfld.long 0x4 4. " STS_OK ,Valid code compensation" "No effect,Compensated" textline " " bitfld.long 0x4 3. " ACCURATE ,Compensation cell internal/external resistance definition" "No effect,External" bitfld.long 0x4 2. " FREEZE ,Freeze command" "No effect,Freezed" textline " " bitfld.long 0x4 1. " TQ ,Compensation cell COMTQ command" "No effect,Compensated" bitfld.long 0x4 0. " EN ,Compensation cell COMEN command" "No effect,Compensated" line.long 0x8 "COMPENSATION_3V3_1_CFG,IO_COMP1_3V3 configuration" hexmask.long.byte 0x8 24.--30. 1. " RASRC ,Code compensation parameter" hexmask.long.byte 0x8 16.--22. 1. " NASRC ,Readcode compensation parameter" textline " " bitfld.long 0x8 7. " PAD_CHIPSLEEP ,Sets the 3V3 PADS in sleep mode" "Low,High" bitfld.long 0x8 6. " PAD_SLEEPINHBT ,Sets the 3V3 PADS in sleep mode" "Low,High" textline " " bitfld.long 0x8 5. " PAD_TQ ,IDDQ mode command enable" "Disabled,Enabled" rbitfld.long 0x8 4. " STS_OK ,Valid code compensation" "No effect,Compensated" textline " " bitfld.long 0x8 3. " ACCURATE ,Compensation cell internal/external resistance definition" "Internal,External" bitfld.long 0x8 2. " FREEZE ,Freeze command" "Not freeze,Freeze" textline " " bitfld.long 0x8 1. " TQ ,Compensation cell COMTQ command" "No effect,Compensated" bitfld.long 0x8 0. " EN ,Compensation cell COMEN command" "No effect,Compensated" line.long 0xC "COMPENSATION_3V3_2_CFG,IO_COMP2_3V3 configuration" hexmask.long.byte 0xC 24.--30. 1. " RASRC ,Code compensation parameter" hexmask.long.byte 0xC 16.--22. 1. " NASRC ,Readcode compensation parameter" textline " " bitfld.long 0xC 7. " PAD_CHIPSLEEP ,Sets the 3V3 PADS in sleep mode" "Low,High" bitfld.long 0xC 6. " PAD_SLEEPINHBT ,Sets the 3V3 PADS in sleep mode" "Low,High" textline " " bitfld.long 0xC 5. " PAD_TQ ,IDDQ mode command enable" "Disabled,Enabled" rbitfld.long 0xC 4. " STS_OK ,Valid code compensation" "No effect,Compensated" textline " " bitfld.long 0xC 3. " ACCURATE ,Compensation cell internal/external resistance definition" "Internal,External" bitfld.long 0xC 2. " FREEZE ,Freeze command" "Not freeze,Freeze" textline " " bitfld.long 0xC 1. " TQ ,Compensation cell COMTQ command" "No effect,Compensated" bitfld.long 0xC 0. " EN ,Compensation cell COMEN command" "No effect,Compensated" line.long 0x10 "COMPENSATION_DDR_CFG,IO_COMP_DDR configuration" bitfld.long 0x10 17.--20. " COMZCNIN ,Input bits to write the comzcn calibration code directly from the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 13.--16. " COMZCPIN ,Input bits to write the comzcp calibration code directly from the core" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 12. " UPDATEZC ,Update ZC" "Low,High" bitfld.long 0x10 11. " ENABLEB ,Compensation cell runs normally and generates the compensation code if requested / Disable the analog portion " "Low,High" textline " " bitfld.long 0x10 10. " ENBCOMZCIN ,Code is written by the core on the comzcpin/comzcnin bus / Code is determined by the compensation block" "Low,High" bitfld.long 0x10 6.--9. " COMZCN_CORE ,Value of computed compensation value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 2.--5. " COMZCP_CORE ,Value of computed compensation value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x10 0. " COMZCRDY ,Code computed computed by the compensation block" "Not ready,Ready" line.long 0x14 "COMPENSATION_2V5_3V3_1_CFG,IO_COMP_2V5_3V3 configuration" hexmask.long.byte 0x14 24.--30. 1. " RASRC ,Writing code compensation parameter" hexmask.long.byte 0x14 16.--22. 1. " NASRC ,Readcode compensation parameter" textline " " bitfld.long 0x14 5. " PAD_TQ ,IDDQ mode command enable" "Disabled,Enabled" rbitfld.long 0x14 4. " STS_OK ,Valid code compensation" "No effect,Compensated" textline " " bitfld.long 0x14 3. " ACCURATE ,Compensation cell internal/external resistance definition" "Internal,External" bitfld.long 0x14 2. " FREEZE ,Freeze command" "No effect,Freezed" textline " " bitfld.long 0x14 1. " TQ ,Compensation cell COMTQ command" "No effect,Compensated" bitfld.long 0x14 0. " EN ,Compensation cell COMEN command" "No effect,Compensated" tree.end tree "OTP configuration registers" width 14. group.long 0x800++0x47 line.long 0x00 "OTP_PROG_CTR,OTP configuration register for R/W management" rbitfld.long 0x00 8. " WRITE_FINISHEDM ,Write operation to bank finish" "Not finished,Finished" rbitfld.long 0x00 7. " WRITE_FINISHED2 ,Write operation to bank 2 finish" "Not finished,Finished" textline " " rbitfld.long 0x00 6. " WRITE_FINISHED1 ,Write operation to bank 1 finish" "Not finished,Finished" rbitfld.long 0x00 5. " READY_MASK ,Data stored inside the OTP bank m and mirrored here is stable" "Not ready,Ready" textline " " rbitfld.long 0x00 4. " READY_DATA2 ,Data stored inside the OTP bank 2 and mirrored here is stable" "Not ready,Ready" rbitfld.long 0x00 3. " READY_DATA1 ,Data stored inside the OTP bank 1 and mirrored here is stable" "Not ready,Ready" textline " " bitfld.long 0x00 2. " WRITE_MASK ,Write operation from registers 844>860 to OTP antifuse bank m" "Not triggered,Triggered" bitfld.long 0x00 1. " WRITE_DATA2 ,Write operation from registers 824>840 to OTP antifuse bank 2" "Not triggered,Triggered" textline " " bitfld.long 0x00 0. " WRITE_DATA1 ,Write operation from registers 804>820 to OTP antifuse bank 1" "Not triggered,Triggered" line.long 0x4 "OTP_WDATA1_1,Data to be written in OTP bank 1" line.long 0x8 "OTP_WDATA1_2,Data to be written in OTP bank 1" line.long 0xC "OTP_WDATA1_3,Data to be written in OTP bank 1" line.long 0x10 "OTP_WDATA1_4,Data to be written in OTP bank 1" line.long 0x14 "OTP_WDATA1_5,Data to be written in OTP bank 1" line.long 0x18 "OTP_WDATA1_6,Data to be written in OTP bank 1" line.long 0x1C "OTP_WDATA1_7,Data to be written in OTP bank 1" line.long 0x20 "OTP_WDATA1_8,Data to be written in OTP bank 1" hexmask.long 0x20 0.--30. 1. " DATA_255_224[30:0] ,User defined" line.long 0x24 "OTP_WDATA2_1,Data to be written in OTP bank 2" line.long 0x28 "OTP_WDATA2_2,Data to be written in OTP bank 2" line.long 0x2C "OTP_WDATA2_3,Data to be written in OTP bank 2" line.long 0x30 "OTP_WDATA2_4,Data to be written in OTP bank 2" line.long 0x34 "OTP_WDATA2_5,Data to be written in OTP bank 2" line.long 0x38 "OTP_WDATA2_6,Data to be written in OTP bank 2" line.long 0x3C "OTP_WDATA2_7,Data to be written in OTP bank 2" line.long 0x40 "OTP_WDATA2_8,Data to be written in OTP bank 2" hexmask.long 0x40 0.--30. 1. " DATA_255_224[30:0] ,User defined" line.long 0x44 "OTP_MASK_1,Data to be written in OTP bank m" hexmask.long.word 0x44 16.--31. 1. " DATA_31_0[31:16] ,WP bits B2 8 bits + 8 redundancy for masking bank 2 (hardwired function)" hexmask.long.word 0x44 0.--15. 1. " DATA_31_0[15:0] ,WP bits B1 8 bits + 8 redundancy for masking bank 1 (hardwired function)" hgroup.long 0x848++0x17 hide.long 0x0 "OTP_MASK_2,Data to be written in OTP bank m" hide.long 0x4 "OTP_MASK_3,Data to be written in OTP bank m" hide.long 0x8 "OTP_MASK_4,Data to be written in OTP bank m" hide.long 0xC "OTP_MASK_5,Data to be written in OTP bank m" hide.long 0x10 "OTP_MASK_6,Data to be written in OTP bank m" hide.long 0x14 "OTP_MASK_7,Data to be written in OTP bank m" group.long 0x860++0x03 line.long 0x00 "OTP_MASK_8,Data to be written in OTP bank m" bitfld.long 0x00 25.--26. " J1_J0 ,1 bit + 1 redundancy for JTAG disable (hardwired function)" "0,1,2,3" bitfld.long 0x00 23.--24. " T1_T0 ,1 bit + 1 redundancy for TEST disable (hardwired function)" "0,1,2,3" rgroup.long 0x864++0x5F line.long 0x0 "OTP_RDATA1_1,Data read from OTP bank 1" line.long 0x4 "OTP_RDATA1_2,Data read from OTP bank 1" line.long 0x8 "OTP_RDATA1_3,Data read from OTP bank 1" line.long 0xC "OTP_RDATA1_4,Data read from OTP bank 1" line.long 0x10 "OTP_RDATA1_5,Data read from OTP bank 1" line.long 0x14 "OTP_RDATA1_6,Data read from OTP bank 1" line.long 0x18 "OTP_RDATA1_7,Data read from OTP bank 1" line.long 0x1C "OTP_RDATA1_8,Data read from OTP bank 1" hexmask.long 0x1C 0.--30. 1. " DATA_255_224[30:0] ,User defined" line.long 0x20 "OTP_RDATA2_1,Data read from OTP bank 2" line.long 0x24 "OTP_RDATA2_2,Data read from OTP bank 2" line.long 0x28 "OTP_RDATA2_3,Data read from OTP bank 2" line.long 0x2C "OTP_RDATA2_4,Data read from OTP bank 2" line.long 0x30 "OTP_RDATA2_5,Data read from OTP bank 2" line.long 0x34 "OTP_RDATA2_6,Data read from OTP bank 2" line.long 0x38 "OTP_RDATA2_7,Data read from OTP bank 2" line.long 0x3C "OTP_RDATA2_8,Data read from OTP bank 2" hexmask.long 0x3C 0.--30. 1. " DATA_255_224[30:0] ,User defined" line.long 0x40 "OTP_RDATAM_1,Data read from OTP bank m" hexmask.long.word 0x40 16.--31. 1. " DATA_31_0[31:16] ,WP bits B2 8 bits + 8 redundancy for masking bank 2 (hardwired function)" hexmask.long.word 0x40 0.--15. 1. " DATA_31_0[15:0] ,WP bits B1 8 bits + 8 redundancy for masking bank 1 (hardwired function)" line.long 0x44 "OTP_RDATAM_2,Data read from OTP bank m" line.long 0x48 "OTP_RDATAM_3,Data read from OTP bank m" line.long 0x4C "OTP_RDATAM_4,Data read from OTP bank m" line.long 0x50 "OTP_RDATAM_5,Data read from OTP bank m" line.long 0x54 "OTP_RDATAM_6,Data read from OTP bank m" line.long 0x58 "OTP_RDATAM_7,Data read from OTP bank m" line.long 0x5C "OTP_RDATAM_8,Data read from OTP bank m" bitfld.long 0x5C 25.--26. " J1_J0 ,1 bit + 1 redundancy for JTAG disable (hardwired function)" "0,1,2,3" bitfld.long 0x5C 23.--24. " T1_T0 ,1 bit + 1 redundancy for TEST disable (hardwired function)" "0,1,2,3" tree.end tree "THSENS configuration register" width 12. group.long 0x8C4++0x03 line.long 0x00 "THSENS_CFG,THSENS configuration register for threshold and correction settings" bitfld.long 0x00 31. " TEMP_HI_OVERRIDE ,Override interrupt when temperature exceeds high threshold" "Not overridden,Overridden" hexmask.long.byte 0x00 24.--30. 1. " TEMP_HI_THRESHOLD ,High temperature threshold" textline " " bitfld.long 0x00 23. " TEMP_LO_OVERRIDE ,Override interrupt when temperature is lower than low threshold" "Not overridden,Overridden" hexmask.long.byte 0x00 16.--22. 1. " TEMP_LO_THRESHOLD ,Low temperature threshold" textline " " bitfld.long 0x00 13. " TEMP_PDN ,Powers down thermal sensor block" "Low,High" bitfld.long 0x00 8.--12. " TEMP_CORRECT ,Correction offset for temperature read from thermal sensor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 7. " TEMP_OWERFLOW ,Overflow bit" "Not overflowed,Overflowed" hexmask.long.byte 0x00 0.--6. 1. " TEMP_VALUE ,Temperature value read from thermal sensor" tree.end tree "A9SM Registers" width 17. group.long 0x900++0x03 line.long 0x00 "A9SM_CLUSTERID,A9SM ID register" bitfld.long 0x00 0.--3. " CLUSTERID ,ID for entire A9SM (Used for MultiSoc identification" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x904++0x03 line.long 0x00 "A9SM_STATUS,A9SM status register" bitfld.long 0x00 11. " PTMIDLENACK[1] ,Standby mode acknowledge for PTM CPU1" "Idle,Busy" bitfld.long 0x00 10. " PTMIDLENACK[0] ,Standby mode acknowledge for PTM CPU0" "Idle,Busy" textline " " bitfld.long 0x00 9. " SMPNAMP[1] ,Indicates if a CPU1 is in SMP(1)/AMP(0) mode" "AMP,SMP" bitfld.long 0x00 8. " SMPNAMP[0] ,Indicates if a CPU0 is in SMP(1)/AMP(0) mode" "AMP,SMP" textline " " bitfld.long 0x00 7. " STANDBYWFI[1] ,Indicates that CPU1 is in Standby mode" "No standby,Standby" bitfld.long 0x00 6. " STANDBYWFI[0] ,Indicates that CPU0 is in Standby mode" "No standby,Standby" textline " " bitfld.long 0x00 5. " STANDBYWFE[1] ,Indicates if a CPU1 is in WFE state" "Not WFE,WFE" bitfld.long 0x00 4. " STANDBYWFE[0] ,Indicates if a CPU0 is in WFE state" "Not WFE,WFE" textline " " bitfld.long 0x00 3. " DBGCPUDONE[1] ,Indicates that the CPU1 has executed a DSB" "Not executed,Executed" bitfld.long 0x00 2. " DBGCPUDONE[0] ,Indicates that the CPU0 has executed a DSB" "Not executed,Executed" textline " " bitfld.long 0x00 1. " DBGACK[1] ,Indicates that the CPU1 is in DEBUG state" "Not debug,Debug" bitfld.long 0x00 0. " DBGACK[0] ,Indicates that the CPU0 is in DEBUG state" "Not debug,Debug" group.long 0x908++0x0B line.long 0x00 "A9SM_DEBUG,A9SM debug register" bitfld.long 0x00 5.--6. " EDBGRQ ,Put the corresponding CPU is in DEBUG state" "0,1,2,3" bitfld.long 0x00 4. " DEVICEEN ,APBDBGSYS access port" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SPNIDEN ,Privileged Non-Invasive Debug Enable" "Low,High" bitfld.long 0x00 2. " NIDEN ,Non-Invasive Debug Enable (i.e. trace)" "Low,High" textline " " bitfld.long 0x00 1. " SPIDEN ,Secure Privileged Invasive Debug Enable" "Low,High" bitfld.long 0x00 0. " DBGEN ,Enables invasive debug (i.e. JTAG)" "Low,High" line.long 0x04 "A9SM_FILTER,A9SM address filtering register" bitfld.long 0x04 31. " FILTEREN ,Enables AXI M1 address filtering" "Disabled,Enabled" hexmask.long.word 0x04 16.--27. 1. " FILTERSTART ,Start address filtering" textline " " hexmask.long.word 0x04 0.--11. 1. " FILTEREND ,End address filtering" line.long 0x08 "A9SM_PARITY_CFG,A9SM parity errors configuration register" bitfld.long 0x08 3. " L2_RST ,Cause reset of A9SM_PARITY_ERR[25:24]" "No effect,Reset" bitfld.long 0x08 2. " CPU_RST ,Cause reset of A9SM_PARITY_ERR[17:0]" "No effect,Reset" textline " " bitfld.long 0x08 1. " L2_CFG ,L2 parity errors" "Recoverable - IRQ,Non recoverable - Reset" bitfld.long 0x08 0. " CPU_CFG ,Parity errors" "Recoverable - IRQ,Non recoverable - Reset" rgroup.long 0x914++0x03 line.long 0x00 "A9SM_PARITY_ERR,A9SM parity errors status register" bitfld.long 0x00 25. " PARITYL2[1] ,L2 Parity error on Data (25) ram" "No error,Error" bitfld.long 0x00 24. " PARITYL2[0] ,L2 Parity error on Tag (24)" "No error,Error" textline " " bitfld.long 0x00 17. " PARITYSCU[1] ,SCU parity error on CPU1 (17)" "No error,Error" bitfld.long 0x00 16. " PARITYSCU[0] ,SCU parity error on CPU0 (16)" "No error,Error" textline " " bitfld.long 0x00 15. " PARITYFAIL1[7] ,Parity fail on CPU1 - BTAC" "No error,Error" bitfld.long 0x00 14. " PARITYFAIL1[6] ,Parity fail on CPU1 - GHB" "No error,Error" textline " " bitfld.long 0x00 13. " PARITYFAIL1[5] ,Parity fail on CPU1 - Instruction tag RAM" "No error,Error" bitfld.long 0x00 12. " PARITYFAIL1[4] ,Parity fail on CPU1 - Instruction data RAM" "No error,Error" textline " " bitfld.long 0x00 11. " PARITYFAIL1[3] ,Parity fail on CPU1 - Main TLB" "No error,Error" bitfld.long 0x00 10. " PARITYFAIL1[2] ,Parity fail on CPU1 - D outer RAM" "No error,Error" textline " " bitfld.long 0x00 9. " PARITYFAIL1[1] ,Parity fail on CPU1 - Data tag RAM" "No error,Error" bitfld.long 0x00 8. " PARITYFAIL1[0] ,Parity fail on CPU1 - Data data RAM" "No error,Error" textline " " bitfld.long 0x00 7. " PARITYFAIL0[7] ,Parity fail on CPU0 - BTAC" "No error,Error" bitfld.long 0x00 6. " PARITYFAIL0[6] ,Parity fail on CPU0 - GHB" "No error,Error" textline " " bitfld.long 0x00 5. " PARITYFAIL0[5] ,Parity fail on CPU0 - Instruction tag RAM" "No error,Error" bitfld.long 0x00 4. " PARITYFAIL0[4] ,Parity fail on CPU0 - Instruction data RAM" "No error,Error" textline " " bitfld.long 0x00 3. " PARITYFAIL0[3] ,Parity fail on CPU0 - Main TLB" "No error,Error" bitfld.long 0x00 2. " PARITYFAIL0[2] ,Parity fail on CPU0 - D outer RAM" "No error,Error" textline " " bitfld.long 0x00 1. " PARITYFAIL0[1] ,Parity fail on CPU0 - Data tag RAM" "No error,Error" bitfld.long 0x00 0. " PARITYFAIL0[0] ,Parity fail on CPU0 - Data data RAM" "No error,Error" tree.end tree "DIE ID Registers" width 10. rgroup.long 0xA00++0x03 line.long 0x00 "DIE_ID_1,DIE ID Data 1" rgroup.long 0xA04++0x03 line.long 0x00 "DIE_ID_2,DIE ID Data 2" rgroup.long 0xA08++0x03 line.long 0x00 "DIE_ID_3,DIE ID Data 3" rgroup.long 0xA0C++0x03 line.long 0x00 "DIE_ID_4,DIE ID Data 4" tree.end tree "Cache and User Info Registers" width 23. group.long 0xC00++0x2F line.long 0x0 "AXI_CACHE_USER_CTRL_0,Cache and User Info for PCIE0" bitfld.long 0x0 22.--24. " AWUSER ,AWUSER bus control for ACP connection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--19. " AWCACHE ,AWCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 4.--8. " ARUSER ,ARUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0 0.--3. " ARCACHE ,ARCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "AXI_CACHE_USER_CTRL_1,Cache and User Info for PCIE1" bitfld.long 0x4 22.--24. " AWUSER ,AWUSER bus control for ACP connection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16.--19. " AWCACHE ,AWCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 4.--8. " ARUSER ,ARUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4 0.--3. " ARCACHE ,ARCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8 "AXI_CACHE_USER_CTRL_2,Cache and User Info for PCIE2/SATA" bitfld.long 0x8 22.--24. " AWUSER ,AWUSER bus control for ACP connection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 16.--19. " AWCACHE ,AWCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x8 4.--8. " ARUSER ,ARUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x8 0.--3. " ARCACHE ,ARCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0xC "AXI_CACHE_USER_CTRL_3,Cache and User Info for GMAC" bitfld.long 0xC 22.--24. " AWUSER ,AWUSER bus control for ACP connection" "0,1,2,3,4,5,6,7" bitfld.long 0xC 16.--19. " AWCACHE ,AWCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0xC 4.--8. " ARUSER ,ARUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0xC 0.--3. " ARCACHE ,ARCACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "AHB_CACHE_USER_CTRL_0,Cache and User Info for DMAC0" bitfld.long 0x10 31. " IPN_MISC ,Hprot comes from the IP / enable full MISC controllability" "Hprot from the IP,MISC controllability" bitfld.long 0x10 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "AHB_CACHE_USER_CTRL_1,Cache and User Info for DMAC1" bitfld.long 0x14 31. " IPN_MISC ,Hprot comes from the IP / enable full MISC controllability" "Hprot from the IP,MISC controllability" bitfld.long 0x14 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x14 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "AHB_CACHE_USER_CTRL_2,Cache and User Info for UOC" bitfld.long 0x18 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "AHB_CACHE_USER_CTRL_3,Cache and User Info for UHC0" bitfld.long 0x1C 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "AHB_CACHE_USER_CTRL_4,Cache and User Info for UHC1" bitfld.long 0x20 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "AHB_CACHE_USER_CTRL_5,Cache and User Info for C3" bitfld.long 0x24 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "AHB_CACHE_USER_CTRL_6,Cache and User Info for MCIF" bitfld.long 0x28 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "AHB_CACHE_USER_CTRL_7,Cache and User Info for EXPI" bitfld.long 0x2C 4.--8. " AUSER ,AUSER bus control for ACP connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--3. " ACACHE ,ACACHE bus control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "MISC configuration register" width 12. hgroup.long 0x1000++0x07 hide.long 0x00 "MIPHY_TEST,MIPHY debug register" hide.long 0x04 "USB_TEST,USB debug register" group.long 0x1008++0x03 line.long 0x00 "MISC_CFG,MISC configuration register" bitfld.long 0x00 0. " READ_WAIT ,Wait state enabled on APB read operation" "Disabled,Enabled" tree.end width 0xB tree.end tree.open "GPT" tree "GPT 0" base ad:0xE0380000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree "GPT 1" base ad:0xE0400000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree "GPT 2" base ad:0xE0480000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree "GPT 3" base ad:0xE0500000 width 24. group.word 0x80++0x01 line.word 0x00 "TIMER_CONTROL1,Timer Control Register 1" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x80+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK1,Status and Interrupt Acknowledge Timer Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x80+0x08)++0x01 line.word 0x00 "TIMER_COMPARE1,Timer Compare Register 1" rgroup.word (0x80+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 1" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x80+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT1,Rising edge capture register of 1st timer" rgroup.word (0x80+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT1,Falling edge capture register of 1st timer" endif group.word 0x100++0x01 line.word 0x00 "TIMER_CONTROL2,Timer Control Register 2" bitfld.word 0x0 10. " REDGE_INT ,Rising edge interrupt enable" "Disabled,Enabled" bitfld.word 0x0 9. " FEDGE_INT ,Falling edge interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x0 8. " MATCH_INT ,Enables interruption when comparator matches" "Disabled,Enabled" bitfld.word 0x0 6.--7. " CAPTURE ,Capture mode" "No capture,Rising edge,Falling edge,Both edges" textline " " bitfld.word 0x0 5. " ENABLE ,Timer enable" "Disabled,Enabled" bitfld.word 0x0 4. " MODE ,Operation mode" "Auto-reload,Single-shot" textline " " bitfld.word 0x0 0.--3. " PRESCALER ,Prescaler configuration" "1,2,4,8,16,32,64,128,256,?..." group.word (0x100+0x04)++0x01 line.word 0x00 "TIMER_STATUS_INT_ACK2,Status and Interrupt Acknowledge Timer Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") bitfld.word 0x00 2. " REDGE ,Rising edge capture" "Not occurred,Occurred" bitfld.word 0x00 1. " FEDGE ,Falling edge capture" "Not occurred,Occurred" textline " " endif bitfld.word 0x00 0. " MATCH ,Match status" "Not occurred,Occurred" group.word (0x100+0x08)++0x01 line.word 0x00 "TIMER_COMPARE2,Timer Compare Register 2" rgroup.word (0x100+0x0c)++0x01 line.word 0x00 "TIMER_COUNT,Timer Count Register 2" sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S"||cpu()=="SPEAR1340") rgroup.word (0x100+0x10)++0x01 line.word 0x00 "TIMER_REDG_CAPT2,Rising edge capture register of 2st timer" rgroup.word (0x100+0x14)++0x01 line.word 0x00 "TIMER_FEDG_CAPT2,Falling edge capture register of 2st timer" endif width 0xb tree.end tree.end tree "RTC (Real-time clock)" base ad:0xE0580000 width 12. if (((d.l((ad:0xE0580000+0x00)))&0x300000)>0x100000) group.long 0x0++0x3 line.long 0x00 "TIME,RTC Time Register" bitfld.long 0x0 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x0 16.--19. ",Hour Units in BCD Format" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x0 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x0 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x0 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x0 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x0++0x3 line.long 0x00 "TIME,RTC Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." endif if ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x04)))&0x30)!=0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x100||0x300||0x500||0x700||0x800||0x400||0x600||0x900))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x04)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x100||0x300||0x500||0x700||0x800))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x04)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x400||0x600||0x900))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x04)))&0x30)!=0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x000||0x200||0x100))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x04)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x000||0x200))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x04)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x100))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x04)))&0x1000)==0x0000)&&(((d.l((ad:0xE0580000+0x04)))&0xF00)==(0x200))) group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x4++0x03 line.long 0x00 "DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." endif if (((d.l((ad:0xE0580000+0x08)))&0x300000)>0x100000) group.long 0x08++0x3 line.long 0x00 "ALARM_TIME,RTC Alarm Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0x08++0x3 line.long 0x00 "ALARM_TIME,RTC Alarm Time Register" bitfld.long 0x00 20.--21. " HOURS ,Hour Tens in BCD Format" "0,1,2,-" bitfld.long 0x00 16.--19. ",Hour Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12.--14. " MINUTES ,Minute Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 8.--11. ",Minute Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--6. " SECONDS ,Second Tens in BCD Format" "0,1,2,3,4,5,-,-" bitfld.long 0x00 0.--3. ",Second Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." endif if ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)!=0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x100||0x300||0x500||0x700||0x800||0x400||0x600||0x900))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x100||0x300||0x500||0x700||0x800))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x00)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x400||0x600||0x900))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)!=0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x000||0x200||0x100))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x000||0x200))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x1000)&&(((d.l((ad:0xE0580000+0x0c)))&0x30)==0x30)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x100))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,-,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.l((ad:0xE0580000+0x0c)))&0x1000)==0x0000)&&(((d.l((ad:0xE0580000+0x0c)))&0xF00)==(0x200))) group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,-" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.long 0xc++0x03 line.long 0x00 "ALARM_DATE,RTC Date Register" bitfld.long 0x00 28.--31. " YEARS ,Year millenniums in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 24.--27. ",Year hundreds in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 20.--23. ",Year Tens in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." bitfld.long 0x00 16.--19. ",Year Units in BCD Format" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." textline " " bitfld.long 0x00 12. " MONTHS ,Month Tens in BCD Format" "0,1" bitfld.long 0x00 8.--11. ",Month Units in BCD Format" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." textline " " bitfld.long 0x00 4.--5. " DAYS ,Day tens in BCD Format" "0,1,2,3" bitfld.long 0x00 0.--3. ",Day Units in BCD Format" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." endif group.long 0x10++0x03 line.long 0x00 "CONTROL,RTC Control Register" bitfld.long 0x00 31. " IE ,Interrupt event enable" "Disabled,Enabled" bitfld.long 0x00 9. " TB ,Time bypass" "Normal,Bypass" bitfld.long 0x00 8. " PB ,Prescaler bypass" "Normal,Bypass" textline " " bitfld.long 0x00 5. " MASK[5] ,Year's mask bit" "Not masked,Masked" bitfld.long 0x00 4. " MASK[4] ,Month's mask bit" "Not masked,Masked" bitfld.long 0x00 3. " MASK[3] ,Day's mask bit" "Not masked,Masked" textline " " bitfld.long 0x00 2. " MASK[2] ,Hour's mask bit" "Not masked,Masked" bitfld.long 0x00 1. " MASK[1] ,Minute's mask bit" "Not masked,Masked" bitfld.long 0x00 0. " MASK[0] ,Second's mask bit" "Not masked,Masked" group.long 0x14++0x3 line.long 0x00 "STATUS,RTC STATUS Register" bitfld.long 0x00 31. " I ,Interrupt status" "No interrupt,Interrupt" sif (cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") rbitfld.long 0x00 5. " LD ,Write to DATE register lost" "Not lost,Lost" rbitfld.long 0x00 4. " LT ,Write to TIME register lost" "Not lost,Lost" textline " " rbitfld.long 0x00 3. " PD ,Pending write to DATE register" "Not asserted,Asserted" rbitfld.long 0x00 2. " PT ,Pending write to TIME register" "Not asserted,Asserted" rbitfld.long 0x00 0. " RC ,Isolation of timer" "Isolated,Not isolated" else bitfld.long 0x00 5. " LD ,Write to DATE register lost" "Not lost,Lost" bitfld.long 0x00 4. " LT ,Write to TIME register lost" "Not lost,Lost" textline " " bitfld.long 0x00 3. " PD ,Pending write to DATE register" "Not asserted,Asserted" bitfld.long 0x00 2. " PT ,Pending write to TIME register" "Not asserted,Asserted" bitfld.long 0x00 0. " RC ,Isolation of timer" "Isolated,Not isolated" endif sif (cpu()=="SPEAR300"||cpu()=="SPEAR310"||cpu()=="SPEAR320"||cpu()=="SPEAR320S") group.long 0x18++0x07 line.long 0x00 "REG1MC,General purpose register 1" line.long 0x04 "REG2MC,General purpose register 2" elif (cpu()=="SPEAR1340"||cpuis("SPEAR1310*")) group.long 0x18++0x3F line.long 0x0 "GP_REG_0,General purpose register 0" line.long 0x4 "GP_REG_1,General purpose register 1" line.long 0x8 "GP_REG_2,General purpose register 2" line.long 0xC "GP_REG_3,General purpose register 3" line.long 0x10 "GP_REG_4,General purpose register 4" line.long 0x14 "GP_REG_5,General purpose register 5" line.long 0x18 "GP_REG_6,General purpose register 6" line.long 0x1C "GP_REG_7,General purpose register 7" line.long 0x20 "GP_REG_8,General purpose register 8" line.long 0x24 "GP_REG_9,General purpose register 9" line.long 0x28 "GP_REG_10,General purpose register 10" line.long 0x2C "GP_REG_11,General purpose register 11" line.long 0x30 "GP_REG_12,General purpose register 12" line.long 0x34 "GP_REG_13,General purpose register 13" line.long 0x38 "GP_REG_14,General purpose register 14" line.long 0x3C "GP_REG_15,General purpose register 15" endif width 0x0b tree.end tree.open "DMAC (Direct memory accesss controllers)" tree "Channel 0" base ad:0xEB000000 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR0, Channel 0 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR0, Channel 0 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP0, Channel 0 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL0, Channel 0 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG0, Channel 0 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR0, Channel 0 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR0, Channel 0 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 1" base ad:0xEB000058 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR1, Channel 1 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR1, Channel 1 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP1, Channel 1 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL1, Channel 1 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG1, Channel 1 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR1, Channel 1 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR1, Channel 1 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 2" base ad:0xEB0000B0 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR2, Channel 2 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR2, Channel 2 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP2, Channel 2 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL2, Channel 2 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG2, Channel 2 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR2, Channel 2 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR2, Channel 2 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 3" base ad:0xEB000108 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR3, Channel 3 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR3, Channel 3 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP3, Channel 3 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL3, Channel 3 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG3, Channel 3 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR3, Channel 3 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR3, Channel 3 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 4" base ad:0xEB000160 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR4, Channel 4 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR4, Channel 4 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP4, Channel 4 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL4, Channel 4 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG4, Channel 4 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR4, Channel 4 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR4, Channel 4 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 5" base ad:0xEB0001B8 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR5, Channel 5 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR5, Channel 5 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP5, Channel 5 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL5, Channel 5 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG5, Channel 5 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR5, Channel 5 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR5, Channel 5 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 6" base ad:0xEB000210 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR6, Channel 6 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR6, Channel 6 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP6, Channel 6 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL6, Channel 6 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG6, Channel 6 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR6, Channel 6 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR6, Channel 6 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "Channel 7" base ad:0xEB000268 width 7. group.quad 0x00++0x1F line.quad 0x00 "SAR7, Channel 7 source address" hexmask.quad.long 0x00 0.--31. 1. " SAR , Current Source Address of DMA transfer" line.quad 0x08 "DAR7, Channel 7 destination address" hexmask.quad.long 0x08 0.--31. 1. " DAR , Current destination address of DMA transfer" line.quad 0x10 "LLP7, Channel 7 linked list pointer" hexmask.quad.long 0x10 2.--31. 0x4 " LOC , Starting address in memory of next LLI if block chaining is enabled" bitfld.quad 0x10 0.--1. " LMS , List master select" "AHB master 1,AHB master 2,?..." line.quad 0x18 "CTL7, Channel 7 control" hexmask.quad.word 0x18 32.--43. 1. " BLOCK_TS , Block transfer size" bitfld.quad 0x18 28. " LLP_SRC_EN , Linked list pointer source enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 27. " LLP_DST_EN , Linked list pointer destination enable" "Disabled,Enabled" bitfld.quad 0x18 25.--26. " SMS , Source master select" "AHB master 1,AHB master 2,?..." textline " " bitfld.quad 0x18 23.--24. " DMS , Destination master select" "AHB master 1,AHB master 2,?..." bitfld.quad 0x18 20.--22. " TT_FC , Transfer type and flow control" "Memory to memory/DMAC,Memory to peripheral/DMAC,Peripheral to memory/DMAC,Peripheral to peripheral/DMAC,Peripheral to memory/Peripheral,Peripheral to peripheral/Source peripheral,Memory to peripheral/Peripheral,Peripheral to peripheral/Destination peripheral" textline " " bitfld.quad 0x18 18. " DST_SCATTER_EN , Destination scatter enable" "Disabled,Enabled" bitfld.quad 0x18 17. " SRC_GATHER_EN , Source gather enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 14.--16. " SRC_MSIZE , Source transaction burst length" "1,4,8,16,32,64,128,256" bitfld.quad 0x18 11.--13. " DEST_MSIZE , Destination transaction burst length" "1,4,8,16,32,64,128,256" textline " " bitfld.quad 0x18 9.--10. " SINC , Source address direction control" "Increment,Decrement,No change,No change" bitfld.quad 0x18 7.--8. " DINC , Destination address direction control" "Increment,Decrement,No change,No change" textline " " bitfld.quad 0x18 4.--6. " SRC_TR_WIDTH , Source transfer width (bits)" "8,16,32,64,?..." bitfld.quad 0x18 1.--3. " DST_TR_WIDTH , Destination transfer width (bits)" "8,16,32,64,?..." textline " " bitfld.quad 0x18 0. " INT_EN , Interrupt enable" "Disabled,Enabled" group.quad 0x40++0x17 line.quad 0x00 "CFG7, Channel 7 configuration" bitfld.quad 0x00 43.--46. " DST_PER , Destination hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x00 39.--42. " SRC_PER , Source hardware handshaking interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x00 34.--36. " PROTCTL , Protection control" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 33. " FIFO_MODE , FIFO mode control" "Full FIFO,Half FIFO" textline " " bitfld.quad 0x00 32. " FCMODE , Flow control mode" "Serviced,Not serviced" bitfld.quad 0x00 31. " RELOAD_DST , Automatic destination reload" "Not reloaded,Reloaded" textline " " bitfld.quad 0x00 30. " RELOAD_SRC , Automatic source reload" "Not reloaded,Reloaded" bitfld.quad 0x00 19. " SRC_HS_POL , Source handshake interface polarity" "High,Low" textline " " bitfld.quad 0x00 18. " DST_HS_POL , Destination handshake interface polarity" "High,Low" bitfld.quad 0x00 11. " HS_SEL_SRC , Source handshake select" "Hardware,Software" textline " " bitfld.quad 0x00 10. " HS_SEL_DST , Destination handshake select" "Hardware,Software" bitfld.quad 0x00 9. " FIFO_EMPTY , Channel 0 FIFO empty status" "Not empty,Empty" textline " " bitfld.quad 0x00 8. " CH_SUSP , Channel suspend" "Not suspended,Suspended" bitfld.quad 0x00 5.--7. " CH_PRIOR , Channel priority" "0,1,2,3,4,5,6,7" line.quad 0x08 "SGR7, Channel 7 source gather register" hexmask.quad.word 0x08 20.--31. 1. " SGC , Source gather count" hexmask.quad.tbyte 0x08 0.--19. 1. " SGI , Source gather interval" line.quad 0x10 "DSR7, Channel 7 destination scatter register" hexmask.quad.word 0x10 20.--31. 1. " DSC , Destination scatter count" hexmask.quad.tbyte 0x10 0.--19. 1. " DSI , Destination scatter interval" width 0x0B tree.end tree "DMAC MISC" base ad:0xEB0002C0 tree "Interrupt registers" width 15. group.quad 0x28++0x07 line.quad 0x00 "INTTFR, IntTfr interrupt" setclrfld.quad 0x00 7. -0x28 7. 0x50 7. " INTTFR , Status for IntTfr interrupt" "0,1" setclrfld.quad 0x00 6. -0x28 6. 0x50 6. " INTTFR , Status for IntTfr interrupt" "0,1" textline " " setclrfld.quad 0x00 5. -0x28 5. 0x50 5. " INTTFR , Status for IntTfr interrupt" "0,1" setclrfld.quad 0x00 4. -0x28 4. 0x50 4. " INTTFR , Status for IntTfr interrupt" "0,1" textline " " setclrfld.quad 0x00 3. -0x28 3. 0x50 3. " INTTFR , Status for IntTfr interrupt" "0,1" setclrfld.quad 0x00 2. -0x28 2. 0x50 2. " INTTFR , Status for IntTfr interrupt" "0,1" textline " " setclrfld.quad 0x00 1. -0x28 1. 0x50 1. " INTTFR , Status for IntTfr interrupt" "0,1" setclrfld.quad 0x00 0. -0x28 0. 0x50 0. " INTTFR , Status for IntTfr interrupt" "0,1" group.quad 0x30++0x07 line.quad 0x00 "INTBLOCK, IntBlock interrupt" setclrfld.quad 0x00 7. -0x28 7. 0x50 7. " INTBLOCK , Status for IntBlock interrupt" "0,1" setclrfld.quad 0x00 6. -0x28 6. 0x50 6. " INTBLOCK , Status for IntBlock interrupt" "0,1" textline " " setclrfld.quad 0x00 5. -0x28 5. 0x50 5. " INTBLOCK , Status for IntBlock interrupt" "0,1" setclrfld.quad 0x00 4. -0x28 4. 0x50 4. " INTBLOCK , Status for IntBlock interrupt" "0,1" textline " " setclrfld.quad 0x00 3. -0x28 3. 0x50 3. " INTBLOCK , Status for IntBlock interrupt" "0,1" setclrfld.quad 0x00 2. -0x28 2. 0x50 2. " INTBLOCK , Status for IntBlock interrupt" "0,1" textline " " setclrfld.quad 0x00 1. -0x28 1. 0x50 1. " INTBLOCK , Status for IntBlock interrupt" "0,1" setclrfld.quad 0x00 0. -0x28 0. 0x50 0. " INTBLOCK , Status for IntBlock interrupt" "0,1" group.quad 0x38++0x07 line.quad 0x00 "INTSRCTRAN, IntSrcTran interrupt" setclrfld.quad 0x00 7. -0x28 7. 0x50 7. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" setclrfld.quad 0x00 6. -0x28 6. 0x50 6. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" textline " " setclrfld.quad 0x00 5. -0x28 5. 0x50 5. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" setclrfld.quad 0x00 4. -0x28 4. 0x50 4. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" textline " " setclrfld.quad 0x00 3. -0x28 3. 0x50 3. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" setclrfld.quad 0x00 2. -0x28 2. 0x50 2. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" textline " " setclrfld.quad 0x00 1. -0x28 1. 0x50 1. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" setclrfld.quad 0x00 0. -0x28 0. 0x50 0. " INTSRCTRAN , Status for IntSrcTran interrupt" "0,1" group.quad 0x40++0x07 line.quad 0x00 "INTDSTTRAN, IntDstTran interrupt" setclrfld.quad 0x00 7. -0x28 7. 0x50 7. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" setclrfld.quad 0x00 6. -0x28 6. 0x50 6. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" textline " " setclrfld.quad 0x00 5. -0x28 5. 0x50 5. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" setclrfld.quad 0x00 4. -0x28 4. 0x50 4. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" textline " " setclrfld.quad 0x00 3. -0x28 3. 0x50 3. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" setclrfld.quad 0x00 2. -0x28 2. 0x50 2. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" textline " " setclrfld.quad 0x00 1. -0x28 1. 0x50 1. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" setclrfld.quad 0x00 0. -0x28 0. 0x50 0. " INTDSTTRAN , Status for IntDstTran interrupt" "0,1" group.quad 0x48++0x07 line.quad 0x00 "INTERR, IntErr interrupt" setclrfld.quad 0x00 7. -0x28 7. 0x50 7. " INTERR , Status for IntErr interrupt" "0,1" setclrfld.quad 0x00 6. -0x28 6. 0x50 6. " INTERR , Status for IntErr interrupt" "0,1" textline " " setclrfld.quad 0x00 5. -0x28 5. 0x50 5. " INTERR , Status for IntErr interrupt" "0,1" setclrfld.quad 0x00 4. -0x28 4. 0x50 4. " INTERR , Status for IntErr interrupt" "0,1" textline " " setclrfld.quad 0x00 3. -0x28 3. 0x50 3. " INTERR , Status for IntErr interrupt" "0,1" setclrfld.quad 0x00 2. -0x28 2. 0x50 2. " INTERR , Status for IntErr interrupt" "0,1" textline " " setclrfld.quad 0x00 1. -0x28 1. 0x50 1. " INTERR , Status for IntErr interrupt" "0,1" setclrfld.quad 0x00 0. -0x28 0. 0x50 0. " INTERR , Status for IntErr interrupt" "0,1" group.quad 0x50++0x27 line.quad 0x00 "MASKTFR, Mask for IntTfr interrupt" bitfld.quad 0x00 15. " MASK_WE[7] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " MASK_WE[6] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 13. " MASK_WE[5] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " MASK_WE[4] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " MASK_WE[3] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " MASK_WE[2] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 9. " MASK_WE[1] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " MASK_WE[0] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " MASK[7] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x00 6. " MASK[6] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x00 5. " MASK[5] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x00 4. " MASK[4] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x00 3. " MASK[3] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x00 2. " MASK[2] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x00 1. " MASK[1] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x00 0. " MASK[0] , Interrupt mask" "Masked,Unmasked" line.quad 0x08 "MASKBLOCK, Mask for IntBlock interrupt" bitfld.quad 0x08 15. " MASK_WE[7] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x08 14. " MASK_WE[6] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 13. " MASK_WE[5] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x08 12. " MASK_WE[4] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 11. " MASK_WE[3] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x08 10. " MASK_WE[2] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 9. " MASK_WE[1] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x08 8. " MASK_WE[0] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 7. " MASK[7] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x08 6. " MASK[6] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x08 5. " MASK[5] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x08 4. " MASK[4] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x08 3. " MASK[3] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x08 2. " MASK[2] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x08 1. " MASK[1] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x08 0. " MASK[0] , Interrupt mask" "Masked,Unmasked" line.quad 0x10 "MASKSRCTRAN, Mask for IntSrcTran interrupt" bitfld.quad 0x10 15. " MASK_WE[7] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x10 14. " MASK_WE[6] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 13. " MASK_WE[5] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x10 12. " MASK_WE[4] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 11. " MASK_WE[3] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x10 10. " MASK_WE[2] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 9. " MASK_WE[1] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x10 8. " MASK_WE[0] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 7. " MASK[7] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x10 6. " MASK[6] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x10 5. " MASK[5] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x10 4. " MASK[4] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x10 3. " MASK[3] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x10 2. " MASK[2] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x10 1. " MASK[1] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x10 0. " MASK[0] , Interrupt mask" "Masked,Unmasked" line.quad 0x18 "MASKDSTTRAN, Mask for IntDstTran interrupt" bitfld.quad 0x18 15. " MASK_WE[7] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x18 14. " MASK_WE[6] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 13. " MASK_WE[5] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x18 12. " MASK_WE[4] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 11. " MASK_WE[3] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x18 10. " MASK_WE[2] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 9. " MASK_WE[1] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x18 8. " MASK_WE[0] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 7. " MASK[7] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x18 6. " MASK[6] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x18 5. " MASK[5] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x18 4. " MASK[4] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x18 3. " MASK[3] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x18 2. " MASK[2] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x18 1. " MASK[1] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x18 0. " MASK[0] , Interrupt mask" "Masked,Unmasked" line.quad 0x20 "MASKERR, Mask for IntErr interrupt" bitfld.quad 0x20 15. " MASK_WE[7] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x20 14. " MASK_WE[6] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 13. " MASK_WE[5] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x20 12. " MASK_WE[4] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 11. " MASK_WE[3] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x20 10. " MASK_WE[2] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 9. " MASK_WE[1] , Interrupt mask write enable" "Disabled,Enabled" bitfld.quad 0x20 8. " MASK_WE[0] , Interrupt mask write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 7. " MASK[7] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x20 6. " MASK[6] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x20 5. " MASK[5] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x20 4. " MASK[4] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x20 3. " MASK[3] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x20 2. " MASK[2] , Interrupt mask" "Masked,Unmasked" textline " " bitfld.quad 0x20 1. " MASK[1] , Interrupt mask" "Masked,Unmasked" bitfld.quad 0x20 0. " MASK[0] , Interrupt mask" "Masked,Unmasked" rgroup.quad 0xA0++0x7 line.quad 0x00 "STATUSINT, Status for each interrupt type" bitfld.quad 0x00 4. " ERR , OR of the contents of StatusErr register" "0,1" bitfld.quad 0x00 3. " DSTT , OR of the contents of StatusDstTran register" "0,1" textline " " bitfld.quad 0x00 2. " SRCT , OR of the contents of StatusSrcTran register" "0,1" bitfld.quad 0x00 1. " BLOCK , OR of the contents of StatusBlock register" "0,1" textline " " bitfld.quad 0x00 0. " TFR , OR of the contents of StatusTfr register" "0,1" tree.end tree "Software handshake registers" width 14. base ad:0xEB000368 group.quad 0x00++0x2F line.quad 0x00 "REQSRCREG, Source software transaction request register" bitfld.quad 0x00 15. " SRC_REQ_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x00 14. " SRC_REQ_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 13. " SRC_REQ_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x00 12. " SRC_REQ_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 11. " SRC_REQ_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x00 10. " SRC_REQ_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 9. " SRC_REQ_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x00 8. " SRC_REQ_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x00 7. " SRC_REQ[7] , Source request" "No request,Request" bitfld.quad 0x00 6. " SRC_REQ[6] , Source request" "No request,Request" textline " " bitfld.quad 0x00 5. " SRC_REQ[5] , Source request" "No request,Request" bitfld.quad 0x00 4. " SRC_REQ[4] , Source request" "No request,Request" textline " " bitfld.quad 0x00 3. " SRC_REQ[3] , Source request" "No request,Request" bitfld.quad 0x00 2. " SRC_REQ[2] , Source request" "No request,Request" textline " " bitfld.quad 0x00 1. " SRC_REQ[1] , Source request" "No request,Request" bitfld.quad 0x00 0. " SRC_REQ[0] , Source request" "No request,Request" line.quad 0x08 "REQDSTREG, Destination software transaction request register" bitfld.quad 0x08 15. " DST_REQ_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x08 14. " DST_REQ_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 13. " DST_REQ_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x08 12. " DST_REQ_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 11. " DST_REQ_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x08 10. " DST_REQ_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 9. " DST_REQ_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x08 8. " DST_REQ_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 7. " DST_REQ[7] , Source request" "No request,Request" bitfld.quad 0x08 6. " DST_REQ[6] , Source request" "No request,Request" textline " " bitfld.quad 0x08 5. " DST_REQ[5] , Source request" "No request,Request" bitfld.quad 0x08 4. " DST_REQ[4] , Source request" "No request,Request" textline " " bitfld.quad 0x08 3. " DST_REQ[3] , Source request" "No request,Request" bitfld.quad 0x08 2. " DST_REQ[2] , Source request" "No request,Request" textline " " bitfld.quad 0x08 1. " DST_REQ[1] , Source request" "No request,Request" bitfld.quad 0x08 0. " DST_REQ[0] , Source request" "No request,Request" line.quad 0x10 "SGLREQSRCREG, Source single transaction request register" bitfld.quad 0x10 15. " SRC_SGLREQ_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x10 14. " SRC_SGLREQ_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 13. " SRC_SGLREQ_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x10 12. " SRC_SGLREQ_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 11. " SRC_SGLREQ_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x10 10. " SRC_SGLREQ_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 9. " SRC_SGLREQ_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x10 8. " SRC_SGLREQ_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x10 7. " SRC_SGLREQ[7] , Source request" "No request,Request" bitfld.quad 0x10 6. " SRC_SGLREQ[6] , Source request" "No request,Request" textline " " bitfld.quad 0x10 5. " SRC_SGLREQ[5] , Source request" "No request,Request" bitfld.quad 0x10 4. " SRC_SGLREQ[4] , Source request" "No request,Request" textline " " bitfld.quad 0x10 3. " SRC_SGLREQ[3] , Source request" "No request,Request" bitfld.quad 0x10 2. " SRC_SGLREQ[2] , Source request" "No request,Request" textline " " bitfld.quad 0x10 1. " SRC_SGLREQ[1] , Source request" "No request,Request" bitfld.quad 0x10 0. " SRC_SGLREQ[0] , Source request" "No request,Request" line.quad 0x18 "SGLREQDSTREG, Destination single transaction request register" bitfld.quad 0x18 15. " DST_SGLREQ_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x18 14. " DST_SGLREQ_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 13. " DST_SGLREQ_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x18 12. " DST_SGLREQ_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 11. " DST_SGLREQ_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x18 10. " DST_SGLREQ_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 9. " DST_SGLREQ_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x18 8. " DST_SGLREQ_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x18 7. " DST_SGLREQ[7] , Source request" "No request,Request" bitfld.quad 0x18 6. " DST_SGLREQ[6] , Source request" "No request,Request" textline " " bitfld.quad 0x18 5. " DST_SGLREQ[5] , Source request" "No request,Request" bitfld.quad 0x18 4. " DST_SGLREQ[4] , Source request" "No request,Request" textline " " bitfld.quad 0x18 3. " DST_SGLREQ[3] , Source request" "No request,Request" bitfld.quad 0x18 2. " DST_SGLREQ[2] , Source request" "No request,Request" textline " " bitfld.quad 0x18 1. " DST_SGLREQ[1] , Source request" "No request,Request" bitfld.quad 0x18 0. " DST_SGLREQ[0] , Source request" "No request,Request" line.quad 0x20 "LSTSRCREG, Source last transaction request register" bitfld.quad 0x20 15. " LSTSRC_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x20 14. " LSTSRC_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 13. " LSTSRC_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x20 12. " LSTSRC_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 11. " LSTSRC_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x20 10. " LSTSRC_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 9. " LSTSRC_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x20 8. " LSTSRC_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x20 7. " LSTSRC[7] , Source request" "No request,Request" bitfld.quad 0x20 6. " LSTSRC[6] , Source request" "No request,Request" textline " " bitfld.quad 0x20 5. " LSTSRC[5] , Source request" "No request,Request" bitfld.quad 0x20 4. " LSTSRC[4] , Source request" "No request,Request" textline " " bitfld.quad 0x20 3. " LSTSRC[3] , Source request" "No request,Request" bitfld.quad 0x20 2. " LSTSRC[2] , Source request" "No request,Request" textline " " bitfld.quad 0x20 1. " LSTSRC[1] , Source request" "No request,Request" bitfld.quad 0x20 0. " LSTSRC[0] , Source request" "No request,Request" line.quad 0x28 "LSTDSTREG, Destination last transaction request register" bitfld.quad 0x28 15. " LSTDST_WE[7] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x28 14. " LSTDST_WE[6] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x28 13. " LSTDST_WE[5] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x28 12. " LSTDST_WE[4] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x28 11. " LSTDST_WE[3] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x28 10. " LSTDST_WE[2] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x28 9. " LSTDST_WE[1] , Source request write enable" "Disabled,Enabled" bitfld.quad 0x28 8. " LSTDST_WE[0] , Source request write enable" "Disabled,Enabled" textline " " bitfld.quad 0x28 7. " LSTDST[7] , Source request" "No request,Request" bitfld.quad 0x28 6. " LSTDST[6] , Source request" "No request,Request" textline " " bitfld.quad 0x28 5. " LSTDST[5] , Source request" "No request,Request" bitfld.quad 0x28 4. " LSTDST[4] , Source request" "No request,Request" textline " " bitfld.quad 0x28 3. " LSTDST[3] , Source request" "No request,Request" bitfld.quad 0x28 2. " LSTDST[2] , Source request" "No request,Request" textline " " bitfld.quad 0x28 1. " LSTDST[1] , Source request" "No request,Request" bitfld.quad 0x28 0. " LSTDST[0] , Source request" "No request,Request" tree.end tree "Miscellaneous registers" width 19. base ad:0xEB000398 group.quad 0x00++0x0F line.quad 0x00 "DMACFGREG, DMA configuration register" bitfld.quad 0x00 0. " DAM_EN , DMA configuration register" "Disabled,Enabled" line.quad 0x08 "CHENREG, Channel enable register" bitfld.quad 0x08 15. " CH_EN_WE[7] , Channel enable write enable" "Disabled,Enabled" bitfld.quad 0x08 14. " CH_EN_WE[6] , Channel enable write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 13. " CH_EN_WE[5] , Channel enable write enable" "Disabled,Enabled" bitfld.quad 0x08 12. " CH_EN_WE[4] , Channel enable write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 11. " CH_EN_WE[3] , Channel enable write enable" "Disabled,Enabled" bitfld.quad 0x08 10. " CH_EN_WE[2] , Channel enable write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 9. " CH_EN_WE[1] , Channel enable write enable" "Disabled,Enabled" bitfld.quad 0x08 8. " CH_EN_WE[0] , Channel enable write enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 7. " CH_EN[7] , Channel enable" "Disabled,Enabled" bitfld.quad 0x08 6. " CH_EN[6] , Channel enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 5. " CH_EN[5] , Channel enable" "Disabled,Enabled" bitfld.quad 0x08 4. " CH_EN[4] , Channel enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 3. " CH_EN[3] , Channel enable" "Disabled,Enabled" bitfld.quad 0x08 2. " CH_EN[2] , Channel enable" "Disabled,Enabled" textline " " bitfld.quad 0x08 1. " CH_EN[1] , Channel enable" "Disabled,Enabled" bitfld.quad 0x08 0. " CH_EN[0] , Channel enable" "Disabled,Enabled" rgroup.quad 0x10++0x07 line.quad 0x00 "DMAIDREG, DMA ID register" hexmask.quad.long 0x00 0.--31. 1. " DMAH_ID_NUM , Hardcoded DMAC peripheral ID" group.quad 0x18++0x07 line.quad 0x00 "DMATESTREG, DMA test register" bitfld.quad 0x00 0. " TEST_SLV_IF , AHB slave interface test mode" "Normal,Test" rgroup.quad 0x30++0x37 line.quad 0x00 "DMA_COMP_PARAMS_6, Component parameters registers" bitfld.quad 0x00 60.--62. " CH7_FIFO_DEPTH , DMAH_CH7_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 57.--59. " CH7_SMS , DMAH_CH7_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x00 54.--56. " CH7_LMS , DMAH_CH7_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 51.--53. " CH7_DMS , DMAH_CH7_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x00 48.--50. " CH7_MAX_MULT_SIZE , DMAH_CH7_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 46.--47. " CH7_FC , DMAH_CH7_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x00 45. " CH7_HC_LLP , DMAH_CH7_HC_LLP parameter" "0,1" bitfld.quad 0x00 44. " CH7_CTL_WB_EN , DMAH_CH7_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x00 43. " CH7_MULTI_BLK_EN , DMAH_CH7_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x00 42. " CH7_LOCK_EN , DMAH_CH7_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x00 41. " CH7_SRC_GAT_EN , DMAH_CH7_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x00 40. " CH7_DST_SCA_EN , DMAH_CH7_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x00 39. " CH7_STAT_SRC , DMAH_CH7_STAT_SRC parameter" "0,1" bitfld.quad 0x00 38. " CH7_STAT_DST , DMAH_CH7_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x00 35.--37. " CH7_STW , DMAH_CH7_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x00 32.--34. " CH7_DTW , DMAH_CH7_DTW parameter" "0,1,2,3,4,5,6,7" line.quad 0x08 "DMA_COMP_PARAMS_5, Component parameters registers" bitfld.quad 0x08 60.--62. " CH5_FIFO_DEPTH , DMAH_CH5_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 57.--59. " CH5_SMS , DMAH_CH5_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 54.--56. " CH5_LMS , DMAH_CH5_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 51.--53. " CH5_DMS , DMAH_CH5_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 48.--50. " CH5_MAX_MULT_SIZE , DMAH_CH5_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 46.--47. " CH5_FC , DMAH_CH5_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x08 45. " CH5_HC_LLP , DMAH_CH5_HC_LLP parameter" "0,1" bitfld.quad 0x08 44. " CH5_CTL_WB_EN , DMAH_CH5_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x08 43. " CH5_MULTI_BLK_EN , DMAH_CH5_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x08 42. " CH5_LOCK_EN , DMAH_CH5_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x08 41. " CH5_SRC_GAT_EN , DMAH_CH5_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x08 40. " CH5_DST_SCA_EN , DMAH_CH5_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x08 39. " CH5_STAT_SRC , DMAH_CH5_STAT_SRC parameter" "0,1" bitfld.quad 0x08 38. " CH5_STAT_DST , DMAH_CH5_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x08 35.--37. " CH5_STW , DMAH_CH5_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 32.--34. " CH5_DTW , DMAH_CH5_DTW parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 28.--30. " CH6_FIFO_DEPTH , DMAH_CH6_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 25.--27. " CH6_SMS , DMAH_CH6_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 22.--24. " CH6_LMS , DMAH_CH6_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 19.--21. " CH6_DMS , DMAH_CH6_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x08 16.--18. " CH6_MAX_MULT_SIZE , DMAH_CH6_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 14.--15. " CH6_FC , DMAH_CH6_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x08 13. " CH6_HC_LLP , DMAH_CH6_HC_LLP parameter" "0,1" bitfld.quad 0x08 12. " CH6_CTL_WB_EN , DMAH_CH6_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x08 11. " CH6_MULTI_BLK_EN , DMAH_CH6_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x08 10. " CH6_LOCK_EN , DMAH_CH6_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x08 9. " CH6_SRC_GAT_EN , DMAH_CH6_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x08 8. " CH6_DST_SCA_EN , DMAH_CH6_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x08 7. " CH6_STAT_SRC , DMAH_CH6_STAT_SRC parameter" "0,1" bitfld.quad 0x08 6. " CH6_STAT_DST , DMAH_CH6_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x08 3.--5. " CH6_STW , DMAH_CH6_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x08 0.--2. " CH6_DTW , DMAH_CH6_DTW parameter" "0,1,2,3,4,5,6,7" line.quad 0x10 "DMA_COMP_PARAMS_4, Component parameters registers" bitfld.quad 0x10 60.--62. " CH3_FIFO_DEPTH , DMAH_CH3_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 57.--59. " CH3_SMS , DMAH_CH3_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x10 54.--56. " CH3_LMS , DMAH_CH3_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 51.--53. " CH3_DMS , DMAH_CH3_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x10 48.--50. " CH3_MAX_MULT_SIZE , DMAH_CH3_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 46.--47. " CH3_FC , DMAH_CH3_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x10 45. " CH3_HC_LLP , DMAH_CH3_HC_LLP parameter" "0,1" bitfld.quad 0x10 44. " CH3_CTL_WB_EN , DMAH_CH3_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x10 43. " CH3_MULTI_BLK_EN , DMAH_CH3_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x10 42. " CH3_LOCK_EN , DMAH_CH3_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x10 41. " CH3_SRC_GAT_EN , DMAH_CH3_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x10 40. " CH3_DST_SCA_EN , DMAH_CH3_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x10 39. " CH3_STAT_SRC , DMAH_CH3_STAT_SRC parameter" "0,1" bitfld.quad 0x10 38. " CH3_STAT_DST , DMAH_CH3_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x10 35.--37. " CH3_STW , DMAH_CH3_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 32.--34. " CH3_DTW , DMAH_CH3_DTW parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x10 28.--30. " CH4_FIFO_DEPTH , DMAH_CH4_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 25.--27. " CH4_SMS , DMAH_CH4_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x10 22.--24. " CH4_LMS , DMAH_CH4_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 19.--21. " CH4_DMS , DMAH_CH4_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x10 16.--18. " CH4_MAX_MULT_SIZE , DMAH_CH4_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 14.--15. " CH4_FC , DMAH_CH4_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x10 13. " CH4_HC_LLP , DMAH_CH4_HC_LLP parameter" "0,1" bitfld.quad 0x10 12. " CH4_CTL_WB_EN , DMAH_CH4_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x10 11. " CH4_MULTI_BLK_EN , DMAH_CH4_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x10 10. " CH4_LOCK_EN , DMAH_CH4_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x10 9. " CH4_SRC_GAT_EN , DMAH_CH4_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x10 8. " CH4_DST_SCA_EN , DMAH_CH4_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x10 7. " CH4_STAT_SRC , DMAH_CH4_STAT_SRC parameter" "0,1" bitfld.quad 0x10 6. " CH4_STAT_DST , DMAH_CH4_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x10 3.--5. " CH4_STW , DMAH_CH4_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x10 0.--2. " CH4_DTW , DMAH_CH4_DTW parameter" "0,1,2,3,4,5,6,7" line.quad 0x18 "DMA_COMP_PARAMS_3, Component parameters registers" bitfld.quad 0x18 60.--62. " CH1_FIFO_DEPTH , DMAH_CH1_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 57.--59. " CH1_SMS , DMAH_CH1_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x18 54.--56. " CH1_LMS , DMAH_CH1_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 51.--53. " CH1_DMS , DMAH_CH1_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x18 48.--50. " CH1_MAX_MULT_SIZE , DMAH_CH1_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 46.--47. " CH1_FC , DMAH_CH1_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x18 45. " CH1_HC_LLP , DMAH_CH1_HC_LLP parameter" "0,1" bitfld.quad 0x18 44. " CH1_CTL_WB_EN , DMAH_CH1_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x18 43. " CH1_MULTI_BLK_EN , DMAH_CH1_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x18 42. " CH1_LOCK_EN , DMAH_CH1_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x18 41. " CH1_SRC_GAT_EN , DMAH_CH1_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x18 40. " CH1_DST_SCA_EN , DMAH_CH1_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x18 39. " CH1_STAT_SRC , DMAH_CH1_STAT_SRC parameter" "0,1" bitfld.quad 0x18 38. " CH1_STAT_DST , DMAH_CH1_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x18 35.--37. " CH1_STW , DMAH_CH1_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 32.--34. " CH1_DTW , DMAH_CH1_DTW parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x18 28.--30. " CH2_FIFO_DEPTH , DMAH_CH2_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 25.--27. " CH2_SMS , DMAH_CH2_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x18 22.--24. " CH2_LMS , DMAH_CH2_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 19.--21. " CH2_DMS , DMAH_CH2_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x18 16.--18. " CH2_MAX_MULT_SIZE , DMAH_CH2_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 14.--15. " CH2_FC , DMAH_CH2_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x18 13. " CH2_HC_LLP , DMAH_CH2_HC_LLP parameter" "0,1" bitfld.quad 0x18 12. " CH2_CTL_WB_EN , DMAH_CH2_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x18 11. " CH2_MULTI_BLK_EN , DMAH_CH2_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x18 10. " CH2_LOCK_EN , DMAH_CH2_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x18 9. " CH2_SRC_GAT_EN , DMAH_CH2_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x18 8. " CH2_DST_SCA_EN , DMAH_CH2_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x18 7. " CH2_STAT_SRC , DMAH_CH2_STAT_SRC parameter" "0,1" bitfld.quad 0x18 6. " CH2_STAT_DST , DMAH_CH2_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x18 3.--5. " CH2_STW , DMAH_CH2_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x18 0.--2. " CH2_DTW , DMAH_CH2_DTW parameter" "0,1,2,3,4,5,6,7" line.quad 0x20 "DMA_COMP_PARAMS_2, Component parameters registers" bitfld.quad 0x20 60.--63. " CH7_MULTI_BLK_TYPE , DMAH_CH7_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x20 56.--59. " CH6_MULTI_BLK_TYPE , DMAH_CH6_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x20 52.--55. " CH5_MULTI_BLK_TYPE , DMAH_CH5_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x20 48.--51. " CH4_MULTI_BLK_TYPE , DMAH_CH4_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x20 44.--47. " CH3_MULTI_BLK_TYPE , DMAH_CH3_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x20 40.--43. " CH2_MULTI_BLK_TYPE , DMAH_CH2_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x20 36.--39. " CH1_MULTI_BLK_TYPE , DMAH_CH1_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x20 32.--35. " CH0_MULTI_BLK_TYPE , DMAH_CH0_MULTI_BLK_TYPE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x20 28.--30. " CH0_FIFO_DEPTH , DMAH_CH0_FIFO_DEPTH parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x20 25.--27. " CH0_SMS , DMAH_CH0_SMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x20 22.--24. " CH0_LMS , DMAH_CH0_LMS parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x20 19.--21. " CH0_DMS , DMAH_CH0_DMS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x20 16.--18. " CH0_MAX_MULT_SIZE , DMAH_CH0_MAX_MULT_SIZE parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x20 14.--15. " CH0_FC , DMAH_CH0_FC parameter" "0,1,2,3" textline " " bitfld.quad 0x20 13. " CH0_HC_LLP , DMAH_CH0_HC_LLP parameter" "0,1" bitfld.quad 0x20 12. " CH0_CTL_WB_EN , DMAH_CH0_CTL_WB_EN parameter" "0,1" textline " " bitfld.quad 0x20 11. " CH0_MULTI_BLK_EN , DMAH_CH0_MULTI_BLK_EN parameter" "0,1" bitfld.quad 0x20 10. " CH0_LOCK_EN , DMAH_CH0_LOCK_EN parameter" "0,1" textline " " bitfld.quad 0x20 9. " CH0_SRC_GAT_EN , DMAH_CH0_SRC_GAT_EN parameter" "0,1" bitfld.quad 0x20 8. " CH0_DST_SCA_EN , DMAH_CH0_DST_SCA_EN parameter" "0,1" textline " " bitfld.quad 0x20 7. " CH0_STAT_SRC , DMAH_CH0_STAT_SRC parameter" "0,1" bitfld.quad 0x20 6. " CH0_STAT_DST , DMAH_CH0_STAT_DST parameter" "0,1" textline " " bitfld.quad 0x20 3.--5. " CH0_STW , DMAH_CH0_STW parameter" "0,1,2,3,4,5,6,7" bitfld.quad 0x20 0.--2. " CH0_DTW , DMAH_CH0_DTW parameter" "0,1,2,3,4,5,6,7" line.quad 0x28 "DMA_COMP_PARAMS_1, Component parameters registers" bitfld.quad 0x28 61. " STATIC_ENDIAN_SELECT , DMAH_STATIC_ENDIAN_SELECT parameter" "0,1" bitfld.quad 0x28 60. " ADD_ENCODED_PARAMS , DMAH_ADD_ENCODED_PARAMS parameter" "0,1" textline " " bitfld.quad 0x28 55.--59. " NUM_HS_INT , DMAH_NUM_HS_INT parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.quad 0x28 53.--54. " M4_HDATA_WIDTH , DMAH_M4_HDATA_WIDTH parameter" "0,1,2,3" textline " " bitfld.quad 0x28 51.--52. " M3_HDATA_WIDTH , DMAH_M3_HDATA_WIDTH parameter" "0,1,2,3" bitfld.quad 0x28 49.--50. " M2_HDATA_WIDTH , DMAH_M2_HDATA_WIDTH parameter" "0,1,2,3" textline " " bitfld.quad 0x28 47.--48. " M1_HDATA_WIDTH , DMAH_M1_HDATA_WIDTH parameter" "0,1,2,3" bitfld.quad 0x28 45.--46. " S_HDATA_WIDTH , DMAH_S_HDATA_WIDTH parameter" "0,1,2,3" textline " " bitfld.quad 0x28 43.--44. " NUM_MASTER_INT , DMAH_NUM_MASTER_INT parameter" "0,1,2,3" bitfld.quad 0x28 40.--42. " NUM_CHANNELS , DMAH_NUM_CHANNELS parameter" "0,1,2,3,4,5,6,7" textline " " bitfld.quad 0x28 35. " MAX_ABRST , DMAH_MAX_ABRST parameter" "0,1" bitfld.quad 0x28 33.--34. " INTR_IO , DMAH_INTR_IO parameter" "0,1,2,3" textline " " bitfld.quad 0x28 32. " BIG_ENDIAN , DMAH_BIG_ENDIAN parameter" "0,1" bitfld.quad 0x28 28.--31. " CH7_MAX_BLK_SIZE , DMAH_CH7_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x28 24.--27. " CH6_MAX_BLK_SIZE , DMAH_CH6_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x28 20.--23. " CH5_MAX_BLK_SIZE , DMAH_CH5_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x28 16.--19. " CH4_MAX_BLK_SIZE , DMAH_CH4_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x28 12.--15. " CH3_MAX_BLK_SIZE , DMAH_CH3_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x28 8.--11. " CH2_MAX_BLK_SIZE , DMAH_CH2_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.quad 0x28 4.--7. " CH1_MAX_BLK_SIZE , DMAH_CH1_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.quad 0x28 0.--3. " CH0_MAX_BLK_SIZE , DMAH_CH0_MAX_BLK_SIZE parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.quad 0x30 "DMACOMPID, DMA component ID register" hexmask.quad.long 0x30 32.--63. 1. " DMA_COMP_VERSION , DMA component version - see release notes" hexmask.quad.long 0x30 0.--31. 1. " DMA_COMP_TYPE , DMA component identifier - fixed at 0x44571110" tree.end width 0x0B tree.end tree.end tree "C3 (Cryptographic co-processor)" base ad:0xE1800000 width 15. group.long 0x00++0x03 line.long 0x00 "SYS_SCR, Status and control register" rbitfld.long 0x00 26.--27. " IDS1 , Status of Instruction Dispatcher ID1" "Not present,Error,Idle,Run" rbitfld.long 0x00 24.--25. " IDS0 , Status of Instruction Dispatcher ID0" "Not present,Error,Idle,Run" textline " " bitfld.long 0x00 21. " ISD1 , Interrupt States Instruction Dispatcher ID1" "No interrupt,Interrupt" bitfld.long 0x00 20. " ISD0 , Interrupt States Instruction Dispatcher ID0" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " ISA , The Interrupt Status of All Instruction Dispatchers" "No interrupt,Interrupt" bitfld.long 0x00 18. " CISR , If the Clear Interrupt Status on Read bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 16. " ARST , The whole C3 can be reset using this bit" "No reset,Reset" textline " " rbitfld.long 0x00 12.--13. " C6S , Channel 6 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 10.--11. " C5S , Channel 5 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 8.--9. " C4S , Channel 4 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 6.--7. " C3S , Channel 3 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 4.--5. " C2S , Channel 2 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 2.--3. " C1S , Channel 1 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 0.--1. " C0S , Channel 0 Status" "Not present,Error,Idle,Busy" rgroup.long 0x04++0x03 line.long 0x00 "SYS_STR, Channel status register" bitfld.long 0x00 12.--13. " C6S , Channel 6 Status" "Not present,Error,Idle,Busy" bitfld.long 0x00 10.--11. " C5S , Channel 5 Status" "Not present,Error,Idle,Busy" textline " " bitfld.long 0x00 8.--9. " C4S , Channel 4 Status" "Not present,Error,Idle,Busy" bitfld.long 0x00 6.--7. " C3S , Channel 3 Status" "Not present,Error,Idle,Busy" textline " " bitfld.long 0x00 4.--5. " C2S , Channel 2 Status" "Not present,Error,Idle,Busy" bitfld.long 0x00 2.--3. " C1S , Channel 1 Status" "Not present,Error,Idle,Busy" textline " " bitfld.long 0x00 0.--1. " C0S , Channel 0 Status" "Not present,Error,Idle,Busy" rgroup.long 0x3F0++0x03 line.long 0x00 "SYS_VER, Hardware version and revision" hexmask.long.byte 0x00 24.--31. 1. " HW_VER , This field contain the hardware version of the IP" hexmask.long.byte 0x00 16.--23. 1. " HW_REV , This field represent the RTL version" textline " " hexmask.long.word 0x00 0.--15. 1. " HW_SRV , This field represent the RTL sub-version" rgroup.long 0x3FC++0x03 line.long 0x00 "SYS_HWID, Hardware ID" rgroup.long 0x400++0x03 line.long 0x00 "HIF_MP, Memory page at address HIF_MPBAR+HIF_MP" button "HIF_MP" "d ad:0xE1800400--ad:0xE18005FF /long" rgroup.long 0x700++0x03 line.long 0x00 "HIF_MSIZE, Memory size in bytes" hexmask.long.word 0x00 2.--16. 1. " MSIZE , This field represents the size of the internal Memory in Bytes" wgroup.long 0x704++0x03 line.long 0x00 "HIF_MBAR, Memory Base Address Register" hexmask.long.word 0x00 16.--31. 1. " MBAR , 16-bit most significant part of internal Memory Base Address" group.long 0x708++0x0F line.long 0x00 "HIF_MCR, Memory Control Register" bitfld.long 0x00 17. " DAIR , Disable Auto Increment on Read" "No,Yes" bitfld.long 0x00 16. " DAIW , Disable Auto Increment on Write" "No,Yes" textline " " bitfld.long 0x00 0. " EMM , Enable Memory Mapping" "Disabled,Enabled" line.long 0x04 "HIF_MPBAR, Memory Page Base Address Register" hexmask.long.word 0x04 16.--31. 1. " MBAR , Base address value programmed inside the HIF_MBAR register" hexmask.long.byte 0x04 9.--15. 1. " PAGE , Internal memory page mapped inside the AHB memory space" line.long 0x08 "HIF_MAAR, Memory Access Address Register" hexmask.long.word 0x08 16.--31. 1. " MBAR , Base address value programmed inside the HIF_MBAR register" hexmask.long.word 0x08 2.--15. 0x4 " ADDRESS , Address of the internal memory location used" line.long 0x0C "HIF_MADR, Memory Access Data Register" wgroup.long 0x744++0x03 line.long 0x00 "HIF_NBAR, Byte Bucket Base Address Register" hexmask.long.word 0x00 16.--31. 1. " BB_BAR , Base Address of the Byte Bucket" group.long 0x744++0x03 line.long 0x00 "HIF_NCR, Byte Bucket Control register" bitfld.long 0x00 0. " ENM , Byte Bucket Enable" "Disabled,Enabled" group.long 0x1000++0x03 line.long 0x00 "ID0_SCR, Instruction Dispatcher #0 Status and Control Register" rbitfld.long 0x00 30.--31. " IDS , Indicate the state in which the addressed Instruction Dispatcher (ID) is" "Not present,Error,Idle,Run" rbitfld.long 0x00 29. " BERR , Bus error signal" "No error,Error" textline " " rbitfld.long 0x00 26. " CERR , Channel error signal" "No error,Error" rbitfld.long 0x00 25. " CBSY , Channel busy" "Not busy,Busy" textline " " rbitfld.long 0x00 24. " CDNX , Channel does not exist" "No error,Error" bitfld.long 0x00 23. " IS , Interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " IES , Interrupt enable on stop" "No interrupt,Interrupt" bitfld.long 0x00 21. " IER , Interrupt enable on error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " SSC , Single Step Clear" "Not cleared,Cleared" bitfld.long 0x00 19. " SSE , Single Step Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" textline " " rbitfld.long 0x00 12.--13. " C6S , Channel 6 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 10.--11. " C5S , Channel 5 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 8.--9. " C4S , Channel 4 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 6.--7. " C3S , Channel 3 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 4.--5. " C2S , Channel 2 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 2.--3. " C1S , Channel 1 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 0.--1. " C0S , Channel 0 Status" "Not present,Error,Idle,Busy" group.long 0x1010++0x03 line.long 0x00 "ID0_IP, Instruction Dispatcher #0 Instruction Pointer Register" rgroup.long 0x1020++0x0F line.long 0x00 "ID0_IR0, Instruction Dispatcher #0 Instruction Word 0 Register" line.long 0x04 "ID0_IR1, Instruction Dispatcher #0 Instruction Word 1 Register" line.long 0x08 "ID0_IR2, Instruction Dispatcher #0 Instruction Word 2 Register" line.long 0x0C "ID0_IR3, Instruction Dispatcher #0 Instruction Word 3 Register" group.long 0x1400++0x03 line.long 0x00 "ID1_SCR, Instruction Dispatcher #1 Status and Control Register" rbitfld.long 0x00 30.--31. " IDS , Indicate the state in which the addressed Instruction Dispatcher (ID) is" "Not present,Error,Idle,Run" rbitfld.long 0x00 29. " BERR , Bus error signal" "No error,Error" textline " " rbitfld.long 0x00 26. " CERR , Channel error signal" "No error,Error" rbitfld.long 0x00 25. " CBSY , Channel busy" "Not busy,Busy" textline " " rbitfld.long 0x00 24. " CDNX , Channel does not exist" "No error,Error" bitfld.long 0x00 23. " IS , Interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 22. " IES , Interrupt enable on stop" "No interrupt,Interrupt" bitfld.long 0x00 21. " IER , Interrupt enable on error" "No interrupt,Interrupt" textline " " bitfld.long 0x00 20. " SSC , Single Step Clear" "Not cleared,Cleared" bitfld.long 0x00 19. " SSE , Single Step Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" textline " " rbitfld.long 0x00 12.--13. " C6S , Channel 6 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 10.--11. " C5S , Channel 5 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 8.--9. " C4S , Channel 4 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 6.--7. " C3S , Channel 3 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 4.--5. " C2S , Channel 2 Status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 2.--3. " C1S , Channel 1 Status" "Not present,Error,Idle,Busy" textline " " rbitfld.long 0x00 0.--1. " C0S , Channel 0 Status" "Not present,Error,Idle,Busy" group.long 0x1410++0x03 line.long 0x00 "ID1_IP, Instruction Dispatcher #1 Instruction Pointer Register" rgroup.long 0x1420++0x0F line.long 0x00 "ID1_IR0, Instruction Dispatcher #1 Instruction Word 0 Register" line.long 0x04 "ID1_IR1, Instruction Dispatcher #1 Instruction Word 1 Register" line.long 0x08 "ID1_IR2, Instruction Dispatcher #1 Instruction Word 2 Register" line.long 0x0C "ID1_IR3, Instruction Dispatcher #1 Instruction Word 3 Register" group.long 0x2200++0x03 line.long 0x00 "MOVE_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" group.long 0x2210++0x0B line.long 0x00 "MOVE_SRCR, Source Register (Read Pointer)" hexmask.long.word 0x00 2.--31. 1. " MOVE_SRCR , Source Register" line.long 0x04 "MOVE_DSTR, Destination Register (Write Pointer)" hexmask.long.word 0x04 2.--31. 1. " MOVE_DSTR , Destination Register" line.long 0x08 "MOVE_CNTR, Count Register" hexmask.long.word 0x08 2.--15. 1. " MOVE_CNTR , Count Register" rgroup.long 0x23FC++0x03 line.long 0x00 "MOVE_IR, Channel ID" group.long 0x2600++0x03 line.long 0x00 "DES_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" rgroup.long 0x27FC++0x03 line.long 0x00 "DES_IR, Channel ID" group.long 0x2A00++0x03 line.long 0x00 "MPCM_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" group.long 0x2A10++0x0B line.long 0x00 "MPCM_SRCR, Source Register (Read Pointer)" line.long 0x04 "MPCM_DSTR, Destination Register (Write Pointer)" line.long 0x08 "MPCM_CNTR, Count Register" hexmask.long.word 0x08 0.--15. 1. " MPCM_CNTR , Count Register" rgroup.long 0x2BFC++0x03 line.long 0x00 "MPCM_IR, Channel ID" group.long 0x2E00++0x03 line.long 0x00 "UHH_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" rgroup.long 0x2FFC++0x03 line.long 0x00 "UHH_IR, Channel ID" group.long 0x3200++0x03 line.long 0x00 "UHH2_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" rgroup.long 0x33FC++0x03 line.long 0x00 "UHH2_IR, Channel ID" group.long 0x3600++0x03 line.long 0x00 "PKA_SCR, Status and Control register" rbitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" rbitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " rbitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" rbitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " rbitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" rbitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " rbitfld.long 0x00 23. " MAEN , Master enable" "Disabled,Enabled" rbitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" textline " " rbitfld.long 0x00 21. " SLEN , Slave enable" "Disabled,Enabled" bitfld.long 0x00 16. " RST , Reset" "No reset,Reset" group.long 0x3610++0x0F line.long 0x00 "PKA_SRCR, Source Register (Read Pointer)" line.long 0x04 "PKA_PSRCR, Source Register (Read Pointer) for the public structure" line.long 0x08 "PKA_DSTR, Destination Register (Write Pointer)" line.long 0x0C "PKA_CNTR, Count Register" hexmask.long.word 0x0C 0.--15. 1. " PKA_CNTR , Count Register" rgroup.long 0x37FC++0x03 line.long 0x00 "PKA_IR, Channel ID" rgroup.long 0x3A00++0x03 line.long 0x00 "RNG_SCR, Status and Control register" bitfld.long 0x00 30.--31. " CS , Channel status" "Not present,Error,Idle,Busy" bitfld.long 0x00 29. " BERR , Bus error status" "No error,Error" textline " " bitfld.long 0x00 28. " DERR , Dispatching protocol error status" "No error,Error" bitfld.long 0x00 27. " PERR , Couple and Chaining error status" "No error,Error" textline " " bitfld.long 0x00 26. " IERR , Instruction decode error bit" "No error,Error" bitfld.long 0x00 25. " AERR , Address/Count alignment error bit" "No error,Error" textline " " bitfld.long 0x00 24. " OERR , Other error" "No error,Error" bitfld.long 0x00 23. " MAEN , Master enable" "Disable,Enable" textline " " bitfld.long 0x00 22. " MAMD , Master mode" "Coupling,Chaining" bitfld.long 0x00 21. " SLEN , Slave enable" "Disable,Enable" textline " " bitfld.long 0x00 16. " RST , When se it issues a soft reset of the Control Unit" "No reset,Reset" bitfld.long 0x00 3. " OEC3 , Fault in the bit sequence" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " OEC2 , The internal clock for the RNG core is not revealed" "Not revealed,Revealed" bitfld.long 0x00 1. " OEC1 , The RNG core is busy" "Not busy,Busy" textline " " bitfld.long 0x00 0. " OEC0 , The bit OEC0 reveals if the RNG core is disabled" "No,Yes" group.long 0x3A14++0x07 line.long 0x00 "RNG_DSTR, Destination Register (Write Pointer)" line.long 0x04 "RNG_CNTR, Count Register" hexmask.long.word 0x04 0.--15. 1. " RNG_CNTR , Count Register" rgroup.long 0x3BFC++0x03 line.long 0x00 "RNG_IR, Channel ID" width 0x0B tree.end tree "MPMC (Multi-port DDR controller)" base ad:0xEC000000 width 19. group.long 0x00++0x07 line.long 0x00 "MPMC_CTRL_REG_00, Controller configuration register 0" bitfld.long 0x00 24. " AREFRESH , Initiates an automatic refresh to the DRAM devices" "No action,Refreshed" bitfld.long 0x00 16. " AP , Enables auto pre-charge mode for DRAM devices" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " ADDR_CMP_EN , Enables address collision/data coherency detection as a condition when using the placement logic to fill the command queue" "Disabled,Enabled" line.long 0x04 "MPMC_CTRL_REG_01, Controller configuration register 1" bitfld.long 0x04 16. " CONCURRENTAP , Enables concurrent auto pre-charge" "Disabled,Enabled" bitfld.long 0x04 8. " BANK_SPLIT_EN , Enables bank splitting as a condition when using the placement logic to fill the command queue" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " AUTO_REFRESH_MODE , Sets the mode for when the automatic refresh will occur" "DRAM burst,Next command" group.long 0x0C++0x1B line.long 0x00 "MPMC_CTRL_REG_03, Controller configuration register 3" bitfld.long 0x00 16. " ENABLE_QUICK_SREFRESH , Quick self-refresh mode enable" "Disabled,Enabled" bitfld.long 0x00 8. " EIGHT_BANK_MODE , Eight bank mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ECC_DISABLE_W_UC_ERROR , Disables automatic corruption of the ECC codes" "ECC No effect,Disable" line.long 0x04 "MPMC_CTRL_REG_04, Controller configuration register 4" bitfld.long 0x04 0. " FWC , Forces a write check" "No action,Force" line.long 0x08 "MPMC_CTRL_REG_05, Controller configuration register 5" bitfld.long 0x08 24. " POWER_DOWN , Power down" "Full power,Powered down" bitfld.long 0x08 16. " PLACEMENT_EN , Enables using the placement logic to fill the command queue" "No,Yes" textline " " bitfld.long 0x08 0. " NO_CMD_INIT , Disables DRAM commands until DLL initialization is complete and tdll has expired" "Enabled,Disabled" line.long 0x0C "MPMC_CTRL_REG_06, Controller configuration register 6" bitfld.long 0x0C 8. " PWRUP_SREFRESH_EXIT , Allows controller to exit power-down mode by executing a self-refresh exit instead of the full memory initialization" "Disabled,Enabled" bitfld.long 0x0C 0. " PRIORITY_EN , Enables priority as a condition when using the placement logic to fill the command queue" "Disabled,Enabled" line.long 0x10 "MPMC_CTRL_REG_07, Controller configuration register 7" bitfld.long 0x10 0. " RDLVL_EDGE , Specifies the read DQS edge to be used for the read leveling operation" "Positive edge,Negative edge" line.long 0x14 "MPMC_CTRL_REG_08, Controller configuration register 8" bitfld.long 0x14 0. " RDLVL_GATE_REG_EN , Enables direct control of the dfi_rdlvl_gate_delay_X signals through the rdlvl_gate_delay_X parameters" "Disabled,Enabled" line.long 0x18 "MPMC_CTRL_REG_09, Controller configuration register 9" bitfld.long 0x18 24. " RDLVL_REG_EN , Enables direct control of the dfi_rdlvl_delay_X signals through the rdlvl_delay_X parameters" "Disabled,Enabled" group.long 0x28++0x27 line.long 0x00 "MPMC_CTRL_REG_10, Controller configuration register 10" bitfld.long 0x00 24. " RESYNC_DLL , Initiates a re-synchronization of the DLL" "Low,High" bitfld.long 0x00 16. " REG_DIMM_ENABLE , Enables registered DIMM operations to control the address and command pipeline of the memory controller" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " REDUC , Controls the width of the memory datapath" "Full,Half" line.long 0x04 "MPMC_CTRL_REG_11, Controller configuration register 11" bitfld.long 0x04 24. " START , Memory controller initialization" "Not started,Started" bitfld.long 0x04 16. " SREFRESH , Self-refresh mode" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " RW_SAME_EN , Enables read/write grouping as a condition when using the placement logic to fill the command queue" "Disabled,Enabled" bitfld.long 0x04 0. " RESYNC_DLL_PER_AREF_EN , Enables an automatic re-synchronization of the DLL after every refresh" "Disabled,Enabled" line.long 0x08 "MPMC_CTRL_REG_12, Controller configuration register 12" bitfld.long 0x08 24. " SWLVL_LOAD , Triggers the delays to be loaded into the PHY delay lines and initiate a read burst or write strobe for software leveling" "No action,Load" bitfld.long 0x08 16. " SWLVL_EXIT , User request to exit software leveling" "No action,Exit" textline " " bitfld.long 0x08 0. " SWAP_EN , Enables swapping of the active command for a new higher-priority command when using the placement logic" "Disabled,Enabled" line.long 0x0C "MPMC_CTRL_REG_13, Controller configuration register 13" bitfld.long 0x0C 24. " TREF_ENABLE , Enables refresh commands" "Disabled,Enabled" bitfld.long 0x0C 16. " TRAS_LOCKOUT , Defines the tRAS lockout setting for the DRAM device" "Not supported,Supported" textline " " bitfld.long 0x0C 8. " SWLVL_START , Initiates the software leveling operation defined in the sw_leveling_mode parameter" "No action,Initiate" bitfld.long 0x0C 0. " SWLVL_OP_DONE , Reports on status of the software leveling operation" "In process,Completed" line.long 0x10 "MPMC_CTRL_REG_14, Controller configuration register 14" bitfld.long 0x10 8. " WRITE_INTERP , Defines whether the memory controller can interrupt a write burst with a read command" "Not supported,Supported" bitfld.long 0x10 0. " WEIGHTED_ROUND_ROBIN_LATENCY_CONTROL , Controls the weighted round-robin latency option" "Only waiting command,Running" line.long 0x14 "MPMC_CTRL_REG_15, Controller configuration register 15" bitfld.long 0x14 24. " ZQCS_ROTATE , Defines the behavior of short ZQ calibrations" "All selects,One select" bitfld.long 0x14 8. " WRLVL_REG_EN , Enables direct control of the dfi_wrlvl_delay_X signals through the wrlvl_delay_X parameters" "Disabled,Enabled" line.long 0x18 "MPMC_CTRL_REG_16, Controller configuration register 16" bitfld.long 0x18 24.--25. " AXI1_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 1 and the Memory Controller core clock" "Asynchronous mode,?..." bitfld.long 0x18 16.--17. " AXI0_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 0 and the Memory Controller core clock" "Asynchronous mode,?..." textline " " bitfld.long 0x18 8.--9. " ADDRESS_MIRRORING , Indicates which chip selects support address mirroring" "Standard pinout,Mirrored wiring,Standard pinout,Mirrored wiring" bitfld.long 0x18 0. " ZQ_IN_PROGRESS , Indicates that a ZQ command is currently in progress" "Low,High" line.long 0x1C "MPMC_CTRL_REG_17, Controller configuration register 17" bitfld.long 0x1C 24.--25. " AXI5_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 5 and the Memory Controller core clock" "Asynchronous mode,?..." bitfld.long 0x1C 16.--17. " AXI4_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 4 and the Memory Controller core clock" "Asynchronous mode,?..." textline " " bitfld.long 0x1C 8.--9. " AXI3_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 3 and the Memory Controller core clock" "Asynchronous mode,?..." bitfld.long 0x1C 0.--1. " AXI2_FIFO_TYPE_REG , Sets the relativity of the clock domains between AXI port 2 and the Memory Controller core clock" "Asynchronous mode,?..." line.long 0x20 "MPMC_CTRL_REG_18, Controller configuration register 18" rbitfld.long 0x20 24.--25. " MAX_CS_REG , Displays the maximum number of chip selects configured for this memory controller" "0,1,2,3" bitfld.long 0x20 16.--17. " DRAM_CLK_DISABLE , Sets value for the DFI output signal dfi_dram_clk_disable" "No effect,Disabled,?..." textline " " bitfld.long 0x20 8.--9. " CTRL_RAW , Controls ECC error reporting (single-bit and double-bit errors) and correcting (single-bit errors)" "ECC not being used,ECC reporting is on,No ECC RAM storage available,ECC reporting and correcting on" bitfld.long 0x20 0.--1. " CS_MAP , Sets the mask that determines which chip select pins are active" "0,1,2,3" line.long 0x24 "MPMC_CTRL_REG_19, Controller configuration register 19" bitfld.long 0x24 25. " ODT_WR_MAP_CS1[1] , Sets up which (if any) chip(s) will have their ODT termination active while a write occurs on chip select 1" "CS0,CS1" bitfld.long 0x24 24. " ODT_WR_MAP_CS1[0] , Sets up which (if any) chip(s) will have their ODT termination active while a write occurs on chip select 1" "CS0,CS1" textline " " bitfld.long 0x24 17. " ODT_WR_MAP_CS0[1] , Sets up which (if any) chip(s) will have their ODT termination active while a write occurs on chip select 0" "CS0,CS1" bitfld.long 0x24 16. " ODT_WR_MAP_CS0[0] , Sets up which (if any) chip(s) will have their ODT termination active while a write occurs on chip select 0" "CS0,CS1" textline " " bitfld.long 0x24 9. " ODT_RD_MAP_CS1[1] , Sets up which (if any) chip(s) will have their ODT termination active while a read occurs on chip select 1" "CS0,CS1" bitfld.long 0x24 8. " ODT_RD_MAP_CS1[0] , Sets up which (if any) chip(s) will have their ODT termination active while a read occurs on chip select 1" "CS0,CS1" textline " " bitfld.long 0x24 1. " ODT_RD_MAP_CS0[1] , Sets up which (if any) chip(s) will have their ODT termination active while a read occurs on chip select 0" "CS0,CS1" bitfld.long 0x24 0. " ODT_RD_MAP_CS0[0] , Sets up which (if any) chip(s) will have their ODT termination active while a read occurs on chip select 0" "CS0,CS1" group.long 0x50++0x27 line.long 0x00 "MPMC_CTRL_REG_20, Controller configuration register 20" bitfld.long 0x00 25. " ZQ_REQ[1] , Triggers a long ZQ calibration" "Not triggered,Triggered" bitfld.long 0x00 24. " ZQ_REQ[0] , Triggers a short ZQ calibration" "Not triggered,Triggered" textline " " bitfld.long 0x00 17. " ZQ_ON_SREF_EXIT[1] , Triggers a long ZQ calibration" "Not triggered,Triggered" bitfld.long 0x00 16. " ZQ_ON_SREF_EXIT[0] , Triggers a short ZQ calibration" "Not triggered,Triggered" textline " " bitfld.long 0x00 8.--9. " SW_LEVELING_MODE , Defines the type of leveling operation performed during the next software leveling operation" "No Leveling,Write Leveling,Read Leveling,Gate Leveling" line.long 0x04 "MPMC_CTRL_REG_21, Controller configuration register 21" bitfld.long 0x04 24.--26. " AXI0_W_PRIORITY , Sets the priority of write commands from AXI port 0. A value of 0 is the highest priority" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. " AXI0_R_PRIORITY , Sets the priority of read commands from AXI port 0. A value of 0 is the highest priority" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 8.--10. " AXI0_PORT_ORDERING , Reassigned port order for port 0" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " ADDR_PINS , Defines the difference between the maximum number of address pins configured (15) and the actual number of pins being used" "0,1,2,3,4,5,6,7" line.long 0x08 "MPMC_CTRL_REG_22, Controller configuration register 22" bitfld.long 0x08 24.--26. " AXI2_PORT_ORDERING , Reassigned port order for port 2" "0,1,2,3,4,5,6,7" bitfld.long 0x08 16.--18. " AXI1_W_PRIORITY , Sets the priority of write commands from AXI port 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 8.--10. " AXI1_R_PRIORITY , Sets the priority of read commands from AXI port 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " AXI1_PORT_ORDERING , Reassigned port order for port 1" "0,1,2,3,4,5,6,7" line.long 0x0C "MPMC_CTRL_REG_23, Controller configuration register 23" bitfld.long 0x0C 24.--26. " AXI3_R_PRIORITY , Sets the priority of read commands from AXI port 3. A value of 0 is the highest priority" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 16.--18. " AXI3_PORT_ORDERING , Reassigned port order for port 3" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 8.--10. " AXI2_W_PRIORITY , Sets the priority of write commands from AXI port 2" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--2. " AXI2_R_PRIORITY , Sets the priority of read commands from AXI port 2" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_24, Controller configuration register 24" bitfld.long 0x10 24.--26. " AXI4_W_PRIORITY , Sets the priority of write commands from AXI port 4" "0,1,2,3,4,5,6,7" bitfld.long 0x10 16.--18. " AXI4_R_PRIORITY , Sets the priority of read commands from AXI port 4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 8.--10. " AXI4_PORT_ORDERING , Reassigned port order for port 4" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " AXI3_W_PRIORITY , Sets the priority of write commands from AXI port 3" "0,1,2,3,4,5,6,7" line.long 0x14 "MPMC_CTRL_REG_25, Controller configuration register 25" bitfld.long 0x14 24.--26. " BSTLEN , Defines the burst length encoding that will be programmed into the DRAM devices at initialization" "Reserved,Reserved,4 memory words,8 memory words,?..." bitfld.long 0x14 16.--18. " AXI5_W_PRIORITY , Sets the priority of write commands from AXI port 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 8.--10. " AXI5_R_PRIORITY , Sets the priority of read commands from AXI port 5" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. " AXI5_PORT_ORDERING , Reassigned port order for port 5" "0,1,2,3,4,5,6,7" line.long 0x18 "MPMC_CTRL_REG_26, Controller configuration register 26" bitfld.long 0x18 26. " PORT_DATA_ERROR_TYPE , Double-bit un-correctable ECC event occurred on the read data" "No error,Error" bitfld.long 0x18 8.--10. " COLUMN_SIZE , Shows the difference between the maximum column width available (14) and the actual number of column pins being used" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 0.--2. " CKE_DELAY , Sets the number of additional cycles of delay to include in the CKE signal cke_status for status reporting" "0,1,2,3,4,5,6,7" line.long 0x1C "MPMC_CTRL_REG_27, Controller configuration register 27" bitfld.long 0x1C 24.--26. " R2W_DIFFCS_DLY , Defines the number of additional clocks of delay to insert from a read command to one chip select to a write command to a different chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 16.--18. " R2R_SAMECS_DLY , Defines the number of additional clocks of delay to insert between two read commands to the same chip select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x1C 8.--10. " R2R_DIFFCS_DLY , Defines the number of additional clocks of delay to insert from a read command to one chip select to a read command to a different chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. " Q_FULLNESS , Defines quantity of data that will be considered full for the command queue" "0,1,2,3,4,5,6,7" line.long 0x20 "MPMC_CTRL_REG_28, Controller configuration register 28" hexmask.long.byte 0x20 24.--31. 1. " TRRD , Defines the DRAM activate to activate delay for different banks" bitfld.long 0x20 16.--18. " TCKE , Defines the minimum CKE pulse width" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x20 8.--10. " TBST_INT_INTERVAL , Defines the burst interrupt interval" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. " R2W_SAMECS_DLY , Defines the number of additional clocks of delay to insert from a read command to a write command to the same chip select" "0,1,2,3,4,5,6,7" line.long 0x24 "MPMC_CTRL_REG_29, Controller configuration register 29" bitfld.long 0x24 24.--26. " W2W_DIFFCS_DLY , Defines the number of additional clocks of delay to insert from a write command to one chip select to a write command to a different chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x24 16.--18. " W2R_SAMECS_DLY , Defines the number of additional clocks of delay to insert from a write command to a read command to the same chip select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 8.--10. " W2R_DIFFCS_DLY , Defines the number of additional clocks of delay to insert from a write command to one chip select to a read command to a different chip select" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--3. " TRTP , Defines the DRAM tRTP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x78++0x27 line.long 0x00 "MPMC_CTRL_REG_30, Controller configuration register 30" bitfld.long 0x00 24.--27. " ADD_ODT_CLK_SAMETYPE_DIFFCS , Defines the number of additional clocks of delay to insert between commands" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--10. " WEIGHTED_ROUND_ROBIN_WEIGTH_SHARING , Indicates that the port pair is tied together in arbitration decisions in weighted roundrobin arbitration" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0.--2. " W2W_SAMECS_DLY , Defines the number of additional clocks of delay to insert between two write commands to the same chip select" "0,1,2,3,4,5,6,7" line.long 0x04 "MPMC_CTRL_REG_31, Controller configuration register 31" bitfld.long 0x04 24.--27. " AXI0_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " AXI0_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " AXI0_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " APREBIT , Defines the location of the auto pre-charge bit in the DRAM address in decimal encoding" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "MPMC_CTRL_REG_32, Controller configuration register 32" bitfld.long 0x08 24.--27. " AXI0_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " AXI0_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " AXI0_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " AXI0_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "MPMC_CTRL_REG_33, Controller configuration register 33" bitfld.long 0x0C 24.--27. " AXI1_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. " AXI1_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 8.--11. " AXI1_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " AXI0_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 0 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "MPMC_CTRL_REG_34, Controller configuration register 34" bitfld.long 0x10 24.--27. " AXI1_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--19. " AXI1_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x10 8.--11. " AXI1_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AXI1_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 1 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "MPMC_CTRL_REG_35, Controller configuration register 35" bitfld.long 0x14 24.--27. " AXI2_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. " AXI2_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 8.--11. " AXI2_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 0.--3. " AXI1_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "MPMC_CTRL_REG_36, Controller configuration register 36" bitfld.long 0x18 24.--27. " AXI2_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. " AXI2_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x18 8.--11. " AXI2_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AXI2_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "MPMC_CTRL_REG_37, Controller configuration register 37" bitfld.long 0x1C 24.--27. " AXI3_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. " AXI3_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x1C 8.--11. " AXI3_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 0.--3. " AXI2_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 2 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "MPMC_CTRL_REG_38, Controller configuration register 38" bitfld.long 0x20 24.--27. " AXI3_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. " AXI3_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 8.--11. " AXI3_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 0.--3. " AXI3_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "MPMC_CTRL_REG_39, Controller configuration register 39" bitfld.long 0x24 24.--27. " AXI4_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 16.--19. " AXI4_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x24 8.--11. " AXI4_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 0.--3. " AXI3_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 3 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xA0++0x13 line.long 0x00 "MPMC_CTRL_REG_40, Controller configuration register 40" bitfld.long 0x00 24.--27. " AXI4_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " AXI4_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " AXI4_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " AXI4_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MPMC_CTRL_REG_41, Controller configuration register 41" bitfld.long 0x04 24.--27. " AXI5_PRIORITY2_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 2 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. " AXI5_PRIORITY1_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 1 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--11. " AXI5_PRIORITY0_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 0 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " AXI4_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 4 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "MPMC_CTRL_REG_42, Controller configuration register 42" bitfld.long 0x08 24.--27. " AXI5_PRIORITY6_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 6 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " AXI5_PRIORITY5_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 5 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 8.--11. " AXI5_PRIORITY4_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 4 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " AXI5_PRIORITY3_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 3 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "MPMC_CTRL_REG_43, Controller configuration register 43" bitfld.long 0x0C 24.--27. " DRAM_CLASS , Selects the mode of operation for the Memory Controller" "Reserved,Reserved,Reserved,Reserved,DDR2,DDR3,?..." bitfld.long 0x0C 8.--11. " BURST_ON_FLY_BIT , Defines the bit of the DRAM address that defines Burst-On-Fly behavior" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 0.--3. " AXI5_PRIORITY7_RELATIVE_PRIORITY , Holds the relative priority of the AXI port 5 for priority 7 commands in weighted round robin arbitration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "MPMC_CTRL_REG_44, Controller configuration register 44" rbitfld.long 0x10 27. " PORT_CMD_ERROR_TYPE , Narrow transfer requested for a requestor Y" "No error,Error" rbitfld.long 0x10 16.--19. " MAX_ROW_REG , Defines the maximum width of the memory address bus for the memory controller" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x10 8.--11. " MAX_COL_REG , Defines the maximum width of column address in the DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " INITAREF , Defines the number of auto-refresh commands needed by the DRAM devices to satisfy the initialization sequence" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0xB4++0x03 line.long 0x00 "MPMC_CTRL_REG_45, Controller configuration register 45" bitfld.long 0x00 24.--27. " TDFI_PHY_WRLAT , Holds the calculated value of the tphy_wrlat timing parameter" "Reserved,Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " TDFI_CTRLUPD_MIN , Holds the DFI tctrlupd_min timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0xB8++0x0F line.long 0x00 "MPMC_CTRL_REG_46, Controller configuration register 46" bitfld.long 0x00 24.--27. " TWTR , Sets the number of cycles needed to switch from a write to a read operation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " TRP_AB , Defines the DRAM TRP time for all banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--11. " TRP , Defines the DRAM pre-charge command time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MPMC_CTRL_REG_47, Controller configuration register 47" hexmask.long.byte 0x04 24.--29. 1. " ADD_ODT_CLK_DIFFTYPE_DIFFCS , Defines the number of additional clocks of delay to insert between commands of different types" rbitfld.long 0x04 16.--19. " WRR_PARAM_VALUE_ERR , Shows the weighted round-robin arbitration errors/warnings" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--12. " WRLAT_ADJ , Adjusts the relative timing between DFI write commands and the dfi_wrdata_en signal to conform to PHY timing requirements" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. " WRLAT , Defines the write latency from when the write command is issued to the time the write data is presented to the DRAM devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MPMC_CTRL_REG_48, Controller configuration register 48" hexmask.long.byte 0x08 0.--5. 1. " CASLAT_LIN , Sets the CAS latency linear value in 1/2 cycle increments" line.long 0x0C "MPMC_CTRL_REG_49, Controller configuration register 49" bitfld.long 0x0C 24.--28. " TDAL , Defines the auto pre-charge write recovery time when auto pre-charge is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 16.--20. " TCKESR , Defines the minimum number of cycles that CKE must be held low during selfrefresh. pulse width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x0C 8.--12. " TCCD , Defines the minimum delay between CAS commands, in cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x0C 0.--5. 1. " RDLAT_ADJ , Adjusts the relative timing between DFI read commands and the dfi_rddata_en signal to conform to PHY timing requirements" group.long 0xC8++0x0F line.long 0x00 "MPMC_CTRL_REG_50, Controller configuration register 50" bitfld.long 0x00 24.--28. " TMRD , Defines the minimum number of cycles required between two mode register write commands" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--13. 1. " TDFI_RDDDATA_EN , Holds the calculated value of the trddata_en timing parameter" textline " " hexmask.long.byte 0x00 0.--5. 1. " TDFI_PHY_RDLAT , Holds the DFI tphy_rdlat timing parameter" line.long 0x04 "MPMC_CTRL_REG_51, Controller configuration register 51" hexmask.long.byte 0x04 24.--29. 1. " COMMAND_AGE_COUNT , Holds the initial value of the command aging counters associated with each command in the command queue" bitfld.long 0x04 21. " AXI_ALIGNED_STROBE_DISABLE[5] , For certain types of AXI transfers" "Masked write,Standard" textline " " bitfld.long 0x04 20. " AXI_ALIGNED_STROBE_DISABLE[4] , For certain types of AXI transfers" "Masked write,Standard" bitfld.long 0x04 19. " AXI_ALIGNED_STROBE_DISABLE[3] , For certain types of AXI transfers" "Masked write,Standard" textline " " bitfld.long 0x04 18. " AXI_ALIGNED_STROBE_DISABLE[2] , For certain types of AXI transfers" "Masked write,Standard" bitfld.long 0x04 17. " AXI_ALIGNED_STROBE_DISABLE[1] , For certain types of AXI transfers" "Masked write,Standard" textline " " bitfld.long 0x04 16. " AXI_ALIGNED_STROBE_DISABLE[0] , For certain types of AXI transfers" "Masked write,Standard" hexmask.long.byte 0x04 8.--13. 1. " AGE_COUNT , Holds the initial value of the master aging rate counter" bitfld.long 0x04 0.--4. " TWR_INT , Defines the DRAM write recovery time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "MPMC_CTRL_REG_52, Controller configuration register 52" hexmask.long.byte 0x08 24.--29. 1. " WLDQSEN , Minimum number of cycles of delay after memory enters write leveling mode" hexmask.long.byte 0x08 16.--23. 1. " TRC , Defines the DRAM period between active commands for the same bank" textline " " hexmask.long.byte 0x08 8.--13. 1. " TFAW , Defines the DRAM tFAW parameter" hexmask.long.byte 0x08 0.--5. 1. " OUT_OF_RANGE_TYPE , Holds the type of command that caused an out-of-range interrupt request to the memory devices" line.long 0x0C "MPMC_CTRL_REG_53, Controller configuration register 53" hexmask.long.byte 0x0C 24.--30. 1. " ECC_C_SYND , Stores the pre-corrected syndrome bits associated with a single-bit correctable ECC error event" hexmask.long.byte 0x0C 16.--22. 1. " ECC_C_ID , Contains the source ID associated with a single-bit correctable ECC event" textline " " hexmask.long.byte 0x0C 0.--5. 1. " WLMRD , Defines the delay from when an MRS command is issued to when the first write levelingstrobe is issued" rgroup.long 0xD8++0x03 line.long 0x00 "MPMC_CTRL_REG_54, Controller configuration register 54" hexmask.long.byte 0x00 24.--30. 1. " OUT_OF_RANGE_SOURCE_ID , Holds the Source ID of the command that caused an out-of-range interrupt request to the memory devices" hexmask.long.byte 0x00 16.--22. 1. " OUT_OF_RANGE_LENGHT , Holds the length of the command that caused an out-of-range interrupt request to the memory devices" textline " " hexmask.long.byte 0x00 8.--14. 1. " ECC_U_SYND , Stores the syndrome bits associated with a double-bit un-correctable ECC error event" hexmask.long.byte 0x00 0.--6. 1. " ECC_U_ID , Contains the source ID associated with a double-bit un-correctable ECC event" group.long 0xDC++0x0B line.long 0x00 "MPMC_CTRL_REG_55, Controller configuration register 55" hexmask.long.byte 0x00 24.--31. 1. " DLL_RST_ADJ_DLY , Specifies the minimum number of cycles after the master delay value is programmed before the DLL reset may be asserted" hexmask.long.byte 0x00 8.--14. 1. " PORT_DATA_ERROR_ID , Holds the source ID of the command that caused a port data error condition" textline " " hexmask.long.byte 0x00 0.--6. 1. " PORT_CMD_ERROR_ID , Holds the source ID of the command that caused a port command error condition" line.long 0x08 "MPMC_CTRL_REG_57, Controller configuration register 57" hexmask.long.byte 0x08 24.--31. 1. " SWLVL_RESP_1 , Response for the software leveling process for data slice 1" hexmask.long.byte 0x08 16.--23. 1. " SWLVL_RESP_0 , Response for the software leveling process for data slice 0" textline " " hexmask.long.byte 0x08 8.--15. 1. " REFRESH_PER_ZQ , Sets the maximum number of refreshes allowed between automatic ZQCS commands" group.long 0xE8++0x07 line.long 0x00 "MPMC_CTRL_REG_58, Controller configuration register 58" hexmask.long.byte 0x00 24.--31. 1. " TDFI_RDLVL_DLL , Defines the number of cycles required for the read leveling delay line to update after a load" hexmask.long.byte 0x00 16.--23. 1. " SWLVL_RESP_4 , Response for the software leveling process for data slice 4" textline " " hexmask.long.byte 0x00 8.--15. 1. " SWLVL_RESP_3 , Response for the software leveling process for data slice 3" hexmask.long.byte 0x00 0.--7. 1. " SWLVL_RESP_2 , Response for the software leveling process for data slice 2" line.long 0x04 "MPMC_CTRL_REG_59, Controller configuration register 59" hexmask.long.byte 0x04 24.--31. 1. " TDFI_WRLVL_EN , Defines the minimum number of cycles required after the write leveling enable signal is asserted until the first write leveling load may be asserted or write strobe may be asserted" hexmask.long.byte 0x04 16.--23. 1. " TDFI_WRLVL_DLL , Defines the number of cycles required for the write leveling delay line to update after a load" textline " " hexmask.long.byte 0x04 8.--15. 1. " TDFI_RDLVL_RESPLAT , Defines the number of cycles after a read command until the response is valid" hexmask.long.byte 0x04 0.--7. 1. " TDFI_RDLVL_EN , Defines the minimum number of cycles required after the read leveling enable signal is asserted until the first read leveling load or read command may be asserted" group.long 0xF0++0x1F line.long 0x00 "MPMC_CTRL_REG_60, Controller configuration register 60" hexmask.long.byte 0x00 24.--31. 1. " TRCD_INT , Defines the DRAM RAS to CAS delay" hexmask.long.byte 0x00 16.--23. 1. " TRAS_MIN , Defines the DRAM minimum row activate time" textline " " hexmask.long.byte 0x00 8.--15. 1. " TMOD , Defines the number of cycles of wait time after a mode register write to any nonmode register write command" hexmask.long.byte 0x00 0.--7. 1. " TDFI_WRLVL_RESPLAT , Defines the number of cycles after a write level strobe until the response is valid" line.long 0x04 "MPMC_CTRL_REG_61, Controller configuration register 61" hexmask.long.word 0x04 8.--17. 1. " AXI0_PRIORITY_RELAX , Holds the counter value for AXI port 0 at which the priority relax condition is triggered in weighted round robin arbitration" line.long 0x08 "MPMC_CTRL_REG_62, Controller configuration register 62" hexmask.long.word 0x08 16.--25. 1. " AXI2_PRIORITY_RELAX , Holds the counter value for AXI port 2 at which the priority relax condition is triggered in weighted round robin arbitration" hexmask.long.word 0x08 0.--9. 1. " AXI1_PRIORITY_RELAX , Holds the counter value for AXI port 1 at which the priority relax condition is triggered in weighted round robin arbitration" line.long 0x0C "MPMC_CTRL_REG_63, Controller configuration register 63" hexmask.long.word 0x0C 16.--25. 1. " AXI4_PRIORITY_RELAX , Holds the counter value for AXI port 4 at which the priority relax condition is triggered in weighted round robin arbitration" hexmask.long.word 0x0C 0.--9. 1. " AXI3_PRIORITY_RELAX , Holds the counter value for AXI port 3 at which the priority relax condition is triggered in weighted round robin arbitration" line.long 0x10 "MPMC_CTRL_REG_64, Controller configuration register 64" hexmask.long.word 0x10 16.--25. 1. " TDFI_RDLVL_RR , " hexmask.long.word 0x10 0.--9. 1. " AXI5_PRIORITY_RELAX , " line.long 0x14 "MPMC_CTRL_REG_65, Controller configuration register 65" hexmask.long.word 0x14 0.--9. 1. " TDFI_WRLVL_WW , Sets the minimum number of cycles that must occur between write level strobes" line.long 0x18 "MPMC_CTRL_REG_66, Controller configuration register 66" hexmask.long.word 0x18 16.--25. 1. " ZQCS , Specifies the duration of wait time" hexmask.long.word 0x18 0.--11. 1. " ZQCL , Specifies the duration of wait time" line.long 0x1C "MPMC_CTRL_REG_67, Controller configuration register 67" hexmask.long.word 0x1C 16.--27. 1. " TDFI_CTRLUPD_MAX , Holds the DFI tctrlupd_max timing parameter" hexmask.long.word 0x1C 0.--11. 1. " ZQINIT , Specifies the duration of wait time" rgroup.long 0x110++0x03 line.long 0x00 "MPMC_CTRL_REG_68, Controller configuration register 68" hexmask.long.word 0x00 16.--31. 1. " TDFI_PHYUPD_TYPE0 , Holds the DFI tphyupd_type0 timing parameter" hexmask.long.word 0x00 0.--13. 1. " TDFI_PHYUPD_RESP , Holds the DFI tphyupd_resp timing parameter" group.long 0x114++0x03 line.long 0x00 "MPMC_CTRL_REG_69, Controller configuration register 69" hexmask.long.word 0x00 16.--31. 1. " TDFI_PHYUPD_TYPE2 , Holds the DFI tphyupd_type2 timing parameter" hexmask.long.word 0x00 0.--15. 1. " TDFI_PHYUPD_TYPE1 , Holds the DFI tphyupd_type1 timing parameter" group.long 0x118++0x23 line.long 0x00 "MPMC_CTRL_REG_70, Controller configuration register 70" hexmask.long.word 0x00 16.--29. 1. " TREF , Defines the DRAM cycles between refresh commands" hexmask.long.word 0x00 0.--15. 1. " TDFI_PHYUPD_TYPE3 , Holds the DFI tphyupd_type3 timing parameter" line.long 0x04 "MPMC_CTRL_REG_71, Controller configuration register 71" hexmask.long.word 0x04 16.--30. 1. " MR0_DATA_1 , Holds the memory mode register 0 data for chip select 1 written during memory initialization" hexmask.long.word 0x04 0.--14. 1. " MR0_DATA_0 , Holds the memory mode register 0 data for chip select 0 written during memory initialization" line.long 0x08 "MPMC_CTRL_REG_72, Controller configuration register 72" hexmask.long.word 0x08 16.--30. 1. " MR1_DATA_1 , Holds the memory mode register 1 data for chip select 1 written during memory initialization" hexmask.long.word 0x08 0.--14. 1. " MR1_DATA_0 , Holds the memory mode register 1 data for chip select 0 written during memory initialization" line.long 0x0C "MPMC_CTRL_REG_73, Controller configuration register 73" hexmask.long.word 0x0C 16.--30. 1. " MR2_DATA_1 , Holds the memory mode register 2 data for chip select 1 written during memory initialization" hexmask.long.word 0x0C 0.--14. 1. " MR2_DATA_0 , Holds the memory mode register 2 data for chip select 0 written during memory initialization" line.long 0x10 "MPMC_CTRL_REG_74, Controller configuration register 74" hexmask.long.word 0x10 16.--30. 1. " MR3_DATA_1 , Holds the memory mode register 3 data for chip select 1 written during memory initialization" hexmask.long.word 0x10 0.--14. 1. " MR3_DATA_0 , Holds the memory mode register 3 data for chip select 0 written during memory initialization" line.long 0x14 "MPMC_CTRL_REG_75, Controller configuration register 75" hexmask.long.word 0x14 16.--31. 1. " AXI1_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 1 from requestor Z" hexmask.long.word 0x14 0.--15. 1. " AXI0_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 0 from requestor Z" line.long 0x18 "MPMC_CTRL_REG_76, Controller configuration register 76" bitfld.long 0x18 31. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 31" "Equal,Less" bitfld.long 0x18 30. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 30" "Equal,Less" bitfld.long 0x18 29. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 29" "Equal,Less" bitfld.long 0x18 28. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 28" "Equal,Less" textline " " bitfld.long 0x18 27. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 27" "Equal,Less" bitfld.long 0x18 26. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 26" "Equal,Less" bitfld.long 0x18 25. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 25" "Equal,Less" bitfld.long 0x18 24. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 24" "Equal,Less" textline " " bitfld.long 0x18 23. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 23" "Equal,Less" bitfld.long 0x18 22. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 22" "Equal,Less" bitfld.long 0x18 21. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 21" "Equal,Less" bitfld.long 0x18 20. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 20" "Equal,Less" textline " " bitfld.long 0x18 19. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 19" "Equal,Less" bitfld.long 0x18 18. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 18" "Equal,Less" bitfld.long 0x18 17. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 17" "Equal,Less" bitfld.long 0x18 16. " AXI3_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 3 from requestor 16" "Equal,Less" textline " " bitfld.long 0x18 15. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 15" "Equal,Less" bitfld.long 0x18 14. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 14" "Equal,Less" bitfld.long 0x18 13. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 13" "Equal,Less" bitfld.long 0x18 12. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 12" "Equal,Less" textline " " bitfld.long 0x18 11. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 11" "Equal,Less" bitfld.long 0x18 10. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 10" "Equal,Less" bitfld.long 0x18 9. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 9" "Equal,Less" bitfld.long 0x18 8. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 8" "Equal,Less" textline " " bitfld.long 0x18 7. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 7" "Equal,Less" bitfld.long 0x18 6. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 6" "Equal,Less" bitfld.long 0x18 5. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 5" "Equal,Less" bitfld.long 0x18 4. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 4" "Equal,Less" textline " " bitfld.long 0x18 3. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 3" "Equal,Less" bitfld.long 0x18 2. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 2" "Equal,Less" bitfld.long 0x18 1. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 1" "Equal,Less" bitfld.long 0x18 0. " AXI2_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 2 from requestor 0" "Equal,Less" line.long 0x1C "MPMC_CTRL_REG_77, Controller configuration register 77" bitfld.long 0x1C 31. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 31" "Equal,Less" bitfld.long 0x1C 30. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 30" "Equal,Less" bitfld.long 0x1C 29. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 29" "Equal,Less" bitfld.long 0x1C 28. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 28" "Equal,Less" textline " " bitfld.long 0x1C 27. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 27" "Equal,Less" bitfld.long 0x1C 26. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 26" "Equal,Less" bitfld.long 0x1C 25. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 25" "Equal,Less" bitfld.long 0x1C 24. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 24" "Equal,Less" textline " " bitfld.long 0x1C 23. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 23" "Equal,Less" bitfld.long 0x1C 22. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 22" "Equal,Less" bitfld.long 0x1C 21. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 21" "Equal,Less" bitfld.long 0x1C 20. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 20" "Equal,Less" textline " " bitfld.long 0x1C 19. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 19" "Equal,Less" bitfld.long 0x1C 18. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 18" "Equal,Less" bitfld.long 0x1C 17. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 17" "Equal,Less" bitfld.long 0x1C 16. " AXI5_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 5 from requestor 16" "Equal,Less" textline " " bitfld.long 0x1C 15. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 15" "Equal,Less" bitfld.long 0x1C 14. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 14" "Equal,Less" bitfld.long 0x1C 13. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 13" "Equal,Less" bitfld.long 0x1C 12. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 12" "Equal,Less" textline " " bitfld.long 0x1C 11. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 11" "Equal,Less" bitfld.long 0x1C 10. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 10" "Equal,Less" bitfld.long 0x1C 9. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 9" "Equal,Less" bitfld.long 0x1C 8. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 8" "Equal,Less" textline " " bitfld.long 0x1C 7. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 7" "Equal,Less" bitfld.long 0x1C 6. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 6" "Equal,Less" bitfld.long 0x1C 5. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 5" "Equal,Less" bitfld.long 0x1C 4. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 4" "Equal,Less" textline " " bitfld.long 0x1C 3. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 3" "Equal,Less" bitfld.long 0x1C 2. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 2" "Equal,Less" bitfld.long 0x1C 1. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 1" "Equal,Less" bitfld.long 0x1C 0. " AXI4_EN_SIZE_LT_WIDTH_INSTR , Allows the port to accept size less than width transactions on AXI port 4 from requestor 0" "Equal,Less" line.long 0x20 "MPMC_CTRL_REG_78, Controller configuration register 78" hexmask.long.word 0x20 16.--31. 1. " DLL_RST_DELAY , Sets the number of cycles that the reset must be held asserted for the DLL" group.long 0x144++0x0B line.long 0x00 "MPMC_CTRL_REG_81, Controller configuration register 81" hexmask.long.word 0x00 16.--31. 1. " RDLVL_DELAY_0 , Specifies the read leveling delay for data slice 0" line.long 0x04 "MPMC_CTRL_REG_82, Controller configuration register 82" hexmask.long.word 0x04 16.--31. 1. " RDLVL_DELAY_2 , Specifies the read leveling delay for data slice 2" hexmask.long.word 0x04 0.--15. 1. " RDLVL_DELAY_1 , Specifies the read leveling delay for data slice 1" line.long 0x08 "MPMC_CTRL_REG_83, Controller configuration register 83" hexmask.long.word 0x08 16.--31. 1. " RDLVL_DELAY_4 , Specifies the read leveling delay for data slice 4" hexmask.long.word 0x08 0.--15. 1. " RDLVL_DELAY_3 , Specifies the read leveling delay for data slice3" group.long 0x158++0x0B line.long 0x00 "MPMC_CTRL_REG_86, Controller configuration register 86" hexmask.long.word 0x00 16.--31. 1. " RDLVL_GATE_DELAY_0 , Specifies the gate delay for data slice 0" line.long 0x04 "MPMC_CTRL_REG_87, Controller configuration register 87" hexmask.long.word 0x04 16.--31. 1. " RDLVL_GATE_DELAY_2 , Specifies the gate delay for data slice 2" hexmask.long.word 0x04 0.--15. 1. " RDLVL_GATE_DELAY_1 , Specifies the gate delay for data slice 1" line.long 0x08 "MPMC_CTRL_REG_88, Controller configuration register 88" hexmask.long.word 0x08 16.--31. 1. " RDLVL_GATE_DELAY_4 , Specifies the gate delay for data slice 4" hexmask.long.word 0x08 0.--15. 1. " RDLVL_GATE_DELAY_3 , Specifies the gate delay for data slice 3" group.long 0x180++0x1B line.long 0x00 "MPMC_CTRL_REG_96, Controller configuration register 96" hexmask.long.word 0x00 16.--31. 1. " TDLL , Defines the DRAM DLL lock time" hexmask.long.word 0x00 0.--15. 1. " TCPD , Defines the clock enable to pre-charge delay time for the DRAM devices" line.long 0x04 "MPMC_CTRL_REG_97, Controller configuration register 97" hexmask.long.word 0x04 0.--15. 1. " TPDEX , Defines the DRAM power-down exit command period" line.long 0x08 "MPMC_CTRL_REG_98, Controller configuration register 98" hexmask.long.word 0x08 16.--31. 1. " TXSNR , Defines the DRAM time from a selfrefresh exit to a command that does not require the memory DLL to be locked" hexmask.long.word 0x08 0.--15. 1. " TXPDLL , Defines the DRAM power-down exit command period" line.long 0x0C "MPMC_CTRL_REG_99, Controller configuration register 99" hexmask.long.word 0x0C 16.--31. 1. " VERSION , Holds the Memory Controller version number for this controller" hexmask.long.word 0x0C 0.--15. 1. " TXSR , Defines the DRAM time from a selfrefresh exit to a command that requires the memory DLL to be locked" line.long 0x10 "MPMC_CTRL_REG_100, Controller configuration register 100" hexmask.long.word 0x10 16.--31. 1. " WRLVL_DELAY_1 , Specifies the write leveling delay for data slice 1" hexmask.long.word 0x10 0.--15. 1. " WRLVL_DELAY_0 , Specifies the write leveling delay for data slice 0" line.long 0x14 "MPMC_CTRL_REG_101, Controller configuration register 101" hexmask.long.word 0x14 16.--31. 1. " WRLVL_DELAY_3 , Specifies the write leveling delay for data slice 3" hexmask.long.word 0x14 0.--15. 1. " WRLVL_DELAY_2 , Specifies the write leveling delay for data slice 2" line.long 0x18 "MPMC_CTRL_REG_102, Controller configuration register 102" hexmask.long.word 0x18 0.--15. 1. " WRLVL_DELAY_4 , Specifies the write leveling delay for data slice 4" wgroup.long 0x19C++0x03 line.long 0x00 "MPMC_CTRL_REG_103, Controller configuration register 103" bitfld.long 0x00 20. " INT_ACK[20] , The user-initiated DLL resync has completed" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 19. " INT_ACK[19] , A state change has been detected on the dfi_init_complete signal" "Not acknowledged,Acknowledged" bitfld.long 0x00 18. " INT_ACK[18] , The assertion of the inhibit_dram_cmd parameter has successfully inhibited the command queue and/or MRR traffic" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 17. " INT_ACK[17] , The register interfaceinitiated mode register write has completed and another mode register" "Not acknowledged,Acknowledged" bitfld.long 0x00 16. " INT_ACK[16] , The leveling operation has completed" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 15. " INT_ACK[15] , A leveling operation has been requested" "Not acknowledged,Acknowledged" bitfld.long 0x00 14. " INT_ACK[14] , A DFI update error has occurred" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 13. " INT_ACK[13] , A write leveling error has occurred" "Not acknowledged,Acknowledged" bitfld.long 0x00 12. " INT_ACK[12] , A read leveling gate training error has occurred" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 11. " INT_ACK[11] , A read leveling error has occurred" "Not acknowledged,Acknowledged" bitfld.long 0x00 10. " INT_ACK[10] , ODT has been enabled while the MC is programmed for CAS latency 3" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 9. " INT_ACK[9] , The DRAM initialization has been completed" "Not acknowledged,Acknowledged" bitfld.long 0x00 8. " INT_ACK[8] , An error occurred on the port data channel" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 7. " INT_ACK[7] , An error occurred on the port command channel" "Not acknowledged,Acknowledged" bitfld.long 0x00 6. " INT_ACK[6] , Multiple uncorrectable ECC events have been detected" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 5. " INT_ACK[5] , An uncorrectable ECC event has been detected" "Not acknowledged,Acknowledged" bitfld.long 0x00 4. " INT_ACK[4] , Multiple correctable ECC events have been detected" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 3. " INT_ACK[3] , A correctable ECC event has been detected" "Not acknowledged,Acknowledged" bitfld.long 0x00 2. " INT_ACK[2] , Multiple accesses outside the defined PHYSICAL memory space have occurred" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x00 1. " INT_ACK[1] , A memory access outside the defined PHYSICAL memory space has occurred" "Not acknowledged,Acknowledged" bitfld.long 0x00 0. " INT_ACK[0] , The memory reset is valid on the DFI bus" "Not acknowledged,Acknowledged" group.long 0x1A0++0x03 line.long 0x00 "MPMC_CTRL_REG_104, Controller configuration register 104" bitfld.long 0x00 21. " INT_MASK[21] , Logical OR of all lower bits" "Not masked,Masked" bitfld.long 0x00 20. " INT_MASK[20] , The user-initiated DLL resync has completed" "Not masked,Masked" textline " " bitfld.long 0x00 19. " INT_MASK[19] , A state change has been detected on the dfi_init_complete signal" "Not masked,Masked" bitfld.long 0x00 18. " INT_MASK[18] , The assertion of the inhibit_dram_cmd parameter has successfully inhibited the command queue and/or MRR traffic" "Not masked,Masked" textline " " bitfld.long 0x00 17. " INT_MASK[17] , The register interfaceinitiated mode register write has completed and another mode register" "Not masked,Masked" bitfld.long 0x00 16. " INT_MASK[16] , The leveling operation has completed" "Not masked,Masked" textline " " bitfld.long 0x00 15. " INT_MASK[15] , A leveling operation has been requested" "Not masked,Masked" bitfld.long 0x00 14. " INT_MASK[14] , A DFI update error has occurred" "Not masked,Masked" textline " " bitfld.long 0x00 13. " INT_MASK[13] , A write leveling error has occurred" "Not masked,Masked" bitfld.long 0x00 12. " INT_MASK[12] , A read leveling gate training error has occurred" "Not masked,Masked" textline " " bitfld.long 0x00 11. " INT_MASK[11] , A read leveling error has occurred" "Not masked,Masked" bitfld.long 0x00 10. " INT_MASK[10] , ODT has been enabled while the MC is programmed for CAS latency 3" "Not masked,Masked" textline " " bitfld.long 0x00 9. " INT_MASK[9] , The DRAM initialization has been completed" "Not masked,Masked" bitfld.long 0x00 8. " INT_MASK[8] , An error occurred on the port data channel" "Not masked,Masked" textline " " bitfld.long 0x00 7. " INT_MASK[7] , An error occurred on the port command channel" "Not masked,Masked" bitfld.long 0x00 6. " INT_MASK[6] , Multiple uncorrectable ECC events have been detected" "Not masked,Masked" textline " " bitfld.long 0x00 5. " INT_MASK[5] , An uncorrectable ECC event has been detected" "Not masked,Masked" bitfld.long 0x00 4. " INT_MASK[4] , Multiple correctable ECC events have been detected" "Not masked,Masked" textline " " bitfld.long 0x00 3. " INT_MASK[3] , A correctable ECC event has been detected" "Not masked,Masked" bitfld.long 0x00 2. " INT_MASK[2] , Multiple accesses outside the defined PHYSICAL memory space have occurred" "Not masked,Masked" textline " " bitfld.long 0x00 1. " INT_MASK[1] , A memory access outside the defined PHYSICAL memory space has occurred" "Not masked,Masked" bitfld.long 0x00 0. " INT_MASK[0] , The memory reset is valid on the DFI bus" "Not masked,Masked" rgroup.long 0x1A4++0x03 line.long 0x00 "MPMC_CTRL_REG_105, Controller configuration register 105" bitfld.long 0x00 21. " INT_STATUS[21] , Logical OR of all lower bits" "No interrupt,Interrupt" bitfld.long 0x00 20. " INT_STATUS[20] , The user-initiated DLL resync has completed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 19. " INT_STATUS[19] , A state change has been detected on the dfi_init_complete signal" "No interrupt,Interrupt" bitfld.long 0x00 18. " INT_STATUS[18] , The assertion of the inhibit_dram_cmd parameter has successfully inhibited the command queue and/or MRR traffic" "No interrupt,Interrupt" textline " " bitfld.long 0x00 17. " INT_STATUS[17] , The register interfaceinitiated mode register write has completed and another mode register" "No interrupt,Interrupt" bitfld.long 0x00 16. " INT_STATUS[16] , The leveling operation has completed" "No interrupt,Interrupt" textline " " bitfld.long 0x00 15. " INT_STATUS[15] , A leveling operation has been requested" "No interrupt,Interrupt" bitfld.long 0x00 14. " INT_STATUS[14] , A DFI update error has occurred" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " INT_STATUS[13] , A write leveling error has occurred" "No interrupt,Interrupt" bitfld.long 0x00 12. " INT_STATUS[12] , A read leveling gate training error has occurred" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " INT_STATUS[11] , A read leveling error has occurred" "No interrupt,Interrupt" bitfld.long 0x00 10. " INT_STATUS[10] , ODT has been enabled while the MC is programmed for CAS latency 3" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " INT_STATUS[9] , The DRAM initialization has been completed" "No interrupt,Interrupt" bitfld.long 0x00 8. " INT_STATUS[8] , An error occurred on the port data channel" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " INT_STATUS[7] , An error occurred on the port command channel" "No interrupt,Interrupt" bitfld.long 0x00 6. " INT_STATUS[6] , Multiple uncorrectable ECC events have been detected" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " INT_STATUS[5] , An uncorrectable ECC event has been detected" "No interrupt,Interrupt" bitfld.long 0x00 4. " INT_STATUS[4] , Multiple correctable ECC events have been detected" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " INT_STATUS[3] , A correctable ECC event has been detected" "No interrupt,Interrupt" bitfld.long 0x00 2. " INT_STATUS[2] , Multiple accesses outside the defined PHYSICAL memory space have occurred" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " INT_STATUS[1] , A memory access outside the defined PHYSICAL memory space has occurred" "No interrupt,Interrupt" bitfld.long 0x00 0. " INT_STATUS[0] , The memory reset is valid on the DFI bus" "No interrupt,Interrupt" group.long 0x1AC++0x37 line.long 0x00 "MPMC_CTRL_REG_107, Controller configuration register 107: PHY conf reg 8 for data slice 0" bitfld.long 0x00 14. " LOOPBACK_CONTROL[14] , Initiate loopback for data slice" "Stop,Go" bitfld.long 0x00 12.--13. " LOOPBACK_CONTROL[12:13] , Data slice loopback duration" "Free,1024,8192,64K" textline " " bitfld.long 0x00 11. " LOOPBACK_CONTROL[11] , Data slice loopback clear data error" "No error,Error" bitfld.long 0x00 10. " LOOPBACK_CONTROL[10] , Data slice loopback data type" "LFSR,Clock" textline " " bitfld.long 0x00 9. " LOOPBACK_CONTROL[9] , Data slice loopback multiplexer use" "Internal,External" bitfld.long 0x00 8. " LOOPBACK_CONTROL[8] , Data slice loopback enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DDR3_MODE , Data slice 0 DDR3 mode enable" "Disabled,Enabled" line.long 0x04 "MPMC_CTRL_REG_108, Controller configuration register 108: PHY conf reg 8 for data slice 1" bitfld.long 0x04 14. " LOOPBACK_CONTROL[14] , Initiate loopback for data slice" "Stop,Go" bitfld.long 0x04 12.--13. " LOOPBACK_CONTROL[12:13] , Data slice loopback duration" "Free,1024,8192,64K" textline " " bitfld.long 0x04 11. " LOOPBACK_CONTROL[11] , Data slice loopback clear data error" "No error,Error" bitfld.long 0x04 10. " LOOPBACK_CONTROL[10] , Data slice loopback data type" "LFSR,Clock" textline " " bitfld.long 0x04 9. " LOOPBACK_CONTROL[9] , Data slice loopback multiplexer use" "Internal,External" bitfld.long 0x04 8. " LOOPBACK_CONTROL[8] , Data slice loopback enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " DDR3_MODE , Data slice 1 DDR3 mode enable" "Disabled,Enabled" line.long 0x08 "MPMC_CTRL_REG_109, Controller configuration register 109: PHY conf reg 8 for data slice 2" bitfld.long 0x08 14. " LOOPBACK_CONTROL[14] , Initiate loopback for data slice" "Stop,Go" bitfld.long 0x08 12.--13. " LOOPBACK_CONTROL[12:13] , Data slice loopback duration" "Free,1024,8192,64K" textline " " bitfld.long 0x08 11. " LOOPBACK_CONTROL[11] , Data slice loopback clear data error" "No error,Error" bitfld.long 0x08 10. " LOOPBACK_CONTROL[10] , Data slice loopback data type" "LFSR,Clock" textline " " bitfld.long 0x08 9. " LOOPBACK_CONTROL[9] , Data slice loopback multiplexer use" "Internal,External" bitfld.long 0x08 8. " LOOPBACK_CONTROL[8] , Data slice loopback enable" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " DDR3_MODE , Data slice 2 DDR3 mode enable" "Disabled,Enabled" line.long 0x0C "MPMC_CTRL_REG_110, Controller configuration register 110: PHY conf reg 8 for data slice 3" bitfld.long 0x0C 14. " LOOPBACK_CONTROL[14] , Initiate loopback for data slice" "Stop,Go" bitfld.long 0x0C 12.--13. " LOOPBACK_CONTROL[12:13] , Data slice loopback duration" "Free,1024,8192,64K" textline " " bitfld.long 0x0C 11. " LOOPBACK_CONTROL[11] , Data slice loopback clear data error" "No error,Error" bitfld.long 0x0C 10. " LOOPBACK_CONTROL[10] , Data slice loopback data type" "LFSR,Clock" textline " " bitfld.long 0x0C 9. " LOOPBACK_CONTROL[9] , Data slice loopback multiplexer use" "Internal,External" bitfld.long 0x0C 8. " LOOPBACK_CONTROL[8] , Data slice loopback enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " DDR3_MODE , Data slice 3 DDR3 mode enable" "Disabled,Enabled" line.long 0x10 "MPMC_CTRL_REG_111, Controller configuration register 111: PHY conf reg 8 for data slice 4" bitfld.long 0x10 14. " LOOPBACK_CONTROL[14] , Initiate loopback for data slice" "Stop,Go" bitfld.long 0x10 12.--13. " LOOPBACK_CONTROL[12:13] , Data slice loopback duration" "Free,1024,8192,64K" textline " " bitfld.long 0x10 11. " LOOPBACK_CONTROL[11] , Data slice loopback clear data error" "No error,Error" bitfld.long 0x10 10. " LOOPBACK_CONTROL[10] , Data slice loopback data type" "LFSR,Clock" textline " " bitfld.long 0x10 9. " LOOPBACK_CONTROL[9] , Data slice loopback multiplexer use" "Internal,External" bitfld.long 0x10 8. " LOOPBACK_CONTROL[8] , Data slice loopback enable" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " DDR3_MODE , Data slice 4 DDR3 mode enable" "Disabled,Enabled" line.long 0x14 "MPMC_CTRL_REG_112, Controller configuration register 112" hexmask.long.tbyte 0x14 0.--23. 1. " TINIT , Defines the DRAM initialization time" line.long 0x18 "MPMC_CTRL_REG_113, Controller configuration register 113" hexmask.long 0x18 0.--27. 1. " XOR_CHECK_BITS , When the fwc parameter is set, the check bits generated by the next write operation will be XORed with this parameter" line.long 0x1C "MPMC_CTRL_REG_114, Controller configuration register 114" line.long 0x20 "MPMC_CTRL_REG_115, Controller configuration register 115: DLL reg 0 for data slice 0" bitfld.long 0x20 16. " DLL_CTRL_REG_0_0_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x20 15. " DLL_CTRL_REG_0_0_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x20 12.--14. " DLL_CTRL_REG_0_0_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x20 11. " DLL_CTRL_REG_0_0_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x20 8.--10. " DLL_CTRL_REG_0_0_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" line.long 0x24 "MPMC_CTRL_REG_116, Controller configuration register 116: DLL reg 0 for data slice 1" bitfld.long 0x24 16. " DLL_CTRL_REG_0_1_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x24 15. " DLL_CTRL_REG_0_1_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x24 12.--14. " DLL_CTRL_REG_0_1_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x24 11. " DLL_CTRL_REG_0_1_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x24 8.--10. " DLL_CTRL_REG_0_1_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" line.long 0x28 "MPMC_CTRL_REG_117, Controller configuration register 117: DLL reg 0 for data slice 2" bitfld.long 0x28 16. " DLL_CTRL_REG_0_2_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x28 15. " DLL_CTRL_REG_0_2_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x28 12.--14. " DLL_CTRL_REG_0_2_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x28 11. " DLL_CTRL_REG_0_2_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x28 8.--10. " DLL_CTRL_REG_0_2_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" line.long 0x2C "MPMC_CTRL_REG_118, Controller configuration register 118: DLL reg 0 for data slice 3" bitfld.long 0x2C 16. " DLL_CTRL_REG_0_3_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x2C 15. " DLL_CTRL_REG_0_3_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x2C 12.--14. " DLL_CTRL_REG_0_3_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x2C 11. " DLL_CTRL_REG_0_3_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x2C 8.--10. " DLL_CTRL_REG_0_3_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" line.long 0x30 "MPMC_CTRL_REG_119, Controller configuration register 119: DLL reg 0 for data slice 4" bitfld.long 0x30 16. " DLL_CTRL_REG_0_4_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x30 15. " DLL_CTRL_REG_0_4_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x30 12.--14. " DLL_CTRL_REG_0_4_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x30 11. " DLL_CTRL_REG_0_4_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x30 8.--10. " DLL_CTRL_REG_0_4_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" line.long 0x34 "MPMC_CTRL_REG_120, Controller configuration register 120: DLL reg 0 for addr/ctrl slice" bitfld.long 0x34 16. " DLL_CTRL_REG_2_16 , Active high power down signal for the DLL" "No effect,Powered down" bitfld.long 0x34 15. " DLL_CTRL_REG_2_15 , Inverts dll_testclk2_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x34 12.--14. " DLL_CTRL_REG_2_14TO12 , Test control inputs for DLL output dll_tstclk2_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" bitfld.long 0x34 11. " DLL_CTRL_REG_2_11 , Inverts dll_testclk1_out_0" "Not inverted,Inverted" textline " " bitfld.long 0x34 8.--10. " DLL_CTRL_REG_2_10TO8 , Test control inputs for DLL output dll_tstclk1_out_0" "CLKOUT [0],CLKOUT [2],CLKOUT [4],CLKOUT [6],Ref_pd,Fb_pd,CLKOUT [1],CLKOUT [3]" rgroup.long 0x1E4++0x07 line.long 0x00 "MPMC_CTRL_REG_121, Controller configuration register 121" line.long 0x04 "MPMC_CTRL_REG_122, Controller configuration register 122" group.long 0x1F0++0x13 line.long 0x0 "MPMC_CTRL_REG_124, Controller configuration register 124: PHY conf reg 0 for data slice 0" bitfld.long 0x0 29.--31. " WR_DQ_COARSE_REG , Number of cycles (+1) that the modified dfi_wrdata-based signal will be delayed before data/mask is captured" "0,1,2,3,4,5,6,7" bitfld.long 0x0 26.--27. " RD_DQ_WINDOW_SIZE_REG , Number of locations from the phy_ctrl_conf reg_2_0 [23:0] or phy_ctrl_conf reg_3_0 [23:0] settings that are valid" "All 8 settings are valid,6 settings are valid,4 settings are valid,?..." bitfld.long 0x0 20.--22. " RD_DQS_GATE_COARSE_REG , Number of cycles (+1) that the modified dfi_rddata_en-based signal will be delayed to form the coarse gate" "0,1,2,3,4,5,6,7" bitfld.long 0x0 19. " RD_DQS_FALL_DISABLE_REG[5] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x0 18. " RD_DQS_FALL_DISABLE_REG[4] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 17. " RD_DQS_FALL_DISABLE_REG[3] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 16. " RD_DQS_FALL_DISABLE_REG[2] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 15. " RD_DQS_FALL_DISABLE_REG[1] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x0 14. " RD_DQS_FALL_DISABLE_REG[0] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 13. " D_DQS_RISE_DISABLE_REG[5] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 12. " D_DQS_RISE_DISABLE_REG[4] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 11. " D_DQS_RISE_DISABLE_REG[3] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x0 10. " D_DQS_RISE_DISABLE_REG[2] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 9. " D_DQS_RISE_DISABLE_REG[1] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 8. " D_DQS_RISE_DISABLE_REG[0] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x0 0. " MANUAL_RESET , Manual Reset" "No effect,Reset" line.long 0x4 "MPMC_CTRL_REG_125, Controller configuration register 124: PHY conf reg 0 for data slice 1" bitfld.long 0x4 29.--31. " WR_DQ_COARSE_REG , Number of cycles (+1) that the modified dfi_wrdata-based signal will be delayed before data/mask is captured" "0,1,2,3,4,5,6,7" bitfld.long 0x4 26.--27. " RD_DQ_WINDOW_SIZE_REG , Number of locations from the phy_ctrl_conf reg_2_1 [23:0] or phy_ctrl_conf reg_3_1 [23:0] settings that are valid" "All 8 settings are valid,6 settings are valid,4 settings are valid,?..." bitfld.long 0x4 20.--22. " RD_DQS_GATE_COARSE_REG , Number of cycles (+1) that the modified dfi_rddata_en-based signal will be delayed to form the coarse gate" "0,1,2,3,4,5,6,7" bitfld.long 0x4 19. " RD_DQS_FALL_DISABLE_REG[5] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x4 18. " RD_DQS_FALL_DISABLE_REG[4] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 17. " RD_DQS_FALL_DISABLE_REG[3] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 16. " RD_DQS_FALL_DISABLE_REG[2] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 15. " RD_DQS_FALL_DISABLE_REG[1] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x4 14. " RD_DQS_FALL_DISABLE_REG[0] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 13. " D_DQS_RISE_DISABLE_REG[5] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 12. " D_DQS_RISE_DISABLE_REG[4] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 11. " D_DQS_RISE_DISABLE_REG[3] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x4 10. " D_DQS_RISE_DISABLE_REG[2] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 9. " D_DQS_RISE_DISABLE_REG[1] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 8. " D_DQS_RISE_DISABLE_REG[0] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x4 0. " MANUAL_RESET , Manual Reset" "No effect,Reset" line.long 0x8 "MPMC_CTRL_REG_126, Controller configuration register 124: PHY conf reg 0 for data slice 2" bitfld.long 0x8 29.--31. " WR_DQ_COARSE_REG , Number of cycles (+1) that the modified dfi_wrdata-based signal will be delayed before data/mask is captured" "0,1,2,3,4,5,6,7" bitfld.long 0x8 26.--27. " RD_DQ_WINDOW_SIZE_REG , Number of locations from the phy_ctrl_conf reg_2_2 [23:0] or phy_ctrl_conf reg_3_2 [23:0] settings that are valid" "All 8 settings are valid,6 settings are valid,4 settings are valid,?..." bitfld.long 0x8 20.--22. " RD_DQS_GATE_COARSE_REG , Number of cycles (+1) that the modified dfi_rddata_en-based signal will be delayed to form the coarse gate" "0,1,2,3,4,5,6,7" bitfld.long 0x8 19. " RD_DQS_FALL_DISABLE_REG[5] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x8 18. " RD_DQS_FALL_DISABLE_REG[4] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 17. " RD_DQS_FALL_DISABLE_REG[3] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 16. " RD_DQS_FALL_DISABLE_REG[2] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 15. " RD_DQS_FALL_DISABLE_REG[1] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x8 14. " RD_DQS_FALL_DISABLE_REG[0] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 13. " D_DQS_RISE_DISABLE_REG[5] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 12. " D_DQS_RISE_DISABLE_REG[4] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 11. " D_DQS_RISE_DISABLE_REG[3] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x8 10. " D_DQS_RISE_DISABLE_REG[2] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 9. " D_DQS_RISE_DISABLE_REG[1] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 8. " D_DQS_RISE_DISABLE_REG[0] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x8 0. " MANUAL_RESET , Manual Reset" "No effect,Reset" line.long 0xC "MPMC_CTRL_REG_127, Controller configuration register 124: PHY conf reg 0 for data slice 3" bitfld.long 0xC 29.--31. " WR_DQ_COARSE_REG , Number of cycles (+1) that the modified dfi_wrdata-based signal will be delayed before data/mask is captured" "0,1,2,3,4,5,6,7" bitfld.long 0xC 26.--27. " RD_DQ_WINDOW_SIZE_REG , Number of locations from the phy_ctrl_conf reg_2_3 [23:0] or phy_ctrl_conf reg_3_3 [23:0] settings that are valid" "All 8 settings are valid,6 settings are valid,4 settings are valid,?..." bitfld.long 0xC 20.--22. " RD_DQS_GATE_COARSE_REG , Number of cycles (+1) that the modified dfi_rddata_en-based signal will be delayed to form the coarse gate" "0,1,2,3,4,5,6,7" bitfld.long 0xC 19. " RD_DQS_FALL_DISABLE_REG[5] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0xC 18. " RD_DQS_FALL_DISABLE_REG[4] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 17. " RD_DQS_FALL_DISABLE_REG[3] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 16. " RD_DQS_FALL_DISABLE_REG[2] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 15. " RD_DQS_FALL_DISABLE_REG[1] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0xC 14. " RD_DQS_FALL_DISABLE_REG[0] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 13. " D_DQS_RISE_DISABLE_REG[5] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 12. " D_DQS_RISE_DISABLE_REG[4] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 11. " D_DQS_RISE_DISABLE_REG[3] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0xC 10. " D_DQS_RISE_DISABLE_REG[2] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 9. " D_DQS_RISE_DISABLE_REG[1] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 8. " D_DQS_RISE_DISABLE_REG[0] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0xC 0. " MANUAL_RESET , Manual Reset" "No effect,Reset" line.long 0x10 "MPMC_CTRL_REG_128, Controller configuration register 124: PHY conf reg 0 for data slice 4" bitfld.long 0x10 29.--31. " WR_DQ_COARSE_REG , Number of cycles (+1) that the modified dfi_wrdata-based signal will be delayed before data/mask is captured" "0,1,2,3,4,5,6,7" bitfld.long 0x10 26.--27. " RD_DQ_WINDOW_SIZE_REG , Number of locations from the phy_ctrl_conf reg_2_4 [23:0] or phy_ctrl_conf reg_3_4 [23:0] settings that are valid" "All 8 settings are valid,6 settings are valid,4 settings are valid,?..." bitfld.long 0x10 20.--22. " RD_DQS_GATE_COARSE_REG , Number of cycles (+1) that the modified dfi_rddata_en-based signal will be delayed to form the coarse gate" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. " RD_DQS_FALL_DISABLE_REG[5] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x10 18. " RD_DQS_FALL_DISABLE_REG[4] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 17. " RD_DQS_FALL_DISABLE_REG[3] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 16. " RD_DQS_FALL_DISABLE_REG[2] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 15. " RD_DQS_FALL_DISABLE_REG[1] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x10 14. " RD_DQS_FALL_DISABLE_REG[0] , Disables the falling edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 13. " D_DQS_RISE_DISABLE_REG[5] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 12. " D_DQS_RISE_DISABLE_REG[4] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 11. " D_DQS_RISE_DISABLE_REG[3] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" textline " " bitfld.long 0x10 10. " D_DQS_RISE_DISABLE_REG[2] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 9. " D_DQS_RISE_DISABLE_REG[1] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 8. " D_DQS_RISE_DISABLE_REG[0] , Disables the rising edge pattern match of the corresponding bit in the DQS 6-bit pattern sample" "No,Yes" bitfld.long 0x10 0. " MANUAL_RESET , Manual Reset" "No effect,Reset" group.long 0x204++0x03 line.long 0x00 "MPMC_CTRL_REG_129, Controller configuration register 129: PHY conf reg 10 for addr/ctrl slice" bitfld.long 0x00 27. " CLK_DISABLE_POLARITY , Defines polarity of the dram_clk_disable_conf reg" "Not inverted,Inverted" bitfld.long 0x00 20.--22. " WRLVL_BASE_OFFSET_REG , Specifies the number of phases behind the calibrated clk_ref setting to set the wrlvl_delay base value of 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 19. " RECAL_ONCE_REG , Calibration when the dfi_ctrlupd_req signal is asserted by the MC" "Not calibrated,Calibrated" bitfld.long 0x00 18. " RECAL_ALL_REG , Calibration on every assertion of the dfi_ctrlupd_req signal from the MC" "Not calibrated,Calibrated" textline " " bitfld.long 0x00 15.--17. " CTL_CALL_OFFSET_REG , Type of adjustment to apply to ctl_8phase_sel_conf reg and ctl_source_sel_conf reg when ctl_sel_adjust is set" "Reserved,Reserved,Reserved,Reserved,Subtract 1,Subtract 2,Add 1,Add 2" bitfld.long 0x00 14. " LOOPBACK_CONTROL_START , Initiate loopback for address/control" "Stop,Go" textline " " bitfld.long 0x00 12.--13. " LOOPBACK_DURATION , Address/control loopback duration" "Free running,1024 clocks,8192 clocks,64K clocks" bitfld.long 0x00 11. " LOOPBACK_CLEAR_DATA_ERROR , Address/control loopback/clear data error" "No error,Error" textline " " bitfld.long 0x00 10. " LOOPBACK_CONTROL_ENABLE , Address/control loopback enable" "Disabled,Enabled" bitfld.long 0x00 9. " CLEAR_FIFO_REG , FIFO clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 8. " CTL_SEL_OVERRIDE_REG , Override the automatic calibration settings" "No override,Override" bitfld.long 0x00 6.--7. " CTL_MUX_SEL_REG , Selects the clock phase for the flip-flop that sources the input to the output stage flip-flop" "Positive edge,Negative edge,Cycle-delayed positive edge,?..." textline " " bitfld.long 0x00 3.--5. " CTL_SOURCE_SEL_REG , Selects 1 of 8 clock phases to drive the second source of data to the output stage flip-flop" "1,2,3,4,5,6,7,8" bitfld.long 0x00 0.--2. " CTL_8PHASE_SEL_REG , Selects 1 of 8 clock phases to drive the output stage flip-flop" "1,2,3,4,5,6,7,8" group.long 0x208++0x13 line.long 0x0 "MPMC_CTRL_REG_130, Controller configuration register 130: PHY conf reg 1 for data slice 0" bitfld.long 0x0 28.--29. " WR_DQ_OE_DEASSERT_FINE_REG , Delay of the write DQ/DM output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x0 25.--27. " WR_DQ_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 23.--24. " WR_DQ_OE_ASSERT_FINE_REG , Delay of the write DQ/ DM output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 20.--22. " WR_DQ_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarseassertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 18.--19. " WR_DQS_OE_DEASSERT_FINE_REG , Delay of the write DQS output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x0 15.--17. " WR_DQS_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 13.--14. " WR_DQS_OE_ASSERT_FINE_REG , Delay of the write DQS output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 10.--12. " WR_DQS_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 8.--9. " WR_DQS_GATE_DEASSERT_FINE_REG , Delay of the write DQS gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 5.--7. " WR_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 3.--4. " WR_DQS_GATE_ASSERT_FINE_REG , Delay of the write DQS gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 0.--2. " WR_DQS_GATE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS gate (in cycles)" "0/1,1,2,3,4,5,6,7" line.long 0x4 "MPMC_CTRL_REG_131, Controller configuration register 131: PHY conf reg 1 for data slice 1" bitfld.long 0x4 28.--29. " WR_DQ_OE_DEASSERT_FINE_REG , Delay of the write DQ/DM output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x4 25.--27. " WR_DQ_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 23.--24. " WR_DQ_OE_ASSERT_FINE_REG , Delay of the write DQ/ DM output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 20.--22. " WR_DQ_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarseassertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 18.--19. " WR_DQS_OE_DEASSERT_FINE_REG , Delay of the write DQS output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x4 15.--17. " WR_DQS_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 13.--14. " WR_DQS_OE_ASSERT_FINE_REG , Delay of the write DQS output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 10.--12. " WR_DQS_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 8.--9. " WR_DQS_GATE_DEASSERT_FINE_REG , Delay of the write DQS gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 5.--7. " WR_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 3.--4. " WR_DQS_GATE_ASSERT_FINE_REG , Delay of the write DQS gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 0.--2. " WR_DQS_GATE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS gate (in cycles)" "0/1,1,2,3,4,5,6,7" line.long 0x8 "MPMC_CTRL_REG_132, Controller configuration register 132: PHY conf reg 1 for data slice 2" bitfld.long 0x8 28.--29. " WR_DQ_OE_DEASSERT_FINE_REG , Delay of the write DQ/DM output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x8 25.--27. " WR_DQ_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 23.--24. " WR_DQ_OE_ASSERT_FINE_REG , Delay of the write DQ/ DM output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 20.--22. " WR_DQ_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarseassertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 18.--19. " WR_DQS_OE_DEASSERT_FINE_REG , Delay of the write DQS output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x8 15.--17. " WR_DQS_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 13.--14. " WR_DQS_OE_ASSERT_FINE_REG , Delay of the write DQS output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 10.--12. " WR_DQS_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 8.--9. " WR_DQS_GATE_DEASSERT_FINE_REG , Delay of the write DQS gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 5.--7. " WR_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 3.--4. " WR_DQS_GATE_ASSERT_FINE_REG , Delay of the write DQS gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 0.--2. " WR_DQS_GATE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS gate (in cycles)" "0/1,1,2,3,4,5,6,7" line.long 0xC "MPMC_CTRL_REG_133, Controller configuration register 133: PHY conf reg 1 for data slice 3" bitfld.long 0xC 28.--29. " WR_DQ_OE_DEASSERT_FINE_REG , Delay of the write DQ/DM output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0xC 25.--27. " WR_DQ_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 23.--24. " WR_DQ_OE_ASSERT_FINE_REG , Delay of the write DQ/ DM output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 20.--22. " WR_DQ_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarseassertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 18.--19. " WR_DQS_OE_DEASSERT_FINE_REG , Delay of the write DQS output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0xC 15.--17. " WR_DQS_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 13.--14. " WR_DQS_OE_ASSERT_FINE_REG , Delay of the write DQS output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 10.--12. " WR_DQS_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 8.--9. " WR_DQS_GATE_DEASSERT_FINE_REG , Delay of the write DQS gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 5.--7. " WR_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 3.--4. " WR_DQS_GATE_ASSERT_FINE_REG , Delay of the write DQS gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 0.--2. " WR_DQS_GATE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS gate (in cycles)" "0/1,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_134, Controller configuration register 134: PHY conf reg 1 for data slice 4" bitfld.long 0x10 28.--29. " WR_DQ_OE_DEASSERT_FINE_REG , Delay of the write DQ/DM output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x10 25.--27. " WR_DQ_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 23.--24. " WR_DQ_OE_ASSERT_FINE_REG , Delay of the write DQ/ DM output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 20.--22. " WR_DQ_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarseassertion for the DQ/DM OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 18.--19. " WR_DQS_OE_DEASSERT_FINE_REG , Delay of the write DQS output enable de-assertion from the coarse adjustment value" "0 clk delay,1/4 clk delay,1/2 clk delay,?..." bitfld.long 0x10 15.--17. " WR_DQS_OE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 13.--14. " WR_DQS_OE_ASSERT_FINE_REG , Delay of the write DQS output enable assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 10.--12. " WR_DQS_OE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS OE" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 8.--9. " WR_DQS_GATE_DEASSERT_FINE_REG , Delay of the write DQS gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 5.--7. " WR_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the DQS gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--4. " WR_DQS_GATE_ASSERT_FINE_REG , Delay of the write DQS gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 0.--2. " WR_DQS_GATE_COARSE_ASSERT_REG , Number of cycles that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the DQS gate (in cycles)" "0/1,1,2,3,4,5,6,7" group.long 0x21C++0x13 line.long 0x0 "MPMC_CTRL_REG_135, Controller configuration register 135: PHY conf reg 2 for data slice 0" bitfld.long 0x0 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x0 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x0 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x0 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x0 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x0 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x0 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x0 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." line.long 0x4 "MPMC_CTRL_REG_136, Controller configuration register 136: PHY conf reg 2 for data slice 1" bitfld.long 0x4 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x4 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x4 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x4 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x4 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x4 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x4 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x4 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." line.long 0x8 "MPMC_CTRL_REG_137, Controller configuration register 137: PHY conf reg 2 for data slice 2" bitfld.long 0x8 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x8 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x8 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x8 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x8 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x8 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x8 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x8 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." line.long 0xC "MPMC_CTRL_REG_138, Controller configuration register 138: PHY conf reg 2 for data slice 3" bitfld.long 0xC 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0xC 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0xC 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0xC 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0xC 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0xC 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0xC 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0xC 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." line.long 0x10 "MPMC_CTRL_REG_139, Controller configuration register 139: PHY conf reg 2 for data slice 4" bitfld.long 0x10 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x10 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x10 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x10 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x10 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x10 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." textline " " bitfld.long 0x10 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." bitfld.long 0x10 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,?..." group.long 0x230++0x13 line.long 0x0 "MPMC_CTRL_REG_140, Controller configuration register 140: PHY conf reg 3 for data slice 0" bitfld.long 0x0 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x0 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x0 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x0 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x0 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" line.long 0x4 "MPMC_CTRL_REG_141, Controller configuration register 141: PHY conf reg 3 for data slice 1" bitfld.long 0x4 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x4 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x4 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x4 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x4 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" line.long 0x8 "MPMC_CTRL_REG_142, Controller configuration register 142: PHY conf reg 3 for data slice 2" bitfld.long 0x8 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x8 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x8 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x8 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x8 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x8 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" line.long 0xC "MPMC_CTRL_REG_143, Controller configuration register 143: PHY conf reg 3 for data slice 3" bitfld.long 0xC 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0xC 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0xC 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0xC 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0xC 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0xC 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_144, Controller configuration register 144: PHY conf reg 3 for data slice 4" bitfld.long 0x10 29. " RD_DQ_RISE_PATTERN_REG_5 , Enable pattern pulse #2 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 28. " RD_DQ_RISE_PATTERN_REG_4 , Enable pattern pulse #1 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " RD_DQ_RISE_PATTERN_REG_3 , Enable pattern two bit #3 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 26. " RD_DQ_RISE_PATTERN_REG_2 , Enable pattern two bit #2 detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 25. " RD_DQ_RISE_PATTERN_REG_1 , Enable pattern two bit #1 detect for the rising edge of DQS" "Disabled,Enabled" bitfld.long 0x10 24. " RD_DQ_RISE_PATTERN_REG_0 , Enable pattern center detect for the rising edge of DQS" "Disabled,Enabled" textline " " bitfld.long 0x10 21.--23. " RD_DQ7_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq7) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x10 18.--20. " RD_DQ6_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq6) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 15.--17. " RD_DQ5_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq5) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. " RD_DQ4_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq4) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 9.--11. " RD_DQ3_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq3) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. " RD_DQ2_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq2) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--5. " RD_DQ1_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq1) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--2. " RD_DQ0_RISE_POSITION_OFFSET_REG , Offset of the 4-bit data window (dq0) location relative to the dfi_rdlvl_delay_0 base position for the rising DQS edge" "0,1,2,3,4,5,6,7" group.long 0x244++0x13 line.long 0x0 "MPMC_CTRL_REG_145, Controller configuration register 145: PHY conf reg 4 for data slice 0" bitfld.long 0x0 24.--26. " WR_DM_A_TIMING_REG , Identifies the clock phase generating DM prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x0 21.--23. " WR_DQ7_A_TIMING_REG , Identifies the clock phase generating DQ7 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 18.--20. " WR_DQ6_A_TIMING_REG , Identifies the clock phase generating DQ6 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x0 15.--17. " WR_DQ5_A_TIMING_REG , Identifies the clock phase generating DQ5 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 12.--14. " WR_DQ4_A_TIMING_REG , Identifies the clock phase generating DQ4 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x0 9.--11. " WR_DQ3_A_TIMING_REG , Identifies the clock phase generating DQ3 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 6.--8. " WR_DQ2_A_TIMING_REG , Identifies the clock phase generating DQ2 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3.--5. " WR_DQ1_A_TIMING_REG , Identifies the clock phase generating DQ1 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 0.--2. " WR_DQ0_A_TIMING_REG , Identifies the clock phase generating DQ0 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" line.long 0x4 "MPMC_CTRL_REG_146, Controller configuration register 146: PHY conf reg 4 for data slice 1" bitfld.long 0x4 24.--26. " WR_DM_A_TIMING_REG , Identifies the clock phase generating DM prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x4 21.--23. " WR_DQ7_A_TIMING_REG , Identifies the clock phase generating DQ7 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 18.--20. " WR_DQ6_A_TIMING_REG , Identifies the clock phase generating DQ6 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x4 15.--17. " WR_DQ5_A_TIMING_REG , Identifies the clock phase generating DQ5 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 12.--14. " WR_DQ4_A_TIMING_REG , Identifies the clock phase generating DQ4 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x4 9.--11. " WR_DQ3_A_TIMING_REG , Identifies the clock phase generating DQ3 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 6.--8. " WR_DQ2_A_TIMING_REG , Identifies the clock phase generating DQ2 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3.--5. " WR_DQ1_A_TIMING_REG , Identifies the clock phase generating DQ1 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 0.--2. " WR_DQ0_A_TIMING_REG , Identifies the clock phase generating DQ0 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" line.long 0x8 "MPMC_CTRL_REG_147, Controller configuration register 147: PHY conf reg 4 for data slice 2" bitfld.long 0x8 24.--26. " WR_DM_A_TIMING_REG , Identifies the clock phase generating DM prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x8 21.--23. " WR_DQ7_A_TIMING_REG , Identifies the clock phase generating DQ7 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 18.--20. " WR_DQ6_A_TIMING_REG , Identifies the clock phase generating DQ6 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15.--17. " WR_DQ5_A_TIMING_REG , Identifies the clock phase generating DQ5 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 12.--14. " WR_DQ4_A_TIMING_REG , Identifies the clock phase generating DQ4 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x8 9.--11. " WR_DQ3_A_TIMING_REG , Identifies the clock phase generating DQ3 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 6.--8. " WR_DQ2_A_TIMING_REG , Identifies the clock phase generating DQ2 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x8 3.--5. " WR_DQ1_A_TIMING_REG , Identifies the clock phase generating DQ1 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 0.--2. " WR_DQ0_A_TIMING_REG , Identifies the clock phase generating DQ0 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" line.long 0xC "MPMC_CTRL_REG_148, Controller configuration register 148: PHY conf reg 4 for data slice 3" bitfld.long 0xC 24.--26. " WR_DM_A_TIMING_REG , Identifies the clock phase generating DM prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0xC 21.--23. " WR_DQ7_A_TIMING_REG , Identifies the clock phase generating DQ7 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 18.--20. " WR_DQ6_A_TIMING_REG , Identifies the clock phase generating DQ6 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0xC 15.--17. " WR_DQ5_A_TIMING_REG , Identifies the clock phase generating DQ5 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 12.--14. " WR_DQ4_A_TIMING_REG , Identifies the clock phase generating DQ4 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0xC 9.--11. " WR_DQ3_A_TIMING_REG , Identifies the clock phase generating DQ3 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 6.--8. " WR_DQ2_A_TIMING_REG , Identifies the clock phase generating DQ2 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0xC 3.--5. " WR_DQ1_A_TIMING_REG , Identifies the clock phase generating DQ1 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 0.--2. " WR_DQ0_A_TIMING_REG , Identifies the clock phase generating DQ0 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_149, Controller configuration register 149: PHY conf reg 4 for data slice 4" bitfld.long 0x10 24.--26. " WR_DM_A_TIMING_REG , Identifies the clock phase generating DM prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x10 21.--23. " WR_DQ7_A_TIMING_REG , Identifies the clock phase generating DQ7 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 18.--20. " WR_DQ6_A_TIMING_REG , Identifies the clock phase generating DQ6 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x10 15.--17. " WR_DQ5_A_TIMING_REG , Identifies the clock phase generating DQ5 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 12.--14. " WR_DQ4_A_TIMING_REG , Identifies the clock phase generating DQ4 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9.--11. " WR_DQ3_A_TIMING_REG , Identifies the clock phase generating DQ3 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 6.--8. " WR_DQ2_A_TIMING_REG , Identifies the clock phase generating DQ2 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" bitfld.long 0x10 3.--5. " WR_DQ1_A_TIMING_REG , Identifies the clock phase generating DQ1 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 0.--2. " WR_DQ0_A_TIMING_REG , Identifies the clock phase generating DQ0 prior to the rising edge of the DQS clock phase" "0,1,2,3,4,5,6,7" group.long 0x258++0x13 line.long 0x0 "MPMC_CTRL_REG_150, Controller configuration register 150: PHY conf reg 5 for data slice 0" bitfld.long 0x0 8.--9. " WR_DQ_DQS_GATE_DEASSERT_FINE_REG , Delay of the write clock gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 5.--7. " WR_DQ_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the data clock gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 3.--4. " WR_DQ_DQS_GATE_ASSERT_FINE_REG , Delay of the write clock gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 0.--2. " WR_DQ_DQS_GATE_COARSE_ASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the data clock gate" "0,1,2,3,4,5,6,7" line.long 0x4 "MPMC_CTRL_REG_151, Controller configuration register 151: PHY conf reg 5 for data slice 1" bitfld.long 0x4 8.--9. " WR_DQ_DQS_GATE_DEASSERT_FINE_REG , Delay of the write clock gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 5.--7. " WR_DQ_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the data clock gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 3.--4. " WR_DQ_DQS_GATE_ASSERT_FINE_REG , Delay of the write clock gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 0.--2. " WR_DQ_DQS_GATE_COARSE_ASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the data clock gate" "0,1,2,3,4,5,6,7" line.long 0x8 "MPMC_CTRL_REG_152, Controller configuration register 152: PHY conf reg 5 for data slice 2" bitfld.long 0x8 8.--9. " WR_DQ_DQS_GATE_DEASSERT_FINE_REG , Delay of the write clock gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 5.--7. " WR_DQ_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the data clock gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 3.--4. " WR_DQ_DQS_GATE_ASSERT_FINE_REG , Delay of the write clock gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 0.--2. " WR_DQ_DQS_GATE_COARSE_ASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the data clock gate" "0,1,2,3,4,5,6,7" line.long 0xC "MPMC_CTRL_REG_153, Controller configuration register 153: PHY conf reg 5 for data slice 3" bitfld.long 0xC 8.--9. " WR_DQ_DQS_GATE_DEASSERT_FINE_REG , Delay of the write clock gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 5.--7. " WR_DQ_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the data clock gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 3.--4. " WR_DQ_DQS_GATE_ASSERT_FINE_REG , Delay of the write clock gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 0.--2. " WR_DQ_DQS_GATE_COARSE_ASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the data clock gate" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_154, Controller configuration register 154: PHY conf reg 5 for data slice 4" bitfld.long 0x10 8.--9. " WR_DQ_DQS_GATE_DEASSERT_FINE_REG , Delay of the write clock gate de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 5.--7. " WR_DQ_DQS_GATE_COARSE_DEASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse de-assertion for the data clock gate" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--4. " WR_DQ_DQS_GATE_ASSERT_FINE_REG , Delay of the write clock gate assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 0.--2. " WR_DQ_DQS_GATE_COARSE_ASSERT_REG , Number of cycles (+1) that the modified dfi_wrdata_en-based signal will be delayed to form the coarse assertion for the data clock gate" "0,1,2,3,4,5,6,7" group.long 0x26C++0x13 line.long 0x0 "MPMC_CTRL_REG_155, Controller configuration register 155: PHY conf reg 6 for data slice 0" bitfld.long 0x0 28.--29. " TSEL_DQ_RD_DEASSERT_FINE_REG , Delay of the DQ/DM read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 25.--27. " TSEL_DQ_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 23.--24. " TSEL_DQ_RD_ASSERT_FINE_REG , Delay of the DQ/DM read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 20.--22. " TSEL_DQ_RD_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 18.--19. " TSEL_DQS_WR_DEASSERT_FINE_REG , Delay of the DQS write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 15.--17. " TSEL_DQS_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 13.--14. " TSEL_DQS_WR_ASSERT_FINE_REG , Delay of the DQS write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 10.--12. " TSEL_DQS_WR_COARSE_ASSERT_REG , Number of cycles that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 8.--9. " TSEL_DQS_RD_DEASSERT_FINE_REG , Delay of the DQS read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 5.--7. " TSEL_DQS_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 3.--4. " TSEL_DQS_RD_ASSERT_FINE_REG , Delay of the DQS read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 0.--2. " TSEL_DQS_RD_COARSE_ASSERT_REG , Number of cycles that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read assertion" "0,1,2,3,4,5,6,7" line.long 0x4 "MPMC_CTRL_REG_156, Controller configuration register 156: PHY conf reg 6 for data slice 1" bitfld.long 0x4 28.--29. " TSEL_DQ_RD_DEASSERT_FINE_REG , Delay of the DQ/DM read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 25.--27. " TSEL_DQ_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 23.--24. " TSEL_DQ_RD_ASSERT_FINE_REG , Delay of the DQ/DM read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 20.--22. " TSEL_DQ_RD_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 18.--19. " TSEL_DQS_WR_DEASSERT_FINE_REG , Delay of the DQS write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 15.--17. " TSEL_DQS_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 13.--14. " TSEL_DQS_WR_ASSERT_FINE_REG , Delay of the DQS write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 10.--12. " TSEL_DQS_WR_COARSE_ASSERT_REG , Number of cycles that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 8.--9. " TSEL_DQS_RD_DEASSERT_FINE_REG , Delay of the DQS read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 5.--7. " TSEL_DQS_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 3.--4. " TSEL_DQS_RD_ASSERT_FINE_REG , Delay of the DQS read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 0.--2. " TSEL_DQS_RD_COARSE_ASSERT_REG , Number of cycles that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read assertion" "0,1,2,3,4,5,6,7" line.long 0x8 "MPMC_CTRL_REG_157, Controller configuration register 157: PHY conf reg 6 for data slice 2" bitfld.long 0x8 28.--29. " TSEL_DQ_RD_DEASSERT_FINE_REG , Delay of the DQ/DM read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 25.--27. " TSEL_DQ_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 23.--24. " TSEL_DQ_RD_ASSERT_FINE_REG , Delay of the DQ/DM read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 20.--22. " TSEL_DQ_RD_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 18.--19. " TSEL_DQS_WR_DEASSERT_FINE_REG , Delay of the DQS write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 15.--17. " TSEL_DQS_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 13.--14. " TSEL_DQS_WR_ASSERT_FINE_REG , Delay of the DQS write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 10.--12. " TSEL_DQS_WR_COARSE_ASSERT_REG , Number of cycles that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 8.--9. " TSEL_DQS_RD_DEASSERT_FINE_REG , Delay of the DQS read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 5.--7. " TSEL_DQS_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 3.--4. " TSEL_DQS_RD_ASSERT_FINE_REG , Delay of the DQS read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 0.--2. " TSEL_DQS_RD_COARSE_ASSERT_REG , Number of cycles that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read assertion" "0,1,2,3,4,5,6,7" line.long 0xC "MPMC_CTRL_REG_158, Controller configuration register 158: PHY conf reg 6 for data slice 3" bitfld.long 0xC 28.--29. " TSEL_DQ_RD_DEASSERT_FINE_REG , Delay of the DQ/DM read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 25.--27. " TSEL_DQ_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 23.--24. " TSEL_DQ_RD_ASSERT_FINE_REG , Delay of the DQ/DM read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 20.--22. " TSEL_DQ_RD_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 18.--19. " TSEL_DQS_WR_DEASSERT_FINE_REG , Delay of the DQS write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 15.--17. " TSEL_DQS_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 13.--14. " TSEL_DQS_WR_ASSERT_FINE_REG , Delay of the DQS write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 10.--12. " TSEL_DQS_WR_COARSE_ASSERT_REG , Number of cycles that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 8.--9. " TSEL_DQS_RD_DEASSERT_FINE_REG , Delay of the DQS read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 5.--7. " TSEL_DQS_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 3.--4. " TSEL_DQS_RD_ASSERT_FINE_REG , Delay of the DQS read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 0.--2. " TSEL_DQS_RD_COARSE_ASSERT_REG , Number of cycles that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read assertion" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_159, Controller configuration register 159: PHY conf reg 6 for data slice 4" bitfld.long 0x10 28.--29. " TSEL_DQ_RD_DEASSERT_FINE_REG , Delay of the DQ/DM read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 25.--27. " TSEL_DQ_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 23.--24. " TSEL_DQ_RD_ASSERT_FINE_REG , Delay of the DQ/DM read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 20.--22. " TSEL_DQ_RD_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQ/DM read assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 18.--19. " TSEL_DQS_WR_DEASSERT_FINE_REG , Delay of the DQS write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 15.--17. " TSEL_DQS_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 13.--14. " TSEL_DQS_WR_ASSERT_FINE_REG , Delay of the DQS write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 10.--12. " TSEL_DQS_WR_COARSE_ASSERT_REG , Number of cycles that the dfi_wrdata_en signal will be delayed to form the coarse select for DQS write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 8.--9. " TSEL_DQS_RD_DEASSERT_FINE_REG , Delay of the DQS read termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 5.--7. " TSEL_DQS_RD_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 3.--4. " TSEL_DQS_RD_ASSERT_FINE_REG , Delay of the DQS read termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 0.--2. " TSEL_DQS_RD_COARSE_ASSERT_REG , Number of cycles that the dfi_rddata_en signal will be delayed to form the coarse select for DQS read assertion" "0,1,2,3,4,5,6,7" group.long 0x280++0x13 line.long 0x0 "MPMC_CTRL_REG_160, Controller configuration register 160: PHY conf reg 7 for data slice 0" bitfld.long 0x0 26.--27. " TSEL_DQ_WR_DEASSERT_FINE_REG , Delay of the DQ/DM write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 23.--25. " TSEL_DQ_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 21.--22. " TSEL_DQ_WR_ASSERT_FINE_REG , Delay of the DQ/DM write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x0 18.--20. " TSEL_DQ_WR_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 16.--17. " DQ_TSEL_MUX_REG_IDLE , External DQ/DM termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x0 14.--15. " DQ_TSEL_MUX_REG_WRITE , External DQ/DM termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x0 12.--13. " DQ_TSEL_MUX_REG_READ , External DQ/DM termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x0 11. " DQ_TSEL_ENABLE_REG_IDLE , Enables the DQ/DM termination select on an idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " DQ_TSEL_ENABLE_REG_WRITE , Enables the DQ/DM termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x0 9. " DQ_TSEL_ENABLE_REG_READ , Enables the DQ/DM termination select on a read cycle" "Disabled,Enabled" textline " " bitfld.long 0x0 7.--8. " DQS_TSEL_MUX_REG_IDLE , External DQS termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x0 5.--6. " DQS_TSEL_MUX_REG_WRITE , External DQS termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x0 3.--4. " DQS_TSEL_MUX_REG_READ , External DQS termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x0 2. " DQS_TSEL_ENABLE_REG_IDLE , Enables the DQS termination select on a idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x0 1. " DQS_TSEL_ENABLE_REG_WRITE , Enables the DQS termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x0 0. " DQS_TSEL_ENABLE_REG_READ , Enables the DQS termination select on a read cycle" "Disabled,Enabled" line.long 0x4 "MPMC_CTRL_REG_161, Controller configuration register 161: PHY conf reg 7 for data slice 1" bitfld.long 0x4 26.--27. " TSEL_DQ_WR_DEASSERT_FINE_REG , Delay of the DQ/DM write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 23.--25. " TSEL_DQ_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 21.--22. " TSEL_DQ_WR_ASSERT_FINE_REG , Delay of the DQ/DM write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x4 18.--20. " TSEL_DQ_WR_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 16.--17. " DQ_TSEL_MUX_REG_IDLE , External DQ/DM termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x4 14.--15. " DQ_TSEL_MUX_REG_WRITE , External DQ/DM termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x4 12.--13. " DQ_TSEL_MUX_REG_READ , External DQ/DM termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x4 11. " DQ_TSEL_ENABLE_REG_IDLE , Enables the DQ/DM termination select on an idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x4 10. " DQ_TSEL_ENABLE_REG_WRITE , Enables the DQ/DM termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x4 9. " DQ_TSEL_ENABLE_REG_READ , Enables the DQ/DM termination select on a read cycle" "Disabled,Enabled" textline " " bitfld.long 0x4 7.--8. " DQS_TSEL_MUX_REG_IDLE , External DQS termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x4 5.--6. " DQS_TSEL_MUX_REG_WRITE , External DQS termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x4 3.--4. " DQS_TSEL_MUX_REG_READ , External DQS termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x4 2. " DQS_TSEL_ENABLE_REG_IDLE , Enables the DQS termination select on a idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x4 1. " DQS_TSEL_ENABLE_REG_WRITE , Enables the DQS termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x4 0. " DQS_TSEL_ENABLE_REG_READ , Enables the DQS termination select on a read cycle" "Disabled,Enabled" line.long 0x8 "MPMC_CTRL_REG_162, Controller configuration register 162: PHY conf reg 7 for data slice 2" bitfld.long 0x8 26.--27. " TSEL_DQ_WR_DEASSERT_FINE_REG , Delay of the DQ/DM write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 23.--25. " TSEL_DQ_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 21.--22. " TSEL_DQ_WR_ASSERT_FINE_REG , Delay of the DQ/DM write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x8 18.--20. " TSEL_DQ_WR_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 16.--17. " DQ_TSEL_MUX_REG_IDLE , External DQ/DM termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x8 14.--15. " DQ_TSEL_MUX_REG_WRITE , External DQ/DM termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x8 12.--13. " DQ_TSEL_MUX_REG_READ , External DQ/DM termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x8 11. " DQ_TSEL_ENABLE_REG_IDLE , Enables the DQ/DM termination select on an idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x8 10. " DQ_TSEL_ENABLE_REG_WRITE , Enables the DQ/DM termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x8 9. " DQ_TSEL_ENABLE_REG_READ , Enables the DQ/DM termination select on a read cycle" "Disabled,Enabled" textline " " bitfld.long 0x8 7.--8. " DQS_TSEL_MUX_REG_IDLE , External DQS termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x8 5.--6. " DQS_TSEL_MUX_REG_WRITE , External DQS termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x8 3.--4. " DQS_TSEL_MUX_REG_READ , External DQS termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x8 2. " DQS_TSEL_ENABLE_REG_IDLE , Enables the DQS termination select on a idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x8 1. " DQS_TSEL_ENABLE_REG_WRITE , Enables the DQS termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x8 0. " DQS_TSEL_ENABLE_REG_READ , Enables the DQS termination select on a read cycle" "Disabled,Enabled" line.long 0xC "MPMC_CTRL_REG_163, Controller configuration register 163: PHY conf reg 7 for data slice 3" bitfld.long 0xC 26.--27. " TSEL_DQ_WR_DEASSERT_FINE_REG , Delay of the DQ/DM write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 23.--25. " TSEL_DQ_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 21.--22. " TSEL_DQ_WR_ASSERT_FINE_REG , Delay of the DQ/DM write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0xC 18.--20. " TSEL_DQ_WR_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 16.--17. " DQ_TSEL_MUX_REG_IDLE , External DQ/DM termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0xC 14.--15. " DQ_TSEL_MUX_REG_WRITE , External DQ/DM termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0xC 12.--13. " DQ_TSEL_MUX_REG_READ , External DQ/DM termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0xC 11. " DQ_TSEL_ENABLE_REG_IDLE , Enables the DQ/DM termination select on an idle cycle" "Disabled,Enabled" textline " " bitfld.long 0xC 10. " DQ_TSEL_ENABLE_REG_WRITE , Enables the DQ/DM termination select on a write cycle" "Disabled,Enabled" bitfld.long 0xC 9. " DQ_TSEL_ENABLE_REG_READ , Enables the DQ/DM termination select on a read cycle" "Disabled,Enabled" textline " " bitfld.long 0xC 7.--8. " DQS_TSEL_MUX_REG_IDLE , External DQS termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0xC 5.--6. " DQS_TSEL_MUX_REG_WRITE , External DQS termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0xC 3.--4. " DQS_TSEL_MUX_REG_READ , External DQS termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0xC 2. " DQS_TSEL_ENABLE_REG_IDLE , Enables the DQS termination select on a idle cycle" "Disabled,Enabled" textline " " bitfld.long 0xC 1. " DQS_TSEL_ENABLE_REG_WRITE , Enables the DQS termination select on a write cycle" "Disabled,Enabled" bitfld.long 0xC 0. " DQS_TSEL_ENABLE_REG_READ , Enables the DQS termination select on a read cycle" "Disabled,Enabled" line.long 0x10 "MPMC_CTRL_REG_164, Controller configuration register 164: PHY conf reg 7 for data slice 4" bitfld.long 0x10 26.--27. " TSEL_DQ_WR_DEASSERT_FINE_REG , Delay of the DQ/DM write termination select de-assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 23.--25. " TSEL_DQ_WR_COARSE_DEASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write de-assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 21.--22. " TSEL_DQ_WR_ASSERT_FINE_REG , Delay of the DQ/DM write termination select assertion from the coarse adjustment value" "0 clk delay,1/2 clk delay,1 clk delay,?..." bitfld.long 0x10 18.--20. " TSEL_DQ_WR_COARSE_ASSERT_REG , Number of cycles (+1) that the dfi_wrdata_en signal will be delayed to form the coarse select for DQ/DM write assertion" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 16.--17. " DQ_TSEL_MUX_REG_IDLE , External DQ/DM termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x10 14.--15. " DQ_TSEL_MUX_REG_WRITE , External DQ/DM termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x10 12.--13. " DQ_TSEL_MUX_REG_READ , External DQ/DM termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x10 11. " DQ_TSEL_ENABLE_REG_IDLE , Enables the DQ/DM termination select on an idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " DQ_TSEL_ENABLE_REG_WRITE , Enables the DQ/DM termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x10 9. " DQ_TSEL_ENABLE_REG_READ , Enables the DQ/DM termination select on a read cycle" "Disabled,Enabled" textline " " bitfld.long 0x10 7.--8. " DQS_TSEL_MUX_REG_IDLE , External DQS termination mux control for idle cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x10 5.--6. " DQS_TSEL_MUX_REG_WRITE , External DQS termination mux control for write cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" textline " " bitfld.long 0x10 3.--4. " DQS_TSEL_MUX_REG_READ , External DQS termination mux control for read cycles (DDR2/DDR3) [OHM]" "Disabled,120/150,120/150,60/75" bitfld.long 0x10 2. " DQS_TSEL_ENABLE_REG_IDLE , Enables the DQS termination select on a idle cycle" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " DQS_TSEL_ENABLE_REG_WRITE , Enables the DQS termination select on a write cycle" "Disabled,Enabled" bitfld.long 0x10 0. " DQS_TSEL_ENABLE_REG_READ , Enables the DQS termination select on a read cycle" "Disabled,Enabled" group.long 0x294++0x13 line.long 0x0 "MPMC_CTRL_REG_165, Controller configuration register 165: PHY conf reg 9 for data slice 0" bitfld.long 0x0 11.--13. " PH_CLK_MATCH_OVERRIDE_REG , phy_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. " SRC_CLK_MATCH_OVERRIDE_REG , src_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 5.--7. " DQ_CLK_MATCH_OVERRIDE_REG , dq_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--4. " DQS_CLK_MATCH_OVERRIDE_REG , dqs_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0 1. " DQS_CAPTURE_PHASE_OVERRIDE_REG , dqs_capture_phase override value" "No override,Override" bitfld.long 0x0 0. " SLICE_CAL_OVERRIDE_REG , Enables override of all calibration settings" "No override,Override" line.long 0x4 "MPMC_CTRL_REG_166, Controller configuration register 166: PHY conf reg 9 for data slice 1" bitfld.long 0x4 11.--13. " PH_CLK_MATCH_OVERRIDE_REG , phy_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x4 8.--10. " SRC_CLK_MATCH_OVERRIDE_REG , src_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 5.--7. " DQ_CLK_MATCH_OVERRIDE_REG , dq_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x4 2.--4. " DQS_CLK_MATCH_OVERRIDE_REG , dqs_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x4 1. " DQS_CAPTURE_PHASE_OVERRIDE_REG , dqs_capture_phase override value" "No override,Override" bitfld.long 0x4 0. " SLICE_CAL_OVERRIDE_REG , Enables override of all calibration settings" "No override,Override" line.long 0x8 "MPMC_CTRL_REG_167, Controller configuration register 167: PHY conf reg 9 for data slice 2" bitfld.long 0x8 11.--13. " PH_CLK_MATCH_OVERRIDE_REG , phy_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x8 8.--10. " SRC_CLK_MATCH_OVERRIDE_REG , src_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 5.--7. " DQ_CLK_MATCH_OVERRIDE_REG , dq_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2.--4. " DQS_CLK_MATCH_OVERRIDE_REG , dqs_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x8 1. " DQS_CAPTURE_PHASE_OVERRIDE_REG , dqs_capture_phase override value" "No override,Override" bitfld.long 0x8 0. " SLICE_CAL_OVERRIDE_REG , Enables override of all calibration settings" "No override,Override" line.long 0xC "MPMC_CTRL_REG_168, Controller configuration register 168: PHY conf reg 9 for data slice 3" bitfld.long 0xC 11.--13. " PH_CLK_MATCH_OVERRIDE_REG , phy_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0xC 8.--10. " SRC_CLK_MATCH_OVERRIDE_REG , src_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 5.--7. " DQ_CLK_MATCH_OVERRIDE_REG , dq_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0xC 2.--4. " DQS_CLK_MATCH_OVERRIDE_REG , dqs_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0xC 1. " DQS_CAPTURE_PHASE_OVERRIDE_REG , dqs_capture_phase override value" "No override,Override" bitfld.long 0xC 0. " SLICE_CAL_OVERRIDE_REG , Enables override of all calibration settings" "No override,Override" line.long 0x10 "MPMC_CTRL_REG_169, Controller configuration register 169: PHY conf reg 9 for data slice 4" bitfld.long 0x10 11.--13. " PH_CLK_MATCH_OVERRIDE_REG , phy_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8.--10. " SRC_CLK_MATCH_OVERRIDE_REG , src_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 5.--7. " DQ_CLK_MATCH_OVERRIDE_REG , dq_clk_match override value" "0,1,2,3,4,5,6,7" bitfld.long 0x10 2.--4. " DQS_CLK_MATCH_OVERRIDE_REG , dqs_clk_match override value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 1. " DQS_CAPTURE_PHASE_OVERRIDE_REG , dqs_capture_phase override value" "No override,Override" bitfld.long 0x10 0. " SLICE_CAL_OVERRIDE_REG , Enables override of all calibration settings" "No override,Override" group.long 0x2A8++0x13 line.long 0x0 "MPMC_CTRL_REG_170, Controller configuration register 170: PHY obs reg 0 for data slice 0" bitfld.long 0x0 31. " DQS_CAPTURE_PHASE , Contains information on DLL clocks to clk_phy crossings" "Low,High" hexmask.long.byte 0x0 23.--30. 1. " DQS_BYTE_PATT_MUX_DATA1 , Contains data output path delay informaiton" textline " " bitfld.long 0x0 19. " CTRL_LPBK_DONE , Loopback data slice process complete indicator" "Not completed,Completed" bitfld.long 0x0 18. " LPBK_DATA_SYNCD_N , Loopback data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0x0 17. " LPBK_DATA_ERROR , Loopback data slice error indicator" "No error,Error" bitfld.long 0x0 16. " LPBK_ERR_BYTE , Loopback data slice failing byte indicator" "Lower byte,Upper byte" textline " " hexmask.long.byte 0x0 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data" hexmask.long.byte 0x0 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data" line.long 0x4 "MPMC_CTRL_REG_171, Controller configuration register 171: PHY obs reg 0 for data slice 1" bitfld.long 0x4 31. " DQS_CAPTURE_PHASE , Contains information on DLL clocks to clk_phy crossings" "Low,High" hexmask.long.byte 0x4 23.--30. 1. " DQS_BYTE_PATT_MUX_DATA1 , Contains data output path delay informaiton" textline " " bitfld.long 0x4 19. " CTRL_LPBK_DONE , Loopback data slice process complete indicator" "Not completed,Completed" bitfld.long 0x4 18. " LPBK_DATA_SYNCD_N , Loopback data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0x4 17. " LPBK_DATA_ERROR , Loopback data slice error indicator" "No error,Error" bitfld.long 0x4 16. " LPBK_ERR_BYTE , Loopback data slice failing byte indicator" "Lower byte,Upper byte" textline " " hexmask.long.byte 0x4 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data" hexmask.long.byte 0x4 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data" line.long 0x8 "MPMC_CTRL_REG_172, Controller configuration register 172: PHY obs reg 0 for data slice 2" bitfld.long 0x8 31. " DQS_CAPTURE_PHASE , Contains information on DLL clocks to clk_phy crossings" "Low,High" hexmask.long.byte 0x8 23.--30. 1. " DQS_BYTE_PATT_MUX_DATA1 , Contains data output path delay informaiton" textline " " bitfld.long 0x8 19. " CTRL_LPBK_DONE , Loopback data slice process complete indicator" "Not completed,Completed" bitfld.long 0x8 18. " LPBK_DATA_SYNCD_N , Loopback data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0x8 17. " LPBK_DATA_ERROR , Loopback data slice error indicator" "No error,Error" bitfld.long 0x8 16. " LPBK_ERR_BYTE , Loopback data slice failing byte indicator" "Lower byte,Upper byte" textline " " hexmask.long.byte 0x8 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data" hexmask.long.byte 0x8 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data" line.long 0xC "MPMC_CTRL_REG_173, Controller configuration register 173: PHY obs reg 0 for data slice 3" bitfld.long 0xC 31. " DQS_CAPTURE_PHASE , Contains information on DLL clocks to clk_phy crossings" "Low,High" hexmask.long.byte 0xC 23.--30. 1. " DQS_BYTE_PATT_MUX_DATA1 , Contains data output path delay informaiton" textline " " bitfld.long 0xC 19. " CTRL_LPBK_DONE , Loopback data slice process complete indicator" "Not completed,Completed" bitfld.long 0xC 18. " LPBK_DATA_SYNCD_N , Loopback data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0xC 17. " LPBK_DATA_ERROR , Loopback data slice error indicator" "No error,Error" bitfld.long 0xC 16. " LPBK_ERR_BYTE , Loopback data slice failing byte indicator" "Lower byte,Upper byte" textline " " hexmask.long.byte 0xC 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data" hexmask.long.byte 0xC 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data" line.long 0x10 "MPMC_CTRL_REG_174, Controller configuration register 174: PHY obs reg 0 for data slice 4" bitfld.long 0x10 31. " DQS_CAPTURE_PHASE , Contains information on DLL clocks to clk_phy crossings" "Low,High" hexmask.long.byte 0x10 23.--30. 1. " DQS_BYTE_PATT_MUX_DATA1 , Contains data output path delay informaiton" textline " " bitfld.long 0x10 19. " CTRL_LPBK_DONE , Loopback data slice process complete indicator" "Not completed,Completed" bitfld.long 0x10 18. " LPBK_DATA_SYNCD_N , Loopback data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0x10 17. " LPBK_DATA_ERROR , Loopback data slice error indicator" "No error,Error" bitfld.long 0x10 16. " LPBK_ERR_BYTE , Loopback data slice failing byte indicator" "Lower byte,Upper byte" textline " " hexmask.long.byte 0x10 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data" hexmask.long.byte 0x10 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data" rgroup.long 0x2BC++0x13 line.long 0x0 "MPMC_CTRL_REG_175, Controller configuration register 175: PHY obs reg 1 for data slice 0" hexmask.long.byte 0x0 24.--31. 1. " DQS_BYTE_PATT_MUX_SRC , Contains path delay information for clk0/4_source_X selection" hexmask.long.byte 0x0 16.--23. 1. " DQS_BYTE_PATT_MUX_DATA , Contains data path output delay information" textline " " hexmask.long.byte 0x0 8.--15. 1. " DQS_BYTE_PATT_MUX_DQS , Contains DQS output path delay information" hexmask.long.byte 0x0 0.--7. 1. " DQS_BYTE_PATT_CLK , Contains relationship information between DLL clocks and clk_phy" line.long 0x4 "MPMC_CTRL_REG_176, Controller configuration register 176: PHY obs reg 1 for data slice 1" hexmask.long.byte 0x4 24.--31. 1. " DQS_BYTE_PATT_MUX_SRC , Contains path delay information for clk0/4_source_X selection" hexmask.long.byte 0x4 16.--23. 1. " DQS_BYTE_PATT_MUX_DATA , Contains data path output delay information" textline " " hexmask.long.byte 0x4 8.--15. 1. " DQS_BYTE_PATT_MUX_DQS , Contains DQS output path delay information" hexmask.long.byte 0x4 0.--7. 1. " DQS_BYTE_PATT_CLK , Contains relationship information between DLL clocks and clk_phy" line.long 0x8 "MPMC_CTRL_REG_177, Controller configuration register 177: PHY obs reg 1 for data slice 2" hexmask.long.byte 0x8 24.--31. 1. " DQS_BYTE_PATT_MUX_SRC , Contains path delay information for clk0/4_source_X selection" hexmask.long.byte 0x8 16.--23. 1. " DQS_BYTE_PATT_MUX_DATA , Contains data path output delay information" textline " " hexmask.long.byte 0x8 8.--15. 1. " DQS_BYTE_PATT_MUX_DQS , Contains DQS output path delay information" hexmask.long.byte 0x8 0.--7. 1. " DQS_BYTE_PATT_CLK , Contains relationship information between DLL clocks and clk_phy" line.long 0xC "MPMC_CTRL_REG_178, Controller configuration register 178: PHY obs reg 1 for data slice 3" hexmask.long.byte 0xC 24.--31. 1. " DQS_BYTE_PATT_MUX_SRC , Contains path delay information for clk0/4_source_X selection" hexmask.long.byte 0xC 16.--23. 1. " DQS_BYTE_PATT_MUX_DATA , Contains data path output delay information" textline " " hexmask.long.byte 0xC 8.--15. 1. " DQS_BYTE_PATT_MUX_DQS , Contains DQS output path delay information" hexmask.long.byte 0xC 0.--7. 1. " DQS_BYTE_PATT_CLK , Contains relationship information between DLL clocks and clk_phy" line.long 0x10 "MPMC_CTRL_REG_179, Controller configuration register 179: PHY obs reg 1 for data slice 4" hexmask.long.byte 0x10 24.--31. 1. " DQS_BYTE_PATT_MUX_SRC , Contains path delay information for clk0/4_source_X selection" hexmask.long.byte 0x10 16.--23. 1. " DQS_BYTE_PATT_MUX_DATA , Contains data path output delay information" textline " " hexmask.long.byte 0x10 8.--15. 1. " DQS_BYTE_PATT_MUX_DQS , Contains DQS output path delay information" hexmask.long.byte 0x10 0.--7. 1. " DQS_BYTE_PATT_CLK , Contains relationship information between DLL clocks and clk_phy" rgroup.long 0x2D0++0x07 line.long 0x00 "MPMC_CTRL_REG_180, Controller configuration register 180: PHY addr/ctrl loopback reg" bitfld.long 0x00 19. " CTRL_LPBK_DONE , Loopback address/control process complete indicator" "Not completed,Completed" bitfld.long 0x00 18. " LPBK_DATA_SYNCD_N , Loopback address/control data is not synchronized" "Synchronized,Not synchronized" textline " " bitfld.long 0x00 17. " LPBK_DATA_ERROR , Loopback address/control error indicator" "No error,Error" bitfld.long 0x00 16. " LPBK_ERR_BYTE , Loopback address/control failing byte indicator" "Low,High" textline " " hexmask.long.byte 0x00 8.--15. 1. " LPBK_ACT_DATA , Expected loopback data for the address/control loopback test" hexmask.long.byte 0x00 0.--7. 1. " LPBK_ERR_DATA , Actual loopback data for the address/control loopback test" line.long 0x04 "MPMC_CTRL_REG_181, Controller configuration register 181: PHY addr/ctrl calibration reg" bitfld.long 0x04 30.--31. " CTL_CLK_PHASE_SEL_CAL , Reports the mux select value for the source of output driving flop" "0,1,2,3" bitfld.long 0x04 27.--29. " CTL_8PHASE_SEL_CAL , Reports the mux select value for ctl_8phase_clk_X generation" "0,1,2,3,?..." textline " " bitfld.long 0x04 24.--26. " CTL_SOURCE_SEL_CAL , Reports the mux select value for pre_ctl_8phase_clk_X generation" "0,1,2,3,?..." hexmask.long.byte 0x04 16.--23. 1. " CTL_MUX_BYTE_PATT , Contains path delay information for pre_ctl/ctl_8phase_clk_X selection" textline " " hexmask.long.byte 0x04 8.--15. 1. " CAL_CLK_REF_BYTE_PATT , Contains relationship information between DLL clocks and mem_clk" hexmask.long.byte 0x04 0.--7. 1. " CAL_CLK_BYTE_PATT , Contains relationship information between DLL clocks and clk_phy" group.long 0x2E8++0x03 line.long 0x00 "MPMC_CTRL_REG_186, Controller configuration register 186" rgroup.long 0x2EC++0x1F line.long 0x00 "MPMC_CTRL_REG_187, Controller configuration register 187" line.long 0x04 "MPMC_CTRL_REG_188, Controller configuration register 188" bitfld.long 0x04 0.--2. " ECC_C_ADDR_REG_34TO32 , Holds the address (upper 3 bits) of the read data that caused a single-bit correctable ECC event" "0,1,2,3,4,5,6,7" line.long 0x08 "MPMC_CTRL_REG_189, Controller configuration register 189" line.long 0x0C "MPMC_CTRL_REG_190, Controller configuration register 190" bitfld.long 0x0C 0.--2. " ECC_U_ADDR_34TO32 , Holds the address (upper 3 bits) of the read data that caused a double-bit un-correctable ECC event" "0,1,2,3,4,5,6,7" line.long 0x10 "MPMC_CTRL_REG_191, Controller configuration register 191" line.long 0x14 "MPMC_CTRL_REG_192, Controller configuration register 192" bitfld.long 0x14 0.--2. " OUT_OF_RANGE_ADDR_34TO32 , Holds the address (upper 3 bits) of the command that caused an out-of-range interrupt request to the memory devices" "0,1,2,3,4,5,6,7" line.long 0x18 "MPMC_CTRL_REG_193, Controller configuration register 193" line.long 0x1C "MPMC_CTRL_REG_194, Controller configuration register 194" bitfld.long 0x1C 0.--2. " PORT_CMD_ERROR_ADDR_34TO32 , Holds the address (upper 3 bits) of the command that caused a port command error condition" "0,1,2,3,4,5,6,7" group.long 0x318++0x07 line.long 0x00 "MPMC_CTRL_REG_198, Controller configuration register 198" hexmask.long.byte 0x00 24.--31. 1. " TDFI_RDLVL_LOAD , Defines the minimum number of cycles required after the read leveling delays are loaded until the first read leveling load may be asserted" rbitfld.long 0x00 8. " CKE_STATUS , Provides the value of the cke_status signal in a parameter" "0,1" line.long 0x04 "MPMC_CTRL_REG_199, Controller configuration register 199" hexmask.long.byte 0x04 0.--7. 1. " TDFI_WRLVL_LOAD , Defines the minimum number of cycles required after the write leveling delays are loaded until the first write leveling load may be asserted" group.long 0x324++0x1B line.long 0x00 "MPMC_CTRL_REG_201, Controller configuration register 201" hexmask.long.tbyte 0x00 0.--16. 1. " TRAS_MAX , DRAM TRAS_MAX parameter in cycles" line.long 0x04 "MPMC_CTRL_REG_202, Controller configuration register 202" bitfld.long 0x04 16. " SREFRESH_EXIT_NO_REFRESH , Disables the automatic refresh request associated with SREF exit" "No,Yes" hexmask.long.word 0x04 0.--9. 1. " TRFC , DRAM TRFC parameter in cycles" line.long 0x08 "MPMC_CTRL_REG_203, Controller configuration register 203" bitfld.long 0x08 25. " TRIG ,Trigger the MRW sequence" "No trigger,Trigger" bitfld.long 0x08 24. " CHSEL ,Write all chip selects" "No write,Write" bitfld.long 0x08 23. " WSINGLE ,Write a single MRz" "No write,Write" textline " " bitfld.long 0x08 16. " W ,Write" "No write,Write" bitfld.long 0x08 17. " W ,Write" "No write,Write" hexmask.long.byte 0x08 8.--15. 1. " CHSELNUM , Chip select number to be written" textline " " hexmask.long.byte 0x08 0.--7. 1. " MODREGNUM , Mode register number to be written" line.long 0x0C "MPMC_CTRL_REG_204, Controller configuration register 204" hexmask.long.word 0x0C 8.--22. 1. " MRSINGLE_DATA_0 , Holds the data to be programmed into a single memory mode register for chip select 0" bitfld.long 0x0C 0. " MRW_STATUS , Provides status of the write mode register" "No error,Error" line.long 0x10 "MPMC_CTRL_REG_205, Controller configuration register 205" bitfld.long 0x10 24.--27. " ADD_ODT_CLK_R2W_SAMECS , Additional delay to insert between RD and WR transaction types to the same chip select to meet ODT timing requirements" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x10 16. " INHIBIT_DRAM_CMD , Inhibits certain types of commands from being executed from the command queue" "Enabled,Disabled" textline " " hexmask.long.word 0x10 0.--14. 1. " MRSINGLE_DATA_1 , Holds the data to be programmed into a single memory mode register for chip select 1" line.long 0x14 "MPMC_CTRL_REG_206, Controller configuration register 206" bitfld.long 0x14 22. " TDFI_PHYUPD_RESP[6] , Reports on errors in the PHY update process" "No error,Error" bitfld.long 0x14 21. " TDFI_PHYUPD_TYPE3[5] , Reports on errors in the PHY update process" "No error,Error" textline " " bitfld.long 0x14 20. " TDFI_PHYUPD_TYPE2[4] , Reports on errors in the PHY update process" "No error,Error" bitfld.long 0x14 19. " TDFI_PHYUPD_TYPE1[3] , Reports on errors in the PHY update process" "No error,Error" textline " " bitfld.long 0x14 18. " TDFI_PHYUPD_TYPE0[2] , Reports on errors in the PHY update process" "No error,Error" bitfld.long 0x14 17. " TDFI_CTRLUPD_MAX[1] , Reports on errors in the PHY update process" "No error,Error" textline " " bitfld.long 0x14 16. " TDFI_CTRLUPD_INTERVAL[0] , Reports on errors in the PHY update process" "0,1" bitfld.long 0x14 8. " MEM_RST_VALID , Provides the value of the mem_rst_valid signal in a parameter" "Not valid,Valid" textline " " bitfld.long 0x14 0.--3. " ADD_ODT_CLK_W2R_SAMECS , Additional delay to insert between WR and RD transaction types" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "MPMC_CTRL_REG_207, Controller configuration register 207" width 0x0B tree.end tree "FSMC (Static memory controller)" base ad:0xB0000000 width 17. group.long 0x0++0x07 line.long 0x00 "GENMEMCTRL0, Control bank 0" bitfld.long 0x00 20. " OEN_DELAY , OEN delay" "Disabled,Enabled" bitfld.long 0x00 15. " WAITASYNCH , Asynchronous wait" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " EXTENDMODE , Extended mode" "Disabled,Enabled" bitfld.long 0x00 13. " FORCEBUSTURN , Force bus turn" "Not forced,Forced" textline " " bitfld.long 0x00 12. " IF_WE , Interface write enable" "Disabled,Enabled" bitfld.long 0x00 7. " WPROT , Wprot signal to flash memory" "Low,High" textline " " bitfld.long 0x00 6. " RSTPOWERDWNN , Reset / power down signal to flash memory" "No reset,Reset" bitfld.long 0x00 4.--5. " DEVICEWIDTH , Device width" "8bits,16bits,32bits,?..." textline " " bitfld.long 0x00 2.--3. " MEMORYTYPE , Indicates the type of the memory" "SRAM/ROM,Cellular RAM,NOR/OneNand flash,?..." bitfld.long 0x00 1. " MUXED , Muxed memory uses the data bus to get the address" "Non muxed,Muxed" textline " " bitfld.long 0x00 0. " BANKENABLE , Enables the bank" "Disabled,Enabled" line.long 0x04 "GENMEMCTRL_TIM0, Read/write, read only timings 0" bitfld.long 0x04 28.--29. " ACCESSMODE , Specifies the asynchronous access modes" "Mode A,Mode B,Mode C,Mode D" bitfld.long 0x04 16.--19. " BUSTURN , Bus turn around duration (HCLK cycles + 1)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x04 8.--15. 1. " DATA_ST , Duration of Data_ST phase" bitfld.long 0x04 4.--7. " HOLD_ADDR , Duration of Hold_addr phase (HCLK cycles + 1)" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x04 0.--3. " ADDR_ST , Duration of address state phase (HCLK cycles + 1)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x8++0x07 line.long 0x00 "GENMEMCTRL1, Control bank 1" bitfld.long 0x00 20. " OEN_DELAY , OEN delay" "Disabled,Enabled" bitfld.long 0x00 15. " WAITASYNCH , Asynchronous wait" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " EXTENDMODE , Extended mode" "Disabled,Enabled" bitfld.long 0x00 13. " FORCEBUSTURN , Force bus turn" "Not forced,Forced" textline " " bitfld.long 0x00 12. " IF_WE , Interface write enable" "Disabled,Enabled" bitfld.long 0x00 7. " WPROT , Wprot signal to flash memory" "Low,High" textline " " bitfld.long 0x00 6. " RSTPOWERDWNN , Reset / power down signal to flash memory" "No reset,Reset" bitfld.long 0x00 4.--5. " DEVICEWIDTH , Device width" "8bits,16bits,32bits,?..." textline " " bitfld.long 0x00 2.--3. " MEMORYTYPE , Indicates the type of the memory" "SRAM/ROM,Cellular RAM,NOR/OneNand flash,?..." bitfld.long 0x00 1. " MUXED , Muxed memory uses the data bus to get the address" "Non muxed,Muxed" textline " " bitfld.long 0x00 0. " BANKENABLE , Enables the bank" "Disabled,Enabled" line.long 0x04 "GENMEMCTRL_TIM1, Read/write, read only timings 1" bitfld.long 0x04 28.--29. " ACCESSMODE , Specifies the asynchronous access modes" "Mode A,Mode B,Mode C,Mode D" bitfld.long 0x04 16.--19. " BUSTURN , Bus turn around duration (HCLK cycles + 1)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x04 8.--15. 1. " DATA_ST , Duration of Data_ST phase" bitfld.long 0x04 4.--7. " HOLD_ADDR , Duration of Hold_addr phase (HCLK cycles + 1)" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x04 0.--3. " ADDR_ST , Duration of address state phase (HCLK cycles + 1)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" width 20. group.long 0x40++0x13 line.long 0x00 "GENMEMCTRL_PC0, Control bank 0" bitfld.long 0x00 17.--19. " ECCPAGESIZE , NAND flash, extended ECC only (in bytes)" "256,512,1024,2048,4096,8192,?..." bitfld.long 0x00 13.--16. " TAR , NAND flash: ALE to RE delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 9.--12. " TCLR , NAND flash: CLE to RE delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " ADDRMUX , PCcard: muxed address" "Inactive,Active" textline " " bitfld.long 0x00 7. " ECCPLEN , ECC page length (in bytes)" "512,256" bitfld.long 0x00 6. " ECCEN , ECC computation logic enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " DEVICEWIDTH , Device width, memory data size, valid for all type of memories" "8bits,16bits,?..." bitfld.long 0x00 3. " DEVICETYPE , Indicates the type of the memory" "PCCard,NAND flash" textline " " bitfld.long 0x00 2. " ENABLE , Enables device" "Disabled,Enabled" bitfld.long 0x00 1. " WAIT_ON , Activates the wait sensitivity" "Inactive,Active" textline " " bitfld.long 0x00 0. " RESET , Software reset for PCcard 1" "Inactive,Active" line.long 0x04 "GENMEMCTRL_STATUS0, Interrupts and FIFO status bank 0" hexmask.long.word 0x04 16.--24. 1. " BYTE13_BCH8 , BCH 8 error requires 13 bytes to provide ECC code and error position" bitfld.long 0x04 15. " CODEREADY , ECC code or error position and errors found are ready" "Not ready,Ready" textline " " rbitfld.long 0x04 14. " CODETYPE , Code type" "Error position,ECC code" rbitfld.long 0x04 10.--13. " ERRORSFOUND , Number of errors found in BCH search" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x04 7.--9. " ECCTYPE , Reports which ECC block is instantied" "No ECC,Hamming standard,Hamming extended,BCH 4 error correction,BCH 8 error correction,?..." rbitfld.long 0x04 6. " FIFOEMPTY , Read only bit that provides the status of the FIFO" "Not empty,Empty" textline " " bitfld.long 0x04 5. " ENABLEFALLINGEDGE , Enables interrupt falling edge detection" "Disabled,Enabled" bitfld.long 0x04 4. " ENABLELEVEL , Enables interrupt level detection" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " ENABLERISINGEDGE , Enables interrupt rising edge detection" "Disabled,Enabled" bitfld.long 0x04 2. " INTERRUPTFALLINGEDGE , Interrupt falling edge status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTERRUPTLEVEL1 , Interrupt level 1 status" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTERRUPTRISINGEDGE , Interrupt rising edge status" "No interrupt,Interrupt" line.long 0x08 "GENMEMCTRL_COMM0, Timings for PCcard common mode and NAND bank 0" hexmask.long.byte 0x08 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x08 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x08 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x08 0.--7. 1. " TSET , Time from CE low to RE/WE low" line.long 0x0C "GENMEMCTRL_ATTRIB0, Timings for PCcard attribute mode and wait mode NAND bank 0" hexmask.long.byte 0x0C 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x0C 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x0C 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x0C 0.--7. 1. " TSET , Time from CE low to RE/WE low" line.long 0x10 "GENMEMCTRL_IO_ATA0, Timings for PCcard I/O mode and ATA bank 0" hexmask.long.byte 0x10 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x10 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x10 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x10 0.--7. 1. " TSET , Time from CE low to RE/WE low" rgroup.long (0x40+0x14)++0x0B line.long 0x00 "GENMEMCTRL_ECCR0, ECC (Error Correcting Code) for NAND bank 0" line.long 0x04 "GENMEMCTRL_ECC2R0, ECC (Error Correcting Code) for NAND bank 0" line.long 0x08 "GENMEMCTRL_ECC3R0, ECC (Error Correcting Code) for NAND bank 0" group.long 0x60++0x13 line.long 0x00 "GENMEMCTRL_PC1, Control bank 1" bitfld.long 0x00 17.--19. " ECCPAGESIZE , NAND flash, extended ECC only (in bytes)" "256,512,1024,2048,4096,8192,?..." bitfld.long 0x00 13.--16. " TAR , NAND flash: ALE to RE delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 9.--12. " TCLR , NAND flash: CLE to RE delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " ADDRMUX , PCcard: muxed address" "Inactive,Active" textline " " bitfld.long 0x00 7. " ECCPLEN , ECC page length (in bytes)" "512,256" bitfld.long 0x00 6. " ECCEN , ECC computation logic enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4.--5. " DEVICEWIDTH , Device width, memory data size, valid for all type of memories" "8bits,16bits,?..." bitfld.long 0x00 3. " DEVICETYPE , Indicates the type of the memory" "PCCard,NAND flash" textline " " bitfld.long 0x00 2. " ENABLE , Enables device" "Disabled,Enabled" bitfld.long 0x00 1. " WAIT_ON , Activates the wait sensitivity" "Inactive,Active" textline " " bitfld.long 0x00 0. " RESET , Software reset for PCcard 1" "Inactive,Active" line.long 0x04 "GENMEMCTRL_STATUS1, Interrupts and FIFO status bank 1" hexmask.long.word 0x04 16.--24. 1. " BYTE13_BCH8 , BCH 8 error requires 13 bytes to provide ECC code and error position" bitfld.long 0x04 15. " CODEREADY , ECC code or error position and errors found are ready" "Not ready,Ready" textline " " rbitfld.long 0x04 14. " CODETYPE , Code type" "Error position,ECC code" rbitfld.long 0x04 10.--13. " ERRORSFOUND , Number of errors found in BCH search" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " rbitfld.long 0x04 7.--9. " ECCTYPE , Reports which ECC block is instantied" "No ECC,Hamming standard,Hamming extended,BCH 4 error correction,BCH 8 error correction,?..." rbitfld.long 0x04 6. " FIFOEMPTY , Read only bit that provides the status of the FIFO" "Not empty,Empty" textline " " bitfld.long 0x04 5. " ENABLEFALLINGEDGE , Enables interrupt falling edge detection" "Disabled,Enabled" bitfld.long 0x04 4. " ENABLELEVEL , Enables interrupt level detection" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " ENABLERISINGEDGE , Enables interrupt rising edge detection" "Disabled,Enabled" bitfld.long 0x04 2. " INTERRUPTFALLINGEDGE , Interrupt falling edge status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTERRUPTLEVEL1 , Interrupt level 1 status" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTERRUPTRISINGEDGE , Interrupt rising edge status" "No interrupt,Interrupt" line.long 0x08 "GENMEMCTRL_COMM1, Timings for PCcard common mode and NAND bank 1" hexmask.long.byte 0x08 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x08 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x08 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x08 0.--7. 1. " TSET , Time from CE low to RE/WE low" line.long 0x0C "GENMEMCTRL_ATTRIB1, Timings for PCcard attribute mode and wait mode NAND bank 1" hexmask.long.byte 0x0C 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x0C 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x0C 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x0C 0.--7. 1. " TSET , Time from CE low to RE/WE low" line.long 0x10 "GENMEMCTRL_IO_ATA1, Timings for PCcard I/O mode and ATA bank 1" hexmask.long.byte 0x10 24.--31. 1. " THIZ , Time from CE low to data bus driven" hexmask.long.byte 0x10 16.--23. 1. " THOLD , Time from enable off (RE/WE) and end of cycle (CE goes high)" textline " " hexmask.long.byte 0x10 8.--15. 1. " TWAIT , Time from enable on to enable off for all signals: RE/WE" hexmask.long.byte 0x10 0.--7. 1. " TSET , Time from CE low to RE/WE low" rgroup.long (0x60+0x14)++0x0B line.long 0x00 "GENMEMCTRL_ECCR1, ECC (Error Correcting Code) for NAND bank 1" line.long 0x04 "GENMEMCTRL_ECC2R1, ECC (Error Correcting Code) for NAND bank 1" line.long 0x08 "GENMEMCTRL_ECC3R1, ECC (Error Correcting Code) for NAND bank 1" width 22. group.long 0xC0++0x03 line.long 0x00 "GENMEMCTRL_TSTCR, Test control register" bitfld.long 0x00 0. " ITEN , ITEN" "Disabled,Enabled" rgroup.long 0xC4++0x07 line.long 0x00 "GENMEMCTRL_ITIP_1, Integration test input register 1" sif (cpuis("SPEAR1310*")) hexmask.long 0x00 0.--31. 1. " PCDAI , Input data bus" else hexmask.long.word 0x00 0.--15. 1. " PCDAI , Input data bus" endif line.long 0x04 "GENMEMCTRL_ITIP_2, Integration test input register 2" sif (cpuis("SPEAR1310*")) bitfld.long 0x04 13. " WTN ,Wait signal from external devices" "Low,High" textline " " endif bitfld.long 0x04 11.--12. " EXTDEVWIDTH , Specifies the default device data width" "0,1,2,3" bitfld.long 0x04 3. " PC2_INTRQ , Interrupt input #2 from NAND" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " PC1_INTRQ , Interrupt input #1 from NAND" "No interrupt,Interrupt" bitfld.long 0x04 1. " PCWAITN , Wait input from NAND" "Not occurred,Occurred" group.long 0xCC++0x0F line.long 0x00 "GENMEMCTRL_ITOP_1, Integration test output register 1" sif (cpuis("SPEAR1310*")) hexmask.long 0x00 0.--31. 1. " PCDAO , Output data bus" else hexmask.long.word 0x00 0.--15. 1. " PCDAO , Output data bus" endif line.long 0x04 "GENMEMCTRL_ITOP_2, Integration test output register 2" bitfld.long 0x04 31. " PCWEN , Write enable, active low" "Disabled,Enabled" bitfld.long 0x04 30. " PCOEN , Output enable, active low" "Disabled,Enabled" textline " " sif (cpuis("SPEAR1310*")) bitfld.long 0x04 29. " PC4_INT , Interrupt #4 to ARM" "No interrupt,Interrupt" bitfld.long 0x04 28. " PC3_INT , Interrupt #3 to ARM" "No interrupt,Interrupt" textline " " endif bitfld.long 0x04 27. " PC2_INT , Interrupt #2 to ARM" "No interrupt,Interrupt" bitfld.long 0x04 26. " PC1_INT , Interrupt #1 to ARM" "No interrupt,Interrupt" textline " " hexmask.long 0x04 0.--25. 1. " PCAD , Address bus" line.long 0x08 "GENMEMCTRL_ITOP_3, Integration test output register 3" bitfld.long 0x08 16.--19. " PCSEL , Chip select for NAND" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 13. " BLN , Byte lane" "Low,High" textline " " bitfld.long 0x08 10. " LBAR , Address valid" "Invalid,Valid" bitfld.long 0x08 6. " PCCE1N , Primary chip select" "0,1" textline " " bitfld.long 0x08 5. " PCDIR , Direction of the data bus" "Out,In" bitfld.long 0x08 4.--7. " WPROT , Write protection for NOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 0.--3. " EBAR , Chip select for NOR/SRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GENMEMCTRL_ITOP_4, Integration test output register 4" bitfld.long 0x0C 8.--11. " RSTPWNDN , Reset / power down for NOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--7. " WPROT , Write protection for NOR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0C 0.--3. " EBAR , Chip selects for NOR/SRAM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x104++0x03 line.long 0x00 "CTRL_TIM_WRITE_MOD0, Write only timings bank 0" bitfld.long 0x00 28.--29. " ACCESSMODE , Specifies the asynchronous access modes" "Mode A,Mode B,Mode C,Mode D" bitfld.long 0x00 16.--19. " BUSTURN , Bus turn around duration (HCLK cycles + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA_ST , Duration of Data_ST phase" bitfld.long 0x00 4.--7. " HOLD_ADDR , Duration of Hold_addr phase (HCLK cycles + 1)" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0.--3. " ADDR_ST , Duration of address state phase (HCLK cycles + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x10C++0x03 line.long 0x00 "CTRL_TIM_WRITE_MOD1, Write only timings bank 1" bitfld.long 0x00 28.--29. " ACCESSMODE , Specifies the asynchronous access modes" "Mode A,Mode B,Mode C,Mode D" bitfld.long 0x00 16.--19. " BUSTURN , Bus turn around duration (HCLK cycles + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " DATA_ST , Duration of Data_ST phase" bitfld.long 0x00 4.--7. " HOLD_ADDR , Duration of Hold_addr phase (HCLK cycles + 1)" "Reserved,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0.--3. " ADDR_ST , Duration of address state phase (HCLK cycles + 1)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif (cpuis("SPEAR1310*")) group.long 0xFDC++0x03 line.long 0x00 "GENMEMCTRL_DELAY,To program FBCLK delay" hexmask.long.byte 0x00 0.--7. 1. " DELREG ,Left unconnected" endif rgroup.long 0xFE0++0x1F line.long 0x00 "GENMEMCTRL_PERIPHID0, Peripheral identification register 0" hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0 , Part number 0" line.long 0x04 "GENMEMCTRL_PERIPHID1, Peripheral identification register 1" bitfld.long 0x04 4.--7. " DESIGNER0 , Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " PARTNUMBER1 , Part number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "GENMEMCTRL_PERIPHID2, Peripheral identification register 2" bitfld.long 0x08 4.--7. " REVISION , Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " DESIGNER1 , Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "GENMEMCTRL_PERIPHID3, Peripheral identification register 3" hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION , Configuration" line.long 0x10 "GENMEMCTRL_PCELLID0, IPCell identification register [7:0]" hexmask.long.byte 0x10 0.--7. 1. " PCELLID0 , 0st byte of IPCell identification register" line.long 0x14 "GENMEMCTRL_PCELLID1, IPCell identification register [15:8]" hexmask.long.byte 0x14 0.--7. 1. " PCELLID1 , 1nd byte of IPCell identification register" line.long 0x18 "GENMEMCTRL_PCELLID2, IPCell identification register [23:16]" hexmask.long.byte 0x18 0.--7. 1. " PCELLID2 , 2rd byte of IPCell identification register" line.long 0x1C "GENMEMCTRL_PCELLID3, IPCell identification register [31:24]" hexmask.long.byte 0x1C 0.--7. 1. " PCELLID3 , 3th byte of IPCell identification register" width 0x0b tree.end tree "SMI (Serial NOR Flash controller)" base ad:0xEA000000 width 5. group.long 0x00++0x0F line.long 0x00 "CR1, SMI Control Register 1" bitfld.long 0x00 29. " WBM , Write Burst Mode" "Disabled,Enabled" bitfld.long 0x00 28. " SW , Software Mode" "Hardware mode,Software mode" textline " " bitfld.long 0x00 24.--27. " ADD_LENGTH , ADD_LENGTH[3:0] are Address Length for CS[3:0] Bank" "3 byte long,2 bytes long,?..." hexmask.long.byte 0x00 16.--23. 1. " HOLD , Clock Hold Period Selection" textline " " bitfld.long 0x00 15. " FAST , Fast Read Mode Selection" "Normal,Fast" hexmask.long.byte 0x00 8.--14. 1. " PRESC , Prescaler value" textline " " bitfld.long 0x00 4.--7. " TCS , Deselect Time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " BE[3] ,Bank Enable Bit 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " BE[2] ,Bank Enable Bit 2" "Disabled,Enabled" bitfld.long 0x00 1. " BE[1] ,Bank Enable Bit 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " BE[0] ,Bank Enable Bit 0" "Disabled,Enabled" line.long 0x04 "CR2, SMI Control Register 2" bitfld.long 0x04 12.--13. " BS , Bank Select" "Bank0,Bank1,Bank2,Bank3" bitfld.long 0x04 11. " WEN , Write Enable Command" "No effect,Enabled" textline " " bitfld.long 0x04 10. " RSR , Read Status Register Command" "No effect,Read" bitfld.long 0x04 9. " WCIE , Write Complete Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " TFIE , Transfer Finished Interrupt Enable" "Disabled,Enabled" bitfld.long 0x04 7. " SEND , Send Command" "No effect,Sent" textline " " bitfld.long 0x04 4.--6. " REC_LENGTH , Reception Length (in bytes)" "0,1,2,3,4,4,4,4" bitfld.long 0x04 0.--2. " TRA_LENGTH , Transmission Length (in bytes)" "0,1,2,3,4,4,4,4" line.long 0x08 "SR, SMI Status Register" bitfld.long 0x08 13. " WM[1] , Write Mode for CS[1] bank" "Disabled,Enabled" bitfld.long 0x08 12. " WM[0] , Write Mode for CS[0] bank" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " ERF2 , Error Flag 2: Forbidden Write Request" "No error,Error" bitfld.long 0x08 10. " ERF1 , Error Flag 1: Forbidden Access" "No error,Error" textline " " bitfld.long 0x08 9. " WCF , Write Complete Flag" "Not completed,Completed" bitfld.long 0x08 8. " TFF , Transfer Finished Flag" "Not finished,Finished" textline " " bitfld.long 0x08 7. " SRWD , The Status Register Write Disable" "No,Yes" bitfld.long 0x08 4. " BP2 , The Block2 Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " BP1 , The Block1 Protect" "Disabled,Enabled" bitfld.long 0x08 2. " BP0 , The Block0 Protect" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " WEL , The Write Enable Latch" "Disabled,Enabled" bitfld.long 0x08 0. " WIP , The Write In Progress" "Low,High" line.long 0x0C "TR, SMI Transmit Register" hexmask.long.byte 0x0C 24.--31. 1. " BYTE[31:24] , Transmitted bytes" hexmask.long.byte 0x0C 16.--23. 1. " BYTE[23:16] , Transmitted bytes" textline " " hexmask.long.byte 0x0C 8.--15. 1. " BYTE[15:8] , Transmitted bytes" hexmask.long.byte 0x0C 0.--7. 1. " BYTE[7:0] , Transmitted bytes" rgroup.long 0x10++0x03 line.long 0x00 "RR, SMI Receive Register" hexmask.long.byte 0x00 24.--31. 1. " BYTE[31:24] , Receive bytes" hexmask.long.byte 0x00 16.--23. 1. " BYTE[23:16] , Receive bytes" textline " " hexmask.long.byte 0x00 8.--15. 1. " BYTE[15:8] , Receive bytes" hexmask.long.byte 0x00 0.--7. 1. " BYTE[7:0] , Receive bytes" width 0x0B tree.end tree "MCIF (Memory Card Interface)" base ad:0xB3000000 tree "SD Host controller registers" width 8. group.long 0x00++0x03 line.long 0x00 "REG_00, SDMA System Address" group.word 0x04++0x03 line.word 0x00 "REG_01, Block Size" bitfld.word 0x00 15. " TRANSFER_BLOCK_SIZE_12TH_BIT , Transfer Block Size 12th bit" "Low,High" bitfld.word 0x00 12.--14. " HOST_SDMA_BUFFER_SIZE , Host SDMA Buffer Size" "4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB" textline " " hexmask.word 0x00 0.--11. 1. " TRANSFER_BLOCK_SIZE , This register specifies the block size for block data transfers" line.word 0x02 "REG_02, Block Count" group.long 0x08++0x03 line.long 0x00 "REG_03, Argument" group.word 0x0C++0x03 line.word 0x00 "REG_04, Transfer Mode" bitfld.word 0x00 8. " BOOT_EN , Start boot operation for MMC4.3" "Disabled,Enabled" bitfld.word 0x00 7. " SPI_MODE , SPI mode enable bit" "SD,SPI" textline " " bitfld.word 0x00 5. " MULTI_SINGLE_BLOCK_SELECT , This bit enables multiple block DAT line data transfers" "Single,Multiple" bitfld.word 0x00 4. " DATA_TRANSFER_DIRECTION_SELECT , This bit defines the direction of DAT line data transfers" "Write,Read" textline " " bitfld.word 0x00 2. " AUTO_CMD12_ENABLE , Automatic CMD12 enable" "Disabled,Enabled" bitfld.word 0x00 1. " BLOCK_COUNT_ENABLE , This bit is used to enable the Block count register" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " DMA_ENABLE , DMA enable" "Disabled,Enabled" line.word 0x02 "REG_05, Command" hexmask.word.byte 0x02 8.--13. 1. " COMMAND_INDEX , This bit shall be set to the command number" bitfld.word 0x02 6.--7. " COMMAND_TYPE , Special command type" "Normal,Suspend,Resume,Abort" textline " " bitfld.word 0x02 5. " DATA_PRESENT_SELECT , Data is present and shall be transferred using the DAT line" "Not present,Present" bitfld.word 0x02 4. " COMMAD_INDEX_CHECK_ENABLE , Commad index Check Enable" "Disabled,Enabled" textline " " bitfld.word 0x02 3. " COMMAND_CRC_CHECK_ENABLE , Command CRC Check Enable" "Disabled,Enabled" bitfld.word 0x02 0.--1. " RESPONSE_TYPE_SELECT , Response Type Select" "No response,Response length 136,Response length 48,Response length 48 check" rgroup.word 0x10++0x01 line.word 0x00 "REG_06, Response [128:0]" button "REG_06" "d ad:0xB3000010--ad:0xB3000020 /long" group.long 0x20++0x03 line.long 0x00 "REG_07, Buffer Data Port" rgroup.long 0x24++0x03 line.long 0x00 "REG_08, Present State" bitfld.long 0x00 28. " DAT_7_LINE_SIGNAL_LEVEL ,D12" "Disabled,Enabled" bitfld.long 0x00 27. " DAT_6_LINE_SIGNAL_LEVEL ,D11" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " DAT_5_LINE_SIGNAL_LEVEL ,D10" "Disabled,Enabled" bitfld.long 0x00 25. " DAT_4_LINE_SIGNAL_LEVEL ,D09" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " CMD_LINE_SIGNAL_LEVEL , This status is used to check CMD line level to recover from errors" "Low,High" bitfld.long 0x00 23. " DAT_3_LINE_SIGNAL_LEVEL ,D08" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DAT_2_LINE_SIGNAL_LEVEL ,D07" "Disabled,Enabled" bitfld.long 0x00 21. " DAT_1_LINE_SIGNAL_LEVEL ,D06" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DAT_0_LINE_SIGNAL_LEVEL ,D05" "Disabled,Enabled" bitfld.long 0x00 19. " WRITE_PROTECT_SWITCH_PIN_LEVEL , The Write Protect Switch is supported for memory and combo cards" "Protected,Enabled" textline " " bitfld.long 0x00 18. " CARD_DETECT_PIN_LEVEL , This bit reflects the inverse value of the SDCD# pin" "Not present,Present" bitfld.long 0x00 17. " CARD_STATE_STABLE , Card detect pin level stable" "Not stable,Stable" textline " " bitfld.long 0x00 16. " CARD_INSERTED , This bit indicates whether a card has been inserted" "Not inserted,Inserted" bitfld.long 0x00 11. " BUFFER_READ_ENABLE , Buffer read enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BUFFER_WRITE_ENABLE , Buffer write enable" "Disabled,Enabled" bitfld.long 0x00 9. " READ_TRANSFER_ACTIVE , This status is used for detecting completion of a read transfer" "Inactive,Active" textline " " bitfld.long 0x00 8. " WRITE_TRANSFER_ACTIVE , This status indicates a write transfer is active" "Inactive,Active" bitfld.long 0x00 2. " DAT_LINE_ACTIVE , This bit indicates whether one of the DAT line on SD bus is in use" "Inactive,Active" textline " " bitfld.long 0x00 1. " COMMAND_INHIBIT_DAT , Command inhibit DAT" "Low,High" bitfld.long 0x00 0. " COMMAND_INHIBIT_CMD , Command Inhibit CMD" "Low,High" group.byte 0x28++0x03 line.byte 0x00 "REG_09, Host Control" bitfld.byte 0x00 7. " CARD_DETECT_SIGNAL_DETECTION , This bit selects source for card detection" "SDCD#,Card detect test level" bitfld.byte 0x00 6. " CARD_DETECT_TEST_LEVEL , Card detect test level" "No card,Card Inserted" textline " " bitfld.byte 0x00 5. " SD8_BIT_MODE , 8 bit mode" "Disabled,Enabled" bitfld.byte 0x00 3.--4. " DMA_SELECT , One of supported DMA modes can be selected" "SDMA,32bit Address ADMA1,32bit Address ADMA2,64bit Address ADMA2" textline " " bitfld.byte 0x00 2. " HIGH_SPEED_ENABLE , High speed enable" "Normal,High speed" bitfld.byte 0x00 1. " DATA_TRANSFER_WIDTH_SD1_OR_SD4 , This bit selects the data width of the HC" "1 bit,4 bit" textline " " bitfld.byte 0x00 0. " LED_CONTROL , LED control" "LED Off,LED On" line.byte 0x01 "REG_10, Power Control" bitfld.byte 0x01 1.--3. " SD_BUS_VOLTAGE_SELECT , SD Bus Voltage Select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V" bitfld.byte 0x01 0. " SD_BUS_POWER , SD Bus Power" "Power Off,Power On" line.byte 0x02 "REG_11, Block Gap Control" bitfld.byte 0x02 7. " ALT_BOOT_ENABLE , Start alternat boot operation for MMC4.3 " "Stopped,Started" bitfld.byte 0x02 3. " INTERRUPT_AT_BLOCK_GAP , Interrupt at block gap" "No interrupt,Interrupt" textline " " bitfld.byte 0x02 2. " READ_WAIT_CONTROL , Read wait control" "Disabled,Enabled" bitfld.byte 0x02 1. " CONTINUE_REQUEST , Continue request" "Ignored,Restarted" textline " " bitfld.byte 0x02 0. " STOP_AT_BLOCK_GAP_REQUEST , Stop at block gap request" "Transferred,Stopped" line.byte 0x03 "REG_12, Wakeup Control" bitfld.byte 0x03 2. " WAKE_EVENT_ENABLE_ON_SD_CARD_REMOVAL , This bit enables wakeup event via Card Removal assertion in the Normal Interrupt Status register" "Disabled,Enabled" bitfld.byte 0x03 1. " WAKEUP_EVENT_ENABLE_ON_SD_CARD_INSERTION , This bit enables wakeup event viaCard Insertion assertion in the Normal Interrupt Status register" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " WAKEUP_EVENT_ENABLE_ON_CARD_INTERRUPT , This bit enables wakeup event via Card Interrupt assertion in the Normal Interrupt Status register" "Disabled,Enabled" group.word 0x2C++0x01 line.word 0x00 "REG_13, Clock Control" hexmask.word.byte 0x00 8.--15. 1. " SDCLK_FREQUENCY_SELECT , This register is used to select the frequency of the SDCLK pin" bitfld.word 0x00 2. " SD_CLOCK_ENABLE , SD clock enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " INTERNAL_CLOCK_STABLE , Internal clock stable" "Not stable,Stable" bitfld.word 0x00 0. " INTERNAL_CLOCK_ENABLE , Internal clock enable" "Disabled,Enabled" group.byte 0x2E++0x01 line.byte 0x00 "REG_14, Timeout Control" bitfld.byte 0x00 0.--3. " DATA_TIMEOUT_COUNTER_VALUE , This value determines the interval by which DAT line time-outs are detected (TMCLK*2^x)" "13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,?..." line.byte 0x01 "REG_15, Software reset" bitfld.byte 0x01 2. " SOFTWARE_RESET_FOR_DAT_LINE , Only part of data circuit is reset" "Work,Reset" bitfld.byte 0x01 1. " SOFTWARE_RESET_FOR_CMD_LINE , Only part of command circuit is reset" "Work,Reset" textline " " bitfld.byte 0x01 0. " SOFTWARE_RESET_FOR_ALL , This reset affects the entire HC except for the card detection circuit" "Work,Reset" group.word 0x30++0x03 line.word 0x00 "REG_16, Normal Interrupt Status" rbitfld.word 0x00 15. " ERROR_INTERRUPT , Error interrupt" "No error,Error" eventfld.word 0x00 10. " BOOT_TERMINATE_INTERRUPT , This status is set if the boot operation get terminated" "Not terminated,Terminated" textline " " eventfld.word 0x00 9. " BOOT_ACK_RCV , This status is set if the boot acknowledge is received from device" "Not acknowledged,Acknowledged" eventfld.word 0x00 8. " CARD_INTERRUPT , Card Interrupt" "No interrupt,Interrupt" textline " " eventfld.word 0x00 7. " CARD_REMOVAL , Card removal" "Not removed,Removed" eventfld.word 0x00 6. " CARD_INSERTION , Card insertion" "Not inserted,Inserted" textline " " eventfld.word 0x00 5. " BUFFER_READ_READY , Buffer read ready" "Not ready,Ready" eventfld.word 0x00 4. " BUFFER_WRITE_READY , Buffer write ready" "Not ready,Ready" textline " " eventfld.word 0x00 3. " DMA_INTERRUPT , DMA interrupt" "No interrupt,Interrupt" eventfld.word 0x00 2. " BLOCK_GAP_EVENT , Block gap event" "Not occurred,Occurred" textline " " eventfld.word 0x00 1. " TRANSFER_COMPLETE , This bit is set when a read / write transaction is completed" "Not completed,Completed" eventfld.word 0x00 0. " COMMAND_COMPLETE , This bit is set when get the end bit of the command response" "Not completed,Completed" line.word 0x02 "REG_17, Error Interrupt status" eventfld.word 0x02 15. " VENDOR_SPECIFIC_ERROR_STATUS[1] , Additional status bits can be defined in this register by the vendor" "0,1" eventfld.word 0x02 14. " VENDOR_SPECIFIC_ERROR_STATUS[0] , Additional status bits can be defined in this register by the vendor" "0,1" textline " " eventfld.word 0x02 13. " CREATE_ERROR , Occurs when ATA command termination has occurred due to an error condition the device has encountered" "No error,Error" eventfld.word 0x02 12. " TARGET_RESPONSE_ERROR , Occurs when detecting ERROR in m_hresp" "No error,Error" textline " " eventfld.word 0x02 9. " ADMA_ERROR , This bit is set when the Host Controller detects errors during ADMA based data transfer" "No error,Error" eventfld.word 0x02 8. " AUTO_CMD12_ERROR , Occurs when detecting that one of the bits in Auto CMD12 Error Status register has changed from 0 to 1" "No error,Error" textline " " eventfld.word 0x02 7. " CURRENT_LIMIT_ERROR , By setting the SD Bus Power bit in the Power Control Register, the HC is requested to supply power for the SD Bus" "No error,Error" eventfld.word 0x02 6. " DATA_END_BIT_ERROR , Occurs when detecting 0 at the end bit position of read data which uses the DAT line or the end bit position of the CRC status" "No error,Error" textline " " eventfld.word 0x02 5. " DATA_CRC_ERROR , Occurs when detecting CRC error when transferring read data which uses the DAT line or when detecting the Write CRC Status having a value of other than 010" "No error,Error" eventfld.word 0x02 4. " DATA_TIMEOUT_ERROR , Occurs when detecting one of following timeout conditions" "No error,Error" textline " " eventfld.word 0x02 3. " COMMAND_INDEX_ERROR , Occurs if a Command Index error occurs in the Command Response" "No error,Error" eventfld.word 0x02 2. " COMMAND_END_BIT_ERROR , Occurs when detecting that the end bit of a command response is 0" "No error,Error" textline " " eventfld.word 0x02 1. " COMMAND_CRC_ERROR , Command CRC Error" "No error,Error" eventfld.word 0x02 0. " COMMAND_TIMEOUT_ERROR , Occurs only if the no response is returned within 64SDCLK cycles from the end bit of the command" "No error,Timeout" group.word 0x34++0x07 line.word 0x00 "REG_18, Normal Interrupt Status Enable" rbitfld.word 0x00 15. " FIXED_TO_0 , The HC shall control error Interrupts using the Error Interrupt Status Enable register" "Low,High" bitfld.word 0x00 10. " BOOT_TERMINATE_INTERRUPT_ENABLE , Boot terminate interrupt enable" "Masked,Enabled" textline " " bitfld.word 0x00 9. " BOOT_ACK_RCV_ENABLE , Boot ack rcv enable" "Masked,Enabled" bitfld.word 0x00 8. " CARD_INTERRUPT_STATUS_ENABLE , Card interrupt status enable" "Masked,Enabled" textline " " bitfld.word 0x00 7. " CARD_REMOVAL_STATUS_ENABLE , Card removal status enable" "Masked,Enabled" bitfld.word 0x00 6. " CARD_INSERTION_STATUS_ENABLE , Card insertion status enable" "Masked,Enabled" textline " " bitfld.word 0x00 5. " BUFFER_READ_READY_STATUS_ENABLE , Buffer read ready status enable" "Masked,Enabled" bitfld.word 0x00 4. " BUFFER_WRITE_READY_STATUS_ENABLE , Buffer write ready status enable" "Masked,Enabled" textline " " bitfld.word 0x00 3. " DMA_INTERRUPT_STATUS_ENABLE , DMA interrupt status enable" "Masked,Enabled" bitfld.word 0x00 2. " BLOCK_GAP_EVENT_STATUS_ENABLE , Block gap event status enable" "Masked,Enabled" textline " " bitfld.word 0x00 1. " TRANSFER_COMPLETE_STATUS_ENABLE , Transfer complete status enable" "Masked,Enabled" bitfld.word 0x00 0. " COMMAND_COMPLETE_STATUS_ENABLE , Command complete status enable" "Masked,Enabled" line.word 0x02 "REG_19, Error Interrupt Status enable" bitfld.word 0x02 15. " VENDOR_SPECIFIC_ERROR_STATUS_ENABLE[1] , Vendor specific error status enable" "Masked,Enabled" bitfld.word 0x02 14. " VENDOR_SPECIFIC_ERROR_STATUS_ENABLE[0] , Vendor specific error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 13. " CREATE_ERROR_STATUS_ENABLE , Create error status enable" "Masked,Enabled" bitfld.word 0x02 12. " TARGET_RESPONSE_ERROR_STATUS_ENABLE , Target response error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 9. " ADMA_ERROR_STATUS_ENABLE , ADMA error status enable" "Masked,Enabled" bitfld.word 0x02 8. " AUTO_CMD12_ERROR_STATUS_ENABLE , Auto CMD12 error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 7. " CURRENT_LIMIT_ERROR_STATUS_ENABLE , Current limit error status enable" "Masked,Enabled" bitfld.word 0x02 6. " DATA_END_BIT_ERROR_STATUS_ENABLE , Data end bit error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 5. " DATA_CRC_ERROR_STATUS_ENABLE , Data CRC error status enable" "Masked,Enabled" bitfld.word 0x02 4. " DATA_TIMEOUT_ERROR_STATUS_ENABLE , Data timeout error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 3. " COMMAND_INDEX_ERROR_STATUS_ENABLE , Command index error status enable" "Masked,Enabled" bitfld.word 0x02 2. " COMMAND_END_BIT_ERROR_STATUS_ENABLE , Command end bit error status enable" "Masked,Enabled" textline " " bitfld.word 0x02 1. " COMMAND_CRC_ERROR_STATUS_ENABLE , Command CRC error status enable" "Masked,Enabled" bitfld.word 0x02 0. " COMMAND_TIMEOUT_ERROR_STATUS_ENABLE , Command timeout error status enable" "Masked,Enabled" line.word 0x04 "REG_20, Normal Interrupt Signal Enable" bitfld.word 0x04 15. " FIXED_TO_0 , The HC shall control error Interrupts using the Error Interrupt Status Enable register" "Low,High" bitfld.word 0x04 10. " BOOT_TERMINATE_INTERRUPT_SIGNAL_ENABLE , Boot terminate interrupt signal enable" "Masked,Enabled" textline " " bitfld.word 0x04 9. " BOOT_ACK_RCV_SIGNAL_ENABLE , Boot ack rcv signal enable" "Masked,Enabled" bitfld.word 0x04 8. " CARD_INTERRUPT_SIGNAL_ENABLE , Card interrupt signal enable" "Masked,Enabled" textline " " bitfld.word 0x04 7. " CARD_REMOVAL_SIGNAL_ENABLE , Card removal signal enable" "Masked,Enabled" bitfld.word 0x04 6. " CARD_INSERTION_SIGNAL_ENABLE , Card insertion signal enable" "Masked,Enabled" textline " " bitfld.word 0x04 5. " BUFFER_READ_READY_SIGNAL_ENABLE , Buffer read ready signal enable" "Masked,Enabled" bitfld.word 0x04 4. " BUFFER_WRITE_READY_SIGNAL_ENABLE , Buffer write ready signal enable" "Masked,Enabled" textline " " bitfld.word 0x04 3. " DMA_INTERRUPT_SIGNAL_ENABLE , DMA interrupt signal enable" "Masked,Enabled" bitfld.word 0x04 2. " BLOCK_GAP_EVENT_SIGNAL_ENABLE , Block gap event signal enable" "Masked,Enabled" textline " " bitfld.word 0x04 1. " TRANSFER_COMPLETE_SIGNAL_ENABLE , Transfer complete signal enable" "Masked,Enabled" bitfld.word 0x04 0. " COMMAND_COMPLETE_SIGNAL_ENABLE , Command complete signal enable" "Masked,Enabled" line.word 0x06 "REG_21, Error Interrupt Signal Enable" bitfld.word 0x06 15. " VENDOR_SPECIFIC_ERROR_STATUS_ENABLE[1] , Vendor specific error status enable" "Masked,Enabled" bitfld.word 0x06 14. " VENDOR_SPECIFIC_ERROR_STATUS_ENABLE[0] , Vendor specific error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 13. " CREATE_ERROR_STATUS_ENABLE , Create error status enable" "Masked,Enabled" bitfld.word 0x06 12. " TARGET_RESPONSE_ERROR_STATUS_ENABLE , Target response error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 9. " ADMA_ERROR_STATUS_ENABLE , ADMA error status enable" "Masked,Enabled" bitfld.word 0x06 8. " AUTO_CMD12_ERROR_STATUS_ENABLE , Auto CMD12 error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 7. " CURRENT_LIMIT_ERROR_STATUS_ENABLE , Current limit error status enable" "Masked,Enabled" bitfld.word 0x06 6. " DATA_END_BIT_ERROR_STATUS_ENABLE , Data end bit error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 5. " DATA_CRC_ERROR_STATUS_ENABLE , Data CRC error status enable" "Masked,Enabled" bitfld.word 0x06 4. " DATA_TIMEOUT_ERROR_STATUS_ENABLE , Data timeout error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 3. " COMMAND_INDEX_ERROR_STATUS_ENABLE , Command index error status enable" "Masked,Enabled" bitfld.word 0x06 2. " COMMAND_END_BIT_ERROR_STATUS_ENABLE , Command end bit error status enable" "Masked,Enabled" textline " " bitfld.word 0x06 1. " COMMAND_CRC_ERROR_STATUS_ENABLE , Command CRC error status enable" "Masked,Enabled" bitfld.word 0x06 0. " COMMAND_TIMEOUT_ERROR_STATUS_ENABLE , Command timeout error status enable" "Masked,Enabled" rgroup.word 0x3C++0x1 line.word 0x00 "REG_22, AutoCMD12 error Status" bitfld.word 0x00 7. " COMMAND_NOT_ISSUED_BY_AUTO_CMD12_ERROR , Command Not Issued By Auto CMD12 Error" "No error,Error" bitfld.word 0x00 4. " AUTO_CMD12_INDEX_ERROR , Occurs if the Command Index error occurs in response to a command" "No error,Error" textline " " bitfld.word 0x00 3. " AUTO_CMD12_END_BIT_ERROR , Occurs when detecting that the end bit of command response is 0" "No error,Error" bitfld.word 0x00 2. " AUTO_CMD12_CRC_ERROR , Occurs when detecting a CRC error in the command response" "No error,Error" textline " " bitfld.word 0x00 1. " AUTO_CMD12_TIMEOUT_ERROR , Occurs if the no response is returned within 64 SDCLK cycles from the end bit of the command" "No error,Error" bitfld.word 0x00 0. " AUTO_CMD12_NOT_EXECUTED , Auto CMD12 not executed" "Executed,Not executed" rgroup.quad 0x40++0xF line.quad 0x00 "REG_23, Capabilities" bitfld.quad 0x00 30. " SPI_BLOCK_MODE , Spi block mode" "Not supported,Supported" bitfld.quad 0x00 29. " SPI_MODE , Spi mode" "Not supported,Supported" textline " " bitfld.quad 0x00 28. " SYSTEM_BUS_64_BIT_SUPPORT , System bus 64 bit support" "Not supported,Supported" bitfld.quad 0x00 27. " INTERRUPT_MODE , Interrupt mode" "Not supported,Supported" textline " " bitfld.quad 0x00 26. " VOLTAGE_SUPPORT_1.8V , VOLTAGE_SUPPORT_1.8V" "Not supported,Supported" bitfld.quad 0x00 25. " VOLTAGE_SUPPORT_3.0V , VOLTAGE_SUPPORT_3.0V" "Not supported,Supported" textline " " bitfld.quad 0x00 24. " VOLTAGE_SUPPORT_3.3V , VOLTAGE_SUPPORT_3.3V" "Not supported,Supported" bitfld.quad 0x00 23. " SUSPEND_RESUME_SUPPORT , This bit indicates whether the HC supports Suspend / Resume functionality" "Not supported,Supported" textline " " bitfld.quad 0x00 22. " SDMA_SUPPORT , This bit indicates whether the HC is capable of using DMA to transfer data between system memory and the HC directly" "Not supported,Supported" bitfld.quad 0x00 21. " HIGH_SPEED_SUPPORT , This bit indicates whether the HC and the Host System support High Speed mode" "Not supported,Supported" textline " " bitfld.quad 0x00 20. " ADMA2_SUPPORT , ADMA2_SUPPORT" "Not supported,Supported" bitfld.quad 0x00 19. " EXTENDED_MEDIA_BUS_SUPPORT , This bit indicates whether the Host Controller is capable bus" "Not supported,Supported" textline " " bitfld.quad 0x00 17.--18. " MAX_BLOCK_LENGTH , This value indicates the maximum block size that the HD can read and write to the buffer in the HC (in bytes)" "512,1024,2048,4096" hexmask.quad.byte 0x00 8.--13. 1. " BASE_CLOCK_FREQUENCY_SD_CLOCK , This value indicates the base (maximum) clock frequency for the SD clock" textline " " bitfld.quad 0x00 7. " TIMEOUT_CLOCK_UNIT , This bit shows the unit of base clock frequency used to detect Data Timeout Error" "Khz,Mhz" hexmask.quad.byte 0x00 0.--5. 1. " TIMEOUT_CLOCK_FREQUENCY , This bit shows the base clock frequency used to detect Data Timeout Error" line.quad 0x08 "REG_24, Maximum Current Capabilities" hexmask.quad.byte 0x08 16.--23. 1. " MAXIMUM_CURRENT_FOR_1.8V , Maximum current for 1.8V" hexmask.quad.byte 0x08 8.--15. 1. " MAXIMUM_CURRENT_FOR_3.0V , Maximum current for 3.0V" textline " " hexmask.quad.byte 0x08 0.--7. 1. " MAXIMUM_CURRENT_FOR_3.3V , Maximum current dor 3.3V" wgroup.word 0x50++0x03 line.word 0x00 "REG_25, Force Event for AutoCmd12 Error Status" bitfld.word 0x00 7. " FORCE_EVENT_FOR_CMD_NOT_ISSUED_BY_AUTOCMD12_ERROR , Force event for cmd not issued by AutoCMD12 error" "Not force,Force" textline " " bitfld.word 0x00 4. " FORCE_EVENT_FOR_AUTOCMD12_INDEX_ERROR , Force event for AutoCMD12 index error" "Not force,Force" textline " " bitfld.word 0x00 3. " FORCE_EVENT_FOR_AUTOCMD12_END_BIT_ERROR , Force event for AutoCMD12 end bit error" "Not force,Force" textline " " bitfld.word 0x00 2. " FORCE_EVENT_FOR_AUTOCMD12_CRC_ERROR , Force event for AutoCMD12 CRC error" "Not force,Force" textline " " bitfld.word 0x00 1. " FORCE_EVENT_FOR_AUTOCMD12_TIMEOUT_ERROR , Force event for AutoCMD12 timeout error" "Not force,Force" textline " " bitfld.word 0x00 0. " FORCE_EVENT_FOR_AUTOCMD12_NOT_EXECUTED , Force event for AutoCMD12 not executed" "Not force,Force" line.word 0x02 "REG_26, Force event for Error Int Status" bitfld.word 0x02 15. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[1] , Additional status bits can be defined in this register by the vendor" "Not force,Force" textline " " bitfld.word 0x02 14. " FORCE_EVENT_FOR_VENDOR_SPECIFIC_ERROR_STATUS[0] , Additional status bits can be defined in this register by the vendor" "Not force,Force" textline " " bitfld.word 0x02 13. " FORCE_EVENT_FOR_CREATE_ERROR , Force Event for Ceata Error" "Not force,Force" textline " " bitfld.word 0x02 12. " FORCE_EVENT_FOR_TARGET_RESPONSE_ERROR , Force Event for Target Response Error" "Not force,Force" textline " " bitfld.word 0x02 9. " FORCE_EVENT_FOR_ADMA_ERROR , Force Event for ADMA Error" "Not force,Force" textline " " bitfld.word 0x02 8. " FORCE_EVENT_FOR_AUTOCMD12_ERROR , Force Event for Auto CMD12 Error" "Not force,Force" textline " " bitfld.word 0x02 7. " FORCE_EVENT_FOR_CURRENT_LIMIT_ERROR , Force Event for Current Limit Error" "Not force,Force" textline " " bitfld.word 0x02 6. " FORCE_EVENT_FOR_DATA_END_BIT_ERROR , Force Event for Data End Bit Error" "Not force,Force" textline " " bitfld.word 0x02 5. " FORCE_EVENT_FOR_DATA_CRC_ERROR , Force Event for Data CRC Error" "Not force,Force" textline " " bitfld.word 0x02 4. " FORCE_EVENT_FOR_DATA_TIMEOUT_ERROR , Force Event for Data Timeout Error" "Not force,Force" textline " " bitfld.word 0x02 3. " FORCE_EVENT_FOR_COMMAND_INDEX_ERROR , Force Event for Command Index Error" "Not force,Force" textline " " bitfld.word 0x02 2. " FORCE_EVENT_FOR_COMMAND_END_BIT_ERROR , Force Event for Command End Bit Error" "Not force,Force" textline " " bitfld.word 0x02 1. " FORCE_EVENT_FOR_COMMAND_CRC_ERROR , Force Event for Command CRC Error" "Not force,Force" textline " " bitfld.word 0x02 0. " FORCE_EVENT_FOR_COMMAND_TIMEOUT_ERROR , Force Event for Command Timeout Error" "Not force,Force" group.byte 0x54++0x00 line.byte 0x00 "REG_27, ADMA error status register" bitfld.byte 0x00 2. " ADMA_LENGTH_MISMATCH_ERROR , ADMA length mismatch error" "No error,Error" bitfld.byte 0x00 0.--1. " ADMA_ERROR_STATE , ADMA error state" "ST_STOP,ST_FDS,Reserved,ST_TFR" group.quad 0x58++0x7 line.quad 0x00 "REG_28, ADMA System address" group.long 0x60++0x03 line.long 0x00 "REG_29, Boot Timeout control register" wgroup.byte 0x64++0x01 line.byte 0x00 "REG_30, Debug selection" bitfld.byte 0x00 0. " DEBUG_SEL , Debug sel" "0,1" line.byte 0x01 "REG_31, Incr Burst control" bitfld.byte 0x01 0. " INCR_BURST_EN , Incr burst enable" "Disable,Enable" group.byte 0xF0++0x00 line.byte 0x00 "REG_32, SPI int support" rgroup.word 0xFC++0x03 line.word 0x00 "REG_33, Slot interrupt status" bitfld.word 0x00 7. " INTERRUPT_SIGNAL[8] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 8 slot" "No interrupt,Interrupt" bitfld.word 0x00 6. " INTERRUPT_SIGNAL[7] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 7 slot" "No interrupt,Interrupt" textline " " bitfld.word 0x00 5. " INTERRUPT_SIGNAL[6] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 6 slot" "No interrupt,Interrupt" bitfld.word 0x00 4. " INTERRUPT_SIGNAL[5] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 5 slot" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " INTERRUPT_SIGNAL[4] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 4 slot" "No interrupt,Interrupt" bitfld.word 0x00 2. " INTERRUPT_SIGNAL[3] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 3 slot" "No interrupt,Interrupt" textline " " bitfld.word 0x00 1. " INTERRUPT_SIGNAL[2] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 2 slot" "No interrupt,Interrupt" bitfld.word 0x00 0. " INTERRUPT_SIGNAL[1] , These status bit indicate the logical OR of Interrupt signal and Wakeup signal for 1 slot" "No interrupt,Interrupt" line.word 0x02 "REG_34, Host controller version" hexmask.word.byte 0x02 8.--15. 1. " VENDOR_VERSION_NUMBER , This status is reserved for the vendor version number" hexmask.word.byte 0x02 0.--7. 1. " SPECIFICATION_VERSION_NUMBER , This status indicates the Host Controller Spec. Version" tree.end tree "CF Host controller registers" base ad:0xB2800000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "CFI_STS, CompactFlash Interface Status Register" bitfld.long 0x00 6. " IORDY , Current logic level of CF/CF+ card pin 42" "Low,High" bitfld.long 0x00 5. " INTRQ , Current logic level of CF/CF+ Interface pin 37" "Low,High" textline " " bitfld.long 0x00 4. " DMARQ , Current logic level of CF/CF+ Interface pin 43" "Low,High" bitfld.long 0x00 3. " CARDDETECT2 , Current state of -CD2 signal" "Detected,Not detected" textline " " bitfld.long 0x00 2. " CARDDETECT1 , Current state of -CD1 signal" "Detected,Not detected" group.long 0x04++0x13 line.long 0x00 "IRQ, IRQ Register" eventfld.long 0x00 11. " TRANSFERDONEINT , This bit is set when the transfer is completed by the CFHOST Controller based on the Transfer Count programmed" "No interrupt,Interrupt" eventfld.long 0x00 10. " BUFFAVINT , This bit is set when there is empty buffer (512-byte) for writes or a block of data is available for reads during the Block transfer mode" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " PIO_TRANSFERERRINT , This bit is set when there is transfer error detected while the CFHOST Controller is transferring data to the CF/CF+ Card in TrueIDE PIO Mode" "No interrupt,Interrupt" bitfld.long 0x00 8. " INTRQ_INT , This is the direct assignment of the CF/CF+ Interface pin 37 (INTRQ) when the Interface is operating in TrueIDE Mode" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " CARDDETECTINT , This bit is set when there is a change detected either on -CD1 or -CD2 inputs" "No interrupt,Interrupt" line.long 0x04 "IRQ_EN, Interrupt Enable Register" bitfld.long 0x04 11. " TRANSFERDONEINTEN , When set, this bit enables the generation of AHB Interrupt when the Transfer Done IRQ bit is set in the IRQ Register" "Disabled,Enabled" bitfld.long 0x04 10. " BUFFAVINTEN , When set, this bit enables the generation of AHB Interrupt when the Buffer Available IRQ bit is set in the IRQ Register" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " PIO_TRANSFERERRINTEN , When set, this bit enables the generation of AHB Interrupt when the PIO Transfer Err IRQ bit is set in the IRQ Register" "Disabled,Enabled" bitfld.long 0x04 8. " INTRQ_INTEN , When set, this bit enables the generation of AHB Interrupt when the TrueIDE Mode INTRQ IRQ bit is set in the IRQ Register" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " CARDDETECTINTEN , When set, this bit enables the generation of AHB Interrupt when the Card Detect IRQ bit is set in the IRQ Register" "Disabled,Enabled" line.long 0x08 "OP_MODE, Operation Mode Register" bitfld.long 0x08 11.--12. " DRQ_BLKSIZE , This field controls the DRQ Block Size for using Write_Multiple and Read Multiple Commands when the CFHOST Controller is operating in TrueIDE PIO Mode (in Byte Blocks)" "512,1024,2048,4096" bitfld.long 0x08 9. " MULTIWORDDMAMODEEN , This bit is used to enable/disable the TrueIDE MultiWord DMA transfer mode" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " UDMA_MODEEN , This bit is used to enable/disable the UltraDMA transfer mode" "Disabled,Enabled" bitfld.long 0x08 5. " CFI_TRISTATE , This bit is used to tri-state all output signals on the CF/CF+ Interface" "Not tri-stated,Tri-stated" textline " " bitfld.long 0x08 4. " HOSTEN , This bit is used to enable/disable the CFHOST Controller for generating transfers on the CF/CF+ Interface" "Disabled,Enabled" bitfld.long 0x08 3. " CARDRESET , This bit is used to generate the Reset signaling to the Card by asserting the RESET pin on the CF/CF+ Interface" "No reset,Reset" textline " " bitfld.long 0x08 2. " CARDTYPE , This bit defines the type of the Card attached to the CF/CF+ Interface" "CompactFlash,CF+" bitfld.long 0x08 0.--1. " CARDMODE , These bits define the operation mode Card attached to the CF/CF+ Interface, and the CFHOST Controller" "PC-Card Memory Mode,PC-Card I/O Mode,True-IDE Mode,?..." line.long 0x0C "CLK_CFG, CF Interface Clock Configuration Register" bitfld.long 0x0C 0.--3. " CLKCFG , These bits define the approximate frequency of the CF Interface clock that is provided to the CFHOST Controller (in Mhz)" "100,75,66,50,40,33,25,125,150,166,200,?..." line.long 0x10 "TM_CFG, CF Timing Mode Configuration Register" bitfld.long 0x10 10.--12. " UDMATIMINGMODE , These bits define the Ultra DMA Transfer Timing Modes when the CF/CF+ Interface is transferring data in Ultra DMA Mode" "Mode0,Mode1,Mode2,Mode3,Mode4,Mode5,Mode6,?..." bitfld.long 0x10 7.--9. " MULTIWORDDMATIMINGMODE , These bits define the MultiWord DMA Transfer Timing Modes" "Mode0,Mode1,Mode2,Mode3,Mode4,?..." textline " " bitfld.long 0x10 4.--6. " PIOTIMINGMODE , These bits define the PIO Timing Modes" "Mode0,Mode1,Mode2,Mode3,Mode4,Mode5,Mode6,?..." group.long 0x1C++0x03 line.long 0x00 "TF_CTR, Transfer Control Register" bitfld.long 0x00 31. " TRANSFERSTART , Transfer Start" "No effect,Started" bitfld.long 0x00 30. " TRANSFERDIR , Transfer DIR" "Low,High" textline " " bitfld.long 0x00 29. " SLAVEDMATRANSFER , Slave DMA Transfer" "Disabled,Enabled" bitfld.long 0x00 28. " DMATRANSFERMODE , DMA Transfer Mode" "Disabled,Enabled" textline " " hexmask.long.tbyte 0x00 0.--17. 1. " TRANSFERCOUNT , Transfer Count" wgroup.long 0x24++0x03 line.long 0x00 "WRITE_PORT, Write Data Port Register" hgroup.long 0x28++0x03 hide.long 0x00 "READ_PORT, Read Data Port Register" in group.long 0x30++0x23 line.long 0x00 "ATA_PORT, ATA Data Port Register" hexmask.long.word 0x00 0.--15. 1. " ATADATAPORT , ATA Data Port" line.long 0x04 "ATA_ERR_FTR, ATA Error/Features Register" hexmask.long.byte 0x04 0.--7. 1. " ATAERRFEATURE , ATA Error Feature" line.long 0x08 "ATA_SC, ATA Sector Count Register" hexmask.long.byte 0x08 0.--7. 1. " ATASECTORCOUNT , ATA Sector Count" line.long 0x0C "ATA_SN, ATA Sector Number Register" hexmask.long.byte 0x0C 0.--7. 1. " ATASECTORNUMBER , ATA Sector Number" line.long 0x10 "ATA_CL, ATA Cylinder Low Register" hexmask.long.byte 0x10 0.--7. 1. " ATACYLINDERLOW , ATA Cylinder Low" line.long 0x14 "ATA_CH, ATA Cylinder High Register" hexmask.long.byte 0x14 0.--7. 1. " ATACYLINDERRHIGH , ATA Cylinder High" line.long 0x18 "ATA_SH, ATA Select Card/Head Register" hexmask.long.byte 0x18 0.--7. 1. " ATASELCARDHEAD , ATA Select Card Head" line.long 0x1C "ATA_STS_CMD, ATA Status-Command Register" hexmask.long.byte 0x1C 0.--7. 1. " ATASTSCMD , ATA Status Command" line.long 0x20 "ATA_ASTS_DCTR, ATA Alternate Status/Device Control Register" hexmask.long.byte 0x20 0.--7. 1. " ATAALTSTSDEVCTR , ATA Alternate Status/Device Control" wgroup.long 0x200++0x03 line.long 0x00 "EXT_WRITE_PORT, Extended Write Data Port Registers" button "EXT_WRITE_PORT" "d ad:0xB2800200--ad:0xB28003FF /long" rgroup.long 0x400++0x03 line.long 0x00 "EXT_READ_PORT, Extended Read Data Port Registers" button "EXT_READ_PORT" "d ad:0xB2800200--ad:0xB28003FF /long" tree.end tree "xD Host controller registers" base ad:0xB2800600 width 22. group.long 0x00++0x17 line.long 0x00 "PRG, Program Register" bitfld.long 0x00 15. " VALID_BLK_RD , Read the valid blk byte" "Disabled,Enabled" bitfld.long 0x00 14. " MUL_BLK_ERASE , Multiblock erase operation" "Not occurred,Occurred" textline " " bitfld.long 0x00 13. " BAD_BLOCK_MARK_SET , Control bit to Mark a block as a bad block" "Disabled,Enabled" bitfld.long 0x00 12. " AUTO_VALID_BLK_RD , Enable bit to control automatic checking of valid block" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " READ_3 , Read operation" "Not occurred,Occurred" bitfld.long 0x00 10. " ECC_ENABLE , ECC checking and correction enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RESET , xD card reset" "No reset,Reset" bitfld.long 0x00 8. " MULTI_BLK_PGM , Multiblock write operation" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " ID_READ3 , Device ID read operation 3" "Not occurred,Occurred" bitfld.long 0x00 6. " ID_READ2 , Device ID read operation 2" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " ID_READ1 , Device ID read operation 1" "Not occurred,Occurred" bitfld.long 0x00 4. " SERIAL_DATA_IN , Memory Write Operation" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " READ_1 , Memory Read Operation" "Not occurred,Occurred" bitfld.long 0x00 2. " PRE_ERASE , Pre_Erase Operation" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " ERASE , Erase Operation" "Not occurred,Occurred" line.long 0x04 "INT_EN, Interrupt Enable Register" bitfld.long 0x04 18. " CARD_REMOVED_EN , Card Removed Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 17. " CARD_INSERT_EN , Card Insert Interrupt for xD Card" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " MUL_BIT_ERROR2_EN , Multi bit Error2 Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 15. " SIN_BIT_ERROR2_EN , District3 fail Interrupt for xD Card" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " DIS3_FAIL_EN , District3 fail Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 13. " DIS2_FAIL_EN , District2 fail Interrupt for xD Card" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " DIS1_FAIL_EN , District1 fail Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 11. " DIS0_FAIL_EN , District0 fail Interrupt for xD Card" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " VBLK_RD_DONE_EN , Valid block read done Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 9. " RESET_DONE_EN , Reset done Interrupt for xD Card" "Disabled,Enabled" textline " " bitfld.long 0x04 8. " MUL_BIT_ERROR1_EN , Multi bit Error1 Interrupt for xD Card" "Disabled,Enabled" bitfld.long 0x04 7. " PROGRAM_FAIL_ERR_EN , Program fail interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " INVALID_BLOCK_ERROR_EN , Block error interrupt" "Disabled,Enabled" bitfld.long 0x04 5. " WRITE_PROTECT_ERR_EN , Write protect err enable bit" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " BUFFER_WRITE_READY_EN , Buffer Write ready Interrupt" "Disabled,Enabled" bitfld.long 0x04 3. " DEVICE_ID_READY_EN , Device ID ready interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " MEM_READ_DATA_READY_EN , Mem_read_data_ready Interrupt" "Disabled,Enabled" bitfld.long 0x04 1. " TRANSFER_COMPLETE_EN , Transfer complete Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " SIN_BIT_ERROR1_EN , Single bit Error1 Interrupt for xD Card" "Disabled,Enabled" line.long 0x08 "INT_STS, Interrupt Status Register" bitfld.long 0x08 18. " CARD_REMOVED , This bit is set to 1 when the card is removed" "No interrupt,Interrupt" bitfld.long 0x08 17. " CARD_INSERT , This bit is set to 1 when the card is inserted" "No interrupt,Interrupt" textline " " bitfld.long 0x08 16. " MUL_BIT_ERROR2 , This bit is set when multi bit error2 or ECC error for xD Card is occurred when 256 bytes of data is read from xD Card" "No interrupt,Interrupt" bitfld.long 0x08 15. " SIN_BIT_ERROR2 , This bit is set when a single bit error2 occurs for xD Card during read transaction" "No interrupt,Interrupt" textline " " bitfld.long 0x08 14. " DIS3_FAIL , This bit is set to 1 when erase or program command failed in district3" "No interrupt,Interrupt" bitfld.long 0x08 13. " DIS2_FAIL , This bit is set to 1 when erase or program command failed in district2" "No interrupt,Interrupt" textline " " bitfld.long 0x08 12. " DIS1_FAIL , This bit is set to 1 when erase or program command failed in district1" "No interrupt,Interrupt" bitfld.long 0x08 11. " DIS0_FAIL , This bit is set to 1 when erase or program command failed in district0" "No interrupt,Interrupt" textline " " bitfld.long 0x08 10. " VBLK_RD_DONE , This bit is set whenever xD Card controller successfully performed valid_blk_rd operation" "No interrupt,Interrupt" bitfld.long 0x08 9. " RESET_DONE , This bit is set when reset operation is completed" "No interrupt,Interrupt" textline " " bitfld.long 0x08 8. " MUL_BIT_ERROR1 , This bit is set when multi bit error1 or ECC error for xD Card is occurred when 256 bytes of data is read from xD Card" "No interrupt,Interrupt" bitfld.long 0x08 7. " PROGRAM_FAIL_ERR , This bit is set to 1 when erase or program command fails" "No interrupt,Interrupt" textline " " bitfld.long 0x08 6. " INVALID_BLOCK_ERROR , This bit is set to 1 when the block supposed to read or write is not a valid block" "No interrupt,Interrupt" bitfld.long 0x08 5. " WRITE_PROTECT_ERR , This bit is set whenever a programming or erase operation is initiated for a write protected device" "No interrupt,Interrupt" textline " " bitfld.long 0x08 4. " BUFFER_WRITE_READY , This bit is set whenever buffer is having enough space to receive a block of data from ARM" "No interrupt,Interrupt" bitfld.long 0x08 3. " DEVICE_ID_READY , This bit is set whenever xD card controller read Device ID from xD Card" "No interrupt,Interrupt" textline " " bitfld.long 0x08 2. " MEM_READ_DATA_READY , This bit is set whenever Memory read data is ready in buffer" "No interrupt,Interrupt" bitfld.long 0x08 1. " TRANSFER_COMPLETE , This bit is set whenever xD Card controller successfully performed Serial_data_in, Read_1, Read_3, Erase, multi_blk_pgm, mul_blk_erase" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " SIN_BIT_ERROR1 , This bit is set when a single bit error1 occurs for xD Card during read transaction" "No interrupt,Interrupt" line.long 0x0C "ERASE_START_BLK_ADDR, Erase Start Block Address Register" line.long 0x10 "ERASE_END_BLK_ADDR, Erase End Block Address register" line.long 0x14 "PKT_SIZE, Packet Size Register" hexmask.long.word 0x14 0.--11. 1. " PKTSIZE , Size of a Data Block" rgroup.long 0x18++0x03 line.long 0x00 "NWBLKS, Number of Written Blocks Register" hexmask.long.tbyte 0x00 0.--19. 1. " NWBLKS , This register contains the Number of well written blocks/This register contains the number of blocks read from xD Card" group.long 0x1C++0x13 line.long 0x00 "PRE_ERASE_W_BLK_CNT, Pre_erase Write Block Count Register" hexmask.long.tbyte 0x00 0.--22. 1. " PREERASEWRBLKCNT , This register contains the Number of write blocks to be Pre-Erase before Writing" line.long 0x04 "ACC_TIME1, Access Time1 Register" bitfld.long 0x04 28.--31. " T_CLS_VAL , CLE setup time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x04 24.--27. " T_RHW_VAL , RE High to WE Low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x04 20.--23. " T_REH_VAL , RE high hold time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x04 16.--19. " T_RR_VAL , Ready to RE Low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x04 12.--15. " T_RP_VAL , Read pulse width" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x04 8.--11. " T_WHR_VAL , WE High to RE low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x04 4.--7. " T_WH_VAL , WE_High hold time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x04 0.--3. " T_WP_VAL , WE-Pulse width" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" line.long 0x08 "ACC_TIME2, Access Time2 Register" bitfld.long 0x08 28.--31. " T_IR_VAL , Output high Z to RE low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x08 24.--27. " T_CEA_VAL , CE Access time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x08 20.--23. " T_AR2_VAL , ALE low to RE low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x08 16.--19. " T_ALH_VAL , ALE hold time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x08 12.--15. " T_ALS_VAL , ALE setup time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x08 8.--11. " T_CH_VAL , CE hold time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x08 4.--7. " T_CS_VAL , T_CS_VAL" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x08 0.--3. " T_CLH_VAL , T_CLH_VAL" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" line.long 0x0C "ACC_TIME3, Access Time3 Register" hexmask.long.byte 0x0C 24.--31. 1. " T_AR1_VAL , ALE low to RE low" hexmask.long.byte 0x0C 16.--23. 1. " T_RC_VAL , Read cycle time" textline " " hexmask.long.byte 0x0C 8.--15. 1. " T_WW_VAL , WP High to WE low" hexmask.long.byte 0x0C 0.--7. 1. " T_WC_VAL , Write cycle time" line.long 0x10 "ACC_TIME4, Access Time4 Register" bitfld.long 0x10 28.--31. " NO_ADD_CYC , No of Address cycle xD Card support" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x10 24.--27. " T_DS_VAL , Data setup time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " bitfld.long 0x10 20.--23. " T_REA_VAL , RE access time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" bitfld.long 0x10 16.--19. " T_DH_VAL , Data hold time" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" textline " " hexmask.long.byte 0x10 4.--11. 1. " T_CEH_VAL , CE High hold time" bitfld.long 0x10 0.--3. " T_CR_VAL , CE low to RE low" "Reserved,1 Clk Cycle,2 Clk Cycle,3 Clk Cycle,4 Clk Cycle,5 Clk Cycle,6 Clk Cycle,7 Clk Cycle,8 Clk Cycle,9 Clk Cycle,10 Clk Cycle,11 Clk Cycle,12 Clk Cycle,13 Clk Cycle,14 Clk Cycle,15 Clk Cycle" rgroup.long 0x30++0x07 line.long 0x00 "DEV_ID_LSB, Device ID LSB Register" line.long 0x04 "DEV_ID_MSB, Device ID MSB Register" hexmask.long.byte 0x04 0.--7. 1. " DEVID_MSB , This register contains the MSB value of Device ID" group.long 0x38++0x27 line.long 0x00 "CMD1_PRG, Command1 Programming Register" hexmask.long.byte 0x00 24.--31. 1. " TRUE_PGM_COMMAND , Opcode value for true_pgm_command" hexmask.long.byte 0x00 16.--23. 1. " SERIAL_DATA_INPUT , Opcode value for Serial_data_input" textline " " hexmask.long.byte 0x00 8.--15. 1. " READ_3 , Opcode value for Read_3" hexmask.long.byte 0x00 0.--7. 1. " READ_1 , Opcode value for Read_1" line.long 0x04 "CMD2_PRG, Command2 Programming Register" hexmask.long.byte 0x04 24.--31. 1. " MULTI_PGM_COMMAND , Opcode value for multi_pgm_command" hexmask.long.byte 0x04 16.--23. 1. " DUMMY_PGM_COMMAND , Opcode value for dummy_pgm_command" textline " " hexmask.long.byte 0x04 8.--15. 1. " ERASE_END_COMMAND , Opcode value for Erase End Command" hexmask.long.byte 0x04 0.--7. 1. " ERASE_START_COMMAND , Opcode value for erase_start_command" line.long 0x08 "CMD3_PRG, Command3 Programming Register" hexmask.long.byte 0x08 8.--15. 1. " STATUS_READ1 , Opcode value for Status Read2" hexmask.long.byte 0x08 0.--7. 1. " STATUS_READ2 , Opcode value for Status Read1" line.long 0x0C "CMD4_PRG, Command4 Programming Register" hexmask.long.byte 0x0C 24.--31. 1. " ID_READ3 , Opcode value for ID_read3" hexmask.long.byte 0x0C 16.--23. 1. " ID_READ2 , Opcode value for ID_read2" textline " " hexmask.long.byte 0x0C 8.--15. 1. " ID_READ1 , Opcode value for ID_read1" hexmask.long.byte 0x0C 0.--7. 1. " RESET_COMMAND , Opcode value for reset_command" line.long 0x10 "BAD_BLK_CNT, BAD Block Count Register" bitfld.long 0x10 4.--7. " PAGE_ADD , Page address used for valid blk checking" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " BYTE_NO_FOR_BAD_BLK , This value is used by the xD Card controller to read the bad block status for a block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "MEM_ADDR, Memory Address Register" line.long 0x18 "PKT_CNT, Packet Count Register" hexmask.long.word 0x18 0.--15. 1. " PKT_CNT_REG , This value is used to control the block to be read/write from/to xD Card" line.long 0x1C "ECC1_ADDR, ECC1 Address Registers" hexmask.long.word 0x1C 0.--9. 1. " ECC1_ADDR , The register which stores the address of redundant area from where the ECC1 bytes of a block are read/written" line.long 0x20 "WP, Write Protect Reister" bitfld.long 0x20 0. " WR_PROT_REG , Write protection pin for Card" "Disabled,Enabled" line.long 0x24 "ECC2_ADDR, ECC2 Address Register" hexmask.long.word 0x24 0.--9. 1. " ECC2_ADDR , The register which stores the address of redundant area from where the ECC2 bytes of a block are read/written" rgroup.long 0x60++0x03 line.long 0x00 "BLK_STS, Block Status Register" hexmask.long.byte 0x00 0.--7. 1. " BLKSTS , This register stores the block status" group.long 0x64++0x0F line.long 0x0 "DISTR_0_ADDR, District_0 Address Registers" line.long 0x4 "DISTR_1_ADDR, District_1 Address Registers" line.long 0x8 "DISTR_2_ADDR, District_2 Address Registers" line.long 0xC "DISTR_3_ADDR, District_3 Address Registers" group.long 0x74++0x07 line.long 0x00 "PAG_SIZE, Page Size Register" hexmask.long.byte 0x00 24.--31. 1. " REDAREAPAGSIZE , This register contains the redundant area page size value" hexmask.long.word 0x00 12.--23. 1. " MAINAREAPAGSIZE , This register contains the main area page size value" textline " " hexmask.long.word 0x00 0.--11. 1. " TOTPAGSIZE , This register contains the total page size value" line.long 0x04 "THRESHOLD, Threshold Register" hexmask.long.word 0x04 0.--11. 1. " THLEVEL , This register contains the threshold amount of data to be programmed in fifo" tree.end tree "CFxD Global Interrupt registers" base ad:0xB2800800 width 12. group.long 0x00++0x0B line.long 0x00 "IRQ_STS, Global Interrupt Status register" bitfld.long 0x00 1. " INT_SRC_XD , Interrupt asserted from xD controller" "No interrupt,Interrupt" bitfld.long 0x00 0. " INT_SRC_CF , Interrupt asserted from CF controller" "No interrupt,Interrupt" line.long 0x04 "IRQ_STS_EN, Global Interrupt Status enable register" bitfld.long 0x04 1. " INT_SRC_XD , Interrupt asserted from xD controller" "No interrupt,Interrupt" bitfld.long 0x04 0. " INT_SRC_CF , Interrupt asserted from CF controller" "No interrupt,Interrupt" line.long 0x08 "IRQ_SGN_EN, Global Interrupt Signal enable register" bitfld.long 0x08 1. " INT_SRC_XD , Interrupt asserted from xD controller" "No interrupt,Interrupt" bitfld.long 0x08 0. " INT_SRC_CF , Interrupt asserted from CF controller" "No interrupt,Interrupt" tree.end width 0x0B tree.end tree "GMAC (Giga/Fast Ethernet port)" base ad:0xE2000000 tree "GMAC registers" width 19. base ad:0xE2000000 group.long 0x00++0x1F line.long 0x00 "MAC_CONFIGURATION, MAC Configuration Register" rbitfld.long 0x00 26. " SFTERR , SMII Force Transmit Error" "No error,Error" bitfld.long 0x00 25. " CST , CRC Stripping of Type Frames" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TC , Transmit Configuration in SMII" "Disabled,Enabled" bitfld.long 0x00 23. " WD , Watchdog Disable" "No,Yes" textline " " bitfld.long 0x00 22. " JD , Jabber Disable" "No,Yes" bitfld.long 0x00 21. " BE , Frame Burst Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " JE , Jumbo Frame Enable" "Disabled,Enabled" bitfld.long 0x00 17.--19. " IFG , Inter-Frame Gap" "96bit,88bit,80bit,72bit,64bit,56bit,48bit,40bit" textline " " bitfld.long 0x00 16. " DCRS , Disable Carrier Sense During Transmission" "No,Yes" bitfld.long 0x00 15. " PS , Port Select" "GMI,MII" textline " " bitfld.long 0x00 14. " FES , Speed" "10Mbps,100Mbps" bitfld.long 0x00 13. " DO , Disable Receive Own" "No,Yes" textline " " bitfld.long 0x00 12. " LM , Loopback Mode" "No loopback,Loopback" bitfld.long 0x00 11. " DM , Duplex Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " IPC , Checksum Offload" "Disabled,Enabled" bitfld.long 0x00 9. " DR , Disable Retry" "No,Yes" textline " " bitfld.long 0x00 8. " LUD , Link Up or Down" "Down,Up" bitfld.long 0x00 7. " ACS , Automatic Pad or CRC Stripping" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " BL , Back-Off Limit" "10,8,4,1" bitfld.long 0x00 4. " DC , Deferral Check" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TE , Transmitter Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RE , Receiver Enable" "Disabled,Enabled" line.long 0x04 "MAC_FRAME_FILTER, MAC Frame Filter" bitfld.long 0x04 31. " RA , Receive All" "Filter,All" bitfld.long 0x04 10. " HPF , Hash or Perfect Filter" "Hash,Hash and Filter" textline " " bitfld.long 0x04 9. " SAF , Source Address Filter Enable" "Disabled,Enabled" bitfld.long 0x04 8. " SAIF , SA Inverse Filtering" "Disabled,Enabled" textline " " bitfld.long 0x04 6.--7. " PCF , Pass Control Frames" "Filters,Forwards w/o PAUSE,Forwards all,Forwards passed" bitfld.long 0x04 5. " DBF , Disable Broadcast Frames" "No,Yes" textline " " bitfld.long 0x04 4. " PM , Pass All Multicast" "Disabled,Enabled" bitfld.long 0x04 3. " DAIF , DA Inverse Filtering" "Normal,Inversed" textline " " bitfld.long 0x04 2. " HMC , Hash Multicast" "Address filtering,Perfect destination" bitfld.long 0x04 1. " HUC , Hash Unicast" "Address filtering,Perfect destination" textline " " bitfld.long 0x04 0. " PR , Promiscuous Mode" "Disabled,Enabled" line.long 0x08 "HASH_TABLE_HIGH, Hash Table High Register" line.long 0x0C "HASH_TABLE_LOW, Hash Table Low Register" line.long 0x10 "GMII_ADDRESS, GMII Address Register" bitfld.long 0x10 11.--15. " PA , Physical Layer Address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 6.--10. " GR , GMII Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x10 2.--5. " CR , CSR Clock Range" "Clk_csr_i clock is 60-100 MHz,Clk_csr_i clock is 100-150 MHz,Clk_csr_i clock is 20-35 MHz,Clk_csr_i clock is 35-60 MHz,Clk_csr_i clock is 150-250 MHz,Clk_csr_i clock is 250-300 MHz,Reserved,Reserved,Clk_csr_i/4,Clk_csr_i/6,Clk_csr_i/8,Clk_csr_i/10,Clk_csr_i/12,Clk_csr_i/14,Clk_csr_i/16,Clk_csr_i/18" bitfld.long 0x10 1. " GW , GMII Write" "Low,High" textline " " bitfld.long 0x10 0. " GB , GMII Busy" "Idle,Busy" line.long 0x14 "GMII_DATA, GMII Data Register" hexmask.long.word 0x14 0.--15. 1. " GD , GMII Data" line.long 0x18 "FLOW_CONTROL, Flow Control Register" hexmask.long.word 0x18 16.--31. 1. " PT , Pause Time" bitfld.long 0x18 7. " DZPQ , Disable Zero-Quanta Pause" "No,Yes" textline " " bitfld.long 0x18 4.--5. " PLT , Pause Low Threshold" "4slot,28slot,144slot,256slot" bitfld.long 0x18 3. " UP , Unicast Pause Frame Detect" "Not detected,Detected" textline " " bitfld.long 0x18 2. " RFE , Receive Flow Control Enable" "Disabled,Enabled" bitfld.long 0x18 1. " TFE , Transmit Flow Control Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " FCA_BPA , Flow Control Busy or Backpressure Activate" "Deactivated,Activated" line.long 0x1C "VLAN_TAG, VLAN Tag Register" bitfld.long 0x1C 16. " ETV , Enable 12-Bit VLAN Tag Comparison" "Disabled,Enabled" hexmask.long.word 0x1C 0.--15. 1. " VL , VLAN Tag Identifier for Receive Frames" rgroup.long 0x20++0x07 line.long 0x00 "VERSION, Version Register" hexmask.long.byte 0x00 8.--15. 1. " USERVER , User-defined Version" hexmask.long.byte 0x00 0.--7. 1. " SNPSVER , Synopsys-defined Version" line.long 0x04 "DEBUG, Debug Register" bitfld.long 0x04 25. " TXSTSFSTS , MTL TxStatus FIFO Full Status" "Not full,Full" bitfld.long 0x04 24. " TXFSTS , MTL Tx FIFO Not Empty Status" "Empty,Not empty" textline " " bitfld.long 0x04 22. " TWCSTS , MTL Tx FIFO Write Controller Active Status" "Not active,Active" bitfld.long 0x04 20.--21. " TRCSTS , Tx FIFO Read Controller Status" "IDLE,READ,Waiting,Writing" textline " " bitfld.long 0x04 19. " TXPAUSED , MAC transmitter in PAUSE" "No PAUSE,PAUSE" bitfld.long 0x04 17.--18. " TFCSTS , MAC Transmit Frame Controller Status" "IDLE,Waiting,Generating and transmitting,Transfering" textline " " bitfld.long 0x04 16. " TPESTS , MAC GMII or MII Transmit Protocol Engine Status" "IDLE,Active" bitfld.long 0x04 8.--9. " RXFSTS , MTL Rx FIFO Fill-level Status" "Empty,Below treshold,Above treshold,Full" textline " " bitfld.long 0x04 5.--6. " RRCSTS , MTL Rx FIFO Read Controller State" "IDLE,Reading data,Reading status,Flushing" bitfld.long 0x04 4. " RWCSTS , MTL Rx FIFO Write Controller Active Status" "Not active,Active" textline " " bitfld.long 0x04 1.--2. " RFCFCSTS , MAC Receive Frame Controller FIFO Status" "Not active,Active,?..." bitfld.long 0x04 0. " RPESTS , MAC GMII or MII Receive Protocol Engine Status" "IDLE,Active" width 29. group.long 0x28++0x07 line.long 0x00 "REMOTE_WAKE_UP_FRAME_FILTER, Remote Wake-Up Frame Filter Register" line.long 0x04 "PMT_CONTROL_STATUS, PMT Control and Status Register" eventfld.long 0x04 31. " RWKFILTRST , Wake-Up Frame Filter Register Pointer Reset" "No reset,Reset" bitfld.long 0x04 9. " GLBLUCAST , Global Unicast" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " RWKPRCVD , Wake-Up Frame Received" "Not received,Received" bitfld.long 0x04 5. " MGKPRCVD , Magic Packet Received" "Not received,Received" textline " " bitfld.long 0x04 2. " RWKPKTEN , Wake-Up Frame Enable" "Disabled,Enabled" bitfld.long 0x04 1. " MGKPKTEN , Magic Packet Enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " PWRDWN , Power Down" "Powered up,Powered down" hgroup.long 0x30++0x03 hide.long 0x00 "LPI_CONTROL_STATUS, LPI Control and Status Register" in group.long 0x34++0x03 line.long 0x00 "LPI_TIMERS_CONTROL, LPI Timers Control Register" hexmask.long.word 0x00 16.--25. 1. " LST , LPI LS Timer" hexmask.long.word 0x00 0.--15. 1. " TWT , LPI TW Timer" hgroup.long 0x38++0x03 hide.long 0x00 "INTERRUPT_STATUS, Interrupt Register" in group.long 0x3C++0x03 line.long 0x00 "INTERRUPT_MASK, Interrupt Mask Register" bitfld.long 0x00 10. " LPIIM , LPI Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 9. " TSIM , Timestamp Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PMTIM , Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 2. " PCSANCIM , PCS AN Completion Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PCSLCHGIM , PCS Link Status Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 0. " RGSMIIIM , RGSMIIIM" "Not masked,Masked" group.long 0x40++0x7F line.long 0x0 "MAC_ADDRESS0_HIGH, MAC Address0 High Register" bitfld.long 0x0 31. " AE , Address Enable" "Disabled,Enabled" hexmask.long.word 0x0 0.--15. 1. " ADDRHI , MAC Address0" line.long (0x0+0x04) "MAC_ADDRESS0_LOW, MAC Address0 Low Register" line.long 0x8 "MAC_ADDRESS1_HIGH, MAC Address1 High Register" bitfld.long 0x8 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x8 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x8 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x8 0.--15. 1. " ADDRHI , MAC Address1" line.long (0x8+0x04) "MAC_ADDRESS1_LOW, MAC Address1 Low Register" line.long 0x10 "MAC_ADDRESS2_HIGH, MAC Address2 High Register" bitfld.long 0x10 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x10 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x10 0.--15. 1. " ADDRHI , MAC Address2" line.long (0x10+0x04) "MAC_ADDRESS2_LOW, MAC Address2 Low Register" line.long 0x18 "MAC_ADDRESS3_HIGH, MAC Address3 High Register" bitfld.long 0x18 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x18 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x18 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x18 0.--15. 1. " ADDRHI , MAC Address3" line.long (0x18+0x04) "MAC_ADDRESS3_LOW, MAC Address3 Low Register" line.long 0x20 "MAC_ADDRESS4_HIGH, MAC Address4 High Register" bitfld.long 0x20 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x20 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x20 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x20 0.--15. 1. " ADDRHI , MAC Address4" line.long (0x20+0x04) "MAC_ADDRESS4_LOW, MAC Address4 Low Register" line.long 0x28 "MAC_ADDRESS5_HIGH, MAC Address5 High Register" bitfld.long 0x28 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x28 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x28 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x28 0.--15. 1. " ADDRHI , MAC Address5" line.long (0x28+0x04) "MAC_ADDRESS5_LOW, MAC Address5 Low Register" line.long 0x30 "MAC_ADDRESS6_HIGH, MAC Address6 High Register" bitfld.long 0x30 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x30 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x30 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x30 0.--15. 1. " ADDRHI , MAC Address6" line.long (0x30+0x04) "MAC_ADDRESS6_LOW, MAC Address6 Low Register" line.long 0x38 "MAC_ADDRESS7_HIGH, MAC Address7 High Register" bitfld.long 0x38 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x38 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x38 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x38 0.--15. 1. " ADDRHI , MAC Address7" line.long (0x38+0x04) "MAC_ADDRESS7_LOW, MAC Address7 Low Register" line.long 0x40 "MAC_ADDRESS8_HIGH, MAC Address8 High Register" bitfld.long 0x40 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x40 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x40 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x40 0.--15. 1. " ADDRHI , MAC Address8" line.long (0x40+0x04) "MAC_ADDRESS8_LOW, MAC Address8 Low Register" line.long 0x48 "MAC_ADDRESS9_HIGH, MAC Address9 High Register" bitfld.long 0x48 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x48 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x48 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x48 0.--15. 1. " ADDRHI , MAC Address9" line.long (0x48+0x04) "MAC_ADDRESS9_LOW, MAC Address9 Low Register" line.long 0x50 "MAC_ADDRESS10_HIGH, MAC Address10 High Register" bitfld.long 0x50 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x50 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x50 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x50 0.--15. 1. " ADDRHI , MAC Address10" line.long (0x50+0x04) "MAC_ADDRESS10_LOW, MAC Address10 Low Register" line.long 0x58 "MAC_ADDRESS11_HIGH, MAC Address11 High Register" bitfld.long 0x58 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x58 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x58 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x58 0.--15. 1. " ADDRHI , MAC Address11" line.long (0x58+0x04) "MAC_ADDRESS11_LOW, MAC Address11 Low Register" line.long 0x60 "MAC_ADDRESS12_HIGH, MAC Address12 High Register" bitfld.long 0x60 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x60 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x60 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x60 0.--15. 1. " ADDRHI , MAC Address12" line.long (0x60+0x04) "MAC_ADDRESS12_LOW, MAC Address12 Low Register" line.long 0x68 "MAC_ADDRESS13_HIGH, MAC Address13 High Register" bitfld.long 0x68 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x68 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x68 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x68 0.--15. 1. " ADDRHI , MAC Address13" line.long (0x68+0x04) "MAC_ADDRESS13_LOW, MAC Address13 Low Register" line.long 0x70 "MAC_ADDRESS14_HIGH, MAC Address14 High Register" bitfld.long 0x70 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x70 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x70 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x70 0.--15. 1. " ADDRHI , MAC Address14" line.long (0x70+0x04) "MAC_ADDRESS14_LOW, MAC Address14 Low Register" line.long 0x78 "MAC_ADDRESS15_HIGH, MAC Address15 High Register" bitfld.long 0x78 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x78 30. " SA , Source Address" "DA,SA" textline " " hexmask.long.byte 0x78 24.--29. 1. " MBC , Mask Byte Control" hexmask.long.word 0x78 0.--15. 1. " ADDRHI , MAC Address15" line.long (0x78+0x04) "MAC_ADDRESS15_LOW, MAC Address15 Low Register" group.long 0xC0++0x03 line.long 0x00 "AN_CONTROL, AN Control Register" bitfld.long 0x00 18. " SGMRAL , SGMII RAL Control" "Low,High" bitfld.long 0x00 17. " LR , Lock to Reference" "Not locked,Locked" textline " " bitfld.long 0x00 16. " ECD , Enable Comma Detect" "Disabled,Enabled" bitfld.long 0x00 14. " ELE , External Loopback Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ANE , Auto-Negotiation Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RAN , Restart Auto-Negotiation" "Not restarted,Restarted" rgroup.long 0xC4++0x03 line.long 0x00 "AN_STATUS, AN Status Register" bitfld.long 0x00 8. " ES , Extended Status" "Not extended,Extended" bitfld.long 0x00 5. " ANC , Auto-Negotiation Complete" "Not completed,Completed" textline " " bitfld.long 0x00 3. " ANA , Auto-Negotiation Ability" "Low,High" bitfld.long 0x00 2. " LS , Link Status" "Down,Up" rgroup.long 0xD8++0x03 line.long 0x00 "SGMII_CONTROL_STATUS, SGMII/SMII Status Register" bitfld.long 0x00 5. " FALSCARDET , False Carrier Detected" "Not detected,Detected" bitfld.long 0x00 4. " JABTO , Jabber Timeout" "No error,Error" textline " " bitfld.long 0x00 3. " LNKSTS , Link Status" "Down,Up" bitfld.long 0x00 1.--2. " LNKSPEED , Link Speed" "2.5MHz,25MHz,125MHz,?..." textline " " bitfld.long 0x00 0. " LNKMOD , Link Mode" "Half-duplex,Full-duplex" group.long 0x100++0x03 line.long 0x00 "MMC_CONTROL, MMC Control Register" bitfld.long 0x00 5. " CNTPRSTLVL , Full-Half Preset" "Half,Full" bitfld.long 0x00 4. " CNTPRST , Counters Preset" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CNTFREEZ , MMC Counter Freeze" "Disabled,Enabled" bitfld.long 0x00 2. " RSTONRD , Reset on Read" "No reset,Reset" textline " " bitfld.long 0x00 1. " CNTSTOPRO , Counters Stop Rollover" "Disabled,Enabled" bitfld.long 0x00 0. " CNTRST , Counters Reset" "No reset,Reset" rgroup.long 0x104++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT, MMC Receive Interrupt Register" bitfld.long 0x00 22. " RXVLANGBFIS , MMC Receive VLAN Good Bad Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 21. " RXFOVFIS , MMC Receive FIFO Overflow Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 20. " RXPAUSFIS , MMC Receive Pause Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 19. " RXORANGEFIS , MMC Receive Out Of Range Error Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 18. " RXLENERFIS , MMC Receive Length Error Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 17. " RXUCGFIS , MMC Receive Unicast Good Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 16. " RX1024TMAXOCTGBFIS , MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 15. " RX512T1023OCTGBFIS , MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 14. " RX256T511OCTGBFIS , MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 13. " RX128T255OCTGBFIS , MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 12. " RX65T127OCTGBFIS , MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 11. " RX64OCTGBFIS , MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 10. " RXOSIZEGFIS , MMC Receive 64 Octet Good Bad Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 9. " RXUSIZEGFIS , MMC Receive Oversize Good Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 8. " RXJABERFIS , MMC Receive Undersize Good Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 7. " RXRUNTFIS , MMC Receive Jabber Error Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 6. " RXALGNERFIS , MMC Receive Runt Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 5. " RXCRCERFIS , MMC Receive Alignment Error Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 4. " RXMCGFIS , MMC Receive CRC Error Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 3. " RXBCGFIS , MMC Receive Multicast Good Frame Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 2. " RXGOCTIS , MMC Receive Broadcast Good Frame Counter Interrupt Status" "Not received,Received" bitfld.long 0x00 1. " RXGBOCTIS , MMC Receive Good Octet Counter Interrupt Status" "Not received,Received" textline " " bitfld.long 0x00 0. " RXGBFRMIS , MMC Receive Good Bad Octet Counter Interrupt Status" "Not received,Received" line.long 0x04 "MMC_TRANSMIT_INTERRUPT, RMMC Transmit Interrupt Register" bitfld.long 0x04 24. " TXVLANGFIS , MMC Transmit VLAN Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 23. " TXPAUSFIS , MMC Transmit Pause Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 22. " TXEXDEFFIS , MMC Transmit Excessive Deferral Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 21. " TXGFRMIS , MMC Transmit Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 20. " TXGOCTIS , MMC Transmit Good Octet Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 19. " TXCARERFIS , MMC Transmit Carrier Error Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 18. " TXEXCOLFIS , MMC Transmit Excessive Collision Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 17. " TXLATCOLFIS , MMC Transmit Late Collision Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 16. " TXDEFFIS , MMC Transmit Deferred Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 15. " TXMCOLGFIS , MMC Transmit Multiple Collision Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 14. " TXSCOLGFIS , MMC Transmit Single Collision Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 13. " TXUFLOWERFIS , MMC Transmit Underflow Error Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 12. " TXBCGBFIS , MMC Transmit Broadcast Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 11. " TXMCGBFIS , MMC Transmit Multicast Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 10. " TXUCGBFIS , MMC Transmit Unicast Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIS , MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 8. " TX512T1023OCTGBFIS , MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 7. " TX256T511OCTGBFIS , MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 6. " TX128T255OCTGBFIS , MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 5. " TX65T127OCTGBFIS , MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 4. " TX64OCTGBFIS , MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 3. " TXMCGFIS , MMC Transmit Multicast Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 2. " TXBCGFIS , MMC Transmit Broadcast Good Frame Counter Interrupt Status" "Not transmitted,Transmitted" bitfld.long 0x04 1. " TXGBFRMIS , MMC Transmit Good Bad Frame Counter Interrupt Status" "Not transmitted,Transmitted" textline " " bitfld.long 0x04 0. " TXGBOCTIS , MMC Transmit Good Bad Octet Counter Interrupt Status" "Not transmitted,Transmitted" width 36. group.long 0x10C++0x07 line.long 0x00 "MMC_RECEIVE_INTERRUPT_MASK, MMC Receive Interrupt Mask Register" bitfld.long 0x00 23. " RXWDOGFIM , MMC Receive Watchdog Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 22. " RXVLANGBFIM , MMC Receive VLAN Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 21. " RXFOVFIM , MMC Receive FIFO Overflow Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 20. " RXPAUSFIM , MMC Receive Pause Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " RXORANGEFIM , MMC Receive Out Of Range Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 18. " RXLENERFIM , MMC Receive Length Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 17. " RXUCGFIM , MMC Receive Unicast Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 16. " RX1024TMAXOCTGBFIM , MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 15. " RX512T1023OCTGBFIM , MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 14. " RX256T511OCTGBFIM , MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " RX128T255OCTGBFIM , MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 12. " RX65T127OCTGBFIM , MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " RX64OCTGBFIM , MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 10. " RXOSIZEGFIM , MMC Receive Oversize Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " RXUSIZEGFIM , MMC Receive Undersize Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 8. " RXJABERFIM , MMC Receive Jabber Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " RXRUNTFIM , MMC Receive Runt Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 6. " RXALGNERFIM , MMC Receive Alignment Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " RXCRCERFIM , MMC Receive CRC Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 4. " RXMCGFIM , MMC Receive Multicast Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " RXBCGFIM , MMC Receive Broadcast Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 2. " RXGOCTIM , MMC Receive Good Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " RXGBOCTIM , MMC Receive Good Bad Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 0. " RXGBFRMIM , MMC Receive Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" line.long 0x04 "MMC_TRANSMIT_INTERRUPT_MASK, MMC Transmit Interrupt Mask Register" bitfld.long 0x04 24. " TXVLANGFIM , MMC Transmit VLAN Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 23. " TXPAUSFIM , MMC Transmit Pause Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 22. " TXEXDEFFIM , MMC Transmit Excessive Deferral Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 21. " TXGFRMIM , MMC Transmit Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 20. " TXGOCTIM , MMC Transmit Good Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 19. " TXCARERFIM , MMC Transmit Carrier Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 18. " TXEXCOLFIM , MMC Transmit Excessive Collision Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 17. " TXLATCOLFIM , MMC Transmit Late Collision Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " TXDEFFIM , MMC Transmit Deferred Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 15. " TXMCOLGFIM , MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 14. " TXSCOLGFIM , MMC Transmit Single Collision Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 13. " TXUFLOWERFIM , MMC Transmit Underflow Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " TXBCGBFIM , MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 11. " TXMCGBFIM , MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " TXUCGBFIM , MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 9. " TX1024TMAXOCTGBFIM , MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 8. " TX512T1023OCTGBFIM , MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 7. " TX256T511OCTGBFIM , MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 6. " TX128T255OCTGBFIM , MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 5. " TX65T127OCTGBFIM , MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " TX64OCTGBFIM , MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 3. " TXMCGFIM , MMC Transmit Multicast Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 2. " TXBCGFIM , MMC Transmit Broadcast Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " TXGBFRMIM , MMC Transmit Good Bad Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x04 0. " TXGBOCTIM , MMC Transmit Good Bad Octet Counter Interrupt Mask" "Not masked,Masked" rgroup.long 0x114++0x63 line.long 0x00 "TX_OCTET_COUNT_GOOD_BAD, Transmit Octet Count for Good and Bad Frames" line.long 0x04 "TX_FRAME_COUNT_GOOD_BAD, Transmit Frame Count for Good and Bad Frames" line.long 0x08 "TX_BROADCAST_FRAMES_GOOD, Transmit Frame Count for Good Broadcast Frames" hexmask.long.word 0x08 0.--15. 1. " TXBCASTG , This field indicates the number of transmitted good broadcast frames" line.long 0xC "TX_MULTICAST_FRAMES_GOOD, Transmit Frame Count for Good Multicast Frames" hexmask.long.word 0xC 0.--15. 1. " TXMCASTG , This field indicates the number of transmitted good multicast frames" line.long 0x10 "TX_64OCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 64 Byte Frames" line.long 0x14 "TX_65TO127OCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 65 to 127 Bytes Frames" line.long 0x18 "TX_128TO255OCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 128 to 255 Bytes Frames" line.long 0x1C "TX_256TO511OCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 256 to 511 Bytes Frames" line.long 0x20 "TX_512TO1023OCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 512 to 1023 Bytes Frames" line.long 0x24 "TX_1024TOMAXOCTETS_FRAMES_GOOD_BAD, Transmit Octet Count for Good and Bad 1024 to Maxsize Bytes Frames" line.long 0x28 "TX_UNICAST_FRAMES_GOOD_BAD, Transmit Frame Count for Good and Bad Unicast Frames" line.long 0x2C "TX_MULTICAST_FRAMES_GOOD_BAD, Transmit Frame Count for Good and Bad Multicast Frames" hexmask.long.word 0x2C 0.--15. 1. " TXMCASTGB , This field indicates the number of transmitted good and bad multicast frames" line.long 0x30 "TX_BROADCAST_FRAMES_GOOD_BAD, Transmit Frame Count for Good and Bad Broadcast Frames" hexmask.long.word 0x30 0.--15. 1. " TXBCASTGB , This field indicates the number of transmitted good and bad broadcast frames" line.long 0x34 "TX_UNDERFLOW_ERROR_FRAMES, Transmit Frame Count for Underflow Error Frames" hexmask.long.word 0x34 0.--15. 1. " TXUNDRFLW , This field indicates the number of frames aborted because of frame underflow error" line.long 0x38 "TX_SINGLE_COLLISION_GOOD_FRAMES, Transmit Frame Count for Frames Transmitted after Single Collision" hexmask.long.word 0x38 0.--15. 1. " TXSNGLCOLG , This field indicates the number of successfully transmitted frames after a single collision in the half-duplex mode" line.long 0x3C "TX_MULTIPLE_COLLISION_GOOD_FRAMES, Transmit Frame Count for Frames Transmitted after Multiple Collision" hexmask.long.word 0x3C 0.--15. 1. " TXMULTCOLG , This field indicates the number of successfully transmitted frames after multiple collisions in the half-duplex mode" line.long 0x40 "TX_DEFERRED_FRAMES, Transmit Frame Count for Deferred Frames" hexmask.long.word 0x40 0.--15. 1. " TXDEFRD , This field indicates the number of successfully transmitted frames after a deferral in the half-duplex mode" line.long 0x44 "TX_LATE_COLLISION_FRAMES, Transmit Frame Count for Late Collision Error Frames" hexmask.long.word 0x44 0.--15. 1. " TXLATECOL , This field indicates the number of frames aborted because of late collision error" line.long 0x48 "TX_EXCESSIVE_COLLISION_FRAMES, Transmit Frame Count for Excessive Collision Error Frames" hexmask.long.word 0x48 0.--15. 1. " TXEXSCOL , This field indicates the number of frames aborted because of excessive (16) collision error" line.long 0x4C "TX_CARRIER_ERROR_FRAMES, Transmit Frame Count for Carrier Sense Error Frames" hexmask.long.word 0x4C 0.--15. 1. " TXCARR , This field indicates the number of frames aborted because of carrier sense error" line.long 0x50 "TX_OCTET_COUNT_GOOD, Transmit Octet Count for Good Frames" line.long 0x54 "TX_FRAME_COUNT_GOOD, Transmit Frame Count for Good Frames" line.long 0x58 "TX_EXCESSIVE_DEFERRAL_ERROR, Transmit Frame Count for Excessive Deferral Error Frames" hexmask.long.word 0x58 0.--15. 1. " TXEXSDEF , This field indicates the number of frames aborted because of excessive deferral error, that is, frames deferred for more than two max-sized frame times" line.long 0x5C "TX_PAUSE_FRAMES, Transmit Frame Count for Good PAUSE Frames" hexmask.long.word 0x5C 0.--15. 1. " TXPAUSE , This field indicates the number of transmitted good PAUSE frames" line.long 0x60 "TX_VLAN_FRAMES_GOOD, Transmit Frame Count for Good VLAN Frames" hexmask.long.word 0x60 0.--15. 1. " TXVLANG , This register maintains the number of transmitted good VLAN frames, exclusive of retried frames" rgroup.long 0x180++0x63 line.long 0x00 "RX_FRAMES_COUNT_GOOD_BAD, Receive Frame Count for Good and Bad Frames" line.long 0x04 "RX_OCTET_COUNT_GOOD_BAD, Receive Octet Count for Good and Bad Frames" line.long 0x08 "RX_OCTET_COUNT_GOOD, Receive Octet Count for Good Frames" line.long 0x0C "RX_BROADCAST_FRAMES_GOOD, Receive Frame Count for Good Broadcast Frames" hexmask.long.word 0x0C 0.--15. 1. " RXBCASTG , This field indicates the number of received good broadcast frames" line.long 0x10 "RX_MULTICAST_FRAMES_GOOD, Receive Frame Count for Good Multicast Frames" hexmask.long.word 0x10 0.--15. 1. " RXMCASTG , This field indicates the number of received good multicast frames" line.long 0x14 "RX_CRC_ERROR_FRAMES, Receive Frame Count for CRC Error Frames" hexmask.long.word 0x14 0.--15. 1. " RXCRCERR , This field indicates the number of frames received with CRC error" line.long 0x18 "RX_ALIGNMENT_ERROR_FRAMES, Receive Frame Count for Alignment Error Frames" hexmask.long.word 0x18 0.--15. 1. " RXALGNERR , This field indicates the number of frames received with alignment (dribble) error. This field is valid only in the 10 or 100 Mbps mode" line.long 0x1C "RX_RUNT_ERROR_FRAMES, Receive Frame Count for Runt Error Frames" hexmask.long.word 0x1C 0.--15. 1. " RXRUNTERR , This field indicates the number of frames received with runt error" line.long 0x20 "RX_JABBER_ERROR_FRAMES, Receive Frame Count for Jabber Error Frames" hexmask.long.word 0x20 0.--15. 1. " RXJABERR , This field indicates the number of giant frames received with length" line.long 0x24 "RX_UNDERSIZE_FRAMES_GOOD, Receive Frame Count for Undersize Frames" line.long 0x28 "RX_OVERSIZE_FRAMES_GOOD, Receive Frame Count for Oversize Frames" hexmask.long.word 0x28 0.--15. 1. " RXOVERSZG , This field indicates the number of frames received without errors" line.long 0x2C "RX_64OCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 64 Byte Frames" line.long 0x30 "RX_65TO127OCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 65 to 127 Bytes Frames" line.long 0x34 "RX_128TO255OCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 128 to 255 Bytes Frames" line.long 0x38 "RX_256TO511OCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 256 to 511 Bytes Frames" line.long 0x3C "RX_512TO1023OCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 512 to 1,023 Bytes Frames" line.long 0x40 "RX_1024TOMAXOCTETS_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad 1,024 to Maxsize Bytes Frames" line.long 0x44 "RX_UNICAST_FRAMES_GOOD, Receive Frame Count for Good Unicast Frames" line.long 0x48 "RX_LENGTH_ERROR_FRAMES, Receive Frame Count for Length Error Frames" hexmask.long.word 0x48 0.--15. 1. " RXLENERR , This field indicates the number of frames received with length error" line.long 0x4C "RX_OUT_OF_RANGE_TYPE_FRAMES, Receive Frame Count for Out of Range Frames" hexmask.long.word 0x4C 0.--15. 1. " RXOUTOFRNG , This field indicates the number of received frames with length field not equal to the valid frame size" line.long 0x50 "RX_PAUSE_FRAMES, Receive Frame Count for PAUSE Frames" hexmask.long.word 0x50 0.--15. 1. " RXPAUSEFRM , This field indicates the number of received good and valid PAUSE frames" line.long 0x54 "RX_FIFO_OVERFLOW_FRAMES, Receive Frame Count for FIFO Overflow Frames" hexmask.long.word 0x54 0.--15. 1. " RXFIFOOVFL , This field indicates the number of received frames missed because of FIFO overflow" line.long 0x58 "RX_VLAN_FRAMES_GOOD_BAD, Receive Frame Count for Good and Bad VLAN Frames" hexmask.long.word 0x58 0.--15. 1. " RXVLANFRGB , This field indicates the number of received good and bad VLAN frames" line.long 0x5C "RX_WATCHDOG_ERROR_FRAMES, Receive Frame Count for Watchdog Error Frames" hexmask.long.word 0x5C 0.--15. 1. " RXWDGERR , This field indicates the number of frames received with error because of the watchdog timeout error" line.long 0x60 "RX_RECEIVE_ERROR_FRAMES, Receive Frame Count for Receive Error Frames" group.long 0x200++0x03 line.long 0x00 "MMC_IPC_RECEIVE_INTERRUPT_MASK, MMC Receive Checksum Offload Interrupt Mask Register" bitfld.long 0x00 29. " RXICMPEROIM , MMC Receive ICMP Error Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 28. " RXICMPGOIM , MMC Receive ICMP Good Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 27. " RXTCPEROIM , MMC Receive TCP Error Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 26. " RXTCPGOIM , MMC Receive TCP Good Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " RXUDPEROIM , MMC Receive UDP Error Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 24. " RXUDPGOIM , MMC Receive UDP Good Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 23. " RXIPV6NOPAYOIM , MMC Receive IPV6 No Payload Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 22. " RXIPV6HEROIM , MMC Receive IPV6 Header Error Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 21. " RXIPV6GOIM , MMC Receive IPV6 Good Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 20. " RXIPV4UDSBLOIM , MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " RXIPV4FRAGOIM , MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 18. " RXIPV4NOPAYOIM , MMC Receive IPV4 No Payload Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 17. " RXIPV4HEROIM , MMC Receive IPV4 Header Error Octet Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 16. " RXIPV4GOIM , MMC Receive IPV4 Good Octet Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " RXICMPERFIM , MMC Receive ICMP Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 12. " RXICMPGFIM , MMC Receive ICMP Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " RXTCPERFIM , MMC Receive TCP Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 10. " RXTCPGFIM , MMC Receive TCP Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " RXUDPERFIM , MMC Receive UDP Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 8. " RXUDPGFIM , MMC Receive UDP Good Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " RXIPV6NOPAYFIM , MMC Receive IPV6 No Payload Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 6. " RXIPV6HERFIM , MMC Receive IPV6 Header Error Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " RXIPV6GFIM , MMC Receive IPV6 Good Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 4. " RXIPV4UDSBLFIM , MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " RXIPV4FRAGFIM , MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 2. " RXIPV4NOPAYFIM , MMC Receive IPV4 No Payload Frame Counter Interrupt Mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " RXIPV4HERFIM , MMC Receive IPV4 Header Error Frame Counter Interrupt Mask" "Not masked,Masked" bitfld.long 0x00 0. " RXIPV4GFIM , MMC Receive IPV4 Good Frame Counter Interrupt Mask" "Not masked,Masked" rgroup.long 0x208++0x03 line.long 0x00 "MMC_IPC_RECEIVE_INTERRUPT, MMC Receive Checksum Offload Interrupt Register" bitfld.long 0x00 29. " RXICMPEROIS , MMC Receive ICMP Error Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 28. " RXICMPGOIS , MMC Receive ICMP Good Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 27. " RXTCPEROIS , MMC Receive TCP Error Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 26. " RXTCPGOIS , MMC Receive TCP Good Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 25. " RXUDPEROIS , MMC Receive UDP Error Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 24. " RXUDPGOIS , MMC Receive UDP Good Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 23. " RXIPV6NOPAYOIS , MMC Receive IPV6 No Payload Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 22. " RXIPV6HEROIS , MMC Receive IPV6 Header Error Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 21. " RXIPV6GOIS , MMC Receive IPV6 Good Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 20. " RXIPV4UDSBLOIS , MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 19. " RXIPV4FRAGOIS , MMC Receive IPV4 Fragmented Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 18. " RXIPV4NOPAYOIS , MMC Receive IPV4 No Payload Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 17. " RXIPV4HEROIS , MMC Receive IPV4 Header Error Octet Counter Interrupt Status" "Low,High" bitfld.long 0x00 16. " RXIPV4GOIS , MMC Receive IPV4 Good Octet Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 13. " RXICMPERFIS , MMC Receive ICMP Error Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 12. " RXICMPGFIS , MMC Receive ICMP Good Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 11. " RXTCPERFIS , MMC Receive TCP Error Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 10. " RXTCPGFIS , MMC Receive TCP Good Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 9. " RXUDPERFIS , MMC Receive UDP Error Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 8. " RXUDPGFIS , MMC Receive UDP Good Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 7. " RXIPV6NOPAYFIS , MMC Receive IPV6 No Payload Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 6. " RXIPV6HERFIS , MMC Receive IPV6 Header Error Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 5. " RXIPV6GFIS , MMC Receive IPV6 Good Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 4. " RXIPV4UDSBLFIS , MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 3. " RXIPV4FRAGFIS , MMC Receive IPV4 Fragmented Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 2. " RXIPV4NOPAYFIS , MMC Receive IPV4 No Payload Frame Counter Interrupt Status" "Low,High" textline " " bitfld.long 0x00 1. " RXIPV4HERFIS , MMC Receive IPV4 Header Error Frame Counter Interrupt Status" "Low,High" bitfld.long 0x00 0. " RXIPV4GFIS , MMC Receive IPV4 Good Frame Counter Interrupt Status" "Low,High" rgroup.long 0x210++0x37 line.long 0x00 "RXIPV4_GOOD_FRAMES, Receive IPV4 Good Frame Counter Register" line.long 0x04 "RXIPV4_HEADER_ERROR_FRAMES, Receive IPV4 Header Error Frame Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXIPV4HDRERRFRM , This field indicates the number of IPv4 datagrams received with header errors" line.long 0x08 "RXIPV4_NO_PAYLOAD_FRAMES, Receive IPV4 No Payload Frame Counter Register" line.long 0x0C "RXIPV4_FRAGMENTED_FRAMES, Receive IPV4 Fragmented Frame Counter Register" hexmask.long.word 0x0C 0.--15. 1. " RXIPV4FRAGFRM , This field indicates the number of good IPv4 datagrams received with fragmentation" line.long 0x10 "RXIPV4_UDP_CHECKSUM_DISABLED_FRAMES, Receive IPV4 UDP Checksum Disabled Frame Counter Register" line.long 0x14 "RXIPV6_GOOD_FRAMES, Receive IPV6 Good Frame Counter Register" line.long 0x18 "RXIPV6_HEADER_ERROR_FRAMES, Receive IPV6 Header Error Frame Counter Register" hexmask.long.word 0x18 0.--15. 1. " RXIPV6HDRERRFRM , This field indicates the number of IPv6 datagrams received with header errors" line.long 0x1C "RXIPV6_NO_PAYLOAD_FRAMES, Receive IPV6 No Payload Frame Counter Register" line.long 0x20 "RXUDP_GOOD_FRAMES, Receive UDP Good Frame Counter Register" line.long 0x24 "RXUDP_ERROR_FRAMES, Receive UDP Error Frame Counter Register" hexmask.long.word 0x24 0.--15. 1. " RXUDPERRFRM , This field indicates the number of good IP datagrams whose UDP payload has a checksum error" line.long 0x28 "RXTCP_GOOD_FRAMES, Receive TCP Good Frame Counter Register" line.long 0x2C "RXTCP_ERROR_FRAMES, Receive TCP Error Frame Counter Register" hexmask.long.word 0x2C 0.--15. 1. " RXTCPERRFRM , This field indicates the number of good IP datagrams whose TCP payload has a checksum error" line.long 0x30 "RXICMP_GOOD_FRAMES, Receive ICMP Good Frame Counter Register" line.long 0x34 "RXICMP_ERROR_FRAMES, Receive ICMP Error Frame Counter Register" hexmask.long.word 0x34 0.--15. 1. " RXICMPERRFRM , This field indicates the number of good IP datagrams whose ICMP payload has a checksum error" rgroup.long 0x250++0x37 line.long 0x00 "RXIPV4_GOOD_OCTETS, Receive IPV4 Good Octet Counter Register" line.long 0x04 "RXIPV4_HEADER_ERROR_OCTETS, Receive IPV4 Header Error Octet Counter Register" hexmask.long.word 0x04 0.--15. 1. " RXIPV4HDRERROCT , This field indicates the number of bytes received in the IPv4 datagrams with header errors" line.long 0x08 "RXIPV4_NO_PAYLOAD_OCTETS, Receive IPV4 No Payload Octet Counter Register" hexmask.long.word 0x08 0.--15. 1. " RXIPV4NOPAYOCT , This field indicates the number of bytes received in IPv4 datagrams that did not have a TCP, UDP, or ICMP payload" line.long 0x0C "RXIPV4_FRAGMENTED_OCTETS, Receive IPV4 Fragmented Octet Counter Register" line.long 0x10 "RXIPV4_UDP_CHECKSUM_DISABLE_OCTETS, Receive IPV4 Fragmented Octet Counter Register" line.long 0x14 "RXIPV6_GOOD_OCTETS, Receive IPV6 Good Octet Counter Register" line.long 0x18 "RXIPV6_HEADER_ERROR_OCTETS, Receive IPV6 Header Error Octet Counter Register" hexmask.long.word 0x18 0.--15. 1. " RXIPV6HDRERROCT , This field indicates the number of bytes received in IPv6 datagrams with header errors" line.long 0x1C "RXIPV6_NO_PAYLOAD_OCTETS, Receive IPV6 No Payload Octet Counter Register" hexmask.long.word 0x1C 0.--15. 1. " RXIPV6NOPAYOCT , This field indicates the number of bytes received in IPv6 datagrams that did not have a TCP, UDP, or ICMP payload" line.long 0x20 "RXUDP_GOOD_OCTETS, Receive UDP Good Octet Counter Register" line.long 0x24 "RXUDP_ERROR_OCTETS, Receive UDP Error Octet Counter Register" hexmask.long.word 0x24 0.--15. 1. " RXUDPERROCT , This field indicates the number of bytes received in a UDP segment with checksum errors" line.long 0x28 "RXTCP_GOOD_OCTETS, Receive TCP Good Octet Counter Register" line.long 0x2C "RXTCP_ERROR_OCTETS, Receive TCP Error Octet Counter Register" hexmask.long.word 0x2C 0.--15. 1. " RXTCPERROCT , This field indicates the number of bytes received in a TCP segment with checksum errors" line.long 0x30 "RXICMP_GOOD_OCTETS, Receive ICMP Good Octet Counter Register" line.long 0x34 "RXICMP_ERROR_OCTETS, Receive ICMP Error Octet Counter Register" hexmask.long.word 0x34 0.--15. 1. " RXICMPERROCT , Number of bytes received in an ICMP segment with checksum errors" group.long 0x700++0x07 line.long 0x00 "TIMESTAMP_CONTROL, Timestamp Control Register" bitfld.long 0x00 18. " TSENMACADDR , Enable MAC address for PTP Frame Filtering" "Disabled,Enabled" textline " " bitfld.long 0x00 16.--17. " SNAPTYPSEL , Select PTP packets for Taking Snapshots" "0,1,2,3" bitfld.long 0x00 15. " TSMSTRENA , Enable Snapshot for Messages Relevant to Master" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TSEVNTENA , Enable Timestamp Snapshot for Event Messages" "Disabled,Enabled" bitfld.long 0x00 13. " TSIPV4ENA , Enable Processing of PTP Frames Sent over IPv4-UDP" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " TSIPV6ENA , Enable Processing of PTP Frames Sent Over IPv6-UDP" "Disabled,Enabled" bitfld.long 0x00 11. " TSIPENA , Enable Processing of PTP over Ethernet Frames" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " TSVER2ENA , Enable PTP packet Processing for Version 2 Format" "Disabled,Enabled" bitfld.long 0x00 9. " TSCTRLSSR , Timestamp Digital or Binary Rollover Control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TSENALL , Enable Timestamp for All Frames" "Disabled,Enabled" bitfld.long 0x00 5. " TSADDREG , Addend Reg Update" "Not updated,Updated" textline " " bitfld.long 0x00 4. " TSTRIG , Timestamp Interrupt Trigger Enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSUPDT , Timestamp Update" "Not updated,Updated" textline " " bitfld.long 0x00 2. " TSINIT , Timestamp Initialize" "Not initialized,Initialized" bitfld.long 0x00 1. " TSCFUPDT , Timestamp Fine or Coarse Update" "Not updated,Updated" textline " " bitfld.long 0x00 0. " TSENA , Timestamp Enable" "Disabled,Enabled" line.long 0x04 "SUB_SECOND_INCREMENT, Sub-Second Increment Register" hexmask.long.byte 0x04 0.--7. 1. " SSINC , Sub-second Increment Value" rgroup.long 0x708++0x07 line.long 0x00 "SYSTEM_TIME_SECONDS, System Time - Seconds Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS, System Time - Nanoseconds Register" hexmask.long 0x04 0.--30. 1. " TSSS , Timestamp Sub Seconds" group.long 0x710++0x13 line.long 0x00 "SYSTEM_TIME_SECONDS_UPDATE, System Time - Seconds Update Register" line.long 0x04 "SYSTEM_TIME_NANOSECONDS_UPDATE, System Time - Nanoseconds Update Register" bitfld.long 0x04 31. " ADDSUB , Add or subtract time" "Added,Substracted" hexmask.long 0x04 0.--30. 1. " TSSS , Timestamp Sub Second" line.long 0x08 "TIMESTAMP_ADDEND, Timestamp Addend Register" line.long 0x0C "TARGET_TIME_SECONDS, Target Time Seconds Register" line.long 0x10 "TARGET_TIME_NANOSECONDS, Target Time Nanoseconds Register" bitfld.long 0x10 31. " TRGTBUSY , Target Time Register Busy" "Not busy,Busy" hexmask.long 0x10 0.--30. 1. " TTSLO , Target Timestamp Low Register" hgroup.long 0x728++0x03 hide.long 0x00 "TIMESTAMP_STATUS, Timestamp Status Register" in group.long 0x72C++0x03 line.long 0x00 "PPS_CONTROL, PPS Control Register" rbitfld.long 0x00 5.--6. " TRGTMODSEL0 , Target Time Register Mode for PPS0 Output" "Interrupt event,Reserved,Int event and PPS0,No interrupts" rbitfld.long 0x00 4. " PPSEN0 , Flexible PPS Output Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " PPSCTRL_PPSCMD , PPSCTRL0 or PPSCMD0 (digital=binary/2)" "2Hz,4Hz,8Hz,16Hz,32Hz,64Hz,128Hz,256Hz,512Hz,1024Hz,2048Hz,4096Hz,8192Hz,16384Hz,32768Hz,?..." group.long 0x738++0x03 line.long 0x00 "AV_MAC_CONTROL, AV MAC Control Register" bitfld.long 0x00 24.--25. " PTPCH , Channel for Queuing the PTP Packets" "Channel 0,Channel 1,Channel 2,?..." bitfld.long 0x00 21.--22. " AVCH , Channel for Queuing the AV Control Packets" "Channel 0,Channel 1,Channel 2,?..." textline " " bitfld.long 0x00 20. " AVCD , AV Channel Disable" "No,Yes" bitfld.long 0x00 16.--18. " AVP , AV Priority for Queuing" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--15. 1. " AVT , AV EtherType Value" group.long 0x800++0x7F line.long 0x0 "MAC_ADDRESS16_HIGH, MAC Address16 High Register" bitfld.long 0x0 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x0 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x0 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x0 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x0 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x0 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x0 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x0 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x0 0.--15. 1. " ADDRHI , MAC Address16" line.long (0x0+0x04) "MAC_ADDRESS16_LOW, MAC Address16 Low Register" line.long 0x8 "MAC_ADDRESS17_HIGH, MAC Address17 High Register" bitfld.long 0x8 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x8 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x8 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x8 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x8 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x8 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x8 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x8 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x8 0.--15. 1. " ADDRHI , MAC Address17" line.long (0x8+0x04) "MAC_ADDRESS17_LOW, MAC Address17 Low Register" line.long 0x10 "MAC_ADDRESS18_HIGH, MAC Address18 High Register" bitfld.long 0x10 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x10 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x10 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x10 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x10 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x10 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x10 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x10 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x10 0.--15. 1. " ADDRHI , MAC Address18" line.long (0x10+0x04) "MAC_ADDRESS18_LOW, MAC Address18 Low Register" line.long 0x18 "MAC_ADDRESS19_HIGH, MAC Address19 High Register" bitfld.long 0x18 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x18 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x18 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x18 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x18 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x18 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x18 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x18 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x18 0.--15. 1. " ADDRHI , MAC Address19" line.long (0x18+0x04) "MAC_ADDRESS19_LOW, MAC Address19 Low Register" line.long 0x20 "MAC_ADDRESS20_HIGH, MAC Address20 High Register" bitfld.long 0x20 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x20 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x20 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x20 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x20 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x20 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x20 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x20 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x20 0.--15. 1. " ADDRHI , MAC Address20" line.long (0x20+0x04) "MAC_ADDRESS20_LOW, MAC Address20 Low Register" line.long 0x28 "MAC_ADDRESS21_HIGH, MAC Address21 High Register" bitfld.long 0x28 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x28 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x28 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x28 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x28 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x28 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x28 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x28 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x28 0.--15. 1. " ADDRHI , MAC Address21" line.long (0x28+0x04) "MAC_ADDRESS21_LOW, MAC Address21 Low Register" line.long 0x30 "MAC_ADDRESS22_HIGH, MAC Address22 High Register" bitfld.long 0x30 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x30 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x30 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x30 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x30 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x30 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x30 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x30 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x30 0.--15. 1. " ADDRHI , MAC Address22" line.long (0x30+0x04) "MAC_ADDRESS22_LOW, MAC Address22 Low Register" line.long 0x38 "MAC_ADDRESS23_HIGH, MAC Address23 High Register" bitfld.long 0x38 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x38 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x38 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x38 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x38 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x38 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x38 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x38 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x38 0.--15. 1. " ADDRHI , MAC Address23" line.long (0x38+0x04) "MAC_ADDRESS23_LOW, MAC Address23 Low Register" line.long 0x40 "MAC_ADDRESS24_HIGH, MAC Address24 High Register" bitfld.long 0x40 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x40 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x40 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x40 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x40 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x40 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x40 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x40 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x40 0.--15. 1. " ADDRHI , MAC Address24" line.long (0x40+0x04) "MAC_ADDRESS24_LOW, MAC Address24 Low Register" line.long 0x48 "MAC_ADDRESS25_HIGH, MAC Address25 High Register" bitfld.long 0x48 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x48 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x48 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x48 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x48 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x48 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x48 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x48 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x48 0.--15. 1. " ADDRHI , MAC Address25" line.long (0x48+0x04) "MAC_ADDRESS25_LOW, MAC Address25 Low Register" line.long 0x50 "MAC_ADDRESS26_HIGH, MAC Address26 High Register" bitfld.long 0x50 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x50 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x50 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x50 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x50 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x50 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x50 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x50 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x50 0.--15. 1. " ADDRHI , MAC Address26" line.long (0x50+0x04) "MAC_ADDRESS26_LOW, MAC Address26 Low Register" line.long 0x58 "MAC_ADDRESS27_HIGH, MAC Address27 High Register" bitfld.long 0x58 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x58 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x58 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x58 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x58 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x58 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x58 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x58 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x58 0.--15. 1. " ADDRHI , MAC Address27" line.long (0x58+0x04) "MAC_ADDRESS27_LOW, MAC Address27 Low Register" line.long 0x60 "MAC_ADDRESS28_HIGH, MAC Address28 High Register" bitfld.long 0x60 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x60 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x60 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x60 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x60 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x60 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x60 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x60 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x60 0.--15. 1. " ADDRHI , MAC Address28" line.long (0x60+0x04) "MAC_ADDRESS28_LOW, MAC Address28 Low Register" line.long 0x68 "MAC_ADDRESS29_HIGH, MAC Address29 High Register" bitfld.long 0x68 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x68 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x68 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x68 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x68 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x68 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x68 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x68 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x68 0.--15. 1. " ADDRHI , MAC Address29" line.long (0x68+0x04) "MAC_ADDRESS29_LOW, MAC Address29 Low Register" line.long 0x70 "MAC_ADDRESS30_HIGH, MAC Address30 High Register" bitfld.long 0x70 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x70 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x70 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x70 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x70 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x70 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x70 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x70 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x70 0.--15. 1. " ADDRHI , MAC Address30" line.long (0x70+0x04) "MAC_ADDRESS30_LOW, MAC Address30 Low Register" line.long 0x78 "MAC_ADDRESS31_HIGH, MAC Address31 High Register" bitfld.long 0x78 31. " AE , Address Enable" "Disabled,Enabled" bitfld.long 0x78 30. " SA , Source Address" "DA,SA" textline " " bitfld.long 0x78 29. " MBC[5] , Register 18[15:8]" "Not masked,Masked" bitfld.long 0x78 28. " MBC[4] , Register 18[7:0]" "Not masked,Masked" textline " " bitfld.long 0x78 27. " MBC[3] , Register 19[31:24]" "Not masked,Masked" bitfld.long 0x78 26. " MBC[2] , Register 19[23:16]" "Not masked,Masked" textline " " bitfld.long 0x78 25. " MBC[1] , Register 19[15:8]" "Not masked,Masked" bitfld.long 0x78 24. " MBC[0] , Register 19[7:0]" "Not masked,Masked" textline " " hexmask.long.word 0x78 0.--15. 1. " ADDRHI , MAC Address31" line.long (0x78+0x04) "MAC_ADDRESS31_LOW, MAC Address31 Low Register" tree.end tree "DMA Registers" base ad:0xE2001000 width 42. group.long 0x00++0x1F line.long 0x00 "BUS_MODE, Bus Mode Register" bitfld.long 0x00 26. " MB , Mixed Burst" "Disabled,Enabled" bitfld.long 0x00 25. " AAL , Address Aligned Beats" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " 8XPBL , 8xPBL Mode" "Disabled,Enabled" bitfld.long 0x00 23. " USP , Use Seperate PBL" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 17.--22. 1. " RPBL , Rx DMA PBL" bitfld.long 0x00 16. " FB , Fixed Burst" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--13. 1. " PBL , Programmable Burst Length" bitfld.long 0x00 7. " ATDS , Alternate Descriptor Size" "Low,High" textline " " bitfld.long 0x00 2.--6. " DSL , Descriptor Skip Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " SWR , Software Reset" "No reset,Reset" line.long 0x04 "TRANSMIT_POLL_DEMAND, Transmit Poll Demand Register" line.long 0x08 "RECEIVE_POLL_DEMAND, Receive Poll Demand Register" line.long 0x0C "RECEIVE_DESCRIPTOR_LIST_ADDRESS, Receive Descriptor List Address Register" hexmask.long 0x0C 2.--31. 0x04 " RDESLA_32BIT , Start of Receive List" line.long 0x10 "TRANSMIT_DESCRIPTOR_LIST_ADDRESS, Transmit Descriptor List Address Register" hexmask.long 0x10 2.--31. 0x04 " TDESLA_32BIT , Start of Transmit List" line.long 0x14 "STATUS, Status Register" bitfld.long 0x14 30. " GLPII , GMAC LPI Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 29. " TTI , Timestamp Trigger Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x14 28. " GPI , GMAC PMT Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 27. " GMI , GMAC MMC Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x14 26. " GLI , GMAC Line interface Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 23.--25. " EB , Error Bits" "RxDMA write data buffer,TxDMA write data buffer,RxDMA read data buffer,TxDMA read data buffer,RxDMA write descriptor,TxDMA write descriptor,RxDMA read descriptor,TxDMA read descriptor" textline " " bitfld.long 0x14 20.--22. " TS , Transmit Process State" "Stopped,Running: Fetching,Running: Waiting,Running: Reading,TIME_STAMP write,Reserved,Suspended: Transmit,Running: Closing" bitfld.long 0x14 17.--19. " RS , Received Process State" "Stopped,Running: Fetching,Reserved,Running: Waiting,Suspended: Receive,Running: Closing,TIME_STAMP write,Running: Transferring" textline " " eventfld.long 0x14 16. " NIS , Normal Interrupt Summary" "Low,High" eventfld.long 0x14 15. " AIS , Abnormal Interrupt Summary" "Low,High" textline " " bitfld.long 0x14 14. " ERI , Early Receive Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 13. " FBI , Fatal Bus Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x14 10. " ETI , Early Transmit Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 9. " RWT , Receive Watchdog Timeout" "No timeout,Timeout" textline " " bitfld.long 0x14 8. " RPS , Receive Process Stopped" "Not stopped,Stopped" bitfld.long 0x14 7. " RU , Receive Buffer Unavailable" "Available,Unavailable" textline " " bitfld.long 0x14 6. " RI , Receive Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 5. " UNF , Transmit Underflow" "No underflow,Underflow" textline " " bitfld.long 0x14 4. " OVF , Receive Overflow" "No overflow,Overflow" bitfld.long 0x14 3. " TJT , Transmit Jabber Timeout" "No timeout,Timeout" textline " " bitfld.long 0x14 2. " TU , Transmit Buffer Unavailable" "Available,Unavailable" bitfld.long 0x14 1. " TPS , Transmit Process Stopped" "Not stopped,Stopped" textline " " bitfld.long 0x14 0. " TI , Transmit Interrupt" "No interrupt,Interrupt" line.long 0x18 "OPERATION_MODE, Operation Mode Register" bitfld.long 0x18 26. " DT , Disable Dropping of TCP/IP Checksum Error Frames" "No,Yes" bitfld.long 0x18 25. " RSF , Receive Store and Forward" "Not received,Received" textline " " bitfld.long 0x18 24. " DFF , Disable Flushing of Received Frames" "No,Yes" bitfld.long 0x18 23. 9.--10. " RFA , MSB of Threshold for Activating Flow Control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." textline " " bitfld.long 0x18 22. 11.--12. " RFD , MSB of Threshold for Deactivating Flow Control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x18 21. " TSF , Transmit Store and Forward" "Not transmitted,Transmitted" textline " " bitfld.long 0x18 20. " FTF , Flush Transmit FIFO" "Not flushed,Flushed" bitfld.long 0x18 14.--16. " TTC , Transmit Threshold Control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x18 13. " ST , Start or Stop Transmission Command" "Stopped,Started" bitfld.long 0x18 8. " EFC , Enable HW Flow Control" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " FEF , Forward Error Frames" "Not forwarded,Forwarded" bitfld.long 0x18 6. " FUF , Forward Undersized Good Frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x18 3.--4. " RTC , Receive Threshold Control" "64,32,96,128" bitfld.long 0x18 2. " OSF , Operate on Second Frame" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " SR , Start or Stop Receive" "Stopped,Started" line.long 0x1C "INTERRUPT_ENABLE, Interrupt Enable Register" bitfld.long 0x1C 16. " NIE , Normal Interrupt Summary Enable" "Disabled,Enabled" bitfld.long 0x1C 15. " AIE , Abnormal Interrupt Summary Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " ERE , Early Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 13. " FBE , Fatal Bus Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " ETE , Early Transmit Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 9. " RWE , Receive Watchdog Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " RSE , Receive Stopped Enable" "Disabled,Enabled" bitfld.long 0x1C 7. " RUE , Receive Buffer Unavailable Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " RIE , Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 5. " UNE , Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " OVE , Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 3. " TJE , Transmit Jabber Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " TUE , Transmit Buffer Unavailable Enable" "Disabled,Enabled" bitfld.long 0x1C 1. " TSE , Transmit Stopped Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " TIE , Transmit Interrupt Enable" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, Missed Frame and Buffer Overflow Counter Register" bitfld.long 0x00 28. " OVFCNTOVF , Overflow bit for FIFO Overflow Counter" "No overflow,Overflow" hexmask.long.word 0x00 17.--27. 1. " OVFFRMCNT , This field indicates the number of frames missed by the application" textline " " bitfld.long 0x00 16. " MISCNTOVF , Overflow bit for Missed Frame Counter" "No overflow,Overflow" hexmask.long.word 0x00 0.--15. 1. " MISFRMCNT , This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable" group.long 0x24++0x07 line.long 0x00 "RECEIVE_INTERRUPT_WATCHDOG_TIMER, Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x00 0.--7. 1. " RIWT , RI Watchdog Timer Count" line.long 0x04 "AXI_BUS_MODE, AXI Bus Mode Register" bitfld.long 0x04 31. " EN_LPI , Enable Low Power Interface" "Disabled,Enabled" bitfld.long 0x04 30. " LPI_XIT_FRM , Unlock on Magic Packet or Remote Wake Up" "Disabled,Enabled" textline " " bitfld.long 0x04 20.--21. " WR_OSR_LMT , AXI Maximum Write OutStanding Request Limit" "0,1,2,3" bitfld.long 0x04 16.--17. " RD_OSR_LMT , AXI Maximum Read OutStanding Request Limit" "0,1,2,3" textline " " rbitfld.long 0x04 12. " AXI_AAL , Address-Aligned Beats" "0,1" rbitfld.long 0x04 7. " BLEN256 , AXI Burst Length 256" "0,1" textline " " rbitfld.long 0x04 6. " BLEN128 , AXI Burst Length 128" "0,1" rbitfld.long 0x04 5. " BLEN64 , AXI Burst Length 64" "0,1" textline " " rbitfld.long 0x04 4. " BLEN32 , AXI Burst Length 32" "0,1" bitfld.long 0x04 3. " BLEN16 , AXI Burst Length 16" "0,1" textline " " bitfld.long 0x04 2. " BLEN8 , AXI Burst Length 8" "0,1" bitfld.long 0x04 1. " BLEN4 , AXI Burst Length 4" "0,1" textline " " bitfld.long 0x04 0. " UNDEF , AXI Undefined Burst Length" "0,1" rgroup.long 0x2C++0x03 line.long 0x00 "AHB_OR_AXI_STATUS, AHB or AXI Status Register" bitfld.long 0x00 1. " AXIRDSTS , AXI Master Read Channel Status" "Inactive,Active" bitfld.long 0x00 0. " AXWHSTS , AXI Master Write Channel or AHB Master Status" "Inactive,Active" rgroup.long 0x48++0x13 line.long 0x00 "CURRENT_HOST_TRANSMIT_DESCRIPTOR, Current Host Transmit Descriptor Register" line.long 0x04 "CURRENT_HOST_RECEIVE_DESCRIPTOR, Current Host Receive Descriptor Register" line.long 0x08 "CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, Current Host Transmit Buffer Address Register" line.long 0x0C "CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, Current Host Receive Buffer Address Register" line.long 0x10 "HW_FEATURE, HW Feature Register" bitfld.long 0x10 28.--30. " ACTPHYIF , Active or Selected PHY interface" "GMII or MII,Reserved,SGMII,TBI,RMII,RTBI,Reserved,RevMII" bitfld.long 0x10 24. " ENHDESSEL , Alternate" "0,1" textline " " bitfld.long 0x10 22.--23. " TXCHCNT , Number of additional Tx channels" "0,1,2,3" bitfld.long 0x10 20.--21. " RXCHCNT , Number of additional Rx channels" "0,1,2,3" textline " " bitfld.long 0x10 19. " RXFIFOSIZE , Rx FIFO > 2,048 Bytes" "0,1" bitfld.long 0x10 18. " RXTYP2COE , IP Checksum Offload" "0,1" textline " " bitfld.long 0x10 16. " TXCOESEL , Checksum Offload in Tx" ",01" bitfld.long 0x10 17. " RXTYP1COE , IP Checksum Offload" "0,1" textline " " bitfld.long 0x10 15. " AVSEL , AV Feature" "0,1" bitfld.long 0x10 14. " EEESEL , Energy Efficient Ethernet" "0,1" textline " " bitfld.long 0x10 13. " TSVER2SEL , IEEE 1588-2008 Advanced Timestamp" "0,1" bitfld.long 0x10 12. " TSVER1SEL , Only IEEE 1588-2002 Timestamp" "0,1" textline " " bitfld.long 0x10 11. " MMCSEL , RMON Module" "0,1" bitfld.long 0x10 10. " MGKSEL , PMT Magic Packet" "0,1" textline " " bitfld.long 0x10 9. " RWKSEL , PMT Remote Wakeup" "0,1" bitfld.long 0x10 8. " SMASEL , SMA (MDIO) Interface" "0,1" textline " " bitfld.long 0x10 6. " PCSSEL , PCS registers" "0,1" bitfld.long 0x10 5. " ADDMACADRSEL , Multiple MAC Address Registers" "0,1" textline " " bitfld.long 0x10 4. " HASHSEL , HASH Filter" "0,1" bitfld.long 0x10 3. " EXTHASHEN , Expanded DA Hash Filter" "0,1" textline " " bitfld.long 0x10 2. " HDSEL , Half-Duplex support" "0,1" bitfld.long 0x10 1. " GMIISEL , 1000 Mbps support" "0,1" textline " " bitfld.long 0x10 0. " MIISEL , 10 or 100 Mbps support" "0,1" tree.end tree "DMA_CH1 Registers" base (ad:0xE2001000+0x100) width 51. group.long 0x00++0x1F line.long 0x00 "CHANNEL1_BUS_MODE, Bus Mode Register" bitfld.long 0x00 26. " MB , Mixed Burst" "Disabled,Enabled" bitfld.long 0x00 25. " AAL , Address Aligned Beats" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " 8XPBL , 8xPBL Mode" "Disabled,Enabled" bitfld.long 0x00 23. " USP , Use Seperate PBL" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 17.--22. 1. " RPBL , Rx DMA PBL" bitfld.long 0x00 16. " FB , Fixed Burst" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 8.--13. 1. " PBL , Programmable Burst Length" bitfld.long 0x00 7. " ATDS , Alternate Descriptor Size" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--6. " DSL , Descriptor Skip Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "CHANNEL1_TRANSMIT_POLL_DEMAND, Transmit Poll Demand Register" line.long 0x08 "CHANNEL1_RECEIVE_POLL_DEMAND, Receive Poll Demand Register" line.long 0x0C "CHANNEL1_RECEIVE_DESCRIPTOR_LIST_ADDRESS, Receive Descriptor List Address Register" hexmask.long 0x0C 2.--31. 0x4 " RDESLA_32BIT , Start of Receive List" line.long 0x10 "CHANNEL1_TRANSMIT_DESCRIPTOR_LIST_ADDRESS, Transmit Descriptor List Address Register" hexmask.long 0x10 2.--31. 0x04 " TDESLA_32BIT , Start of Transmit List" line.long 0x14 "CHANNEL1_STATUS, Status Register" bitfld.long 0x14 30. " GTMSI , GMAC TMS Interrupt for Channel 1" "No interrupt,Interrupt" bitfld.long 0x14 23.--25. " EB , Error Bits" "RxDMA write data buffer,TxDMA write data buffer,RxDMA read data buffer,TxDMA read data buffer,RxDMA write descriptor,TxDMA write descriptor,RxDMA read descriptor,TxDMA read descriptor" textline " " bitfld.long 0x14 20.--22. " TS , Transmit Process State" "Stopped,Running: Fetching,Running: Waiting,Running: Reading,TIME_STAMP write,Reserved,Suspended: Transmit,Running: Closing" bitfld.long 0x14 17.--19. " RS , Received Process State" "Stopped,Running: Fetching,Reserved,Running: Waiting,Suspended: Receive,Running: Closing,TIME_STAMP write,Running: Transferring" textline " " eventfld.long 0x14 16. " NIS , Normal Interrupt Summary" "Low,High" eventfld.long 0x14 15. " AIS , Abnormal Interrupt Summary" "Low,High" textline " " bitfld.long 0x14 14. " ERI , Early Receive Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 13. " FBI , Fatal Bus Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x14 10. " ETI , Early Transmit Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 9. " RWT , Receive Watchdog Timeout" "No timeout,Timeout" textline " " bitfld.long 0x14 8. " RPS , Receive Process Stopped" "Not stopped,Stopped" bitfld.long 0x14 7. " RU , Receive Buffer Unavailable" "Available,Unavailable" textline " " bitfld.long 0x14 6. " RI , Receive Interrupt" "No interrupt,Interrupt" bitfld.long 0x14 5. " UNF , Transmit Underflow" "No underflow,Underflow" textline " " bitfld.long 0x14 4. " OVF , Receive Overflow" "No overflow,Overflow" bitfld.long 0x14 3. " TJT , Transmit Jabber Timeout" "No timeout,Timeout" textline " " bitfld.long 0x14 2. " TU , Transmit Buffer Unavailable" "Available,Unavailable" bitfld.long 0x14 1. " TPS , Transmit Process Stopped" "Not stopped,Stopped" textline " " bitfld.long 0x14 0. " TI , Transmit Interrupt" "No interrupt,Interrupt" line.long 0x18 "CHANNEL1_OPERATION_MODE, Operation Mode Register" bitfld.long 0x18 26. " DT , Disable Dropping of TCP/IP Checksum Error Frames" "No,Yes" bitfld.long 0x18 25. " RSF , Receive Store and Forward" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " DFF , Disable Flushing of Received Frames" "No,Yes" bitfld.long 0x18 23. 9.--10. " RFA , MSB of Threshold for Activating Flow Control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." textline " " bitfld.long 0x18 22. 11.--12. " RFD , MSB of Threshold for Deactivating Flow Control" "FULL - 1KB,FULL - 2KB,FULL - 3KB,FULL - 4KB,FULL - 5KB,FULL - 6KB,FULL - 7KB,?..." bitfld.long 0x18 21. " TSF , Transmit Store and Forward" "Disabled,Enabled" textline " " bitfld.long 0x18 20. " FTF , Flush Transmit FIFO" "Not flushed,Flushed" bitfld.long 0x18 14.--16. " TTC , Transmit Threshold Control" "64,128,192,256,40,32,24,16" textline " " bitfld.long 0x18 13. " ST , Start or Stop Transmission Command" "Disabled,Enabled" bitfld.long 0x18 8. " EFC , Enable HW Flow Control" "Disabled,Enabled" textline " " bitfld.long 0x18 7. " FEF , Forward Error Frames" "Not forwarded,Forwarded" bitfld.long 0x18 6. " FUF , Forward Undersized Good Frames" "Not forwarded,Forwarded" textline " " bitfld.long 0x18 3.--4. " RTC , Receive Threshold Control" "Not received,Received,?..." bitfld.long 0x18 2. " OSF , Operate on Second Frame" "Disabled,Enabled" textline " " bitfld.long 0x18 1. " SR , Start or Stop Receive" "Stop,Start" line.long 0x1C "CHANNEL1_INTERRUPT_ENABLE, Interrupt Enable Register" bitfld.long 0x1C 16. " NIE , Normal Interrupt Summary Enable" "Disabled,Enabled" bitfld.long 0x1C 15. " AIE , Abnormal Interrupt Summary Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 14. " ERE , Early Receive Interrupt Enable" "Disable,Enabled" bitfld.long 0x1C 13. " FBE , Fatal Bus Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 10. " ETE , Early Transmit Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 9. " RWE , Receive Watchdog Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 8. " RSE , Receive Stopped Enable" "Disabled,Enabled" bitfld.long 0x1C 7. " RUE , Receive Buffer Unavailable Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 6. " RIE , Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 5. " UNE , Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " OVE , Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x1C 3. " TJE , Transmit Jabber Timeout Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 2. " TUE , Transmit Buffer Unavailable Enable" "Disabled,Enabled" bitfld.long 0x1C 1. " TSE , Transmit Stopped Enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 0. " TIE , Transmit Interrupt Enable" "Disabled,Enabled" rgroup.long 0x20++0x03 line.long 0x00 "CHANNEL1_MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, Missed Frame and Buffer Overflow Counter Register" bitfld.long 0x00 28. " OVFCNTOVF , Overflow bit for FIFO Overflow Counter" "No overflow,Overflow" hexmask.long.word 0x00 17.--27. 1. " OVFFRMCNT , This field indicates the number of frames missed by the application" textline " " bitfld.long 0x00 16. " MISCNTOVF , Overflow bit for Missed Frame Counter" "No overflow,Overflow" hexmask.long.word 0x00 0.--15. 1. " MISFRMCNT , This field indicates the number of frames missed by the controller because of the Host Receive Buffer being unavailable" group.long 0x24++0x03 line.long 0x00 "CHANNEL1_RECEIVE_INTERRUPT_WATCHDOG_TIMER, Receive Interrupt Watchdog Timer Register" hexmask.long.byte 0x00 0.--7. 1. " RIWT , RI Watchdog Timer Count" group.long 0x30++0x03 line.long 0x00 "CHANNEL1_SLOT_FUNCTION_CONTROL_STATUS, Channel 1 Slot Function Control and Status Register" bitfld.long 0x00 16.--19. " RSN , Reference Slot Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " ASC , Advance Slot Check" "0,1" textline " " bitfld.long 0x00 0. " ESC , Enable Slot Comparison" "0,1" rgroup.long 0x48++0x13 line.long 0x00 "CHANNEL1_CURRENT_HOST_TRANSMIT_DESCRIPTOR, Current Host Transmit Descriptor Register" line.long 0x04 "CHANNEL1_CURRENT_HOST_RECEIVE_DESCRIPTOR, Current Host Receive Descriptor Register" line.long 0x08 "CHANNEL1_CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, Current Host Transmit Buffer Address Register" line.long 0x0C "CHANNEL1_CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, Current Host Receive Buffer Address Register" line.long 0x10 "CHANNEL1_HW_FEATURE, HW Feature Register" bitfld.long 0x10 28.--30. " ACTPHYIF , Active or Selected PHY interface" "GMII or MII,Reserved,SGMII,TBI,RMII,RTBI,Reserved,RevMII" bitfld.long 0x10 24. " ENHDESSEL , Alternate" "0,1" textline " " bitfld.long 0x10 22.--23. " TXCHCNT , Number of additional Tx channels" "0,1,2,3" bitfld.long 0x10 20.--21. " RXCHCNT , Number of additional Rx channels" "0,1,2,3" textline " " bitfld.long 0x10 19. " RXFIFOSIZE , Rx FIFO > 2,048 Bytes" "0,1" bitfld.long 0x10 18. " RXTYP2COE , IP Checksum Offload" "0,1" textline " " bitfld.long 0x10 16. " TXCOESEL , Checksum Offload in Tx" ",01" bitfld.long 0x10 17. " RXTYP1COE , IP Checksum Offload" "0,1" textline " " bitfld.long 0x10 15. " AVSEL , AV Feature" "0,1" bitfld.long 0x10 14. " EEESEL , Energy Efficient Ethernet" "0,1" textline " " bitfld.long 0x10 13. " TSVER2SEL , IEEE 1588-2008 Advanced Timestamp" "0,1" bitfld.long 0x10 12. " TSVER1SEL , Only IEEE 1588-2002 Timestamp" "0,1" textline " " bitfld.long 0x10 11. " MMCSEL , RMON Module" "0,1" bitfld.long 0x10 10. " MGKSEL , PMT Magic Packet" "0,1" textline " " bitfld.long 0x10 9. " RWKSEL , PMT Remote Wakeup" "0,1" bitfld.long 0x10 8. " SMASEL , SMA (MDIO) Interface" "0,1" textline " " bitfld.long 0x10 6. " PCSSEL , PCS registers" "0,1" bitfld.long 0x10 5. " ADDMACADRSEL , Multiple MAC Address Registers" "0,1" textline " " bitfld.long 0x10 4. " HASHSEL , HASH Filter" "0,1" bitfld.long 0x10 3. " EXTHASHEN , Expanded DA Hash Filter" "0,1" textline " " bitfld.long 0x10 2. " HDSEL , Half-Duplex support" "0,1" bitfld.long 0x10 1. " GMIISEL , 1000 Mbps support" "0,1" textline " " bitfld.long 0x10 0. " MIISEL , 10 or 100 Mbps support" "0,1" group.long 0x60++0x03 line.long 0x00 "CHANNEL1_CBS_CONTROL, Channel 1 CBS Control Register" bitfld.long 0x00 17. " ABPSSIE , Average Bits Per Slot Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4.--6. " SLC , Slot Count" "1 Slot,2 Slots,4 Slots,8 Slots,16 Slots,?..." textline " " bitfld.long 0x00 1. " CC , Credit Control" "0,1" bitfld.long 0x00 0. " CBSD , Credit-Based Shaper Disable" "No,Yes" rgroup.long 0x64++0x03 line.long 0x00 "CHANNEL1_CBS_STATUS, Channel 1 CBS Status Register" bitfld.long 0x00 17. " ABSU , ABS Updated" "Low,High" hexmask.long.tbyte 0x00 0.--16. 1. " ABS , Average Bits per Slot" group.long 0x68++0x0F line.long 0x00 "CHANNEL1_IDLESLOPECREDIT, Channel 1 idleSlopeCredit Register" hexmask.long.word 0x00 0.--13. 1. " ISC , IdleSlopeCredit" line.long 0x04 "CHANNEL1_SENDSLOPECREDIT, Channel 1 sendSlopeCredit Register" hexmask.long.word 0x04 0.--13. 1. " SSC , SendSlopeCredit" line.long 0x08 "CHANNEL1_HICREDIT, Channel 1 hiCredit Register" hexmask.long 0x08 0.--28. 1. " HC , HiCredit" line.long 0x0C "CHANNEL1_LOCREDIT, Channel 1 loCredit Register" hexmask.long 0x0C 0.--28. 1. " LC , LoCredit" tree.end width 0x0B tree.end tree "UHC (USB 2.0 host controllers)" base ad:0xE4800000 tree "EHCI block registers" base ad:0xE4800000 width 18. rgroup.long 0x00++0x0B line.long 0x00 "HCCAPBASE, Capability Register" hexmask.long.word 0x00 16.--31. 1. " HCIVERSION , Core Interface Version Number" bitfld.long 0x00 0. " CAPLENGTH , Core Capability Register Length" "0,1" line.long 0x04 "HCSPARAMS, Core Structural Parameter" bitfld.long 0x04 20.--23. " DEBUG_PORT_NUMBER , Debug port number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16. " P_INDICATOR , P indicator" "0,1" textline " " bitfld.long 0x04 12.--15. " N_CC , N cc" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " N_PCC , N pcc" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 7. " PORT_ROUTE_RULES , Port route rules" "0,1" bitfld.long 0x04 4. " PPC , Ppc" "0,1" textline " " bitfld.long 0x04 0.--3. " N_PORTS , N ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "HCCPARAMS, Core Capability Parameter" bitfld.long 0x08 17. " LINK_POWER_MGMT_CAP , Link power mgmt cap" "0,1" hexmask.long.byte 0x08 8.--15. 1. " EECP , Eecp" textline " " bitfld.long 0x08 4.--7. " ISOC_SCHEDULE_THRESHOLD , Isoc schedule threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 2. " ASYNC_SCHEDULE_PARK_CAP , Async schedule park cap" "0,1" textline " " bitfld.long 0x08 1. " FRAME_LIST_FLAG , Frame list flag" "0,1" bitfld.long 0x08 0. " ADDRESS_64BIT_CAP , Address 64bit cap" "0,1" group.long 0x10++0x1B line.long 0x00 "USBCMD, USB Command Core 2.3.1" hexmask.long.byte 0x00 16.--23. 1. " INTR_THRESHOLD_CTRL , Intr threshold ctrl" bitfld.long 0x00 11. " ASYNC_SCHEDULE_PARK_MODE_ENABLE , Async schedule park mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8.--9. " ASYNC_SCHEDULE_PARK_MODE_CNT , Async schedule park mode cnt" "0,1,2,3" bitfld.long 0x00 7. " LIGHT_HCRESET , Light hcreset" "No reset,Reset" textline " " bitfld.long 0x00 6. " INTR_ON_ASYNC_ADVANCE_DRBELL , Intr on async advance drbell" "No interrupt,Interrupt" bitfld.long 0x00 5. " ASYNC_SCHEDULE_ENABLE , Async schedule enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " PERIODIC_SCHEDULE_ENABLE , Periodic schedule enable" "Disabled,Enabled" bitfld.long 0x00 2.--3. " FRAME_LIST_SIZE , Frame list size" "0,1,2,3" textline " " bitfld.long 0x00 1. " HCRESET , Hcreset" "No reset,Reset" bitfld.long 0x00 0. " RUN_STOP , Run stop" "0,1" line.long 0x04 "USBSTS, USB Status Core 2.3.2" rbitfld.long 0x04 15. " ASYNC_SCHEDULE_STATUS , Async schedule status" "Low,High" rbitfld.long 0x04 14. " PERIODIC_SCHEDULE_STATUS , Periodic schedule status" "Low,High" textline " " rbitfld.long 0x04 13. " RECLAMATION , Reclamation" "0,1" rbitfld.long 0x04 12. " HCHALTED , Hchalted" "0,1" textline " " bitfld.long 0x04 5. " INTR_ON_ASYNC_ADVANCE , Intr on async advance" "No interrupt,Interrupt" bitfld.long 0x04 4. " HOST_SYSTEM_ERROR , Host system error" "No error,Error" textline " " bitfld.long 0x04 3. " FRAME_LIST_ROLLOVER , Frame list rollover" "No rolllover,Rollover" bitfld.long 0x04 2. " PORT_CHANGE_DETECT , Port change detect" "Not detected,Detected" textline " " bitfld.long 0x04 1. " USBERRINT , Usberrint" "No interrupt,Interrupt" bitfld.long 0x04 0. " USBINT , Usbint" "No interrupt,Interrupt" line.long 0x08 "USBINTR, USB Interrupt Enable Core 2.3.3" bitfld.long 0x08 5. " INTR_ON_ASYNC_ADVANCE_ENABLE , Intr on async advance enable" "Disabled,Enabled" bitfld.long 0x08 4. " HOST_SYSTEM_ERR_ENABLE , Host system err enable" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " FRAME_LIST_ROLLOVER_ENABLE , Frame list rollover enable" "Disabled,Enabled" bitfld.long 0x08 2. " PORT_CHANGE_INTR_ENABLE , Port change intr enable" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " USBERRINT_ENABLE , Usberrint enable" "Disabled,Enabled" bitfld.long 0x08 0. " USBINT_ENABLE , Usbint enable" "Disabled,Enabled" line.long 0x0C "FRINDEX, USB Frame Index Core 2.3.4" hexmask.long.word 0x0C 0.--13. 1. " FRAME_INDEX , Frame index" line.long 0x10 "CTRLDSSEGMENT, 4G Segment Selector Core" line.long 0x14 "PERIODICLISTBASE, Periodic Frame List Base Address Core Register" hexmask.long.tbyte 0x14 12.--31. 0x1000 " BASE_ADDRESS , Base address" line.long 0x18 "ASYNCLISTADDR, Asynchronous List Address Core" hexmask.long 0x18 5.--31. 0x20 " LPL , Lpl" group.long 0x50++0x07 line.long 0x00 "CONFIGFLAG, Configured Flag Register" bitfld.long 0x00 0. " CF , Cf" "0,1" line.long 0x04 "PORTSC_0, Port Status/Control 0" hexmask.long.byte 0x04 25.--31. 0x200 " DEVICE_ADDRESS , Device address" bitfld.long 0x04 24. " SUSPEND_STATUS[1] , Suspend status" "Not suspended,Suspended" textline " " bitfld.long 0x04 23. " SUSPEND_STATUS[0] , Suspend status" "Not suspended,Suspended" bitfld.long 0x04 22. " WKOC_E , Wkoc e" "Low,High" textline " " bitfld.long 0x04 21. " WKDSCNNT_E , Wkdscnnt e" "Low,High" bitfld.long 0x04 20. " WKCNNT_E , Wkcnnt e" "Low,High" textline " " bitfld.long 0x04 16.--19. " PORT_TEST_CTRL , Port test ctrl" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 14.--15. " PORT_INDICATOR_CTRL , Port indicator ctrl" "0,1,2,3" textline " " bitfld.long 0x04 13. " PORT_OWNER , Port owner" "0,1" bitfld.long 0x04 12. " PP , Pp" "0,1" textline " " bitfld.long 0x04 10.--11. " LINE_STATUS , Line status" "0,1,2,3" bitfld.long 0x04 9. " SUSPEND_USING_L1 , Suspend using l1" "Not suspended,Suspended" textline " " bitfld.long 0x04 8. " PORT_RESET , Port reset" "0,1" bitfld.long 0x04 7. " SUSPEND , Suspend" "No suspend,Suspend" textline " " bitfld.long 0x04 6. " FORCE_PORT_RESUME , Force port resume" "Not forced,Forced" bitfld.long 0x04 5. " OVER_CURRENT_CHANGE , Over current change" "Low,High" textline " " bitfld.long 0x04 4. " OVER_CURRENT_ACTIVE , Over current active" "Low,High" bitfld.long 0x04 3. " PORT_EN_DIS_CHANGE , Port en dis change" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " PORT_ENABLE_DISABLE , Port enable disable" "Disabled,Enabled" bitfld.long 0x04 1. " CONNECT_STATUS_CHANGE , Connect status change" "Not changed,Changed" textline " " bitfld.long 0x04 0. " CURRENT_CONNECT_STATUS , Current connect status" "Low,High" group.long 0x90++0x23 line.long 0x00 "INSNREG00, Programmable Microframe Base Value" bitfld.long 0x00 13. " BYTE_INTF , Byte Interface" "0,1" hexmask.long.word 0x00 1.--12. 1. " WRD_INTF , Word Interface" textline " " bitfld.long 0x00 0. " ENABLE , Write 1b1 enables this register" "Disabled,Enabled" line.long 0x04 "INSNREG01, Programmable Packet Buffer OUT/IN Thresholds" hexmask.long.word 0x04 16.--31. 1. " OUT_THRESHOLD , OUT Threshold" hexmask.long.word 0x04 0.--15. 1. " IN_THRESHOLD , IN Threshold" line.long 0x08 "INSNREG02, Programmable Packet Buffer Depth" hexmask.long 0x08 0.--10. 1. " PKT_BUF , 1K packet buffer" line.long 0x0C "INSNREG03, INSNREG03 register" bitfld.long 0x0C 13. " TESTSE_NAK , TestSE NAK" "No NAK,NAK" bitfld.long 0x0C 10.--12. " TX_TRA_DELAY , Tx Turn Around Delay" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 9. " FRM_LST_FETCH , Frame List Fetch" "Not fetched,Fetched" hexmask.long.byte 0x0C 1.--8. 1. " TIME_AVAIL_OFF , Time Available Offset" bitfld.long 0x0C 0. " BRK_MEM_TRANS , Break Memory Transfer" "0,1" line.long 0x10 "INSNREG04, INSNREG04 Register" bitfld.long 0x10 5. " SUSPEND_SIGNAL , Suspend signal" "Not suspended,Suspended" bitfld.long 0x10 4. " NAK_RELOAD , NAK Reload fixed" "Not fixed,Fixed" textline " " bitfld.long 0x10 2. " SCLDWN , Scale down" "0,1" bitfld.long 0x10 1. " HSCPARAM_WRT2 , HSCPARAMS become writable for bits 17; 15:4; 2:0" "0,1" textline " " bitfld.long 0x10 0. " HSCPARAM_WRT1 , HSCPARAMS become writable" "0,1" line.long 0x14 "INSNREG05, UTMI/ULPI Configuration based on DW_H20AHB_ULPI" bitfld.long 0x14 17. " VBUSY , UTMI VBUSY" "Idle,Busy" bitfld.long 0x14 13.--16. " VPORT , UTMI VPORT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x14 12. " VCONTROL_LDM , UTMI VCONTROL Load M" "0,1" bitfld.long 0x14 8.--11. " VCONTROL , UTMI VCONTROL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x14 0.--7. 1. " VSTATUS , UTMI VSTATUS" line.long 0x18 "INSNREG06, AHB Error Status" bitfld.long 0x18 31. " AHB_ECAP , AHB Error Captured" "Not captured,Captured" bitfld.long 0x18 9.--11. " HBURST , Hburst" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x18 4.--8. " EXP_BEATS , Number of expected beats" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--3. " SUC_BEATS , Number of successful beats" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "INSNREG07, AHB Master Error Address" line.long 0x20 "INSNREG08, HSIC Enable/Disable" bitfld.long 0x20 31. " HSIC_EN_DIS[31] ,[31]" "Disabled,Enabled" bitfld.long 0x20 30. " HSIC_EN_DIS[30] ,[30]" "Disabled,Enabled" textline " " bitfld.long 0x20 29. " HSIC_EN_DIS[29] ,[29]" "Disabled,Enabled" bitfld.long 0x20 28. " HSIC_EN_DIS[28] ,[28]" "Disabled,Enabled" textline " " bitfld.long 0x20 27. " HSIC_EN_DIS[27] ,[27]" "Disabled,Enabled" bitfld.long 0x20 26. " HSIC_EN_DIS[26] ,[26]" "Disabled,Enabled" textline " " bitfld.long 0x20 25. " HSIC_EN_DIS[25] ,[25]" "Disabled,Enabled" bitfld.long 0x20 24. " HSIC_EN_DIS[24] ,[24]" "Disabled,Enabled" textline " " bitfld.long 0x20 23. " HSIC_EN_DIS[23] ,[23]" "Disabled,Enabled" bitfld.long 0x20 22. " HSIC_EN_DIS[22] ,[22]" "Disabled,Enabled" textline " " bitfld.long 0x20 21. " HSIC_EN_DIS[21] ,[21]" "Disabled,Enabled" bitfld.long 0x20 20. " HSIC_EN_DIS[20] ,[20]" "Disabled,Enabled" textline " " bitfld.long 0x20 19. " HSIC_EN_DIS[19] ,[19]" "Disabled,Enabled" bitfld.long 0x20 18. " HSIC_EN_DIS[18] ,[18]" "Disabled,Enabled" textline " " bitfld.long 0x20 17. " HSIC_EN_DIS[17] ,[17]" "Disabled,Enabled" bitfld.long 0x20 16. " HSIC_EN_DIS[16] ,[16]" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " HSIC_EN_DIS[15] ,[15]" "Disabled,Enabled" bitfld.long 0x20 14. " HSIC_EN_DIS[14] ,[14]" "Disabled,Enabled" textline " " bitfld.long 0x20 13. " HSIC_EN_DIS[13] ,[13]" "Disabled,Enabled" bitfld.long 0x20 12. " HSIC_EN_DIS[12] ,[12]" "Disabled,Enabled" textline " " bitfld.long 0x20 11. " HSIC_EN_DIS[11] ,[11]" "Disabled,Enabled" bitfld.long 0x20 10. " HSIC_EN_DIS[10] ,[10]" "Disabled,Enabled" textline " " bitfld.long 0x20 9. " HSIC_EN_DIS[9] ,[9]" "Disabled,Enabled" bitfld.long 0x20 8. " HSIC_EN_DIS[8] ,[8]" "Disabled,Enabled" textline " " bitfld.long 0x20 7. " HSIC_EN_DIS[7] ,[7]" "Disabled,Enabled" bitfld.long 0x20 6. " HSIC_EN_DIS[6] ,[6]" "Disabled,Enabled" textline " " bitfld.long 0x20 5. " HSIC_EN_DIS[5] ,[5]" "Disabled,Enabled" bitfld.long 0x20 4. " HSIC_EN_DIS[4] ,[4]" "Disabled,Enabled" textline " " bitfld.long 0x20 3. " HSIC_EN_DIS[3] ,[3]" "Disabled,Enabled" bitfld.long 0x20 2. " HSIC_EN_DIS[2] ,[2]" "Disabled,Enabled" textline " " bitfld.long 0x20 1. " HSIC_EN_DIS[1] ,[1]" "Disabled,Enabled" bitfld.long 0x20 0. " HSIC_EN_DIS[0] ,[0]" "Disabled,Enabled" tree.end tree "OHCI block registers" base ad:0xE4000000 width 20. rgroup.long 0x00++0x03 line.long 0x00 "HCREVISION, OHCI Hc revision" bitfld.long 0x00 8. " LEGACY , Legacy" "0,1" hexmask.long.byte 0x00 0.--7. 1. " REVISION , Revision" group.long 0x04++0x17 line.long 0x00 "HCCONTROL, HC CONTROL for block OHCI" bitfld.long 0x00 10. " RMTWKUP_ENABLE , Rmtwkup enable" "Disabled,Enabled" bitfld.long 0x00 9. " RMTWKUP_CONNECTED , Rmtwkup connected" "Not connected,Connected" textline " " bitfld.long 0x00 8. " INTR_ROUTING , Intr routing" "0,1" bitfld.long 0x00 6.--7. " HC_FUNCTION_STATE , Hc function state" "0,1,2,3" textline " " bitfld.long 0x00 5. " BULKLIST_ENABLE , Bulklist enable" "Disabled,Enabled" bitfld.long 0x00 4. " CTRLLIST_ENABLE , Ctrllist enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ISOC_ENABLE , Isoc enable" "Disabled,Enabled" bitfld.long 0x00 2. " PERIODICLIST_ENABLE , Periodiclist enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " CTRLBULK_SERVICERATIO , Ctrlbulk serviceratio" "0,1,2,3" line.long 0x04 "HCCOMMANDSTATUS, OHCI HC Command Status" bitfld.long 0x04 16.--17. " SCH_OVERRUN_CNT , Sch overrun cnt" "0,1,2,3" bitfld.long 0x04 3. " OWNERCHANGE_REQ , Ownerchange req" "Not requested,Requested" textline " " bitfld.long 0x04 2. " BULKLIST_FILLED , Bulklist filled" "0,1" bitfld.long 0x04 1. " CTRLLIST_FILLED , Ctrllist filled" "0,1" textline " " bitfld.long 0x04 0. " HCRESET , Hcreset" "Not reset,Reset" line.long 0x08 "HCINTERRUPTSTATUS, OHCI HC Interrupt Status" setclrfld.long 0x08 30. 0x0C 30. 0x10 30. " OWNER_CHANGE_set/clr , Owner change" "0,1" setclrfld.long 0x08 6. 0x0C 6. 0x10 6. " RHUB_STSCHANGE_set/clr , Rhub stschange" "0,1" textline " " setclrfld.long 0x08 5. 0x0C 5. 0x10 5. " FMNUM_OVERFLOW_set/clr , Fmnum overflow" "No overflow,Overflow" setclrfld.long 0x08 4. 0x0C 4. 0x10 4. " UNRECOV_ERR_set/clr , Unrecov err" "No error,Error" textline " " setclrfld.long 0x08 3. 0x0C 3. 0x10 3. " RESUME_DETECTED_set/clr , Resume detected" "Not detected,Detected" setclrfld.long 0x08 2. 0x0C 2. 0x10 2. " START_OF_FRAME_set/clr , Start of frame" "0,1" textline " " setclrfld.long 0x08 1. 0x0C 1. 0x10 1. " WRBACK_DONEHEAD_set/clr , Wrback donehead" "0,1" setclrfld.long 0x08 0. 0x0C 0. 0x10 0. " SCH_OVERRUN_set/clr , Sch overrun" "0,1" line.long 0x0C "HCINTERRUPTENABLE, OHCI HC Interrupt Enable" bitfld.long 0x0C 31. " MSTR_INTR_ENABLE , Mstr intr enable" "Disabled,Enabled" line.long 0x10 "HCINTERRUPTDISABLE, OHCI HC Interrupt Disable" bitfld.long 0x10 31. " MSTR_INTR_ENABLE , Mstr intr enable" "No,Yes" line.long 0x14 "HCHCCA, OHCI Hc HCCA Register" hexmask.long.tbyte 0x14 8.--31. 1. " HCCABASE , Hccabase" rgroup.long 0x1C++0x03 line.long 0x00 "HCPERIODCURRENTED, OHCI HC Period Current ED" hexmask.long 0x00 4.--31. 1. " PERIOD_CUR_ED , Period cur ed" group.long 0x20++0x0F line.long 0x00 "HCCONTROLHEADED, OHCI HC Control Head ED" hexmask.long 0x00 4.--31. 1. " CTRL_HEAD_ED , Ctrl head ed" line.long 0x04 "HCCONTROLCURRENTED, OHCI HC Control Current ED" hexmask.long 0x04 4.--31. 1. " CTRL_CUR_ED , Ctrl cur ed" line.long 0x08 "HCBULKHEADED, OHCI HC Bulk Head ED" hexmask.long 0x08 4.--31. 1. " BULK_HEAD_ED , Bulk head ed" line.long 0x0C "HCBUL4KCURRENTED, OHCI HC Bulk Current ED" hexmask.long 0x0C 4.--31. 1. " BULK_CUR_ED , Bulk cur ed" rgroup.long 0x30++0x03 line.long 0x00 "HCDONEHEAD, OHCI HC Done Head" hexmask.long 0x00 4.--31. 1. " DONE_HEAD , Donehead" group.long 0x34++0x07 line.long 0x00 "HCFMINTERVAL, OHCI HC FM Interval" bitfld.long 0x00 31. " FM_INTERVAL_TGL , Fm interval tgl" "0,1" hexmask.long.word 0x00 16.--30. 1. " FSMPS , Fsmps" textline " " hexmask.long.word 0x00 0.--13. 1. " FM_INTERVAL , Fm interval" line.long 0x04 "HCFMREMAINING, OHCI HC FM Remaining" bitfld.long 0x04 31. " FM_REMAINING_TGL , Fm remaining tgl" "0,1" hexmask.long.word 0x04 0.--13. 1. " FM_REMAINING , Fm remaining" rgroup.long 0x3C++0x03 line.long 0x00 "HCFMNUMBER, OHCI HC FM Number" hexmask.long.word 0x00 0.--15. 1. " FMNUMBER , Fmnumber" group.long 0x40++0x17 line.long 0x00 "HCPERIODICSTART, OHCI HC Periodic Start" hexmask.long.word 0x00 0.--13. 1. " PERIODIC_START , Periodic start" line.long 0x04 "HCLSTHRESHOLD, OHCI HC LS Threshold" hexmask.long.word 0x04 0.--11. 1. " LS_THRESHOLD , Ls threshold" line.long 0x08 "HCRHDESCRIPTORA, OHCI HC Rh Descriptor A" hexmask.long.byte 0x08 24.--31. 1. " PWRON_TO_PWRGOOD_TIME , Pwron to pwrgood time" bitfld.long 0x08 12. " NO_OVERCUR_PROT , No overcur prot" "0,1" textline " " bitfld.long 0x08 11. " OVERCUR_PROT_MODE , Overcur prot mode" "0,1" bitfld.long 0x08 10. " DEVICE_TYPE , Device type" "0,1" textline " " bitfld.long 0x08 9. " NO_PWR_SWITCHING , Nps no pwr switching" "0,1" bitfld.long 0x08 8. " PWR_SWITCH_MODE , Psm power switch mode" "0,1" textline " " hexmask.long.byte 0x08 0.--7. 1. " NDP , Ndp" line.long 0x0C "HCRHDESCRIPTORB, OHCI Hc Rh Descriptor B" hexmask.long.word 0x0C 16.--31. 1. " PORT_PWR_CTRLMASK , Port pwr ctrlmask" hexmask.long.word 0x0C 0.--15. 1. " DEVICE_REMOVABLE , Device removable" line.long 0x10 "HCRHSTATUS, OHCI HC RH Status" bitfld.long 0x10 31. " CLR_RMTWKUP_ENB , Clr rmtwkup enb" "Disabled,Enabled" bitfld.long 0x10 17. " OVERCUR_IND_CHANGE , Overcur ind change" "Not changed,Changed" textline " " bitfld.long 0x10 16. " LOCAL_PWRSTS_CHANGE , Local pwrsts change" "Not changed,Changed" bitfld.long 0x10 15. " DEV_RMTWKUP_ENB , Dev rmtwkup enb" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " OVERCUR_IND , Overcur ind" "0,1" bitfld.long 0x10 0. " LOCAL_PWRSTS , Local pwrsts" "0,1" line.long 0x14 "HCRHPORTSTATUS_0, HC RH Port Status register for OHCI_0" bitfld.long 0x14 20. " PRT_RST_STS_CHANGE , Prt rst sts change OHCI_0" "Not changed,Changed" bitfld.long 0x14 19. " PRT_OVERCUR_IND_CHANGE , Prt overcur ind change" "Not changed,Changed" textline " " bitfld.long 0x14 18. " PRT_SUSPEND_STS_CHANGE , Prt suspend sts change" "Not changed,Changed" bitfld.long 0x14 17. " PRT_ENB_STS_CHANGE , Prt enb sts change" "Not changed,Changed" textline " " bitfld.long 0x14 16. " CONNECT_STS_CHANGE , Connect sts change" "Not changed,Changed" bitfld.long 0x14 9. " LSPD_DEV_ATTACH , Lspd dev attach" "0,1" textline " " bitfld.long 0x14 8. " PRT_PWR_STS , Prt pwr sts" "0,1" bitfld.long 0x14 4. " PRT_RST_STS , Prt rst sts" "No reset,Reset" textline " " bitfld.long 0x14 3. " PRT_OVERCUR_IND , Prt overcur ind" "0,1" bitfld.long 0x14 2. " PRT_SUSPEND_STS , Prt suspend sts" "Not suspended,Suspended" textline " " bitfld.long 0x14 1. " PRT_ENABLE_STS , Prt enable sts" "Disabled,Enabled" bitfld.long 0x14 0. " CUR_CONNECT_STS , Cur connect sts" "Not connected,Connected" rgroup.long 0x98++0x07 line.long 0x00 "INSNREG06_OHCI, AHB Error Status for OHCI" bitfld.long 0x00 31. " AHB_ECAP , AHB Error Captured" "No error,Error" rbitfld.long 0x00 9.--11. " HBURST , Hburst" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 4.--8. " EXP_BEATS , Number of expected beats" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 0.--3. " SUC_BEATS , Number of successful beats" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "INSNREG07_OHCI, AHB Master Error for OHCI" group.long 0x100++0x0F line.long 0x00 "HCECONTROL, Emulation enable and control register" bitfld.long 0x00 8. " A20STATE , Current state of Gate A20 on keyboard controller" "0,1" bitfld.long 0x00 7. " IRQ12ACTIVE , Positive transition on IRQ12 from keyboard controller" "Not occurred,Occurred" textline " " bitfld.long 0x00 6. " IRQ1ACTIVE , Positive transition on IRQ1 from keyboard controller" "Not occurred,Occurred" bitfld.long 0x00 5. " GATEA20SEQUENCE , Set by HC when a data value of D1h is written to I/O port 64h" "0,1" textline " " bitfld.long 0x00 4. " EXTERNALIRQEN , When set to 1, IRQ1 and IRQ12 from the keyboard controller causes an emulation interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 3. " IRQEN , When set, the HC generates IRQ1 or IRQ12 as long as the OutputFull bit in HceStatus is set to 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " CHARACTERPENDING , When set, an emulation interrupt is generated when the OutputFull bit of the HceStatus register is set to 0" "No interrupt,Interrupt" bitfld.long 0x00 1. " EMULATIONINTERRUPT , This bit is a static decode of the emulation interrupt condition" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " EMULATIONENABLE , When set to 1, the HC is enabled for legacy emulation" "Disabled,Enabled" line.long 0x04 "HCEINPUT, Emulation side of the legacy Input Buffer register" hexmask.long.byte 0x04 0.--7. 1. " INPUTDATA , This register holds data that is written to I/O ports 60h and 64h" line.long 0x08 "HCEOUTPUT, Emulation side of the legacy Output Buffer register" hexmask.long.byte 0x08 0.--7. 1. " OUTPUTDATA , This register hosts data that is returned when an I/O read of port 60h is performed by application software" line.long 0x0C "HCESTATUS, Emulation side of the legacy Status register" bitfld.long 0x0C 7. " PARITY , Indicates parity error on keyboard/mouse data" "No error,Error" bitfld.long 0x0C 6. " TIME-OUT , Used to indicate a time-out" "No error,Error" textline " " bitfld.long 0x0C 5. " AUXOUTPUTFULL , IRQ12 is asserted whenever this bit is set to 1 and OutputFull is set to 1 and the IRQEn bit is set" "0,1" bitfld.long 0x0C 4. " INHIBITSWITCH , This bit reflects the state of the keyboard inhibit switch and is set if the keyboard is NOT inhibited" "0,1" textline " " bitfld.long 0x0C 3. " CMDDATA , The HC sets this bit to 0 on an I/O write to port 60h and to 1 on an I/O write to port 64h" "0,1" bitfld.long 0x0C 2. " FLAG , Nominally used as a system flag by software to indicate a warm or cold boot" "0,1" textline " " bitfld.long 0x0C 0. " OUTPUTFULL , The HC sets this bit to 0 on a read of I/O port 60h" "0,1" tree.end width 0x0B tree.end tree "UOC (USB OTG controller)" base ad:0xE3800000 width 15. if (((per.l((ad:0xE3800014+0x14)))&0x01)==0x01) if (((per.l(ad:0xE3800014))&0x54)==0x54) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x50)==0x50) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x44)==0x44) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x40)==0x40) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x14)==0x14) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline elif (((per.l(ad:0xE3800014))&0x04)==0x04) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline else group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 18. " ASESVLD ,A-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 17. " DBNCTIME ,Debounce time" "Long,Short" rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" newline bitfld.long 0x00 10. " HSTSETHNPEN ,Host set HNP enable" "Disabled,Enabled" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline endif group.long 0x04++0x03 line.long 0x00 "GOTGINT,OTG Interrupt Register" eventfld.long 0x00 19. " DBNCEDONE ,Debounce done" "Not done,Done" eventfld.long 0x00 18. " ADEVTOUTCHG ,A-Device timeout change" "Not changed,Changed" newline eventfld.long 0x00 17. " HSTNEGDET ,Host negotiation detected" "Not detected,Detected" eventfld.long 0x00 9. " HSTNEGSUCSTSCHNG ,Host negotiation success status change" "Not changed,Changed" newline eventfld.long 0x00 8. " SESREQSUCSTSCHNG ,Session request success status change" "Not changed,Changed" eventfld.long 0x00 2. " SESENDDET ,Session end detected" "Not detected,Detected" if (((per.l(ad:0xE3800014+0x08))&0x20)==0x00) group.long 0x08++0x03 line.long 0x00 "GAHBCFG,AHB Configuration Register" bitfld.long 0x00 8. " PTXFEMPLVL ,Periodic TxFIFO empty level" "Half empty,Completely empty" bitfld.long 0x00 7. " NPTXFEMPLVL ,Non-periodic TxFIFO empty level" "Half empty,Completely empty" newline bitfld.long 0x00 5. " DMAEN ,DMA Enable" "Slave mode,DMA mode" bitfld.long 0x00 1.--4. " HBSTLEN ,Burst length/type" "Single,INCR,,INCR4,,INCR8,,INCR16,?..." newline bitfld.long 0x00 0. " GLBLINTRMSK ,Global interrupt mask" "Masked,Not masked" else group.long 0x08++0x03 line.long 0x00 "GAHBCFG,AHB Configuration Register" bitfld.long 0x00 5. " DMAEN ,DMA Enable" "Slave mode,DMA mode" bitfld.long 0x00 1.--4. " HBSTLEN ,Burst length/type" "Single,INCR,,INCR4,,INCR8,,INCR16,?..." newline bitfld.long 0x00 0. " GLBLINTRMSK ,Global interrupt mask" "Masked,Not masked" newline newline endif group.long 0x0C++0x03 line.long 0x00 "GUSBCFG,USB Configuration Register" bitfld.long 0x00 31. " CORRUPTTXPKT ,Corrupt Tx packet" "0,1" bitfld.long 0x00 30. " FORCEDEVMODE ,Force device mode" "Not forced,Forced" newline bitfld.long 0x00 29. " FORCEHSTMODE ,Force host mode" "Not forced,Forced" rbitfld.long 0x00 26. " IC_USBCAP ,Control the UOC cores IC_USB capabilities" "Not selected,Selected" newline bitfld.long 0x00 9. " HNPCAP ,HNP-capable" "Disabled,Enabled" bitfld.long 0x00 8. " SRPCAP ,SRP-capable" "Disabled,Enabled" newline rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI,ULPI" rbitfld.long 0x00 3. " PHYIF ,PHY interface" "8bits,16bits" newline bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" newline newline group.long 0x10++0x03 line.long 0x00 "GRSTCTL,Reset Register" rbitfld.long 0x00 31. " AHBIDLE ,AHB master idle" "Busy,Idle" rbitfld.long 0x00 30. " DMAREQ ,DMA request signal" "Not requested,Requested" newline bitfld.long 0x00 6.--10. " TXFNUM ,TxFIFO number" "Non-periodic,Periodic,?..." rbitfld.long 0x00 5. " TXFFLSH ,TxFIFO flush" "Not flushed,Flushed" newline rbitfld.long 0x00 4. " RXFFLSH ,RxFIFO flush" "Not flushed,Flushed" eventfld.long 0x00 2. " FRMCNTRRST ,Host frame counter reset" "No reset,Reset" newline rbitfld.long 0x00 0. " CSFTRST ,Core soft reset" "No reset,Reset" group.long 0x14++0x03 line.long 0x00 "GINTSTS,Interrupt Register" bitfld.long 0x00 31. " WKUPINT ,Resume/remote wakeup detected interrupt" "Not detected,Detected" bitfld.long 0x00 30. " SESSREQINT ,Session request/new session detected interrupt" "Not detected,Detected" newline bitfld.long 0x00 29. " DISCONNINT ,Disconnect detected interrupt" "Not detected,Detected" bitfld.long 0x00 28. " CONIDSTSCHNG ,Connector ID status change" "Not changed,Changed" newline bitfld.long 0x00 26. " PTXFEMP ,Periodic TxFIFO empty" "Half empty,Completely empty" bitfld.long 0x00 25. " HCHINT ,Host channels interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 24. " PRTINT ,Host port interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " NPTXFEMP ,Non-periodic TxFIFO empty" "Half empty,Completely empty" newline bitfld.long 0x00 4. " RXFLVL ,RxFIFO non-empty" "Empty,Non-Empty" eventfld.long 0x00 3. " SOF ,Start of (micro)frame" "No start,Start" newline bitfld.long 0x00 2. " OTGINT ,OTG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " MODEMIS ,Mode mismatch interrupt" "No interrupt,Interrupt" newline newline newline newline newline newline bitfld.long 0x00 0. " CURMOD ,Current mode of operation" "Device mode,Host mode" group.long 0x18++0x03 line.long 0x00 "GINTMSK,Interrupt Mask Register" bitfld.long 0x00 31. " WKUPINTMSK ,Resume/remote wakeup detected interrupt mask" "Not masked,Masked" bitfld.long 0x00 30. " SESSREQINTMSK ,Session request/new session detected interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 29. " DISCONNINTMSK ,Disconnect detected interrupt mask" "Not masked,Masked" bitfld.long 0x00 28. " CONIDSTSCHNGMSK ,Connector ID status change mask" "Not masked,Masked" newline bitfld.long 0x00 26. " PTXFEMPMSK ,Periodic TxFIFO empty mask" "Not masked,Masked" bitfld.long 0x00 25. " HCHINTMSK ,Host channels interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 24. " PRTINTMSK ,Host port interrupt mask" "Not masked,Masked" bitfld.long 0x00 21. " INCOMPLPMSK ,Incomplete periodic transfer mask" "Not masked,Masked" newline bitfld.long 0x00 4. " RXFLVLMSK ,Receive FIFO non-empty mask" "Not masked,Masked" bitfld.long 0x00 3. " SOFMSK ,Start of (micro)frame mask" "Not masked,Masked" newline bitfld.long 0x00 2. " OTGINTMSK ,OTG interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " MODEMISMSK ,Mode mismatch interrupt mask" "Not masked,Masked" rgroup.long 0x1C++0x07 line.long 0x00 "GRXSTSR,Receive Status Debug Read Register" bitfld.long 0x00 17.--20. " PKTSTS ,Packet status" ",,IN data packet received,IN transfer completed,,Data toggle error,,Channel halted,?..." bitfld.long 0x00 15.--16. " DPID ,Data PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 4.--14. 1. " BCNT ,Byte count" bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GRXSTSP,Receive Status Read /Pop Register" bitfld.long 0x04 17.--20. " PKTSTS ,Packet status" ",,IN data packet received,IN transfer completed,,Data toggle error,,Channel halted,?..." bitfld.long 0x04 15.--16. " DPID ,Data PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x04 4.--14. 1. " BCNT ,Byte count" bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.l(ad:0xE3800014))&0x01)==0x00) if (((per.l(ad:0xE3800014))&0x54)==0x54) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x50)==0x50) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x44)==0x44) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x40)==0x40) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "0,1" bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x14)==0x14) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x10)==0x10) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "0,1" bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" elif (((per.l(ad:0xE3800014))&0x04)==0x04) group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "0,1" bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" else group.long 0x00++0x03 line.long 0x00 "GOTGCTL,OTG Control and Status Register" bitfld.long 0x00 20. " OTGVER ,OTG version" "1.3,2.0" rbitfld.long 0x00 19. " BSESVLD ,B-Session valid" "Not valid,Valid" newline rbitfld.long 0x00 16. " CONIDSTS ,Connector ID status" "A-Device,B-Device" bitfld.long 0x00 11. " DEVHNPEN ,Device HNP enabled" "Disabled,Enabled" newline bitfld.long 0x00 9. " HNPREQ ,HNP Request" "Not requested,Requested" rbitfld.long 0x00 8. " HSTNEGSCS ,Host negotiation success" "Failure,Success" newline bitfld.long 0x00 7. " BVALIDOVVAL ,Set override value for Bvalid signal" "," bitfld.long 0x00 6. " BVALIDOVEN ,Enable/disable the software to override the Bvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 5. " AVALIDOVVAL ,Set override value for Avalid signal when GOTGCTL" "," bitfld.long 0x00 4. " AVALIDOVEN ,Enable/disable the software to override the Avalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 3. " VBVALIDOVVAL ,Set Override value for vbusvalid signal" "," bitfld.long 0x00 2. " VBVALIDOVEN ,Enable/disable the software to override the Vbusvalid signal" "Not overridden,Overridden" newline bitfld.long 0x00 1. " SESREQ ,Session request" "Not requested,Requested" rbitfld.long 0x00 0. " SESREQSCS ,Session request success" "Failure,Success" endif group.long 0x04++0x03 line.long 0x00 "GOTGINT,OTG Interrupt Register" eventfld.long 0x00 18. " ADEVTOUTCHG ,A-Device timeout change" "Not changed,Changed" eventfld.long 0x00 17. " HSTNEGDET ,Host negotiation detected" "Not detected,Detected" newline eventfld.long 0x00 9. " HSTNEGSUCSTSCHNG ,Host negotiation success status change" "Not changed,Changed" eventfld.long 0x00 8. " SESREQSUCSTSCHNG ,Session request success status change" "Not changed,Changed" newline eventfld.long 0x00 2. " SESENDDET ,Session end detected" "Not detected,Detected" if (((per.l(ad:0xE3800014+0x08))&0x20)==0x00) group.long 0x08++0x03 line.long 0x00 "GAHBCFG,AHB Configuration Register" bitfld.long 0x00 7. " NPTXFEMPLVL ,Non-periodic TxFIFO empty level" "Half empty,Completely empty" newline bitfld.long 0x00 5. " DMAEN ,DMA enable" "Slave mode,DMA mode" bitfld.long 0x00 1.--4. " HBSTLEN ,Burst length/type" "Single,INCR,,INCR4,,INCR8,,INCR16,?..." newline bitfld.long 0x00 0. " GLBLINTRMSK ,Global interrupt mask" "Masked,Not masked" newline else group.long 0x08++0x03 line.long 0x00 "GAHBCFG,AHB Configuration Register" bitfld.long 0x00 5. " DMAEN ,DMA enable" "Slave mode,DMA mode" bitfld.long 0x00 1.--4. " HBSTLEN ,Burst length/type" "Single,INCR,,INCR4,,INCR8,,INCR16,?..." newline bitfld.long 0x00 0. " GLBLINTRMSK ,Global interrupt mask" "Masked,Not masked" newline endif group.long 0x0C++0x03 line.long 0x00 "GUSBCFG,USB Configuration Register" bitfld.long 0x00 31. " CORRUPTTXPKT ,Corrupt Tx packet" "0,1" bitfld.long 0x00 30. " FORCEDEVMODE ,Force device mode" "Not forced,Forced" newline bitfld.long 0x00 29. " FORCEHSTMODE ,Force host mode" "Not forced,Forced" bitfld.long 0x00 28. " TXENDDELAY ,Tx end delay" "Normal,Tx End" newline rbitfld.long 0x00 26. " IC_USBCAP ,Control the UOC cores IC_USB capabilities" "Not selected,Selected" bitfld.long 0x00 22. " TERMSELDLPULSE ,TermSel DLine pulsing selection" "Utmi_txvalid,Utmi_termsel" newline bitfld.long 0x00 10.--13. " USBTRDTIM ,USB turnaround time" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. " HNPCAP ,HNP-capable" "Disabled,Enabled" bitfld.long 0x00 8. " SRPCAP ,SRP-capable" "Disabled,Enabled" newline rbitfld.long 0x00 4. " ULPI_UTMI_SEL ,ULPI or UTMI+ select" "UTMI,ULPI" rbitfld.long 0x00 3. " PHYIF ,PHY interface" "8bits,16bits" newline bitfld.long 0x00 0.--2. " TOUTCAL ,HS/FS timeout calibration" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "GRSTCTL,Reset Register" rbitfld.long 0x00 31. " AHBIDLE ,AHB master idle" "Busy,Idle" rbitfld.long 0x00 30. " DMAREQ ,DMA request signal" "Not requested,Requested" newline bitfld.long 0x00 6.--10. " TXFNUM ,TxFIFO number" "FIFO0,FIFO1,FIFO2,FIFO3,FIFO4,FIFO5,FIFO6,FIFO7,FIFO8,FIFO9,FIFO10,FIFO11,FIFO12,FIFO13,FIFO14,FIFO15,Flush all,?..." rbitfld.long 0x00 5. " TXFFLSH ,TxFIFO flush" "Not flushed,Flushed" newline rbitfld.long 0x00 4. " RXFFLSH ,RxFIFO flush" "Not flushed,Flushed" rbitfld.long 0x00 0. " CSFTRST ,Core soft reset" "No reset,Reset" newline group.long 0x14++0x03 line.long 0x00 "GINTSTS,Interrupt Register" bitfld.long 0x00 31. " WKUPINT ,Resume/remote wakeup detected interrupt" "Not detected,Detected" bitfld.long 0x00 30. " SESSREQINT ,Session request/new session detected interrupt" "Not detected,Detected" newline bitfld.long 0x00 28. " CONIDSTSCHNG ,Connector ID status change" "Not changed,Changed" bitfld.long 0x00 23. " RESETDET ,Reset detected interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 22. " FETSUSP ,Data fetch suspended" "Not suspended,Suspended" bitfld.long 0x00 21. " INCOMPLP ,Incomplete periodic transfer" "No transfer,Transfer" newline bitfld.long 0x00 20. " INCOMPISOIN ,Incomplete isochronous in transfer" "No transfer,Transfer" bitfld.long 0x00 19. " OEPINT ,OUT endpoints interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 18. " IEPINT ,IN endpoints interrupt" "No interrupt,Interrupt" bitfld.long 0x00 15. " EOPF ,End of periodic frame interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 14. " ISOOUTDROP ,Isochronous OUT packet dropped interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " ENUMDONE ,Enumeration done" "Not done,Done" newline bitfld.long 0x00 12. " USBRST ,USB reset" "No reset,Reset" bitfld.long 0x00 11. " USBSUSP ,USB suspend" "Not suspended,Suspended" newline bitfld.long 0x00 10. " ERLYSUSP ,Early suspend" "Not suspended,Suspended" bitfld.long 0x00 7. " GOUTNAKEFF ,Global OUT NAK effective" "Not effective,Effective" newline bitfld.long 0x00 6. " GINNAKEFF ,Global IN non-periodic NAK effective" "Not effective,Effective" bitfld.long 0x00 5. " NPTXFEMP ,Non-periodic TxFIFO empty" "Half empty,Completely empty" newline bitfld.long 0x00 4. " RXFLVL ,RxFIFO non-empty" "Empty,Non-Empty" eventfld.long 0x00 3. " SOF ,Start of (micro)frame" "No start,Start" newline bitfld.long 0x00 2. " OTGINT ,OTG interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " MODEMIS ,Mode mismatch interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " CURMOD ,Current mode of operation" "Device mode,Host mode" group.long 0x18++0x03 line.long 0x00 "GINTMSK,Interrupt Mask Register" bitfld.long 0x00 31. " WKUPINTMSK ,Resume/remote wakeup detected interrupt mask" "Not masked,Masked" bitfld.long 0x00 30. " SESSREQINTMSK ,Session request/new session detected interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 29. " DISCONNINTMSK ,Disconnect detected interrupt mask" "Not masked,Masked" bitfld.long 0x00 28. " CONIDSTSCHNGMSK ,Connector ID status change mask" "Not masked,Masked" newline bitfld.long 0x00 23. " RESETDETMSK ,Reset detected interrupt mask" "Not masked,Masked" bitfld.long 0x00 22. " FETSUSPMSK ,Data fetch suspended mask" "Not masked,Masked" newline bitfld.long 0x00 20. " INCOMPISOINMSK ,Incomplete isochronous IN transfer mask" "Not masked,Masked" bitfld.long 0x00 19. " OEPINTMSK ,OUT endpoints interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 18. " IEPINTMSK ,IN endpoints interrupt mask" "Not masked,Masked" bitfld.long 0x00 17. " EPMISMSK ,Endpoint mismatch interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 15. " EOPFMSK ,End of periodic frame interrupt mask" "Not masked,Masked" bitfld.long 0x00 14. " ISOOUTDROPMSK ,Isochronous OUT packet dropped interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 13. " ENUMDONEMSK ,Enumeration done mask" "Not masked,Masked" bitfld.long 0x00 12. " USBRSTMSK ,USB reset mask" "Not masked,Masked" newline bitfld.long 0x00 11. " USBSUSPMSK ,USB suspend mask" "Not masked,Masked" bitfld.long 0x00 10. " ERLYSUSPMSK ,Early suspend mask" "Not masked,Masked" newline bitfld.long 0x00 7. " GOUTNAKEFFMSK ,Global OUT NAK effective mask" "Not masked,Masked" bitfld.long 0x00 6. " GINNAKEFFMSK ,Global non-periodic IN NAK effective mask" "Not masked,Masked" newline bitfld.long 0x00 4. " RXFLVLMSK ,Receive FIFO non-empty mask" "Not masked,Masked" bitfld.long 0x00 3. " SOFMSK ,Start of (micro)frame mask" "Not masked,Masked" newline bitfld.long 0x00 2. " OTGINTMSK ,OTG interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " MODEMISMSK ,Mode mismatch interrupt mask" "Not masked,Masked" rgroup.long 0x1C++0x07 line.long 0x00 "GRXSTSR,Receive Status Debug Read Register" bitfld.long 0x00 24.--27. " FN ,Frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 17.--20. " PKTSTS ,Packet status" ",Global OUT NAK,OUT data packet received,OUT transfer completed,SETUP transaction completed,,SETUP data packet received,?..." newline bitfld.long 0x00 15.--16. " DPID ,Data PID" "DATA0,DATA2,DATA1,MDATA" hexmask.long.word 0x00 4.--14. 1. " BCNT ,Byte count" newline bitfld.long 0x00 0.--3. " CHNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GRXSTSP,Receive Status Read /Pop Register" bitfld.long 0x04 21.--24. " FN ,Frame number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 17.--20. " PKTSTS ,Packet status" ",Global OUT NAK,OUT data packet received,OUT transfer completed,SETUP transaction completed,,SETUP data packet received,?..." newline bitfld.long 0x04 15.--16. " DPID ,Data PID" "DATA0,DATA2,DATA1,MDATA" hexmask.long.word 0x04 4.--14. 1. " BCNT ,Byte count" newline bitfld.long 0x04 0.--3. " CHNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif hgroup.long 0x24++0x03 hide.long 0x00 "GRXFSIZ,Receive FIFO Size Register" in group.long 0x28++0x03 line.long 0x00 "GNPTXFSIZ,Non-periodic Transmit FIFO Size Register" hexmask.long.word 0x00 16.--25. 1. " NPTXFDEP_INEPTXF0DEP ,Non-periodic TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " NPTXFSTADDR_INEPTXF0STADDR ,Non-periodic transmit RAM start address" rgroup.long 0x2C++0x03 line.long 0x00 "GNPTXSTS,Non-periodic Transmit FIFO/Queue Status Register" hexmask.long.byte 0x00 24.--30. 1. " NPTXQTOP ,Top of the Non-periodic transmit request queue" hexmask.long.byte 0x00 16.--23. 1. " NPTXQSPCAVAIL ,Non-periodic transmit request queue space available" newline hexmask.long.word 0x00 0.--15. 1. " NPTXFSPCAVAIL ,Non-periodic TxFIFO space avail" group.long 0x40++0x13 line.long 0x00 "GSNPSID,UOC ID Register" line.long 0x04 "GHWCFG1,User HW Config 1 Register" bitfld.long 0x04 30.--31. " E[15]DIR ,Endpoint 15 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 28.--29. " [14] ,Endpoint 14 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 26.--27. " [13] ,Endpoint 13 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 24.--25. " [12] ,Endpoint 12 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 22.--23. " [11] ,Endpoint 11 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 20.--21. " [10] ,Endpoint 10 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 18.--19. " [9] ,Endpoint 9 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 16.--17. " [8] ,Endpoint 8 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 14.--15. " [7] ,Endpoint 7 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 12.--13. " [6] ,Endpoint 6 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 10.--11. " [5] ,Endpoint 5 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 8.--9. " [4] ,Endpoint 4 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 6.--7. " [3] ,Endpoint 3 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 4.--5. " [2] ,Endpoint 2 direction" "BDIR,IN,OUT,?..." newline bitfld.long 0x04 2.--3. " [1] ,Endpoint 1 direction" "BDIR,IN,OUT,?..." bitfld.long 0x04 0.--1. " [0] ,Endpoint 0 direction" "BDIR,IN,OUT,?..." line.long 0x08 "GHWCFG2,User HW Config 2 Register" bitfld.long 0x08 26.--30. " TKNQDEPTH ,Device mode IN token sequence learning queue depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 24.--25. " PTXQDEPTH ,Host mode periodic request queue depth" "2,4,8,16" newline bitfld.long 0x08 22.--23. " NPTXQDEPTH ,Non-periodic request queue depth" "2,4,8,?..." bitfld.long 0x08 20. " MULTIPROCINTRPT ,Multi processor interrupt enabled" "Disabled,Enabled" newline bitfld.long 0x08 19. " DYNFIFOSIZING ,Dynamic FIFO sizing enabled" "Disabled,Enabled" bitfld.long 0x08 18. " PERIOSUPPOR ,Periodic OUT channels supported in host mode" "Disabled,Enabled" newline bitfld.long 0x08 14.--17. " NUMHSTCHNL ,Number of host channels" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 10.--13. " NUMDEVEPS ,Number of device endpoints" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 8.--9. " FSPHYTYPE ,Full-Speed PHY interface type" "Not supported,Full-speed,FS with UTMI,FS with ULPI" bitfld.long 0x08 6.--7. " HSPHYTYPE ,High-Speed PHY interface type" "Not supported,UTMI,ULPI,UTMI and ULPI" newline bitfld.long 0x08 5. " SINGPNT ,Point-to-Point" "Multi-point,Single-point" bitfld.long 0x08 3.--4. " OTGARCH ,Architecture" "Slave,External DMA,Internal DMA,?..." newline bitfld.long 0x08 0.--2. " OTGMODE ,Mode of operation" "HNP- and SRP-Capable OTG,SRP-Capable OTG,Non-HNP and Non-SRP Capable OTG,SRP-Capable Device,Non-OTG Device,SRP-Capable Host,Non-OTG Host,?..." line.long 0x0C "GHWCFG3,User HW Config 3 Register" hexmask.long.word 0x0C 16.--31. 1. " DFIFODEPTH ,DFIFO Depth" bitfld.long 0x0C 15. " LPMMODE ,LPM mode specified for mode of operation" "Disabled,Enabled" newline bitfld.long 0x0C 14. " BCSUPPORT ,HS OTG controller support for battery charger" "Not supported,Supported" bitfld.long 0x0C 13. " HSICMODE ,HSIC mode specified for mode of operation" "Non-HSIC-capable,HSIC-capable" newline bitfld.long 0x0C 12. " ADPSUPPORT ,ADP logic is present" "Not present,Present" bitfld.long 0x0C 11. " RSTTYPE ,Reset style for clocked always blocks in RTL" "Asynchronous,Synchronous" newline bitfld.long 0x0C 10. " OPTFEATURE ,Optional features removed" "No,Yes" bitfld.long 0x0C 9. " VNDCTLSUPT ,Vendor control interface support" "Not available,Available" newline bitfld.long 0x0C 8. " I2CINTSEL ,I2C selection" "Not available,Available" bitfld.long 0x0C 7. " OTGEN ,OTG function enabled" "Disabled,Enabled" newline bitfld.long 0x0C 4.--6. " PKTSIZEWIDTH ,Width of packet size counters" "4bits,5bits,6bits,7bits,8bits,9bits,10bits,?..." bitfld.long 0x0C 0.--3. " XFERSIZEWIDTH ,Width of transfer size counters" "11bits,12bits,13bits,14bits,15bits,16bits,17bits,18bits,19bits,?..." line.long 0x10 "GHWCFG4,User HW Config 4 Register" bitfld.long 0x10 31. " DMA ,Scatter/gather DMA" "Non dynamic,Dynamic" bitfld.long 0x10 30. " DMA_CONFIGURATION ,Scatter/gather DMA configuration" "Non-Scatter/Gather,Scatter/Gather" newline bitfld.long 0x10 26.--29. " INEPS ,Number of device mode IN endpoints including control endpoints" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x10 25. " DEDFIFOMODE ,Enable dedicated transmit FIFO for device IN endpoints" "Disabled,Enabled" newline bitfld.long 0x10 24. " SESSENDFLTR ,SESSION_END filter enabled" "Disabled,Enabled" bitfld.long 0x10 23. " BVALIDFLTR ,B_VALID filter enabled" "Disabled,Enabled" newline bitfld.long 0x10 22. " AVALIDFLTR ,A_VALID filter enabled" "Disabled,Enabled" bitfld.long 0x10 21. " VBUSVALIDFLTR ,VBUS_VALID filter enabled" "Disabled,Enabled" newline bitfld.long 0x10 20. " IDDGFLTR ,Iddig filter enable" "Disabled,Enabled" bitfld.long 0x10 16.--19. " NUMCTLEPS ,Number of device mode control endpoints in addition to endpoint 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x10 14.--15. " PHYDATAWIDTH ,UTMI+ PHY/ULPI-to-internal UTMI+ wrapper data width" "8bits,16bits,8/16bits,?..." bitfld.long 0x10 6. " HIBERNATION ,Enable hibernation" "Disabled,Enabled" newline bitfld.long 0x10 5. " AHBFREQ ,Minimum AHB frequency less than 60 MHz" "Disabled,Enabled" bitfld.long 0x10 4. " PARTIALPWRDN ,Partial power down" "Disabled,Enabled" newline bitfld.long 0x10 0.--3. " NUMDEVPERIOEPS ,Number of device mode periodic IN endpoints" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x5C++0x03 line.long 0x00 "GDFIFOCFG,Global DFIFO Configuration Register" hexmask.long.word 0x00 16.--31. 0x1 " EPINFOBASEADDR ,Start address of the EP info controller" hexmask.long.word 0x00 0.--15. 1. " GDFIFOCFG ,Dynamic programming of the DFIFO Size" group.long 0x100++0x03 line.long 0x00 "HPTXFSIZ,Host Periodic Transmit FIFO Size Register" hexmask.long.word 0x00 16.--28. 1. " PTXFSIZE ,Host periodic TxFIFO depth" hexmask.long.word 0x00 0.--13. 1. " PTXFSTADDR ,Host periodic TxFIFO start address" group.long 0x104++0x03 line.long 0x00 "DIEPTXF1,Device IN Endpoint Transmit FIFO Size Register 1" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x108++0x03 line.long 0x00 "DIEPTXF2,Device IN Endpoint Transmit FIFO Size Register 2" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x10C++0x03 line.long 0x00 "DIEPTXF3,Device IN Endpoint Transmit FIFO Size Register 3" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x110++0x03 line.long 0x00 "DIEPTXF4,Device IN Endpoint Transmit FIFO Size Register 4" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x114++0x03 line.long 0x00 "DIEPTXF5,Device IN Endpoint Transmit FIFO Size Register 5" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x118++0x03 line.long 0x00 "DIEPTXF6,Device IN Endpoint Transmit FIFO Size Register 6" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x11C++0x03 line.long 0x00 "DIEPTXF7,Device IN Endpoint Transmit FIFO Size Register 7" hexmask.long.word 0x00 16.--31. 1. " INEPNTXFDEP ,IN endpoint TxFIFO depth" hexmask.long.word 0x00 0.--15. 1. " INEPNTXFSTADDR ,IN endpoint FIFOn transmit RAM start address" group.long 0x400++0x07 line.long 0x00 "HCFG,Host Configuration Register" bitfld.long 0x00 31. " MODECHTIMEN ,Enable/disable the host core" "Disabled,Enabled" bitfld.long 0x00 26. " PERSCHEDENA ,Enable periodic scheduling" "Disabled,Enabled" newline bitfld.long 0x00 24.--25. " FRLISTEN ,Frame list entries" ",8 Entries,16 Entries,32 Entries" bitfld.long 0x00 23. " DESCDMA ,Enable scatter/gather DMA in host mode" "Disabled,Enabled" newline hexmask.long.byte 0x00 8.--15. 1. " RESVALID ,Resume validation period" bitfld.long 0x00 2. " FSLSSUPP ,FS- and LS-only support" "HS/FS/LS,FS/LS-only" line.long 0x04 "HFIR,Host Frame Interval Register" bitfld.long 0x04 16. " HFIRRLDCTRL ,Reload control" "No HFIR reload,HFIR reload" hexmask.long.word 0x04 0.--15. 1. " FRINT ,Frame interval" rgroup.long 0x408++0x03 line.long 0x00 "HFNUM,Host Frame Number/Frame Time Remaining Register" hexmask.long.word 0x00 16.--31. 1. " FRREM ,Frame time remaining" hexmask.long.word 0x00 0.--15. 1. " FRNUM ,Frame number" rgroup.long 0x410++0x07 line.long 0x00 "HPTXSTS,Host Periodic Transmit FIFO/Queue Status Register" bitfld.long 0x00 31. " PT4QTOP ,Odd/even (micro)frame" "Even,Odd" bitfld.long 0x00 27.--30. " PT3QTOP ,Channel/endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 25.--26. " PT2QTOP ,Type" "IN/OUT,0 length,CSPLIT,Disabled" bitfld.long 0x00 24. " PT1QTop ,Terminate" "Disabled,Enabled" newline hexmask.long.byte 0x00 16.--23. 1. " PTXQSPCAVAIL ,Periodic transmit request queue space available" hexmask.long.word 0x00 0.--15. 1. " PTXFSPCAVAIL ,Periodic transmit data fifo space available" line.long 0x04 "HAINT,Host All Channels Interrupt Register" bitfld.long 0x04 15. " HAINT[15] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 14. " [14] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 13. " [13] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 12. " [12] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 11. " [11] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 10. " [10] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 9. " [9] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 8. " [8] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 7. " [7] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 6. " [6] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 5. " [5] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 4. " [4] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 3. " [3] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 2. " [2] ,Channel interrupt for channel" "No interrupt,Interrupt" newline bitfld.long 0x04 1. " [1] ,Channel interrupt for channel" "No interrupt,Interrupt" bitfld.long 0x04 0. " [0] ,Channel interrupt for channel" "No interrupt,Interrupt" group.long 0x418++0x07 line.long 0x00 "HAINTMSK,Host All Channels Interrupt Mask Register" bitfld.long 0x00 15. " HAINTMSK[15] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 13. " [13] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 11. " [11] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 10. " [10] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 9. " [9] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 7. " [7] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 5. " [5] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 4. " [4] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 3. " [3] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Channel interrupt mask for channel" "Not masked,Masked" newline bitfld.long 0x00 1. " [1] ,Channel interrupt mask for channel" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Channel interrupt mask for channel" "Not masked,Masked" line.long 0x04 "HFLBADDR,Host Frame List Base Address Register" group.long 0x440++0x03 line.long 0x00 "HPRT,Host Port Control and Status Register" rbitfld.long 0x00 17.--18. " PRTSPD ,Port speed" "High,Full,Low,?..." bitfld.long 0x00 13.--16. " PRTTSTCTL ,Port test control" "Disabled,J mode,K mode,SE0_NAK mode,Packet mode,Force_Enable,?..." newline bitfld.long 0x00 12. " PRTPWR ,Port power" "Off,On" rbitfld.long 0x00 10.--11. " PRTLNSTS ,Port line status" ",,D+,D" newline bitfld.long 0x00 8. " PRTRST ,Port reset" "No reset,Reset" rbitfld.long 0x00 7. " PRTSUSP ,Port suspend" "Not suspended,Suspended" newline bitfld.long 0x00 6. " PRTRES ,Port resume" "No resume,Resume" eventfld.long 0x00 5. " PRTOVRCURRCHNG ,Port overcurrent change" "Low,High" newline rbitfld.long 0x00 4. " PRTOVRCURRACT ,Port overcurrent active" "Inactive,Active" eventfld.long 0x00 3. " PRTENCHNG ,Port enable/disable change" "Not changed,Changed" newline rbitfld.long 0x00 2. " PRTENA ,Port enable" "Disabled,Enabled" rbitfld.long 0x00 1. " PRTCONNDET ,Port connect detected" "Not detected,Detected" newline rbitfld.long 0x00 0. " PRTCONNSTS ,Port connect status" "Not connected,Connected" group.long 0x500++0x07 line.long 0x00 "HCCHAR0,Host Channel 0 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT0,Host Channel 0 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x500+0x08)++0x07 line.long 0x00 "HCINT0,Host Channel 0 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK0,Host Channel 0 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x500+0x08)++0x07 line.long 0x00 "HCINT0,Host Channel 0 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK0,Host Channel 0 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x500+0x10)++0x07 line.long 0x00 "HCTSIZ0,Host Channel 0 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA0,Host Channel 0 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x500+0x18)++0x03 line.long 0x00 "HCDMAB0,Host Channel 0 DMA Buffer Address Register" else group.long (0x500+0x18)++0x03 line.long 0x00 "HCDMAB0,Host Channel 0 DMA Buffer Address Register" endif group.long 0x520++0x07 line.long 0x00 "HCCHAR1,Host Channel 1 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT1,Host Channel 1 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x520+0x08)++0x07 line.long 0x00 "HCINT1,Host Channel 1 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK1,Host Channel 1 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x520+0x08)++0x07 line.long 0x00 "HCINT1,Host Channel 1 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK1,Host Channel 1 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x520+0x10)++0x07 line.long 0x00 "HCTSIZ1,Host Channel 1 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA1,Host Channel 1 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x520+0x18)++0x03 line.long 0x00 "HCDMAB1,Host Channel 1 DMA Buffer Address Register" else group.long (0x520+0x18)++0x03 line.long 0x00 "HCDMAB1,Host Channel 1 DMA Buffer Address Register" endif group.long 0x540++0x07 line.long 0x00 "HCCHAR2,Host Channel 2 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT2,Host Channel 2 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x540+0x08)++0x07 line.long 0x00 "HCINT2,Host Channel 2 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK2,Host Channel 2 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x540+0x08)++0x07 line.long 0x00 "HCINT2,Host Channel 2 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK2,Host Channel 2 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x540+0x10)++0x07 line.long 0x00 "HCTSIZ2,Host Channel 2 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA2,Host Channel 2 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x540+0x18)++0x03 line.long 0x00 "HCDMAB2,Host Channel 2 DMA Buffer Address Register" else group.long (0x540+0x18)++0x03 line.long 0x00 "HCDMAB2,Host Channel 2 DMA Buffer Address Register" endif group.long 0x560++0x07 line.long 0x00 "HCCHAR3,Host Channel 3 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT3,Host Channel 3 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x560+0x08)++0x07 line.long 0x00 "HCINT3,Host Channel 3 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK3,Host Channel 3 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x560+0x08)++0x07 line.long 0x00 "HCINT3,Host Channel 3 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK3,Host Channel 3 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x560+0x10)++0x07 line.long 0x00 "HCTSIZ3,Host Channel 3 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA3,Host Channel 3 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x560+0x18)++0x03 line.long 0x00 "HCDMAB3,Host Channel 3 DMA Buffer Address Register" else group.long (0x560+0x18)++0x03 line.long 0x00 "HCDMAB3,Host Channel 3 DMA Buffer Address Register" endif group.long 0x580++0x07 line.long 0x00 "HCCHAR4,Host Channel 4 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT4,Host Channel 4 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x580+0x08)++0x07 line.long 0x00 "HCINT4,Host Channel 4 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK4,Host Channel 4 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x580+0x08)++0x07 line.long 0x00 "HCINT4,Host Channel 4 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK4,Host Channel 4 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x580+0x10)++0x07 line.long 0x00 "HCTSIZ4,Host Channel 4 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA4,Host Channel 4 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x580+0x18)++0x03 line.long 0x00 "HCDMAB4,Host Channel 4 DMA Buffer Address Register" else group.long (0x580+0x18)++0x03 line.long 0x00 "HCDMAB4,Host Channel 4 DMA Buffer Address Register" endif group.long 0x5A0++0x07 line.long 0x00 "HCCHAR5,Host Channel 5 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT5,Host Channel 5 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x5A0+0x08)++0x07 line.long 0x00 "HCINT5,Host Channel 5 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK5,Host Channel 5 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x5A0+0x08)++0x07 line.long 0x00 "HCINT5,Host Channel 5 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK5,Host Channel 5 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x5A0+0x10)++0x07 line.long 0x00 "HCTSIZ5,Host Channel 5 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA5,Host Channel 5 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x5A0+0x18)++0x03 line.long 0x00 "HCDMAB5,Host Channel 5 DMA Buffer Address Register" else group.long (0x5A0+0x18)++0x03 line.long 0x00 "HCDMAB5,Host Channel 5 DMA Buffer Address Register" endif group.long 0x5C0++0x07 line.long 0x00 "HCCHAR6,Host Channel 6 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT6,Host Channel 6 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x5C0+0x08)++0x07 line.long 0x00 "HCINT6,Host Channel 6 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK6,Host Channel 6 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x5C0+0x08)++0x07 line.long 0x00 "HCINT6,Host Channel 6 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK6,Host Channel 6 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x5C0+0x10)++0x07 line.long 0x00 "HCTSIZ6,Host Channel 6 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA6,Host Channel 6 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x5C0+0x18)++0x03 line.long 0x00 "HCDMAB6,Host Channel 6 DMA Buffer Address Register" else group.long (0x5C0+0x18)++0x03 line.long 0x00 "HCDMAB6,Host Channel 6 DMA Buffer Address Register" endif group.long 0x5E0++0x07 line.long 0x00 "HCCHAR7,Host Channel 7 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT7,Host Channel 7 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x5E0+0x08)++0x07 line.long 0x00 "HCINT7,Host Channel 7 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK7,Host Channel 7 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x5E0+0x08)++0x07 line.long 0x00 "HCINT7,Host Channel 7 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK7,Host Channel 7 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x5E0+0x10)++0x07 line.long 0x00 "HCTSIZ7,Host Channel 7 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA7,Host Channel 7 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x5E0+0x18)++0x03 line.long 0x00 "HCDMAB7,Host Channel 7 DMA Buffer Address Register" else endif group.long 0x600++0x07 line.long 0x00 "HCCHAR8,Host Channel 8 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT8,Host Channel 8 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x600+0x08)++0x07 line.long 0x00 "HCINT8,Host Channel 8 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK8,Host Channel 8 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x600+0x08)++0x07 line.long 0x00 "HCINT8,Host Channel 8 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK8,Host Channel 8 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x600+0x10)++0x07 line.long 0x00 "HCTSIZ8,Host Channel 8 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA8,Host Channel 8 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x600+0x18)++0x03 line.long 0x00 "HCDMAB8,Host Channel 8 DMA Buffer Address Register" else group.long (0x600+0x18)++0x03 line.long 0x00 "HCDMAB8,Host Channel 8 DMA Buffer Address Register" endif group.long 0x620++0x07 line.long 0x00 "HCCHAR9,Host Channel 9 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT9,Host Channel 9 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x620+0x08)++0x07 line.long 0x00 "HCINT9,Host Channel 9 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK9,Host Channel 9 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x620+0x08)++0x07 line.long 0x00 "HCINT9,Host Channel 9 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK9,Host Channel 9 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x620+0x10)++0x07 line.long 0x00 "HCTSIZ9,Host Channel 9 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA9,Host Channel 9 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x620+0x18)++0x03 line.long 0x00 "HCDMAB9,Host Channel 9 DMA Buffer Address Register" else group.long (0x620+0x18)++0x03 line.long 0x00 "HCDMAB9,Host Channel 9 DMA Buffer Address Register" endif group.long 0x640++0x07 line.long 0x00 "HCCHAR10,Host Channel 10 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT10,Host Channel 10 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x640+0x08)++0x07 line.long 0x00 "HCINT10,Host Channel 10 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK10,Host Channel 10 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x640+0x08)++0x07 line.long 0x00 "HCINT10,Host Channel 10 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK10,Host Channel 10 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x640+0x10)++0x07 line.long 0x00 "HCTSIZ10,Host Channel 10 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA10,Host Channel 10 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x640+0x18)++0x03 line.long 0x00 "HCDMAB10,Host Channel 10 DMA Buffer Address Register" else group.long (0x640+0x18)++0x03 line.long 0x00 "HCDMAB10,Host Channel 10 DMA Buffer Address Register" endif group.long 0x660++0x07 line.long 0x00 "HCCHAR11,Host Channel 11 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT11,Host Channel 11 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x660+0x08)++0x07 line.long 0x00 "HCINT11,Host Channel 11 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK11,Host Channel 11 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x660+0x08)++0x07 line.long 0x00 "HCINT11,Host Channel 11 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK11,Host Channel 11 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x660+0x10)++0x07 line.long 0x00 "HCTSIZ11,Host Channel 11 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA11,Host Channel 11 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x660+0x18)++0x03 line.long 0x00 "HCDMAB11,Host Channel 11 DMA Buffer Address Register" else group.long (0x660+0x18)++0x03 line.long 0x00 "HCDMAB11,Host Channel 11 DMA Buffer Address Register" endif group.long 0x680++0x07 line.long 0x00 "HCCHAR12,Host Channel 12 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT12,Host Channel 12 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x680+0x08)++0x07 line.long 0x00 "HCINT12,Host Channel 12 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK12,Host Channel 12 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x680+0x08)++0x07 line.long 0x00 "HCINT12,Host Channel 12 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK12,Host Channel 12 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x680+0x10)++0x07 line.long 0x00 "HCTSIZ12,Host Channel 12 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA12,Host Channel 12 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x680+0x18)++0x03 line.long 0x00 "HCDMAB12,Host Channel 12 DMA Buffer Address Register" else group.long (0x680+0x18)++0x03 line.long 0x00 "HCDMAB12,Host Channel 12 DMA Buffer Address Register" endif group.long 0x6A0++0x07 line.long 0x00 "HCCHAR13,Host Channel 13 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT13,Host Channel 13 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x6A0+0x08)++0x07 line.long 0x00 "HCINT13,Host Channel 13 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK13,Host Channel 13 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x6A0+0x08)++0x07 line.long 0x00 "HCINT13,Host Channel 13 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK13,Host Channel 13 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x6A0+0x10)++0x07 line.long 0x00 "HCTSIZ13,Host Channel 13 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA13,Host Channel 13 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x6A0+0x18)++0x03 line.long 0x00 "HCDMAB13,Host Channel 13 DMA Buffer Address Register" else group.long (0x6A0+0x18)++0x03 line.long 0x00 "HCDMAB13,Host Channel 13 DMA Buffer Address Register" endif group.long 0x6C0++0x07 line.long 0x00 "HCCHAR14,Host Channel 14 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT14,Host Channel 14 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x6C0+0x08)++0x07 line.long 0x00 "HCINT14,Host Channel 14 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK14,Host Channel 14 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x6C0+0x08)++0x07 line.long 0x00 "HCINT14,Host Channel 14 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK14,Host Channel 14 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x6C0+0x10)++0x07 line.long 0x00 "HCTSIZ14,Host Channel 14 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA14,Host Channel 14 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x6C0+0x18)++0x03 line.long 0x00 "HCDMAB14,Host Channel 14 DMA Buffer Address Register" else group.long (0x6C0+0x18)++0x03 line.long 0x00 "HCDMAB14,Host Channel 14 DMA Buffer Address Register" endif group.long 0x6E0++0x07 line.long 0x00 "HCCHAR15,Host Channel 15 Characteristics Register" rbitfld.long 0x00 31. " CHENA ,Channel enable" "Disabled,Enabled" rbitfld.long 0x00 30. " CHDIS ,Channel disable" "No,Yes" newline hexmask.long.byte 0x00 22.--28. 1. " DEVADDR ,Device address" bitfld.long 0x00 20.--21. " EC ,Multi count (mc) / error count (ec)" ",1 transaction,2 transaction,3 transaction" newline bitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "Control,Isochronous,Bulk,Interrupt" bitfld.long 0x00 17. " LSPDDEV ,Low-speed device" "Normal,Low speed" newline bitfld.long 0x00 15. " EPDIR ,Endpoint direction" "OUT,IN" bitfld.long 0x00 11.--14. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. " MPS ,Maximum packet size" line.long 0x04 "HCSPLT15,Host Channel 15 Split Control Register" bitfld.long 0x04 31. " SPLTENA ,Split enable" "Disabled,Enabled" bitfld.long 0x04 16. " COMPSPLT ,Do complete split" "Not performed,Performed" newline bitfld.long 0x04 14.--15. " XACTPOS ,Transaction position" "Mid,End,Begin,All" hexmask.long.word 0x04 7.--13. 0x80 " HUBADDR ,Hub address" newline hexmask.long.byte 0x04 0.--6. 1. " PRTADDR ,Port address" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) group.long (0x6E0+0x08)++0x07 line.long 0x00 "HCINT15,Host Channel 15 Interrupt Register" rbitfld.long 0x00 13. " DESC_LST_ROLLINTR ,Descriptor rollover interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 12. " XCS_XACT_ERR ,Excessive transaction error" "No error,Error" newline rbitfld.long 0x00 11. " BNAINTR ,BNA interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK15,Host Channel 15 Interrupt Mask Register" bitfld.long 0x04 13. " FRM_LST_ROLLINTRMSK ,Framelist rollover interrupt mask register" "Not masked,Masked" bitfld.long 0x04 11. " BNAINTRMSK ,BNA interrupt mask register" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" else group.long (0x6E0+0x08)++0x07 line.long 0x00 "HCINT15,Host Channel 15 Interrupt Register" rbitfld.long 0x00 10. " DATATGLERR ,Data toggle error" "No error,Error" newline eventfld.long 0x00 9. " FRMOVRUN ,Frame overrun" "No overrun,Overrun" eventfld.long 0x00 8. " BBLERR ,Babble error" "No error,Error" newline eventfld.long 0x00 7. " XACTERR ,Transaction error" "No error,Error" eventfld.long 0x00 6. " NYET ,NYET response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 5. " ACK ,ACK Response received/transmitted interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " NAK ,NAK response received interrupt" "No interrupt,Interrupt" newline eventfld.long 0x00 3. " STALL ,STALL response received interrupt" "No interrupt,Interrupt" rbitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline rbitfld.long 0x00 1. " CHHLTD ,Channel halted" "Not halted,Halted" eventfld.long 0x00 0. " XFERCOMPL ,Transfer completed" "Not completed,Completed" line.long 0x04 "HCINTMSK15,Host Channel 15 Interrupt Mask Register" bitfld.long 0x04 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" bitfld.long 0x04 1. " CHHLTDMSK ,Channel halted mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed mask" "Not masked,Masked" endif group.long (0x6E0+0x10)++0x07 line.long 0x00 "HCTSIZ15,Host Channel 15 Transfer Size Register" bitfld.long 0x00 31. " DOPNG ,Do ping" "No ping,Ping" bitfld.long 0x00 29.--30. " PID ,PID" "DATA0,DATA2,DATA1,MDATA" newline hexmask.long.word 0x00 19.--28. 1. " PKTCNT ,Packet count" hexmask.long.tbyte 0x00 0.--18. 1. " XFERSIZE ,Transfer size" line.long 0x04 "HCDMA15,Host Channel 15 DMA Address Register" sif !cpuis("SPEAR1310REVC") group.long (0x6E0+0x18)++0x03 line.long 0x00 "HCDMAB15,Host Channel 15 DMA Buffer Address Register" else group.long (0x6E0+0x18)++0x03 line.long 0x00 "HCDMAB15,Host Channel 15 DMA Buffer Address Register" endif group.long 0x800++0x07 line.long 0x00 "DCFG,Device Configuration Register" hexmask.long.byte 0x00 26.--31. 1. " RESVALID ,Resume validation period" bitfld.long 0x00 24.--25. " PERSCHINTVL ,Periodic scheduling interval" "25%,50%,75%,?..." newline bitfld.long 0x00 23. " DESCDMA ,Enable scatter/gather DMA in device mode" "Disabled,Enabled" bitfld.long 0x00 13. " ENDEVOUTNAK ,Enable device OUT NAK" "Disabled,Enabled" newline bitfld.long 0x00 11.--12. " PERFRINT ,Periodic frame interval" "80%,85%,90%,95%" hexmask.long.byte 0x00 4.--10. 1. " DEVADDR ,Device address" newline bitfld.long 0x00 2. " NZSTSOUTHSHK ,Non-zero-length status OUT handshake" "OUT,STAL" bitfld.long 0x00 0.--1. " DEVSPD ,Device speed" "High speed,Full speed,Low speed,Full speed (USB1.1)" line.long 0x04 "DCTL,Device Control Register" bitfld.long 0x04 16. " NAKONBBLE ,NAK on babble error" "No error,Error" bitfld.long 0x04 15. " IGNRFRMNUM ,Ignore frame number for isochronous end points" "Not ignored,Ignored" newline bitfld.long 0x04 13.--14. " GMC ,Global multi count" "Invalid,1 packet,2 packets,3 packets" bitfld.long 0x04 11. " PWRONPRGDONE ,Power-on programming done" "Not done,Done" newline bitfld.long 0x04 10. " CGOUTNAK ,Clear global OUT NAK" "No clear,Clear" bitfld.long 0x04 9. " SGOUTNAK ,Set global OUT NAK" "No set,Set" newline bitfld.long 0x04 8. " CGNPINNAK ,Clear global non-periodic IN NAK" "No clear,Clear" bitfld.long 0x04 7. " SGNPINNAK ,Set global non-periodic IN NAK" "No set,Set" newline bitfld.long 0x04 4.--6. " TSTCTL ,Test control" "Disabled,J mode,K mode,SE0_NAK mode,Packet mode,Force_Enable,?..." rbitfld.long 0x04 3. " GOUTNAKSTS ,Global OUT NAK status" "Handshake,No data" newline rbitfld.long 0x04 2. " GNPINNAKSTS ,Global non-periodic IN NAK status" "Handshake,No data" bitfld.long 0x04 1. " SFTDISCON ,Soft disconnect" "Disabled,Enabled" newline bitfld.long 0x04 0. " RMTWKUPSIG ,Remote wakeup signaling" "Disabled,Enabled" rgroup.long 0x808++0x03 line.long 0x00 "DSTS,Device Status Register" hexmask.long.word 0x00 8.--21. 1. " SOFFN ,Frame or microframe number of the received SOF" bitfld.long 0x00 3. " ERRTICERR ,Erratic error" "No error,Error" newline bitfld.long 0x00 1.--2. " ENUMSPD ,Enumerated speed" "High,Full,Low,Full (48MHz)" bitfld.long 0x00 0. " SUSPSTS ,Suspend status" "Not suspended,Suspended" group.long 0x810++0x07 line.long 0x00 "DIEPMSK,Device IN Endpoint Common Interrupt Mask Register" bitfld.long 0x00 13. " NAKMSK ,NAK interrupt mask" "Not masked,Masked" bitfld.long 0x00 9. " BNAININTRMSK ,BNA interrupt mask" "Not masked,Masked" newline bitfld.long 0x00 8. " TXFIFOUNDRNMSK ,Fifo underrun mask" "Not masked,Masked" bitfld.long 0x00 6. " INEPNAKEFFMSK ,IN endpoint NAK effective mask" "Not masked,Masked" newline bitfld.long 0x00 5. " INTKNEPMISMSK ,IN token received with EP mismatch mask" "Not masked,Masked" bitfld.long 0x00 4. " INTKNTXFEMPMSK ,IN token received when TxFIFO empty mask" "Not masked,Masked" newline bitfld.long 0x00 3. " TIMEOUTMSK ,Timeout condition mask" "Not masked,Masked" bitfld.long 0x00 2. " AHBERRMSK ,AHB error mask" "Not masked,Masked" newline bitfld.long 0x00 1. " EPDISBLDMSK ,Endpoint disabled interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " XFERCOMPLMSK ,Transfer completed interrupt mask" "Not masked,Masked" line.long 0x04 "DOEPMSK,Device OUT Endpoint Common Interrupt Mask Register" bitfld.long 0x04 14. " NYETMSK ,NYET interrupt mask" "Not masked,Masked" bitfld.long 0x04 13. " NAKMSK ,NAK interrupt mask" "Not masked,Masked" newline bitfld.long 0x04 12. " BBLEERRMSK ,Babble error interrupt mask" "Not masked,Masked" bitfld.long 0x04 9. " BNAOUTINTRMSK ,BNA interrupt mask" "Not masked,Masked" newline bitfld.long 0x04 8. " OUTPKTERRMSK ,OUT packet error mask" "Not masked,Masked" bitfld.long 0x04 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received mask" "Not masked,Masked" newline bitfld.long 0x04 4. " OUTTKNEPDISMSK ,OUT token received when endpoint disabled mask" "Not masked,Masked" bitfld.long 0x04 3. " SETUPMSK ,SETUP phase done mask" "Not masked,Masked" newline bitfld.long 0x04 2. " AHBERRMSK ,AHB error" "No error,Error" bitfld.long 0x04 1. " EPDISBLDMSK ,Endpoint disabled interrupt mask" "Not masked,Masked" newline bitfld.long 0x04 0. " XFERCOMPLMSK ,Transfer completed interrupt mask" "Not masked,Masked" rgroup.long 0x818++0x03 line.long 0x00 "DAINT,Device All Endpoints Interrupt Register" bitfld.long 0x00 31. " OUTEPINT[15] ,OUT endpoint 15 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 30. " [14] ,OUT endpoint 14 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 29. " [13] ,OUT endpoint 13 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 28. " [12] ,OUT endpoint 12 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 27. " [11] ,OUT endpoint 11 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 26. " [10] ,OUT endpoint 10 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 25. " [9] ,OUT endpoint 9 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 24. " [8] ,OUT endpoint 8 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 23. " [7] ,OUT endpoint 7 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 22. " [6] ,OUT endpoint 6 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 21. " [5] ,OUT endpoint 5 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 20. " [4] ,OUT endpoint 4 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 19. " [3] ,OUT endpoint 3 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 18. " [2] ,OUT endpoint 2 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 17. " [1] ,OUT endpoint 1 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 16. " [0] ,OUT endpoint 0 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 15. " INEPINT[15] ,IN endpoint 15 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,IN endpoint 14 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 13. " [13] ,IN endpoint 13 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,IN endpoint 12 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 11. " [11] ,IN endpoint 11 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,IN endpoint 10 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " [9] ,IN endpoint 9 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,IN endpoint 8 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 7. " [7] ,IN endpoint 7 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,IN endpoint 6 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 5. " [5] ,IN endpoint 5 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,IN endpoint 4 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 3. " [3] ,IN endpoint 3 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,IN endpoint 2 interrupt bit" "No interrupt,Interrupt" newline bitfld.long 0x00 1. " [1] ,IN endpoint 1 interrupt bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,IN endpoint 0 interrupt bit" "No interrupt,Interrupt" group.long 0x81C++0x03 line.long 0x00 "DAINTMSK,Device All Endpoints Interrupt Mask Register" bitfld.long 0x00 31. " OUTEPMSK[15] ,OUT endpoint 31 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 30. " [14] ,OUT endpoint 30 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 29. " [13] ,OUT endpoint 29 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 28. " [12] ,OUT endpoint 28 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 27. " [11] ,OUT endpoint 27 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 26. " [10] ,OUT endpoint 26 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 25. " [9] ,OUT endpoint 25 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 24. " [8] ,OUT endpoint 24 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 23. " [7] ,OUT endpoint 23 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 22. " [6] ,OUT endpoint 22 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 21. " [5] ,OUT endpoint 21 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 20. " [4] ,OUT endpoint 20 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 19. " [3] ,OUT endpoint 19 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 18. " [2] ,OUT endpoint 18 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 17. " [1] ,OUT endpoint 17 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 16. " [0] ,OUT endpoint 16 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 15. " INEPMSK[15] ,IN endpoint 15 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 14. " [14] ,IN endpoint 14 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 13. " [13] ,IN endpoint 13 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 12. " [12] ,IN endpoint 12 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 11. " [11] ,IN endpoint 11 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 10. " [10] ,IN endpoint 10 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " [9] ,IN endpoint 9 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 8. " [8] ,IN endpoint 8 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 7. " [7] ,IN endpoint 7 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 6. " [6] ,IN endpoint 6 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 5. " [5] ,IN endpoint 5 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 4. " [4] ,IN endpoint 4 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 3. " [3] ,IN endpoint 3 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 2. " [2] ,IN endpoint 2 interrupt mask bit" "No interrupt,Interrupt" newline bitfld.long 0x00 1. " [1] ,IN endpoint 1 interrupt mask bit" "No interrupt,Interrupt" bitfld.long 0x00 0. " [0] ,IN endpoint 0 interrupt mask bit" "No interrupt,Interrupt" group.long 0x828++0x0F line.long 0x00 "DVBUSDIS,Device VBUS Discharge Time Register" hexmask.long.word 0x00 0.--15. 1. " DVBUSDIS ,Device VBUS discharge time" line.long 0x04 "DVBUSPULSE,Device VBUS Pulsing Time Register" hexmask.long.word 0x04 0.--11. 1. " DVBUSPULSE ,Device VBUS pulsing time" line.long 0x08 "DTHRCTL,Device Threshold Control Register" bitfld.long 0x08 27. " ARBPRKEN ,Arbiter parking enable" "Disabled,Enabled" hexmask.long.word 0x08 17.--25. 1. " RXTHRLEN ,Receive threshold length" newline bitfld.long 0x08 16. " RXTHREN ,Receive threshold enable" "Disabled,Enabled" bitfld.long 0x08 11.--12. " AHBTHRRATIO ,AHB threshold ratio" "1,1/2,1/4,1/8" newline hexmask.long.word 0x08 2.--10. 1. " TXTHRLEN ,Transmit threshold length" bitfld.long 0x08 1. " ISOTHREN ,ISO IN endpoints threshold enable" "Disabled,Enabled" newline bitfld.long 0x08 0. " NONISOTHREN ,Non-ISO IN endpoints threshold enable" "Disabled,Enabled" line.long 0x0C "DIEPEMPMSK,Device IN Endpoint FIFO Empty Interrupt Mask Register" bitfld.long 0x0C 15. " IN_EP_[15] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 14. " [14] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 13. " [13] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 12. " [12] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 11. " [11] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 10. " [10] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 9. " [9] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 8. " [8] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 7. " [7] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 6. " [6] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 5. " [5] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 4. " [4] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 3. " [3] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 2. " [2] ,Empty interrupt mask bits" "Not masked,Masked" newline bitfld.long 0x0C 1. " [1] ,Empty interrupt mask bits" "Not masked,Masked" bitfld.long 0x0C 0. " [0] ,Empty interrupt mask bits" "Not masked,Masked" group.long 0x900++0x03 line.long 0x00 "DIEPCTL0,Device Control IN Endpoint 0 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x900+0x08)++0x03 line.long 0x00 "DIEPINT0,Device IN Endpoint 0 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x900+0x08)++0x03 line.long 0x00 "DIEPINT0,Device IN Endpoint 0 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x900+0x10)++0x07 line.long 0x00 "DIEPTSIZ0,Device IN Endpoint 0 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA0,Device IN Endpoint 0 DMA Address Register" rgroup.long (0x900+0x18)++0x07 line.long 0x00 "DTXFSTS0,Device IN Endpoint Transmit FIFO Status Register 0" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB0,Device IN Endpoint 0 Buffer Address Register" group.long 0x920++0x03 line.long 0x00 "DIEPCTL1,Device Control IN Endpoint 1 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x920+0x08)++0x03 line.long 0x00 "DIEPINT1,Device IN Endpoint 1 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x920+0x08)++0x03 line.long 0x00 "DIEPINT1,Device IN Endpoint 1 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x920+0x10)++0x07 line.long 0x00 "DIEPTSIZ1,Device IN Endpoint 1 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA1,Device IN Endpoint 1 DMA Address Register" rgroup.long (0x920+0x18)++0x07 line.long 0x00 "DTXFSTS1,Device IN Endpoint Transmit FIFO Status Register 1" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB1,Device IN Endpoint 1 Buffer Address Register" group.long 0x940++0x03 line.long 0x00 "DIEPCTL2,Device Control IN Endpoint 2 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x940+0x08)++0x03 line.long 0x00 "DIEPINT2,Device IN Endpoint 2 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x940+0x08)++0x03 line.long 0x00 "DIEPINT2,Device IN Endpoint 2 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x940+0x10)++0x07 line.long 0x00 "DIEPTSIZ2,Device IN Endpoint 2 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA2,Device IN Endpoint 2 DMA Address Register" rgroup.long (0x940+0x18)++0x07 line.long 0x00 "DTXFSTS2,Device IN Endpoint Transmit FIFO Status Register 2" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB2,Device IN Endpoint 2 Buffer Address Register" group.long 0x960++0x03 line.long 0x00 "DIEPCTL3,Device Control IN Endpoint 3 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x960+0x08)++0x03 line.long 0x00 "DIEPINT3,Device IN Endpoint 3 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x960+0x08)++0x03 line.long 0x00 "DIEPINT3,Device IN Endpoint 3 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x960+0x10)++0x07 line.long 0x00 "DIEPTSIZ3,Device IN Endpoint 3 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA3,Device IN Endpoint 3 DMA Address Register" rgroup.long (0x960+0x18)++0x07 line.long 0x00 "DTXFSTS3,Device IN Endpoint Transmit FIFO Status Register 3" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB3,Device IN Endpoint 3 Buffer Address Register" group.long 0x980++0x03 line.long 0x00 "DIEPCTL4,Device Control IN Endpoint 4 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x980+0x08)++0x03 line.long 0x00 "DIEPINT4,Device IN Endpoint 4 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x980+0x08)++0x03 line.long 0x00 "DIEPINT4,Device IN Endpoint 4 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x980+0x10)++0x07 line.long 0x00 "DIEPTSIZ4,Device IN Endpoint 4 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA4,Device IN Endpoint 4 DMA Address Register" rgroup.long (0x980+0x18)++0x07 line.long 0x00 "DTXFSTS4,Device IN Endpoint Transmit FIFO Status Register 4" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB4,Device IN Endpoint 4 Buffer Address Register" group.long 0x9A0++0x03 line.long 0x00 "DIEPCTL5,Device Control IN Endpoint 5 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x9A0+0x08)++0x03 line.long 0x00 "DIEPINT5,Device IN Endpoint 5 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x9A0+0x08)++0x03 line.long 0x00 "DIEPINT5,Device IN Endpoint 5 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x9A0+0x10)++0x07 line.long 0x00 "DIEPTSIZ5,Device IN Endpoint 5 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA5,Device IN Endpoint 5 DMA Address Register" rgroup.long (0x9A0+0x18)++0x07 line.long 0x00 "DTXFSTS5,Device IN Endpoint Transmit FIFO Status Register 5" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB5,Device IN Endpoint 5 Buffer Address Register" group.long 0x9C0++0x03 line.long 0x00 "DIEPCTL6,Device Control IN Endpoint 6 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x9C0+0x08)++0x03 line.long 0x00 "DIEPINT6,Device IN Endpoint 6 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x9C0+0x08)++0x03 line.long 0x00 "DIEPINT6,Device IN Endpoint 6 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x9C0+0x10)++0x07 line.long 0x00 "DIEPTSIZ6,Device IN Endpoint 6 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA6,Device IN Endpoint 6 DMA Address Register" rgroup.long (0x9C0+0x18)++0x07 line.long 0x00 "DTXFSTS6,Device IN Endpoint Transmit FIFO Status Register 6" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB6,Device IN Endpoint 6 Buffer Address Register" group.long 0x9E0++0x03 line.long 0x00 "DIEPCTL7,Device Control IN Endpoint 7 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0x9E0+0x08)++0x03 line.long 0x00 "DIEPINT7,Device IN Endpoint 7 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0x9E0+0x08)++0x03 line.long 0x00 "DIEPINT7,Device IN Endpoint 7 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0x9E0+0x10)++0x07 line.long 0x00 "DIEPTSIZ7,Device IN Endpoint 7 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA7,Device IN Endpoint 7 DMA Address Register" rgroup.long (0x9E0+0x18)++0x07 line.long 0x00 "DTXFSTS7,Device IN Endpoint Transmit FIFO Status Register 7" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB7,Device IN Endpoint 7 Buffer Address Register" group.long 0xA00++0x03 line.long 0x00 "DIEPCTL8,Device Control IN Endpoint 8 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xA00+0x08)++0x03 line.long 0x00 "DIEPINT8,Device IN Endpoint 8 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xA00+0x08)++0x03 line.long 0x00 "DIEPINT8,Device IN Endpoint 8 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xA00+0x10)++0x07 line.long 0x00 "DIEPTSIZ8,Device IN Endpoint 8 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA8,Device IN Endpoint 8 DMA Address Register" rgroup.long (0xA00+0x18)++0x07 line.long 0x00 "DTXFSTS8,Device IN Endpoint Transmit FIFO Status Register 8" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB8,Device IN Endpoint 8 Buffer Address Register" group.long 0xA20++0x03 line.long 0x00 "DIEPCTL9,Device Control IN Endpoint 9 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xA20+0x08)++0x03 line.long 0x00 "DIEPINT9,Device IN Endpoint 9 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xA20+0x08)++0x03 line.long 0x00 "DIEPINT9,Device IN Endpoint 9 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xA20+0x10)++0x07 line.long 0x00 "DIEPTSIZ9,Device IN Endpoint 9 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA9,Device IN Endpoint 9 DMA Address Register" rgroup.long (0xA20+0x18)++0x07 line.long 0x00 "DTXFSTS9,Device IN Endpoint Transmit FIFO Status Register 9" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB9,Device IN Endpoint 9 Buffer Address Register" group.long 0xA40++0x03 line.long 0x00 "DIEPCTL10,Device Control IN Endpoint 10 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xA40+0x08)++0x03 line.long 0x00 "DIEPINT10,Device IN Endpoint 10 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xA40+0x08)++0x03 line.long 0x00 "DIEPINT10,Device IN Endpoint 10 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xA40+0x10)++0x07 line.long 0x00 "DIEPTSIZ10,Device IN Endpoint 10 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA10,Device IN Endpoint 10 DMA Address Register" rgroup.long (0xA40+0x18)++0x07 line.long 0x00 "DTXFSTS10,Device IN Endpoint Transmit FIFO Status Register 10" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB10,Device IN Endpoint 10 Buffer Address Register" group.long 0xA60++0x03 line.long 0x00 "DIEPCTL11,Device Control IN Endpoint 11 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xA60+0x08)++0x03 line.long 0x00 "DIEPINT11,Device IN Endpoint 11 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xA60+0x08)++0x03 line.long 0x00 "DIEPINT11,Device IN Endpoint 11 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xA60+0x10)++0x07 line.long 0x00 "DIEPTSIZ11,Device IN Endpoint 11 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA11,Device IN Endpoint 11 DMA Address Register" rgroup.long (0xA60+0x18)++0x07 line.long 0x00 "DTXFSTS11,Device IN Endpoint Transmit FIFO Status Register 11" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB11,Device IN Endpoint 11 Buffer Address Register" group.long 0xA80++0x03 line.long 0x00 "DIEPCTL12,Device Control IN Endpoint 12 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xA80+0x08)++0x03 line.long 0x00 "DIEPINT12,Device IN Endpoint 12 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xA80+0x08)++0x03 line.long 0x00 "DIEPINT12,Device IN Endpoint 12 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xA80+0x10)++0x07 line.long 0x00 "DIEPTSIZ12,Device IN Endpoint 12 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA12,Device IN Endpoint 12 DMA Address Register" rgroup.long (0xA80+0x18)++0x07 line.long 0x00 "DTXFSTS12,Device IN Endpoint Transmit FIFO Status Register 12" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB12,Device IN Endpoint 12 Buffer Address Register" group.long 0xAA0++0x03 line.long 0x00 "DIEPCTL13,Device Control IN Endpoint 13 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xAA0+0x08)++0x03 line.long 0x00 "DIEPINT13,Device IN Endpoint 13 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xAA0+0x08)++0x03 line.long 0x00 "DIEPINT13,Device IN Endpoint 13 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xAA0+0x10)++0x07 line.long 0x00 "DIEPTSIZ13,Device IN Endpoint 13 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA13,Device IN Endpoint 13 DMA Address Register" rgroup.long (0xAA0+0x18)++0x07 line.long 0x00 "DTXFSTS13,Device IN Endpoint Transmit FIFO Status Register 13" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB13,Device IN Endpoint 13 Buffer Address Register" group.long 0xAC0++0x03 line.long 0x00 "DIEPCTL14,Device Control IN Endpoint 14 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xAC0+0x08)++0x03 line.long 0x00 "DIEPINT14,Device IN Endpoint 14 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xAC0+0x08)++0x03 line.long 0x00 "DIEPINT14,Device IN Endpoint 14 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xAC0+0x10)++0x07 line.long 0x00 "DIEPTSIZ14,Device IN Endpoint 14 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA14,Device IN Endpoint 14 DMA Address Register" rgroup.long (0xAC0+0x18)++0x07 line.long 0x00 "DTXFSTS14,Device IN Endpoint Transmit FIFO Status Register 14" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB14,Device IN Endpoint 14 Buffer Address Register" group.long 0xAE0++0x03 line.long 0x00 "DIEPCTL15,Device Control IN Endpoint 15 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No set,Set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear" newline bitfld.long 0x00 22.--25. " TXFNUM ,TxFIFO number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" ",Active" bitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xAE0+0x08)++0x03 line.long 0x00 "DIEPINT15,Device IN Endpoint 15 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xAE0+0x08)++0x03 line.long 0x00 "DIEPINT15,Device IN Endpoint 15 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYet interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,NAK interrupt" "No interrupt,Interrupt" bitfld.long 0x00 11. " PKTDRPSTS ,Packet drop status" "Not dropped,Dropped" newline bitfld.long 0x00 8. " TXFIFOUNDRN ,Fifo underrun" "Not detected,Detected" newline bitfld.long 0x00 7. " TXFEMP ,Transmit FIFO empty" "Half empty,Completely empty" bitfld.long 0x00 6. " INEPNAKEFF ,IN endpoint NAK effective" "Low,High" newline bitfld.long 0x00 5. " INTKNEPMIS ,IN token received with EP mismatch" "Low,High" bitfld.long 0x00 4. " INTKNTXFEMP ,IN token received when TxFIFO is empty" "Half empty,Completely empty" newline bitfld.long 0x00 3. " TIMEOUT ,Timeout condition" "Low,High" bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" newline bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xAE0+0x10)++0x07 line.long 0x00 "DIEPTSIZ15,Device IN Endpoint 15 Transfer Size Register" bitfld.long 0x00 19.--20. " PKTCNT ,Packet count" "0,1,2,3" hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DIEPDMA15,Device IN Endpoint 15 DMA Address Register" rgroup.long (0xAE0+0x18)++0x07 line.long 0x00 "DTXFSTS15,Device IN Endpoint Transmit FIFO Status Register 15" hexmask.long.word 0x00 0.--15. 1. " INEPTXFSPCAVAIL ,IN endpoint TxFIFO space avail" line.long 0x04 "DIEPDMAB15,Device IN Endpoint 15 Buffer Address Register" group.long 0xB00++0x03 line.long 0x00 "DOEPCTL0,Device Control OUT Endpoint 0 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB00+0x08)++0x03 line.long 0x00 "DOEPINT0,Device OUT Endpoint 0 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xB00+0x08)++0x03 line.long 0x00 "DOEPINT0,Device OUT Endpoint 0 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xB00+0x10)++0x07 line.long 0x00 "DOEPTSIZ0,Device OUT Endpoint 0 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA0,Device OUT Endpoint 0 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB00+0x1C)++0x03 line.long 0x00 "DOEPDMAB0,Device OUT Endpoint 0 Buffer Address Register" else hgroup.long (0xB00+0x1C)++0x03 hide.long 0x00 "DOEPDMAB0,Device OUT Endpoint 0 Buffer Address Register" endif group.long 0xB20++0x03 line.long 0x00 "DOEPCTL1,Device Control OUT Endpoint 1 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB20+0x08)++0x03 line.long 0x00 "DOEPINT1,Device OUT Endpoint 1 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xB20+0x08)++0x03 line.long 0x00 "DOEPINT1,Device OUT Endpoint 1 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xB20+0x10)++0x07 line.long 0x00 "DOEPTSIZ1,Device OUT Endpoint 1 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA1,Device OUT Endpoint 1 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB20+0x1C)++0x03 line.long 0x00 "DOEPDMAB1,Device OUT Endpoint 1 Buffer Address Register" else hgroup.long (0xB20+0x1C)++0x03 hide.long 0x00 "DOEPDMAB1,Device OUT Endpoint 1 Buffer Address Register" endif group.long 0xB40++0x03 line.long 0x00 "DOEPCTL2,Device Control OUT Endpoint 2 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB40+0x08)++0x03 line.long 0x00 "DOEPINT2,Device OUT Endpoint 2 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xB40+0x08)++0x03 line.long 0x00 "DOEPINT2,Device OUT Endpoint 2 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xB40+0x10)++0x07 line.long 0x00 "DOEPTSIZ2,Device OUT Endpoint 2 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA2,Device OUT Endpoint 2 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB40+0x1C)++0x03 line.long 0x00 "DOEPDMAB2,Device OUT Endpoint 2 Buffer Address Register" else hgroup.long (0xB40+0x1C)++0x03 hide.long 0x00 "DOEPDMAB2,Device OUT Endpoint 2 Buffer Address Register" endif group.long 0xB60++0x03 line.long 0x00 "DOEPCTL3,Device Control OUT Endpoint 3 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB60+0x08)++0x03 line.long 0x00 "DOEPINT3,Device OUT Endpoint 3 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xB60+0x08)++0x03 line.long 0x00 "DOEPINT3,Device OUT Endpoint 3 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xB60+0x10)++0x07 line.long 0x00 "DOEPTSIZ3,Device OUT Endpoint 3 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA3,Device OUT Endpoint 3 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB60+0x1C)++0x03 line.long 0x00 "DOEPDMAB3,Device OUT Endpoint 3 Buffer Address Register" else hgroup.long (0xB60+0x1C)++0x03 hide.long 0x00 "DOEPDMAB3,Device OUT Endpoint 3 Buffer Address Register" endif group.long 0xB80++0x03 line.long 0x00 "DOEPCTL4,Device Control OUT Endpoint 4 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB80+0x08)++0x03 line.long 0x00 "DOEPINT4,Device OUT Endpoint 4 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xB80+0x08)++0x03 line.long 0x00 "DOEPINT4,Device OUT Endpoint 4 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xB80+0x10)++0x07 line.long 0x00 "DOEPTSIZ4,Device OUT Endpoint 4 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA4,Device OUT Endpoint 4 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xB80+0x1C)++0x03 line.long 0x00 "DOEPDMAB4,Device OUT Endpoint 4 Buffer Address Register" else hgroup.long (0xB80+0x1C)++0x03 hide.long 0x00 "DOEPDMAB4,Device OUT Endpoint 4 Buffer Address Register" endif group.long 0xBA0++0x03 line.long 0x00 "DOEPCTL5,Device Control OUT Endpoint 5 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBA0+0x08)++0x03 line.long 0x00 "DOEPINT5,Device OUT Endpoint 5 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xBA0+0x08)++0x03 line.long 0x00 "DOEPINT5,Device OUT Endpoint 5 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xBA0+0x10)++0x07 line.long 0x00 "DOEPTSIZ5,Device OUT Endpoint 5 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA5,Device OUT Endpoint 5 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBA0+0x1C)++0x03 line.long 0x00 "DOEPDMAB5,Device OUT Endpoint 5 Buffer Address Register" else hgroup.long (0xBA0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB5,Device OUT Endpoint 5 Buffer Address Register" endif group.long 0xBC0++0x03 line.long 0x00 "DOEPCTL6,Device Control OUT Endpoint 6 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBC0+0x08)++0x03 line.long 0x00 "DOEPINT6,Device OUT Endpoint 6 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xBC0+0x08)++0x03 line.long 0x00 "DOEPINT6,Device OUT Endpoint 6 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xBC0+0x10)++0x07 line.long 0x00 "DOEPTSIZ6,Device OUT Endpoint 6 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA6,Device OUT Endpoint 6 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBC0+0x1C)++0x03 line.long 0x00 "DOEPDMAB6,Device OUT Endpoint 6 Buffer Address Register" else hgroup.long (0xBC0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB6,Device OUT Endpoint 6 Buffer Address Register" endif group.long 0xBE0++0x03 line.long 0x00 "DOEPCTL7,Device Control OUT Endpoint 7 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBE0+0x08)++0x03 line.long 0x00 "DOEPINT7,Device OUT Endpoint 7 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xBE0+0x08)++0x03 line.long 0x00 "DOEPINT7,Device OUT Endpoint 7 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xBE0+0x10)++0x07 line.long 0x00 "DOEPTSIZ7,Device OUT Endpoint 7 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA7,Device OUT Endpoint 7 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xBE0+0x1C)++0x03 line.long 0x00 "DOEPDMAB7,Device OUT Endpoint 7 Buffer Address Register" else hgroup.long (0xBE0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB7,Device OUT Endpoint 7 Buffer Address Register" endif group.long 0xC00++0x03 line.long 0x00 "DOEPCTL8,Device Control OUT Endpoint 8 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC00+0x08)++0x03 line.long 0x00 "DOEPINT8,Device OUT Endpoint 8 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xC00+0x08)++0x03 line.long 0x00 "DOEPINT8,Device OUT Endpoint 8 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xC00+0x10)++0x07 line.long 0x00 "DOEPTSIZ8,Device OUT Endpoint 8 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA8,Device OUT Endpoint 8 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC00+0x1C)++0x03 line.long 0x00 "DOEPDMAB8,Device OUT Endpoint 8 Buffer Address Register" else hgroup.long (0xC00+0x1C)++0x03 hide.long 0x00 "DOEPDMAB8,Device OUT Endpoint 8 Buffer Address Register" endif group.long 0xC20++0x03 line.long 0x00 "DOEPCTL9,Device Control OUT Endpoint 9 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC20+0x08)++0x03 line.long 0x00 "DOEPINT9,Device OUT Endpoint 9 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xC20+0x08)++0x03 line.long 0x00 "DOEPINT9,Device OUT Endpoint 9 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xC20+0x10)++0x07 line.long 0x00 "DOEPTSIZ9,Device OUT Endpoint 9 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA9,Device OUT Endpoint 9 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC20+0x1C)++0x03 line.long 0x00 "DOEPDMAB9,Device OUT Endpoint 9 Buffer Address Register" else hgroup.long (0xC20+0x1C)++0x03 hide.long 0x00 "DOEPDMAB9,Device OUT Endpoint 9 Buffer Address Register" endif group.long 0xC40++0x03 line.long 0x00 "DOEPCTL10,Device Control OUT Endpoint 10 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC40+0x08)++0x03 line.long 0x00 "DOEPINT10,Device OUT Endpoint 10 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xC40+0x08)++0x03 line.long 0x00 "DOEPINT10,Device OUT Endpoint 10 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xC40+0x10)++0x07 line.long 0x00 "DOEPTSIZ10,Device OUT Endpoint 10 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA10,Device OUT Endpoint 10 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC40+0x1C)++0x03 line.long 0x00 "DOEPDMAB10,Device OUT Endpoint 10 Buffer Address Register" else hgroup.long (0xC40+0x1C)++0x03 hide.long 0x00 "DOEPDMAB10,Device OUT Endpoint 10 Buffer Address Register" endif group.long 0xC60++0x03 line.long 0x00 "DOEPCTL11,Device Control OUT Endpoint 11 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC60+0x08)++0x03 line.long 0x00 "DOEPINT11,Device OUT Endpoint 11 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xC60+0x08)++0x03 line.long 0x00 "DOEPINT11,Device OUT Endpoint 11 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xC60+0x10)++0x07 line.long 0x00 "DOEPTSIZ11,Device OUT Endpoint 11 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA11,Device OUT Endpoint 11 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC60+0x1C)++0x03 line.long 0x00 "DOEPDMAB11,Device OUT Endpoint 11 Buffer Address Register" else hgroup.long (0xC60+0x1C)++0x03 hide.long 0x00 "DOEPDMAB11,Device OUT Endpoint 11 Buffer Address Register" endif group.long 0xC80++0x03 line.long 0x00 "DOEPCTL12,Device Control OUT Endpoint 12 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC80+0x08)++0x03 line.long 0x00 "DOEPINT12,Device OUT Endpoint 12 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xC80+0x08)++0x03 line.long 0x00 "DOEPINT12,Device OUT Endpoint 12 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xC80+0x10)++0x07 line.long 0x00 "DOEPTSIZ12,Device OUT Endpoint 12 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA12,Device OUT Endpoint 12 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xC80+0x1C)++0x03 line.long 0x00 "DOEPDMAB12,Device OUT Endpoint 12 Buffer Address Register" else hgroup.long (0xC80+0x1C)++0x03 hide.long 0x00 "DOEPDMAB12,Device OUT Endpoint 12 Buffer Address Register" endif group.long 0xCA0++0x03 line.long 0x00 "DOEPCTL13,Device Control OUT Endpoint 13 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCA0+0x08)++0x03 line.long 0x00 "DOEPINT13,Device OUT Endpoint 13 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xCA0+0x08)++0x03 line.long 0x00 "DOEPINT13,Device OUT Endpoint 13 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xCA0+0x10)++0x07 line.long 0x00 "DOEPTSIZ13,Device OUT Endpoint 13 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA13,Device OUT Endpoint 13 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCA0+0x1C)++0x03 line.long 0x00 "DOEPDMAB13,Device OUT Endpoint 13 Buffer Address Register" else hgroup.long (0xCA0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB13,Device OUT Endpoint 13 Buffer Address Register" endif group.long 0xCC0++0x03 line.long 0x00 "DOEPCTL14,Device Control OUT Endpoint 14 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCC0+0x08)++0x03 line.long 0x00 "DOEPINT14,Device OUT Endpoint 14 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xCC0+0x08)++0x03 line.long 0x00 "DOEPINT14,Device OUT Endpoint 14 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xCC0+0x10)++0x07 line.long 0x00 "DOEPTSIZ14,Device OUT Endpoint 14 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA14,Device OUT Endpoint 14 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCC0+0x1C)++0x03 line.long 0x00 "DOEPDMAB14,Device OUT Endpoint 14 Buffer Address Register" else hgroup.long (0xCC0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB14,Device OUT Endpoint 14 Buffer Address Register" endif group.long 0xCE0++0x03 line.long 0x00 "DOEPCTL15,Device Control OUT Endpoint 15 Control Register" rbitfld.long 0x00 31. " EPENA ,Endpoint enable" "Disabled,Enabled" rbitfld.long 0x00 30. " EPDIS ,Endpoint disable" "No,Yes" newline bitfld.long 0x00 27. " SNAK ,Set NAK" "No NAK,NAK set" bitfld.long 0x00 26. " CNAK ,Clear NAK" "No clear,Clear NAK" newline rbitfld.long 0x00 21. " STALL ,STALL handshake" "Not stalled,Stalled" bitfld.long 0x00 20. " SNP ,Snoop mode" "Disabled,Enabled" newline rbitfld.long 0x00 18.--19. " EPTYPE ,Endpoint type" "0,1,2,3" rbitfld.long 0x00 17. " NAKSTS ,NAK status" "Non-NAK,NAK" newline rbitfld.long 0x00 15. " USBACTEP ,USB active endpoint" "0,1" rbitfld.long 0x00 0.--1. " MPS ,Maximum packet size" "64bytes,32bytes,16bytes,8bytes" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCE0+0x08)++0x03 line.long 0x00 "DOEPINT15,Device OUT Endpoint 15 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 9. " BNAINTR ,BNA (Buffer not available) interrupt" "No interrupt,Interrupt" bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" else rgroup.long (0xCE0+0x08)++0x03 line.long 0x00 "DOEPINT15,Device OUT Endpoint 15 Interrupt Register" bitfld.long 0x00 14. " NYETINTRPT ,NYEt interrupt" "No interrupt,Interrupt" bitfld.long 0x00 13. " NAKINTRPT ,NAK interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 12. " BBLEERR ,Babble interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 8. " OUTPKTERR ,OUT packet error" "No error,Error" newline bitfld.long 0x00 6. " BACK2BACKSETUP ,Back-to-back SETUP packets received" "Not received,Received" bitfld.long 0x00 5. " STSPHSERCVD ,Status phase received for control write" "Not received,Received" newline bitfld.long 0x00 4. " OUTTKNEPDIS ,OUT token received when endpoint disabled" "No,Yes" bitfld.long 0x00 3. " SETUP ,SETUP phase done" "Not done,Done" newline bitfld.long 0x00 2. " AHBERR ,AHB error" "No error,Error" bitfld.long 0x00 1. " EPDISBLD ,Endpoint disabled interrupt" "No interrupt,Interrupt" newline bitfld.long 0x00 0. " XFERCOMPL ,Transfer completed interrupt" "No interrupt,Interrupt" endif group.long (0xCE0+0x10)++0x07 line.long 0x00 "DOEPTSIZ15,Device OUT Endpoint 15 Transfer Size Register" bitfld.long 0x00 29.--30. " SUPCNT ,SETUP packet count" ",1 packet,2 packets,3 packets" bitfld.long 0x00 19. " PKTCNT ,Packet count" "0,1" newline hexmask.long.byte 0x00 0.--6. 1. " XFERSIZE ,Transfer size" line.long 0x04 "DOEPDMA15,Device OUT Endpoint 15 DMA Address Register" if (((per.l(ad:0xE3800014+0x50))&0x40000000)==0x40000000) rgroup.long (0xCE0+0x1C)++0x03 line.long 0x00 "DOEPDMAB15,Device OUT Endpoint 15 Buffer Address Register" else hgroup.long (0xCE0+0x1C)++0x03 hide.long 0x00 "DOEPDMAB15,Device OUT Endpoint 15 Buffer Address Register" endif group.long 0xE00++0x03 line.long 0x00 "PCGCCTL,Power and Clock Gating Control Register" rbitfld.long 0x00 7. " L1SUSPENDED ,L1 deep sleep" "No effect,Deep sleep" rbitfld.long 0x00 6. " PHYSLEEP ,PHY In sleep" "No effect,Sleep" newline bitfld.long 0x00 3. " RSTPDWNMODULE ,Reset power-down modules" "No reset,Reset" bitfld.long 0x00 0. " STOPPCLK ,Stop pclk" "No effect,Stopped" hgroup.long 0x1000++0x03 hide.long 0x00 "DFIFO0,Data FIFO 0 Access Register" in hgroup.long 0x2000++0x03 hide.long 0x00 "DFIFO1,Data FIFO 1 Access Register" in hgroup.long 0x3000++0x03 hide.long 0x00 "DFIFO2,Data FIFO 2 Access Register" in hgroup.long 0x4000++0x03 hide.long 0x00 "DFIFO3,Data FIFO 3 Access Register" in hgroup.long 0x5000++0x03 hide.long 0x00 "DFIFO4,Data FIFO 4 Access Register" in hgroup.long 0x6000++0x03 hide.long 0x00 "DFIFO5,Data FIFO 5 Access Register" in hgroup.long 0x7000++0x03 hide.long 0x00 "DFIFO6,Data FIFO 6 Access Register" in hgroup.long 0x8000++0x03 hide.long 0x00 "DFIFO7,Data FIFO 7 Access Register" in hgroup.long 0x9000++0x03 hide.long 0x00 "DFIFO8,Data FIFO 8 Access Register" in hgroup.long 0xA000++0x03 hide.long 0x00 "DFIFO9,Data FIFO 9 Access Register" in hgroup.long 0xB000++0x03 hide.long 0x00 "DFIFO10,Data FIFO 10 Access Register" in hgroup.long 0xC000++0x03 hide.long 0x00 "DFIFO11,Data FIFO 11 Access Register" in hgroup.long 0xD000++0x03 hide.long 0x00 "DFIFO12,Data FIFO 12 Access Register" in hgroup.long 0xE000++0x03 hide.long 0x00 "DFIFO13,Data FIFO 13 Access Register" in hgroup.long 0xF000++0x03 hide.long 0x00 "DFIFO14,Data FIFO 14 Access Register" in hgroup.long 0x10000++0x03 hide.long 0x00 "DFIFO15,Data FIFO 15 Access Register" in width 0x0B tree.end tree "PCIe (PCI Express controller)" base ad:0xB1000000 tree.open "PCIe core registers" tree "PCI Express Type 0 Configuration Space header" if (((per.l(ad:0xB1002000))&0x1E000000)==0x0) width 29. base ad:0xB1000000 rgroup.long 0x00++0x03 line.long 0x00 "DEVICE_VENDORID, Device and Vendor ID" hexmask.long.word 0x00 16.--31. 1. " DEVICEID , Device ID" hexmask.long.word 0x00 0.--15. 1. " VENDORID , Vendor ID" group.long 0x04++0x03 line.long 0x00 "STATUS_COMMAND_REGISTER, Status and Command register" bitfld.long 0x00 31. " DETECT_PARERR , Detected Parity Error" "No error,Error" bitfld.long 0x00 30. " SIGNAL_SYSERR , Signaled System Error" "No error,Error" textline " " bitfld.long 0x00 29. " RCVD_MASTERABORT , Received Master Abort" "Not aborted,Aborted" bitfld.long 0x00 28. " RCVD_TRGTABORT , Received Target Abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 27. " SIGNAL_TRGTABORT , Signaled Target Abort" "Not aborted,Aborted" rbitfld.long 0x00 25.--26. " DEVSEL_TIME , DevSel Timing, Hardwired to 0 for PCIExpress" "0,1,2,3" textline " " bitfld.long 0x00 24. " MASTERDATA_PARERR , Master Data Parity Error" "No error,Error" rbitfld.long 0x00 23. " FAST_B2B , Back to Back Capable, Hardwired to 0 for PCIExpress" "0,1" textline " " rbitfld.long 0x00 21. " 66MHZ_CAP , 66MHz Capable, Hardwired to 0 for PCIExpress" "0,1" rbitfld.long 0x00 20. " CAP_LIST , Capabilities List Hardwired to 1" "0,1" textline " " rbitfld.long 0x00 19. " INTX_STATUS , INTx Status" "0,1" bitfld.long 0x00 10. " INTX_ASSER_DIS , INTx Assertion Disable" "No,Yes" textline " " rbitfld.long 0x00 9. " FAST_BBEN , Bit hardwired to 0 for PCIExpress" "0,1" bitfld.long 0x00 8. " SERR_EN , SERR Enable" "Disable,Enable" textline " " rbitfld.long 0x00 7. " IDSEL_CTRL , Bit hardwired to 0 for PCIExpress" "0,1" bitfld.long 0x00 6. " PARITYERRRESP , Parity Error Response" "No error,Error" textline " " bitfld.long 0x00 2. " BUSMASTER_EN , Bus Master Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MEM_SPACE_EN , Memory Space Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IO_SPACE_EN , IO Space Enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "CLASSCODE_REVISIONID, Class code and Revision ID" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLS_CD , Sub Class Code" hexmask.long.byte 0x00 16.--23. 1. " SUBCLS_CD , Sub Class Code" textline " " hexmask.long.byte 0x00 8.--15. 1. " PROG_IF_CODE , Programming Interface Code" hexmask.long.byte 0x00 0.--7. 1. " REVID , Revision ID" group.long 0x0C++0x13 line.long 0x00 "BIST_HEAD_LAT_CACH, BIST Header Type Latency Timer Cache Line Size" hexmask.long.byte 0x00 24.--31. 1. " BIST , BIST" hexmask.long.byte 0x00 16.--23. 1. " HEAD_TYP , Header Type" textline " " hexmask.long.byte 0x00 8.--15. 1. " LAT_TIM , Latency Timer" hexmask.long.byte 0x00 0.--7. 1. " CACH_LN_SZE , Cache Line Size" line.long 0x04 "BAR_ADR_0, Base Address Register 0" hexmask.long 0x04 4.--31. 0x10 " BAR0_BASE_ADDR , BAR0 base address bits" rbitfld.long 0x04 3. " BAR0_PREFETCHABLE , Memory region is prefetchable" "Non-prefetchable,Prefetchable" textline " " rbitfld.long 0x04 1.--2. " BAR0_TYPE , BAR type" "32bit,Reserved,64bit,?..." rbitfld.long 0x04 0. " BAR0_MEM_INDICATOR , Memory indicator" "Memory,I/O" line.long 0x08 "BAR_ADR_1, Base Address Register 1" line.long 0x0C "BAR_ADR_2, Base Address Register 2" hexmask.long 0x0C 4.--31. 0x10 " BAR2_BASE_ADDR , BAR2 base address bits" rbitfld.long 0x0C 3. " BAR2_PREFETCHABLE , Memory region is prefetchable" "Non-prefetchable,Prefetchable" textline " " rbitfld.long 0x0C 1.--2. " BAR2_TYPE , BAR type" "32bit,Reserved,64bit,?..." rbitfld.long 0x0C 0. " BAR2_MEM_INDICATOR , Memorz indicator" "Memory,I/O" line.long 0x10 "BAR_ADR_3, Base Address Register 3" hexmask.long 0x10 4.--31. 0x10 " BAR3_BASE_ADDR , BAR3 base address bits" rbitfld.long 0x10 3. " BAR3_PREFETCHABLE , Memory region is prefetchable" "Non-prefetchable,Prefetchable" textline " " rbitfld.long 0x10 1.--2. " BAR3_TYPE , BAR type" "32bit,Reserved,64bit,?..." rbitfld.long 0x10 0. " BAR3_MEM_INDICATOR , Memorz indicator" "Memory,I/O" rgroup.long 0x28++0x07 line.long 0x00 "CARDBUS_CISPOINTER, Card CIS Pointer" line.long 0x04 "SUBSYSTEM_SUBSYSTEMVENDORID, Subsystem ID and Subsystem Vendor ID" hexmask.long.word 0x04 16.--31. 1. " SUBSYSID , Subsystem ID" hexmask.long.word 0x04 0.--15. 1. " SUBSYS_VENID , Subsystem Vendor ID" group.long 0x30++0x03 line.long 0x00 "EXP_ROM_ADDR, Expansion ROM Base Address" hexmask.long.tbyte 0x00 11.--31. 0x400 " ADDR , Expansion ROM Address" bitfld.long 0x00 0. " EXP_ROM_EN , Expansion ROM Enable" "Disabled,Enabled" rgroup.long 0x34++0x03 line.long 0x00 "CAPPTR, CapPtr" hexmask.long.byte 0x00 0.--7. 1. " CAPTR , First Capability Pointer" group.long 0x3C++0x03 line.long 0x00 "LAT_INT, Max Latency Min Grant Int Pin and line" hexmask.long.byte 0x00 24.--31. 1. " MX_LAT , Max Latency" hexmask.long.byte 0x00 16.--23. 1. " MIN_GRNT , Min Grant" textline " " hexmask.long.byte 0x00 8.--15. 1. " INT_PIN , Interrupt Pin" hexmask.long.byte 0x00 0.--7. 1. " INT_LIN , Interrupt Line" elif (((per.l(ad:0xB1002000))&0x1E000000)==0x1) elif (((per.l(ad:0xB1002000))&0x1E000000)==0x8000000) width 29. base ad:0xB1000000 rgroup.long 0x00++0x03 line.long 0x00 "DEVICE_VENDORID, Device and Vendor ID" hexmask.long.word 0x00 16.--31. 1. " DEVICEID , Device ID" hexmask.long.word 0x00 0.--15. 1. " VENDORID , Vendor ID" group.long 0x04++0x03 line.long 0x00 "STATUS_COMMAND_REGISTER, Status and Command register" bitfld.long 0x00 31. " DETECT_PARERR , Detected Parity Error" "No error,Error" bitfld.long 0x00 30. " SIGNAL_SYSERR , Signaled System Error" "No error,Error" textline " " bitfld.long 0x00 29. " RCVD_MASTERABORT , Received Master Abort" "Not aborted,Aborted" bitfld.long 0x00 28. " RCVD_TRGTABORT , Received Target Abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 27. " SIGNAL_TRGTABORT , Signaled Target Abort" "Not aborted,Aborted" rbitfld.long 0x00 25.--26. " DEVSEL_TIME , DevSel Timing, Hardwired to 0 for PCIExpress" "0,1,2,3" textline " " bitfld.long 0x00 24. " MASTERDATA_PARERR , Master Data Parity Error" "No error,Error" rbitfld.long 0x00 23. " FAST_B2B , Back to Back Capable, Hardwired to 0 for PCIExpress" "0,1" textline " " rbitfld.long 0x00 21. " 66MHZ_CAP , 66MHz Capable, Harsdwired to 0 for PCIExpress" "0,1" rbitfld.long 0x00 20. " CAP_LIST , Capabilities List Hardwired to 1" "0,1" textline " " rbitfld.long 0x00 19. " INTX_STATUS , INTx Status" "0,1" bitfld.long 0x00 10. " INTX_ASSER_DIS , INTx Assertion Disable" "No,Yes" textline " " rbitfld.long 0x00 9. " FAST_BBEN , Bit hardwired to 0 for PCIExpress" "0,1" bitfld.long 0x00 8. " SERR_EN , SERR Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 7. " IDSEL_CTRL , Bit hardwired to 0 for PCIExpress" "0,1" bitfld.long 0x00 6. " PARITYERRRESP , Parity Error Response" "No error,Error" textline " " bitfld.long 0x00 2. " BUSMASTER_EN , Bus Master Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MEM_SPACE_EN , Memory Space Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " IO_SPACE_EN , IO Space Enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "CLASSCODE_REVISIONID, Class code and Revision ID" hexmask.long.byte 0x00 24.--31. 1. " BASE_CLS_CD , Sub Class Code" hexmask.long.byte 0x00 16.--23. 1. " SUBCLS_CD , Sub Class Code" textline " " hexmask.long.byte 0x00 8.--15. 1. " PROG_IF_CODE , Programming Interface Code" hexmask.long.byte 0x00 0.--7. 1. " REVID , Revision ID" group.long 0x0C++0x1B line.long 0x00 "BIST_HEAD_LAT_CACH, BIST Header Type Latency Timer Cache Line Size" hexmask.long.byte 0x00 24.--31. 1. " BIST , BIST" hexmask.long.byte 0x00 16.--23. 1. " HEAD_TYP , Header Type" textline " " hexmask.long.byte 0x00 8.--15. 1. " LAT_TIM , Latency Timer" hexmask.long.byte 0x00 0.--7. 1. " CACH_LN_SZE , Cache Line Size" line.long 0x04 "BAR_ADR_0, Base Address Register 0" hexmask.long 0x04 4.--31. 0x10 " BAR0_BASE_ADDR , BAR0 base address bits" rbitfld.long 0x04 3. " BAR0_PREFETCHABLE , Memory region is prefetchable" "Non-prefetchable,Prefetchable" textline " " rbitfld.long 0x04 1.--2. " BAR0_TYPE , BAR type" "32bit,Reserved,64bit,?..." rbitfld.long 0x04 0. " BAR0_MEM_INDICATOR , Memory indicator" "Memory,I/O" line.long 0x08 "BAR_ADR_1, Base Address Register 1" line.long 0x0C "BUS_NUM_REG, Bus Number Registers" hexmask.long.byte 0x0C 24.--31. 1. " SEC_LAT_TIMER , Secondary Latency Timer" hexmask.long.byte 0x0C 16.--23. 1. " SUBORD_BUS_NUM , Subordinate Bus Number" textline " " hexmask.long.byte 0x0C 8.--15. 1. " SEC_BUS_NUM , Secondary Bus Number" hexmask.long.byte 0x0C 0.--7. 1. " PRIM_BUS_NUM , Primary Bus Number" line.long 0x10 "IOBASE_LIMIT_SEC_STATUS, IO Base Limit and Secondary Status Register" bitfld.long 0x10 31. " DET_PAR_ERR , Detected Parity Error" "No error,Error" bitfld.long 0x10 30. " RCVD_SYS_ERR , Received System Error" "No error,Error" textline " " bitfld.long 0x10 29. " RCVD_MSTR_ABORT , Received System Error" "No error,Error" bitfld.long 0x10 28. " RCVD_TRGT_ABORT , Received Target Error" "No error,Error" textline " " bitfld.long 0x10 27. " SGNLD_TRGT_ABORT , Signaled Target Error" "No error,Error" bitfld.long 0x10 25.--26. " DEVSEL_TIMING , DEVSEL Timing" "0,1,2,3" textline " " bitfld.long 0x10 24. " MSTR_DATA_PRTY_ERR , Mastered Data Parity Error" "No error,Error" bitfld.long 0x10 23. " FAST_B2B_CAP , Fast Back to Back Capable" "Not capable,Capable" textline " " bitfld.long 0x10 21. " 66MHZ_CAPA , 66MHz Capable" "Not capable,Capable" bitfld.long 0x10 16. " MEMDECODE_64_0 , 64-Bit Memory Addressing" "32bit,64bit" textline " " bitfld.long 0x10 12.--15. " IO_SPACE_LIMIT , IO_Space_Limit" "0,1,2,3,4,5,6,7,?..." bitfld.long 0x10 8. " IODECODE_32 , 32 or 16 Bit IO Space" "16bit,32bit" textline " " bitfld.long 0x10 4.--7. " IO_SPACE_BASE , IO_Space_Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0. " IODECODE_32_0 , 32 or 16 Bit IO Space" "16bit,32bit" line.long 0x14 "MEM_BASE_LIMIT, Memory Base and Limit Register" hexmask.long.word 0x14 20.--31. 0x10 " MEM_LIMIT_ADDR , Memory Limit Address" hexmask.long.word 0x14 4.--15. 0x10 " MEM_BASE_ADDR , Memory Base Address" line.long 0x18 "PREF_MEM_BASE_LIMIT, Prefetchable Memory Base and Limit Register" hexmask.long.word 0x18 20.--31. 0x10 " PREF_MEM_ADDR , Upper 12 bits of 32-bit Prefetchable Memory End Address" hexmask.long.word 0x18 4.--15. 0x10 " UPPPREF_MEM_ADDR , Upper 12 bits of 32-bit Prefetchable Memory start Address" group.long 0x28++0x07 line.long 0x00 "UPPER_32BIT_PREF_BASEADDR, Upper 32 Bit Prefetachable Base Address Register" line.long 0x04 "UPPER_32BIT_PREF_LIMITADDR, Upper 32 Bit Prefetachable Limit Address Register" group.long 0x30++0x03 line.long 0x00 "IO_BASE_LIMIT, IO Base and Limit Register" hexmask.long.word 0x00 16.--31. 0x1 " UPP16_IOLIMIT , Upper 16 IO Limit Address" hexmask.long.word 0x00 0.--15. 1. " UPP16_IOBASE , Upper 16 IO Base Address" rgroup.long 0x34++0x03 line.long 0x00 "CAPPTR, CapPtr" hexmask.long.byte 0x00 0.--7. 1. " CAPTR , First Capability Pointer" group.long 0x38++0x07 line.long 0x00 "EXP_ROM_ADDR, Expansion ROM Base Address" hexmask.long.tbyte 0x00 11.--31. 0x800 " ADDR , Expansion ROM Address" bitfld.long 0x00 0. " EXP_ROM_EN , Expansion ROM Enable" "Disabled,Enabled" line.long 0x04 "BRIDGE_INT, Bridge Control and Int Pin and line" hexmask.long.word 0x04 16.--31. 1. " BRIDGE_CONTROL , Bridge Control Register" hexmask.long.byte 0x04 8.--15. 1. " INT_PIN , Interrupt Pin" textline " " hexmask.long.byte 0x04 0.--7. 1. " INT_LIN , Interrupt Line" endif tree.end tree "Power Management Capability Structure" width 13. base ad:0xB1000000+0x40 rgroup.long 0x00++0x03 line.long 0x00 "CFG_PWR_CAP, Power ID" bitfld.long 0x00 27.--31. " PME_SP , PME Support" "Not supported,Supported,?..." bitfld.long 0x00 26. " D2_SP , D2 Support" "Not supported,Supported" textline " " bitfld.long 0x00 25. " D1_SP , D1 Support" "Not supported,Supported" bitfld.long 0x00 22.--24. " AUX_CUR , AUX Current" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 21. " DSI , Device Specific Initialization" "0,1" bitfld.long 0x00 19. " PME_CLK , PME Clock" "0,1" textline " " bitfld.long 0x00 16.--18. " PMC_VER , Power Management specification version" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 8.--15. 1. " PM_NX_PTR , Next Capability Pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CAP_ID , Capability ID" group.long 0x04++0x03 line.long 0x00 "PWR_CSR, PM Control Status" hexmask.long.byte 0x00 24.--31. 1. " DATA1 , Data register for additional information" rbitfld.long 0x00 23. " BP_CCE , Bus Power/Clock Control Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 22. " B2B3_SP , B2/B3 Support" "Not supported,Supported" bitfld.long 0x00 15. " PME_STATUS , PME Status" "0,1" textline " " rbitfld.long 0x00 13.--14. " DATA_SCALE , Data Scale" "0,1,?..." rbitfld.long 0x00 9.--12. " DATA_SEL , Data Select" "0,1,?..." textline " " bitfld.long 0x00 8. " PME_EN , PME Enable" "Disabled,Enabled" rbitfld.long 0x00 3. " NSR , No Soft Reset" "Reset,No reset" textline " " bitfld.long 0x00 0.--1. " PW_STATE , Power State" "0,1,?..." tree.end tree "MSI Capability Structure" width 11. base ad:0xB1000000+0x50 group.long 0x00++0x13 line.long 0x00 "MSG_CTR, MSI cap structure" rbitfld.long 0x00 24. " PVM_EN , MSI Per Vector Masking (PVM) supported" "Not supported,Supported" rbitfld.long 0x00 23. " MSI_64_EN , 64-bit Address Capable" "Not capable,Capable" textline " " bitfld.long 0x00 20.--22. " MME , Multiple Message Enable" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 17.--19. " MMC , Multiple Message Capable" "0,1,2,3,?..." textline " " bitfld.long 0x00 16. " MSI_EN , MSI Enabled" "Disabled,Enabled" hexmask.long.byte 0x00 8.--15. 1. " MSI_NX_PTR , Next Capability Pointer" textline " " hexmask.long.byte 0x00 0.--7. 1. " CAP_ID , MSI Capability ID" line.long 0x04 "MSI_L32, MSI Lower 32-bit address register" hexmask.long 0x04 2.--31. 0x4 " ADDR , Lower 32 Bit Address" line.long 0x08 "MSI_U32, MSI Upper 32-bit address register" line.long 0x0C "MSI_DATA, MSI Data Register" hexmask.long.word 0x0C 0.--15. 1. " MSI_DATA_F , MSI Data" line.long 0x10 "MSI_MASK, MSI Mask Bit Register" rgroup.long 0x14++0x03 line.long 0x00 "MSI_PEND, MSI Pending Bit Register" tree.end tree "PCI Express Capability Structure" width 11. base ad:0xB1000000+0x70 rgroup.long 0x00++0x07 line.long 0x00 "PCIE_CAP, PCIE cap structure" bitfld.long 0x00 25.--29. " IM_NUM , Interrupt Message Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " SLOT , Slot Implemented" "Not implemented,Implemented" textline " " bitfld.long 0x00 20.--23. " DEV_TYPE , Device/Port Type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PCIE_VER , PCI Express Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.byte 0x00 8.--15. 1. " PCIE_NX_PTR , Next Capability Pointer" hexmask.long.byte 0x00 0.--7. 1. " CAP_ID , Capability ID" line.long 0x04 "DEV_CAP, PCIE Device Capabilities" bitfld.long 0x04 28. " FLR_EN , Function Level Reset Capability" "No reset,Reset" bitfld.long 0x04 26.--27. " CAPT_SLOW_PWRLIMIT_SCALE , Captured Slow Power Scale Value" "0,1,2,3" textline " " hexmask.long.byte 0x04 18.--25. 1. " CAPT_SLOW_PWRLIMIT_VALUE , Captured Slow Power Limit Value" bitfld.long 0x04 15. " ROLEBASED_ERRRPT , Role Based Error Reporting" "No error,Error" textline " " bitfld.long 0x04 9.--11. " DEFAULT_EP_L1_ACCPT_LATENCY , Endpoint L1 Acceptable Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--8. " DEFAULT_EP_L0S_ACCPT_LATENCY , Endpoint L0s Acceptable Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 5. " EXTTAGFIELD_SUPPORT , Value derived from DEFAULT_EXT_TAG_FIELD_SUPPORTED" "0,1" bitfld.long 0x04 0.--2. " MAX_PAYLOAD_SIZE , Automatically derived from CX_MAX_MTU" "0,1,2,3,4,5,6,7" group.long 0x08++0x03 line.long 0x00 "DEV_CAS, PCIE Device Control and Status" rbitfld.long 0x00 21. " TRANS_PEND , Transaction Pending" "Not pending,Pending" rbitfld.long 0x00 20. " AUXP_DET , Aux Power Detected" "Not detected,Detected" textline " " bitfld.long 0x00 19. " UR_DET , Unsupported Request Detected" "Not detected,Detected" bitfld.long 0x00 18. " FT_DET , Fatal Error Detected" "Not detected,Detected" textline " " bitfld.long 0x00 17. " NFT_DET , Non-Fatal Error Detected" "Not detected,Detected" bitfld.long 0x00 16. " COR_DET , Correctable Error Detected" "Not detected,Detected" textline " " bitfld.long 0x00 15. " INIT_FLR , Initiate FLR" "Not initiated,Initiated" bitfld.long 0x00 12.--14. " MRRS , Max_Read_Request_Size" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11. " NOSNP_EN , Enable No Snoop" "Disabled,Enabled" bitfld.long 0x00 10. " AUXPM_EN , AUX Power PM Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " PHFUN_EN , Phantom Function Enable" "Disabled,Enabled" bitfld.long 0x00 8. " EXTAG_EN , Extended Tag Field Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--7. " MPS , Max_Payload_Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. " EN_RO , Enable Relaxed Ordering" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " UR_RE , Unsupported Request Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 2. " FT_RE , Fatal Error Reporting Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NFT_RE , Non-Fatal Error Reporting Enable" "Disabled,Enabled" bitfld.long 0x00 0. " COR_RE , Correctable Error Reporting Enable" "Disabled,Enabled" rgroup.long 0x0C++0x03 line.long 0x00 "LNK_CAP, PCIE Link Capabilities" hexmask.long.byte 0x00 24.--31. 1. " PORT_NUM , Port Number" bitfld.long 0x00 21. " LNK_BW_NOT_CAP , Link Bandwidth Notification Capability" "0,1" textline " " bitfld.long 0x00 20. " DLL_ACTRPT_CAP , Data Link Layer Active Reporting Capable" "0,1" bitfld.long 0x00 18. " CLK_PWR_MGMT , Clock Power Management" "0,1" textline " " bitfld.long 0x00 15.--17. " L1_EXIT_LAT , L1 Exit Latency" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " L0S_EXIT_LAT , L0s Exit Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 10.--11. " AS_LINK_PM_SUPPORT , Active State Link PM Support" "0,1,2,3" hexmask.long.byte 0x00 4.--9. 1. " MAX_LINK_WIDTH , Max Link Width" textline " " bitfld.long 0x00 0.--3. " MAX_LINK_SPEEDS , Supported Max Link Speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x10++0x03 line.long 0x00 "LNK_CAS, PCIE Link Control and Status" rbitfld.long 0x00 31. " LAB_STATUS , Link Autonomous Bandwidth Status" "0,1" rbitfld.long 0x00 30. " LBW_STATUS , Link Bandwidth Management Status" "0,1" textline " " rbitfld.long 0x00 29. " DLL_ACT , Data Link Layer Active" "Not avtive,Active" rbitfld.long 0x00 28. " SLOT_CLK_CONFIG , SLOT_CLK_CONFIGined" "No,Yes" textline " " rbitfld.long 0x00 27. " LINK_TRAIN , LINK_TRAINined" "No,Yes" rbitfld.long 0x00 20.--25. " NEG_LW , Negotiated Link Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " rbitfld.long 0x00 16.--19. " LINK_SPEED , Link Speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 11. " LABIE , Link Autonomous Bandwidth Interrupt Enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 10. " LBMIE , Link Bandwidth Management Interrupt Enable" "Disabled,Enabled" rbitfld.long 0x00 9. " HAWD , Hardware Autonomous Width Disable" "No,Yes" textline " " bitfld.long 0x00 8. " EN_CPM , Enable Clock Power Management" "Disabled,Enabled" bitfld.long 0x00 7. " EXT_SYN , Extended Synch" "0,1" textline " " bitfld.long 0x00 6. " COM_CLK_CFG , Common Clock Configuration" "0,1" rbitfld.long 0x00 5. " RETRAIN_LINK , Retrain Link" "0,1" textline " " rbitfld.long 0x00 4. " LINK_DIS , Link Disable" "No,Yes" bitfld.long 0x00 3. " RCB , Read Completion Boundary" "0,1" textline " " bitfld.long 0x00 0.--1. " ASPM_CTRL , Active State Link PM Control" "0,1,2,3" rgroup.long 0x24++0x03 line.long 0x00 "DEV_CAP_2, Device Capabilities 2 Register" bitfld.long 0x00 4. " CPL_TIMEOUT_DIS_SUPPORTED , Completion Timeout Disable Supported" "Not supported,Supported" bitfld.long 0x00 0.--3. " CPL_TIMEOUT_RNG_SUPPORTED , Completion Timeout Ranges Supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x28++0x03 line.long 0x00 "DEV_CAS_2, Device Control 2 Register" bitfld.long 0x00 4. " CPL_TIMEOUT_DIS , Completion Timeout Disable" "No,Yes" bitfld.long 0x00 0.--3. " CPL_TIMEOUT_VALUE , Completion Timeout Values" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x2C++0x03 line.long 0x00 "LNK_CAP_2, PCIE Link Capabilities 2 Register" bitfld.long 0x00 8. " CROSSLINK_SP , Crosslink Supported" "Not supported,Supported" hexmask.long.byte 0x00 1.--7. 1. " SP_LS_VEC , Supported Link Speeds Vector" group.long 0x30++0x03 line.long 0x00 "LNK_CAS_2, Link Control and Status 2 Register" bitfld.long 0x00 21. " LINK_EQ_REQ , Link Equilization Request" "Not requested,Requested" rbitfld.long 0x00 20. " EQ_PH3 , Equalization Ph3 Success" "No success,Success" textline " " rbitfld.long 0x00 19. " EQ_PH2 , Equalization Ph2 Success" "No success,Success" rbitfld.long 0x00 18. " EQ_PH1 , Equalization Ph1 Success" "No success,Success" textline " " rbitfld.long 0x00 17. " EQ_COMPLETE , Equalization Complete" "Not completed,Completed" rbitfld.long 0x00 16. " DEEMPH_LEVEL , Current De-emphasis Level" "0,1" textline " " bitfld.long 0x00 12.--15. " COMPL_PRST_DEEPH , Compliance Pre-set/ De-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. " COMPL_SOS , Compliance SOS" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ENT_MOD_COMPL , Enter Modified Compliance" "0,1" bitfld.long 0x00 7.--9. " TX_MARGIN , Transmit Margin" "0,1,2,3,4,5,6,7" textline " " rbitfld.long 0x00 6. " SEL_DEEMP , Selectable De-emphasize" "0,1" rbitfld.long 0x00 5. " HW_AUTO_SP_DIS , Hardware Autonomous Speed Disable" "No,Yes" textline " " bitfld.long 0x00 4. " ENTR_COMPL , Enter Compliance" "0,1" bitfld.long 0x00 0.--3. " TRGT_LINK_SPEED , Target Link Speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "VPD Capability Structure" width 10. base ad:0xB1000000+0xD0 group.long 0x00++0x07 line.long 0x00 "VPD_CAP, VPD Control and Capability Register" bitfld.long 0x00 31. " VPD_FLAG , VPD Flag" "0,1" hexmask.long.word 0x00 16.--30. 1. " VPD_ADDR , VPD Address" textline " " hexmask.long.word 0x00 8.--15. 1. " NXTCAP_PTR , Next Capability Pointer" hexmask.long.word 0x00 0.--7. 1. " VPD_CAPID , VPD Capability ID" line.long 0x04 "VPD_DATA, VPD Data Register" tree.end tree "Advanced Error reporting Capability Structure" width 14. base ad:0xB1000000+0x100 rgroup.long 0x00++0x03 line.long 0x00 "PCIE_EN_CAP, PCIE Express enhanced Cap Header" hexmask.long.word 0x00 20.--31. 1. " NXT_CAPABILITY_OFFSET , Next Capability Offset" bitfld.long 0x00 16.--19. " CAPABILITY_VER , Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--15. 1. " PCIE_EXTD_CAPID , PCI Express Extended Capability ID" group.long 0x04++0x17 line.long 0x00 "UN_ERR_ST_R, Uncorrectable Error Status Register" bitfld.long 0x00 20. " UNS_REQ_ERR_STATUS , Unsupported Req Err Status" "No error,Error" bitfld.long 0x00 19. " ECRC_ERR_STATUS , ECRC_Err_Status" "No error,Error" textline " " bitfld.long 0x00 18. " MALFORMED_TLP_STATUS , Malformed TLP Status" "No error,Error" bitfld.long 0x00 17. " RCVR_OVERFLOW_STATUS , Receiver Overflow Status" "No error,Error" textline " " bitfld.long 0x00 16. " UNX_CPL_STATUS , Unexpected Completion Status" "No error,Error" bitfld.long 0x00 15. " CPL_ABORT_STATUS , Cpl_Abort_Status" "No error,Error" textline " " bitfld.long 0x00 14. " CPL_TIMEOUT_STATUS , Cpl_Timeout_Status" "No error,Error" bitfld.long 0x00 13. " FC_PROT_ERR_STATUS , Flow Control Protocol Error Status" "No error,Error" textline " " bitfld.long 0x00 12. " POISONEDTLP_STATUS , Poisoned TLP Status" "No error,Error" bitfld.long 0x00 4. " DATALINKPRO_ERR_STATUS , DataLink Protocol Error Status" "No error,Error" line.long 0x04 "UN_ERR_MS_R, Uncorrectable Error Mask Register" bitfld.long 0x04 20. " UNS_REQ_ERR_MASK , Unsupported Req Err Mask" "Not masked,Masked" bitfld.long 0x04 19. " ECRC_ERR_MASK , ECRC_Err_Mask" "Not masked,Masked" textline " " bitfld.long 0x04 18. " MALFORMED_TLP_MASK , Malformed TLP Mask" "Not masked,Masked" bitfld.long 0x04 17. " RCVR_OVERFLOW_MASK , Receiver Overflow Mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " UNX_CPL_MASK , Unexpected Completion Mask" "Not masked,Masked" bitfld.long 0x04 15. " CPL_ABORT_MASK , Cpl_Abort_Mask" "Not masked,Masked" textline " " bitfld.long 0x04 14. " CPL_TIMEOUT_MASK , Cpl_Timeout_Mask" "Not masked,Masked" bitfld.long 0x04 13. " FC_PROT_ERR_MASK , Flow Control Protocol Error Mask" "Not masked,Masked" textline " " bitfld.long 0x04 12. " POISONEDTLP_MASK , Poisoned TLP Mask" "Not masked,Masked" bitfld.long 0x04 4. " DATALINKPRO_ERR_MASK , DataLink Protocol Error Mask" "Not masked,Masked" line.long 0x08 "UN_ERR_SV_R, Uncorrectable Error Severity Register" sif (cpuis("SPEAR1310*")) bitfld.long 0x08 24. " AO_EB_ERR_SVT , AtomicOp Egress Blocked Severity" "Not masked,Masked" else bitfld.long 0x08 21. " AO_EB_ERR_SVT , AtomicOp Egress Blocked Severity" "Not masked,Masked" endif textline " " bitfld.long 0x08 20. " UNS_REQ_ERR_SVT , Unsupported Req Err Svt" "Not masked,Masked" bitfld.long 0x08 19. " ECRC_ERR_SVT , ECRC_Err_Svt" "Not masked,Masked" textline " " bitfld.long 0x08 18. " MALFORMED_TLP_SVT , Malformed TLP Severity" "Not masked,Masked" bitfld.long 0x08 17. " RCVR_OVERFLOW_SVT , Receiver Overflow Severity" "Not masked,Masked" textline " " bitfld.long 0x08 16. " UNX_CPL_SVT , Unexpected Completion Severity" "Not masked,Masked" bitfld.long 0x08 15. " CPL_ABORT_SVT , Cpl_Abort_Svt" "Not masked,Masked" textline " " bitfld.long 0x08 14. " CPL_TIMEOUT_SVT , Cpl_Timeout_Svt" "Not masked,Masked" bitfld.long 0x08 13. " FC_PROT_ERR_SVT , Flow Control Protocol Error Severity" "Not masked,Masked" textline " " bitfld.long 0x08 12. " POISONEDTLP_SVT , Poisoned TLP Severity" "Not masked,Masked" bitfld.long 0x08 4. " DATALINKPRO_ERR_SVT , DataLink Protocol Error Severity" "Not masked,Masked" line.long 0x0C "CO_ERR_ST_R, Correctable Error Status Register" bitfld.long 0x0C 13. " ADV_NONFAT_ERR_STATUS , Advisory Non Fatal Error Status" "No error,Error" bitfld.long 0x0C 12. " REPLAYTIMER_TIMEOUTSTATUS , Replay Timer Timeout Status" "No timeout,Timeout" textline " " bitfld.long 0x0C 8. " REPLAY_NUM_ROLLOVER_STATUS , REPLAY_NUM_ROLLOVER_Status" "No rollover,Rollover" bitfld.long 0x0C 7. " BAD_DLLP_STATUS , Bad DLLP Status" "No bad DLLP,Bad DLLP" textline " " bitfld.long 0x0C 6. " BAD_TLP_STATUS , Bad TLP Status" "No bad TLP,Bad TLP" bitfld.long 0x0C 0. " RCVR_ERR_STATUS , Receiver Error Status" "No error,Error" line.long 0x10 "CO_ERR_MS_R, Correctable Error Mask Register" bitfld.long 0x10 13. " ADV_NONFAT_ERR_MASK , Advisory Non Fatal Error Mask" "0,1" bitfld.long 0x10 12. " REPLAYTIMER_TIMEOUTMASK , Replay Timer Timeout Mask" "0,1" textline " " bitfld.long 0x10 8. " REPLAY_NUM_ROLLOVER_MASK , REPLAY_NUM_ROLLOVER_Mask" "0,1" bitfld.long 0x10 7. " BAD_DLLP_MASK , Bad DLLP Mask" "0,1" textline " " bitfld.long 0x10 6. " BAD_TLP_MASK , Bad TLP Mask" "0,1" bitfld.long 0x10 0. " RCVR_ERR_MASK , Receiver Error Mask" "0,1" line.long 0x14 "ADERR_CAP_CR, Advanced Error Capabilities and Control Register" bitfld.long 0x14 8. " ECRC_CHK_EN , ECRC Check Enable" "Disabled,Enabled" rbitfld.long 0x14 7. " ECRC_CHK_CAP , ECRC Check Capability" "Not capable,Capable" textline " " bitfld.long 0x14 6. " ECRC_GEN_EN , ECRC Generation Enable" "Disabled,Enabled" bitfld.long 0x14 5. " ECRC_GEN_CAP , ECRC Generation Capability" "Disabled,Enabled" textline " " rbitfld.long 0x14 0.--4. " FIRST_ERR_PTR , First Error Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." rgroup.long 0x1C++0x0F line.long 0x00 "HD_L_R0, Header Log Registers 0" line.long 0x04 "HD_L_R1, Header Log Registers 1" line.long 0x08 "HD_L_R2, Header Log Registers 2" line.long 0x0C "HD_L_R3, Header Log Registers 3" tree.end tree "Virtual Channel Capability Structure" width 21. base ad:0xB1000000+0x140 rgroup.long 0x00++0x0B line.long 0x00 "VC_EXT_CAP_HDR, PCIE Express VC enhanced Cap Header" hexmask.long.word 0x00 20.--31. 1. " NXT_CAPABILITY_OFFSET , Next Capability Offset" bitfld.long 0x00 16.--19. " CAPABILITY_VER , Capability Version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--15. 1. " PCIE_EXTD_CAPID , PCI Express Extended Capability ID" line.long 0x04 "PORT_VC_CAP_REG1, Port VC Capability Register 1" bitfld.long 0x04 10.--11. " PORT_ARB_TAB_ENTRY_SIZE , Port Arbitration Table Entry Size" "0,1,2,3" bitfld.long 0x04 8.--9. " REFCLK , Reference Clock" "0,1,2,3" textline " " bitfld.long 0x04 4.--6. " LOW_PRI_EXT_VC_CNT , Low Priority Extended VC Count" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " EXT_VC_CNT , Extended VC Count" "0,1,2,3,4,5,6,7" line.long 0x08 "PORT_VC_CAP_REG2, Port Capability Register 2" hexmask.long.byte 0x08 24.--31. 1. " VC_ARB_TAB_OFFSET , VC Arbitration Table Offset" hexmask.long.byte 0x08 0.--7. 1. " VC_ARB_CAP , VC Arbitration Capability" group.long 0x0C++0x03 line.long 0x00 "PORT_VC_STS_CTRL, Port VC status and control" rbitfld.long 0x00 16. " PVC_STS , Arbitration Table Status" "0,1" bitfld.long 0x00 1.--3. " PVC_CTRL_ARB_SEL , VC Arbitration Select" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 0. " PVC_CTRL_ARB_TAB , Load VC Arbitration Table" "No load,Load" rgroup.long 0x10++0x03 line.long 0x00 "VC_RESOURCE_CAP_REG, VC Resource Capability Register" hexmask.long.byte 0x00 24.--31. 1. " PORT_ARB_TAB_OFF , Port Arbitration Table Offset" hexmask.long.byte 0x00 16.--22. 1. " MAX_TIME_SLOTS , Maximum Time Slots" textline " " bitfld.long 0x00 15. " REJ_SNP_TRANS , Reject Snoop Transactions" "Not rejected,Rejected" hexmask.long.byte 0x00 0.--7. 1. " PORT_ARB_CAP , Port Arbitration Capability" group.long 0x14++0x03 line.long 0x00 "VC_RES_CTL_REG, VC Resource Control Register" bitfld.long 0x00 31. " VC_CTL_R_EN , VC Enable" "Disabled,Enabled" bitfld.long 0x00 24.--26. " VC_CTL_R_ID , VC ID" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 17.--19. " VC_CTL_R_ARB_SEL , Port Arbitration Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. " VC_CTL_R_ARB_TAB , Load Port Arbitration Table" "Not loaded,Loaded" textline " " hexmask.long.byte 0x00 0.--7. 1. " VC_CTL_R_TC_VC_MAP , TC/VC Map" rgroup.long 0x18++0x0F line.long 0x00 "VC_STS_RSV, VC Resource status and RsvdP" bitfld.long 0x00 17. " VC_STS_NEG_P , VC Negotiation Pending" "Not pending,Pending" bitfld.long 0x00 16. " VC_STS_TAB_STA , Port Arbitration Table Status" "0,1" line.long 0x04 "VCR_CAP_R1, VC Resource Capability Register 1" line.long 0x08 "VCR_CTRL_R1, VC Resource Control Register 1" line.long 0x0C "VCR_STS_R1, VC Resource Status Register 1" hexmask.long.word 0x0C 16.--31. 1. " VC_STS1 , VC Resource Status Register 1" tree.end tree "Port Logic Register Map" width 26. base ad:0xB1000000+0x700 group.long 0x00++0x23 line.long 0x00 "LAT_REL_TIM, Ack Latency and Replay Timer Register" hexmask.long.word 0x00 16.--31. 1. " REPLAY_TIME_LIMIT , Replay_Time_Limit" hexmask.long.word 0x00 0.--15. 1. " LATENCY_TIME_LIMIT , Latency_Time_Limit" line.long 0x04 "VENDOR_SPECIFIC_DLLP, Vendor Specific DLLP Register" line.long 0x08 "PT_LNK_R, Port Force Link Register" hexmask.long.byte 0x08 24.--31. 1. " LOW_POWER_ENTR_CNT , Low power entry counter" sif (cpuis("SPEAR1310*")) hexmask.long.byte 0x08 16.--21. 1. " LINK_STATE , Link state" textline " " else hexmask.long.byte 0x08 16.--23. 1. " LINK_STATE , Link state" textline " " endif eventfld.long 0x08 15. " FORCE_LINK , Forces the Link to the state specified by the Link State field" "Not forced,Forced" hexmask.long.byte 0x08 0.--7. 1. " LINK_NUM , Link Number" line.long 0x0C "ACK_FREQ_ASPM, Ack Frequency and L0-L1 ASPM Control Register" bitfld.long 0x0C 30. " L1_ENTR_WO_L0S , Enter ASPM L1 without receive in L0s" "Not entered,Entered" bitfld.long 0x0C 27.--29. " L1_ENTR_LAT , L1 Entrance Latency" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x0C 24.--26. " L1_ENTR_LAT , L0s Entrance Latency" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 16.--23. 1. " COMMOM_CLK_N_FTS , N_FTS when common clock is used" textline " " hexmask.long.byte 0x0C 8.--15. 1. " N_FTS , Number of Fast Training Sequence" hexmask.long.byte 0x0C 0.--7. 1. " ACK_FREQ , Ack Frequency" line.long 0x10 "PT_LNK_CTRL_R, Port Link Control Register" rbitfld.long 0x10 23. " CROSSLINK_ACT , Crosslink Active" "Not active,Active" bitfld.long 0x10 22. " CROSSLINK_EN , Crosslink Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 21. " LINK_MODE[21] , Link Mode Enable" "Disabled,Enabled" bitfld.long 0x10 20. " LINK_MODE[20] , Link Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " LINK_MODE[19] , Link Mode Enable" "Disabled,Enabled" bitfld.long 0x10 18. " LINK_MODE[18] , Link Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " LINK_MODE[17] , Link Mode Enable" "Disabled,Enabled" bitfld.long 0x10 16. " LINK_MODE[16] , Link Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " FAST_LINK , Fast Link Mode" "Disabled,Enabled" bitfld.long 0x10 5. " DL_EN , DLL Link Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " RESET_ASSERT , Reset Assert" "No reset,Reset" bitfld.long 0x10 2. " LB_EN , Loopback Enable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " SCRAMBLE_DIS , Scramble Disable" "No,Yes" bitfld.long 0x10 0. " VEN_DLLP_REQ , Vendor Specific DLLP Request" "Not requested,Requested" line.long 0x14 "LN_SKW_R, Lane Skew Register" bitfld.long 0x14 31. " DIS_L2L_SKEW , Disable Lane-to-Lane Deskew" "No,Yes" bitfld.long 0x14 25. " ACKNAK_DIS , Ack/Nak Disable" "No,Yes" textline " " bitfld.long 0x14 24. " FC_DIS , Flow Control Disable" "No,Yes" hexmask.long.tbyte 0x14 0.--23. 1. " LANE_SKEW , Insert Lane Skew for Transmit" line.long 0x18 "SYMB_N_R, Symbol Number Register" bitfld.long 0x18 24.--28. " FCTIM_INC , Timer Modifier for Flow Control Watchdog Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x18 19.--23. " LATENCY_INC , Timer Modifier for Ack/Nak Latency Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x18 14.--18. " REPLAY_ADJ , Timer Modifier for Replay Timer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." hexmask.long.byte 0x18 0.--7. 1. " MAX_FUNC , Maximum function value" line.long 0x1C "SYMB_T_R, Symbol Timer and Filter Mask Register 1" bitfld.long 0x1C 31. " CX_FLT_MASK_RC_CFG_DISCARD , Mask filtering of received Configuration Requests" "Not masked,Masked" bitfld.long 0x1C 30. " CX_FLT_MASK_RC_IO_DISCARD , Mask filtering of received I/O Requests" "Not masked,Masked" textline " " bitfld.long 0x1C 29. " CX_FLT_MASK_MSG_DROP , Mask Drop message" "Not masked,Masked" bitfld.long 0x1C 28. " CX_FLT_MASK_CPL_ECRC_DISCARD , Mask ECRC error filtering for Completions" "Not masked,Masked" textline " " bitfld.long 0x1C 27. " CX_FLT_MASK_ECRC_DISCARD , Mask ECRC error filtering" "Not masked,Masked" bitfld.long 0x1C 26. " CX_FLT_MASK_CPL_LEN_MATCH , Mask Length mismatch error for received Completions" "Not masked,Masked" textline " " bitfld.long 0x1C 25. " CX_FLT_MASK_CPL_ATTR_MATCH , Mask Attributes mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x1C 24. " CX_FLT_MASK_CPL_TC_MATCH , Mask Traffic Class mismatch error for received Completions" "Not masked,Masked" textline " " bitfld.long 0x1C 23. " CX_FLT_MASK_CPL_FUNC_MATCH , Mask function mismatch error for received Completions" "Not masked,Masked" bitfld.long 0x1C 22. " CX_FLT_MASK_CPL_REQID_MATCH , Mask Requester ID mismatch error for received Completions" "Not masked,Masked" textline " " bitfld.long 0x1C 21. " CX_FLT_MASK_CPL_TAGERR_MATCH , Mask Tag error rules for received Completions" "Not masked,Masked" bitfld.long 0x1C 20. " CX_FLT_MASK_LOCKED_RD_AS_UR , Mask Locked Request filtering" "Not masked,Masked" textline " " bitfld.long 0x1C 19. " CX_FLT_MASK_CFG_TYPE1_RE_AS_UR , Mask Type 1 Configuration Request filtering" "Not masked,Masked" bitfld.long 0x1C 18. " CX_FLT_MASK_UR_OUTSIDE_BAR , Mask BAR match filtering" "Not masked,Masked" textline " " bitfld.long 0x1C 17. " CX_FLT_MASK_UR_POIS , Mask poisoned TLP filtering" "Not masked,Masked" bitfld.long 0x1C 16. " CX_FLT_MASK_UR_FUNC_MISMATCH , Mask function mismatch filtering for incoming Requests" "Not masked,Masked" textline " " bitfld.long 0x1C 15. " DIS_FC_TIM , Disable FC Watchdog Timer" "No,Yes" hexmask.long.word 0x1C 0.--10. 1. " SKP_INT , SKP Interval Value" line.long 0x20 "FL_MSK_R2, Filter Mask Register 2" bitfld.long 0x20 3. " CX_FLT_MASK_HANDLE_FLUSH , Core Filter request enable" "Disabled,Enabled" bitfld.long 0x20 2. " CX_FLT_MASK_DABORT_4UCPL , DLLP abort disable" "No,Yes" textline " " bitfld.long 0x20 1. " CX_FLT_MASK_VENMSG1_DROP , Vendor MSG Type 1 drop" "Dropped,Not dropped" bitfld.long 0x20 0. " CX_FLT_MASK_VENMSG0_DROP , Vendor MSG Type 0 drop" "Dropped,Not dropped" rgroup.long 0x28++0x17 line.long 0x00 "DB_R0, Debug Register 0" line.long 0x04 "DB_R1, Debug Register 1" line.long 0x08 "TR_P_STS_R, Transmit Posted FC Credit Status Register" hexmask.long.byte 0x08 12.--19. 1. " PH_CRDT , Transmit Posted Header FC Credits" hexmask.long.word 0x08 0.--11. 1. " PD_CRDT , Transmit Posted Data FC Credits" line.long 0x0C "TR_NP_STS_R, Transmit Non-Posted FC Credit Status Register" hexmask.long.byte 0x0C 12.--19. 1. " NPH_CRDT , Transmit Non-Posted Header FC Credits" hexmask.long.word 0x0C 0.--11. 1. " NPD_CRDT , Transmit Non-Posted Data FC Credits" line.long 0x10 "TR_C_STS_R, Transmit Completion FC Credit Status Register" hexmask.long.byte 0x10 12.--19. 1. " CPLH_CRDT , Transmit Completion Header FC Credits" hexmask.long.word 0x10 0.--11. 1. " CPLD_CRDT , Transmit Completion Data FC Credits" line.long 0x14 "Q_STS_R, Queue Status Register" bitfld.long 0x14 2. " RCVQ_NOT_EMPTY , Received Queue Not Empty" "Empty,Not empty" bitfld.long 0x14 1. " RTYB_NOT_EMPTY , Transmit Retry Buffer Not Empty" "Empty,Not empty" textline " " bitfld.long 0x14 0. " CRDT_NOT_RTRN , Received TLP FC Credits Not Returned" "Returned,Not returned" group.long 0x40++0x0B line.long 0x00 "VC_TR_A_R1, VC Transmit Arbitration Register 1" hexmask.long.byte 0x00 24.--31. 1. " WRR_VC3 , WRR Weight for VC3" hexmask.long.byte 0x00 16.--23. 1. " WRR_VC2 , WRR Weight for VC2" textline " " hexmask.long.byte 0x00 8.--15. 1. " WRR_VC1 , WRR Weight for VC1" hexmask.long.byte 0x00 0.--7. 1. " WRR_VC0 , WRR Weight for VC0" line.long 0x04 "VC_TR_A_R2, VC Transmit Arbitration Register 2" hexmask.long.byte 0x04 24.--31. 1. " WRR_VC7 , WRR Weight for VC7" hexmask.long.byte 0x04 16.--23. 1. " WRR_VC6 , WRR Weight for VC6" textline " " hexmask.long.byte 0x04 8.--15. 1. " WRR_VC5 , WRR Weight for VC5" hexmask.long.byte 0x04 0.--7. 1. " WRR_VC4 , WRR Weight for VC4" line.long 0x08 "VC0_PR_Q_C, VC0 Posted Receive Queue Control" bitfld.long 0x08 31. " CFG_RADM_STRICT_VC_PRIOR , VC Ordering for Receive Queues" "0,1" bitfld.long 0x08 30. " CFG_RADM_ORDER_RULE , TLP Type Ordering for VC0" "0,1" textline " " bitfld.long 0x08 21.--23. " CFG_RADM_PQ_MODE , VC0 Posted TLP Queue Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x08 12.--19. 1. " CFG_FC_CREDIT_PH , VC0 Posted Header Credits" textline " " hexmask.long.word 0x08 0.--11. 1. " CFG_FC_CREDIT_PD , VC0 Posted Data Credits" group.long 0x4C++0x03 line.long 0x00 "VC0_NPR_Q_C, VC0 Non-Posted Receive Queue Control" bitfld.long 0x00 21.--23. " CFG_RADM_NPQ_MODE , VC0 Non-Posted TLP Queue Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 12.--19. 1. " CFG_FC_CREDIT_NPH , VC0 Non-Posted Header Credits" textline " " hexmask.long.word 0x00 0.--11. 1. " CFG_FC_CREDIT_NPD , VC0 Non-Posted Data Credits" group.long 0x58++0x03 line.long 0x00 "VC1_NPR_Q_C, VC1 Non-Posted Receive Queue Control" bitfld.long 0x00 21.--23. " CFG_RADM_NPQ_MODE , VC1 Non-Posted TLP Queue Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 12.--19. 1. " CFG_FC_CREDIT_NPH , VC1 Non-Posted Header Credits" textline " " hexmask.long.word 0x00 0.--11. 1. " CFG_FC_CREDIT_NPD , VC1 Non-Posted Data Credits" group.long 0x50++0x03 line.long 0x00 "VC0_CR_Q_C, VC0 Completion Receive Queue Control" bitfld.long 0x00 21.--23. " CFG_RADM_CPLQ_MODE , VC0 Completion TLP Queue Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 12.--19. 1. " CFG_FC_CREDIT_CPLH , VC0 Completion Header Credits" textline " " hexmask.long.word 0x00 0.--11. 1. " CFG_FC_CREDIT_CPLD , VC0 Completion Data Credits" group.long 0x5C++0x03 line.long 0x00 "VC1_CR_Q_C, VC1 Completion Receive Queue Control" bitfld.long 0x00 21.--23. " CFG_RADM_CPLQ_MODE , VC1 Completion TLP Queue Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 12.--19. 1. " CFG_FC_CREDIT_CPLH , VC1 Completion Header Credits" textline " " hexmask.long.word 0x00 0.--11. 1. " CFG_FC_CREDIT_CPLD , VC1 Completion Data Credits" group.long 0x54++0x03 line.long 0x00 "VC1_PR_Q_C, VC1 Posted Receive Queue Control" bitfld.long 0x00 30. " CFG_RADM_ORDER_RULE , TLP Type Ordering for VC1" "0,1" bitfld.long 0x00 21.--23. " CFG_RADM_PQ_MODE , VC1 Posted TLP Queue Mode" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x00 12.--19. 1. " CFG_FC_CREDIT_PH , VC1 Posted Header Credits" hexmask.long.word 0x00 0.--11. 1. " CFG_FC_CREDIT_PD , VC1 Posted Data Credits" group.long 0xA8++0x03 line.long 0x00 "VC0_PB_D, VC0 Posted Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_PHQ_DEPTHS , VC0 Posted Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_PDQ_DEPTHS , VC0 Posted Data Queue Depth" group.long 0xB4++0x03 line.long 0x00 "VC1_PB_D, VC1 Posted Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_PHQ_DEPTHS , VC1 Posted Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_PDQ_DEPTHS , VC1 Posted Data Queue Depth" group.long 0xAC++0x03 line.long 0x00 "VC0_NPB_D, VC0 Non-Posted Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_NPHQ_DEPTHS , VC0 Non-Posted Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_NPDQ_DEPTHS , VC0 Non-Posted Data Queue Depth" group.long 0xB8++0x03 line.long 0x00 "VC1_NPB_D, VC1 Non-Posted Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_NPHQ_DEPTHS , VC1 Non-Posted Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_NPDQ_DEPTHS , VC1 Non-Posted Data Queue Depth" group.long 0xB0++0x03 line.long 0x00 "VC0_CB_D, VC0 Completion Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_CPLHQ_DEPTHS , VC0 Completion Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_CPLDQ_DEPTHS , VC0 Completion Data Queue Depth" group.long 0xBC++0x03 line.long 0x00 "VC1_CB_D, VC1 Completion Buffer Depth" hexmask.long.word 0x00 16.--25. 1. " CFG_CPLHQ_DEPTHS , VC1 Completion Header Queue Depth" hexmask.long.word 0x00 0.--13. 1. " CFG_CPLDQ_DEPTHS , VC1 Completion Data Queue Depth" group.long 0x10C++0x03 line.long 0x00 "GEN2, Gen2 Related" bitfld.long 0x00 20. " CFG_UP_SEL_DEEMPH , Used to set the de-emphasis level for Upstream Ports" "0,1" bitfld.long 0x00 19. " CFG_TX_COMPLIANCE_RCV , Config Tx Compliance Receive Bit" "0,1" textline " " bitfld.long 0x00 18. " CFG_PHY_TXSWING , Config PHY Tx Swing" "0,1" bitfld.long 0x00 17. " CFG_DIRECTED_SPEED_CHANGE , Directed Speed Change" "0,1" textline " " hexmask.long.byte 0x00 8.--16. 1. " CFG_LANE_EN , Predetermined Number of Lanes" hexmask.long.byte 0x00 0.--7. 1. " CFG_GEN2_N_FTS , Number of Fast Training Sequences" rgroup.long 0x110++0x07 line.long 0x00 "PHY_STS_R, PHY Status Register" line.long 0x04 "PHY_CTRL_R, PHY Control Register" group.long 0x118++0x2B line.long 0x00 "AXI_MSTR_RESP_COMP_CTRL0, AXI Master Response Composer Control Register 0" hexmask.long.byte 0x00 8.--15. 1. " CFG_REMOTE_MAX_BRIDGE_TAG , Remote Max Bridge Tag" bitfld.long 0x00 0.--2. " CFG_REMOTE_RD_REQ_BRIDGE_SIZE , Remote Max Bridge Tag" "0,1,2,3,4,5,6,7" line.long 0x04 "AXI_MSTR_RESP_COMP_CTRL1, AXI Master Response Composer Control Register 1" bitfld.long 0x04 0. " CFG_BRIDGE_SB_INIT , Resize Master Response Composer" "No resize,Resized" line.long 0x08 "IATU_VIEWPORT_R, iATU Viewport Register" bitfld.long 0x08 31. " ATU_REG_N_IS_IN , Region Direction" "0,1" bitfld.long 0x08 0.--3. " ATU_REG_N , Region Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "OBNP_SUBREQ_CTRL, AMBA Multiple Outbound Decomposed NP Sub-Requests Control Register" bitfld.long 0x0C 0. " EN_OBNP_SUBREQ , Enable AMBA Multiple Outbound Decomposed NP Sub-Requests" "Disabled,Enabled" line.long 0x10 "IATU_CTRL1_R, iATU Region Control 1 Register" bitfld.long 0x10 20.--22. " ATU_REG_FUNC_NUM , Function Number" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9.--10. " ATU_REG_ATTR , ATTR" "0,1,2,3" textline " " bitfld.long 0x10 8. " ATU_REG_TD , TD" "0,1" bitfld.long 0x10 5.--7. " ATU_REG_TC , TC" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x10 0.--4. " ATU_REG_TYPE , TYPE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "IATU_CTRL2_R, iATU Region Control 2 Register" bitfld.long 0x14 31. " ATU_REG_EN , Region Enable" "Disabled,Enabled" bitfld.long 0x14 30. " ATU_REG_BAR_MATC , Match Mode" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " ATU_REG_INVERT , Invert Mode" "Disabled,Enabled" bitfld.long 0x14 28. " ATU_REG_SHIFT , CFG Shift Mode" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " ATU_REG_FUZZY , Fuzzy Type Match Mode" "Disabled,Enabled" bitfld.long 0x14 24.--25. " ATU_REG_RSP_CODE , Response Code" "0,1,2,3" textline " " bitfld.long 0x14 21. " ATU_REG_MSGCODE_MATCH_EN , Message Code Match Enable" "Disabled,Enabled" bitfld.long 0x14 19. " ATU_REG_FUNC_MATCH_EN , Function Number Match Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " ATU_REG_ATTR_MATCH_EN , ATTR Match Enable" "Disabled,Enabled" bitfld.long 0x14 15. " ATU_REG_TD_MATCH_EN , TD Match Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 14. " ATU_REG_TC_MATCH_EN , TC Match Enable" "Disabled,Enabled" bitfld.long 0x14 8.--10. " ATU_REG_BAR_NUM , BAR Number" "0,1,2,3,4,5,6,7" textline " " hexmask.long.byte 0x14 0.--7. 1. " ATU_REG_MSG_CODE , Message Code" line.long 0x18 "IATU_LBA_R, iATU Region Lower Base Address Register" hexmask.long.word 0x18 16.--31. 1. " ATU_REG_LWR_BASE_PART1 , iATU Lower Base Address to be translated" hexmask.long.word 0x18 0.--15. 1. " ATU_REG_LWR_BASE_PART2 , iATU Lower Base Address to be translated and hard wired to all 0" line.long 0x1C "IATU_UBA_R, iATU Region Upper Base Address Register" line.long 0x20 "IATU_LA_R, iATU Region Limited Address Register" hexmask.long.word 0x20 16.--31. 1. " ATU_REG_LIMIT_PART1 , iATU Limited Address to be translated" hexmask.long.word 0x20 0.--15. 1. " ATU_REG_LIMIT_PART2 , iATU Limited Address to be translated and hard wired to all 1" line.long 0x24 "IATU_LTA_R, iATU Region Lower Target Address Register" hexmask.long.word 0x24 16.--31. 1. " ATU_REG_LWR_TRGT_PART1 , iATU Lower Target Address" hexmask.long.word 0x24 0.--15. 1. " ATU_REG_LWR_TRGT_PART2 , iATU Lower Target Address and hard wired to all 0" line.long 0x28 "IATU_UTA_R, iATU Region Upper Target Address Register" tree.end tree.end tree "PCIe application control registers" base ad:0xB1002000 width 17. group.long 0x00++0x03 line.long 0x00 "CR0_REGISTER, Control Register 0" bitfld.long 0x00 30. " MISCTRL_EN , Enable signal for pcie" "Disabled,Enabled" bitfld.long 0x00 29. " SYS_INT , System INT" "Low,High" textline " " bitfld.long 0x00 25.--28. " DEVICE_TYPE , The device type" "PCI Express Endpoint,Legacy PCI Express Endpoint,Reserved,Reserved,Root Port of PCIE Express Root Complex,?..." bitfld.long 0x00 24. " APP_REQ_RETRY_EN , Provides a capability to defer incoming configuration requests until initialization is complete" "Disabled,Enabled" textline " " bitfld.long 0x00 18.--23. " AXI_S_RESP_ERR_MAP , Slave error response" "No response,Response,?..." bitfld.long 0x00 16.--17. " AXI_M_RESP_ERR_MAP , Master error response" "No response,Response,?..." textline " " bitfld.long 0x00 14. " APP_REQ_EXIT_L1 , Request from the application to exit ASPM state L1,only effective if L1 is enabled" "Disabled,Enabled" bitfld.long 0x00 13. " APP_READY_ENTR_L23 , Indication from the application that it is ready to enter the L23 state" "Not ready,Ready" textline " " bitfld.long 0x00 12. " APP_REQ_ENTR_L1 , Request from the applicaton to enter ASPM state L1" "Not requested,Requested" bitfld.long 0x00 11. " APP_INIT_RST_0 , Request from the application to send a Hot Request" "Not requested,Requested" textline " " bitfld.long 0x00 10. " SYS_EML_INTERLOCK_ENGAGED , Indicates whether the system electromechanical interlock is engaged" "Not engaged,Engaged" bitfld.long 0x00 9. " SYS_CMD_CPLED_INT , Indicates that the hot-plug controller completed a command" "Not completed,Completed" textline " " bitfld.long 0x00 8. " SYS_PRE_DET_CHGED , Indicates that the state of card present detector has changed" "Not changed,Changed" bitfld.long 0x00 7. " SYS_MRL_SENSOR_CHGED , Indicates that the state of MRL sensor has changed" "Not changed,Changed" textline " " bitfld.long 0x00 6. " SYS_PWR_FAULT_DET , Indicates the power controller detected a power fault at this slot" "Not detected,Detected" bitfld.long 0x00 5. " SYS_MRL_SENSOR_STATE , Indicates the state of the manually-operated retention latch(MRL)sensor" "Closed,Open" textline " " bitfld.long 0x00 4. " SYS_ATTEN_BUTTON_PRESSED , Indicates that the system attention button was pressed" "Not pressed,Pressed" bitfld.long 0x00 3. " APP_LTSSM_ENABLE , LTSSM Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " SYS_AUX_PWR_DET , Inticates that auxiliary power(Vaux)is present" "Not present,Present" wgroup.long 0x04++0x03 line.long 0x00 "CR1_REGISTER, Control Register 1" bitfld.long 0x00 5. " APPS_PM_XMT_PME , Wake up" "No effect,Wake up" bitfld.long 0x00 4. " OUTBAND_PWRUP_CMD , Wake up" "No effect,Wake up" textline " " bitfld.long 0x00 2. " APP_INIT_RST_1 , Request from the application to send a Hot Reset" "No request,Request" bitfld.long 0x00 1. " APPS_PM_XMT_TURNOFF , Request from the application to generate a PM turn off message" "No request,Request" textline " " bitfld.long 0x00 0. " APP_UNLOCK_MSG , Request from the application to generate an Unlock message" "No request,Request" rgroup.long 0x08++0x13 line.long 0x00 "CR2_REGISTER, Control Register 2" bitfld.long 0x00 24.--28. " CFG_PCIE_CAP_INT_MSG_NUM , Config PCIE CAP INT MSG NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19.--23. " CFG_AER_INT_MSG_NUM , Config AER INT MSG NUM" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 16.--18. " PM_CURNT_STATE , Indicates the current power state" "Power off,Power on,?..." bitfld.long 0x00 15. " RDLH_LINK_UP , Data Link Layer up/down indicator" "Down,Up" textline " " bitfld.long 0x00 14. " CFG_RCB , The value of the RCB" "0,1" bitfld.long 0x00 11.--13. " CFG_MAX_PAYLOAD_SIZE , The value of the Max_Payload_Size" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 8.--10. " CFG_MAX_RD_REQ_SIZE , The value of the Max_Read_Request_Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. " CFG_MEM_SPACE_EN , The state of the Memory Space Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CFG_BUS_MASTER_EN , The state of the Bus Master Enable" "Disabled,Enabled" bitfld.long 0x00 5. " PM_XTLH_BLOCK_TLP , Indicates that the application must stop generating new outgoing Request TLPs" "Not blocked,Blocked" textline " " bitfld.long 0x00 4. " CFG_PWR_CTRLER_CTRL , Control the system power controller" "Power On,Power Off" bitfld.long 0x00 2.--3. " CFG_ATTEN_IND , Controls the system attention indicator" "Reserved,On,BLink,Off" textline " " bitfld.long 0x00 0.--1. " CFG_PWR_IND , Controls the system attention indicator" "Reserved,On,BLink,Off" line.long 0x04 "CR3_REGISTER, Control Register 3" bitfld.long 0x04 16. " CFG_BW_MGT_INT , Link Bandwidth Management Status register updated" "Not updated,Updated" bitfld.long 0x04 15. " CFG_LINK_AUTO_BW_INT , Link Autonomous Bandwidth Status register updated" "Not updated,Updated" textline " " bitfld.long 0x04 14. " AUX_PM_EN , Auxiliary Power Enable bit in the Device Control register" "Disabled,Enabled" bitfld.long 0x04 13. " PM_PME_EN , PME Enable bit in the PMCSR" "Disabled,Enabled" textline " " bitfld.long 0x04 12. " PM_STATUS , PME Status bit from the PMCSR" "0,1" bitfld.long 0x04 9.--11. " PM_DSTATE , Current power management" "D0,D1,D2,D3,Uninitialized,?..." textline " " bitfld.long 0x04 8. " CFG_EML_CONTROL , Electromechanical Interlock Control" "0,1" bitfld.long 0x04 7. " RTLH_RFC_UPD , Indicates that the core received a Flow Control Update DLLP" "Not received,Received" textline " " bitfld.long 0x04 6. " XMLH_LINK_UP , Data Link Layer up/down indicator" "Down,Up" bitfld.long 0x04 0.--5. " XMLH_LTSSM_STATE , Current state of the LTSSM" "S_DETECT_QUIET,S_DETECT_ACT,S_POLL_ACTIVE,S_POLL_COMPLIANCE,S_POLL_CONFIG,S_PRE_DETECT_QUIET,S_DETECT_WAIT,S_CFG_LINKWD_START,S_CFG_LINKWD_ACEPT,S_CFG_LANENUM_WAIT,S_CFG_LANENUM_ACEPT,S_CFG_COMPLETE,S_CFG_IDLE,S_RCVRY_LOCK,S_RCVRY_SPEED,S_RCVRY_RCVRCFG,S_RCVRY_IDLE,S_L0,S_L0S,S_L123_SEND_EIDLE,S_L1_IDLE,S_L2_IDLE,S_L2_WAKE,S_DISABLED_ENTRY,S_DISABLED_IDLE,S_DISABLED,S_LPBK_ENTRY,S_LPBK_ACTIVE,S_LPBK_EXIT,S_LPBK_EXIT_TIMEOUT,S_HOT_RESET_ENTRY,S_HOT_RESET,?..." line.long 0x08 "CR4_REGISTER, Control Register 4" bitfld.long 0x08 18. " CFG_MSI_EN , MSI is enabled" "Disabled,Enabled" bitfld.long 0x08 17. " VEN_MSI_GRANT , One-cycle pulse accepted to send MSI" "Not accepted,Accepted" textline " " bitfld.long 0x08 16. " VEN_MSG_GRANT , One-cycle pulse accepted to send Message" "Not accepted,Accepted" hexmask.long.word 0x08 0.--15. 1. " RADM_MSG_REQ_ID , Requester ID of vendor-defined Message" line.long 0x0C "CR5_REGISTER, Control Register 5" line.long 0x10 "CR6_REGISTER, Control Register 6" bitfld.long 0x10 29. " CFG_VPD_INT , Indicate a request to application to read or write vital product data" "Not requested,Requested" bitfld.long 0x10 28. " RADM_PM_TURNOFF , Indicate that core has received PME turnoff message" "Not received,Received" textline " " bitfld.long 0x10 27. " LINK_REQ_RST_NOT , Indicates that the core is requesting application to reset the core" "Not requested,Requested" bitfld.long 0x10 26. " MSI_CTRL_INT , MSI Interrupt is pending" "Not pending,Pending" textline " " bitfld.long 0x10 25. " LTSSM_L2_TO_DETECT , LTSSM transitions from L2 to DETECT state" "No transition,Transition" bitfld.long 0x10 22. " RADMX_CMPOSER_LOOKUP_ERR , Slave Response Composer Lookup Error" "No error,Error" textline " " bitfld.long 0x10 21. " GM_CMPOSER_LOOKUP_ERR , Master Response Composer Lookup Error" "No error,Error" bitfld.long 0x10 20. " CFG_BW_MGT_INT , Link Bandwidth Management Status register update" "No link,Link" textline " " bitfld.long 0x10 19. " CFG_LINK_AUTO_BW_INT , Link Autonomous Bandwidth Status register update" "No link,Link" bitfld.long 0x10 18. " HP_MSI , HP MSI" "Disabled,Enabled" textline " " bitfld.long 0x10 17. " HP_INT , HP INT" "Disabled,Enabled" bitfld.long 0x10 16. " HP_PME , HP PME" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " RADM_PM_TO_ACK , Indicate that the core received a PME_TO_Ack Message" "Not received,Received" bitfld.long 0x10 14. " RADM_PM_PME , Indicate that the core received a PM_PME Message" "Not received,Received" textline " " bitfld.long 0x10 13. " RADM_FATAL_ERR , Indicate that the core received a ERR_FATAL Message" "Not received,Received" bitfld.long 0x10 12. " RADM_NONFATAL_ERR , Indicate that the core received a ERR_NONFATAL Message" "Not received,Received" textline " " bitfld.long 0x10 11. " RADM_CORRECTABLE_ERR , Indicate that the core received a ERR_COR Message" "Not received,Received" bitfld.long 0x10 10. " RADM_INTD_ASSERTED , Indicate that core received an Assert_INTD Message from the downstream device" "Not asserted,Asserted" textline " " bitfld.long 0x10 9. " RADM_INTC_ASSERTED , Indicate that core received an Assert_INTC Message from the downstream device" "Not asserted,Asserted" bitfld.long 0x10 8. " RADM_INTB_ASSERTED , Indicate that core received an Assert_INTB Message from the downstream device" "Not asserted,Asserted" textline " " bitfld.long 0x10 7. " RADM_INTA_ASSERTED , Indicate that core received an Assert_INTA Message from the downstream device" "Not asserted,Asserted" bitfld.long 0x10 6. " RC_CORE_WAKE , Function Wake Up" "Not woken up,Woken up" textline " " bitfld.long 0x10 5. " RADM_VENDOR_MSG , Indicate that the core received a vendor defined message" "Not received,Received" bitfld.long 0x10 4. " CFG_PME_MSI , Config PME MSI" "0,1" textline " " bitfld.long 0x10 3. " CFG_PME_INT , Config PME INT" "0,1" bitfld.long 0x10 2. " CFG_SYS_ERR_RC , Function System error detected" "No error,Error" textline " " bitfld.long 0x10 1. " CFG_AER_RC_MSI , Config AER RC MSI" "0,1" bitfld.long 0x10 0. " CFG_AER_RC_INT , Config AER RC INT" "0,1" wgroup.long 0x1C++0x03 line.long 0x00 "CR7_REGISTER, Control Register 7" bitfld.long 0x00 29. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 28. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 27. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 26. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 25. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 22. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 21. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 20. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 19. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 18. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 17. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 16. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 15. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 14. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 13. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 12. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 11. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 10. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 8. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 7. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 6. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 5. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 4. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 2. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 1. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" bitfld.long 0x00 0. " CR6CLEAR , PCIe CR6 interrupt clear" "Not cleared,Cleared" group.long 0x20++0x0B line.long 0x00 "CR8_REGISTER, Control Register 8" bitfld.long 0x00 29. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 28. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 27. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 26. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 22. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 21. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 20. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 18. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 17. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 16. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 15. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 14. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 12. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 10. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 6. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " CR6MASK , PCIe CR6 interrupt mask" "Not masked,Masked" line.long 0x04 "CR9_REGISTER, Control Register 9" hexmask.long.tbyte 0x04 0.--20. 1. " MSTR_BMISC_INFO_REG , AXI Master Write Response Transaction Associated Misc Information" line.long 0x08 "CR10_REGISTER, Control Register 10" rgroup.long 0x2C++0x0B line.long 0x00 "CR11_REGISTER, Control Register 11" line.long 0x04 "CR12_REGISTER, Control Register 12" line.long 0x08 "CR13_REGISTER, Control Register 13" group.long 0x38++0x23 line.long 0x00 "CR14_REGISTER, Control Register 14" hexmask.long.word 0x00 12.--21. 1. " VEN_MSG_LEN , The length field for the vendor-defined Message TLP" bitfld.long 0x00 10.--11. " VEN_MSG_ATTR , The attributes field for the vendor-defined Message TLP" "0,1,2,3" textline " " sif (cpuis("SPEAR1310*")) bitfld.long 0x00 7.--9. " VEN_MSG_TC , Traffic Class field for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--6. " VEN_MSG_TYPE , Type field for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." textline " " bitfld.long 0x00 0.--1. " VEN_MSG_FMT , The Format field for the vendor-defined Message TLP" "0,1,2,3" else bitfld.long 0x00 9. " VEN_MSG_EP , Poisoned TLP (EP) bit for the vendor-defined Message TLP" "0,1" bitfld.long 0x00 8. " VEN_MSG_TD , TLP Digest (TD) bit for the vendor-defined Message TLP" "0,1" textline " " bitfld.long 0x00 5.--7. " VEN_MSG_TC , Traffic Class field for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--4. " VEN_MSG_TYPE , Type field for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." endif line.long 0x04 "CR15_REGISTER, Control Register 15" bitfld.long 0x04 23. " VEN_MSG_REQ , Request from the application to send a vendor-defined Message" "Not requested,Requested" hexmask.long.byte 0x04 3.--10. 1. " VEN_MSG_CODE , The Message Code for the vendor-defined Message TLP" textline " " hexmask.long.byte 0x04 11.--18. 1. " VEN_MSG_TAG , The Tag for the vendor-defined Message TLP" textline " " sif (cpuis("SPEAR1310*")) hexmask.long.byte 0x04 3.--10. 1. " VEN_MSG_TAG ,The Tag for the vendor-defined Message TLP" bitfld.long 0x04 0.--2. " VEN_MSG_FUN_NUM , The Function Number for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7" else bitfld.long 0x04 0.--2. " VEN_MSG_FUN_NUM , The Function Number for the vendor-defined Message TLP" "0,1,2,3,4,5,6,7" endif line.long 0x08 "CR16_REGISTER, Control Register 16" line.long 0x0C "CR17_REGISTER, Control Register 17" line.long 0x10 "CR18_REGISTER, Control Register 18" line.long 0x14 "CR19_REGISTER, Control Register 19" bitfld.long 0x14 11. " VEN_MSI_REQ , Request from the application to send an MSI when MSI is enabled" "No request,Request" bitfld.long 0x14 8.--10. " VEN_MSI_FUN_NUM , The function number of the MSI request" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x14 5.--7. " VEN_MSI_TC , Traffic class of the MSI request" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--4. " VEN_MSI_VECTOR , Used to modulate the lower five bits of the MSI Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "CR20_REGISTER, Control Register 20" line.long 0x1C "CR21_REGISTER, Control Register 21" line.long 0x20 "CR22_REGISTER, Control Register 22" rgroup.long 0xB8++0x3F line.long 0x00 "CR46_REGISTER, Control Register 46" line.long 0x04 "CR47_REGISTER, Control Register 47" line.long 0x08 "CR48_REGISTER, Control Register 48" line.long 0x0C "CR49_REGISTER, Control Register 49" line.long 0x10 "CR50_REGISTER, Control Register 50" line.long 0x14 "CR51_REGISTER, Control Register 51" line.long 0x18 "CR52_REGISTER, Control Register 52" line.long 0x1C "CR54_REGISTER, Control Register 54" line.long 0x20 "CR55_REGISTER, Control Register 55" line.long 0x24 "CR56_REGISTER, Control Register 56" line.long 0x28 "CR58_REGISTER, Control Register 58" line.long 0x2C "CR59_REGISTER, Control Register 59" line.long 0x30 "CR60_REGISTER, Control Register 60" line.long 0x34 "CR61_REGISTER, Control Register 61" hexmask.long.byte 0x34 0.--7. 1. " CFG_PBUS_DEV_NUM , Device number assigned to the function" line.long 0x38 "CR62_REGISTER, Control Register 62" line.long 0x3C "CR63_REGISTER, Control Register 63" tree.end tree "PIPE registers" base ad:0xEB802000 width 31. group.byte 0x00++0x00 line.byte 0x00 "SOFT_RESET, MiPHY soft reset register" bitfld.byte 0x00 0. " MEM_SOFT_RESET_REG , Reset the PIPE wrapper" "No reset,Reset" group.byte 0x04++0x02 line.byte 0x00 "DELAY_COMMON_MODE_RISE_0, PIPE common-mode rise delay 0 register" line.byte 0x01 "DELAY_COMMON_MODE_RISE_1, PIPE common-mode rise delay 1 register" line.byte 0x02 "DELAY_COMMON_MODE_RISE_2, PIPE common-mode rise delay 2 register" bitfld.byte 0x02 0.--3. " MEM_DELAY_COMMON_MODE_RISE_REG , Common mode rise delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x08++0x02 line.byte 0x00 "DELAY_COMMON_MODE_FALL_0, PIPE common-mode fall delay 0 register" line.byte 0x01 "DELAY_COMMON_MODE_FALL_1, PIPE common-mode fall delay 1 register" line.byte 0x02 "DELAY_COMMON_MODE_FALL_2, PIPE common-mode fall delay 2 register" bitfld.byte 0x02 0.--3. " MEM_DELAY_COMMON_MODE_FALL_REG , Common mode fall delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x0C++0x02 line.byte 0x00 "DETECT_RISE_VALUE_THRESHOLD_0, PIPE detect rise value threshold register 0" line.byte 0x01 "DETECT_RISE_VALUE_THRESHOLD_1, PIPE detect rise value threshold register 1" line.byte 0x02 "DETECT_RISE_VALUE_THRESHOLD_2, PIPE detect rise value threshold register 2" bitfld.byte 0x02 0.--3. " MEM_DETECT_RISE_VALUE_THRESHOLD_REG , Most-significant bits of wait value defining a time interval before detecting that a signal is present on the RX inputs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x10++0x05 line.byte 0x00 "BEACON_MIN_FREQ_0, PIPE beacon minimum frequency register 0" line.byte 0x01 "BEACON_MIN_FREQ_1, PIPE beacon minimum frequency register 1" line.byte 0x02 "BEACON_MIN_FREQ_2, PIPE beacon minimum frequency register 2" line.byte 0x03 "PCI_DETECT_STATUS_INVERT, PIPE PCI detect status invert register" bitfld.byte 0x03 0. " MEM_PCI_DETECT_STATUS_INVERT_REG , Invert the output of the MiPHY" "Not inverted,Inverted" line.byte 0x04 "DEEMPH_SETTING_GEN2_3_5DB, PIPE de-emphasis setting gen2, 3 5dB register" line.byte 0x05 "DEEMPH_SETTING_GEN2_6DB, PIPE de-emphasis setting gen2 6dB register" group.byte 0x20++0x00 line.byte 0x00 "RST_SEQ_SIZE, PIPE reset sequence size register" bitfld.byte 0x00 0.--3. " MEM_RST_SEQ_SIZE_REG , Default number of steps" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0x804++0x01 line.byte 0x00 "PIPEW_VERSION_MINOR, PIPE wrapper minor version" line.byte 0x01 "PIPEW_VERSION_MAJOR, PIPE wrapper major version" width 12. group.long 0x1000++0x1B line.long 0x00 "RST_SEQ_0, PIPE reset sequence register 0" hexmask.long.tbyte 0x00 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x04 "RST_SEQ_1, PIPE reset sequence register 1" hexmask.long.tbyte 0x04 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x08 "RST_SEQ_2, PIPE reset sequence register 2" hexmask.long.tbyte 0x08 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x0C "RST_SEQ_3, PIPE reset sequence register 3" hexmask.long.tbyte 0x0C 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x10 "RST_SEQ_4, PIPE reset sequence register 4" hexmask.long.tbyte 0x10 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x14 "RST_SEQ_5, PIPE reset sequence register 5" hexmask.long.tbyte 0x14 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x18 "RST_SEQ_6, PIPE reset sequence register 6" hexmask.long.tbyte 0x18 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" group.long 0x101C++0x17 line.long 0x00 "RST_SEQ_7, PIPE reset sequence register 7" hexmask.long.tbyte 0x00 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x04 "RST_SEQ_8, PIPE reset sequence register 8" hexmask.long.tbyte 0x04 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x08 "RST_SEQ_9, PIPE reset sequence register 9" hexmask.long.tbyte 0x08 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x0C "RST_SEQ_10, PIPE reset sequence register 10" hexmask.long.tbyte 0x0C 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x10 "RST_SEQ_11, PIPE reset sequence register 11" hexmask.long.tbyte 0x10 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" line.long 0x14 "RST_SEQ_12, PIPE reset sequence register 12" hexmask.long.tbyte 0x14 0.--21. 1. " MEM_RST_SEQ_REG , mem_rst_seq_reg" tree.end width 0x0B tree.end tree "SATA (Serial ATA controller)" base ad:0xB1000000 width 12. rgroup.long 0x00++0x03 line.long 0x00 "CAP, HBA Capabilities Register" bitfld.long 0x00 31. " S64A , Supports 64-bit Addressing" "Not supported,Supported" bitfld.long 0x00 30. " SNCQ , Supports Native Command Queuing" "Not supported,Supported" textline " " bitfld.long 0x00 29. " SSNTF , Supports SNotification Register" "Not supported,Supported" bitfld.long 0x00 28. " SMPS , Supports Mechanical Presence Switch" "Not supported,Supported" textline " " bitfld.long 0x00 27. " SSS , Supports Staggered Spin-up" "Not supported,Supported" bitfld.long 0x00 26. " SALP , Supports Aggressive Link Power Management" "Not supported,Supported" textline " " bitfld.long 0x00 25. " SAL , Supports Activity LED" "Not supported,Supported" bitfld.long 0x00 24. " SCLO , Supports Command List Override" "Not supported,Supported" textline " " bitfld.long 0x00 20.--23. " ISS , Interface Speed Support" "Reserved,1.5Gb/s,3.0Gb/s,6.0Gb/s,?..." bitfld.long 0x00 18. " SAM , Supports AHCI Mode Only" "Not supported,Supported" textline " " bitfld.long 0x00 17. " SPM , Supports Port Multiplier" "Not supported,Supported" bitfld.long 0x00 15. " PMD , PIO Multiple DRQ Block" "Not supported,Supported" textline " " bitfld.long 0x00 14. " SSC , Slumber State Capable" "Not supported,Supported" bitfld.long 0x00 13. " PSC , Partial State Capable" "Not supported,Supported" textline " " bitfld.long 0x00 8.--12. " NCS , Number of Command Slots" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" bitfld.long 0x00 7. " CCCS , Command Completion Coalescing Support" "Not supported,Supported" textline " " bitfld.long 0x00 6. " EMS , Enclosure Management Support" "Not supported,Supported" bitfld.long 0x00 5. " SXS , Supports External SATA" "No ports,One or more" textline " " bitfld.long 0x00 0.--4. " NP , Number of Ports" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32" group.long 0x04++0x07 line.long 0x00 "GHC, Global HBA Control Register" rbitfld.long 0x00 31. " AE , AHCI Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IE , Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HR , HBA Reset" "No effect,Reset" line.long 0x04 "IS, Interrupt Status Register" bitfld.long 0x04 0. " IPS , Corresponding port has an interrupt pending" "Not pending,Pending" rgroup.long 0x0C++0x07 line.long 0x00 "PI, Ports Implemented Register" bitfld.long 0x00 0. " PI , Ports Implemented" "Not available,Available" line.long 0x04 "VS, AHCI Version Register" hexmask.long.word 0x04 16.--31. 1. " MJR , Indicates that the major AHCI version is 1" hexmask.long.word 0x04 0.--15. 1. " MNR , Indicates that the minor AHCI version is 30" group.long 0x14++0x07 line.long 0x00 "CCC_CTL, Command Completion Coalescing Control" hexmask.long.word 0x00 16.--31. 1. " TV , CCC time-out value" hexmask.long.byte 0x00 8.--15. 1. " CC , Number of command completions" textline " " bitfld.long 0x00 3.--7. " INT , Interrupt used by the CCC feature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0. " EN , CCC Enable" "Disabled,Enabled" line.long 0x04 "CCC_PORTS, Command Completion Coalescing Ports" rgroup.long 0x24++0x07 line.long 0x00 "CAP2, HBA Capabilities Extended Register" bitfld.long 0x00 2. " APST , SATA supports automatic Partial to Slumber transitions" "Not supported,Supported" line.long 0x04 "BISTAFR, BIST Activate FIS Register" hexmask.long.byte 0x04 8.--15. 1. " NCP , Least significant byte of the received BIST Activate FIS second DWORD" hexmask.long.byte 0x04 0.--7. 1. " PD , Indicates the pattern definition field of the received BIST Activate FIS" group.long 0xA4++0x03 line.long 0x00 "BISTCR, BIST Control Register" sif (cpuis("SPEAR1310*")) hexmask.long.byte 0x00 4.--11. 1. " PV ,select either short or long version of the SSOP | HTDP | LTDP | LFSCP | COMP patterns" bitfld.long 0x00 0.--3. " PATTERN ,defines one of the following SATA compliant patterns" "SSOP,HTDP,LTDP,LFSCP,COMP,LBP,MFTP,HFTP,LFTP,?..." else hexmask.long.byte 0x00 8.--15. 1. " FLIP , Change disparity of the current test pattern" hexmask.long.byte 0x00 0.--7. 1. " PV , Short or long version of the SSOP, HTDP, LTDP, LFSCP,COMP patterns" endif rgroup.long 0xA8++0x0B line.long 0x00 "BISTFCTR, BIST FIS Count Register" line.long 0x04 "BISTSR, BIST Status Register" hexmask.long.byte 0x04 16.--23. 1. " BISTFCTR , Burst error count" hexmask.long.word 0x04 0.--15. 1. " FRAMERR , Frame error count" line.long 0x08 "BISTDECR, BIST DWORD Error Count Register" group.long 0xBC++0x07 line.long 0x00 "OOBR, OOB Register" bitfld.long 0x00 31. " WE , OOBR Read/Write" "Read only,Write" hexmask.long.byte 0x00 24.--30. 1. " CWMIN , COMWAKE Minimum Value" textline " " hexmask.long.byte 0x00 16.--23. 1. " CWMAX , COMWAKE Maximum Value" hexmask.long.byte 0x00 8.--15. 1. " CIMIN , COMINIT Minimum Value" textline " " hexmask.long.byte 0x00 0.--7. 1. " CIMAX , COMINIT Maximum Value" line.long 0x04 "TIMER1MS, Timer 1-ms Register" hexmask.long.tbyte 0x04 0.--19. 1. " TIMV , Fappclk*1000 where Fappclk = AMBA clock frequency in MHz" rgroup.long 0xE8++0x00B line.long 0x00 "GPARAM1R, Global Parameter 1 Register" bitfld.long 0x00 31. " ALIGN_M , RX Data Alignment" "Misaligned,Aligned" bitfld.long 0x00 30. " RX_BUFFER , RX Data Buffer" "Excluded,Included" textline " " bitfld.long 0x00 28.--29. " PHY_DATA , PHY Data Width" "1,2,4,?..." bitfld.long 0x00 27. " PHY_RST , PHY Reset Mode" "Low,High" textline " " hexmask.long 0x00 21.--26. 1. " PHY_CTRL , PHY Control Width" hexmask.long.byte 0x00 15.--20. 1. " PHY_STAT , PHY Status Width" textline " " bitfld.long 0x00 14. " LATCH_M , Derived from the LATCH_MODE parameter" "Excluded,Included" bitfld.long 0x00 13. " BIST_M , BIST Loopback Checking Depth" "FIS,DWORD" textline " " bitfld.long 0x00 12. " PHY_TYPE , PHY Interface Type" "ST MIPHZ interface,?..." bitfld.long 0x00 10. " RETURN_ERR , AMBA Error Response" "False,True" textline " " bitfld.long 0x00 8.--9. " AHB_ENDIAN , Derived from the AHB_ENDIANNESS parameter" "Little,Big,Dynamic,?..." bitfld.long 0x00 7. " S_HADDR , AMBA Slave Address Bus Width" "32bits,64bits" textline " " bitfld.long 0x00 6. " M_HADDR , AMBA Master Address Bus Width" "32bits,64bits" line.long 0x04 "GPARAM2R, Global Parameter 2 Register" bitfld.long 0x04 14. " DEV_CP , Cold Presence Detect" "Excluded,Included" bitfld.long 0x04 13. " BIST_M , BIST Loopback Checking Depth" "FIS,DWORD" textline " " bitfld.long 0x04 12. " ENCODE_M , 8b/10b Encoding/Decoding" "Excluded,Included" bitfld.long 0x04 11. " RXOOB_CLK_M , RX OOB Clock Mode" "RxClock,Separate" textline " " bitfld.long 0x04 10. " RX_OOB_M , RX OOB Mode" "Excluded,Included" bitfld.long 0x04 9. " TX_OOB_M , TX OOB Mode" "Excluded,Included" textline " " hexmask.long.word 0x04 0.--8. 1. " RXOOB_CLK , PHY Status Width" line.long 0x08 "PPARAMR, Port Parameter Register" bitfld.long 0x08 9. " TX_MEM_M , TX FIFO Memory Read Port Type" "Async,Sync" bitfld.long 0x08 8. " TX_MEM_S , TX FIFO Memory Type" "External,Internal" textline " " bitfld.long 0x08 7. " RX_MEM_M , RX FIFO Memory Read Port Type" "Async,Sync" bitfld.long 0x08 6. " RX_MEM_S , RX FIFO Memory Type" "External,Internal" textline " " bitfld.long 0x08 3.--5. " TXFIFO_DEPTH , TX FIFO Depth" "32,64,128,256,512,1024,2048,?..." bitfld.long 0x08 0.--2. " RXFIFO_DEPTH , RX FIFO Depth" "Reserved,64,128,256,512,1024,2048,?..." group.long 0xF4++0x03 line.long 0x00 "TESTR, Test Register" bitfld.long 0x00 16.--18. " PSEL , Port Select" "P0,P1,P2,P3,P4,P5,P6,P7" rbitfld.long 0x00 0. " TEST_IF , This bit is used to put the SATA slave interface into the test mode" "Normal mode,Test mode" rgroup.long 0xF8++0x07 line.long 0x00 "VERSIONR, Version Register" line.long 0x04 "IDR, Identification Register" group.long 0x100++0x1B line.long 0x00 "P0CLB, Port0 Command List Base Address Register" hexmask.long.tbyte 0x00 10.--31. 0x400 " CLB , Command List Base Address" line.long 0x04 "P0CLBU, Port0 Command List Base Address Upper 32-Bits Register" line.long 0x08 "P0FB, Port0 FIS Base Address Register" hexmask.long.tbyte 0x08 8.--31. 0x100 " FB , FIS Base Address" line.long 0x0C "P0FBU, Port0 FIS Base Address Upper 32-Bits Register" line.long 0x10 "P0IS, Port0 Interrupt Status Register" bitfld.long 0x10 31. " CPDS , Cold Port Detect Status" "Not detected,Detected" bitfld.long 0x10 30. " TFES , Task File Error Status" "No error,Error" textline " " bitfld.long 0x10 29. " HBFS , Host Bus Fatal Error Status" "No error,Error" eventfld.long 0x10 28. " HBDS , Host Bus Data Error Status" "No error,Error" textline " " bitfld.long 0x10 27. " IFS , Interface Fatal Error Status" "No error,Error" bitfld.long 0x10 26. " INFS , Interface Non-fatal Error Status" "No error,Error" textline " " bitfld.long 0x10 24. " OFS , Overflow Status" "No overflow,Overflow" bitfld.long 0x10 23. " IPMS , IPMS Incorrect Port Multiplier Status" "Low,High" textline " " bitfld.long 0x10 22. " PRCS , PHY Ready Change Status" "Not ready,Ready" bitfld.long 0x10 7. " DMPS , Device Mechanical Presence Status" "Not present,Present" textline " " bitfld.long 0x10 6. " PCS , Port Connect Change Status" "Not changed,Changed" bitfld.long 0x10 5. " DPS , Descriptor Processed" "Not processed,Processed" textline " " bitfld.long 0x10 4. " UFS , Unknown FIS Interrupt" "No interrupt,Interrupt" bitfld.long 0x10 3. " SDBS , Set Device Bits Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 2. " DSS , DMA Setup FIS Interrupt" "No interrupt,Interrupt" bitfld.long 0x10 1. " PSS , PIO Setup FIS Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x10 0. " DHRS , Device to Host Register FIS Interrupt" "No interrupt,Interrupt" line.long 0x14 "P0IE, Port0 Interrupt Enable Register" bitfld.long 0x14 31. " CPDE , Cold Port Detect Enable" "Disabled,Enabled" bitfld.long 0x14 30. " TFEE , Task File Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 29. " HBFE , Host Bus Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x14 28. " HBDE , Host Bus Data Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 27. " IFE , Interface Fatal Error Enable" "Disabled,Enabled" bitfld.long 0x14 26. " INFE , Interface Non-Fatal Error Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 24. " OFE , Overflow Enable" "Disabled,Enabled" bitfld.long 0x14 23. " IPME , Incorrect Port Multiplier Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 22. " PRCE , PHY Ready Change Enable" "Disabled,Enabled" bitfld.long 0x14 7. " DMPE , Device Mechanical Presence Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 6. " PCE , Port Change Interrupt Enable" "Disabled,Enabled" bitfld.long 0x14 5. " DPE , Descriptor Processed Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " UFE , Unknown FIS Interrupt Enable" "Disabled,Enabled" bitfld.long 0x14 3. " SDBE , Set Device Bits FIS Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 2. " DSE , DMA Setup FIS Interrupt Enable" "Disabled,Enabled" bitfld.long 0x14 1. " PSE , PIO Setup FIS Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " DHRE , Device to Host Register FIS Interrupt" "No interrupt,Interrupt" line.long 0x18 "P0CMD, Port0 Command Register" bitfld.long 0x18 28.--31. " ICC , Interface Communication Control" "No-op/idle,Active,Partial,Reserved,Reserved,Reserved,Slumber,?..." bitfld.long 0x18 27. " ASP , Aggressive Slumber/ Partial" "Partial,Slumber" textline " " bitfld.long 0x18 26. " ALPE , Aggressive Link Power Management Enable" "Disabled,Enabled" bitfld.long 0x18 25. " DLAE , Drive LED on ATAPI Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 24. " ATAPI , Device is ATAPI" "Non-ATAPI,ATAPI" bitfld.long 0x18 23. " APSTE , Automatic Partial to Slumber Transitions Enable" "Disabled,Enabled" textline " " bitfld.long 0x18 21. " ESP , External SATA Port" "Non-accessible,Accessible" bitfld.long 0x18 20. " CPD , Cold Presence Detection" "Not supported,Supported" textline " " bitfld.long 0x18 19. " MPSP , Mechanical Presence Switch Attached to Port" "Not supported,Supported" bitfld.long 0x18 18. " HPCP , Hot Plug Capable Port" "Non-accessible,Accessible" textline " " bitfld.long 0x18 17. " PMA , Port Multiplier Attached" "Not attached,Attached" bitfld.long 0x18 16. " CPS , Cold Presence State" "Not attached,Attached" textline " " bitfld.long 0x18 15. " CR , Command List Running" "Not running,Running" bitfld.long 0x18 14. " FR , FIS Receive Running" "Not running,Running" textline " " bitfld.long 0x18 13. " MPSS , Mechanical Presence Switch State" "Closed,Open" bitfld.long 0x18 8.--12. " CCS , Current Command Slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x18 4. " FRE , FIS Receive Enable" "Disabled,Enabled" bitfld.long 0x18 3. " CLO , Command List Override" "Not overriden,Overriden" textline " " bitfld.long 0x18 2. " POD , Power On Device" "Disabled,Enabled" bitfld.long 0x18 1. " SUD , Spin-Up Device" "Disabled,Enabled" textline " " bitfld.long 0x18 0. " ST , DMA Setup FIS Interrupt Enable" "Disabled,Enabled" rgroup.long 0x120++0x0B line.long 0x00 "P0TFD, Port0 Task File Data Register" hexmask.long 0x00 8.--15. 1. " ERR , Error" textline " " sif (cpuis("SPEAR1310*")) bitfld.long 0x00 7. " STS[BSY] ,Indicates the interface is busy" "Idle,Busy" bitfld.long 0x00 4.--6. " STS[cs] ,Command specific" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3. " STS[DRQ] ,Indicates a data transfer is requested" "Not requested,Requested" bitfld.long 0x00 1.--2. " STS[cs] ,Command specific" "0,1,2,3" textline " " bitfld.long 0x00 0. " STS[ERR] ,Indicates an error during the transfer" "No error,Error" else hexmask.long 0x00 0.--7. 1. " STS , Status" endif line.long 0x04 "P0SIG, Port0 Signature Register" sif (cpuis("SPEAR1310*")) hexmask.long.byte 0x04 24.--31. 1. " SIG[31:24] ,LBA High (Cylinder High)" hexmask.long.byte 0x04 16.--23. 1. " SIG[23:16] ,LBA Mid (Cylinder Low)" textline " " hexmask.long.byte 0x04 8.--15. 1. " SIG[15:8] ,LBA Low (Sector Number)" hexmask.long.byte 0x04 0.--7. 1. " SIG[7:0] ,Sector Count Register" endif line.long 0x08 "P0SSTS, Port0 Serial ATA Status {SStatus} Register" bitfld.long 0x08 8.--11. " IPM , Interface Power Management" "No device,Active,Partial,Reserved,Reserved,Reserved,Slumber,?..." bitfld.long 0x08 4.--7. " SPD , Current Interface Speed" "No device,1.5Gb/s,3.0Gb/s,6.0Gb/s,?..." textline " " bitfld.long 0x08 0.--3. " DET , Device Detection" "No device,PHY estabilished,PHY not estabilished,Offline mode,?..." group.long 0x12C++0x03 line.long 0x00 "P0SCTL, Port0 Serial ATA Control {SControl} Register" bitfld.long 0x00 8.--11. " IPM , Interface Power Management Transitions Allowed" "No interface,Partial,Slumber,Partial&Slumber,?..." bitfld.long 0x00 4.--7. " SPD , Speed Allowed" "No restriction,1.5Gb/s,3.0Gb/s,6.0Gb/s,?..." textline " " bitfld.long 0x00 0.--3. " DET , Device Detection Initialization" "No device,Perform init,Reserved,Reserved,Disable SATA,?..." hgroup.long 0x130++0x03 hide.long 0x00 "P0SERR, Port0 Serial ATA Error {SError} Register" in group.long 0x134++0x13 line.long 0x00 "P0SACT, Port0 Serial ATA Active {SActive} Register" line.long 0x04 "P0CI, Port0 Command Issue Register" line.long 0x08 "P0SNTF, Port0 Serial ATA Notification Register" eventfld.long 0x08 15. " PMN[15] , PM Notify" "Not set,Set" eventfld.long 0x08 14. " PMN[14] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 13. " PMN[13] , PM Notify" "Not set,Set" eventfld.long 0x08 12. " PMN[12] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 11. " PMN[11] , PM Notify" "Not set,Set" eventfld.long 0x08 10. " PMN[10] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 9. " PMN[9] , PM Notify" "Not set,Set" eventfld.long 0x08 8. " PMN[8] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 7. " PMN[7] , PM Notify" "Not set,Set" eventfld.long 0x08 6. " PMN[6] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 5. " PMN[5] , PM Notify" "Not set,Set" eventfld.long 0x08 4. " PMN[4] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 3. " PMN[3] , PM Notify" "Not set,Set" eventfld.long 0x08 2. " PMN[2] , PM Notify" "Not set,Set" textline " " eventfld.long 0x08 1. " PMN[1] , PM Notify" "Not set,Set" eventfld.long 0x08 0. " PMN[0] , PM Notify" "Not set,Set" line.long 0x0C "P0DMACR, Port0 DMA Control Register" bitfld.long 0x0C 12.--15. " RXABL , Receive AMBA Burst Limit (DWORDs)" "256,1,2,4,8,16,32,64,128,256,256,256,256,256,256,256" bitfld.long 0x0C 8.--11. " TXABL , Transmit AMBA Burst Limit (DWORDs)" "256,1,2,4,8,16,32,64,128,256,256,256,256,256,256,256" textline " " bitfld.long 0x0C 4.--7. " RXTS , Receive Transaction Size (DWORDs)" "1,2,4,8,16,32,64,128,256,512,1024,?..." bitfld.long 0x0C 0.--3. " TXTS , Transmit Transaction Size (DWORDs)" "1,2,4,8,16,32,64,128,256,512,1024,?..." line.long 0x10 "P0PHYCR, Port0 PHY Control Register" rgroup.long 0x17C++0x03 line.long 0x00 "P0PHYSR, Port0 PHY Status Register" width 0x0B tree.end tree "UART (Asynchronous serial port)" base ad:0xB4100000 width 13. group.long 0x00++0x03 line.long 0x00 "UART0DR,UART0 Data Register" bitfld.long 0x00 11. " OE ,Overrun Error" "No error,Error" bitfld.long 0x00 10. " BE ,Break Error" "No error,Error" bitfld.long 0x00 9. " PE ,Parity Error" "No error,Error" bitfld.long 0x00 8. " FE ,Framing Error" "No error,Error" hexmask.long.byte 0x00 0.--7. 1. " DATA , Receive (read) or transmit (write) data character" group.long 0x04++0x03 line.long 0x00 "UART0RSECR,UART0 Receive Status Register/Error Clear Register" bitfld.long 0x00 3. " OE ,Overrun Error" "No error,Error" bitfld.long 0x00 2. " BE ,Break Error" "No error,Error" bitfld.long 0x00 1. " PE ,Parity Error" "No error,Error" bitfld.long 0x00 0. " FE ,Framing Error" "No error,Error" rgroup.long 0x18++0x3 line.long 0x0 "UART0FR,UART0 Flag Register" bitfld.long 0x00 8. " RI ,Ring Indicator Status" "0,1" bitfld.long 0x00 7. " TXFE ,Transmit FIFO Empty" "Not empty,Empty" bitfld.long 0x00 6. " RXFF ,Receive FIFO Full" "Not full,Full" bitfld.long 0x00 5. " TXFF ,Transmit FIFO Full" "Not full,Full" textline " " bitfld.long 0x00 4. " RXFE ,Receive FIFO Empty" "Not empty,Empty" bitfld.long 0x00 3. " BUSY ,UART Busy" "Not busy,Busy" bitfld.long 0x00 2. " DCD ,Data Carrier Detection" "0,1" bitfld.long 0x00 1. " DSR ,Data Set Ready" "0,1" textline " " bitfld.long 0x00 0. " CTS ,Clear To Send" "0,1" group.long 0x20++0x3 line.long 0x0 "UART0ILPR,UART0 IrDA Low Power Counter Divisor Register" hexmask.long.byte 0x0 0.--7. 1. " ILPDVSR ,IrDA Low Power Counter Divisor" group.long 0x24++0x3 line.long 0x0 "UART0IBRD,UART0 Integer Baud Rate Register" group.long 0x28++0x3 line.long 0x0 "UART0FBRD,UART0 Fractional Baud Rate Register" hexmask.long.byte 0x0 0.--5. 1. " BAUD_DIVFRAC ,Fractional Baud Rate Divider" group.long 0x2C++0x3 line.long 0x0 "UART0LCR_H,UART0 Line Control Register" bitfld.long 0x0 1. 2. 7. " SPS_EPS_PEN ,Stick/Even Parity Selection/Parity Enable" "No parity,Odd,No parity,Even,No parity,1,No parity,0" bitfld.long 0x00 5.--6. " WLEN ,Long Length" "5-bit,6-bit,7-bit,8-bit" textline " " bitfld.long 0x00 4. " FEN ,FIFOs Enable" "Disabled,Enabled" bitfld.long 0x00 3. " STP2 ,Two Stop Bits Selection" "1 bit,2 bits" textline " " bitfld.long 0x00 0. " BRK ,Send Break" "Normal,Send break" group.long 0x30++0x3 line.long 0x0 "UART0CR,UART0 Control Register" bitfld.long 0x00 15. " CTSEN ,CTS Hardware Flow Control Enable" "Disabled,Enabled" bitfld.long 0x00 14. " RTSEN ,RTS Hardware Flow Control Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " RTS ,Request to Send" "0,1" bitfld.long 0x00 10. " DTR ,Data Transmit Ready" "0,1" textline " " bitfld.long 0x00 9. " RXE ,Receive Enable" "Disabled,Enabled" bitfld.long 0x00 8. " TXE ,Transmit Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " LBE ,Loop Back Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIRLP ,IrDA SIR low power mode" "High pulse,Low pulse" textline " " bitfld.long 0x00 1. " SIREN ,SIR enable" "Disabled,Enabled" bitfld.long 0x00 0. " UARTEN ,UART Enable" "Disabled,Enabled" group.long 0x34++0x3 line.long 0x0 "UART0IFLS,UART0 Interrupt FIFO Level Select Register" bitfld.long 0x0 3.--5. " RXIFLSEL ,Receive Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." bitfld.long 0x0 0.--2. " TXIFLSEL ,Transmit Interrupt FIFO Level Selection" "1/8 full,1/4 full,1/2 full,3/4 full,7/8 full,?..." group.long 0x38++0x3 line.long 0x0 "UART0IMSC,UART0 Interrupt Mask Set/Clear Register" bitfld.long 0x00 10. " OEIM ,Overrun Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 9. " BEIM ,Break Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PEIM ,Parity Error Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 7. " FEIM ,Framing Error Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RTIM ,Receive Timeout Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 5. " TXIM ,Transmit Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RXIM ,Receive Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 3. " DSRMIM ,Modem DSR Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DCDMIM ,Modem DCD Interrupt Mask" "Disabled,Enabled" bitfld.long 0x00 1. " CTSMIM ,Modem CTS Interrupt Mask" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " RIMIM ,Modem RI Interrupt Mask" "Disabled,Enabled" rgroup.long 0x3C++0x3 line.long 0x0 "UART0RIS,UART0 Raw Interrupt Status Register" bitfld.long 0x00 10. " OERIS ,Overrun Error Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 9. " BERIS ,Break Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " PERIS ,Parity Error Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 7. " FERIS ,Framing Error Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " RTRIS ,Receive Timeout Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 5. " TXRIS ,Transmit Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RXRIS ,Receive Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 3. " DSRRMIS ,DSR Modem Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " DCDRMIS ,DCD Modem Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " CTSRMIS ,CTS Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " RIRMIS ,RI Modem Interrupt Status" "No interrupt,Interrupt" rgroup.long 0x40++0x3 line.long 0x0 "UART0MIS, UART0 Masked Interrupt Status Register" bitfld.long 0x00 10. " OEMIS ,Overrun Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 9. " BEMIS ,Break Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " PEMIS ,Parity Error Masked Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 7. " FEMIS ,Frame Error Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " RTMIS ,Receive Timeout Masked Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 5. " TXMIS ,Transmit Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RXMIS ,Receive Masked Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 3. " DSRMMIS ,DSR Modem Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " DCDMMIS ,DCD Modem Masked Interrupt Status" "No interrupt,Interrupt" bitfld.long 0x00 1. " CTSMMIS ,CTS Masked Interrupt Status" "No interrupt,Interrupt" textline " " bitfld.long 0x0 0. " RIMMIS ,RI Modem Masked Interrupt Status" "No interrupt,Interrupt" wgroup.long 0x44++0x3 line.long 0x0 "UART0ICR,UART0 Interrupt Clear Register" bitfld.long 0x00 10. " OEIC ,Overrun Error Interrupt Clear" "No effect,Clear" bitfld.long 0x00 9. " BEIC ,Break Error Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x00 8. " PEIC ,Parity Error Interrupt Clear" "No effect,Clear" bitfld.long 0x00 7. " FEIC ,Frame Error Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x00 6. " RTIC ,Receive Timeout Interrupt Clear" "No effect,Clear" bitfld.long 0x00 5. " TXIC ,Transmit Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x00 4. " RXIC ,Receive Interrupt Clear" "No effect,Clear" bitfld.long 0x00 3. " DSRMIC ,DSR Modem Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x00 2. " DCDMIC ,DCD Modem Interrupt Clear" "No effect,Clear" bitfld.long 0x00 1. " CTSMIC ,CTS Interrupt Clear" "No effect,Clear" textline " " bitfld.long 0x00 0. " RIMIC ,RI Modem Interrupt Clear" "No effect,Clear" group.long 0x48++0x3 line.long 0x0 "UART0DMACR,UART0 DMA Control Register" bitfld.long 0x0 2. " DMAONERR ,DMA on Error" "No error,Error" bitfld.long 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" width 0x0b tree.end tree "SSP (Synchronous serial port)" base ad:0xE0100000 width 12. if (((data.long(asd:0xE0100000))&0x30)==0x00) group.word 0x0++0x1 line.word 0x0 "SSP0CR0,SSP0 Control Register 0" hexmask.word.byte 0x0 8.--15. 1. " SCR ,Serial Clock Rate" bitfld.word 0x0 7. " SPH ,Serial Clock Phase" "First,Second" bitfld.word 0x0 6. " SPO ,Serial Clock Polarity" "Low,High" textline " " bitfld.word 0x0 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x0 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" else group.word 0x0++0x1 line.word 0x0 "SSP0CR0,SSP0 Control Register 0" hexmask.word.byte 0x00 8.--15. 1. " SCR ,Serial Clock Rate" textline " " bitfld.word 0x00 4.--5. " FRF ,Frame Format" "Motorola,TI,National Microwire,?..." bitfld.word 0x00 0.--3. " DSS ,Data Size Select" "Reserved,Reserved,Reserved,4-bit,5-bit,6-bit,7-bit,8-bit,9-bit,10-bit,11-bit,12-bit,13-bit,14-bit,15-bit,16-bit" endif if (((data.word(asd:(0xE0100000+0x4)))&0x4)==0x4) group.word 0x4++0x1 line.word 0x0 "SSP0CR1,SSP0 Control Register 1" bitfld.word 0x00 3. " SOD ,Slave-Mode Output Disable" "No,Yes" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" else group.word 0x4++0x1 line.word 0x0 "SSP0CR1,SSP0 Control Register 1" bitfld.word 0x00 2. " MS ,Device Mode Selection" "Master,Slave" bitfld.word 0x00 1. " SSE ,SSP Enable" "Disabled,Enabled" bitfld.word 0x00 0. " LBM ,Loop Back Mode" "Normal,Loop back" endif hgroup.word 0x8++0x1 hide.word 0x0 "SSP0DR,SSP0 Data Register" in rgroup.word 0xC++0x01 line.word 0x0 "SSP0SR,SSP0 Status Register" bitfld.word 0x00 4. " BSY ,SSP Busy" "Idle,Busy" bitfld.word 0x00 3. " RFF ,Receive FIFO Full" "Not full,Full" textline " " bitfld.word 0x00 2. " RNE ,Receive FIFO Not Empty" "Empty,Not empty" bitfld.word 0x00 1. " TNF ,Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.word 0x00 0. " TFE ,Transmit FIFO Empty" "Not empty,Empty" group.word 0x10++0x1 line.word 0x0 "SSP0CPSR,SSP0 Clock Prescaler Register" hexmask.word.byte 0x0 0.--7. 1. " CPSDVSR ,Clock Prescaler Divisor" group.word 0x10++0x1 line.word 0x0 "SSP0IMSC,SSP0 Interrupt Mask Set and Clear Register" bitfld.word 0x0 3. " TXIM ,Transmit FIFO Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 2. " RXIM ,Receive FIFO Interrupt Mask" "Masked,Not masked" textline " " bitfld.word 0x0 1. " RTIM ,Receive Timeout Interrupt Mask" "Masked,Not masked" bitfld.word 0x0 0. " RORIM ,Receive Overrun Interrupt Mask" "Masked,Not masked" rgroup.word 0x18++0x1 line.word 0x0 "SSP0RIS,SSP0 Raw Interrupt Status Register" bitfld.word 0x00 3. " TXRIS ,Transmit FIFO Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 2. " RXRIS ,Receive FIFO Raw Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " RTRIS ,Receive Timeout Raw Status Flag" "Not occurred,Occurred" bitfld.word 0x00 0. " RORRIS ,Receive Overrun Raw Status Flag" "Not occurred,Occurred" rgroup.word 0x1c++0x1 line.word 0x0 "SSP0MIS,SSP0 Masked Interrupt Status Register" bitfld.word 0x0 3. " TXMIS ,Transmit FIFO Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 2. " RXMIS ,Receive FIFO Masked Status Flag" "No interrupt,Interrupt" textline " " bitfld.word 0x0 1. " RTMIS ,Receive Timeout Masked Status Flag" "No interrupt,Interrupt" bitfld.word 0x0 0. " RORMIS ,Receive Overrun Masked Status Flag" "No interrupt,Interrupt" wgroup.word 0x20++0x1 line.word 0x0 "SSP0ICR,SSP0 Interrupt Clear Register" bitfld.word 0x0 1. " RTIC ,Clear RX Timeout Interrupt" "No effect,Clear" bitfld.word 0x0 0. " RORIC ,Clear RX Overrun Interrupt" "No effect,Clear" group.word 0x24++0x1 line.word 0x0 "SSP0DMACR,SSP0 DMA Control Register" bitfld.word 0x0 1. " TXDMAE ,Transmit DMA Enable" "Disabled,Enabled" bitfld.word 0x0 0. " RXDMAE ,Receive DMA Enable" "Disabled,Enabled" rgroup.byte 0xfe0++0x00 line.byte 0x00 "PHERIPHID0,Peripheral Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PARTNUMBER0 ,These bits read back as 0x22" rgroup.byte 0xfe4++0x00 line.byte 0x00 "PHERIPHID1,Peripheral Id 1 Register" hexmask.byte 0x00 4.--7. 1. " DESIGNER0 ,These bits read back as 0x1" hexmask.byte 0x00 0.--3. 1. " PARTNUMBER1 ,These bits read back as 0x0" rgroup.byte 0xfe8++0x00 line.byte 0x00 "PHERIPHID2,Peripheral Id 2 Register" hexmask.byte 0x00 4.--7. 1. " REVISION ,These bits read back as 0x0" hexmask.byte 0x00 0.--3. 1. " DESIGNER1 ,These bits read back as 0x4" rgroup.byte 0xfec++0x00 line.byte 0x00 "PHERIPHID3,Peripheral Id 3 Register" hexmask.byte 0x00 0.--7. 1. " CONFIGURATION ,These bits read back as 0x00" rgroup.byte 0xff0++0x00 line.byte 0x00 "PCELLIDID0,Peripheral Cell Id 0 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID0 ,These bits read back as 0x0D" rgroup.byte 0xff4++0x00 line.byte 0x00 "PCELLIDID1,Peripheral Cell Id 1 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID1 ,These bits read back as 0xF0" rgroup.byte 0xff8++0x00 line.byte 0x00 "PCELLIDID2,Peripheral Cell Id 2 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID2 ,These bits read back as 0x05" rgroup.byte 0xffc++0x00 line.byte 0x00 "PCELLIDID3,Peripheral Cell Id 3 Register" hexmask.byte 0x00 0.--7. 1. " PCELLIDID3 ,These bits read back as 0xB1" width 0x0b tree.end tree "I2C (I2C bus controllers)" base ad:0xB4000000 width 16. group.long 0x00++0x2B line.long 0x00 "IC_CON, I2C Control register" bitfld.long 0x00 6. " IC_SLAVE_DISABLE , I2C slave disable" "No,Yes" bitfld.long 0x00 5. " IC_RESTART_EN , Restart enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " IC_10BITADDR_MASTER , I2C master addressing mode" "7-bit,10-bit" bitfld.long 0x00 3. " IC_10BITADDR_SLAVE , I2C slave addressing mode" "7-bit,10-bit" textline " " bitfld.long 0x00 1.--2. " SPEED , I2C operating speed" "Reserved,100kbit/s,400kbit/s,3.4 Mbit/s" bitfld.long 0x00 0. " MASTER_MODE , I2C master enable" "Disabled,Enabled" line.long 0x04 "IC_TAR, I2C Target Address Register" bitfld.long 0x04 12. " IC_10BITADDR_MASTER , I2C master addressing mode" "7-bit,10-bit" bitfld.long 0x04 11. " SPECIAL , Special command performing" "Normal,Special" textline " " bitfld.long 0x04 10. " GC_OR_START , General Call or START BYTE command" "Generall Call,START BYTE" hexmask.long.word 0x04 0.--9. 1. " IC_TAR , Target address for master transaction" line.long 0x08 "IC_SAR, I2C Slave Address Register" hexmask.long.word 0x08 0.--9. 1. " IC_SAR , Slave address" line.long 0x0C "IC_HS_MADDR, I2C High Speed Master Mode Code Address Register" bitfld.long 0x0C 0.--2. " IC_HS_MAR , Value of the I2C HS mode" "0,1,2,3,4,5,6,7" line.long 0x10 "IC_DATA_CMD, I2C Rx/Tx Data Buffer and Command Register" sif (cpuis("SPEAR1310*")) bitfld.long 0x10 10. " RESTART , RESTART is issued before the byte is sent or received" "Low,High" bitfld.long 0x10 9. " STOP , STOP is issued after the byte is sent or received" "Low,High" textline " " endif bitfld.long 0x10 8. " CMD , Read/Write performed" "Write,Read" hexmask.long.byte 0x10 0.--7. 1. " DAT , Data transmitted/received on I2C bus" line.long 0x14 "IC_SS_SCL_HCNT, Standard Speed I2C Clock SCL High Count Register" hexmask.long.word 0x14 0.--15. 1. " IC_SS_SCL_HCNT , Standard Speed I2C Clock SCL High Count" line.long 0x18 "IC_SS_SCL_LCNT, Standard Speed I2C Clock SCL Low Count Register" hexmask.long.word 0x18 0.--15. 1. " IC_SS_SCL_LCNT , Standard Speed I2C Clock SCL Low Count" line.long 0x1C "IC_FS_SCL_HCNT, Fast Speed I2C Clock SCL High Count Register" hexmask.long.word 0x1C 0.--15. 1. " IC_FS_SCL_HCNT , Fast Speed I2C Clock SCL High Count" line.long 0x20 "IC_FS_SCL_LCNT, Fast Speed I2C Clock SCL Low Count Register" hexmask.long.word 0x20 0.--15. 1. " IC_FS_SCL_LCNT , Fast Speed I2C Clock SCL Low Count" line.long 0x24 "IC_HS_SCL_HCNT, High Speed I2C Clock SCL High Count Register" hexmask.long.word 0x24 0.--15. 1. " IC_HS_SCL_HCNT , High Speed I2C Clock SCL High Count" line.long 0x28 "IC_HS_SCL_LCNT, High Speed I2C Clock SCL Low Count Register" hexmask.long.word 0x28 0.--15. 1. " IC_HS_SCL_LCNT , High Speed I2C Clock SCL Low Count" width 18. rgroup.long 0x2C++0x03 line.long 0x00 "IC_INTR_STAT, I2C Interrupt Status Register" bitfld.long 0x00 11. " R_GEN_CALL , Generall Call" "No interrupt,Interrupt" bitfld.long 0x00 10. " R_START_DET , Start detection" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " R_STOP_DET , Stop detection" "No interrupt,Interrupt" bitfld.long 0x00 8. " R_ACTIVITY , I2C activity" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " R_RX_DONE , Receiving done" "No interrupt,Interrupt" bitfld.long 0x00 6. " R_TX_ABRT , Transmission abort" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " R_RD_REQ , Read requirement" "No interrupt,Interrupt" bitfld.long 0x00 4. " R_TX_EMPTY , Transmit buffer low" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " R_TX_OVER , Transmit buffer full" "No interrupt,Interrupt" bitfld.long 0x00 2. " R_RX_FULL , Receive buffer over treshold" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " R_RX_OVER , Receive buffer full" "No interrupt,Interrupt" bitfld.long 0x00 0. " R_RX_UNDER , Attempt to read" "No interrupt,Interrupt" group.long 0x30++0x03 line.long 0x00 "IC_INTR_MASK, I2C Interrupt Mask Register" bitfld.long 0x00 11. " M_GEN_CALL , Generall Call" "Not masked,Masked" bitfld.long 0x00 10. " M_START_DET , Start detection" "Not masked,Masked" textline " " bitfld.long 0x00 9. " M_STOP_DET , Stop detection" "Not masked,Masked" bitfld.long 0x00 8. " M_ACTIVITY , I2C activity" "Not masked,Masked" textline " " bitfld.long 0x00 7. " M_RX_DONE , Receiving done" "Not masked,Masked" bitfld.long 0x00 6. " M_TX_ABRT , Transmission abort" "Not masked,Masked" textline " " bitfld.long 0x00 5. " M_RD_REQ , Read requirement" "Not masked,Masked" bitfld.long 0x00 4. " M_TX_EMPTY , Transmit buffer low" "Not masked,Masked" textline " " bitfld.long 0x00 3. " M_TX_OVER , Transmit buffer full" "Not masked,Masked" bitfld.long 0x00 2. " M_RX_FULL , Receive buffer over treshold" "Not masked,Masked" textline " " bitfld.long 0x00 1. " M_RX_OVER , Receive buffer full" "Not masked,Masked" bitfld.long 0x00 0. " M_RX_UNDER , Attempt to read" "Not masked,Masked" rgroup.long 0x34++0x03 line.long 0x00 "IC_RAW_INTR_STAT, I2C Raw Interrupt Status Register" bitfld.long 0x00 11. " GEN_CALL , Generall Call" "No interrupt,Interrupt" bitfld.long 0x00 10. " START_DET , Start detection" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " STOP_DET , Stop detection" "No interrupt,Interrupt" bitfld.long 0x00 8. " ACTIVITY , I2C activity" "No interrupt,Interrupt" textline " " bitfld.long 0x00 7. " RX_DONE , Receiving done" "No interrupt,Interrupt" bitfld.long 0x00 6. " TX_ABRT , Transmission abort" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " RD_REQ , Read requirement" "No interrupt,Interrupt" bitfld.long 0x00 4. " TX_EMPTY , Transmit buffer low" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " TX_OVER , Transmit buffer full" "No interrupt,Interrupt" bitfld.long 0x00 2. " RX_FULL , Receive buffer over treshold" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " RX_OVER , Receive buffer full" "No interrupt,Interrupt" bitfld.long 0x00 0. " RX_UNDER , Attempt to read" "No interrupt,Interrupt" hgroup.long 0x38++0x03 hide.long 0x00 "IC_RX_TL, I2C Receive FIFO Threshold Register" in group.long 0x3C++0x03 line.long 0x00 "IC_TX_TL, I2C Transmit FIFO Threshold Register" hexmask.long.byte 0x00 0.--7. 1. " TX_TL , Transmit FIFO Threshold Level Controls" hgroup.long 0x40++0x2B hide.long 0x00 "IC_CLR_INTR, Clear Combined and Individual Interrupt Register" in hide.long 0x04 "IC_CLR_RX_UNDER, Clear RX_UNDER Interrupt Register" in hide.long 0x08 "IC_CLR_RX_OVER, Clear RX_OVER Interrupt Register" in hide.long 0x0C "IC_CLR_TX_OVER, Clear TX_OVER Interrupt Register" in hide.long 0x10 "IC_CLR_RD_REQ, Clear RD_REQ Interrupt Register" in hide.long 0x14 "IC_CLR_TX_ABRT, Clear TX_ABRT Interrupt Register" in hide.long 0x18 "IC_CLR_RX_DONE, Clear RX_DONE Interrupt Register" in hide.long 0x1C "IC_CLR_ACTIVITY, Clear ACTIVITY Interrupt Register" in hide.long 0x20 "IC_CLR_STOP_DET, Clear STOP_DET Interrupt Register" in hide.long 0x24 "IC_CLR_START_DET, Clear START_DET Interrupt Register" in hide.long 0x28 "IC_CLR_GEN_CALL, Clear GEN_CALL Interrupt Register" in group.long 0x6C++0x03 line.long 0x00 "IC_ENABLE, I2C Enable Register" bitfld.long 0x00 0. " ENABLE , Controls whether the I2C is enabled" "Disabled,Enabled" rgroup.long 0x70++0x07 line.long 0x00 "IC_STATUS, I2C Status Register" bitfld.long 0x00 6. " SLV_ACTIVITY , Slave FSM Activity Status" "Not active,Active" bitfld.long 0x00 5. " MST_ACTIVITY , Master FSM Activity Status" "Not active,Active" textline " " bitfld.long 0x00 4. " RFF , Receive FIFO Completely Full" "Not full,Full" bitfld.long 0x00 3. " RFNE , Receive FIFO Not Empty" "Empty,Not empty" textline " " bitfld.long 0x00 2. " TFE , Transmit FIFO Completely Empty" "Not empty,Empty" bitfld.long 0x00 1. " TFNF , Transmit FIFO Not Full" "Full,Not full" textline " " bitfld.long 0x00 0. " ACTIVITY , I2C Activity Status" "Not active,Active" line.long 0x04 "IC_TXFLR, I2C Transmit FIFO Level Register" bitfld.long 0x04 0.--4. " TXFLR , Transmit FIFO Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.long 0x78++0x03 hide.long 0x00 "IC_RXFLR, I2C Receive FIFO Level Register" in width 23. group.long 0x7C++0x1f line.long 0x00 "IC_SDA_HOLD, I2C SDA Hold Register" hexmask.long.word 0x00 0.--15. 1. " IC_SDA_HOLD , SDA Hold" line.long 0x04 "IC_TX_ABRT_SOURCE, I2C Transmit Abort Source Register" bitfld.long 0x04 15. " ABRT_SLVRD_INTX , Slave mode request for data" "Not requested,Requested" bitfld.long 0x04 14. " ABRT_SLV_ARBLOST , Slave lost the bus" "Not lost,Lost" textline " " bitfld.long 0x04 13. " ABRT_SLVFLUSH_TXFIFO , Slave has received a read command" "Not flushed,Flushed" bitfld.long 0x04 12. " ARB_LOST , Master has lost arbitration" "Not lost,Lost" textline " " bitfld.long 0x04 11. " ABRT_MASTER_DIS , User tries to initiate a Master operation with the Master mode disabled" "No,Yes" bitfld.long 0x04 10. " ABRT_10B_RD_NORSTRT , The restart is disabled" "No,Yes" textline " " bitfld.long 0x04 9. " ABRT_SBYTE_NORSTRT , The restart is disabled (START Byte send)" "No,Yes" bitfld.long 0x04 8. " ABRT_HS_NORSTRT , The restart is disabled (High Speed)" "No,Yes" textline " " bitfld.long 0x04 7. " ABRT_SBYTE_ACKDET , START Byte sent and acknowledged" "Not acknowledged,Acknowledged" bitfld.long 0x04 6. " ABRT_HS_ACKDET , High Speed Master code was acknowledged" "Not acknowledged,Acknowledged" textline " " bitfld.long 0x04 5. " ABRT_GCALL_READ , I2C in master mode sent a General Call (Read from bus)" "Not sent,Sent" bitfld.long 0x04 4. " ABRT_GCALL_NOACK , I2C in master mode sent a General Call (No slave on bus ack)" "Not sent,Sent" textline " " bitfld.long 0x04 3. " ABRT_TXDATA_NOACK , Master has received an acknowledgement for the address (No ack)" "Acknowledged,Not acknowledged" bitfld.long 0x04 2. " ABRT_10ADDR2_NOACK , Master is in 10-bit address mode and the second address byte of the 10-bit address was not acknowledged" "Acknowledged,Not acknowledged" textline " " bitfld.long 0x04 1. " ABRT_10ADDR1_NOACK , Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged" "Acknowledged,Not acknowledged" bitfld.long 0x04 0. " ABRT_7B_ADDR_NOACK , Master is in 7-bit addressing mode and the address sent was not acknowledged" "Acknowledged,Not acknowledged" line.long 0x08 "IC_SLV_DATA_NACK_ONLY, Generate Slave Data NACK Register" bitfld.long 0x08 0. " NACK , Generate NACK" "After byte received,Normally" line.long 0x0C "IC_DMA_CR, DMA Control Register" bitfld.long 0x0C 1. " TDMAE , Transmit DMA Enable" "Disabled,Enabled" bitfld.long 0x0C 0. " RDMAE , Receive DMA Enable" "Disabled,Enabled" line.long 0x10 "IC_DMA_TDLR, DMA Transmit Data Level Register" bitfld.long 0x10 0.--3. " DMATDL , Transmit Data Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "IC_DMA_RDLR, I2C Receive Data Level Register" bitfld.long 0x14 0.--3. " DMARD , Receive Data Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "IC_SDA_SETUP, I2C SDA Setup Register" hexmask.long.byte 0x18 0.--7. 1. " SDA_SETUP , SDA Setup" line.long 0x1C "IC_ACK_GENERAL_CALL, I2C ACK General Call Register" bitfld.long 0x1C 0. " ACK_GEN_CALL , ACK General Call" "NACK,ACK" sif (cpuis("SPEAR1310*")) rgroup.long 0x9C++0x03 line.long 0x00 "IC_ENABLE_STATUS,I2C Enable Status Register" bitfld.long 0x00 2. " SLV_RX_DATA_LOST ,Slave Received Data Lost" "Not lost,Lost" bitfld.long 0x00 1. " SLV_DISABLED_WHILE_BUSY ,Slave Disabled While Busy" "No,Yes" textline " " bitfld.long 0x00 0. " IC_EN ,Ic_en Status" "Disabled,Enabled" group.long 0xA0++0x07 line.long 0x00 "IC_FS_SPKLEN,I2C SS and FS spike suppression limit" hexmask.long.byte 0x00 0.--7. 1. " IC_FS_SPKLEN ,Sets the duration/measured in ic_clk cycles of the longest spike in the SCL or SDA lines" line.long 0x04 "IC_HS_SPKLEN,I2C HS spike suppression limit" hexmask.long.byte 0x04 0.--7. 1. " IC_HS_SPKLEN ,Sets the duration/measured in ic_clk cycles of the longest spike in the SCL or SDA lines" endif width 17. rgroup.long 0xF4++0x0B line.long 0x00 "IC_COMP_PARAM_1, Component Parameter Register 1" hexmask.long.byte 0x00 16.--23. 1. " TX_BUFFER_DEPTH , Transmit buffer depth" hexmask.long.byte 0x00 8.--15. 1. " RX_BUFFER_DEPTH , Receive buffer depth" textline " " bitfld.long 0x00 7. " ADD_ENCODED_PARAMS , Derived from the IC_ADD_ENCODED_PARAMS" "False,True" bitfld.long 0x00 6. " HAS_DMA , Derived from the IC_HAS_DMA" "False,True" textline " " bitfld.long 0x00 5. " INTR_IO , Derived from the IC_INTR_IO" "Individual,Combined" bitfld.long 0x00 4. " HC_COUNT_VALUES , Derived from the IC_HC_COUNT VALUES" "False,True" textline " " bitfld.long 0x00 2.--3. " MAX_SPEED_MODE , Derived from the IC_MAX_SPEED_MODE" "Reserved,Standard,Fast,High" bitfld.long 0x00 0.--1. " APB_DATA_WIDTH , Derived from the APB_DATA_WIDTH" "8bits,16bits,32bits,?..." line.long 0x04 "IC_COMP_VERSION, I2C Component Version Register" line.long 0x08 "IC_COMP_TYPE, I2C Component Type Register" width 0x0B tree.end tree.open "GPIOAB (General purpose I/O)" tree "GPIOA" base ad:0xE0600000 width 15. group.byte 0x00++0x00 line.byte 0x00 "GPIODATA, Data Registers" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR, Data Direction Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS, Interrupt Sense Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE, Interrupt both edges" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x40C++0x00 line.byte 0x00 "GPIOIEV, Interrupt Event Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE, Interrupt Mask Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x414++0x00 line.byte 0x00 "GPIORIS, Raw interrupt status Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x418++0x00 line.byte 0x00 "GPIOMIS, Masked interrupt status Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x41C++0x00 line.byte 0x00 "GPIOC, Interrupt clear Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL, Mode control select Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0xFE0++0x00 line.byte 0x00 "GPIOPERIPHID0, Peripheral ID register bits 7:0" group.byte 0xFE4++0x00 line.byte 0x00 "GPIOPERIPHID1, Peripheral ID register bits 15:8" bitfld.byte 0x00 4.--7. " DESIGNER0 , Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PARTNUMBER1 , Part Number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0xFE8++0x00 line.byte 0x00 "GPIOPERIPHID2, Peripheral ID register bits 23:16" bitfld.byte 0x00 4.--7. " REVISION , Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DESIGNER1 , Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0xFEC++0x00 line.byte 0x00 "GPIOPERIPHID3, Peripheral ID register bits 31:24" group.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0, ID register bits 7:0" group.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1, ID register bits 15:8" group.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2, ID register bits 23:16" group.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3, ID register bits 31:24" width 0x0B tree.end tree "GPIOB" base ad:0xE0680000 width 15. group.byte 0x00++0x00 line.byte 0x00 "GPIODATA, Data Registers" group.byte 0x400++0x00 line.byte 0x00 "GPIODIR, Data Direction Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x404++0x00 line.byte 0x00 "GPIOIS, Interrupt Sense Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x408++0x00 line.byte 0x00 "GPIOIBE, Interrupt both edges" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x40C++0x00 line.byte 0x00 "GPIOIEV, Interrupt Event Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x410++0x00 line.byte 0x00 "GPIOIE, Interrupt Mask Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x414++0x00 line.byte 0x00 "GPIORIS, Raw interrupt status Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x418++0x00 line.byte 0x00 "GPIOMIS, Masked interrupt status Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x41C++0x00 line.byte 0x00 "GPIOC, Interrupt clear Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0x420++0x00 line.byte 0x00 "GPIOAFSEL, Mode control select Register" bitfld.byte 0x00 7. " PIN[7] , [7]" "Disabled,Enabled" bitfld.byte 0x00 6. " PIN[6] , [6]" "Disabled,Enabled" textline " " bitfld.byte 0x00 5. " PIN[5] , [5]" "Disabled,Enabled" bitfld.byte 0x00 4. " PIN[4] , [4]" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " PIN[3] , [3]" "Disabled,Enabled" bitfld.byte 0x00 2. " PIN[2] , [2]" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " PIN[1] , [1]" "Disabled,Enabled" bitfld.byte 0x00 0. " PIN[0] , [0]" "Disabled,Enabled" group.byte 0xFE0++0x00 line.byte 0x00 "GPIOPERIPHID0, Peripheral ID register bits 7:0" group.byte 0xFE4++0x00 line.byte 0x00 "GPIOPERIPHID1, Peripheral ID register bits 15:8" bitfld.byte 0x00 4.--7. " DESIGNER0 , Designer 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " PARTNUMBER1 , Part Number 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0xFE8++0x00 line.byte 0x00 "GPIOPERIPHID2, Peripheral ID register bits 23:16" bitfld.byte 0x00 4.--7. " REVISION , Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DESIGNER1 , Designer 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.byte 0xFEC++0x00 line.byte 0x00 "GPIOPERIPHID3, Peripheral ID register bits 31:24" group.byte 0xFF0++0x00 line.byte 0x00 "GPIOCELLID0, ID register bits 7:0" group.byte 0xFF4++0x00 line.byte 0x00 "GPIOCELLID1, ID register bits 15:8" group.byte 0xFF8++0x00 line.byte 0x00 "GPIOCELLID2, ID register bits 23:16" group.byte 0xFFC++0x00 line.byte 0x00 "GPIOCELLID3, ID register bits 31:24" width 0x0B tree.end tree.end tree "XGPIO (RAS Extended general purpose I/O)" base ad:0xE2800000 width 16. group.long 0x00++0x1F line.long 0x00 "GPIO_EN0, XGPIO Pad Enable Register" bitfld.long 0x00 31. " PIN[31] , Enables XGPIO pin 31" "Output,Input" bitfld.long 0x00 30. " PIN[30] , Enables XGPIO pin 30" "Output,Input" textline " " bitfld.long 0x00 29. " PIN[29] , Enables XGPIO pin 29" "Output,Input" bitfld.long 0x00 28. " PIN[28] , Enables XGPIO pin 28" "Output,Input" textline " " bitfld.long 0x00 27. " PIN[27] , Enables XGPIO pin 27" "Output,Input" bitfld.long 0x00 26. " PIN[26] , Enables XGPIO pin 26" "Output,Input" textline " " bitfld.long 0x00 25. " PIN[25] , Enables XGPIO pin 25" "Output,Input" bitfld.long 0x00 24. " PIN[24] , Enables XGPIO pin 24" "Output,Input" textline " " bitfld.long 0x00 7. " PIN[7] , Enables XGPIO pin 7" "Output,Input" bitfld.long 0x00 6. " PIN[6] , Enables XGPIO pin 6" "Output,Input" textline " " bitfld.long 0x00 5. " PIN[5] , Enables XGPIO pin 5" "Output,Input" bitfld.long 0x00 4. " PIN[4] , Enables XGPIO pin 4" "Output,Input" textline " " bitfld.long 0x00 3. " PIN[3] , Enables XGPIO pin 3" "Output,Input" bitfld.long 0x00 2. " PIN[2] , Enables XGPIO pin 2" "Output,Input" textline " " bitfld.long 0x00 1. " PIN[1] , Enables XGPIO pin 1" "Output,Input" bitfld.long 0x00 0. " PIN[0] , Enables XGPIO pin 0" "Output,Input" line.long 0x04 "GPIO_EN1, XGPIO Pad Enable Register" bitfld.long 0x04 31. " PIN[63] , Enables XGPIO pin 63" "Output,Input" bitfld.long 0x04 30. " PIN[62] , Enables XGPIO pin 62" "Output,Input" textline " " bitfld.long 0x04 29. " PIN[61] , Enables XGPIO pin 61" "Output,Input" bitfld.long 0x04 28. " PIN[60] , Enables XGPIO pin 60" "Output,Input" textline " " bitfld.long 0x04 27. " PIN[59] , Enables XGPIO pin 59" "Output,Input" bitfld.long 0x04 26. " PIN[58] , Enables XGPIO pin 58" "Output,Input" textline " " bitfld.long 0x04 25. " PIN[57] , Enables XGPIO pin 57" "Output,Input" bitfld.long 0x04 24. " PIN[56] , Enables XGPIO pin 56" "Output,Input" textline " " bitfld.long 0x04 23. " PIN[55] , Enables XGPIO pin 55" "Output,Input" bitfld.long 0x04 22. " PIN[54] , Enables XGPIO pin 54" "Output,Input" textline " " bitfld.long 0x04 21. " PIN[53] , Enables XGPIO pin 53" "Output,Input" bitfld.long 0x04 20. " PIN[52] , Enables XGPIO pin 52" "Output,Input" textline " " bitfld.long 0x04 19. " PIN[51] , Enables XGPIO pin 51" "Output,Input" bitfld.long 0x04 18. " PIN[50] , Enables XGPIO pin 50" "Output,Input" textline " " bitfld.long 0x04 17. " PIN[49] , Enables XGPIO pin 49" "Output,Input" bitfld.long 0x04 16. " PIN[48] , Enables XGPIO pin 48" "Output,Input" textline " " bitfld.long 0x04 15. " PIN[47] , Enables XGPIO pin 47" "Output,Input" bitfld.long 0x04 14. " PIN[46] , Enables XGPIO pin 46" "Output,Input" textline " " bitfld.long 0x04 13. " PIN[45] , Enables XGPIO pin 45" "Output,Input" bitfld.long 0x04 12. " PIN[44] , Enables XGPIO pin 44" "Output,Input" textline " " bitfld.long 0x04 11. " PIN[43] , Enables XGPIO pin 43" "Output,Input" bitfld.long 0x04 10. " PIN[42] , Enables XGPIO pin 42" "Output,Input" textline " " bitfld.long 0x04 9. " PIN[41] , Enables XGPIO pin 41" "Output,Input" bitfld.long 0x04 8. " PIN[40] , Enables XGPIO pin 40" "Output,Input" textline " " bitfld.long 0x04 7. " PIN[39] , Enables XGPIO pin 39" "Output,Input" bitfld.long 0x04 6. " PIN[38] , Enables XGPIO pin 38" "Output,Input" textline " " bitfld.long 0x04 5. " PIN[37] , Enables XGPIO pin 37" "Output,Input" bitfld.long 0x04 4. " PIN[36] , Enables XGPIO pin 36" "Output,Input" textline " " bitfld.long 0x04 3. " PIN[35] , Enables XGPIO pin 35" "Output,Input" bitfld.long 0x04 2. " PIN[34] , Enables XGPIO pin 34" "Output,Input" textline " " bitfld.long 0x04 1. " PIN[33] , Enables XGPIO pin 33" "Output,Input" bitfld.long 0x04 0. " PIN[32] , Enables XGPIO pin 32" "Output,Input" line.long 0x08 "GPIO_EN2, XGPIO Pad Enable Register" bitfld.long 0x08 31. " PIN[95] , Enables XGPIO pin 95" "Output,Input" bitfld.long 0x08 30. " PIN[94] , Enables XGPIO pin 94" "Output,Input" textline " " bitfld.long 0x08 29. " PIN[93] , Enables XGPIO pin 93" "Output,Input" bitfld.long 0x08 28. " PIN[92] , Enables XGPIO pin 92" "Output,Input" textline " " bitfld.long 0x08 27. " PIN[91] , Enables XGPIO pin 91" "Output,Input" bitfld.long 0x08 26. " PIN[90] , Enables XGPIO pin 90" "Output,Input" textline " " bitfld.long 0x08 25. " PIN[89] , Enables XGPIO pin 89" "Output,Input" bitfld.long 0x08 24. " PIN[88] , Enables XGPIO pin 88" "Output,Input" textline " " bitfld.long 0x08 23. " PIN[87] , Enables XGPIO pin 87" "Output,Input" bitfld.long 0x08 22. " PIN[86] , Enables XGPIO pin 86" "Output,Input" textline " " bitfld.long 0x08 21. " PIN[85] , Enables XGPIO pin 85" "Output,Input" bitfld.long 0x08 20. " PIN[84] , Enables XGPIO pin 84" "Output,Input" textline " " bitfld.long 0x08 19. " PIN[83] , Enables XGPIO pin 83" "Output,Input" bitfld.long 0x08 18. " PIN[82] , Enables XGPIO pin 82" "Output,Input" textline " " bitfld.long 0x08 17. " PIN[81] , Enables XGPIO pin 81" "Output,Input" bitfld.long 0x08 16. " PIN[80] , Enables XGPIO pin 80" "Output,Input" textline " " bitfld.long 0x08 15. " PIN[79] , Enables XGPIO pin 79" "Output,Input" bitfld.long 0x08 14. " PIN[78] , Enables XGPIO pin 78" "Output,Input" textline " " bitfld.long 0x08 13. " PIN[77] , Enables XGPIO pin 77" "Output,Input" bitfld.long 0x08 12. " PIN[76] , Enables XGPIO pin 76" "Output,Input" textline " " bitfld.long 0x08 11. " PIN[75] , Enables XGPIO pin 75" "Output,Input" bitfld.long 0x08 10. " PIN[74] , Enables XGPIO pin 74" "Output,Input" textline " " bitfld.long 0x08 9. " PIN[73] , Enables XGPIO pin 73" "Output,Input" bitfld.long 0x08 8. " PIN[72] , Enables XGPIO pin 72" "Output,Input" textline " " bitfld.long 0x08 7. " PIN[71] , Enables XGPIO pin 71" "Output,Input" bitfld.long 0x08 6. " PIN[70] , Enables XGPIO pin 70" "Output,Input" textline " " bitfld.long 0x08 5. " PIN[69] , Enables XGPIO pin 69" "Output,Input" bitfld.long 0x08 4. " PIN[68] , Enables XGPIO pin 68" "Output,Input" textline " " bitfld.long 0x08 3. " PIN[67] , Enables XGPIO pin 67" "Output,Input" bitfld.long 0x08 2. " PIN[66] , Enables XGPIO pin 66" "Output,Input" textline " " bitfld.long 0x08 1. " PIN[65] , Enables XGPIO pin 65" "Output,Input" bitfld.long 0x08 0. " PIN[64] , Enables XGPIO pin 64" "Output,Input" line.long 0x0C "GPIO_EN3, XGPIO Pad Enable Register" bitfld.long 0x0C 31. " PIN[127] , Enables XGPIO pin 127" "Output,Input" bitfld.long 0x0C 30. " PIN[126] , Enables XGPIO pin 126" "Output,Input" textline " " bitfld.long 0x0C 29. " PIN[125] , Enables XGPIO pin 125" "Output,Input" bitfld.long 0x0C 28. " PIN[124] , Enables XGPIO pin 124" "Output,Input" textline " " bitfld.long 0x0C 27. " PIN[123] , Enables XGPIO pin 123" "Output,Input" bitfld.long 0x0C 26. " PIN[122] , Enables XGPIO pin 122" "Output,Input" textline " " bitfld.long 0x0C 25. " PIN[121] , Enables XGPIO pin 121" "Output,Input" bitfld.long 0x0C 24. " PIN[120] , Enables XGPIO pin 120" "Output,Input" textline " " bitfld.long 0x0C 23. " PIN[119] , Enables XGPIO pin 119" "Output,Input" bitfld.long 0x0C 22. " PIN[118] , Enables XGPIO pin 118" "Output,Input" textline " " bitfld.long 0x0C 21. " PIN[117] , Enables XGPIO pin 117" "Output,Input" bitfld.long 0x0C 20. " PIN[116] , Enables XGPIO pin 116" "Output,Input" textline " " bitfld.long 0x0C 19. " PIN[115] , Enables XGPIO pin 115" "Output,Input" bitfld.long 0x0C 18. " PIN[114] , Enables XGPIO pin 114" "Output,Input" textline " " bitfld.long 0x0C 17. " PIN[113] , Enables XGPIO pin 113" "Output,Input" bitfld.long 0x0C 16. " PIN[112] , Enables XGPIO pin 112" "Output,Input" textline " " bitfld.long 0x0C 15. " PIN[111] , Enables XGPIO pin 111" "Output,Input" bitfld.long 0x0C 14. " PIN[110] , Enables XGPIO pin 110" "Output,Input" textline " " bitfld.long 0x0C 13. " PIN[109] , Enables XGPIO pin 109" "Output,Input" bitfld.long 0x0C 12. " PIN[108] , Enables XGPIO pin 108" "Output,Input" textline " " bitfld.long 0x0C 11. " PIN[107] , Enables XGPIO pin 107" "Output,Input" bitfld.long 0x0C 10. " PIN[106] , Enables XGPIO pin 106" "Output,Input" textline " " bitfld.long 0x0C 9. " PIN[105] , Enables XGPIO pin 105" "Output,Input" bitfld.long 0x0C 8. " PIN[104] , Enables XGPIO pin 104" "Output,Input" textline " " bitfld.long 0x0C 7. " PIN[103] , Enables XGPIO pin 103" "Output,Input" bitfld.long 0x0C 6. " PIN[102] , Enables XGPIO pin 102" "Output,Input" textline " " bitfld.long 0x0C 5. " PIN[101] , Enables XGPIO pin 101" "Output,Input" bitfld.long 0x0C 4. " PIN[100] , Enables XGPIO pin 100" "Output,Input" textline " " bitfld.long 0x0C 3. " PIN[99] , Enables XGPIO pin 99" "Output,Input" bitfld.long 0x0C 2. " PIN[98] , Enables XGPIO pin 98" "Output,Input" textline " " bitfld.long 0x0C 1. " PIN[97] , Enables XGPIO pin 97" "Output,Input" bitfld.long 0x0C 0. " PIN[96] , Enables XGPIO pin 96" "Output,Input" line.long 0x10 "GPIO_EN4, XGPIO Pad Enable Register" bitfld.long 0x10 31. " PIN[159] , Enables XGPIO pin 159" "Output,Input" bitfld.long 0x10 30. " PIN[158] , Enables XGPIO pin 158" "Output,Input" textline " " bitfld.long 0x10 29. " PIN[157] , Enables XGPIO pin 157" "Output,Input" bitfld.long 0x10 28. " PIN[156] , Enables XGPIO pin 156" "Output,Input" textline " " bitfld.long 0x10 27. " PIN[155] , Enables XGPIO pin 155" "Output,Input" bitfld.long 0x10 26. " PIN[154] , Enables XGPIO pin 154" "Output,Input" textline " " bitfld.long 0x10 25. " PIN[153] , Enables XGPIO pin 153" "Output,Input" bitfld.long 0x10 24. " PIN[152] , Enables XGPIO pin 152" "Output,Input" textline " " bitfld.long 0x10 23. " PIN[151] , Enables XGPIO pin 151" "Output,Input" bitfld.long 0x10 22. " PIN[150] , Enables XGPIO pin 150" "Output,Input" textline " " bitfld.long 0x10 21. " PIN[149] , Enables XGPIO pin 149" "Output,Input" bitfld.long 0x10 20. " PIN[148] , Enables XGPIO pin 148" "Output,Input" textline " " bitfld.long 0x10 19. " PIN[147] , Enables XGPIO pin 147" "Output,Input" bitfld.long 0x10 18. " PIN[146] , Enables XGPIO pin 146" "Output,Input" textline " " bitfld.long 0x10 17. " PIN[145] , Enables XGPIO pin 145" "Output,Input" bitfld.long 0x10 16. " PIN[144] , Enables XGPIO pin 144" "Output,Input" textline " " bitfld.long 0x10 15. " PIN[143] , Enables XGPIO pin 143" "Output,Input" bitfld.long 0x10 14. " PIN[142] , Enables XGPIO pin 142" "Output,Input" textline " " bitfld.long 0x10 13. " PIN[141] , Enables XGPIO pin 141" "Output,Input" bitfld.long 0x10 12. " PIN[140] , Enables XGPIO pin 140" "Output,Input" textline " " bitfld.long 0x10 11. " PIN[139] , Enables XGPIO pin 139" "Output,Input" bitfld.long 0x10 10. " PIN[138] , Enables XGPIO pin 138" "Output,Input" textline " " bitfld.long 0x10 9. " PIN[137] , Enables XGPIO pin 137" "Output,Input" bitfld.long 0x10 8. " PIN[136] , Enables XGPIO pin 136" "Output,Input" textline " " bitfld.long 0x10 7. " PIN[135] , Enables XGPIO pin 135" "Output,Input" bitfld.long 0x10 6. " PIN[134] , Enables XGPIO pin 134" "Output,Input" textline " " bitfld.long 0x10 5. " PIN[133] , Enables XGPIO pin 133" "Output,Input" bitfld.long 0x10 4. " PIN[132] , Enables XGPIO pin 132" "Output,Input" textline " " bitfld.long 0x10 3. " PIN[131] , Enables XGPIO pin 131" "Output,Input" bitfld.long 0x10 2. " PIN[130] , Enables XGPIO pin 130" "Output,Input" textline " " bitfld.long 0x10 1. " PIN[129] , Enables XGPIO pin 129" "Output,Input" bitfld.long 0x10 0. " PIN[128] , Enables XGPIO pin 128" "Output,Input" line.long 0x14 "GPIO_EN5, XGPIO Pad Enable Register" bitfld.long 0x14 31. " PIN[191] , Enables XGPIO pin 191" "Output,Input" bitfld.long 0x14 30. " PIN[190] , Enables XGPIO pin 190" "Output,Input" textline " " bitfld.long 0x14 29. " PIN[189] , Enables XGPIO pin 189" "Output,Input" bitfld.long 0x14 28. " PIN[188] , Enables XGPIO pin 188" "Output,Input" textline " " bitfld.long 0x14 27. " PIN[187] , Enables XGPIO pin 187" "Output,Input" bitfld.long 0x14 26. " PIN[186] , Enables XGPIO pin 186" "Output,Input" textline " " bitfld.long 0x14 25. " PIN[185] , Enables XGPIO pin 185" "Output,Input" bitfld.long 0x14 24. " PIN[184] , Enables XGPIO pin 184" "Output,Input" textline " " bitfld.long 0x14 23. " PIN[183] , Enables XGPIO pin 183" "Output,Input" bitfld.long 0x14 22. " PIN[182] , Enables XGPIO pin 182" "Output,Input" textline " " bitfld.long 0x14 21. " PIN[181] , Enables XGPIO pin 181" "Output,Input" bitfld.long 0x14 20. " PIN[180] , Enables XGPIO pin 180" "Output,Input" textline " " bitfld.long 0x14 19. " PIN[179] , Enables XGPIO pin 179" "Output,Input" bitfld.long 0x14 18. " PIN[178] , Enables XGPIO pin 178" "Output,Input" textline " " bitfld.long 0x14 17. " PIN[177] , Enables XGPIO pin 177" "Output,Input" bitfld.long 0x14 16. " PIN[176] , Enables XGPIO pin 176" "Output,Input" textline " " bitfld.long 0x14 15. " PIN[175] , Enables XGPIO pin 175" "Output,Input" bitfld.long 0x14 14. " PIN[174] , Enables XGPIO pin 174" "Output,Input" textline " " bitfld.long 0x14 13. " PIN[173] , Enables XGPIO pin 173" "Output,Input" bitfld.long 0x14 12. " PIN[172] , Enables XGPIO pin 172" "Output,Input" textline " " bitfld.long 0x14 11. " PIN[171] , Enables XGPIO pin 171" "Output,Input" bitfld.long 0x14 10. " PIN[170] , Enables XGPIO pin 170" "Output,Input" textline " " bitfld.long 0x14 9. " PIN[169] , Enables XGPIO pin 169" "Output,Input" bitfld.long 0x14 8. " PIN[168] , Enables XGPIO pin 168" "Output,Input" textline " " bitfld.long 0x14 7. " PIN[167] , Enables XGPIO pin 167" "Output,Input" bitfld.long 0x14 6. " PIN[166] , Enables XGPIO pin 166" "Output,Input" textline " " bitfld.long 0x14 5. " PIN[165] , Enables XGPIO pin 165" "Output,Input" bitfld.long 0x14 4. " PIN[164] , Enables XGPIO pin 164" "Output,Input" textline " " bitfld.long 0x14 3. " PIN[163] , Enables XGPIO pin 163" "Output,Input" bitfld.long 0x14 2. " PIN[162] , Enables XGPIO pin 162" "Output,Input" textline " " bitfld.long 0x14 1. " PIN[161] , Enables XGPIO pin 161" "Output,Input" bitfld.long 0x14 0. " PIN[160] , Enables XGPIO pin 160" "Output,Input" line.long 0x18 "GPIO_EN6, XGPIO Pad Enable Register" bitfld.long 0x18 31. " PIN[223] , Enables XGPIO pin 223" "Output,Input" bitfld.long 0x18 30. " PIN[222] , Enables XGPIO pin 222" "Output,Input" textline " " bitfld.long 0x18 29. " PIN[221] , Enables XGPIO pin 221" "Output,Input" bitfld.long 0x18 28. " PIN[220] , Enables XGPIO pin 220" "Output,Input" textline " " bitfld.long 0x18 27. " PIN[219] , Enables XGPIO pin 219" "Output,Input" bitfld.long 0x18 26. " PIN[218] , Enables XGPIO pin 218" "Output,Input" textline " " bitfld.long 0x18 25. " PIN[217] , Enables XGPIO pin 217" "Output,Input" bitfld.long 0x18 24. " PIN[216] , Enables XGPIO pin 216" "Output,Input" textline " " bitfld.long 0x18 23. " PIN[215] , Enables XGPIO pin 215" "Output,Input" bitfld.long 0x18 22. " PIN[214] , Enables XGPIO pin 214" "Output,Input" textline " " bitfld.long 0x18 21. " PIN[213] , Enables XGPIO pin 213" "Output,Input" bitfld.long 0x18 20. " PIN[212] , Enables XGPIO pin 212" "Output,Input" textline " " bitfld.long 0x18 19. " PIN[211] , Enables XGPIO pin 211" "Output,Input" bitfld.long 0x18 18. " PIN[210] , Enables XGPIO pin 210" "Output,Input" textline " " bitfld.long 0x18 17. " PIN[209] , Enables XGPIO pin 209" "Output,Input" bitfld.long 0x18 16. " PIN[208] , Enables XGPIO pin 208" "Output,Input" textline " " bitfld.long 0x18 15. " PIN[207] , Enables XGPIO pin 207" "Output,Input" bitfld.long 0x18 14. " PIN[206] , Enables XGPIO pin 206" "Output,Input" textline " " bitfld.long 0x18 13. " PIN[205] , Enables XGPIO pin 205" "Output,Input" bitfld.long 0x18 12. " PIN[204] , Enables XGPIO pin 204" "Output,Input" textline " " bitfld.long 0x18 11. " PIN[203] , Enables XGPIO pin 203" "Output,Input" bitfld.long 0x18 10. " PIN[202] , Enables XGPIO pin 202" "Output,Input" textline " " bitfld.long 0x18 9. " PIN[201] , Enables XGPIO pin 201" "Output,Input" bitfld.long 0x18 8. " PIN[200] , Enables XGPIO pin 200" "Output,Input" textline " " bitfld.long 0x18 7. " PIN[199] , Enables XGPIO pin 199" "Output,Input" bitfld.long 0x18 6. " PIN[198] , Enables XGPIO pin 198" "Output,Input" textline " " bitfld.long 0x18 5. " PIN[197] , Enables XGPIO pin 197" "Output,Input" bitfld.long 0x18 4. " PIN[196] , Enables XGPIO pin 196" "Output,Input" textline " " bitfld.long 0x18 3. " PIN[195] , Enables XGPIO pin 195" "Output,Input" bitfld.long 0x18 2. " PIN[194] , Enables XGPIO pin 194" "Output,Input" textline " " bitfld.long 0x18 1. " PIN[193] , Enables XGPIO pin 193" "Output,Input" bitfld.long 0x18 0. " PIN[192] , Enables XGPIO pin 192" "Output,Input" line.long 0x1C "GPIO_EN7, XGPIO Pad Enable Register" hexmask.long 0x1C 0.--25. 1. " GPIO_EN7 , XGPIO Pad Enable Register" rgroup.long 0x20++0x1F line.long 0x00 "GPIO_IN0, XGPIO Pad Input Register" bitfld.long 0x00 31. " PIN[31] , Input from XGPIO pin 31" "Low,High" bitfld.long 0x00 30. " PIN[30] , Input from XGPIO pin 30" "Low,High" textline " " bitfld.long 0x00 29. " PIN[29] , Input from XGPIO pin 29" "Low,High" bitfld.long 0x00 28. " PIN[28] , Input from XGPIO pin 28" "Low,High" textline " " bitfld.long 0x00 27. " PIN[27] , Input from XGPIO pin 27" "Low,High" bitfld.long 0x00 26. " PIN[26] , Input from XGPIO pin 26" "Low,High" textline " " bitfld.long 0x00 25. " PIN[25] , Input from XGPIO pin 25" "Low,High" bitfld.long 0x00 24. " PIN[24] , Input from XGPIO pin 24" "Low,High" textline " " bitfld.long 0x00 7. " PIN[7] , Input from XGPIO pin 7" "Low,High" bitfld.long 0x00 6. " PIN[6] , Input from XGPIO pin 6" "Low,High" textline " " bitfld.long 0x00 5. " PIN[5] , Input from XGPIO pin 5" "Low,High" bitfld.long 0x00 4. " PIN[4] , Input from XGPIO pin 4" "Low,High" textline " " bitfld.long 0x00 3. " PIN[3] , Input from XGPIO pin 3" "Low,High" bitfld.long 0x00 2. " PIN[2] , Input from XGPIO pin 2" "Low,High" textline " " bitfld.long 0x00 1. " PIN[1] , Input from XGPIO pin 1" "Low,High" bitfld.long 0x00 0. " PIN[0] , Input from XGPIO pin 0" "Low,High" line.long 0x04 "GPIO_IN1, XGPIO Pad Input Register" bitfld.long 0x04 31. " PIN[63] , Input from XGPIO pin 63" "Low,High" bitfld.long 0x04 30. " PIN[62] , Input from XGPIO pin 62" "Low,High" textline " " bitfld.long 0x04 29. " PIN[61] , Input from XGPIO pin 61" "Low,High" bitfld.long 0x04 28. " PIN[60] , Input from XGPIO pin 60" "Low,High" textline " " bitfld.long 0x04 27. " PIN[59] , Input from XGPIO pin 59" "Low,High" bitfld.long 0x04 26. " PIN[58] , Input from XGPIO pin 58" "Low,High" textline " " bitfld.long 0x04 25. " PIN[57] , Input from XGPIO pin 57" "Low,High" bitfld.long 0x04 24. " PIN[56] , Input from XGPIO pin 56" "Low,High" textline " " bitfld.long 0x04 23. " PIN[55] , Input from XGPIO pin 55" "Low,High" bitfld.long 0x04 22. " PIN[54] , Input from XGPIO pin 54" "Low,High" textline " " bitfld.long 0x04 21. " PIN[53] , Input from XGPIO pin 53" "Low,High" bitfld.long 0x04 20. " PIN[52] , Input from XGPIO pin 52" "Low,High" textline " " bitfld.long 0x04 19. " PIN[51] , Input from XGPIO pin 51" "Low,High" bitfld.long 0x04 18. " PIN[50] , Input from XGPIO pin 50" "Low,High" textline " " bitfld.long 0x04 17. " PIN[49] , Input from XGPIO pin 49" "Low,High" bitfld.long 0x04 16. " PIN[48] , Input from XGPIO pin 48" "Low,High" textline " " bitfld.long 0x04 15. " PIN[47] , Input from XGPIO pin 47" "Low,High" bitfld.long 0x04 14. " PIN[46] , Input from XGPIO pin 46" "Low,High" textline " " bitfld.long 0x04 13. " PIN[45] , Input from XGPIO pin 45" "Low,High" bitfld.long 0x04 12. " PIN[44] , Input from XGPIO pin 44" "Low,High" textline " " bitfld.long 0x04 11. " PIN[43] , Input from XGPIO pin 43" "Low,High" bitfld.long 0x04 10. " PIN[42] , Input from XGPIO pin 42" "Low,High" textline " " bitfld.long 0x04 9. " PIN[41] , Input from XGPIO pin 41" "Low,High" bitfld.long 0x04 8. " PIN[40] , Input from XGPIO pin 40" "Low,High" textline " " bitfld.long 0x04 7. " PIN[39] , Input from XGPIO pin 39" "Low,High" bitfld.long 0x04 6. " PIN[38] , Input from XGPIO pin 38" "Low,High" textline " " bitfld.long 0x04 5. " PIN[37] , Input from XGPIO pin 37" "Low,High" bitfld.long 0x04 4. " PIN[36] , Input from XGPIO pin 36" "Low,High" textline " " bitfld.long 0x04 3. " PIN[35] , Input from XGPIO pin 35" "Low,High" bitfld.long 0x04 2. " PIN[34] , Input from XGPIO pin 34" "Low,High" textline " " bitfld.long 0x04 1. " PIN[33] , Input from XGPIO pin 33" "Low,High" bitfld.long 0x04 0. " PIN[32] , Input from XGPIO pin 32" "Low,High" line.long 0x08 "GPIO_IN2, XGPIO Pad Input Register" bitfld.long 0x08 31. " PIN[95] , Input from XGPIO pin 95" "Low,High" bitfld.long 0x08 30. " PIN[94] , Input from XGPIO pin 94" "Low,High" textline " " bitfld.long 0x08 29. " PIN[93] , Input from XGPIO pin 93" "Low,High" bitfld.long 0x08 28. " PIN[92] , Input from XGPIO pin 92" "Low,High" textline " " bitfld.long 0x08 27. " PIN[91] , Input from XGPIO pin 91" "Low,High" bitfld.long 0x08 26. " PIN[90] , Input from XGPIO pin 90" "Low,High" textline " " bitfld.long 0x08 25. " PIN[89] , Input from XGPIO pin 89" "Low,High" bitfld.long 0x08 24. " PIN[88] , Input from XGPIO pin 88" "Low,High" textline " " bitfld.long 0x08 23. " PIN[87] , Input from XGPIO pin 87" "Low,High" bitfld.long 0x08 22. " PIN[86] , Input from XGPIO pin 86" "Low,High" textline " " bitfld.long 0x08 21. " PIN[85] , Input from XGPIO pin 85" "Low,High" bitfld.long 0x08 20. " PIN[84] , Input from XGPIO pin 84" "Low,High" textline " " bitfld.long 0x08 19. " PIN[83] , Input from XGPIO pin 83" "Low,High" bitfld.long 0x08 18. " PIN[82] , Input from XGPIO pin 82" "Low,High" textline " " bitfld.long 0x08 17. " PIN[81] , Input from XGPIO pin 81" "Low,High" bitfld.long 0x08 16. " PIN[80] , Input from XGPIO pin 80" "Low,High" textline " " bitfld.long 0x08 15. " PIN[79] , Input from XGPIO pin 79" "Low,High" bitfld.long 0x08 14. " PIN[78] , Input from XGPIO pin 78" "Low,High" textline " " bitfld.long 0x08 13. " PIN[77] , Input from XGPIO pin 77" "Low,High" bitfld.long 0x08 12. " PIN[76] , Input from XGPIO pin 76" "Low,High" textline " " bitfld.long 0x08 11. " PIN[75] , Input from XGPIO pin 75" "Low,High" bitfld.long 0x08 10. " PIN[74] , Input from XGPIO pin 74" "Low,High" textline " " bitfld.long 0x08 9. " PIN[73] , Input from XGPIO pin 73" "Low,High" bitfld.long 0x08 8. " PIN[72] , Input from XGPIO pin 72" "Low,High" textline " " bitfld.long 0x08 7. " PIN[71] , Input from XGPIO pin 71" "Low,High" bitfld.long 0x08 6. " PIN[70] , Input from XGPIO pin 70" "Low,High" textline " " bitfld.long 0x08 5. " PIN[69] , Input from XGPIO pin 69" "Low,High" bitfld.long 0x08 4. " PIN[68] , Input from XGPIO pin 68" "Low,High" textline " " bitfld.long 0x08 3. " PIN[67] , Input from XGPIO pin 67" "Low,High" bitfld.long 0x08 2. " PIN[66] , Input from XGPIO pin 66" "Low,High" textline " " bitfld.long 0x08 1. " PIN[65] , Input from XGPIO pin 65" "Low,High" bitfld.long 0x08 0. " PIN[64] , Input from XGPIO pin 64" "Low,High" line.long 0x0C "GPIO_IN3, XGPIO Pad Input Register" bitfld.long 0x0C 31. " PIN[127] , Input from XGPIO pin 127" "Low,High" bitfld.long 0x0C 30. " PIN[126] , Input from XGPIO pin 126" "Low,High" textline " " bitfld.long 0x0C 29. " PIN[125] , Input from XGPIO pin 125" "Low,High" bitfld.long 0x0C 28. " PIN[124] , Input from XGPIO pin 124" "Low,High" textline " " bitfld.long 0x0C 27. " PIN[123] , Input from XGPIO pin 123" "Low,High" bitfld.long 0x0C 26. " PIN[122] , Input from XGPIO pin 122" "Low,High" textline " " bitfld.long 0x0C 25. " PIN[121] , Input from XGPIO pin 121" "Low,High" bitfld.long 0x0C 24. " PIN[120] , Input from XGPIO pin 120" "Low,High" textline " " bitfld.long 0x0C 23. " PIN[119] , Input from XGPIO pin 119" "Low,High" bitfld.long 0x0C 22. " PIN[118] , Input from XGPIO pin 118" "Low,High" textline " " bitfld.long 0x0C 21. " PIN[117] , Input from XGPIO pin 117" "Low,High" bitfld.long 0x0C 20. " PIN[116] , Input from XGPIO pin 116" "Low,High" textline " " bitfld.long 0x0C 19. " PIN[115] , Input from XGPIO pin 115" "Low,High" bitfld.long 0x0C 18. " PIN[114] , Input from XGPIO pin 114" "Low,High" textline " " bitfld.long 0x0C 17. " PIN[113] , Input from XGPIO pin 113" "Low,High" bitfld.long 0x0C 16. " PIN[112] , Input from XGPIO pin 112" "Low,High" textline " " bitfld.long 0x0C 15. " PIN[111] , Input from XGPIO pin 111" "Low,High" bitfld.long 0x0C 14. " PIN[110] , Input from XGPIO pin 110" "Low,High" textline " " bitfld.long 0x0C 13. " PIN[109] , Input from XGPIO pin 109" "Low,High" bitfld.long 0x0C 12. " PIN[108] , Input from XGPIO pin 108" "Low,High" textline " " bitfld.long 0x0C 11. " PIN[107] , Input from XGPIO pin 107" "Low,High" bitfld.long 0x0C 10. " PIN[106] , Input from XGPIO pin 106" "Low,High" textline " " bitfld.long 0x0C 9. " PIN[105] , Input from XGPIO pin 105" "Low,High" bitfld.long 0x0C 8. " PIN[104] , Input from XGPIO pin 104" "Low,High" textline " " bitfld.long 0x0C 7. " PIN[103] , Input from XGPIO pin 103" "Low,High" bitfld.long 0x0C 6. " PIN[102] , Input from XGPIO pin 102" "Low,High" textline " " bitfld.long 0x0C 5. " PIN[101] , Input from XGPIO pin 101" "Low,High" bitfld.long 0x0C 4. " PIN[100] , Input from XGPIO pin 100" "Low,High" textline " " bitfld.long 0x0C 3. " PIN[99] , Input from XGPIO pin 99" "Low,High" bitfld.long 0x0C 2. " PIN[98] , Input from XGPIO pin 98" "Low,High" textline " " bitfld.long 0x0C 1. " PIN[97] , Input from XGPIO pin 97" "Low,High" bitfld.long 0x0C 0. " PIN[96] , Input from XGPIO pin 96" "Low,High" line.long 0x10 "GPIO_IN4, XGPIO Pad Input Register" bitfld.long 0x10 31. " PIN[159] , Input from XGPIO pin 159" "Low,High" bitfld.long 0x10 30. " PIN[158] , Input from XGPIO pin 158" "Low,High" textline " " bitfld.long 0x10 29. " PIN[157] , Input from XGPIO pin 157" "Low,High" bitfld.long 0x10 28. " PIN[156] , Input from XGPIO pin 156" "Low,High" textline " " bitfld.long 0x10 27. " PIN[155] , Input from XGPIO pin 155" "Low,High" bitfld.long 0x10 26. " PIN[154] , Input from XGPIO pin 154" "Low,High" textline " " bitfld.long 0x10 25. " PIN[153] , Input from XGPIO pin 153" "Low,High" bitfld.long 0x10 24. " PIN[152] , Input from XGPIO pin 152" "Low,High" textline " " bitfld.long 0x10 23. " PIN[151] , Input from XGPIO pin 151" "Low,High" bitfld.long 0x10 22. " PIN[150] , Input from XGPIO pin 150" "Low,High" textline " " bitfld.long 0x10 21. " PIN[149] , Input from XGPIO pin 149" "Low,High" bitfld.long 0x10 20. " PIN[148] , Input from XGPIO pin 148" "Low,High" textline " " bitfld.long 0x10 19. " PIN[147] , Input from XGPIO pin 147" "Low,High" bitfld.long 0x10 18. " PIN[146] , Input from XGPIO pin 146" "Low,High" textline " " bitfld.long 0x10 17. " PIN[145] , Input from XGPIO pin 145" "Low,High" bitfld.long 0x10 16. " PIN[144] , Input from XGPIO pin 144" "Low,High" textline " " bitfld.long 0x10 15. " PIN[143] , Input from XGPIO pin 143" "Low,High" bitfld.long 0x10 14. " PIN[142] , Input from XGPIO pin 142" "Low,High" textline " " bitfld.long 0x10 13. " PIN[141] , Input from XGPIO pin 141" "Low,High" bitfld.long 0x10 12. " PIN[140] , Input from XGPIO pin 140" "Low,High" textline " " bitfld.long 0x10 11. " PIN[139] , Input from XGPIO pin 139" "Low,High" bitfld.long 0x10 10. " PIN[138] , Input from XGPIO pin 138" "Low,High" textline " " bitfld.long 0x10 9. " PIN[137] , Input from XGPIO pin 137" "Low,High" bitfld.long 0x10 8. " PIN[136] , Input from XGPIO pin 136" "Low,High" textline " " bitfld.long 0x10 7. " PIN[135] , Input from XGPIO pin 135" "Low,High" bitfld.long 0x10 6. " PIN[134] , Input from XGPIO pin 134" "Low,High" textline " " bitfld.long 0x10 5. " PIN[133] , Input from XGPIO pin 133" "Low,High" bitfld.long 0x10 4. " PIN[132] , Input from XGPIO pin 132" "Low,High" textline " " bitfld.long 0x10 3. " PIN[131] , Input from XGPIO pin 131" "Low,High" bitfld.long 0x10 2. " PIN[130] , Input from XGPIO pin 130" "Low,High" textline " " bitfld.long 0x10 1. " PIN[129] , Input from XGPIO pin 129" "Low,High" bitfld.long 0x10 0. " PIN[128] , Input from XGPIO pin 128" "Low,High" line.long 0x14 "GPIO_IN5, XGPIO Pad Input Register" bitfld.long 0x14 31. " PIN[191] , Input from XGPIO pin 191" "Low,High" bitfld.long 0x14 30. " PIN[190] , Input from XGPIO pin 190" "Low,High" textline " " bitfld.long 0x14 29. " PIN[189] , Input from XGPIO pin 189" "Low,High" bitfld.long 0x14 28. " PIN[188] , Input from XGPIO pin 188" "Low,High" textline " " bitfld.long 0x14 27. " PIN[187] , Input from XGPIO pin 187" "Low,High" bitfld.long 0x14 26. " PIN[186] , Input from XGPIO pin 186" "Low,High" textline " " bitfld.long 0x14 25. " PIN[185] , Input from XGPIO pin 185" "Low,High" bitfld.long 0x14 24. " PIN[184] , Input from XGPIO pin 184" "Low,High" textline " " bitfld.long 0x14 23. " PIN[183] , Input from XGPIO pin 183" "Low,High" bitfld.long 0x14 22. " PIN[182] , Input from XGPIO pin 182" "Low,High" textline " " bitfld.long 0x14 21. " PIN[181] , Input from XGPIO pin 181" "Low,High" bitfld.long 0x14 20. " PIN[180] , Input from XGPIO pin 180" "Low,High" textline " " bitfld.long 0x14 19. " PIN[179] , Input from XGPIO pin 179" "Low,High" bitfld.long 0x14 18. " PIN[178] , Input from XGPIO pin 178" "Low,High" textline " " bitfld.long 0x14 17. " PIN[177] , Input from XGPIO pin 177" "Low,High" bitfld.long 0x14 16. " PIN[176] , Input from XGPIO pin 176" "Low,High" textline " " bitfld.long 0x14 15. " PIN[175] , Input from XGPIO pin 175" "Low,High" bitfld.long 0x14 14. " PIN[174] , Input from XGPIO pin 174" "Low,High" textline " " bitfld.long 0x14 13. " PIN[173] , Input from XGPIO pin 173" "Low,High" bitfld.long 0x14 12. " PIN[172] , Input from XGPIO pin 172" "Low,High" textline " " bitfld.long 0x14 11. " PIN[171] , Input from XGPIO pin 171" "Low,High" bitfld.long 0x14 10. " PIN[170] , Input from XGPIO pin 170" "Low,High" textline " " bitfld.long 0x14 9. " PIN[169] , Input from XGPIO pin 169" "Low,High" bitfld.long 0x14 8. " PIN[168] , Input from XGPIO pin 168" "Low,High" textline " " bitfld.long 0x14 7. " PIN[167] , Input from XGPIO pin 167" "Low,High" bitfld.long 0x14 6. " PIN[166] , Input from XGPIO pin 166" "Low,High" textline " " bitfld.long 0x14 5. " PIN[165] , Input from XGPIO pin 165" "Low,High" bitfld.long 0x14 4. " PIN[164] , Input from XGPIO pin 164" "Low,High" textline " " bitfld.long 0x14 3. " PIN[163] , Input from XGPIO pin 163" "Low,High" bitfld.long 0x14 2. " PIN[162] , Input from XGPIO pin 162" "Low,High" textline " " bitfld.long 0x14 1. " PIN[161] , Input from XGPIO pin 161" "Low,High" bitfld.long 0x14 0. " PIN[160] , Input from XGPIO pin 160" "Low,High" line.long 0x18 "GPIO_IN6, XGPIO Pad Input Register" bitfld.long 0x18 31. " PIN[223] , Input from XGPIO pin 223" "Low,High" bitfld.long 0x18 30. " PIN[222] , Input from XGPIO pin 222" "Low,High" textline " " bitfld.long 0x18 29. " PIN[221] , Input from XGPIO pin 221" "Low,High" bitfld.long 0x18 28. " PIN[220] , Input from XGPIO pin 220" "Low,High" textline " " bitfld.long 0x18 27. " PIN[219] , Input from XGPIO pin 219" "Low,High" bitfld.long 0x18 26. " PIN[218] , Input from XGPIO pin 218" "Low,High" textline " " bitfld.long 0x18 25. " PIN[217] , Input from XGPIO pin 217" "Low,High" bitfld.long 0x18 24. " PIN[216] , Input from XGPIO pin 216" "Low,High" textline " " bitfld.long 0x18 23. " PIN[215] , Input from XGPIO pin 215" "Low,High" bitfld.long 0x18 22. " PIN[214] , Input from XGPIO pin 214" "Low,High" textline " " bitfld.long 0x18 21. " PIN[213] , Input from XGPIO pin 213" "Low,High" bitfld.long 0x18 20. " PIN[212] , Input from XGPIO pin 212" "Low,High" textline " " bitfld.long 0x18 19. " PIN[211] , Input from XGPIO pin 211" "Low,High" bitfld.long 0x18 18. " PIN[210] , Input from XGPIO pin 210" "Low,High" textline " " bitfld.long 0x18 17. " PIN[209] , Input from XGPIO pin 209" "Low,High" bitfld.long 0x18 16. " PIN[208] , Input from XGPIO pin 208" "Low,High" textline " " bitfld.long 0x18 15. " PIN[207] , Input from XGPIO pin 207" "Low,High" bitfld.long 0x18 14. " PIN[206] , Input from XGPIO pin 206" "Low,High" textline " " bitfld.long 0x18 13. " PIN[205] , Input from XGPIO pin 205" "Low,High" bitfld.long 0x18 12. " PIN[204] , Input from XGPIO pin 204" "Low,High" textline " " bitfld.long 0x18 11. " PIN[203] , Input from XGPIO pin 203" "Low,High" bitfld.long 0x18 10. " PIN[202] , Input from XGPIO pin 202" "Low,High" textline " " bitfld.long 0x18 9. " PIN[201] , Input from XGPIO pin 201" "Low,High" bitfld.long 0x18 8. " PIN[200] , Input from XGPIO pin 200" "Low,High" textline " " bitfld.long 0x18 7. " PIN[199] , Input from XGPIO pin 199" "Low,High" bitfld.long 0x18 6. " PIN[198] , Input from XGPIO pin 198" "Low,High" textline " " bitfld.long 0x18 5. " PIN[197] , Input from XGPIO pin 197" "Low,High" bitfld.long 0x18 4. " PIN[196] , Input from XGPIO pin 196" "Low,High" textline " " bitfld.long 0x18 3. " PIN[195] , Input from XGPIO pin 195" "Low,High" bitfld.long 0x18 2. " PIN[194] , Input from XGPIO pin 194" "Low,High" textline " " bitfld.long 0x18 1. " PIN[193] , Input from XGPIO pin 193" "Low,High" bitfld.long 0x18 0. " PIN[192] , Input from XGPIO pin 192" "Low,High" line.long 0x1C "GPIO_IN7, XGPIO Input Register" hexmask.long 0x1C 0.--25. 1. " GPIO_IN7 , XGPIO Input Register" group.long 0x40++0x1F line.long 0x00 "GPIO_OUT0, XGPIO Pad Output Register" bitfld.long 0x00 31. " PIN[31] , Output from XGPIO pin 31" "Low,High" bitfld.long 0x00 30. " PIN[30] , Output from XGPIO pin 30" "Low,High" textline " " bitfld.long 0x00 29. " PIN[29] , Output from XGPIO pin 29" "Low,High" bitfld.long 0x00 28. " PIN[28] , Output from XGPIO pin 28" "Low,High" textline " " bitfld.long 0x00 27. " PIN[27] , Output from XGPIO pin 27" "Low,High" bitfld.long 0x00 26. " PIN[26] , Output from XGPIO pin 26" "Low,High" textline " " bitfld.long 0x00 25. " PIN[25] , Output from XGPIO pin 25" "Low,High" bitfld.long 0x00 24. " PIN[24] , Output from XGPIO pin 24" "Low,High" textline " " bitfld.long 0x00 7. " PIN[7] , Output from XGPIO pin 7" "Low,High" bitfld.long 0x00 6. " PIN[6] , Output from XGPIO pin 6" "Low,High" textline " " bitfld.long 0x00 5. " PIN[5] , Output from XGPIO pin 5" "Low,High" bitfld.long 0x00 4. " PIN[4] , Output from XGPIO pin 4" "Low,High" textline " " bitfld.long 0x00 3. " PIN[3] , Output from XGPIO pin 3" "Low,High" bitfld.long 0x00 2. " PIN[2] , Output from XGPIO pin 2" "Low,High" textline " " bitfld.long 0x00 1. " PIN[1] , Output from XGPIO pin 1" "Low,High" bitfld.long 0x00 0. " PIN[0] , Output from XGPIO pin 0" "Low,High" line.long 0x04 "GPIO_OUT1, XGPIO Pad Output Register" bitfld.long 0x04 31. " PIN[63] , Output from XGPIO pin 63" "Low,High" bitfld.long 0x04 30. " PIN[62] , Output from XGPIO pin 62" "Low,High" textline " " bitfld.long 0x04 29. " PIN[61] , Output from XGPIO pin 61" "Low,High" bitfld.long 0x04 28. " PIN[60] , Output from XGPIO pin 60" "Low,High" textline " " bitfld.long 0x04 27. " PIN[59] , Output from XGPIO pin 59" "Low,High" bitfld.long 0x04 26. " PIN[58] , Output from XGPIO pin 58" "Low,High" textline " " bitfld.long 0x04 25. " PIN[57] , Output from XGPIO pin 57" "Low,High" bitfld.long 0x04 24. " PIN[56] , Output from XGPIO pin 56" "Low,High" textline " " bitfld.long 0x04 23. " PIN[55] , Output from XGPIO pin 55" "Low,High" bitfld.long 0x04 22. " PIN[54] , Output from XGPIO pin 54" "Low,High" textline " " bitfld.long 0x04 21. " PIN[53] , Output from XGPIO pin 53" "Low,High" bitfld.long 0x04 20. " PIN[52] , Output from XGPIO pin 52" "Low,High" textline " " bitfld.long 0x04 19. " PIN[51] , Output from XGPIO pin 51" "Low,High" bitfld.long 0x04 18. " PIN[50] , Output from XGPIO pin 50" "Low,High" textline " " bitfld.long 0x04 17. " PIN[49] , Output from XGPIO pin 49" "Low,High" bitfld.long 0x04 16. " PIN[48] , Output from XGPIO pin 48" "Low,High" textline " " bitfld.long 0x04 15. " PIN[47] , Output from XGPIO pin 47" "Low,High" bitfld.long 0x04 14. " PIN[46] , Output from XGPIO pin 46" "Low,High" textline " " bitfld.long 0x04 13. " PIN[45] , Output from XGPIO pin 45" "Low,High" bitfld.long 0x04 12. " PIN[44] , Output from XGPIO pin 44" "Low,High" textline " " bitfld.long 0x04 11. " PIN[43] , Output from XGPIO pin 43" "Low,High" bitfld.long 0x04 10. " PIN[42] , Output from XGPIO pin 42" "Low,High" textline " " bitfld.long 0x04 9. " PIN[41] , Output from XGPIO pin 41" "Low,High" bitfld.long 0x04 8. " PIN[40] , Output from XGPIO pin 40" "Low,High" textline " " bitfld.long 0x04 7. " PIN[39] , Output from XGPIO pin 39" "Low,High" bitfld.long 0x04 6. " PIN[38] , Output from XGPIO pin 38" "Low,High" textline " " bitfld.long 0x04 5. " PIN[37] , Output from XGPIO pin 37" "Low,High" bitfld.long 0x04 4. " PIN[36] , Output from XGPIO pin 36" "Low,High" textline " " bitfld.long 0x04 3. " PIN[35] , Output from XGPIO pin 35" "Low,High" bitfld.long 0x04 2. " PIN[34] , Output from XGPIO pin 34" "Low,High" textline " " bitfld.long 0x04 1. " PIN[33] , Output from XGPIO pin 33" "Low,High" bitfld.long 0x04 0. " PIN[32] , Output from XGPIO pin 32" "Low,High" line.long 0x08 "GPIO_OUT2, XGPIO Pad Output Register" bitfld.long 0x08 31. " PIN[95] , Output from XGPIO pin 95" "Low,High" bitfld.long 0x08 30. " PIN[94] , Output from XGPIO pin 94" "Low,High" textline " " bitfld.long 0x08 29. " PIN[93] , Output from XGPIO pin 93" "Low,High" bitfld.long 0x08 28. " PIN[92] , Output from XGPIO pin 92" "Low,High" textline " " bitfld.long 0x08 27. " PIN[91] , Output from XGPIO pin 91" "Low,High" bitfld.long 0x08 26. " PIN[90] , Output from XGPIO pin 90" "Low,High" textline " " bitfld.long 0x08 25. " PIN[89] , Output from XGPIO pin 89" "Low,High" bitfld.long 0x08 24. " PIN[88] , Output from XGPIO pin 88" "Low,High" textline " " bitfld.long 0x08 23. " PIN[87] , Output from XGPIO pin 87" "Low,High" bitfld.long 0x08 22. " PIN[86] , Output from XGPIO pin 86" "Low,High" textline " " bitfld.long 0x08 21. " PIN[85] , Output from XGPIO pin 85" "Low,High" bitfld.long 0x08 20. " PIN[84] , Output from XGPIO pin 84" "Low,High" textline " " bitfld.long 0x08 19. " PIN[83] , Output from XGPIO pin 83" "Low,High" bitfld.long 0x08 18. " PIN[82] , Output from XGPIO pin 82" "Low,High" textline " " bitfld.long 0x08 17. " PIN[81] , Output from XGPIO pin 81" "Low,High" bitfld.long 0x08 16. " PIN[80] , Output from XGPIO pin 80" "Low,High" textline " " bitfld.long 0x08 15. " PIN[79] , Output from XGPIO pin 79" "Low,High" bitfld.long 0x08 14. " PIN[78] , Output from XGPIO pin 78" "Low,High" textline " " bitfld.long 0x08 13. " PIN[77] , Output from XGPIO pin 77" "Low,High" bitfld.long 0x08 12. " PIN[76] , Output from XGPIO pin 76" "Low,High" textline " " bitfld.long 0x08 11. " PIN[75] , Output from XGPIO pin 75" "Low,High" bitfld.long 0x08 10. " PIN[74] , Output from XGPIO pin 74" "Low,High" textline " " bitfld.long 0x08 9. " PIN[73] , Output from XGPIO pin 73" "Low,High" bitfld.long 0x08 8. " PIN[72] , Output from XGPIO pin 72" "Low,High" textline " " bitfld.long 0x08 7. " PIN[71] , Output from XGPIO pin 71" "Low,High" bitfld.long 0x08 6. " PIN[70] , Output from XGPIO pin 70" "Low,High" textline " " bitfld.long 0x08 5. " PIN[69] , Output from XGPIO pin 69" "Low,High" bitfld.long 0x08 4. " PIN[68] , Output from XGPIO pin 68" "Low,High" textline " " bitfld.long 0x08 3. " PIN[67] , Output from XGPIO pin 67" "Low,High" bitfld.long 0x08 2. " PIN[66] , Output from XGPIO pin 66" "Low,High" textline " " bitfld.long 0x08 1. " PIN[65] , Output from XGPIO pin 65" "Low,High" bitfld.long 0x08 0. " PIN[64] , Output from XGPIO pin 64" "Low,High" line.long 0x0C "GPIO_OUT3, XGPIO Pad Output Register" bitfld.long 0x0C 31. " PIN[127] , Output from XGPIO pin 127" "Low,High" bitfld.long 0x0C 30. " PIN[126] , Output from XGPIO pin 126" "Low,High" textline " " bitfld.long 0x0C 29. " PIN[125] , Output from XGPIO pin 125" "Low,High" bitfld.long 0x0C 28. " PIN[124] , Output from XGPIO pin 124" "Low,High" textline " " bitfld.long 0x0C 27. " PIN[123] , Output from XGPIO pin 123" "Low,High" bitfld.long 0x0C 26. " PIN[122] , Output from XGPIO pin 122" "Low,High" textline " " bitfld.long 0x0C 25. " PIN[121] , Output from XGPIO pin 121" "Low,High" bitfld.long 0x0C 24. " PIN[120] , Output from XGPIO pin 120" "Low,High" textline " " bitfld.long 0x0C 23. " PIN[119] , Output from XGPIO pin 119" "Low,High" bitfld.long 0x0C 22. " PIN[118] , Output from XGPIO pin 118" "Low,High" textline " " bitfld.long 0x0C 21. " PIN[117] , Output from XGPIO pin 117" "Low,High" bitfld.long 0x0C 20. " PIN[116] , Output from XGPIO pin 116" "Low,High" textline " " bitfld.long 0x0C 19. " PIN[115] , Output from XGPIO pin 115" "Low,High" bitfld.long 0x0C 18. " PIN[114] , Output from XGPIO pin 114" "Low,High" textline " " bitfld.long 0x0C 17. " PIN[113] , Output from XGPIO pin 113" "Low,High" bitfld.long 0x0C 16. " PIN[112] , Output from XGPIO pin 112" "Low,High" textline " " bitfld.long 0x0C 15. " PIN[111] , Output from XGPIO pin 111" "Low,High" bitfld.long 0x0C 14. " PIN[110] , Output from XGPIO pin 110" "Low,High" textline " " bitfld.long 0x0C 13. " PIN[109] , Output from XGPIO pin 109" "Low,High" bitfld.long 0x0C 12. " PIN[108] , Output from XGPIO pin 108" "Low,High" textline " " bitfld.long 0x0C 11. " PIN[107] , Output from XGPIO pin 107" "Low,High" bitfld.long 0x0C 10. " PIN[106] , Output from XGPIO pin 106" "Low,High" textline " " bitfld.long 0x0C 9. " PIN[105] , Output from XGPIO pin 105" "Low,High" bitfld.long 0x0C 8. " PIN[104] , Output from XGPIO pin 104" "Low,High" textline " " bitfld.long 0x0C 7. " PIN[103] , Output from XGPIO pin 103" "Low,High" bitfld.long 0x0C 6. " PIN[102] , Output from XGPIO pin 102" "Low,High" textline " " bitfld.long 0x0C 5. " PIN[101] , Output from XGPIO pin 101" "Low,High" bitfld.long 0x0C 4. " PIN[100] , Output from XGPIO pin 100" "Low,High" textline " " bitfld.long 0x0C 3. " PIN[99] , Output from XGPIO pin 99" "Low,High" bitfld.long 0x0C 2. " PIN[98] , Output from XGPIO pin 98" "Low,High" textline " " bitfld.long 0x0C 1. " PIN[97] , Output from XGPIO pin 97" "Low,High" bitfld.long 0x0C 0. " PIN[96] , Output from XGPIO pin 96" "Low,High" line.long 0x10 "GPIO_OUT4, XGPIO Pad Output Register" bitfld.long 0x10 31. " PIN[159] , Output from XGPIO pin 159" "Low,High" bitfld.long 0x10 30. " PIN[158] , Output from XGPIO pin 158" "Low,High" textline " " bitfld.long 0x10 29. " PIN[157] , Output from XGPIO pin 157" "Low,High" bitfld.long 0x10 28. " PIN[156] , Output from XGPIO pin 156" "Low,High" textline " " bitfld.long 0x10 27. " PIN[155] , Output from XGPIO pin 155" "Low,High" bitfld.long 0x10 26. " PIN[154] , Output from XGPIO pin 154" "Low,High" textline " " bitfld.long 0x10 25. " PIN[153] , Output from XGPIO pin 153" "Low,High" bitfld.long 0x10 24. " PIN[152] , Output from XGPIO pin 152" "Low,High" textline " " bitfld.long 0x10 23. " PIN[151] , Output from XGPIO pin 151" "Low,High" bitfld.long 0x10 22. " PIN[150] , Output from XGPIO pin 150" "Low,High" textline " " bitfld.long 0x10 21. " PIN[149] , Output from XGPIO pin 149" "Low,High" bitfld.long 0x10 20. " PIN[148] , Output from XGPIO pin 148" "Low,High" textline " " bitfld.long 0x10 19. " PIN[147] , Output from XGPIO pin 147" "Low,High" bitfld.long 0x10 18. " PIN[146] , Output from XGPIO pin 146" "Low,High" textline " " bitfld.long 0x10 17. " PIN[145] , Output from XGPIO pin 145" "Low,High" bitfld.long 0x10 16. " PIN[144] , Output from XGPIO pin 144" "Low,High" textline " " bitfld.long 0x10 15. " PIN[143] , Output from XGPIO pin 143" "Low,High" bitfld.long 0x10 14. " PIN[142] , Output from XGPIO pin 142" "Low,High" textline " " bitfld.long 0x10 13. " PIN[141] , Output from XGPIO pin 141" "Low,High" bitfld.long 0x10 12. " PIN[140] , Output from XGPIO pin 140" "Low,High" textline " " bitfld.long 0x10 11. " PIN[139] , Output from XGPIO pin 139" "Low,High" bitfld.long 0x10 10. " PIN[138] , Output from XGPIO pin 138" "Low,High" textline " " bitfld.long 0x10 9. " PIN[137] , Output from XGPIO pin 137" "Low,High" bitfld.long 0x10 8. " PIN[136] , Output from XGPIO pin 136" "Low,High" textline " " bitfld.long 0x10 7. " PIN[135] , Output from XGPIO pin 135" "Low,High" bitfld.long 0x10 6. " PIN[134] , Output from XGPIO pin 134" "Low,High" textline " " bitfld.long 0x10 5. " PIN[133] , Output from XGPIO pin 133" "Low,High" bitfld.long 0x10 4. " PIN[132] , Output from XGPIO pin 132" "Low,High" textline " " bitfld.long 0x10 3. " PIN[131] , Output from XGPIO pin 131" "Low,High" bitfld.long 0x10 2. " PIN[130] , Output from XGPIO pin 130" "Low,High" textline " " bitfld.long 0x10 1. " PIN[129] , Output from XGPIO pin 129" "Low,High" bitfld.long 0x10 0. " PIN[128] , Output from XGPIO pin 128" "Low,High" line.long 0x14 "GPIO_OUT5, XGPIO Pad Output Register" bitfld.long 0x14 31. " PIN[191] , Output from XGPIO pin 191" "Low,High" bitfld.long 0x14 30. " PIN[190] , Output from XGPIO pin 190" "Low,High" textline " " bitfld.long 0x14 29. " PIN[189] , Output from XGPIO pin 189" "Low,High" bitfld.long 0x14 28. " PIN[188] , Output from XGPIO pin 188" "Low,High" textline " " bitfld.long 0x14 27. " PIN[187] , Output from XGPIO pin 187" "Low,High" bitfld.long 0x14 26. " PIN[186] , Output from XGPIO pin 186" "Low,High" textline " " bitfld.long 0x14 25. " PIN[185] , Output from XGPIO pin 185" "Low,High" bitfld.long 0x14 24. " PIN[184] , Output from XGPIO pin 184" "Low,High" textline " " bitfld.long 0x14 23. " PIN[183] , Output from XGPIO pin 183" "Low,High" bitfld.long 0x14 22. " PIN[182] , Output from XGPIO pin 182" "Low,High" textline " " bitfld.long 0x14 21. " PIN[181] , Output from XGPIO pin 181" "Low,High" bitfld.long 0x14 20. " PIN[180] , Output from XGPIO pin 180" "Low,High" textline " " bitfld.long 0x14 19. " PIN[179] , Output from XGPIO pin 179" "Low,High" bitfld.long 0x14 18. " PIN[178] , Output from XGPIO pin 178" "Low,High" textline " " bitfld.long 0x14 17. " PIN[177] , Output from XGPIO pin 177" "Low,High" bitfld.long 0x14 16. " PIN[176] , Output from XGPIO pin 176" "Low,High" textline " " bitfld.long 0x14 15. " PIN[175] , Output from XGPIO pin 175" "Low,High" bitfld.long 0x14 14. " PIN[174] , Output from XGPIO pin 174" "Low,High" textline " " bitfld.long 0x14 13. " PIN[173] , Output from XGPIO pin 173" "Low,High" bitfld.long 0x14 12. " PIN[172] , Output from XGPIO pin 172" "Low,High" textline " " bitfld.long 0x14 11. " PIN[171] , Output from XGPIO pin 171" "Low,High" bitfld.long 0x14 10. " PIN[170] , Output from XGPIO pin 170" "Low,High" textline " " bitfld.long 0x14 9. " PIN[169] , Output from XGPIO pin 169" "Low,High" bitfld.long 0x14 8. " PIN[168] , Output from XGPIO pin 168" "Low,High" textline " " bitfld.long 0x14 7. " PIN[167] , Output from XGPIO pin 167" "Low,High" bitfld.long 0x14 6. " PIN[166] , Output from XGPIO pin 166" "Low,High" textline " " bitfld.long 0x14 5. " PIN[165] , Output from XGPIO pin 165" "Low,High" bitfld.long 0x14 4. " PIN[164] , Output from XGPIO pin 164" "Low,High" textline " " bitfld.long 0x14 3. " PIN[163] , Output from XGPIO pin 163" "Low,High" bitfld.long 0x14 2. " PIN[162] , Output from XGPIO pin 162" "Low,High" textline " " bitfld.long 0x14 1. " PIN[161] , Output from XGPIO pin 161" "Low,High" bitfld.long 0x14 0. " PIN[160] , Output from XGPIO pin 160" "Low,High" line.long 0x18 "GPIO_OUT6, XGPIO Pad Output Register" bitfld.long 0x18 31. " PIN[223] , Output from XGPIO pin 223" "Low,High" bitfld.long 0x18 30. " PIN[222] , Output from XGPIO pin 222" "Low,High" textline " " bitfld.long 0x18 29. " PIN[221] , Output from XGPIO pin 221" "Low,High" bitfld.long 0x18 28. " PIN[220] , Output from XGPIO pin 220" "Low,High" textline " " bitfld.long 0x18 27. " PIN[219] , Output from XGPIO pin 219" "Low,High" bitfld.long 0x18 26. " PIN[218] , Output from XGPIO pin 218" "Low,High" textline " " bitfld.long 0x18 25. " PIN[217] , Output from XGPIO pin 217" "Low,High" bitfld.long 0x18 24. " PIN[216] , Output from XGPIO pin 216" "Low,High" textline " " bitfld.long 0x18 23. " PIN[215] , Output from XGPIO pin 215" "Low,High" bitfld.long 0x18 22. " PIN[214] , Output from XGPIO pin 214" "Low,High" textline " " bitfld.long 0x18 21. " PIN[213] , Output from XGPIO pin 213" "Low,High" bitfld.long 0x18 20. " PIN[212] , Output from XGPIO pin 212" "Low,High" textline " " bitfld.long 0x18 19. " PIN[211] , Output from XGPIO pin 211" "Low,High" bitfld.long 0x18 18. " PIN[210] , Output from XGPIO pin 210" "Low,High" textline " " bitfld.long 0x18 17. " PIN[209] , Output from XGPIO pin 209" "Low,High" bitfld.long 0x18 16. " PIN[208] , Output from XGPIO pin 208" "Low,High" textline " " bitfld.long 0x18 15. " PIN[207] , Output from XGPIO pin 207" "Low,High" bitfld.long 0x18 14. " PIN[206] , Output from XGPIO pin 206" "Low,High" textline " " bitfld.long 0x18 13. " PIN[205] , Output from XGPIO pin 205" "Low,High" bitfld.long 0x18 12. " PIN[204] , Output from XGPIO pin 204" "Low,High" textline " " bitfld.long 0x18 11. " PIN[203] , Output from XGPIO pin 203" "Low,High" bitfld.long 0x18 10. " PIN[202] , Output from XGPIO pin 202" "Low,High" textline " " bitfld.long 0x18 9. " PIN[201] , Output from XGPIO pin 201" "Low,High" bitfld.long 0x18 8. " PIN[200] , Output from XGPIO pin 200" "Low,High" textline " " bitfld.long 0x18 7. " PIN[199] , Output from XGPIO pin 199" "Low,High" bitfld.long 0x18 6. " PIN[198] , Output from XGPIO pin 198" "Low,High" textline " " bitfld.long 0x18 5. " PIN[197] , Output from XGPIO pin 197" "Low,High" bitfld.long 0x18 4. " PIN[196] , Output from XGPIO pin 196" "Low,High" textline " " bitfld.long 0x18 3. " PIN[195] , Output from XGPIO pin 195" "Low,High" bitfld.long 0x18 2. " PIN[194] , Output from XGPIO pin 194" "Low,High" textline " " bitfld.long 0x18 1. " PIN[193] , Output from XGPIO pin 193" "Low,High" bitfld.long 0x18 0. " PIN[192] , Output from XGPIO pin 192" "Low,High" line.long 0x1C "GPIO_OUT7, XGPIO Output Register" hexmask.long 0x1C 0.--25. 1. " GPIO_OUT7 , XGPIO Output Register" group.long 0x60++0x1F line.long 0x00 "IRQ_EDGE0, XGPIO Pad Interrupt Register" bitfld.long 0x00 31. " PIN[31] , Interrupt from XGPIO pin 31" "Falling,Rising" bitfld.long 0x00 30. " PIN[30] , Interrupt from XGPIO pin 30" "Falling,Rising" textline " " bitfld.long 0x00 29. " PIN[29] , Interrupt from XGPIO pin 29" "Falling,Rising" bitfld.long 0x00 28. " PIN[28] , Interrupt from XGPIO pin 28" "Falling,Rising" textline " " bitfld.long 0x00 27. " PIN[27] , Interrupt from XGPIO pin 27" "Falling,Rising" bitfld.long 0x00 26. " PIN[26] , Interrupt from XGPIO pin 26" "Falling,Rising" textline " " bitfld.long 0x00 25. " PIN[25] , Interrupt from XGPIO pin 25" "Falling,Rising" bitfld.long 0x00 24. " PIN[24] , Interrupt from XGPIO pin 24" "Falling,Rising" textline " " bitfld.long 0x00 7. " PIN[7] , Interrupt from XGPIO pin 7" "Falling,Rising" bitfld.long 0x00 6. " PIN[6] , Interrupt from XGPIO pin 6" "Falling,Rising" textline " " bitfld.long 0x00 5. " PIN[5] , Interrupt from XGPIO pin 5" "Falling,Rising" bitfld.long 0x00 4. " PIN[4] , Interrupt from XGPIO pin 4" "Falling,Rising" textline " " bitfld.long 0x00 3. " PIN[3] , Interrupt from XGPIO pin 3" "Falling,Rising" bitfld.long 0x00 2. " PIN[2] , Interrupt from XGPIO pin 2" "Falling,Rising" textline " " bitfld.long 0x00 1. " PIN[1] , Interrupt from XGPIO pin 1" "Falling,Rising" bitfld.long 0x00 0. " PIN[0] , Interrupt from XGPIO pin 0" "Falling,Rising" line.long 0x04 "IRQ_EDGE1, XGPIO Pad Interrupt Register" bitfld.long 0x04 31. " PIN[63] , Interrupt from XGPIO pin 63" "Falling,Rising" bitfld.long 0x04 30. " PIN[62] , Interrupt from XGPIO pin 62" "Falling,Rising" textline " " bitfld.long 0x04 29. " PIN[61] , Interrupt from XGPIO pin 61" "Falling,Rising" bitfld.long 0x04 28. " PIN[60] , Interrupt from XGPIO pin 60" "Falling,Rising" textline " " bitfld.long 0x04 27. " PIN[59] , Interrupt from XGPIO pin 59" "Falling,Rising" bitfld.long 0x04 26. " PIN[58] , Interrupt from XGPIO pin 58" "Falling,Rising" textline " " bitfld.long 0x04 25. " PIN[57] , Interrupt from XGPIO pin 57" "Falling,Rising" bitfld.long 0x04 24. " PIN[56] , Interrupt from XGPIO pin 56" "Falling,Rising" textline " " bitfld.long 0x04 23. " PIN[55] , Interrupt from XGPIO pin 55" "Falling,Rising" bitfld.long 0x04 22. " PIN[54] , Interrupt from XGPIO pin 54" "Falling,Rising" textline " " bitfld.long 0x04 21. " PIN[53] , Interrupt from XGPIO pin 53" "Falling,Rising" bitfld.long 0x04 20. " PIN[52] , Interrupt from XGPIO pin 52" "Falling,Rising" textline " " bitfld.long 0x04 19. " PIN[51] , Interrupt from XGPIO pin 51" "Falling,Rising" bitfld.long 0x04 18. " PIN[50] , Interrupt from XGPIO pin 50" "Falling,Rising" textline " " bitfld.long 0x04 17. " PIN[49] , Interrupt from XGPIO pin 49" "Falling,Rising" bitfld.long 0x04 16. " PIN[48] , Interrupt from XGPIO pin 48" "Falling,Rising" textline " " bitfld.long 0x04 15. " PIN[47] , Interrupt from XGPIO pin 47" "Falling,Rising" bitfld.long 0x04 14. " PIN[46] , Interrupt from XGPIO pin 46" "Falling,Rising" textline " " bitfld.long 0x04 13. " PIN[45] , Interrupt from XGPIO pin 45" "Falling,Rising" bitfld.long 0x04 12. " PIN[44] , Interrupt from XGPIO pin 44" "Falling,Rising" textline " " bitfld.long 0x04 11. " PIN[43] , Interrupt from XGPIO pin 43" "Falling,Rising" bitfld.long 0x04 10. " PIN[42] , Interrupt from XGPIO pin 42" "Falling,Rising" textline " " bitfld.long 0x04 9. " PIN[41] , Interrupt from XGPIO pin 41" "Falling,Rising" bitfld.long 0x04 8. " PIN[40] , Interrupt from XGPIO pin 40" "Falling,Rising" textline " " bitfld.long 0x04 7. " PIN[39] , Interrupt from XGPIO pin 39" "Falling,Rising" bitfld.long 0x04 6. " PIN[38] , Interrupt from XGPIO pin 38" "Falling,Rising" textline " " bitfld.long 0x04 5. " PIN[37] , Interrupt from XGPIO pin 37" "Falling,Rising" bitfld.long 0x04 4. " PIN[36] , Interrupt from XGPIO pin 36" "Falling,Rising" textline " " bitfld.long 0x04 3. " PIN[35] , Interrupt from XGPIO pin 35" "Falling,Rising" bitfld.long 0x04 2. " PIN[34] , Interrupt from XGPIO pin 34" "Falling,Rising" textline " " bitfld.long 0x04 1. " PIN[33] , Interrupt from XGPIO pin 33" "Falling,Rising" bitfld.long 0x04 0. " PIN[32] , Interrupt from XGPIO pin 32" "Falling,Rising" line.long 0x08 "IRQ_EDGE2, XGPIO Pad Interrupt Register" bitfld.long 0x08 31. " PIN[95] , Interrupt from XGPIO pin 95" "Falling,Rising" bitfld.long 0x08 30. " PIN[94] , Interrupt from XGPIO pin 94" "Falling,Rising" textline " " bitfld.long 0x08 29. " PIN[93] , Interrupt from XGPIO pin 93" "Falling,Rising" bitfld.long 0x08 28. " PIN[92] , Interrupt from XGPIO pin 92" "Falling,Rising" textline " " bitfld.long 0x08 27. " PIN[91] , Interrupt from XGPIO pin 91" "Falling,Rising" bitfld.long 0x08 26. " PIN[90] , Interrupt from XGPIO pin 90" "Falling,Rising" textline " " bitfld.long 0x08 25. " PIN[89] , Interrupt from XGPIO pin 89" "Falling,Rising" bitfld.long 0x08 24. " PIN[88] , Interrupt from XGPIO pin 88" "Falling,Rising" textline " " bitfld.long 0x08 23. " PIN[87] , Interrupt from XGPIO pin 87" "Falling,Rising" bitfld.long 0x08 22. " PIN[86] , Interrupt from XGPIO pin 86" "Falling,Rising" textline " " bitfld.long 0x08 21. " PIN[85] , Interrupt from XGPIO pin 85" "Falling,Rising" bitfld.long 0x08 20. " PIN[84] , Interrupt from XGPIO pin 84" "Falling,Rising" textline " " bitfld.long 0x08 19. " PIN[83] , Interrupt from XGPIO pin 83" "Falling,Rising" bitfld.long 0x08 18. " PIN[82] , Interrupt from XGPIO pin 82" "Falling,Rising" textline " " bitfld.long 0x08 17. " PIN[81] , Interrupt from XGPIO pin 81" "Falling,Rising" bitfld.long 0x08 16. " PIN[80] , Interrupt from XGPIO pin 80" "Falling,Rising" textline " " bitfld.long 0x08 15. " PIN[79] , Interrupt from XGPIO pin 79" "Falling,Rising" bitfld.long 0x08 14. " PIN[78] , Interrupt from XGPIO pin 78" "Falling,Rising" textline " " bitfld.long 0x08 13. " PIN[77] , Interrupt from XGPIO pin 77" "Falling,Rising" bitfld.long 0x08 12. " PIN[76] , Interrupt from XGPIO pin 76" "Falling,Rising" textline " " bitfld.long 0x08 11. " PIN[75] , Interrupt from XGPIO pin 75" "Falling,Rising" bitfld.long 0x08 10. " PIN[74] , Interrupt from XGPIO pin 74" "Falling,Rising" textline " " bitfld.long 0x08 9. " PIN[73] , Interrupt from XGPIO pin 73" "Falling,Rising" bitfld.long 0x08 8. " PIN[72] , Interrupt from XGPIO pin 72" "Falling,Rising" textline " " bitfld.long 0x08 7. " PIN[71] , Interrupt from XGPIO pin 71" "Falling,Rising" bitfld.long 0x08 6. " PIN[70] , Interrupt from XGPIO pin 70" "Falling,Rising" textline " " bitfld.long 0x08 5. " PIN[69] , Interrupt from XGPIO pin 69" "Falling,Rising" bitfld.long 0x08 4. " PIN[68] , Interrupt from XGPIO pin 68" "Falling,Rising" textline " " bitfld.long 0x08 3. " PIN[67] , Interrupt from XGPIO pin 67" "Falling,Rising" bitfld.long 0x08 2. " PIN[66] , Interrupt from XGPIO pin 66" "Falling,Rising" textline " " bitfld.long 0x08 1. " PIN[65] , Interrupt from XGPIO pin 65" "Falling,Rising" bitfld.long 0x08 0. " PIN[64] , Interrupt from XGPIO pin 64" "Falling,Rising" line.long 0x0C "IRQ_EDGE3, XGPIO Pad Interrupt Register" bitfld.long 0x0C 31. " PIN[127] , Interrupt from XGPIO pin 127" "Falling,Rising" bitfld.long 0x0C 30. " PIN[126] , Interrupt from XGPIO pin 126" "Falling,Rising" textline " " bitfld.long 0x0C 29. " PIN[125] , Interrupt from XGPIO pin 125" "Falling,Rising" bitfld.long 0x0C 28. " PIN[124] , Interrupt from XGPIO pin 124" "Falling,Rising" textline " " bitfld.long 0x0C 27. " PIN[123] , Interrupt from XGPIO pin 123" "Falling,Rising" bitfld.long 0x0C 26. " PIN[122] , Interrupt from XGPIO pin 122" "Falling,Rising" textline " " bitfld.long 0x0C 25. " PIN[121] , Interrupt from XGPIO pin 121" "Falling,Rising" bitfld.long 0x0C 24. " PIN[120] , Interrupt from XGPIO pin 120" "Falling,Rising" textline " " bitfld.long 0x0C 23. " PIN[119] , Interrupt from XGPIO pin 119" "Falling,Rising" bitfld.long 0x0C 22. " PIN[118] , Interrupt from XGPIO pin 118" "Falling,Rising" textline " " bitfld.long 0x0C 21. " PIN[117] , Interrupt from XGPIO pin 117" "Falling,Rising" bitfld.long 0x0C 20. " PIN[116] , Interrupt from XGPIO pin 116" "Falling,Rising" textline " " bitfld.long 0x0C 19. " PIN[115] , Interrupt from XGPIO pin 115" "Falling,Rising" bitfld.long 0x0C 18. " PIN[114] , Interrupt from XGPIO pin 114" "Falling,Rising" textline " " bitfld.long 0x0C 17. " PIN[113] , Interrupt from XGPIO pin 113" "Falling,Rising" bitfld.long 0x0C 16. " PIN[112] , Interrupt from XGPIO pin 112" "Falling,Rising" textline " " bitfld.long 0x0C 15. " PIN[111] , Interrupt from XGPIO pin 111" "Falling,Rising" bitfld.long 0x0C 14. " PIN[110] , Interrupt from XGPIO pin 110" "Falling,Rising" textline " " bitfld.long 0x0C 13. " PIN[109] , Interrupt from XGPIO pin 109" "Falling,Rising" bitfld.long 0x0C 12. " PIN[108] , Interrupt from XGPIO pin 108" "Falling,Rising" textline " " bitfld.long 0x0C 11. " PIN[107] , Interrupt from XGPIO pin 107" "Falling,Rising" bitfld.long 0x0C 10. " PIN[106] , Interrupt from XGPIO pin 106" "Falling,Rising" textline " " bitfld.long 0x0C 9. " PIN[105] , Interrupt from XGPIO pin 105" "Falling,Rising" bitfld.long 0x0C 8. " PIN[104] , Interrupt from XGPIO pin 104" "Falling,Rising" textline " " bitfld.long 0x0C 7. " PIN[103] , Interrupt from XGPIO pin 103" "Falling,Rising" bitfld.long 0x0C 6. " PIN[102] , Interrupt from XGPIO pin 102" "Falling,Rising" textline " " bitfld.long 0x0C 5. " PIN[101] , Interrupt from XGPIO pin 101" "Falling,Rising" bitfld.long 0x0C 4. " PIN[100] , Interrupt from XGPIO pin 100" "Falling,Rising" textline " " bitfld.long 0x0C 3. " PIN[99] , Interrupt from XGPIO pin 99" "Falling,Rising" bitfld.long 0x0C 2. " PIN[98] , Interrupt from XGPIO pin 98" "Falling,Rising" textline " " bitfld.long 0x0C 1. " PIN[97] , Interrupt from XGPIO pin 97" "Falling,Rising" bitfld.long 0x0C 0. " PIN[96] , Interrupt from XGPIO pin 96" "Falling,Rising" line.long 0x10 "IRQ_EDGE4, XGPIO Pad Interrupt Register" bitfld.long 0x10 31. " PIN[159] , Interrupt from XGPIO pin 159" "Falling,Rising" bitfld.long 0x10 30. " PIN[158] , Interrupt from XGPIO pin 158" "Falling,Rising" textline " " bitfld.long 0x10 29. " PIN[157] , Interrupt from XGPIO pin 157" "Falling,Rising" bitfld.long 0x10 28. " PIN[156] , Interrupt from XGPIO pin 156" "Falling,Rising" textline " " bitfld.long 0x10 27. " PIN[155] , Interrupt from XGPIO pin 155" "Falling,Rising" bitfld.long 0x10 26. " PIN[154] , Interrupt from XGPIO pin 154" "Falling,Rising" textline " " bitfld.long 0x10 25. " PIN[153] , Interrupt from XGPIO pin 153" "Falling,Rising" bitfld.long 0x10 24. " PIN[152] , Interrupt from XGPIO pin 152" "Falling,Rising" textline " " bitfld.long 0x10 23. " PIN[151] , Interrupt from XGPIO pin 151" "Falling,Rising" bitfld.long 0x10 22. " PIN[150] , Interrupt from XGPIO pin 150" "Falling,Rising" textline " " bitfld.long 0x10 21. " PIN[149] , Interrupt from XGPIO pin 149" "Falling,Rising" bitfld.long 0x10 20. " PIN[148] , Interrupt from XGPIO pin 148" "Falling,Rising" textline " " bitfld.long 0x10 19. " PIN[147] , Interrupt from XGPIO pin 147" "Falling,Rising" bitfld.long 0x10 18. " PIN[146] , Interrupt from XGPIO pin 146" "Falling,Rising" textline " " bitfld.long 0x10 17. " PIN[145] , Interrupt from XGPIO pin 145" "Falling,Rising" bitfld.long 0x10 16. " PIN[144] , Interrupt from XGPIO pin 144" "Falling,Rising" textline " " bitfld.long 0x10 15. " PIN[143] , Interrupt from XGPIO pin 143" "Falling,Rising" bitfld.long 0x10 14. " PIN[142] , Interrupt from XGPIO pin 142" "Falling,Rising" textline " " bitfld.long 0x10 13. " PIN[141] , Interrupt from XGPIO pin 141" "Falling,Rising" bitfld.long 0x10 12. " PIN[140] , Interrupt from XGPIO pin 140" "Falling,Rising" textline " " bitfld.long 0x10 11. " PIN[139] , Interrupt from XGPIO pin 139" "Falling,Rising" bitfld.long 0x10 10. " PIN[138] , Interrupt from XGPIO pin 138" "Falling,Rising" textline " " bitfld.long 0x10 9. " PIN[137] , Interrupt from XGPIO pin 137" "Falling,Rising" bitfld.long 0x10 8. " PIN[136] , Interrupt from XGPIO pin 136" "Falling,Rising" textline " " bitfld.long 0x10 7. " PIN[135] , Interrupt from XGPIO pin 135" "Falling,Rising" bitfld.long 0x10 6. " PIN[134] , Interrupt from XGPIO pin 134" "Falling,Rising" textline " " bitfld.long 0x10 5. " PIN[133] , Interrupt from XGPIO pin 133" "Falling,Rising" bitfld.long 0x10 4. " PIN[132] , Interrupt from XGPIO pin 132" "Falling,Rising" textline " " bitfld.long 0x10 3. " PIN[131] , Interrupt from XGPIO pin 131" "Falling,Rising" bitfld.long 0x10 2. " PIN[130] , Interrupt from XGPIO pin 130" "Falling,Rising" textline " " bitfld.long 0x10 1. " PIN[129] , Interrupt from XGPIO pin 129" "Falling,Rising" bitfld.long 0x10 0. " PIN[128] , Interrupt from XGPIO pin 128" "Falling,Rising" line.long 0x14 "IRQ_EDGE5, XGPIO Pad Interrupt Register" bitfld.long 0x14 31. " PIN[191] , Interrupt from XGPIO pin 191" "Falling,Rising" bitfld.long 0x14 30. " PIN[190] , Interrupt from XGPIO pin 190" "Falling,Rising" textline " " bitfld.long 0x14 29. " PIN[189] , Interrupt from XGPIO pin 189" "Falling,Rising" bitfld.long 0x14 28. " PIN[188] , Interrupt from XGPIO pin 188" "Falling,Rising" textline " " bitfld.long 0x14 27. " PIN[187] , Interrupt from XGPIO pin 187" "Falling,Rising" bitfld.long 0x14 26. " PIN[186] , Interrupt from XGPIO pin 186" "Falling,Rising" textline " " bitfld.long 0x14 25. " PIN[185] , Interrupt from XGPIO pin 185" "Falling,Rising" bitfld.long 0x14 24. " PIN[184] , Interrupt from XGPIO pin 184" "Falling,Rising" textline " " bitfld.long 0x14 23. " PIN[183] , Interrupt from XGPIO pin 183" "Falling,Rising" bitfld.long 0x14 22. " PIN[182] , Interrupt from XGPIO pin 182" "Falling,Rising" textline " " bitfld.long 0x14 21. " PIN[181] , Interrupt from XGPIO pin 181" "Falling,Rising" bitfld.long 0x14 20. " PIN[180] , Interrupt from XGPIO pin 180" "Falling,Rising" textline " " bitfld.long 0x14 19. " PIN[179] , Interrupt from XGPIO pin 179" "Falling,Rising" bitfld.long 0x14 18. " PIN[178] , Interrupt from XGPIO pin 178" "Falling,Rising" textline " " bitfld.long 0x14 17. " PIN[177] , Interrupt from XGPIO pin 177" "Falling,Rising" bitfld.long 0x14 16. " PIN[176] , Interrupt from XGPIO pin 176" "Falling,Rising" textline " " bitfld.long 0x14 15. " PIN[175] , Interrupt from XGPIO pin 175" "Falling,Rising" bitfld.long 0x14 14. " PIN[174] , Interrupt from XGPIO pin 174" "Falling,Rising" textline " " bitfld.long 0x14 13. " PIN[173] , Interrupt from XGPIO pin 173" "Falling,Rising" bitfld.long 0x14 12. " PIN[172] , Interrupt from XGPIO pin 172" "Falling,Rising" textline " " bitfld.long 0x14 11. " PIN[171] , Interrupt from XGPIO pin 171" "Falling,Rising" bitfld.long 0x14 10. " PIN[170] , Interrupt from XGPIO pin 170" "Falling,Rising" textline " " bitfld.long 0x14 9. " PIN[169] , Interrupt from XGPIO pin 169" "Falling,Rising" bitfld.long 0x14 8. " PIN[168] , Interrupt from XGPIO pin 168" "Falling,Rising" textline " " bitfld.long 0x14 7. " PIN[167] , Interrupt from XGPIO pin 167" "Falling,Rising" bitfld.long 0x14 6. " PIN[166] , Interrupt from XGPIO pin 166" "Falling,Rising" textline " " bitfld.long 0x14 5. " PIN[165] , Interrupt from XGPIO pin 165" "Falling,Rising" bitfld.long 0x14 4. " PIN[164] , Interrupt from XGPIO pin 164" "Falling,Rising" textline " " bitfld.long 0x14 3. " PIN[163] , Interrupt from XGPIO pin 163" "Falling,Rising" bitfld.long 0x14 2. " PIN[162] , Interrupt from XGPIO pin 162" "Falling,Rising" textline " " bitfld.long 0x14 1. " PIN[161] , Interrupt from XGPIO pin 161" "Falling,Rising" bitfld.long 0x14 0. " PIN[160] , Interrupt from XGPIO pin 160" "Falling,Rising" line.long 0x18 "IRQ_EDGE6, XGPIO Pad Interrupt Register" bitfld.long 0x18 31. " PIN[223] , Interrupt from XGPIO pin 223" "Falling,Rising" bitfld.long 0x18 30. " PIN[222] , Interrupt from XGPIO pin 222" "Falling,Rising" textline " " bitfld.long 0x18 29. " PIN[221] , Interrupt from XGPIO pin 221" "Falling,Rising" bitfld.long 0x18 28. " PIN[220] , Interrupt from XGPIO pin 220" "Falling,Rising" textline " " bitfld.long 0x18 27. " PIN[219] , Interrupt from XGPIO pin 219" "Falling,Rising" bitfld.long 0x18 26. " PIN[218] , Interrupt from XGPIO pin 218" "Falling,Rising" textline " " bitfld.long 0x18 25. " PIN[217] , Interrupt from XGPIO pin 217" "Falling,Rising" bitfld.long 0x18 24. " PIN[216] , Interrupt from XGPIO pin 216" "Falling,Rising" textline " " bitfld.long 0x18 23. " PIN[215] , Interrupt from XGPIO pin 215" "Falling,Rising" bitfld.long 0x18 22. " PIN[214] , Interrupt from XGPIO pin 214" "Falling,Rising" textline " " bitfld.long 0x18 21. " PIN[213] , Interrupt from XGPIO pin 213" "Falling,Rising" bitfld.long 0x18 20. " PIN[212] , Interrupt from XGPIO pin 212" "Falling,Rising" textline " " bitfld.long 0x18 19. " PIN[211] , Interrupt from XGPIO pin 211" "Falling,Rising" bitfld.long 0x18 18. " PIN[210] , Interrupt from XGPIO pin 210" "Falling,Rising" textline " " bitfld.long 0x18 17. " PIN[209] , Interrupt from XGPIO pin 209" "Falling,Rising" bitfld.long 0x18 16. " PIN[208] , Interrupt from XGPIO pin 208" "Falling,Rising" textline " " bitfld.long 0x18 15. " PIN[207] , Interrupt from XGPIO pin 207" "Falling,Rising" bitfld.long 0x18 14. " PIN[206] , Interrupt from XGPIO pin 206" "Falling,Rising" textline " " bitfld.long 0x18 13. " PIN[205] , Interrupt from XGPIO pin 205" "Falling,Rising" bitfld.long 0x18 12. " PIN[204] , Interrupt from XGPIO pin 204" "Falling,Rising" textline " " bitfld.long 0x18 11. " PIN[203] , Interrupt from XGPIO pin 203" "Falling,Rising" bitfld.long 0x18 10. " PIN[202] , Interrupt from XGPIO pin 202" "Falling,Rising" textline " " bitfld.long 0x18 9. " PIN[201] , Interrupt from XGPIO pin 201" "Falling,Rising" bitfld.long 0x18 8. " PIN[200] , Interrupt from XGPIO pin 200" "Falling,Rising" textline " " bitfld.long 0x18 7. " PIN[199] , Interrupt from XGPIO pin 199" "Falling,Rising" bitfld.long 0x18 6. " PIN[198] , Interrupt from XGPIO pin 198" "Falling,Rising" textline " " bitfld.long 0x18 5. " PIN[197] , Interrupt from XGPIO pin 197" "Falling,Rising" bitfld.long 0x18 4. " PIN[196] , Interrupt from XGPIO pin 196" "Falling,Rising" textline " " bitfld.long 0x18 3. " PIN[195] , Interrupt from XGPIO pin 195" "Falling,Rising" bitfld.long 0x18 2. " PIN[194] , Interrupt from XGPIO pin 194" "Falling,Rising" textline " " bitfld.long 0x18 1. " PIN[193] , Interrupt from XGPIO pin 193" "Falling,Rising" bitfld.long 0x18 0. " PIN[192] , Interrupt from XGPIO pin 192" "Falling,Rising" line.long 0x1C "IRQ_EDGE7, XGPIO Interrupt Edge Register" hexmask.long 0x1C 0.--25. 1. " IRQ_EDGE7 , XGPIO Interrupt Edge Register" group.long 0x80++0x1F line.long 0x00 "GPIO_IRQ_MASK0, XGPIO Pad Input Register" bitfld.long 0x00 31. " PIN[31] , Mask for interrupt XGPIO pin 31" "Not masked,Masked" bitfld.long 0x00 30. " PIN[30] , Mask for interrupt XGPIO pin 30" "Not masked,Masked" textline " " bitfld.long 0x00 29. " PIN[29] , Mask for interrupt XGPIO pin 29" "Not masked,Masked" bitfld.long 0x00 28. " PIN[28] , Mask for interrupt XGPIO pin 28" "Not masked,Masked" textline " " bitfld.long 0x00 27. " PIN[27] , Mask for interrupt XGPIO pin 27" "Not masked,Masked" bitfld.long 0x00 26. " PIN[26] , Mask for interrupt XGPIO pin 26" "Not masked,Masked" textline " " bitfld.long 0x00 25. " PIN[25] , Mask for interrupt XGPIO pin 25" "Not masked,Masked" bitfld.long 0x00 24. " PIN[24] , Mask for interrupt XGPIO pin 24" "Not masked,Masked" textline " " bitfld.long 0x00 7. " PIN[7] , Mask for interrupt XGPIO pin 7" "Not masked,Masked" bitfld.long 0x00 6. " PIN[6] , Mask for interrupt XGPIO pin 6" "Not masked,Masked" textline " " bitfld.long 0x00 5. " PIN[5] , Mask for interrupt XGPIO pin 5" "Not masked,Masked" bitfld.long 0x00 4. " PIN[4] , Mask for interrupt XGPIO pin 4" "Not masked,Masked" textline " " bitfld.long 0x00 3. " PIN[3] , Mask for interrupt XGPIO pin 3" "Not masked,Masked" bitfld.long 0x00 2. " PIN[2] , Mask for interrupt XGPIO pin 2" "Not masked,Masked" textline " " bitfld.long 0x00 1. " PIN[1] , Mask for interrupt XGPIO pin 1" "Not masked,Masked" bitfld.long 0x00 0. " PIN[0] , Mask for interrupt XGPIO pin 0" "Not masked,Masked" line.long 0x04 "GPIO_IRQ_MASK1, XGPIO Pad Input Register" bitfld.long 0x04 31. " PIN[63] , Mask for interrupt XGPIO pin 63" "Not masked,Masked" bitfld.long 0x04 30. " PIN[62] , Mask for interrupt XGPIO pin 62" "Not masked,Masked" textline " " bitfld.long 0x04 29. " PIN[61] , Mask for interrupt XGPIO pin 61" "Not masked,Masked" bitfld.long 0x04 28. " PIN[60] , Mask for interrupt XGPIO pin 60" "Not masked,Masked" textline " " bitfld.long 0x04 27. " PIN[59] , Mask for interrupt XGPIO pin 59" "Not masked,Masked" bitfld.long 0x04 26. " PIN[58] , Mask for interrupt XGPIO pin 58" "Not masked,Masked" textline " " bitfld.long 0x04 25. " PIN[57] , Mask for interrupt XGPIO pin 57" "Not masked,Masked" bitfld.long 0x04 24. " PIN[56] , Mask for interrupt XGPIO pin 56" "Not masked,Masked" textline " " bitfld.long 0x04 23. " PIN[55] , Mask for interrupt XGPIO pin 55" "Not masked,Masked" bitfld.long 0x04 22. " PIN[54] , Mask for interrupt XGPIO pin 54" "Not masked,Masked" textline " " bitfld.long 0x04 21. " PIN[53] , Mask for interrupt XGPIO pin 53" "Not masked,Masked" bitfld.long 0x04 20. " PIN[52] , Mask for interrupt XGPIO pin 52" "Not masked,Masked" textline " " bitfld.long 0x04 19. " PIN[51] , Mask for interrupt XGPIO pin 51" "Not masked,Masked" bitfld.long 0x04 18. " PIN[50] , Mask for interrupt XGPIO pin 50" "Not masked,Masked" textline " " bitfld.long 0x04 17. " PIN[49] , Mask for interrupt XGPIO pin 49" "Not masked,Masked" bitfld.long 0x04 16. " PIN[48] , Mask for interrupt XGPIO pin 48" "Not masked,Masked" textline " " bitfld.long 0x04 15. " PIN[47] , Mask for interrupt XGPIO pin 47" "Not masked,Masked" bitfld.long 0x04 14. " PIN[46] , Mask for interrupt XGPIO pin 46" "Not masked,Masked" textline " " bitfld.long 0x04 13. " PIN[45] , Mask for interrupt XGPIO pin 45" "Not masked,Masked" bitfld.long 0x04 12. " PIN[44] , Mask for interrupt XGPIO pin 44" "Not masked,Masked" textline " " bitfld.long 0x04 11. " PIN[43] , Mask for interrupt XGPIO pin 43" "Not masked,Masked" bitfld.long 0x04 10. " PIN[42] , Mask for interrupt XGPIO pin 42" "Not masked,Masked" textline " " bitfld.long 0x04 9. " PIN[41] , Mask for interrupt XGPIO pin 41" "Not masked,Masked" bitfld.long 0x04 8. " PIN[40] , Mask for interrupt XGPIO pin 40" "Not masked,Masked" textline " " bitfld.long 0x04 7. " PIN[39] , Mask for interrupt XGPIO pin 39" "Not masked,Masked" bitfld.long 0x04 6. " PIN[38] , Mask for interrupt XGPIO pin 38" "Not masked,Masked" textline " " bitfld.long 0x04 5. " PIN[37] , Mask for interrupt XGPIO pin 37" "Not masked,Masked" bitfld.long 0x04 4. " PIN[36] , Mask for interrupt XGPIO pin 36" "Not masked,Masked" textline " " bitfld.long 0x04 3. " PIN[35] , Mask for interrupt XGPIO pin 35" "Not masked,Masked" bitfld.long 0x04 2. " PIN[34] , Mask for interrupt XGPIO pin 34" "Not masked,Masked" textline " " bitfld.long 0x04 1. " PIN[33] , Mask for interrupt XGPIO pin 33" "Not masked,Masked" bitfld.long 0x04 0. " PIN[32] , Mask for interrupt XGPIO pin 32" "Not masked,Masked" line.long 0x08 "GPIO_IRQ_MASK2, XGPIO Pad Input Register" bitfld.long 0x08 31. " PIN[95] , Mask for interrupt XGPIO pin 95" "Not masked,Masked" bitfld.long 0x08 30. " PIN[94] , Mask for interrupt XGPIO pin 94" "Not masked,Masked" textline " " bitfld.long 0x08 29. " PIN[93] , Mask for interrupt XGPIO pin 93" "Not masked,Masked" bitfld.long 0x08 28. " PIN[92] , Mask for interrupt XGPIO pin 92" "Not masked,Masked" textline " " bitfld.long 0x08 27. " PIN[91] , Mask for interrupt XGPIO pin 91" "Not masked,Masked" bitfld.long 0x08 26. " PIN[90] , Mask for interrupt XGPIO pin 90" "Not masked,Masked" textline " " bitfld.long 0x08 25. " PIN[89] , Mask for interrupt XGPIO pin 89" "Not masked,Masked" bitfld.long 0x08 24. " PIN[88] , Mask for interrupt XGPIO pin 88" "Not masked,Masked" textline " " bitfld.long 0x08 23. " PIN[87] , Mask for interrupt XGPIO pin 87" "Not masked,Masked" bitfld.long 0x08 22. " PIN[86] , Mask for interrupt XGPIO pin 86" "Not masked,Masked" textline " " bitfld.long 0x08 21. " PIN[85] , Mask for interrupt XGPIO pin 85" "Not masked,Masked" bitfld.long 0x08 20. " PIN[84] , Mask for interrupt XGPIO pin 84" "Not masked,Masked" textline " " bitfld.long 0x08 19. " PIN[83] , Mask for interrupt XGPIO pin 83" "Not masked,Masked" bitfld.long 0x08 18. " PIN[82] , Mask for interrupt XGPIO pin 82" "Not masked,Masked" textline " " bitfld.long 0x08 17. " PIN[81] , Mask for interrupt XGPIO pin 81" "Not masked,Masked" bitfld.long 0x08 16. " PIN[80] , Mask for interrupt XGPIO pin 80" "Not masked,Masked" textline " " bitfld.long 0x08 15. " PIN[79] , Mask for interrupt XGPIO pin 79" "Not masked,Masked" bitfld.long 0x08 14. " PIN[78] , Mask for interrupt XGPIO pin 78" "Not masked,Masked" textline " " bitfld.long 0x08 13. " PIN[77] , Mask for interrupt XGPIO pin 77" "Not masked,Masked" bitfld.long 0x08 12. " PIN[76] , Mask for interrupt XGPIO pin 76" "Not masked,Masked" textline " " bitfld.long 0x08 11. " PIN[75] , Mask for interrupt XGPIO pin 75" "Not masked,Masked" bitfld.long 0x08 10. " PIN[74] , Mask for interrupt XGPIO pin 74" "Not masked,Masked" textline " " bitfld.long 0x08 9. " PIN[73] , Mask for interrupt XGPIO pin 73" "Not masked,Masked" bitfld.long 0x08 8. " PIN[72] , Mask for interrupt XGPIO pin 72" "Not masked,Masked" textline " " bitfld.long 0x08 7. " PIN[71] , Mask for interrupt XGPIO pin 71" "Not masked,Masked" bitfld.long 0x08 6. " PIN[70] , Mask for interrupt XGPIO pin 70" "Not masked,Masked" textline " " bitfld.long 0x08 5. " PIN[69] , Mask for interrupt XGPIO pin 69" "Not masked,Masked" bitfld.long 0x08 4. " PIN[68] , Mask for interrupt XGPIO pin 68" "Not masked,Masked" textline " " bitfld.long 0x08 3. " PIN[67] , Mask for interrupt XGPIO pin 67" "Not masked,Masked" bitfld.long 0x08 2. " PIN[66] , Mask for interrupt XGPIO pin 66" "Not masked,Masked" textline " " bitfld.long 0x08 1. " PIN[65] , Mask for interrupt XGPIO pin 65" "Not masked,Masked" bitfld.long 0x08 0. " PIN[64] , Mask for interrupt XGPIO pin 64" "Not masked,Masked" line.long 0x0C "GPIO_IRQ_MASK3, XGPIO Pad Input Register" bitfld.long 0x0C 31. " PIN[127] , Mask for interrupt XGPIO pin 127" "Not masked,Masked" bitfld.long 0x0C 30. " PIN[126] , Mask for interrupt XGPIO pin 126" "Not masked,Masked" textline " " bitfld.long 0x0C 29. " PIN[125] , Mask for interrupt XGPIO pin 125" "Not masked,Masked" bitfld.long 0x0C 28. " PIN[124] , Mask for interrupt XGPIO pin 124" "Not masked,Masked" textline " " bitfld.long 0x0C 27. " PIN[123] , Mask for interrupt XGPIO pin 123" "Not masked,Masked" bitfld.long 0x0C 26. " PIN[122] , Mask for interrupt XGPIO pin 122" "Not masked,Masked" textline " " bitfld.long 0x0C 25. " PIN[121] , Mask for interrupt XGPIO pin 121" "Not masked,Masked" bitfld.long 0x0C 24. " PIN[120] , Mask for interrupt XGPIO pin 120" "Not masked,Masked" textline " " bitfld.long 0x0C 23. " PIN[119] , Mask for interrupt XGPIO pin 119" "Not masked,Masked" bitfld.long 0x0C 22. " PIN[118] , Mask for interrupt XGPIO pin 118" "Not masked,Masked" textline " " bitfld.long 0x0C 21. " PIN[117] , Mask for interrupt XGPIO pin 117" "Not masked,Masked" bitfld.long 0x0C 20. " PIN[116] , Mask for interrupt XGPIO pin 116" "Not masked,Masked" textline " " bitfld.long 0x0C 19. " PIN[115] , Mask for interrupt XGPIO pin 115" "Not masked,Masked" bitfld.long 0x0C 18. " PIN[114] , Mask for interrupt XGPIO pin 114" "Not masked,Masked" textline " " bitfld.long 0x0C 17. " PIN[113] , Mask for interrupt XGPIO pin 113" "Not masked,Masked" bitfld.long 0x0C 16. " PIN[112] , Mask for interrupt XGPIO pin 112" "Not masked,Masked" textline " " bitfld.long 0x0C 15. " PIN[111] , Mask for interrupt XGPIO pin 111" "Not masked,Masked" bitfld.long 0x0C 14. " PIN[110] , Mask for interrupt XGPIO pin 110" "Not masked,Masked" textline " " bitfld.long 0x0C 13. " PIN[109] , Mask for interrupt XGPIO pin 109" "Not masked,Masked" bitfld.long 0x0C 12. " PIN[108] , Mask for interrupt XGPIO pin 108" "Not masked,Masked" textline " " bitfld.long 0x0C 11. " PIN[107] , Mask for interrupt XGPIO pin 107" "Not masked,Masked" bitfld.long 0x0C 10. " PIN[106] , Mask for interrupt XGPIO pin 106" "Not masked,Masked" textline " " bitfld.long 0x0C 9. " PIN[105] , Mask for interrupt XGPIO pin 105" "Not masked,Masked" bitfld.long 0x0C 8. " PIN[104] , Mask for interrupt XGPIO pin 104" "Not masked,Masked" textline " " bitfld.long 0x0C 7. " PIN[103] , Mask for interrupt XGPIO pin 103" "Not masked,Masked" bitfld.long 0x0C 6. " PIN[102] , Mask for interrupt XGPIO pin 102" "Not masked,Masked" textline " " bitfld.long 0x0C 5. " PIN[101] , Mask for interrupt XGPIO pin 101" "Not masked,Masked" bitfld.long 0x0C 4. " PIN[100] , Mask for interrupt XGPIO pin 100" "Not masked,Masked" textline " " bitfld.long 0x0C 3. " PIN[99] , Mask for interrupt XGPIO pin 99" "Not masked,Masked" bitfld.long 0x0C 2. " PIN[98] , Mask for interrupt XGPIO pin 98" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " PIN[97] , Mask for interrupt XGPIO pin 97" "Not masked,Masked" bitfld.long 0x0C 0. " PIN[96] , Mask for interrupt XGPIO pin 96" "Not masked,Masked" line.long 0x10 "GPIO_IRQ_MASK4, XGPIO Pad Input Register" bitfld.long 0x10 31. " PIN[159] , Mask for interrupt XGPIO pin 159" "Not masked,Masked" bitfld.long 0x10 30. " PIN[158] , Mask for interrupt XGPIO pin 158" "Not masked,Masked" textline " " bitfld.long 0x10 29. " PIN[157] , Mask for interrupt XGPIO pin 157" "Not masked,Masked" bitfld.long 0x10 28. " PIN[156] , Mask for interrupt XGPIO pin 156" "Not masked,Masked" textline " " bitfld.long 0x10 27. " PIN[155] , Mask for interrupt XGPIO pin 155" "Not masked,Masked" bitfld.long 0x10 26. " PIN[154] , Mask for interrupt XGPIO pin 154" "Not masked,Masked" textline " " bitfld.long 0x10 25. " PIN[153] , Mask for interrupt XGPIO pin 153" "Not masked,Masked" bitfld.long 0x10 24. " PIN[152] , Mask for interrupt XGPIO pin 152" "Not masked,Masked" textline " " bitfld.long 0x10 23. " PIN[151] , Mask for interrupt XGPIO pin 151" "Not masked,Masked" bitfld.long 0x10 22. " PIN[150] , Mask for interrupt XGPIO pin 150" "Not masked,Masked" textline " " bitfld.long 0x10 21. " PIN[149] , Mask for interrupt XGPIO pin 149" "Not masked,Masked" bitfld.long 0x10 20. " PIN[148] , Mask for interrupt XGPIO pin 148" "Not masked,Masked" textline " " bitfld.long 0x10 19. " PIN[147] , Mask for interrupt XGPIO pin 147" "Not masked,Masked" bitfld.long 0x10 18. " PIN[146] , Mask for interrupt XGPIO pin 146" "Not masked,Masked" textline " " bitfld.long 0x10 17. " PIN[145] , Mask for interrupt XGPIO pin 145" "Not masked,Masked" bitfld.long 0x10 16. " PIN[144] , Mask for interrupt XGPIO pin 144" "Not masked,Masked" textline " " bitfld.long 0x10 15. " PIN[143] , Mask for interrupt XGPIO pin 143" "Not masked,Masked" bitfld.long 0x10 14. " PIN[142] , Mask for interrupt XGPIO pin 142" "Not masked,Masked" textline " " bitfld.long 0x10 13. " PIN[141] , Mask for interrupt XGPIO pin 141" "Not masked,Masked" bitfld.long 0x10 12. " PIN[140] , Mask for interrupt XGPIO pin 140" "Not masked,Masked" textline " " bitfld.long 0x10 11. " PIN[139] , Mask for interrupt XGPIO pin 139" "Not masked,Masked" bitfld.long 0x10 10. " PIN[138] , Mask for interrupt XGPIO pin 138" "Not masked,Masked" textline " " bitfld.long 0x10 9. " PIN[137] , Mask for interrupt XGPIO pin 137" "Not masked,Masked" bitfld.long 0x10 8. " PIN[136] , Mask for interrupt XGPIO pin 136" "Not masked,Masked" textline " " bitfld.long 0x10 7. " PIN[135] , Mask for interrupt XGPIO pin 135" "Not masked,Masked" bitfld.long 0x10 6. " PIN[134] , Mask for interrupt XGPIO pin 134" "Not masked,Masked" textline " " bitfld.long 0x10 5. " PIN[133] , Mask for interrupt XGPIO pin 133" "Not masked,Masked" bitfld.long 0x10 4. " PIN[132] , Mask for interrupt XGPIO pin 132" "Not masked,Masked" textline " " bitfld.long 0x10 3. " PIN[131] , Mask for interrupt XGPIO pin 131" "Not masked,Masked" bitfld.long 0x10 2. " PIN[130] , Mask for interrupt XGPIO pin 130" "Not masked,Masked" textline " " bitfld.long 0x10 1. " PIN[129] , Mask for interrupt XGPIO pin 129" "Not masked,Masked" bitfld.long 0x10 0. " PIN[128] , Mask for interrupt XGPIO pin 128" "Not masked,Masked" line.long 0x14 "GPIO_IRQ_MASK5, XGPIO Pad Input Register" bitfld.long 0x14 31. " PIN[191] , Mask for interrupt XGPIO pin 191" "Not masked,Masked" bitfld.long 0x14 30. " PIN[190] , Mask for interrupt XGPIO pin 190" "Not masked,Masked" textline " " bitfld.long 0x14 29. " PIN[189] , Mask for interrupt XGPIO pin 189" "Not masked,Masked" bitfld.long 0x14 28. " PIN[188] , Mask for interrupt XGPIO pin 188" "Not masked,Masked" textline " " bitfld.long 0x14 27. " PIN[187] , Mask for interrupt XGPIO pin 187" "Not masked,Masked" bitfld.long 0x14 26. " PIN[186] , Mask for interrupt XGPIO pin 186" "Not masked,Masked" textline " " bitfld.long 0x14 25. " PIN[185] , Mask for interrupt XGPIO pin 185" "Not masked,Masked" bitfld.long 0x14 24. " PIN[184] , Mask for interrupt XGPIO pin 184" "Not masked,Masked" textline " " bitfld.long 0x14 23. " PIN[183] , Mask for interrupt XGPIO pin 183" "Not masked,Masked" bitfld.long 0x14 22. " PIN[182] , Mask for interrupt XGPIO pin 182" "Not masked,Masked" textline " " bitfld.long 0x14 21. " PIN[181] , Mask for interrupt XGPIO pin 181" "Not masked,Masked" bitfld.long 0x14 20. " PIN[180] , Mask for interrupt XGPIO pin 180" "Not masked,Masked" textline " " bitfld.long 0x14 19. " PIN[179] , Mask for interrupt XGPIO pin 179" "Not masked,Masked" bitfld.long 0x14 18. " PIN[178] , Mask for interrupt XGPIO pin 178" "Not masked,Masked" textline " " bitfld.long 0x14 17. " PIN[177] , Mask for interrupt XGPIO pin 177" "Not masked,Masked" bitfld.long 0x14 16. " PIN[176] , Mask for interrupt XGPIO pin 176" "Not masked,Masked" textline " " bitfld.long 0x14 15. " PIN[175] , Mask for interrupt XGPIO pin 175" "Not masked,Masked" bitfld.long 0x14 14. " PIN[174] , Mask for interrupt XGPIO pin 174" "Not masked,Masked" textline " " bitfld.long 0x14 13. " PIN[173] , Mask for interrupt XGPIO pin 173" "Not masked,Masked" bitfld.long 0x14 12. " PIN[172] , Mask for interrupt XGPIO pin 172" "Not masked,Masked" textline " " bitfld.long 0x14 11. " PIN[171] , Mask for interrupt XGPIO pin 171" "Not masked,Masked" bitfld.long 0x14 10. " PIN[170] , Mask for interrupt XGPIO pin 170" "Not masked,Masked" textline " " bitfld.long 0x14 9. " PIN[169] , Mask for interrupt XGPIO pin 169" "Not masked,Masked" bitfld.long 0x14 8. " PIN[168] , Mask for interrupt XGPIO pin 168" "Not masked,Masked" textline " " bitfld.long 0x14 7. " PIN[167] , Mask for interrupt XGPIO pin 167" "Not masked,Masked" bitfld.long 0x14 6. " PIN[166] , Mask for interrupt XGPIO pin 166" "Not masked,Masked" textline " " bitfld.long 0x14 5. " PIN[165] , Mask for interrupt XGPIO pin 165" "Not masked,Masked" bitfld.long 0x14 4. " PIN[164] , Mask for interrupt XGPIO pin 164" "Not masked,Masked" textline " " bitfld.long 0x14 3. " PIN[163] , Mask for interrupt XGPIO pin 163" "Not masked,Masked" bitfld.long 0x14 2. " PIN[162] , Mask for interrupt XGPIO pin 162" "Not masked,Masked" textline " " bitfld.long 0x14 1. " PIN[161] , Mask for interrupt XGPIO pin 161" "Not masked,Masked" bitfld.long 0x14 0. " PIN[160] , Mask for interrupt XGPIO pin 160" "Not masked,Masked" line.long 0x18 "GPIO_IRQ_MASK6, XGPIO Pad Input Register" bitfld.long 0x18 31. " PIN[223] , Mask for interrupt XGPIO pin 223" "Not masked,Masked" bitfld.long 0x18 30. " PIN[222] , Mask for interrupt XGPIO pin 222" "Not masked,Masked" textline " " bitfld.long 0x18 29. " PIN[221] , Mask for interrupt XGPIO pin 221" "Not masked,Masked" bitfld.long 0x18 28. " PIN[220] , Mask for interrupt XGPIO pin 220" "Not masked,Masked" textline " " bitfld.long 0x18 27. " PIN[219] , Mask for interrupt XGPIO pin 219" "Not masked,Masked" bitfld.long 0x18 26. " PIN[218] , Mask for interrupt XGPIO pin 218" "Not masked,Masked" textline " " bitfld.long 0x18 25. " PIN[217] , Mask for interrupt XGPIO pin 217" "Not masked,Masked" bitfld.long 0x18 24. " PIN[216] , Mask for interrupt XGPIO pin 216" "Not masked,Masked" textline " " bitfld.long 0x18 23. " PIN[215] , Mask for interrupt XGPIO pin 215" "Not masked,Masked" bitfld.long 0x18 22. " PIN[214] , Mask for interrupt XGPIO pin 214" "Not masked,Masked" textline " " bitfld.long 0x18 21. " PIN[213] , Mask for interrupt XGPIO pin 213" "Not masked,Masked" bitfld.long 0x18 20. " PIN[212] , Mask for interrupt XGPIO pin 212" "Not masked,Masked" textline " " bitfld.long 0x18 19. " PIN[211] , Mask for interrupt XGPIO pin 211" "Not masked,Masked" bitfld.long 0x18 18. " PIN[210] , Mask for interrupt XGPIO pin 210" "Not masked,Masked" textline " " bitfld.long 0x18 17. " PIN[209] , Mask for interrupt XGPIO pin 209" "Not masked,Masked" bitfld.long 0x18 16. " PIN[208] , Mask for interrupt XGPIO pin 208" "Not masked,Masked" textline " " bitfld.long 0x18 15. " PIN[207] , Mask for interrupt XGPIO pin 207" "Not masked,Masked" bitfld.long 0x18 14. " PIN[206] , Mask for interrupt XGPIO pin 206" "Not masked,Masked" textline " " bitfld.long 0x18 13. " PIN[205] , Mask for interrupt XGPIO pin 205" "Not masked,Masked" bitfld.long 0x18 12. " PIN[204] , Mask for interrupt XGPIO pin 204" "Not masked,Masked" textline " " bitfld.long 0x18 11. " PIN[203] , Mask for interrupt XGPIO pin 203" "Not masked,Masked" bitfld.long 0x18 10. " PIN[202] , Mask for interrupt XGPIO pin 202" "Not masked,Masked" textline " " bitfld.long 0x18 9. " PIN[201] , Mask for interrupt XGPIO pin 201" "Not masked,Masked" bitfld.long 0x18 8. " PIN[200] , Mask for interrupt XGPIO pin 200" "Not masked,Masked" textline " " bitfld.long 0x18 7. " PIN[199] , Mask for interrupt XGPIO pin 199" "Not masked,Masked" bitfld.long 0x18 6. " PIN[198] , Mask for interrupt XGPIO pin 198" "Not masked,Masked" textline " " bitfld.long 0x18 5. " PIN[197] , Mask for interrupt XGPIO pin 197" "Not masked,Masked" bitfld.long 0x18 4. " PIN[196] , Mask for interrupt XGPIO pin 196" "Not masked,Masked" textline " " bitfld.long 0x18 3. " PIN[195] , Mask for interrupt XGPIO pin 195" "Not masked,Masked" bitfld.long 0x18 2. " PIN[194] , Mask for interrupt XGPIO pin 194" "Not masked,Masked" textline " " bitfld.long 0x18 1. " PIN[193] , Mask for interrupt XGPIO pin 193" "Not masked,Masked" bitfld.long 0x18 0. " PIN[192] , Mask for interrupt XGPIO pin 192" "Not masked,Masked" line.long 0x1C "GPIO_IRQ_MASK7, XGPIO Interrupt Mask Register" hexmask.long 0x1C 0.--25. 1. " GPIO_IRQ_MASK7 , XGPIO Interrupt Mask Register" group.long 0xA0++0x1F line.long 0x00 "GPIO_IRQ0, XGPIO Pad Input Register" bitfld.long 0x00 31. " PIN[31] , Status of interrupt XGPIO pin 31" "Not received,Received" bitfld.long 0x00 30. " PIN[30] , Status of interrupt XGPIO pin 30" "Not received,Received" textline " " bitfld.long 0x00 29. " PIN[29] , Status of interrupt XGPIO pin 29" "Not received,Received" bitfld.long 0x00 28. " PIN[28] , Status of interrupt XGPIO pin 28" "Not received,Received" textline " " bitfld.long 0x00 27. " PIN[27] , Status of interrupt XGPIO pin 27" "Not received,Received" bitfld.long 0x00 26. " PIN[26] , Status of interrupt XGPIO pin 26" "Not received,Received" textline " " bitfld.long 0x00 25. " PIN[25] , Status of interrupt XGPIO pin 25" "Not received,Received" bitfld.long 0x00 24. " PIN[24] , Status of interrupt XGPIO pin 24" "Not received,Received" textline " " bitfld.long 0x00 7. " PIN[7] , Status of interrupt XGPIO pin 7" "Not received,Received" bitfld.long 0x00 6. " PIN[6] , Status of interrupt XGPIO pin 6" "Not received,Received" textline " " bitfld.long 0x00 5. " PIN[5] , Status of interrupt XGPIO pin 5" "Not received,Received" bitfld.long 0x00 4. " PIN[4] , Status of interrupt XGPIO pin 4" "Not received,Received" textline " " bitfld.long 0x00 3. " PIN[3] , Status of interrupt XGPIO pin 3" "Not received,Received" bitfld.long 0x00 2. " PIN[2] , Status of interrupt XGPIO pin 2" "Not received,Received" textline " " bitfld.long 0x00 1. " PIN[1] , Status of interrupt XGPIO pin 1" "Not received,Received" bitfld.long 0x00 0. " PIN[0] , Status of interrupt XGPIO pin 0" "Not received,Received" line.long 0x04 "GPIO_IRQ1, XGPIO Pad Input Register" bitfld.long 0x04 31. " PIN[63] , Status of interrupt XGPIO pin 63" "Not received,Received" bitfld.long 0x04 30. " PIN[62] , Status of interrupt XGPIO pin 62" "Not received,Received" textline " " bitfld.long 0x04 29. " PIN[61] , Status of interrupt XGPIO pin 61" "Not received,Received" bitfld.long 0x04 28. " PIN[60] , Status of interrupt XGPIO pin 60" "Not received,Received" textline " " bitfld.long 0x04 27. " PIN[59] , Status of interrupt XGPIO pin 59" "Not received,Received" bitfld.long 0x04 26. " PIN[58] , Status of interrupt XGPIO pin 58" "Not received,Received" textline " " bitfld.long 0x04 25. " PIN[57] , Status of interrupt XGPIO pin 57" "Not received,Received" bitfld.long 0x04 24. " PIN[56] , Status of interrupt XGPIO pin 56" "Not received,Received" textline " " bitfld.long 0x04 23. " PIN[55] , Status of interrupt XGPIO pin 55" "Not received,Received" bitfld.long 0x04 22. " PIN[54] , Status of interrupt XGPIO pin 54" "Not received,Received" textline " " bitfld.long 0x04 21. " PIN[53] , Status of interrupt XGPIO pin 53" "Not received,Received" bitfld.long 0x04 20. " PIN[52] , Status of interrupt XGPIO pin 52" "Not received,Received" textline " " bitfld.long 0x04 19. " PIN[51] , Status of interrupt XGPIO pin 51" "Not received,Received" bitfld.long 0x04 18. " PIN[50] , Status of interrupt XGPIO pin 50" "Not received,Received" textline " " bitfld.long 0x04 17. " PIN[49] , Status of interrupt XGPIO pin 49" "Not received,Received" bitfld.long 0x04 16. " PIN[48] , Status of interrupt XGPIO pin 48" "Not received,Received" textline " " bitfld.long 0x04 15. " PIN[47] , Status of interrupt XGPIO pin 47" "Not received,Received" bitfld.long 0x04 14. " PIN[46] , Status of interrupt XGPIO pin 46" "Not received,Received" textline " " bitfld.long 0x04 13. " PIN[45] , Status of interrupt XGPIO pin 45" "Not received,Received" bitfld.long 0x04 12. " PIN[44] , Status of interrupt XGPIO pin 44" "Not received,Received" textline " " bitfld.long 0x04 11. " PIN[43] , Status of interrupt XGPIO pin 43" "Not received,Received" bitfld.long 0x04 10. " PIN[42] , Status of interrupt XGPIO pin 42" "Not received,Received" textline " " bitfld.long 0x04 9. " PIN[41] , Status of interrupt XGPIO pin 41" "Not received,Received" bitfld.long 0x04 8. " PIN[40] , Status of interrupt XGPIO pin 40" "Not received,Received" textline " " bitfld.long 0x04 7. " PIN[39] , Status of interrupt XGPIO pin 39" "Not received,Received" bitfld.long 0x04 6. " PIN[38] , Status of interrupt XGPIO pin 38" "Not received,Received" textline " " bitfld.long 0x04 5. " PIN[37] , Status of interrupt XGPIO pin 37" "Not received,Received" bitfld.long 0x04 4. " PIN[36] , Status of interrupt XGPIO pin 36" "Not received,Received" textline " " bitfld.long 0x04 3. " PIN[35] , Status of interrupt XGPIO pin 35" "Not received,Received" bitfld.long 0x04 2. " PIN[34] , Status of interrupt XGPIO pin 34" "Not received,Received" textline " " bitfld.long 0x04 1. " PIN[33] , Status of interrupt XGPIO pin 33" "Not received,Received" bitfld.long 0x04 0. " PIN[32] , Status of interrupt XGPIO pin 32" "Not received,Received" line.long 0x08 "GPIO_IRQ2, XGPIO Pad Input Register" bitfld.long 0x08 31. " PIN[95] , Status of interrupt XGPIO pin 95" "Not received,Received" bitfld.long 0x08 30. " PIN[94] , Status of interrupt XGPIO pin 94" "Not received,Received" textline " " bitfld.long 0x08 29. " PIN[93] , Status of interrupt XGPIO pin 93" "Not received,Received" bitfld.long 0x08 28. " PIN[92] , Status of interrupt XGPIO pin 92" "Not received,Received" textline " " bitfld.long 0x08 27. " PIN[91] , Status of interrupt XGPIO pin 91" "Not received,Received" bitfld.long 0x08 26. " PIN[90] , Status of interrupt XGPIO pin 90" "Not received,Received" textline " " bitfld.long 0x08 25. " PIN[89] , Status of interrupt XGPIO pin 89" "Not received,Received" bitfld.long 0x08 24. " PIN[88] , Status of interrupt XGPIO pin 88" "Not received,Received" textline " " bitfld.long 0x08 23. " PIN[87] , Status of interrupt XGPIO pin 87" "Not received,Received" bitfld.long 0x08 22. " PIN[86] , Status of interrupt XGPIO pin 86" "Not received,Received" textline " " bitfld.long 0x08 21. " PIN[85] , Status of interrupt XGPIO pin 85" "Not received,Received" bitfld.long 0x08 20. " PIN[84] , Status of interrupt XGPIO pin 84" "Not received,Received" textline " " bitfld.long 0x08 19. " PIN[83] , Status of interrupt XGPIO pin 83" "Not received,Received" bitfld.long 0x08 18. " PIN[82] , Status of interrupt XGPIO pin 82" "Not received,Received" textline " " bitfld.long 0x08 17. " PIN[81] , Status of interrupt XGPIO pin 81" "Not received,Received" bitfld.long 0x08 16. " PIN[80] , Status of interrupt XGPIO pin 80" "Not received,Received" textline " " bitfld.long 0x08 15. " PIN[79] , Status of interrupt XGPIO pin 79" "Not received,Received" bitfld.long 0x08 14. " PIN[78] , Status of interrupt XGPIO pin 78" "Not received,Received" textline " " bitfld.long 0x08 13. " PIN[77] , Status of interrupt XGPIO pin 77" "Not received,Received" bitfld.long 0x08 12. " PIN[76] , Status of interrupt XGPIO pin 76" "Not received,Received" textline " " bitfld.long 0x08 11. " PIN[75] , Status of interrupt XGPIO pin 75" "Not received,Received" bitfld.long 0x08 10. " PIN[74] , Status of interrupt XGPIO pin 74" "Not received,Received" textline " " bitfld.long 0x08 9. " PIN[73] , Status of interrupt XGPIO pin 73" "Not received,Received" bitfld.long 0x08 8. " PIN[72] , Status of interrupt XGPIO pin 72" "Not received,Received" textline " " bitfld.long 0x08 7. " PIN[71] , Status of interrupt XGPIO pin 71" "Not received,Received" bitfld.long 0x08 6. " PIN[70] , Status of interrupt XGPIO pin 70" "Not received,Received" textline " " bitfld.long 0x08 5. " PIN[69] , Status of interrupt XGPIO pin 69" "Not received,Received" bitfld.long 0x08 4. " PIN[68] , Status of interrupt XGPIO pin 68" "Not received,Received" textline " " bitfld.long 0x08 3. " PIN[67] , Status of interrupt XGPIO pin 67" "Not received,Received" bitfld.long 0x08 2. " PIN[66] , Status of interrupt XGPIO pin 66" "Not received,Received" textline " " bitfld.long 0x08 1. " PIN[65] , Status of interrupt XGPIO pin 65" "Not received,Received" bitfld.long 0x08 0. " PIN[64] , Status of interrupt XGPIO pin 64" "Not received,Received" line.long 0x0C "GPIO_IRQ3, XGPIO Pad Input Register" bitfld.long 0x0C 31. " PIN[127] , Status of interrupt XGPIO pin 127" "Not received,Received" bitfld.long 0x0C 30. " PIN[126] , Status of interrupt XGPIO pin 126" "Not received,Received" textline " " bitfld.long 0x0C 29. " PIN[125] , Status of interrupt XGPIO pin 125" "Not received,Received" bitfld.long 0x0C 28. " PIN[124] , Status of interrupt XGPIO pin 124" "Not received,Received" textline " " bitfld.long 0x0C 27. " PIN[123] , Status of interrupt XGPIO pin 123" "Not received,Received" bitfld.long 0x0C 26. " PIN[122] , Status of interrupt XGPIO pin 122" "Not received,Received" textline " " bitfld.long 0x0C 25. " PIN[121] , Status of interrupt XGPIO pin 121" "Not received,Received" bitfld.long 0x0C 24. " PIN[120] , Status of interrupt XGPIO pin 120" "Not received,Received" textline " " bitfld.long 0x0C 23. " PIN[119] , Status of interrupt XGPIO pin 119" "Not received,Received" bitfld.long 0x0C 22. " PIN[118] , Status of interrupt XGPIO pin 118" "Not received,Received" textline " " bitfld.long 0x0C 21. " PIN[117] , Status of interrupt XGPIO pin 117" "Not received,Received" bitfld.long 0x0C 20. " PIN[116] , Status of interrupt XGPIO pin 116" "Not received,Received" textline " " bitfld.long 0x0C 19. " PIN[115] , Status of interrupt XGPIO pin 115" "Not received,Received" bitfld.long 0x0C 18. " PIN[114] , Status of interrupt XGPIO pin 114" "Not received,Received" textline " " bitfld.long 0x0C 17. " PIN[113] , Status of interrupt XGPIO pin 113" "Not received,Received" bitfld.long 0x0C 16. " PIN[112] , Status of interrupt XGPIO pin 112" "Not received,Received" textline " " bitfld.long 0x0C 15. " PIN[111] , Status of interrupt XGPIO pin 111" "Not received,Received" bitfld.long 0x0C 14. " PIN[110] , Status of interrupt XGPIO pin 110" "Not received,Received" textline " " bitfld.long 0x0C 13. " PIN[109] , Status of interrupt XGPIO pin 109" "Not received,Received" bitfld.long 0x0C 12. " PIN[108] , Status of interrupt XGPIO pin 108" "Not received,Received" textline " " bitfld.long 0x0C 11. " PIN[107] , Status of interrupt XGPIO pin 107" "Not received,Received" bitfld.long 0x0C 10. " PIN[106] , Status of interrupt XGPIO pin 106" "Not received,Received" textline " " bitfld.long 0x0C 9. " PIN[105] , Status of interrupt XGPIO pin 105" "Not received,Received" bitfld.long 0x0C 8. " PIN[104] , Status of interrupt XGPIO pin 104" "Not received,Received" textline " " bitfld.long 0x0C 7. " PIN[103] , Status of interrupt XGPIO pin 103" "Not received,Received" bitfld.long 0x0C 6. " PIN[102] , Status of interrupt XGPIO pin 102" "Not received,Received" textline " " bitfld.long 0x0C 5. " PIN[101] , Status of interrupt XGPIO pin 101" "Not received,Received" bitfld.long 0x0C 4. " PIN[100] , Status of interrupt XGPIO pin 100" "Not received,Received" textline " " bitfld.long 0x0C 3. " PIN[99] , Status of interrupt XGPIO pin 99" "Not received,Received" bitfld.long 0x0C 2. " PIN[98] , Status of interrupt XGPIO pin 98" "Not received,Received" textline " " bitfld.long 0x0C 1. " PIN[97] , Status of interrupt XGPIO pin 97" "Not received,Received" bitfld.long 0x0C 0. " PIN[96] , Status of interrupt XGPIO pin 96" "Not received,Received" line.long 0x10 "GPIO_IRQ4, XGPIO Pad Input Register" bitfld.long 0x10 31. " PIN[159] , Status of interrupt XGPIO pin 159" "Not received,Received" bitfld.long 0x10 30. " PIN[158] , Status of interrupt XGPIO pin 158" "Not received,Received" textline " " bitfld.long 0x10 29. " PIN[157] , Status of interrupt XGPIO pin 157" "Not received,Received" bitfld.long 0x10 28. " PIN[156] , Status of interrupt XGPIO pin 156" "Not received,Received" textline " " bitfld.long 0x10 27. " PIN[155] , Status of interrupt XGPIO pin 155" "Not received,Received" bitfld.long 0x10 26. " PIN[154] , Status of interrupt XGPIO pin 154" "Not received,Received" textline " " bitfld.long 0x10 25. " PIN[153] , Status of interrupt XGPIO pin 153" "Not received,Received" bitfld.long 0x10 24. " PIN[152] , Status of interrupt XGPIO pin 152" "Not received,Received" textline " " bitfld.long 0x10 23. " PIN[151] , Status of interrupt XGPIO pin 151" "Not received,Received" bitfld.long 0x10 22. " PIN[150] , Status of interrupt XGPIO pin 150" "Not received,Received" textline " " bitfld.long 0x10 21. " PIN[149] , Status of interrupt XGPIO pin 149" "Not received,Received" bitfld.long 0x10 20. " PIN[148] , Status of interrupt XGPIO pin 148" "Not received,Received" textline " " bitfld.long 0x10 19. " PIN[147] , Status of interrupt XGPIO pin 147" "Not received,Received" bitfld.long 0x10 18. " PIN[146] , Status of interrupt XGPIO pin 146" "Not received,Received" textline " " bitfld.long 0x10 17. " PIN[145] , Status of interrupt XGPIO pin 145" "Not received,Received" bitfld.long 0x10 16. " PIN[144] , Status of interrupt XGPIO pin 144" "Not received,Received" textline " " bitfld.long 0x10 15. " PIN[143] , Status of interrupt XGPIO pin 143" "Not received,Received" bitfld.long 0x10 14. " PIN[142] , Status of interrupt XGPIO pin 142" "Not received,Received" textline " " bitfld.long 0x10 13. " PIN[141] , Status of interrupt XGPIO pin 141" "Not received,Received" bitfld.long 0x10 12. " PIN[140] , Status of interrupt XGPIO pin 140" "Not received,Received" textline " " bitfld.long 0x10 11. " PIN[139] , Status of interrupt XGPIO pin 139" "Not received,Received" bitfld.long 0x10 10. " PIN[138] , Status of interrupt XGPIO pin 138" "Not received,Received" textline " " bitfld.long 0x10 9. " PIN[137] , Status of interrupt XGPIO pin 137" "Not received,Received" bitfld.long 0x10 8. " PIN[136] , Status of interrupt XGPIO pin 136" "Not received,Received" textline " " bitfld.long 0x10 7. " PIN[135] , Status of interrupt XGPIO pin 135" "Not received,Received" bitfld.long 0x10 6. " PIN[134] , Status of interrupt XGPIO pin 134" "Not received,Received" textline " " bitfld.long 0x10 5. " PIN[133] , Status of interrupt XGPIO pin 133" "Not received,Received" bitfld.long 0x10 4. " PIN[132] , Status of interrupt XGPIO pin 132" "Not received,Received" textline " " bitfld.long 0x10 3. " PIN[131] , Status of interrupt XGPIO pin 131" "Not received,Received" bitfld.long 0x10 2. " PIN[130] , Status of interrupt XGPIO pin 130" "Not received,Received" textline " " bitfld.long 0x10 1. " PIN[129] , Status of interrupt XGPIO pin 129" "Not received,Received" bitfld.long 0x10 0. " PIN[128] , Status of interrupt XGPIO pin 128" "Not received,Received" line.long 0x14 "GPIO_IRQ5, XGPIO Pad Input Register" bitfld.long 0x14 31. " PIN[191] , Status of interrupt XGPIO pin 191" "Not received,Received" bitfld.long 0x14 30. " PIN[190] , Status of interrupt XGPIO pin 190" "Not received,Received" textline " " bitfld.long 0x14 29. " PIN[189] , Status of interrupt XGPIO pin 189" "Not received,Received" bitfld.long 0x14 28. " PIN[188] , Status of interrupt XGPIO pin 188" "Not received,Received" textline " " bitfld.long 0x14 27. " PIN[187] , Status of interrupt XGPIO pin 187" "Not received,Received" bitfld.long 0x14 26. " PIN[186] , Status of interrupt XGPIO pin 186" "Not received,Received" textline " " bitfld.long 0x14 25. " PIN[185] , Status of interrupt XGPIO pin 185" "Not received,Received" bitfld.long 0x14 24. " PIN[184] , Status of interrupt XGPIO pin 184" "Not received,Received" textline " " bitfld.long 0x14 23. " PIN[183] , Status of interrupt XGPIO pin 183" "Not received,Received" bitfld.long 0x14 22. " PIN[182] , Status of interrupt XGPIO pin 182" "Not received,Received" textline " " bitfld.long 0x14 21. " PIN[181] , Status of interrupt XGPIO pin 181" "Not received,Received" bitfld.long 0x14 20. " PIN[180] , Status of interrupt XGPIO pin 180" "Not received,Received" textline " " bitfld.long 0x14 19. " PIN[179] , Status of interrupt XGPIO pin 179" "Not received,Received" bitfld.long 0x14 18. " PIN[178] , Status of interrupt XGPIO pin 178" "Not received,Received" textline " " bitfld.long 0x14 17. " PIN[177] , Status of interrupt XGPIO pin 177" "Not received,Received" bitfld.long 0x14 16. " PIN[176] , Status of interrupt XGPIO pin 176" "Not received,Received" textline " " bitfld.long 0x14 15. " PIN[175] , Status of interrupt XGPIO pin 175" "Not received,Received" bitfld.long 0x14 14. " PIN[174] , Status of interrupt XGPIO pin 174" "Not received,Received" textline " " bitfld.long 0x14 13. " PIN[173] , Status of interrupt XGPIO pin 173" "Not received,Received" bitfld.long 0x14 12. " PIN[172] , Status of interrupt XGPIO pin 172" "Not received,Received" textline " " bitfld.long 0x14 11. " PIN[171] , Status of interrupt XGPIO pin 171" "Not received,Received" bitfld.long 0x14 10. " PIN[170] , Status of interrupt XGPIO pin 170" "Not received,Received" textline " " bitfld.long 0x14 9. " PIN[169] , Status of interrupt XGPIO pin 169" "Not received,Received" bitfld.long 0x14 8. " PIN[168] , Status of interrupt XGPIO pin 168" "Not received,Received" textline " " bitfld.long 0x14 7. " PIN[167] , Status of interrupt XGPIO pin 167" "Not received,Received" bitfld.long 0x14 6. " PIN[166] , Status of interrupt XGPIO pin 166" "Not received,Received" textline " " bitfld.long 0x14 5. " PIN[165] , Status of interrupt XGPIO pin 165" "Not received,Received" bitfld.long 0x14 4. " PIN[164] , Status of interrupt XGPIO pin 164" "Not received,Received" textline " " bitfld.long 0x14 3. " PIN[163] , Status of interrupt XGPIO pin 163" "Not received,Received" bitfld.long 0x14 2. " PIN[162] , Status of interrupt XGPIO pin 162" "Not received,Received" textline " " bitfld.long 0x14 1. " PIN[161] , Status of interrupt XGPIO pin 161" "Not received,Received" bitfld.long 0x14 0. " PIN[160] , Status of interrupt XGPIO pin 160" "Not received,Received" line.long 0x18 "GPIO_IRQ6, XGPIO Pad Input Register" bitfld.long 0x18 31. " PIN[223] , Status of interrupt XGPIO pin 223" "Not received,Received" bitfld.long 0x18 30. " PIN[222] , Status of interrupt XGPIO pin 222" "Not received,Received" textline " " bitfld.long 0x18 29. " PIN[221] , Status of interrupt XGPIO pin 221" "Not received,Received" bitfld.long 0x18 28. " PIN[220] , Status of interrupt XGPIO pin 220" "Not received,Received" textline " " bitfld.long 0x18 27. " PIN[219] , Status of interrupt XGPIO pin 219" "Not received,Received" bitfld.long 0x18 26. " PIN[218] , Status of interrupt XGPIO pin 218" "Not received,Received" textline " " bitfld.long 0x18 25. " PIN[217] , Status of interrupt XGPIO pin 217" "Not received,Received" bitfld.long 0x18 24. " PIN[216] , Status of interrupt XGPIO pin 216" "Not received,Received" textline " " bitfld.long 0x18 23. " PIN[215] , Status of interrupt XGPIO pin 215" "Not received,Received" bitfld.long 0x18 22. " PIN[214] , Status of interrupt XGPIO pin 214" "Not received,Received" textline " " bitfld.long 0x18 21. " PIN[213] , Status of interrupt XGPIO pin 213" "Not received,Received" bitfld.long 0x18 20. " PIN[212] , Status of interrupt XGPIO pin 212" "Not received,Received" textline " " bitfld.long 0x18 19. " PIN[211] , Status of interrupt XGPIO pin 211" "Not received,Received" bitfld.long 0x18 18. " PIN[210] , Status of interrupt XGPIO pin 210" "Not received,Received" textline " " bitfld.long 0x18 17. " PIN[209] , Status of interrupt XGPIO pin 209" "Not received,Received" bitfld.long 0x18 16. " PIN[208] , Status of interrupt XGPIO pin 208" "Not received,Received" textline " " bitfld.long 0x18 15. " PIN[207] , Status of interrupt XGPIO pin 207" "Not received,Received" bitfld.long 0x18 14. " PIN[206] , Status of interrupt XGPIO pin 206" "Not received,Received" textline " " bitfld.long 0x18 13. " PIN[205] , Status of interrupt XGPIO pin 205" "Not received,Received" bitfld.long 0x18 12. " PIN[204] , Status of interrupt XGPIO pin 204" "Not received,Received" textline " " bitfld.long 0x18 11. " PIN[203] , Status of interrupt XGPIO pin 203" "Not received,Received" bitfld.long 0x18 10. " PIN[202] , Status of interrupt XGPIO pin 202" "Not received,Received" textline " " bitfld.long 0x18 9. " PIN[201] , Status of interrupt XGPIO pin 201" "Not received,Received" bitfld.long 0x18 8. " PIN[200] , Status of interrupt XGPIO pin 200" "Not received,Received" textline " " bitfld.long 0x18 7. " PIN[199] , Status of interrupt XGPIO pin 199" "Not received,Received" bitfld.long 0x18 6. " PIN[198] , Status of interrupt XGPIO pin 198" "Not received,Received" textline " " bitfld.long 0x18 5. " PIN[197] , Status of interrupt XGPIO pin 197" "Not received,Received" bitfld.long 0x18 4. " PIN[196] , Status of interrupt XGPIO pin 196" "Not received,Received" textline " " bitfld.long 0x18 3. " PIN[195] , Status of interrupt XGPIO pin 195" "Not received,Received" bitfld.long 0x18 2. " PIN[194] , Status of interrupt XGPIO pin 194" "Not received,Received" textline " " bitfld.long 0x18 1. " PIN[193] , Status of interrupt XGPIO pin 193" "Not received,Received" bitfld.long 0x18 0. " PIN[192] , Status of interrupt XGPIO pin 192" "Not received,Received" line.long 0x1C "GPIO_IRQ7, XGPIO Interrupt Status Register" hexmask.long 0x1C 0.--25. 1. " GPIO_IRQ7 , XGPIO Interrupt Status Register" width 0x0B tree.end tree "KBD (Keyboard controller)" base ad:0xE0300000 width 12. group.long 0x00++0x0F line.long 0x00 "MDCTRLREG, Mode Control Register" hexmask.long.byte 0x00 9.--15. 1. " PCLKFREQUENCE , Prescaler programmable value" bitfld.long 0x00 8. " KBSEF , KeyBoard Scan Enable Flag" "Disable,Enable" textline " " sif (cpuis("SPEAR1310*")) bitfld.long 0x00 6.--7. " KEYNUMSEL , Keyboard Key Number select" "9x9,6x6,2x2,?..." bitfld.long 0x00 2.--3. " KBSCANRATE , Keyboard scan rate" "10ms,20ms,40ms,80ms" else bitfld.long 0x00 6.--7. " KEYNUMSEL , Keyboard Key Number select" "Reserved,6x6,2x2,?..." bitfld.long 0x00 2.--3. " KBSCANRATE , Keyboard scan rate" "10ms,20ms,40ms,80ms" endif textline " " bitfld.long 0x00 0.--1. " MODE_CONTROL , Mode selection" "Inactive,GPIO,Keyboard,?..." line.long 0x04 "PARMASKREG, Mask Register" bitfld.long 0x04 19. " GPIOEN[19] , GPIO direction" "Input,Output" bitfld.long 0x04 18. " GPIOEN[18] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 17. " GPIOEN[17] , GPIO direction" "Input,Output" bitfld.long 0x04 16. " GPIOEN[16] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 15. " GPIOEN[15] , GPIO direction" "Input,Output" bitfld.long 0x04 14. " GPIOEN[14] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 13. " GPIOEN[13] , GPIO direction" "Input,Output" bitfld.long 0x04 12. " GPIOEN[12] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 11. " GPIOEN[11] , GPIO direction" "Input,Output" bitfld.long 0x04 10. " GPIOEN[10] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 9. " GPIOEN[9] , GPIO direction" "Input,Output" bitfld.long 0x04 8. " GPIOEN[8] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 7. " GPIOEN[7] , GPIO direction" "Input,Output" bitfld.long 0x04 6. " GPIOEN[6] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 5. " GPIOEN[5] , GPIO direction" "Input,Output" bitfld.long 0x04 4. " GPIOEN[4] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 3. " GPIOEN[3] , GPIO direction" "Input,Output" bitfld.long 0x04 2. " GPIOEN[2] , GPIO direction" "Input,Output" textline " " bitfld.long 0x04 1. " GPIOEN[1] , GPIO direction" "Input,Output" bitfld.long 0x04 0. " GPIOEN[0] , GPIO direction" "Input,Output" line.long 0x08 "PARDATAREG, Data Register" sif (cpuis("SPEAR1310*")) hexmask.long.word 0x08 9.--17. 1. " GPIOREG_HI ,Upper 9 bits of the data correspond to upper 9 pins" hexmask.long.word 0x08 0.--8. 1. " GPIOREG_LO ,Lower 9 bits of the data correspond to lower 9 pins" else hexmask.long.byte 0x08 9.--14. 1. " GPIOREG_HI , Higher 6bit of the data corresponding to higher 6 pins" hexmask.long.byte 0x08 0.--5. 1. " GPIOREG_LO , Lower 6bit of the data corresponding to lower 6 pins" endif line.long 0x0C "STATUSREG, Status Register" bitfld.long 0x0C 1. " KBNEWDATA , New keyboard available" "Not available,Available" rgroup.long 0x10++0x03 line.long 0x00 "KBREG, Keyboard Value Register" hexmask.long.byte 0x00 0.--7. 1. " KB_PRDATA , Key-code value" width 0x0B tree.end tree "PWM (PWM generators)" base ad:0xE0180000 width 14. group.long 0x0++0x0B line.long 0x00 "CONTROL_REG1, Control Register for PWM channel 1" hexmask.long.word 0x00 2.--15. 1. " PRESCALER , Defines the division factor for scaling input clock (PCLK) for PWM1 counter" bitfld.long 0x00 0. " EN , Enable bit for PWM1 output" "Disabled,Enabled" line.long 0x04 "DUTY_REG1, Configures duty factor of PWM channel 1 pulse" hexmask.long.word 0x04 0.--15. 1. " DUTY , Defines the duty factor of PWM1 output" line.long 0x08 "PERIOD_REG1, Configures period of PWM channel 1 pulse" hexmask.long.word 0x08 0.--15. 1. " PERIOD , Defines the period of PWM1 output pulse" group.long 0x10++0x0B line.long 0x00 "CONTROL_REG2, Control Register for PWM channel 2" hexmask.long.word 0x00 2.--15. 1. " PRESCALER , Defines the division factor for scaling input clock (PCLK) for PWM2 counter" bitfld.long 0x00 0. " EN , Enable bit for PWM2 output" "Disabled,Enabled" line.long 0x04 "DUTY_REG2, Configures duty factor of PWM channel 2 pulse" hexmask.long.word 0x04 0.--15. 1. " DUTY , Defines the duty factor of PWM2 output" line.long 0x08 "PERIOD_REG2, Configures period of PWM channel 2 pulse" hexmask.long.word 0x08 0.--15. 1. " PERIOD , Defines the period of PWM2 output pulse" group.long 0x20++0x0B line.long 0x00 "CONTROL_REG3, Control Register for PWM channel 3" hexmask.long.word 0x00 2.--15. 1. " PRESCALER , Defines the division factor for scaling input clock (PCLK) for PWM3 counter" bitfld.long 0x00 0. " EN , Enable bit for PWM3 output" "Disabled,Enabled" line.long 0x04 "DUTY_REG3, Configures duty factor of PWM channel 3 pulse" hexmask.long.word 0x04 0.--15. 1. " DUTY , Defines the duty factor of PWM3 output" line.long 0x08 "PERIOD_REG3, Configures period of PWM channel 3 pulse" hexmask.long.word 0x08 0.--15. 1. " PERIOD , Defines the period of PWM3 output pulse" group.long 0x30++0x0B line.long 0x00 "CONTROL_REG4, Control Register for PWM channel 4" hexmask.long.word 0x00 2.--15. 1. " PRESCALER , Defines the division factor for scaling input clock (PCLK) for PWM4 counter" bitfld.long 0x00 0. " EN , Enable bit for PWM4 output" "Disabled,Enabled" line.long 0x04 "DUTY_REG4, Configures duty factor of PWM channel 4 pulse" hexmask.long.word 0x04 0.--15. 1. " DUTY , Defines the duty factor of PWM4 output" line.long 0x08 "PERIOD_REG4, Configures period of PWM channel 4 pulse" hexmask.long.word 0x08 0.--15. 1. " PERIOD , Defines the period of PWM4 output pulse" group.long 0x3C++0x03 line.long 0x00 "MASTER_CTRL, Master enable register" bitfld.long 0x00 0. " MASTER_EN , Enables all the four PWM channels" "Disabled,Enabled" width 0x0B tree.end tree "ADC (A/D converter)" base ad:0xE0080000 width 12. group.long 0x00++0x0B line.long 0x00 "ADC_STATUS, ADC Status Register" bitfld.long 0x00 16. " HIGHRESOLUTION , Sample resolution" "Disabled,Enabled" bitfld.long 0x00 13.--15. " DMALASTCH , Burst request to DMA" "Not requested,Requested,?..." textline " " bitfld.long 0x00 12. " DMAEN , DMA request enable" "Disabled,Enabled" bitfld.long 0x00 11. " EXTSCANRATE , Scan Rate type in Enhanced Mode" "Internal,External" textline " " bitfld.long 0x00 10. " ENM , Enhanced Mode" "Disabled,Enabled" bitfld.long 0x00 9. " VREFSEL , Reference voltages" "External,Internal" textline " " bitfld.long 0x00 8. " CONVREADY , ADC Conversion" "Ongoing,Ready" bitfld.long 0x00 5.--7. " NSAMPLES , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x00 4. " POWERUP , ADC powerup" "Disabled,Enabled" bitfld.long 0x00 1.--3. " CHSEL , Channel select field" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7" textline " " bitfld.long 0x00 0. " ENABLE , ADC Enable" "Disabled,Enabled" line.long 0x04 "AVERAGE, Average Register" hexmask.long.tbyte 0x04 0.--16. 1. " AVG , Average value of all the conversions" line.long 0x08 "SCAN_RATE, Scan Rate Register" group.long 0x10++0x1F line.long 0x0 "CH0_CTRL, Channel 0 Control" bitfld.long 0x0 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x0 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x0 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x4 "CH1_CTRL, Channel 1 Control" bitfld.long 0x4 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x4 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x4 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x8 "CH2_CTRL, Channel 2 Control" bitfld.long 0x8 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x8 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x8 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0xC "CH3_CTRL, Channel 3 Control" bitfld.long 0xC 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0xC 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0xC 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x10 "CH4_CTRL, Channel 4 Control" bitfld.long 0x10 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x10 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x10 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x14 "CH5_CTRL, Channel 5 Control" bitfld.long 0x14 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x14 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x14 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x18 "CH6_CTRL, Channel 6 Control" bitfld.long 0x18 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x18 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x18 0. " ENABLE , Activation of channel during scan" "Off,On" line.long 0x1C "CH7_CTRL, Channel 7 Control" bitfld.long 0x1C 4. " TOUCHSCREEN , Selection of channel for touch screen" "Not selected,Selected" bitfld.long 0x1C 1.--3. " AVERAGE , Number of samples to collect for average" "1 conversion,2 samples,4 samples,8 samples,16 samples,32 samples,64 samples,128 samples" textline " " bitfld.long 0x1C 0. " ENABLE , Activation of channel during scan" "Off,On" rgroup.long 0x30++0x1F line.long 0x0 "CH0_DATA, Channel 0 Data" bitfld.long 0x0 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x0 0.--16. 1. " DATA , Result of last conversion on Channel 0" line.long 0x4 "CH1_DATA, Channel 1 Data" bitfld.long 0x4 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x4 0.--16. 1. " DATA , Result of last conversion on Channel 1" line.long 0x8 "CH2_DATA, Channel 2 Data" bitfld.long 0x8 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x8 0.--16. 1. " DATA , Result of last conversion on Channel 2" line.long 0xC "CH3_DATA, Channel 3 Data" bitfld.long 0xC 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0xC 0.--16. 1. " DATA , Result of last conversion on Channel 3" line.long 0x10 "CH4_DATA, Channel 4 Data" bitfld.long 0x10 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x10 0.--16. 1. " DATA , Result of last conversion on Channel 4" line.long 0x14 "CH5_DATA, Channel 5 Data" bitfld.long 0x14 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x14 0.--16. 1. " DATA , Result of last conversion on Channel 5" line.long 0x18 "CH6_DATA, Channel 6 Data" bitfld.long 0x18 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x18 0.--16. 1. " DATA , Result of last conversion on Channel 6" line.long 0x1C "CH7_DATA, Channel 7 Data" bitfld.long 0x1C 17. " VALID , Valid" "Not valid,Valid" hexmask.long.tbyte 0x1C 0.--16. 1. " DATA , Result of last conversion on Channel 7" width 0x0B tree.end tree.open "CEC (HDMI CEC interfaces)" tree "CEC0" base ad:0xD0600000 width 11. group.long 0x00++0x13 line.long 0x00 "CEC_PRE_L, Prescaler value low" hexmask.long.byte 0x00 0.--7. 1. " PRE_LO , Prescaler value low" line.long 0x04 "CEC_PRE_H, Prescaler value high" hexmask.long.byte 0x04 0.--7. 1. " PRE_HI , Prescaler value high" line.long 0x08 "CEC_ESR, Error status register" bitfld.long 0x08 6. " TBTF_ERR , TBTF error" "No error,Error" bitfld.long 0x08 5. " LINE_ERR , Line error" "No error,Error" textline " " bitfld.long 0x08 4. " BLK_ACK_ERR , Block acknowledge error" "No error,Error" bitfld.long 0x08 3. " START_ERR , Start bit error" "No error,Error" textline " " bitfld.long 0x08 2. " RBTF_ERR , RBTF error" "No error,Error" bitfld.long 0x08 1. " BIT_PER_ERR , Bit period error" "No error,Error" textline " " bitfld.long 0x08 0. " BIT_TMG_ERR , Bit timing error" "No error,Error" line.long 0x0C "CEC_CT, CEC control register" bitfld.long 0x0C 7. " RBTF , RX block transfer finished" "Not finished,Finished" bitfld.long 0x0C 6. " RX_ERR , RX error" "No error,Error" textline " " bitfld.long 0x0C 5. " REOM , End of RX message" "Not ended,Ended" bitfld.long 0x0C 4. " RSOM , Start of RX message" "Not started,Started" textline " " bitfld.long 0x0C 3. " TBTF , TX block transfer finished" "Not finished,Finished" bitfld.long 0x0C 2. " TX_ERR , TX error" "No error,Error" textline " " bitfld.long 0x0C 1. " TEOM , End of TX message" "Not ended,Ended" bitfld.long 0x0C 0. " TSOM , Start of TX message" "Not started,Started" line.long 0x10 "CEC_TXD, Transfer data buffer" hexmask.long.byte 0x10 0.--7. 1. " TXD , TX data buffer" hgroup.long 0x14++0x03 hide.long 0x14 "CEC_RXD, Received data buffer" in group.long 0x18++0x07 line.long 0x00 "CEC_CFG, CEC configuration" bitfld.long 0x00 6. " WAKEUP_ENABLE , Indicate CEC WakeUp from Standby" "Standby,Wake-up" bitfld.long 0x00 5. " NAIV , Arbitration phase take" "Taken,Not taken" textline " " bitfld.long 0x00 4. " ERR_RESYNC_MODE , Error resync mode" "Disabled,Enabled" bitfld.long 0x00 3. " BIT_PER_ERR_MODE , Bit period error mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " BIT_TMG_ERR_MODE , Bit timing error mode" "Disabled,Enabled" bitfld.long 0x00 1. " INT_EN , Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_EN , Peripheral enable" "Disabled,Enabled" line.long 0x04 "CEC_OAR, CEC own address register" bitfld.long 0x04 0.--3. " OA , Own address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree "CEC1" base ad:0xD0700000 width 11. group.long 0x00++0x13 line.long 0x00 "CEC_PRE_L, Prescaler value low" hexmask.long.byte 0x00 0.--7. 1. " PRE_LO , Prescaler value low" line.long 0x04 "CEC_PRE_H, Prescaler value high" hexmask.long.byte 0x04 0.--7. 1. " PRE_HI , Prescaler value high" line.long 0x08 "CEC_ESR, Error status register" bitfld.long 0x08 6. " TBTF_ERR , TBTF error" "No error,Error" bitfld.long 0x08 5. " LINE_ERR , Line error" "No error,Error" textline " " bitfld.long 0x08 4. " BLK_ACK_ERR , Block acknowledge error" "No error,Error" bitfld.long 0x08 3. " START_ERR , Start bit error" "No error,Error" textline " " bitfld.long 0x08 2. " RBTF_ERR , RBTF error" "No error,Error" bitfld.long 0x08 1. " BIT_PER_ERR , Bit period error" "No error,Error" textline " " bitfld.long 0x08 0. " BIT_TMG_ERR , Bit timing error" "No error,Error" line.long 0x0C "CEC_CT, CEC control register" bitfld.long 0x0C 7. " RBTF , RX block transfer finished" "Not finished,Finished" bitfld.long 0x0C 6. " RX_ERR , RX error" "No error,Error" textline " " bitfld.long 0x0C 5. " REOM , End of RX message" "Not ended,Ended" bitfld.long 0x0C 4. " RSOM , Start of RX message" "Not started,Started" textline " " bitfld.long 0x0C 3. " TBTF , TX block transfer finished" "Not finished,Finished" bitfld.long 0x0C 2. " TX_ERR , TX error" "No error,Error" textline " " bitfld.long 0x0C 1. " TEOM , End of TX message" "Not ended,Ended" bitfld.long 0x0C 0. " TSOM , Start of TX message" "Not started,Started" line.long 0x10 "CEC_TXD, Transfer data buffer" hexmask.long.byte 0x10 0.--7. 1. " TXD , TX data buffer" hgroup.long 0x14++0x03 hide.long 0x14 "CEC_RXD, Received data buffer" in group.long 0x18++0x07 line.long 0x00 "CEC_CFG, CEC configuration" bitfld.long 0x00 6. " WAKEUP_ENABLE , Indicate CEC WakeUp from Standby" "Standby,Wake-up" bitfld.long 0x00 5. " NAIV , Arbitration phase take" "Taken,Not taken" textline " " bitfld.long 0x00 4. " ERR_RESYNC_MODE , Error resync mode" "Disabled,Enabled" bitfld.long 0x00 3. " BIT_PER_ERR_MODE , Bit period error mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " BIT_TMG_ERR_MODE , Bit timing error mode" "Disabled,Enabled" bitfld.long 0x00 1. " INT_EN , Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_EN , Peripheral enable" "Disabled,Enabled" line.long 0x04 "CEC_OAR, CEC own address register" bitfld.long 0x04 0.--3. " OA , Own address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0B tree.end tree.end tree.open "CAM (Camera input interfaces)" tree "CAM1" base ad:0xD0200000 width 16. group.long 0x00++0x17 line.long 0x00 "CAM_IF_CTRL, CAM_IF_CTRL control register" hexmask.long.byte 0x00 24.--31. 1. " A , Alpha value" bitfld.long 0x00 23. " INTL_EN , Odd/even field detection is activated" "Not activated,Activated" textline " " bitfld.long 0x00 19.--21. " DMA_BURST_SIZE , DMA burst size" "1,4,8,16,32,64,128,256" bitfld.long 0x00 18. " WAIT_STATE_EN , One wait state in reading the local memory" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CROP_SEL , Crop Select" "Not selected,Selected" bitfld.long 0x00 16. " EAV_SEL , End of active video select" "No end,End" textline " " rbitfld.long 0x00 12. " EMBT , Embedded synchro type" "Reserved,ITU656" bitfld.long 0x00 8.--11. " TRANS , Received data type" "4b(CbYCrY),4b(CrYCbY),3b(RGBa),3b(BGRa),3b(aBGR),3b(aRGB),4b(RGB),4b(BGR),4b(RGB888),4b(JPEG),RGB565->RGB888,4b(color filler mode),?..." textline " " bitfld.long 0x00 7. " VS_POL , Active state of the vertical synchro signal" "Low,High" bitfld.long 0x00 6. " HS_POL , Active state of the horizontal synchro signal" "Low,High" textline " " bitfld.long 0x00 5. " PCK_POL , Active edge of the pixel clock" "Falling edge,Rising edge" bitfld.long 0x00 4. " EMB , Data is recognized" "Signals,Embedded" textline " " bitfld.long 0x00 0.--3. " CAPT , Type of capture as per below" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Video mode,?..." line.long 0x04 "CAM_IF_EFEC, CAM_IF Even Field Embedded Codes Register" hexmask.long.byte 0x04 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x04 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x04 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x04 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" line.long 0x08 "CAM_IF_CSTARTP, CAM_IF Crop Start Point Register" hexmask.long.word 0x08 16.--31. 1. " CR_V , Pixels will be stored after the line number defined by CR_V15-0" hexmask.long.word 0x08 0.--15. 1. " CR_H , Each line will be stored after the pixel position CR_H15-0" line.long 0x0C "CAM_IF_CSTOPP, CAM_IF Crop Stop Point Register" hexmask.long.word 0x0C 16.--31. 1. " CR_V , Pixels will be not stored after the line number defined by CR_V15-0" hexmask.long.word 0x0C 0.--15. 1. " CR_H , Each line will be not stored after the pixel position CR_H15-0" line.long 0x10 "CAMIF_IR_DUR, Interrupt and DMA Unmask Register" bitfld.long 0x10 15. " MASK_BREQ , Mask the BREQ" "Not masked,Masked" bitfld.long 0x10 14. " MASK_SREQ , Mask the SREQ" "Not masked,Masked" textline " " rbitfld.long 0x10 12. " DMADUAL , Separate DMA requests generation" "Not generated,Generated" rbitfld.long 0x10 11. " DMACAML , Mask of the DMA request" "Not masked,Masked" textline " " bitfld.long 0x10 6. " ITCAMV , Mask of the vertical interrupt" "No effect,Masked" bitfld.long 0x10 5. " ITCAMF , Mask of the frame interrupt" "No effect,Masked" textline " " bitfld.long 0x10 4. " ITCAML , Mask of the line interrupt" "No effect,Masked" line.long 0x14 "CAMIF_ISR, Interrupt Status Register" rbitfld.long 0x14 23. " R_DMACAML , R_DMA means the raw DMA request" "No interrupt,Interrupt" rbitfld.long 0x14 18. " ITCAMV_RAW , Raw interrupt for vertical" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 17. " ITCAMF_RAW , Raw interrupt for frame" "No interrupt,Interrupt" rbitfld.long 0x14 16. " ITCAML_RAW , Raw interrupt for line" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 14. " EVEN_FRAME , Frame signature" "Disabled,Enabled" rbitfld.long 0x14 13. " ODD_FRAME , Frame signature" "Disabled,Enabled" textline " " rbitfld.long 0x14 12. " FRAME_TFR , Active frame" "Not active,Active" rbitfld.long 0x14 11. " DMACAML , Masked DMA request" "Not masked,Masked" textline " " bitfld.long 0x14 6. " ITCAMV , Masked interrupt for vertical" "Not masked,Masked" bitfld.long 0x14 5. " ITCAMF , Masked interrupt for frame" "Not masked,Masked" textline " " bitfld.long 0x14 4. " ITCAML , Masked interrupt for line" "Not masked,Masked" rgroup.long 0x18++0x03 line.long 0x00 "CAMIF_DMA_PTR, DMA Pointer Register" hexmask.long.byte 0x00 0.--10. 1. " DMA_PTR , DMA Pointer Register" group.long 0x1C++0x03 line.long 0x00 "CAM_IF_OFEC, CAM_IF Odd Field Embedded Codes Register" hexmask.long.byte 0x00 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x00 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x00 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x00 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" width 0x0B tree.end tree "CAM2" base ad:0xD0300000 width 16. group.long 0x00++0x17 line.long 0x00 "CAM_IF_CTRL, CAM_IF_CTRL control register" hexmask.long.byte 0x00 24.--31. 1. " A , Alpha value" bitfld.long 0x00 23. " INTL_EN , Odd/even field detection is activated" "Not activated,Activated" textline " " bitfld.long 0x00 19.--21. " DMA_BURST_SIZE , DMA burst size" "1,4,8,16,32,64,128,256" bitfld.long 0x00 18. " WAIT_STATE_EN , One wait state in reading the local memory" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CROP_SEL , Crop Select" "Not selected,Selected" bitfld.long 0x00 16. " EAV_SEL , End of active video select" "No end,End" textline " " rbitfld.long 0x00 12. " EMBT , Embedded synchro type" "Reserved,ITU656" bitfld.long 0x00 8.--11. " TRANS , Received data type" "4b(CbYCrY),4b(CrYCbY),3b(RGBa),3b(BGRa),3b(aBGR),3b(aRGB),4b(RGB),4b(BGR),4b(RGB888),4b(JPEG),RGB565->RGB888,4b(color filler mode),?..." textline " " bitfld.long 0x00 7. " VS_POL , Active state of the vertical synchro signal" "Low,High" bitfld.long 0x00 6. " HS_POL , Active state of the horizontal synchro signal" "Low,High" textline " " bitfld.long 0x00 5. " PCK_POL , Active edge of the pixel clock" "Falling edge,Rising edge" bitfld.long 0x00 4. " EMB , Data is recognized" "Signals,Embedded" textline " " bitfld.long 0x00 0.--3. " CAPT , Type of capture as per below" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Video mode,?..." line.long 0x04 "CAM_IF_EFEC, CAM_IF Even Field Embedded Codes Register" hexmask.long.byte 0x04 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x04 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x04 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x04 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" line.long 0x08 "CAM_IF_CSTARTP, CAM_IF Crop Start Point Register" hexmask.long.word 0x08 16.--31. 1. " CR_V , Pixels will be stored after the line number defined by CR_V15-0" hexmask.long.word 0x08 0.--15. 1. " CR_H , Each line will be stored after the pixel position CR_H15-0" line.long 0x0C "CAM_IF_CSTOPP, CAM_IF Crop Stop Point Register" hexmask.long.word 0x0C 16.--31. 1. " CR_V , Pixels will be not stored after the line number defined by CR_V15-0" hexmask.long.word 0x0C 0.--15. 1. " CR_H , Each line will be not stored after the pixel position CR_H15-0" line.long 0x10 "CAMIF_IR_DUR, Interrupt and DMA Unmask Register" bitfld.long 0x10 15. " MASK_BREQ , Mask the BREQ" "Not masked,Masked" bitfld.long 0x10 14. " MASK_SREQ , Mask the SREQ" "Not masked,Masked" textline " " rbitfld.long 0x10 12. " DMADUAL , Separate DMA requests generation" "Not generated,Generated" rbitfld.long 0x10 11. " DMACAML , Mask of the DMA request" "Not masked,Masked" textline " " bitfld.long 0x10 6. " ITCAMV , Mask of the vertical interrupt" "No effect,Masked" bitfld.long 0x10 5. " ITCAMF , Mask of the frame interrupt" "No effect,Masked" textline " " bitfld.long 0x10 4. " ITCAML , Mask of the line interrupt" "No effect,Masked" line.long 0x14 "CAMIF_ISR, Interrupt Status Register" rbitfld.long 0x14 23. " R_DMACAML , R_DMA means the raw DMA request" "No interrupt,Interrupt" rbitfld.long 0x14 18. " ITCAMV_RAW , Raw interrupt for vertical" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 17. " ITCAMF_RAW , Raw interrupt for frame" "No interrupt,Interrupt" rbitfld.long 0x14 16. " ITCAML_RAW , Raw interrupt for line" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 14. " EVEN_FRAME , Frame signature" "Disabled,Enabled" rbitfld.long 0x14 13. " ODD_FRAME , Frame signature" "Disabled,Enabled" textline " " rbitfld.long 0x14 12. " FRAME_TFR , Active frame" "Not active,Active" rbitfld.long 0x14 11. " DMACAML , Masked DMA request" "Not masked,Masked" textline " " bitfld.long 0x14 6. " ITCAMV , Masked interrupt for vertical" "Not masked,Masked" bitfld.long 0x14 5. " ITCAMF , Masked interrupt for frame" "Not masked,Masked" textline " " bitfld.long 0x14 4. " ITCAML , Masked interrupt for line" "Not masked,Masked" rgroup.long 0x18++0x03 line.long 0x00 "CAMIF_DMA_PTR, DMA Pointer Register" hexmask.long.byte 0x00 0.--10. 1. " DMA_PTR , DMA Pointer Register" group.long 0x1C++0x03 line.long 0x00 "CAM_IF_OFEC, CAM_IF Odd Field Embedded Codes Register" hexmask.long.byte 0x00 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x00 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x00 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x00 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" width 0x0B tree.end tree "CAM3" base ad:0xD0400000 width 16. group.long 0x00++0x17 line.long 0x00 "CAM_IF_CTRL, CAM_IF_CTRL control register" hexmask.long.byte 0x00 24.--31. 1. " A , Alpha value" bitfld.long 0x00 23. " INTL_EN , Odd/even field detection is activated" "Not activated,Activated" textline " " bitfld.long 0x00 19.--21. " DMA_BURST_SIZE , DMA burst size" "1,4,8,16,32,64,128,256" bitfld.long 0x00 18. " WAIT_STATE_EN , One wait state in reading the local memory" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CROP_SEL , Crop Select" "Not selected,Selected" bitfld.long 0x00 16. " EAV_SEL , End of active video select" "No end,End" textline " " rbitfld.long 0x00 12. " EMBT , Embedded synchro type" "Reserved,ITU656" bitfld.long 0x00 8.--11. " TRANS , Received data type" "4b(CbYCrY),4b(CrYCbY),3b(RGBa),3b(BGRa),3b(aBGR),3b(aRGB),4b(RGB),4b(BGR),4b(RGB888),4b(JPEG),RGB565->RGB888,4b(color filler mode),?..." textline " " bitfld.long 0x00 7. " VS_POL , Active state of the vertical synchro signal" "Low,High" bitfld.long 0x00 6. " HS_POL , Active state of the horizontal synchro signal" "Low,High" textline " " bitfld.long 0x00 5. " PCK_POL , Active edge of the pixel clock" "Falling edge,Rising edge" bitfld.long 0x00 4. " EMB , Data is recognized" "Signals,Embedded" textline " " bitfld.long 0x00 0.--3. " CAPT , Type of capture as per below" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Video mode,?..." line.long 0x04 "CAM_IF_EFEC, CAM_IF Even Field Embedded Codes Register" hexmask.long.byte 0x04 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x04 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x04 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x04 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" line.long 0x08 "CAM_IF_CSTARTP, CAM_IF Crop Start Point Register" hexmask.long.word 0x08 16.--31. 1. " CR_V , Pixels will be stored after the line number defined by CR_V15-0" hexmask.long.word 0x08 0.--15. 1. " CR_H , Each line will be stored after the pixel position CR_H15-0" line.long 0x0C "CAM_IF_CSTOPP, CAM_IF Crop Stop Point Register" hexmask.long.word 0x0C 16.--31. 1. " CR_V , Pixels will be not stored after the line number defined by CR_V15-0" hexmask.long.word 0x0C 0.--15. 1. " CR_H , Each line will be not stored after the pixel position CR_H15-0" line.long 0x10 "CAMIF_IR_DUR, Interrupt and DMA Unmask Register" bitfld.long 0x10 15. " MASK_BREQ , Mask the BREQ" "Not masked,Masked" bitfld.long 0x10 14. " MASK_SREQ , Mask the SREQ" "Not masked,Masked" textline " " rbitfld.long 0x10 12. " DMADUAL , Separate DMA requests generation" "Not generated,Generated" rbitfld.long 0x10 11. " DMACAML , Mask of the DMA request" "Not masked,Masked" textline " " bitfld.long 0x10 6. " ITCAMV , Mask of the vertical interrupt" "No effect,Masked" bitfld.long 0x10 5. " ITCAMF , Mask of the frame interrupt" "No effect,Masked" textline " " bitfld.long 0x10 4. " ITCAML , Mask of the line interrupt" "No effect,Masked" line.long 0x14 "CAMIF_ISR, Interrupt Status Register" rbitfld.long 0x14 23. " R_DMACAML , R_DMA means the raw DMA request" "No interrupt,Interrupt" rbitfld.long 0x14 18. " ITCAMV_RAW , Raw interrupt for vertical" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 17. " ITCAMF_RAW , Raw interrupt for frame" "No interrupt,Interrupt" rbitfld.long 0x14 16. " ITCAML_RAW , Raw interrupt for line" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 14. " EVEN_FRAME , Frame signature" "Disabled,Enabled" rbitfld.long 0x14 13. " ODD_FRAME , Frame signature" "Disabled,Enabled" textline " " rbitfld.long 0x14 12. " FRAME_TFR , Active frame" "Not active,Active" rbitfld.long 0x14 11. " DMACAML , Masked DMA request" "Not masked,Masked" textline " " bitfld.long 0x14 6. " ITCAMV , Masked interrupt for vertical" "Not masked,Masked" bitfld.long 0x14 5. " ITCAMF , Masked interrupt for frame" "Not masked,Masked" textline " " bitfld.long 0x14 4. " ITCAML , Masked interrupt for line" "Not masked,Masked" rgroup.long 0x18++0x03 line.long 0x00 "CAMIF_DMA_PTR, DMA Pointer Register" hexmask.long.byte 0x00 0.--10. 1. " DMA_PTR , DMA Pointer Register" group.long 0x1C++0x03 line.long 0x00 "CAM_IF_OFEC, CAM_IF Odd Field Embedded Codes Register" hexmask.long.byte 0x00 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x00 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x00 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x00 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" width 0x0B tree.end tree "CAM4" base ad:0xD0500000 width 16. group.long 0x00++0x17 line.long 0x00 "CAM_IF_CTRL, CAM_IF_CTRL control register" hexmask.long.byte 0x00 24.--31. 1. " A , Alpha value" bitfld.long 0x00 23. " INTL_EN , Odd/even field detection is activated" "Not activated,Activated" textline " " bitfld.long 0x00 19.--21. " DMA_BURST_SIZE , DMA burst size" "1,4,8,16,32,64,128,256" bitfld.long 0x00 18. " WAIT_STATE_EN , One wait state in reading the local memory" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CROP_SEL , Crop Select" "Not selected,Selected" bitfld.long 0x00 16. " EAV_SEL , End of active video select" "No end,End" textline " " rbitfld.long 0x00 12. " EMBT , Embedded synchro type" "Reserved,ITU656" bitfld.long 0x00 8.--11. " TRANS , Received data type" "4b(CbYCrY),4b(CrYCbY),3b(RGBa),3b(BGRa),3b(aBGR),3b(aRGB),4b(RGB),4b(BGR),4b(RGB888),4b(JPEG),RGB565->RGB888,4b(color filler mode),?..." textline " " bitfld.long 0x00 7. " VS_POL , Active state of the vertical synchro signal" "Low,High" bitfld.long 0x00 6. " HS_POL , Active state of the horizontal synchro signal" "Low,High" textline " " bitfld.long 0x00 5. " PCK_POL , Active edge of the pixel clock" "Falling edge,Rising edge" bitfld.long 0x00 4. " EMB , Data is recognized" "Signals,Embedded" textline " " bitfld.long 0x00 0.--3. " CAPT , Type of capture as per below" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Video mode,?..." line.long 0x04 "CAM_IF_EFEC, CAM_IF Even Field Embedded Codes Register" hexmask.long.byte 0x04 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x04 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x04 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x04 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" line.long 0x08 "CAM_IF_CSTARTP, CAM_IF Crop Start Point Register" hexmask.long.word 0x08 16.--31. 1. " CR_V , Pixels will be stored after the line number defined by CR_V15-0" hexmask.long.word 0x08 0.--15. 1. " CR_H , Each line will be stored after the pixel position CR_H15-0" line.long 0x0C "CAM_IF_CSTOPP, CAM_IF Crop Stop Point Register" hexmask.long.word 0x0C 16.--31. 1. " CR_V , Pixels will be not stored after the line number defined by CR_V15-0" hexmask.long.word 0x0C 0.--15. 1. " CR_H , Each line will be not stored after the pixel position CR_H15-0" line.long 0x10 "CAMIF_IR_DUR, Interrupt and DMA Unmask Register" bitfld.long 0x10 15. " MASK_BREQ , Mask the BREQ" "Not masked,Masked" bitfld.long 0x10 14. " MASK_SREQ , Mask the SREQ" "Not masked,Masked" textline " " rbitfld.long 0x10 12. " DMADUAL , Separate DMA requests generation" "Not generated,Generated" rbitfld.long 0x10 11. " DMACAML , Mask of the DMA request" "Not masked,Masked" textline " " bitfld.long 0x10 6. " ITCAMV , Mask of the vertical interrupt" "No effect,Masked" bitfld.long 0x10 5. " ITCAMF , Mask of the frame interrupt" "No effect,Masked" textline " " bitfld.long 0x10 4. " ITCAML , Mask of the line interrupt" "No effect,Masked" line.long 0x14 "CAMIF_ISR, Interrupt Status Register" rbitfld.long 0x14 23. " R_DMACAML , R_DMA means the raw DMA request" "No interrupt,Interrupt" rbitfld.long 0x14 18. " ITCAMV_RAW , Raw interrupt for vertical" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 17. " ITCAMF_RAW , Raw interrupt for frame" "No interrupt,Interrupt" rbitfld.long 0x14 16. " ITCAML_RAW , Raw interrupt for line" "No interrupt,Interrupt" textline " " rbitfld.long 0x14 14. " EVEN_FRAME , Frame signature" "Disabled,Enabled" rbitfld.long 0x14 13. " ODD_FRAME , Frame signature" "Disabled,Enabled" textline " " rbitfld.long 0x14 12. " FRAME_TFR , Active frame" "Not active,Active" rbitfld.long 0x14 11. " DMACAML , Masked DMA request" "Not masked,Masked" textline " " bitfld.long 0x14 6. " ITCAMV , Masked interrupt for vertical" "Not masked,Masked" bitfld.long 0x14 5. " ITCAMF , Masked interrupt for frame" "Not masked,Masked" textline " " bitfld.long 0x14 4. " ITCAML , Masked interrupt for line" "Not masked,Masked" rgroup.long 0x18++0x03 line.long 0x00 "CAMIF_DMA_PTR, DMA Pointer Register" hexmask.long.byte 0x00 0.--10. 1. " DMA_PTR , DMA Pointer Register" group.long 0x1C++0x03 line.long 0x00 "CAM_IF_OFEC, CAM_IF Odd Field Embedded Codes Register" hexmask.long.byte 0x00 24.--31. 1. " FS_BS , Frame start: FS if CSI coding, SAV blanking (BS) if ITU656 coding" hexmask.long.byte 0x00 16.--23. 1. " FE_BE , Frame end: FE if CSI coding, EAV blanking (BE) if ITU656 coding" textline " " hexmask.long.byte 0x00 8.--15. 1. " LS_SV , Line start: LS if CSI coding, SAV (SV) if ITU656 coding" hexmask.long.byte 0x00 0.--7. 1. " LE_EV , Line end: LE if CSI coding, EAV (EV) if ITU656 coding" width 0x0B tree.end tree.end tree "VIP (Video input parallel port)" base ad:0xD0800000 width 8. group.long 0x00++0x0F line.long 0x00 "CONTROL, Control Register" bitfld.long 0x00 5. " VSYNC_POL , Vertical SYNC Polarity" "Active low,Active high" bitfld.long 0x00 4. " HSYNC_POL , Horizontal SYNC Polarity" "Active low,Active high" textline " " bitfld.long 0x00 2.--3. " RGB_WIDTH , RGB Width" "16bits,24bits,32bits,?..." bitfld.long 0x00 1. " VDO_MODE , Video mode" "Single port,Dual port" textline " " bitfld.long 0x00 0. " PIX_CLK_POL , Pixel clock Polarity" "Rising edge,Falling edge" line.long 0x04 "IR, IRQ Register" bitfld.long 0x04 0. " INTR , Interrupt request" "Not requested,Requested" line.long 0x08 "IR_MASK, Interrupt Mask Register" bitfld.long 0x08 0. " INTR , FIFO overflow interrupt mask" "Not masked,Masked" line.long 0x0C "VDO_BASE, VIDEO Base Address Register" width 0x0B tree.end tree "I2S (Digital audio interfaces)" base ad:0xB2000000 width 8. tree "Master Interface Registers" group.long 0x00++0x03 line.long 0x00 "IER, I2S Enable Register" bitfld.long 0x00 0. " IEN , I2S enable" "Disabled,Enabled" group.long 0x08++0x03 line.long 0x00 "ITER, I2S Transmitter Block Enable Register" bitfld.long 0x00 0. " TXEN , Transmitter block enable" "Disabled,Enabled" group.long 0x0C++0x07 line.long 0x00 "CER, Clock Enable Register" bitfld.long 0x00 0. " CLKEN , Clock generation enable/disable" "Disabled,Enabled" line.long 0x04 "CCR, Clock Configuration Register" bitfld.long 0x04 3.--4. " WSS , Program the number of sclk cycles" "16,24,32,?..." bitfld.long 0x04 0.--2. " SCLKG , Program the gating of sclk" "No clock gating,After 12,After 16,After 20,After 24,?..." group.long 0x18++0x03 line.long 0x00 "TXFFR, Transmitter Block FIFO Reset Register" eventfld.long 0x00 0. " TXFFR , Transmitter FIFO Reset" "No reset,Reset" group.long 0x2C++0x03 line.long 0x00 "TER0, Transmit Enable Register 0" bitfld.long 0x00 0. " TXCHEN0 , Transmit channel enable" "Disabled,Enabled" group.long (0x2C+0x08)++0x0B line.long 0x00 "TCR0, Transmit Configuration Register 0" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the transmitter" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "ISR0, Interrupt Status Register 0" bitfld.long 0x04 5. " TXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x04 4. " TXFE , Status of Transmit Empty Trigger interrupt" "Not reached,Reached" line.long 0x08 "IMR0, Interrupt Mask Register 0" bitfld.long 0x08 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 0. " RXFEM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0x2C+0x18)++0x03 hide.long 0x00 "TOR0, Transmit Overrun Register $@" in group.long (0x2C+0x20)++0x03 line.long 0x00 "TFCR0, Transmit FIFO Configuration Register 0" bitfld.long 0x00 0.--3. " TXCHET , Transmit Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x2C+0x28)++0x03 line.long 0x00 "TFF0, Transmit FIFO Flush Register 0" eventfld.long 0x00 0. " TXCHFR , Transmit Channel FIFO Reset" "No reset,Reset" group.long 0x6C++0x03 line.long 0x00 "TER1, Transmit Enable Register 1" bitfld.long 0x00 0. " TXCHEN0 , Transmit channel enable" "Disabled,Enabled" group.long (0x6C+0x08)++0x0B line.long 0x00 "TCR1, Transmit Configuration Register 1" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the transmitter" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "ISR1, Interrupt Status Register 1" bitfld.long 0x04 5. " TXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x04 4. " TXFE , Status of Transmit Empty Trigger interrupt" "Not reached,Reached" line.long 0x08 "IMR1, Interrupt Mask Register 1" bitfld.long 0x08 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 0. " RXFEM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0x6C+0x18)++0x03 hide.long 0x00 "TOR1, Transmit Overrun Register $@" in group.long (0x6C+0x20)++0x03 line.long 0x00 "TFCR1, Transmit FIFO Configuration Register 1" bitfld.long 0x00 0.--3. " TXCHET , Transmit Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x6C+0x28)++0x03 line.long 0x00 "TFF1, Transmit FIFO Flush Register 1" eventfld.long 0x00 0. " TXCHFR , Transmit Channel FIFO Reset" "No reset,Reset" group.long 0xAC++0x03 line.long 0x00 "TER2, Transmit Enable Register 2" bitfld.long 0x00 0. " TXCHEN0 , Transmit channel enable" "Disabled,Enabled" group.long (0xAC+0x08)++0x0B line.long 0x00 "TCR2, Transmit Configuration Register 2" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the transmitter" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "ISR2, Interrupt Status Register 2" bitfld.long 0x04 5. " TXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x04 4. " TXFE , Status of Transmit Empty Trigger interrupt" "Not reached,Reached" line.long 0x08 "IMR2, Interrupt Mask Register 2" bitfld.long 0x08 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 0. " RXFEM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0xAC+0x18)++0x03 hide.long 0x00 "TOR2, Transmit Overrun Register $@" in group.long (0xAC+0x20)++0x03 line.long 0x00 "TFCR2, Transmit FIFO Configuration Register 2" bitfld.long 0x00 0.--3. " TXCHET , Transmit Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0xAC+0x28)++0x03 line.long 0x00 "TFF2, Transmit FIFO Flush Register 2" eventfld.long 0x00 0. " TXCHFR , Transmit Channel FIFO Reset" "No reset,Reset" group.long 0xEC++0x03 line.long 0x00 "TER3, Transmit Enable Register 3" bitfld.long 0x00 0. " TXCHEN0 , Transmit channel enable" "Disabled,Enabled" group.long (0xEC+0x08)++0x0B line.long 0x00 "TCR3, Transmit Configuration Register 3" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the transmitter" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "ISR3, Interrupt Status Register 3" bitfld.long 0x04 5. " TXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x04 4. " TXFE , Status of Transmit Empty Trigger interrupt" "Not reached,Reached" line.long 0x08 "IMR3, Interrupt Mask Register 3" bitfld.long 0x08 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x08 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x08 0. " RXFEM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0xEC+0x18)++0x03 hide.long 0x00 "TOR3, Transmit Overrun Register $@" in group.long (0xEC+0x20)++0x03 line.long 0x00 "TFCR3, Transmit FIFO Configuration Register 3" bitfld.long 0x00 0.--3. " TXCHET , Transmit Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0xEC+0x28)++0x03 line.long 0x00 "TFF3, Transmit FIFO Flush Register 3" eventfld.long 0x00 0. " TXCHFR , Transmit Channel FIFO Reset" "No reset,Reset" wgroup.long 0x1C8++0x03 line.long 0x00 "TXDMA, Transmitter Block DMA Register" group.long 0x1CC++0x03 line.long 0x00 "RTXDMA, Reset Transmitter Block DMA Register" eventfld.long 0x00 0. " RTXDMA , Reset Transmitter Block DMA Register" "No reset,Reset" width 18. group.long 0x1F0++0x07 line.long 0x00 "I2S_COMP_PARAM_2, Component Parameter Register 2" bitfld.long 0x00 10.--12. " I2S_RX_WORDSIZE_3 , Wordsize 3" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x00 7.--9. " I2S_RX_WORDSIZE_2 , Wordsize 2" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x00 3.--5. " I2S_RX_WORDSIZE_1 , Wordsize 1" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x00 0.--2. " I2S_RX_WORDSIZE_0 , Wordsize 0" "12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "I2S_COMP_PARAM_1, Component Parameter Register 1" bitfld.long 0x04 25.--27. " I2S_RX_WORDSIZE_3 , Wordsize 3" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x04 22.--24. " I2S_RX_WORDSIZE_2 , Wordsize 2" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x04 19.--21. " I2S_RX_WORDSIZE_1 , Wordsize 1" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x04 16.--18. " I2S_RX_WORDSIZE_0 , Wordsize 0" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x04 9.--10. " I2S_TX_CHANNELS , Number of TX channels" "1,2,3,4" bitfld.long 0x04 7.--8. " I2S_RX_CHANNELS , Number of RX channels" "1,2,3,4" textline " " bitfld.long 0x04 6. " I2S_RECEIVER_BLOCK , Receiver Block" "FALSE,TRUE" bitfld.long 0x04 5. " I2S_TRANSMITTER_BLOCK , Transmitter Block" "FALSE,TRUE" textline " " bitfld.long 0x04 4. " I2S_MODE_EN , Mode" "FALSE,TRUE" bitfld.long 0x04 2.--3. " I2S_FIFO_DEPTH_GLOBAL , FIFO depth" "2 words,4 words,8 words,16 words" textline " " bitfld.long 0x04 0.--1. " APB_DATA_WIDTH , Data width" "8bit,16bit,32bit,?..." rgroup.long 0x1F8++0x07 line.long 0x00 "I2S_COMP_VERSION, I2S Component Version Register" line.long 0x04 "I2S_COMP_TYPE, I2S Component Type Register" tree.end width 8. base ad:0xB2400000 tree "Slave Interface Registers" group.long 0x00++0x03 line.long 0x00 "IER, I2S Enable Register" bitfld.long 0x00 0. " IEN , I2S enable" "Disabled,Enabled" group.long 0x04++0x03 line.long 0x00 "IRER, I2S Receiver Block Enable Register" bitfld.long 0x00 0. " RXEN , Receiver block enable" "Disabled,Enabled" group.long 0x14++0x03 line.long 0x00 "RXFFR, Receiver Block FIFO Reset Register" eventfld.long 0x00 0. " RXFFR , Receiver FIFO Reset" "No reset,Reset" hgroup.long 0x20++0x07 hide.long 0x00 "LRBR0, Left Receive Buffer Register 0" in hide.long 0x04 "RRBR0, Right Receive Buffer Register 0" in group.long (0x20+0x08)++0x03 line.long 0x00 "RER0, Receive Enable Register 0" bitfld.long 0x00 0. " RXCHEN0 , Receive channel enable" "Disabled,Enabled" group.long (0x20+0x10)++0x0F line.long 0x00 "RCR0, Receive Configuration Register 0" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the receiver" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x08 "ISR0, Interrupt Status Register 0" bitfld.long 0x08 1. " RXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x08 0. " RXDA , Status of Receive Data Available interrupt" "Not reached,Reached" line.long 0x0C "IMR0, Interrupt Mask Register 0" bitfld.long 0x0C 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 0. " RXDAM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0x20+0x20)++0x03 hide.long 0x00 "ROR0, Transmit Overrun Register $@" in group.long (0x20+0x28)++0x03 line.long 0x00 "RFCR0, Receive FIFO Configuration Register 0" bitfld.long 0x00 0.--3. " RXCHDT , Receive Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x20+0x30)++0x03 line.long 0x00 "RFF0, Receive FIFO Flush Register 0" eventfld.long 0x00 0. " RXCHFR , Receive Channel FIFO Reset" "No reset,Reset" hgroup.long 0x60++0x07 hide.long 0x00 "LRBR0, Left Receive Buffer Register 0" in hide.long 0x04 "RRBR0, Right Receive Buffer Register 0" in group.long (0x60+0x08)++0x03 line.long 0x00 "RER1, Receive Enable Register 1" bitfld.long 0x00 0. " RXCHEN0 , Receive channel enable" "Disabled,Enabled" group.long (0x60+0x10)++0x0F line.long 0x00 "RCR1, Receive Configuration Register 1" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the receiver" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x08 "ISR1, Interrupt Status Register 1" bitfld.long 0x08 1. " RXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x08 0. " RXDA , Status of Receive Data Available interrupt" "Not reached,Reached" line.long 0x0C "IMR1, Interrupt Mask Register 1" bitfld.long 0x0C 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 0. " RXDAM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0x60+0x20)++0x03 hide.long 0x00 "ROR1, Transmit Overrun Register $@" in group.long (0x60+0x28)++0x03 line.long 0x00 "RFCR1, Receive FIFO Configuration Register 1" bitfld.long 0x00 0.--3. " RXCHDT , Receive Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0x60+0x30)++0x03 line.long 0x00 "RFF1, Receive FIFO Flush Register 1" eventfld.long 0x00 0. " RXCHFR , Receive Channel FIFO Reset" "No reset,Reset" hgroup.long 0xA0++0x07 hide.long 0x00 "LRBR0, Left Receive Buffer Register 0" in hide.long 0x04 "RRBR0, Right Receive Buffer Register 0" in group.long (0xA0+0x08)++0x03 line.long 0x00 "RER2, Receive Enable Register 2" bitfld.long 0x00 0. " RXCHEN0 , Receive channel enable" "Disabled,Enabled" group.long (0xA0+0x10)++0x0F line.long 0x00 "RCR2, Receive Configuration Register 2" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the receiver" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x08 "ISR2, Interrupt Status Register 2" bitfld.long 0x08 1. " RXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x08 0. " RXDA , Status of Receive Data Available interrupt" "Not reached,Reached" line.long 0x0C "IMR2, Interrupt Mask Register 2" bitfld.long 0x0C 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 0. " RXDAM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0xA0+0x20)++0x03 hide.long 0x00 "ROR2, Transmit Overrun Register $@" in group.long (0xA0+0x28)++0x03 line.long 0x00 "RFCR2, Receive FIFO Configuration Register 2" bitfld.long 0x00 0.--3. " RXCHDT , Receive Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0xA0+0x30)++0x03 line.long 0x00 "RFF2, Receive FIFO Flush Register 2" eventfld.long 0x00 0. " RXCHFR , Receive Channel FIFO Reset" "No reset,Reset" hgroup.long 0xE0++0x07 hide.long 0x00 "LRBR0, Left Receive Buffer Register 0" in hide.long 0x04 "RRBR0, Right Receive Buffer Register 0" in group.long (0xE0+0x08)++0x03 line.long 0x00 "RER3, Receive Enable Register 3" bitfld.long 0x00 0. " RXCHEN0 , Receive channel enable" "Disabled,Enabled" group.long (0xE0+0x10)++0x0F line.long 0x00 "RCR3, Receive Configuration Register 3" bitfld.long 0x00 0.--2. " WLEN , Data resolution of the receiver" "Ignore,12bit,16bit,20bit,24bit,32bit,?..." line.long 0x08 "ISR3, Interrupt Status Register 3" bitfld.long 0x08 1. " RXFO , Status of Data Overrun interrupt for the TX channel" "Valid,Overrun" bitfld.long 0x08 0. " RXDA , Status of Receive Data Available interrupt" "Not reached,Reached" line.long 0x0C "IMR3, Interrupt Mask Register 3" bitfld.long 0x0C 5. " TXFOM , Masks TX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 4. " TXFEM , Masks TX FIFO Empty interrupt" "Not masked,Masked" textline " " bitfld.long 0x0C 1. " RXFOM , Masks RX FIFO Overrun interrupt" "Not masked,Masked" bitfld.long 0x0C 0. " RXDAM , Masks RX FIFO Empty interrupt" "Not masked,Masked" hgroup.long (0xE0+0x20)++0x03 hide.long 0x00 "ROR3, Transmit Overrun Register $@" in group.long (0xE0+0x28)++0x03 line.long 0x00 "RFCR3, Receive FIFO Configuration Register 3" bitfld.long 0x00 0.--3. " RXCHDT , Receive Channel Empty Trigger" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long (0xE0+0x30)++0x03 line.long 0x00 "RFF3, Receive FIFO Flush Register 3" eventfld.long 0x00 0. " RXCHFR , Receive Channel FIFO Reset" "No reset,Reset" hgroup.long 0x1C0++0x03 hide.long 0x00 "RXDMA, Receiver Block DMA Register" in group.long 0x1C4++0x03 line.long 0x00 "RRXDMA, Reset Receiver Block DMA Register" eventfld.long 0x00 0. " RRXDMA , Reset Receiver Block DMA Register" "No reset,Reset" width 18. group.long 0x1F0++0x07 line.long 0x00 "I2S_COMP_PARAM_2, Component Parameter Register 2" bitfld.long 0x00 10.--12. " I2S_RX_WORDSIZE_3 , Wordsize 3" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x00 7.--9. " I2S_RX_WORDSIZE_2 , Wordsize 2" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x00 3.--5. " I2S_RX_WORDSIZE_1 , Wordsize 1" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x00 0.--2. " I2S_RX_WORDSIZE_0 , Wordsize 0" "12bit,16bit,20bit,24bit,32bit,?..." line.long 0x04 "I2S_COMP_PARAM_1, Component Parameter Register 1" bitfld.long 0x04 25.--27. " I2S_RX_WORDSIZE_3 , Wordsize 3" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x04 22.--24. " I2S_RX_WORDSIZE_2 , Wordsize 2" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x04 19.--21. " I2S_RX_WORDSIZE_1 , Wordsize 1" "12bit,16bit,20bit,24bit,32bit,?..." bitfld.long 0x04 16.--18. " I2S_RX_WORDSIZE_0 , Wordsize 0" "12bit,16bit,20bit,24bit,32bit,?..." textline " " bitfld.long 0x04 9.--10. " I2S_TX_CHANNELS , Number of TX channels" "1,2,3,4" bitfld.long 0x04 7.--8. " I2S_RX_CHANNELS , Number of RX channels" "1,2,3,4" textline " " bitfld.long 0x04 6. " I2S_RECEIVER_BLOCK , Receiver Block" "FALSE,TRUE" bitfld.long 0x04 5. " I2S_TRANSMITTER_BLOCK , Transmitter Block" "FALSE,TRUE" textline " " bitfld.long 0x04 4. " I2S_MODE_EN , Mode" "FALSE,TRUE" bitfld.long 0x04 2.--3. " I2S_FIFO_DEPTH_GLOBAL , FIFO depth" "2 words,4 words,8 words,16 words" textline " " bitfld.long 0x04 0.--1. " APB_DATA_WIDTH , Data width" "8bit,16bit,32bit,?..." rgroup.long 0x1F8++0x07 line.long 0x00 "I2S_COMP_VERSION, I2S Component Version Register" line.long 0x04 "I2S_COMP_TYPE, I2S Component Type Register" tree.end width 0x0B tree.end tree "SPDIF (S/PDIF digital audio ports)" base ad:0xD0100000 width 10. tree "SPDIF In Registers" group.long 0x00++0x0F line.long 0x00 "CTRL, Control Register" bitfld.long 0x00 20. " PAREN , Store parity bit enable" "Disabled,Enabled" bitfld.long 0x00 19. " STATEN , Store channel status bit enable" "Disabled,Enabled" bitfld.long 0x00 18. " USEREN , Store data user bit enable" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " VALEN , Store validity bit enable" "Disabled,Enabled" bitfld.long 0x00 16. " BLKEN , Block boundary marking enable" "Disabled,Enabled" bitfld.long 0x00 12.--15. " MODE , Store data mode" "16bit,17bit,18bit,19bit,20bit,21bit,22bit,23bit,24bit,?..." textline " " bitfld.long 0x00 11. " VALID , Subframe validity bit" "Data ignored,Data stored" bitfld.long 0x00 10. " SAMPLE , Store data in fifo" "Not stored,Stored" bitfld.long 0x00 9. " DATA_SWAP , Half words in data swap" "Not swapped,Swapped" textline " " bitfld.long 0x00 8. " ENABLE , IP enable" "Disabled,Enabled" bitfld.long 0x00 7. " DATA_REVERT , Data in fifo reverted" "Not reverted,Reverted" bitfld.long 0x00 6. " EXTRACT_16_BITS , Extract 16 bits" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " FIFO_TRESHOLD , Treshold for DMA request by SPDIF_IN" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "IRQ_MASK, Mask Register" bitfld.long 0x04 3. " OUT_OF_RANGE , Mask for Out of Range Interrupt" "Not masked,Masked" bitfld.long 0x04 2. " FIFO_FULL , Mask for Fifo Full Interrupt" "Not masked,Masked" bitfld.long 0x04 1. " READ_FIFO_EMPTY , Mask for Read during Fifo Empty Interrupt" "Not masked,Masked" textline " " bitfld.long 0x04 0. " FIFO_WRITE_ERROR , Mask for Fifo Write Error Interrupt" "Not masked,Masked" line.long 0x08 "IRQ, Interrupt Register" bitfld.long 0x08 3. " OUT_OF_RANGE , Address on AHB bus is different" "No interrupt,Interrupt" bitfld.long 0x08 2. " FIFO_FULL , Fifo full condition" "No interrupt,Interrupt" bitfld.long 0x08 1. " READ_FIFO_EMPTY , Fifo is empty" "No interrupt,Interrupt" textline " " bitfld.long 0x08 0. " FIFO_WRITE_ERROR , Write operation on fifo" "No interrupt,Interrupt" line.long 0x0C "IRQ, Status Register" bitfld.long 0x0C 0. " SPDIF_LOCK , Receiver is locked to incoming SPDIF" "Not locked,Locked" tree.end width 16. base ad:0xD0000000 tree "SPDIF Out Registers" group.long 0x00++0x43 line.long 0x00 "SOFT_RST, S/PDIF player soft reset" bitfld.long 0x00 0. " SOFT_RESET , Soft reset the S/PDIF player" "No reset,Reset" line.long 0x04 "DATA, Subframe data" line.long 0x08 "INT_STA, SPDIF player interrupt status" setclrfld.long 0x08 6. 0x08 6. 0x0C 6. " EOPD_PAUSEBURST_set/clr , End of Pause burst" "No interrupt,Interrupt" setclrfld.long 0x08 5. 0x08 5. 0x0C 5. " MEMORY_BLOCK_FULLY_READ_set/clr , Number of samples readed" "No interrupt,Interrupt" setclrfld.long 0x08 4. 0x08 4. 0x0C 4. " EOPD_DATABURST_set/clr , End of Pd" "No interrupt,Interrupt" textline " " setclrfld.long 0x08 3. 0x08 3. 0x0C 3. " EOLATENCY_set/clr , End of latency" "No interrupt,Interrupt" setclrfld.long 0x08 2. 0x08 2. 0x0C 2. " EOBLOCK_set/clr , End of block" "No interrupt,Interrupt" setclrfld.long 0x08 1. 0x08 1. 0x0C 1. " EODATABURST_set/clr , End of data burst" "No interrupt,Interrupt" textline " " setclrfld.long 0x08 0. 0x08 0. 0x0C 0. " UNDERFLOW_set/clr , FIFO underflow" "No interrupt,Interrupt" line.long 0x10 "INT_EN, SPDIF player interrupt enable" setclrfld.long 0x10 6. 0x14 6. 0x18 6. " EOPD_PAUSEBURST_set/clr , End of Pause burst" "Disabled,Enabled" setclrfld.long 0x10 5. 0x14 5. 0x18 5. " MEMORY_BLOCK_FULLY_READ_set/clr , Number of samples readed" "Disabled,Enabled" setclrfld.long 0x10 4. 0x14 4. 0x18 4. " EOPD_DATABURST_set/clr , End of Pd" "Disabled,Enabled" textline " " setclrfld.long 0x10 3. 0x14 3. 0x18 3. " EOLATENCY_set/clr , End of latency" "Disabled,Enabled" setclrfld.long 0x10 2. 0x14 2. 0x18 2. " EOBLOCK_set/clr , End of block" "Disabled,Enabled" setclrfld.long 0x10 1. 0x14 1. 0x18 1. " EODATABURST_set/clr , End of data burst" "Disabled,Enabled" textline " " setclrfld.long 0x10 0. 0x14 0. 0x18 0. " UNDERFLOW_set/clr , FIFO underflow" "Disabled,Enabled" line.long 0x1C "CTRL, S/PDIF player control" hexmask.long 0x1C 15.--31. 1. " NO_OF_SAMPLES_TO_READ , Number of samples to read from memory before an interrupt is generated" bitfld.long 0x1C 14. " STUFFING_HARD_SOFT , Zero stuffing mode" "Software,Hardware" bitfld.long 0x1C 13. " BYTE_SWAP , Byte swap mode" "Not swapped,Swapped" textline " " hexmask.long.byte 0x1C 5.--12. 1. " DIVIDER , Audio clock divider" bitfld.long 0x1C 4. " ROUNDING , Rounding" "No rounding,16bits rounding" bitfld.long 0x1C 3. " IDLESTATE , Output line state" "Ideal,Normal" textline " " bitfld.long 0x1C 0.--2. " OPERATION , S/PDIF operation" "OFF,MUTE w/ PCM,MUTE w/ pause,Audio data,Encoded,?..." line.long 0x20 "STA, S/PDIF player status" bitfld.long 0x20 16.--20. " SAMPLES_PRESENT , The number of empty cells present in the fifo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,?..." bitfld.long 0x20 15. " PD_PAUSEBURST , Interrupt send, each time a PD word is sent on S/PDIF output" "No interrupt,Interrupt" hexmask.long.byte 0x20 7.--14. 1. " PA_C_BIT_NUMBER , Pa channel status bit number" textline " " bitfld.long 0x20 6. " AUD_SAMPLE_FULLY_READ , The predefined number of samples readed" "Not readed,Readed" bitfld.long 0x20 5. " PD_DATABURST , Interrupt send, each time a PD word is sent on S/PDIF output" "No interrupt,Interrupt" bitfld.long 0x20 4. " LATENCY , End of sub frame counter for latency" "No end,End" textline " " bitfld.long 0x20 3. " EOBLOCK , End of block" "No end,End" bitfld.long 0x20 2. " EODATABURST , End of data burst" "No end,End" bitfld.long 0x20 1. " UNDERFLOW , Data underflow" "No underflow,Underflow" textline " " bitfld.long 0x20 0. " RUNSTOP , SPDIF Run/Stop" "Stopped,Running" line.long 0x24 "PA_PB, S/PDIF player Pa, Pb burst" hexmask.long.word 0x24 16.--31. 1. " PA , Sync word 1 for Pause data mode" hexmask.long.word 0x24 0.--15. 1. " PB , Sync word 2 for Pause data mode" line.long 0x28 "PC_PD, S/PDIF player Pc, Pd burst" hexmask.long.word 0x28 16.--31. 1. " PC , Encoded control word in frame unit for pause data mode" hexmask.long.word 0x28 0.--15. 1. " PD , Encoded data length in frame unit for pause data mode" line.long 0x2C "CL1, S/PDIF player left subframe channel status" line.long 0x30 "CR1, S/PDIF player right subframe channel status" line.long 0x34 "CL2_CR2_UV, S/PDIF player R/L subframe channel status and UV" bitfld.long 0x34 19. " RIGHT_VALIDITY , Validity bit for right subframe" "Not valid,Valid" bitfld.long 0x34 18. " LEFT_VALIDITY , Validity bit for left subframe" "Not valid,Valid" bitfld.long 0x34 17. " RIGHT_USER , User bit for right subframe" "0,1" textline " " bitfld.long 0x34 16. " LEFT_USER , User bit for left subframe" "0,1" bitfld.long 0x34 8.--11. " CR2 , Channel status for right subframe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 0.--3. " CL2 , Channel status for left subframe" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "PAUSE_LAT, S/PDIF player pause and latency" hexmask.long.word 0x38 16.--31. 1. " PAUSE_LAT , Gap length in a pause data burst" hexmask.long.word 0x38 0.--15. 1. " PAUSE_LAT , Frame counter max for latency" line.long 0x3C "FRAMELEN_BURST, S/PDIF player data and pause burst length" hexmask.long.word 0x3C 16.--31. 1. " FRAMELEN_DAT_BURST , Total length of data burst in frame units" hexmask.long.word 0x3C 0.--15. 1. " FRAMELEN_DAT_PAUSE_BURST , Total length of pause burst data in frame units" line.long 0x40 "CFG, S/PDIF player configuration" bitfld.long 0x40 8.--12. " FDMA_TRIGGER_LIMIT , Dreq to be generated as soon as the number of cells available in the FIFO equals to this value" "Reserved,Reserved,2,Reserved,4,Reserved,6,Reserved,8,Reserved,10,Reserved,12,Reserved,14,Reserved,16,Reserved,18,Reserved,20,Reserved,22,Reserved,24,Reserved,26,Reserved,28,Reserved,30,?..." bitfld.long 0x40 7. " BACK_STALLING_REQUIRED , Back stalling required" "Disabled,Enabled" bitfld.long 0x40 6. " DTS_SUPPORT , DTS support" "Disabled,Enabled" textline " " bitfld.long 0x40 5. " MEMORY_FMT , Memory format" "16/0,16/16" bitfld.long 0x40 4. " ONE_BIT_AUD_SUPPORT , One bit audio support" "Disabled,Enabled" bitfld.long 0x40 3. " VALIDITY_DATA_CTRL , Validity data control" "FDMA,Hardware" textline " " bitfld.long 0x40 2. " USER_DATA_CTRL , User data control" "FDMA,Hardware" bitfld.long 0x40 1. " CHANNEL_STA_CTRL , Channel status control" "FDMA,Hardware" bitfld.long 0x40 0. " PARITY_CTRL , Parity control" "Hardware,FDMA" tree.end width 0xB tree.end textline ""