; -------------------------------------------------------------------------------- ; @Title: S3C244X On-Chip Peripherals ; @Props: Released ; @Author: ZUB ; @Changelog: 2007-12-10 ZUB ; @Manufacturer: SAMSUNG - Samsung Semiconductor ; @Doc: um_s3c2443x_rev12.pdf rev. 1.2 2007-03-22 ; um_s3c2440a_rev013_Samsung CPU.pdf (2004-07) ; um_s3c2442b_rev12.pdf (rev 1.2 2006-07) ; @Core: ARM920T ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pers3c244x.per 7592 2017-02-18 13:54:14Z askoncej $ config 16. 8. width 0xB tree "ARM Core Registers" width 8. tree "ID Registers" group c15:0x0000--0x0000 line.long 0x0 "MIDR,Identity Code" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer" hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision" hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version" hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number" hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision" group c15:0x0100--0x0100 line.long 0x0 "CTR,Cache Type" bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f" bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes" textline " " bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1" bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16" textline " " bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..." bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128" bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1" bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16" tree.end tree "MMU Control and Configuration" width 8. group c15:0x1--0x1 line.long 0x0 "CR,Control Register" bitfld.long 0x0 31. " iA ,Asynchronous Clocking Select" "0,1" bitfld.long 0x0 30. " nF ,nFastBus Select" "0,1" bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin" bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000" textline " " bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable" bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable" bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable" bitfld.long 0x0 7. " B ,Endianism" "Little,Big" textline " " bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable" bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable" bitfld.long 0x0 0. " M ,MMU" "Disable,Enable" textline " " group c15:0x0002--0x0002 line.long 0x0 "TTBR,Translation Table Base Register" hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address" textline " " group c15:0x3--0x3 line.long 0x0 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " group c15:0x5--0x5 line.long 0x0 "DFSR,Data Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x105--0x105 line.long 0x0 "IFSR,Instruction Fault Status Register" bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page" group c15:0x6--0x6 line.long 0x0 "DFAR,Data Fault Address Register" group c15:0x106--0x106 line.long 0x0 "IFAR,Instruction Fault Address Register" textline " " group c15:0x000d--0x000d line.long 0x0 "FCSEPID,FCSE Process ID" tree.end tree "Cache Control and Configuration" group c15:0x9--0x9 line.long 0x0 "DCACHE,Data Cache Lockdown" group c15:0x109--0x109 line.long 0x0 "ICACHE,Instruction Cache Lockdown" group c15:0x11d--0x11d line.long 0x0 "ICINDEX,Instruction Cache Index" group c15:0x11e--0x11e line.long 0x0 "DCINDEX,Data Cache Index" group c15:0x0f--0x0f line.long 0x0 "TEST,Test State" tree.end tree "ICEbreaker" width 8. group ice:0x0--0x5 "Debug Control" line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled" bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled" textline " " bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled" bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled" bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x4 "DBGSTAT,Debug Status Register" bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,1" bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1" bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled" bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes" bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes" line.long 0x8 "VECTOR,Vector Catch Register" bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena" bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena" bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena" bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena" bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena" bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena" bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena" line.long 0x10 "COMCTRL,Debug Communication Control Register" bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111" bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend" bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend" line.long 0x14 "COMDATA,Debug Communication Data Register" group ice:0x8--0x0d "Watchpoint 0" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" group ice:0x10--0x15 "Watchpoint 1" line.long 0x0 "AV,Address Value" line.long 0x4 "AM,Address Mask" line.long 0x8 "DV,Data Value" line.long 0x0c "DM,Data Mask" line.long 0x10 "CV,Control Value" bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA" bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1" bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1" bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1" bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User" bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data" bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res" bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w" line.long 0x14 "CM,Control Mask" bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS" bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS" bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS" bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS " bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS" bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS" bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS" tree.end width 0xb tree.end sif (cpu()=="S3C2443X") tree "System Controller" base ad:0x4C000000 width 16. group.long 0x00++0xb "CLOCK SOURCE CONTROL REGISTERS" line.long 0x00 "LOCKCON0,MPLL Lock Time Count Register" hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL Lock Time Count Value" line.long 0x04 "LOCKCON1,EPLL Lock Time Count Register" hexmask.long.word 0x04 0.--15. 1. " E_LTIME ,EPLL Lock Time Count Value" line.long 0x08 "OSCSET,Oscillator Stabilization Control Register" hexmask.long.word 0x08 0.--15. 1. " XTALWAIT ,Crystal Oscillator Settle-down Wait Time" group.long 0x10++0x3 line.long 0x00 "MPLLCON,MPLL Configuration Register" bitfld.long 0x00 25. " MPLLEN_STOP ,MPLL ON/OFF In STOP Mode" "Off,On" bitfld.long 0x00 24. " ONOFF ,MPLL ON/OFF" "On,Off" textline " " hexmask.long.byte 0x00 16.--23. 1. " MDIV ,MPLL Main Divider Value" bitfld.long 0x00 8.--9. " PDIV ,MPLL Pre-divider Value" "0,1,2,3" textline " " bitfld.long 0x00 0.--1. " SDIV ,PLL Post-divider Value" "0,1,2,3" group.long 0x18++0x3 line.long 0x00 "EPLLCON,EPLL Configuration Register" bitfld.long 0x00 25. " EPLLEN_STOP ,EPLL ON/OFF In STOP Mode" "Off,On" bitfld.long 0x00 24. " ONOFF ,EPLL ON/OFF" "On,Off" textline " " hexmask.long.byte 0x00 16.--23. 1. " MDIV ,EPLL Main Divider Value" hexmask.long.byte 0x00 8.--13. 1. " PDIV ,EPLL Pre-divider Value" textline " " bitfld.long 0x00 0.--1. " SDIV ,EPLL Post-divider Value" "0,1,2,3" group.long 0x20++0xb "CLOCK CONTROL REGISTER" line.long 0x00 "CLKSRC,Clock Source Control Register" bitfld.long 0x00 14.--15. " SELI2S ,I2S Clock Source Selection" "Divided of EPLL,External I2S,EpllRefClk,EpllRefClk" bitfld.long 0x00 7.--8. " SELESRC ,Selection EPLL Reference Clock" "MPLL reference,MPLL reference,XTI,EXTCLK" textline " " bitfld.long 0x00 6. " SELEPLL ,ESYSCLK Selection" "EPLL reference,EPLL output" bitfld.long 0x00 4. " SELMPLL ,MSYSCLK Selection" "MPLL reference,MPLL output" textline " " bitfld.long 0x00 3. " SELEXTCLK ,Configure MPLL Reference Clock Divider" "Do not use MPLL,Use MPLL" line.long 0x04 "CLKDIV0,Clock Divider Ratio Control Register0" bitfld.long 0x04 13. " DVS ,Enable/Disable DVS (Dynamic Voltage Scaling) Feature" "Disabled,Enabled" bitfld.long 0x04 9.--12. " ARMDIV ,ARM Clock Divider Ratio" "1/1,Reserved,1/3,Reserved,Reserved,Reserved,Reserved,Reserved,1/2,1/4,1/6,1/8,Reserved,1/12,Reserved,1/16" textline " " bitfld.long 0x04 6.--8. " EXTDIV ,External Clock Divider Ratio" "MPLL/3,MPLL/5,MPLL/7,MPLL/9,MPLL/11,MPLL/13,MPLL/15,MPLL/17" bitfld.long 0x04 4.--5. " PREDIV ,Pre Divider For HCLK" "0,1,2,3" textline " " bitfld.long 0x04 3. " HALFHCLK ,HCLKx1_2(SSMC) Clock Divider Ratio" "HCLK,HCLK/2" bitfld.long 0x04 2. " PCLKDIV ,PCLK Clock Divider Ratio" "HCLK,HCLK/2" textline " " bitfld.long 0x04 0.--1. " HCLKDIV ,HCLK Clock Divider Ratio" "0,1,Reserved,3" line.long 0x08 "CLKDIV1,Clock Divider Ratio Control Register1" bitfld.long 0x08 26.--29. " CAMDIV ,CAM Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 24.--25. " HSSPIDIV ,HS_Spi Clock Divider Ratio" "1,2,3,4" textline " " hexmask.long.byte 0x08 16.--23. 1. " DISPDIV ,Display Controller Clock Divider Ratio" bitfld.long 0x08 12.--15. " I2SDIV ,I2S Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x08 8.--11. " UARTDIV ,UART Clock Divider Ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x08 6.--7. " HSMMCDIV ,HSMMC Clock Divider Ratio" "1,2,3,4" textline " " bitfld.long 0x08 4.--5. " USBHOSTDIV ,Usb Host Clock Divider Ratio" "1,2,3,4" group.long 0x30++0xb line.long 0x00 "HCLKCON,HCLK Enable Register" bitfld.long 0x00 19. " DRAMC ,Enable HCLK Into DRAM Controller" "Disabled,Enabled" bitfld.long 0x00 18. " SSMC ,Enable HCLK Into The SSMC Block" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CFC ,Enable HCLK Into The CF" "Disabled,Enabled" bitfld.long 0x00 16. " HSMMC ,Enable HCLK Into The HSMMC" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " USBDEV ,Enable HCLK Into The USB Device" "Disabled,Enabled" bitfld.long 0x00 11. " USBHOST ,Enable HCLK Into The USB HOST" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " LCDCON ,Enable HCLK Into LCD Controller (STN)" "Disabled,Enabled" bitfld.long 0x00 9. " DISPCON ,Enable HCLK Into The Display Controller" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " CAMIF ,Enable HCLK Into The Camera Interface" "Disabled,Enabled" bitfld.long 0x00 5. " DMA5 ,Enable HCLK Into DMA Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DMA4 ,Enable HCLK Into DMA Channel 4" "Disabled,Enabled" bitfld.long 0x00 3. " DMA3 ,Enable HCLK Into DMA Channel 3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DMA2 ,Enable HCLK Into DMA Channel 2" "Disabled,Enabled" bitfld.long 0x00 1. " DMA1 ,Enable HCLK Into DMA Channel 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA0 ,Enable HCLK Into DMA Channel 0" "Disabled,Enabled" line.long 0x04 "PCLKCON,PCLK Enable Register" bitfld.long 0x04 15. " SPI_1 ,Enable PCLK Into The SPI_1" "Disabled,Enabled" bitfld.long 0x04 14. " SPI_0 ,Enable PCLK Into The SPI_0" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " GPIO ,Enable PCLK Into The GPIO" "Disabled,Enabled" bitfld.long 0x04 12. " RTC ,Enable PCLK Into The RTC" "Disabled,Enabled" textline " " bitfld.long 0x04 11. " WDT ,Enable PCLK Into The Watch Dog Timer" "Disabled,Enabled" bitfld.long 0x04 10. " PWM ,Enable PCLK Into The PWM" "Disabled,Enabled" textline " " bitfld.long 0x04 9. " I2S ,Enable PCLK Into The I2S" "Disabled,Enabled" bitfld.long 0x04 8. " AC97 ,Enable PCLK Into The AC97" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " TSADC ,Enable PCLK Into The TSADC" "Disabled,Enabled" bitfld.long 0x04 6. " SPI_HS ,Enable PCLK Into The SPI_HS" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " SDI ,Enable PCLK Into The SDI (SDMMC)" "Disabled,Enabled" bitfld.long 0x04 4. " I2C ,Enable PCLK Into The I2C" "Disabled,Enabled" textline " " bitfld.long 0x04 3. " UART3 ,Enable PCLK Into The UART3" "Disabled,Enabled" bitfld.long 0x04 2. " UART2 ,Enable PCLK Into The UART2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " UART1 ,Enable PCLK Into The UART1" "Disabled,Enabled" bitfld.long 0x04 0. " UART0 ,Enable PCLK Into The UART0" "Disabled,Enabled" line.long 0x08 "SCLKCON,Special Clock Enable Register" bitfld.long 0x08 16. " DDRCLK ,Enable DDRCLK" "Disabled,Enabled" bitfld.long 0x08 15. " SSMCCLK ,Enable SSMCCLK" "Disabled,Enabled" textline " " bitfld.long 0x08 14. " HSSPICLK ,Enable HS-SPI Clock" "Disabled,Enabled" bitfld.long 0x08 13. " HSMMCCLK_EXT ,Enable HSMMC_EXT Clock" "Disabled,Enabled" textline " " bitfld.long 0x08 12. " HSMMCCLK ,Enable HSMMC Clock" "Disabled,Enabled" bitfld.long 0x08 11. " CAMCLK ,Enable CAM Clock" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " DISPCLK ,Enable Display Controller Clock" "Disabled,Enabled" bitfld.long 0x08 9. " I2SCLK ,Enable I2S Clock" "Disabled,Enabled" textline " " bitfld.long 0x08 8. " UARTCLK ,Enable UART Clock" "Disabled,Enabled" bitfld.long 0x08 1. " USBHOST ,Enable USB HOST Clock" "Disabled,Enabled" group.long 0x40++0x3 "POWER MANAGEMENT REGISTERS" line.long 0x00 "PWRMODE,Power Mode Control Register" bitfld.long 0x00 17. " IDLE ,The System Enters Into IDLE Mode" "Normal,Idle" bitfld.long 0x00 16. " STOP ,The System Enters Into STOP Mode" "Normal,Stop" textline " " hexmask.long.word 0x00 0.--15. 1. " SLEEP ,The System Enters Into SLEEP Mode (0x2BED)" group.long 0x60++0x3 line.long 0x00 "PWRCFG,Power Management Configuration Register" bitfld.long 0x00 15. " SLEEP_CFG ,Enable Wakeup Source" "Depending on BATT_FLT,Regardless of BATT_FLT" textline " " bitfld.long 0x00 9. " NFRESET_CFG ,Reset Configuration When Internal Resets Is Generated" "Reset,No reset" textline " " bitfld.long 0x00 8. " RTC_CFG ,Configure RTC Alarm Interrupt Wakeup Mask" "Wake-up signal,Mask RTC interrupt" textline " " bitfld.long 0x00 7. " RTCTICK_CFG ,Configure RTC Tick Interrupt Wakeup Mask" "Wake-up signal,Mask RTC interrupt" textline " " bitfld.long 0x00 4. " nSW_PHY_OFF_USB ,Power On/Off Of Usb Phy" "Off,On" bitfld.long 0x00 3. " OSC_EN_SLP ,Crystal Oscillator Enable Bit In SLEEP Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " OSC_EN_STOP ,Crystal Oscillator Enable Bit In STOP Mode" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BATF_CFG ,Configure BATT_FLT Operation" "Ignore,Interrupt,Ignore,?..." group.long 0x44++0x3 "RESET CONTROL REGISTERS" line.long 0x00 "SWRST,Software Reset Control Register" group.long 0x64++0x3 line.long 0x00 "RSTCON,Reset Control Register" bitfld.long 0x00 16. " PWROFF_SLP ,Power Control On Pad Retention Cell I/O" "Cleared By User,Set When Sleep" hexmask.long.byte 0x00 8.--15. 1. " RSTCNT ,This RSTCNT Value Effects Delay Of Releasing Reset" textline " " hexmask.long.byte 0x00 0.--7. 1. " PWRSETCNT ,This Field Configures Value Of Power Settle Down Counter" rgroup.long 0x68++0x3 "SYSTEM CONTROLLER STATUS REGISTERS" line.long 0x00 "RSTSTAT,Reset Status Register" bitfld.long 0x00 5. " SWRST ,Reset By Software" "No reset,Reset" bitfld.long 0x00 3. " SLEEP ,Wakeup By RTC_TICK, RTC_ALARM and EINT From Powerdown Mode" "No wake-up,Wake-up" textline " " bitfld.long 0x00 2. " WDTRST ,Reset By Watch-dog Reset" "No reset,Reset" bitfld.long 0x00 0. " EXTRST ,External Reset By nRESET Pin" "No reset,Reset" group.long 0x6C++0x3 line.long 0x00 "WKUPSTAT,Wake-up Status Register" bitfld.long 0x00 5. " BATF ,Waked-up By BATT_FLT Assertion" "No wake-up,Wake-up" bitfld.long 0x00 4. " RTC_TICK ,Waked-up By RTC Tick" "No wake-up,Wake-up" textline " " bitfld.long 0x00 1. " RTC ,Waked-up By RTC Alarm" "No wake-up,Wake-up" group.long 0x50++0x3 "BUS CONFIGURATION REGISTER" line.long 0x00 "BUSPRI0,Bus Priority Control Register 0" bitfld.long 0x00 14.--15. " TYPE_S ,Priority Type For AHB-System Bus" "0,1,2,3" textline " " bitfld.long 0x00 8.--11. " ORDER_S ,Fixed Priority Order For AHB-S Bus" "0-1-2-3-4-5-6-7-8-9-10-11-12,1-2-3-4-5-6-7-8-9-10-11-12-0,2-3-4-5-6-7-8-9-10-11-12-0-1,3-4-5-6-7-8-9-10-11-12-0-1-2,4-5-6-7-8-9-10-11-12-0-1-2-3,5-6-7-8-9-10-11-12-0-1-2-3-4,6-7-8-9-10-11-12-0-1-2-3-4-5,7-8-9-10-11-12-0-1-2-3-4-5-6,8-9-10-11-12-0-1-2-3-4-5-6-7,9-10-11-12-0-1-2-3-4-5-6-7-8,10-11-12-0-1-2-3-4-5-6-7-8-9,11-12-0-1-2-3-4-5-6-7-8-9-10,12-0-1-2-3-4-5-6-7-8-9-10-11,?..." textline " " bitfld.long 0x00 6.--7. " TYPE_I ,Priority Type For AHB-Image Bus" "0,1,2,3" textline " " bitfld.long 0x00 0.--2. " ORDER_I ,Fixed Priority Order For AHB-I Bus" "0-1-2-3-4-5-6,1-2-3-4-5-6-0,2-3-4-5-6-0-1,3-4-5-6-0-1-2,4-5-6-0-1-2-3,5-6-0-1-2-3-4,6-0-1-2-3-4-5,?..." group.long 0x70++0xF "MISC" line.long 0x0 "INFORM0,SLEEP Mode Information Register" line.long 0x4 "INFORM1,SLEEP Mode Information Register" line.long 0x8 "INFORM2,SLEEP Mode Information Register" line.long 0xC "INFORM3,SLEEP Mode Information Register" group.long 0x80++0xF "USB PHY REGISTERS" line.long 0x00 "PHYCTRL,USB2.0 PHY Control Register" bitfld.long 0x00 3.--4. " CLK_SEL ,Reference Clock Frequency Select" "48MHz,Reserved,12MHz,24MHz" bitfld.long 0x00 2. " EXT_CLK ,Clock Select For XO Block" "Crystal,Oscillator" textline " " bitfld.long 0x00 1. " INT_PLL_SEL ,Host 1.1 Uses Internal PLL Clock (48Mhz)" "System,USB internal" bitfld.long 0x00 0. " DOWNSTREAM_PORT ,Downstream Port Select" "Device,Host" line.long 0x04 "PHYPWR,USB2.0 PHY Power Control Register" bitfld.long 0x04 31. " COMMON_ON_N ,Force XO Bias Bandgap And PLL To Remain Powered During A Suspend (Clock Available Even Suspend Mode)" "Available except suspend,Available even suspend" textline " " bitfld.long 0x04 4.--5. " ANALOG_POWERDOWN ,Analog Block Power Down In PHY2.0" "Normal,Block,Normal,Normal" textline " " bitfld.long 0x04 3. " PLL_REF_CLK ,Switch Reference Clock Used In Internal PLL Of USB Block" "External X-tal,Internal system PLL" textline " " bitfld.long 0x04 2. " XO_ON ,Force XO Block On During Suspend" "Powered up,Powered down" textline " " bitfld.long 0x04 1. " PLL_POWERDOWN ,PLL Power Down In PHY2.0" "Powered up,Powered down" bitfld.long 0x04 0. " FORCE_SUSPEND ,Apply Suspend Signal For Power Save" "Disabled,Enabled" line.long 0x08 "URSTCON,USB Reset Control Register" bitfld.long 0x08 2. " FUNC_RESET ,Function 2.0 S/W Reset" "No reset,Reset" bitfld.long 0x08 1. " HOST_RESET ,Host 1.1 S/W Reset" "No reset,Reset" textline " " bitfld.long 0x08 0. " PHY_RESET ,PHY 2.0 S/W Reset" "No reset,Reset" line.long 0x0C "UCLKCON,USB Clock Control Register" bitfld.long 0x0C 31. " DETECT_VBUS ,Vbus Detect (Pull-up resistance on the D+ line)" "Disabled,Enabled" bitfld.long 0x0C 4. " HOST_CLK_TEST ,Host CLK Test Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " FUNC_CLK_EN ,USB 2.0 Function Clock Enable" "Disabled,Enabled" bitfld.long 0x0C 1. " HOST_CLK_EN ,USB 1.1 Host Clock Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " TCLK_EN ,USB 2.0 PHY Test Clock Enable" "Disabled,Enabled" width 0xB tree.end tree "BUS MATRIX & EBI" base ad:0x4E800000 width 16. group.long 0x00++0x3 "MATRIX CORE 0 PRIORITY REGISTER" line.long 0x00 "BPRIORITY0,Matrix Core 0 Priority Control Register" bitfld.long 0x00 2. " PRI_TYP ,Priority Type" "Fixed,Rotation" bitfld.long 0x00 0. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "AHB_S>AHB_I,AHB_I>AHB_S" group.long 0x04++0x3 "MATRIX CORE 1 PRIORITY REGISTER" line.long 0x00 "BPRIORITY1,Matrix Core 1 Priority Control Register" bitfld.long 0x00 2. " PRI_TYP ,Priority Type" "Fixed,Rotation" bitfld.long 0x00 0. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "AHB_S>AHB_I,AHB_I>AHB_S" group.long 0x08++0x3 "EBI CONTROL REGISTER" line.long 0x00 "EBICON,EBI Control Register" bitfld.long 0x00 10. " BANK3_CFG ,Bank3 Configuration" "SROM,CF" bitfld.long 0x00 9. " BANK2_CFG ,Bank2 Configuration" "SROM,CF" textline " " bitfld.long 0x00 8. " BANK1_CFG ,Bank1 Configuration" "SROM,CF" bitfld.long 0x00 2. " PRI_TYP ,Priority Type" "Fixed,Rotation" textline " " bitfld.long 0x00 0.--1. " FIX_PRI_TYP ,Priority For The Fixed Priority Type" "SSMC>NFCON>CFCON>ExtBusMaster,SSMC>CFCON>NFCON>ExtBusMaster,SSMC>ExtBusMaster>NFCON>CFCON,ExtBusMaster>SSMC>NFCON>CFCON" width 0xB tree.end tree "Static Memory Controller (SMC)" base ad:0x4F000000 width 14. group.long 0x0++0x1F "Bank 0" line.long 0x00 "SMBIDCYR0,Bank0 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR0,Bank0 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR0,Bank0 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR0,Bank0 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR0,Bank0 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR0,Bank0 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR0,Bank0 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR0,Bank0 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x20++0x1F "Bank 1" line.long 0x00 "SMBIDCYR1,Bank1 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR1,Bank1 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR1,Bank1 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR1,Bank1 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR1,Bank1 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR1,Bank1 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR1,Bank1 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR1,Bank1 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x40++0x1F "Bank 2" line.long 0x00 "SMBIDCYR2,Bank2 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR2,Bank2 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR2,Bank2 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR2,Bank2 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR2,Bank2 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR2,Bank2 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR2,Bank2 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR2,Bank2 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x60++0x1F "Bank 3" line.long 0x00 "SMBIDCYR3,Bank3 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR3,Bank3 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR3,Bank3 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR3,Bank3 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR3,Bank3 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR3,Bank3 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR3,Bank3 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR3,Bank3 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x80++0x1F "Bank 4" line.long 0x00 "SMBIDCYR4,Bank4 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR4,Bank4 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR4,Bank4 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR4,Bank4 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR4,Bank4 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR4,Bank4 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR4,Bank4 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR4,Bank4 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0xA0++0x1F "Bank 5" line.long 0x00 "SMBIDCYR5,Bank5 Idle Cycle Control Register" bitfld.long 0x00 0.--3. " IDCY ,Idle Or Turnaround Cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "SMBWSTRDR5,Bank5 Read Wait State Control Register" bitfld.long 0x04 0.--4. " WSTRD ,Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "SMBWSTWRR5,Bank5 Write Wait State Control Register" bitfld.long 0x08 0.--4. " WSTWR ,Write Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "SMBWSTOENR5,Bank5 Output Enable Assertion Delay Control Register" bitfld.long 0x0C 0.--3. " WSTOEN ,Output Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SMBWSTWENR5,Bank5 Write Enable Assertion Delay Control Register" bitfld.long 0x10 0.--3. " WSTWEN ,Write Enable Assertion Delay From Chip Select Assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "SMBCR5,Bank5 Control Register" bitfld.long 0x14 20. " AddrValidWriteEn ,Controls The Behavior Of The Signal RSMAVD During Write Operations" "High,Active for write" textline " " bitfld.long 0x14 18.--19. " BurstLenWrite ,Burst Transfer Length" "4-transfer,8-transfer,Reserved,Continuous" textline " " bitfld.long 0x14 16. " BMWrite ,Burst Mode Write" "Nonburst,Burst" bitfld.long 0x14 15. " DRnOWE ,Delay Between nCS Signal And nOE/nWE Signal" "No delay,Delay" textline " " bitfld.long 0x14 14. " WrapRead ,Enables The Wrapping Burst Feature From External Memory" "Disabled,Enabled" textline " " bitfld.long 0x14 12. " AddrValidReadEn ,Controls The Behavior Of The Signal RSMAVD During Read Operations" "High,Active for read" textline " " bitfld.long 0x14 10.--11. " BurstLenRead ,Burst Transfer Length" "4-transfer,8-transfer,16-transfer,Continuous" bitfld.long 0x14 9. " SyncReadDev ,Synchronous Access Capable Device Connected" "Asynchronous,Synchronous" textline " " bitfld.long 0x14 8. " BMRead ,Burst Mode Read And Asynchronous Page Mode" "Nonburst,Burst" bitfld.long 0x14 7. " DRnCS ,Delay Between ADDR Signal And nCS Signal" "No delay,Delay" textline " " bitfld.long 0x14 6. " SMBLSPOL ,Polarity Of Signal nBE" "Low,High" bitfld.long 0x14 4.--5. " MW ,Memory Width" "8-bit,16-bit,?..." textline " " bitfld.long 0x14 3. " WP ,Write Protect" "No protection,Protected" bitfld.long 0x14 2. " WaitEn ,External Memory Controller Wait Signal Enable" "Disabled,nWAIT" textline " " bitfld.long 0x14 1. " WaitPol ,Polarity Of The External Wait Input For Activation" "Low,High" bitfld.long 0x14 0. " RBLE ,Read Byte Lane Enable" "High,Low" line.long 0x18 "SMBSR5,Bank5 Status Register" eventfld.long 0x18 0. " WaitToutErr ,External Wait Timeout Error Flag" "No Error,Error" line.long 0x1C "SMBWSTBRDR5,Bank5 Burst Read Wait Delay Control Register" bitfld.long 0x1C 0.--4. " WSTBRD ,Burst Read Wait State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " group.long 0x100++0x3 "Common Registers" line.long 0x00 "SMBONETYPER,SMC Bank OneNAND Type Selection Register" bitfld.long 0x00 5. " BANK5TYPE ,MUXED/DEMUXED OneNAND" "DEMUXED,MUXED" bitfld.long 0x00 4. " BANK4TYPE ,MUXED/DEMUXED OneNAND" "DEMUXED,MUXED" textline " " bitfld.long 0x00 3. " BANK3TYPE ,MUXED/DEMUXED OneNAND" "DEMUXED,MUXED" bitfld.long 0x00 2. " BANK2TYPE ,MUXED/DEMUXED OneNAND" "DEMUXED,MUXED" textline " " bitfld.long 0x00 1. " BANK1TYPE ,MUXED/DEMUXED OneNAND" "DEMUXED,MUXED" bitfld.long 0x00 0. " BANK0TYPE ,Determined By OM[4:2] Signals" "DEMUXED,MUXED" group.long 0x200++0x7 line.long 0x00 "SMCSR,SMC Status Register" bitfld.long 0x00 0. " WaitStatus ,External Wait Status" "Deasserted,Asserted" line.long 0x04 "SMCCR,SMC Control Register" bitfld.long 0x04 1. " MemClkRatio ,Defines The Ratio Of SMCLK To HCLK" "SMCLK=HCLK,SMCLK=HCLK/2" textline " " bitfld.long 0x04 0. " SMClockEn ,SMCLK Enable" "Active during memory accesses,Always running" width 0xB tree.end tree "Mobile DRAM Configuration (MDC)" base ad:0x48000000 width 14. group.long 0x00++0x17 line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register" bitfld.long 0x00 17.--18. " RASBW0 ,The Bit Width Of RAS (row) Address Of Bank 0" "11-bit,12-bit,13-bit,14-bit" bitfld.long 0x00 14.--15. " RASBW1 ,The Bit Width Of RAS (row) Address Of Bank 1" "11-bit,12-bit,13-bit,14-bit" textline " " bitfld.long 0x00 11.--12. " CASBW0 ,The Bit Width Of CAS (column) Address Of Bank 0" "8-bit,9-bit,10-bit,11-bit" bitfld.long 0x00 8.--9. " CASBW1 ,The Bit Width Of CAS (column) Address Of Bank 1" "8-bit,9-bit,10-bit,11-bit" textline " " bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory Address Configuration" "BA/RAS/CAS,RAS/BA/CAS,?..." bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory Address Configuration" "BA/RAS/CAS,RAS/BA/CAS,?..." textline " " bitfld.long 0x00 2.--3. " MEMCFG ,External Memory Configuration" "SDR,MSDR,DDR,DDR" bitfld.long 0x00 0. " BW ,Determine External Memory Data Bus Width" "32-bit,16-bit" line.long 0x04 "BANKCON1,Mobile DRAM Control Register" bitfld.long 0x04 31. " BUSY ,DRAM Controller Status Bit" "Idle,Busy" bitfld.long 0x04 28.--30. " DQSInDLL ,DQSIn Delay Selection" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 7. " BurstStop ,Burst Stop Control" "Disabled,Enabled" bitfld.long 0x04 6. " WBUF ,Write Buffer Control" "Disabled,Enabled" textline " " bitfld.long 0x04 5. " AP ,Auto Pre-charge Control" "Enabled,Disabled" bitfld.long 0x04 4. " PWRDN ,Support Sdram Power Down Control" "Not supported,Supported" textline " " bitfld.long 0x04 0.--1. " INIT ,DRAM Initialization Control" "Normal,Issue PALL,Issue MRS,Issue EMRS" line.long 0x08 "BANKCON2,Mobile DRAM Timing Control Register" bitfld.long 0x08 20.--23. " tRAS ,Row Active Time" "1-clk,2-clk,3-clk,4-clk,5-clk,6-clk,7-clk,8-clk,9-clk,10-clk,11-clk,12-clk,13-clk,14-clk,15-clk,16-clk" bitfld.long 0x08 16.--19. " tRC ,Row Cycle Time" "1-clk,2-clk,3-clk,4-clk,5-clk,6-clk,7-clk,8-clk,9-clk,10-clk,11-clk,12-clk,13-clk,14-clk,15-clk,16-clk" textline " " bitfld.long 0x08 4.--5. " CASLatency ,CAS Latency Control" "Reserved,1-clk,2-clk,3-clk" bitfld.long 0x08 2.--3. " tRCD ,RAS To CAS Delay" "1-clk,2-clk,3-clk,4-clk" textline " " bitfld.long 0x08 0.--1. " tRP ,Row Pre-charge Time" "1-clk,2-clk,3-clk,4-clk" line.long 0x0C "BANKCON3,Mobile DRAM MRS Register" bitfld.long 0x0C 30.--31. " BA ,Bank Address For EMRS" "0,1,2,3" bitfld.long 0x0C 21.--22. " DS ,DS(Driver Strength) For EMRS" "0,1,2,3" textline " " bitfld.long 0x0C 16.--18. " PASR ,PASR(Partial Array Self Refresh) For EMRS" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 14.--15. " BA ,Bank Address For MRS" "0,1,2,3" textline " " bitfld.long 0x0C 4.--6. " CASLatency ,CAS Latency For MRS" "Reserved,1-clk,2-clk,3-clk,?..." bitfld.long 0x0C 3. " BurstType ,DRAM Burst Type" "Low,High" textline " " bitfld.long 0x0C 0.--2. " BurstLength ,DRAM Burst Length" "0,1,2,3,4,5,6,7" line.long 0x10 "REFRESH,Mobile DRAM Refresh Control Register" hexmask.long.word 0x10 0.--15. 1. " REFCYC ,DRAM Refresh Cycle" line.long 0x14 "TIMEOUT,Write Buffer Time Out Control Register" hexmask.long.word 0x14 0.--15. 1. " TIMEOUT ,Write Buffer Time-out Delay Time" width 0xB tree.end endif sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) tree "Memory Controller" base a:0x48000000 group 0x0000++0x3 line.long 0x00 "BWSCON,Bus width and wait status control register" bitfld.long 0x00 31. " ST7 ,SRAM for using UB/LB for bank 7" "No UB/LB,UB/LB" bitfld.long 0x00 30. " WS7 ,WAIT status for bank 7" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DW7 ,Data bus width for bank 7" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 27. " ST6 ,SRAM for using UB/LB for bank 6" "No UB/LB,UB/LB" bitfld.long 0x00 26. " WS6 ,WAIT status for bank 6" "Disabled,Enabled" bitfld.long 0x00 24.--25. " DW6 ,Data bus width for bank 6" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 23. " ST5 ,SRAM for using UB/LB for bank 5" "No UB/LB,UB/LB" bitfld.long 0x00 22. " WS5 ,WAIT status for bank 5" "Disabled,Enabled" bitfld.long 0x00 20.--21. " DW5 ,Data bus width for bank 5" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 19. " ST4 ,SRAM for using UB/LB for bank 4" "No UB/LB,UB/LB" bitfld.long 0x00 18. " WS4 ,WAIT status for bank 4" "Disabled,Enabled" bitfld.long 0x00 16.--17. " DW4 ,Data bus width for bank 4" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 15. " ST3 ,SRAM for using UB/LB for bank 3" "No UB/LB,UB/LB" bitfld.long 0x00 14. " WS3 ,WAIT status for bank 3" "Disabled,Enabled" bitfld.long 0x00 12.--13. " DW3 ,Data bus width for bank 3" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 11. " ST2 ,SRAM for using UB/LB for bank 2" "No UB/LB,UB/LB" bitfld.long 0x00 10. " WS2 ,WAIT status for bank 2" "Disabled,Enabled" bitfld.long 0x00 8.--9. " DW2 ,Data bus width for bank 2" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 7. " ST1 ,SRAM for using UB/LB for bank 1" "No UB/LB,UB/LB" bitfld.long 0x00 6. " WS1 ,WAIT status for bank 1" "Disabled,Enabled" bitfld.long 0x00 4.--5. " DW1 ,Data bus width for bank 1" "8-bit,16-bit,32-bit,?..." textline " " bitfld.long 0x00 1.--2. " DW0 ,Data bus width for bank 0" "Reserved,16-bit,32-bit,?..." group 0x0004++0x1b "BANK CONTROL REGISTER(BANKCONN:nGCS0-nGCS5)" line.long 0x0 "BANKCON0,Bank 0 control register" bitfld.long 0x0 13.--14. " TACS ,Address set-up time before nGCS0" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x0 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x0 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0x0 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x0 4.--5. " TCAH ,Address hold time after nGCS0" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x0 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" line.long 0x4 "BANKCON1,Bank 1 control register" bitfld.long 0x4 13.--14. " TACS ,Address set-up time before nGCS1" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x4 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x4 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0x4 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x4 4.--5. " TCAH ,Address hold time after nGCS1" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x4 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0x4 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" line.long 0x8 "BANKCON2,Bank 2 control register" bitfld.long 0x8 13.--14. " TACS ,Address set-up time before nGCS2" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x8 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x8 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0x8 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x8 4.--5. " TCAH ,Address hold time after nGCS2" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x8 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0x8 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" line.long 0xC "BANKCON3,Bank 3 control register" bitfld.long 0xC 13.--14. " TACS ,Address set-up time before nGCS3" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0xC 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0xC 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0xC 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0xC 4.--5. " TCAH ,Address hold time after nGCS3" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0xC 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0xC 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" line.long 0x10 "BANKCON4,Bank 4 control register" bitfld.long 0x10 13.--14. " TACS ,Address set-up time before nGCS4" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x10 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x10 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0x10 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x10 4.--5. " TCAH ,Address hold time after nGCS4" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x10 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0x10 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" line.long 0x14 "BANKCON5,Bank 5 control register" bitfld.long 0x14 13.--14. " TACS ,Address set-up time before nGCS5" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x14 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x14 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" textline " " bitfld.long 0x14 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x14 4.--5. " TCAH ,Address hold time after nGCS5" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x14 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" textline " " bitfld.long 0x14 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data" if (((data.long(ad:0x4800001c))&0x18000)==0x00) group 0x001c++0x3 line.long 0x00 "BANKCON6,Bank 6 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM" bitfld.long 0x00 13.--14. " TACS ,Address set-up time before nGCS6" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x00 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" textline " " bitfld.long 0x00 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" bitfld.long 0x00 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x00 4.--5. " TCAH ,Address hold time after nGCS6" "0 clock,1 clock,2 clocks,4 clocks" textline " " bitfld.long 0x00 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" bitfld.long 0x00 0.--1. " PMC ,Page mode configuration" "1 data,4 consecutive accesses,8 consecutive accesses,16 consecutive accesses" elif (((data.long(ad:0x4800001c))&0x18000)==0x18000) group 0x001c++0x3 line.long 0x00 "BANKCON6,Bank 6 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM" bitfld.long 0x00 2.--3. " TRCD ,RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..." bitfld.long 0x00 0.--1. " SCAN ,Column address number" "8-bit,9-bit,10-bit,?..." else group 0x001c++0x3 line.long 0x00 "BANKCON6,Bank 6 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM" endif if (((data.long(ad:0x48000020))&0x18000)==0x00) group 0x0020++0x3 line.long 0x00 "BANKCON7,Bank 7 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank7" "ROM or SRAM,Reserved,Reserved,Sync DRAM" bitfld.long 0x00 13.--14. " TACS ,Address set-up time before nGCS7" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x00 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks" textline " " bitfld.long 0x00 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks" bitfld.long 0x00 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks" bitfld.long 0x00 4.--5. " TCAH ,Address hold time after nGCS7" "0 clock,1 clock,2 clocks,4 clocks" textline " " bitfld.long 0x00 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks" bitfld.long 0x00 0.--1. " PMC ,Page mode configuration" "1 data,4 consecutive accesses,8 consecutive accesses,16 consecutive accesses" elif (((data.long(ad:0x48000020))&0x18000)==0x18000) group 0x0020++0x3 line.long 0x00 "BANKCON7,Bank 7 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank7" "ROM or SRAM,Reserved,Reserved,Sync DRAM" bitfld.long 0x00 2.--3. " TRCD ,RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..." bitfld.long 0x00 0.--1. " SCAN ,Column address number" "8-bit,9-bit,10-bit,?..." else group 0x0020++0x3 line.long 0x00 "BANKCON7,Bank 7 control register" bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM" endif group 0x0024++0x3 "REFRESH CONTROL REGISTER" line.long 0x00 "REFRESH,SDRAM refresh control register" bitfld.long 0x00 23. " REFEN ,SDRAM Refresh Enable" "Disabled,Enabled" bitfld.long 0x00 22. " TREFMD ,SDRAM Refresh Mode" "Auto,Self" bitfld.long 0x00 20.--21. " TRP ,SDRAM RAS pre-charge Time" "2 clocks,3 clocks,4 clocks,Not supported" textline " " bitfld.long 0x00 18.--19. " TSRC ,SDRAM Semi Row Cycle Time" "4 clocks,5 clocks,6 clocks,7 clocks" hexmask.long.word 0x00 0.--10. 1. " REFCNT ,SDRAM refresh count value" group 0x0028++0x3 "BANKSIZE REGISTER" line.long 0x00 "BANKSIZE,Flexible bank size register" bitfld.long 0x00 7. " BURST_EN ,ARM core burst operation enable" "Disabled,Enabled" bitfld.long 0x00 5. " SCKE_EN ,SDRAM power down mode enable control by SCKE" "Disabled,Enabled" bitfld.long 0x00 4. " SCLK_EN ,SCLK enabled during SDRAM access cycle for reducing power consumption" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--2. " BK76MAP ,Bank6/7 memory map" "32MB/32MB,64MB/64MB,128MB/128MB,Reserved,2MB/2MB,4MB/4MB,8MB/8MB,16MB/16MB" group 0x002c++0x7 "SDRAM MODE REGISTER SET REGISTER" line.long 0x00 "MRSRB6,Mode register set register bank6" bitfld.long 0x00 9. " WBL ,Write burst length" "Burst,?..." bitfld.long 0x00 7.--8. " TM ,Test mode" "Test mode,?..." bitfld.long 0x00 4.--6. " CL ,CAS latency" "1 clock,Reserved,2 clocks,3 clocks,?..." textline " " bitfld.long 0x00 3. " BT ,Burst type" "Sequential,?..." bitfld.long 0x00 0.--2. " BL ,Burst length" "1,?..." line.long 0x04 "MRSRB7,Mode register set register bank7" bitfld.long 0x04 9. " WBL ,Write burst length" "Burst,?..." bitfld.long 0x04 7.--8. " TM ,Test mode" "Test mode,?..." bitfld.long 0x04 4.--6. " CL ,CAS latency" "1 clock,Reserved,2 clocks,3 clocks,?..." textline " " bitfld.long 0x04 3. " BT ,Burst type" "Sequential,?..." bitfld.long 0x04 0.--2. " BL ,Burst length" "1,?..." tree.end endif tree "NAND Flash Controller" base ad:0x4e000000 sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) width 12. if (((d.l(ad:0x4e000000))&0x8)==0x0) ; this -> 3. AdvFlash == 0 group.long 0x00++0x3 line.long 0x00 "NFCONF,NAND Flash Configuration Register" bitfld.long 0x00 12.--13. " TACLS ,CLE & ALE duration setting value" "0,1,2,3" bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page" textline " " bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "256 Bytes/page,512 Bytes/page" bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "3 cycle,4 cycle" textline " " bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit" else group.long 0x00++0x3 line.long 0x00 "NFCONF,NAND Flash Configuration Register" bitfld.long 0x00 12.--13. " TACLS ,CLE & ALE duration setting value" "0,1,2,3" bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page" textline " " bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "1024 Bytes/page,2048 Bytes/page" bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "4 cycle,5 cycle" textline " " bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit" endif group.long 0x04++0x27 line.long 0x00 "NFCONT,NAND Flash Control Register" bitfld.long 0x00 13. " LockTight ,Lock-tight configuration" "Disabled,Enabled" bitfld.long 0x00 12. " SoftLock ,Soft lock configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled" bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " RnB_TransMode ,RnB transition detection configuration" "Rising edge,Falling edge" bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Unlocked,Locked" textline " " bitfld.long 0x00 5. " MainECCLock ,Lock Main data area ECC generation" "Unlocked,Locked" bitfld.long 0x00 4. " InitECC ,Initialized spare area ECC decoder/encoder" "No effect,Initialized" textline " " bitfld.long 0x00 1. " Reg_nCE ,NAND flash memory nFCE signal control" "Low,High" bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled" line.long 0x04 "NFCMMD,NAND Flash Command Set Register" hexmask.long.byte 0x04 0.--7. 1. " NFCMMD ,NAND flash memory command value" line.long 0x08 "NFADDR,NAND Flash Address Set Register" hexmask.long.byte 0x08 0.--7. 1. " NFADDR ,NAND flash memory address value" line.long 0x0c "NFDATA,NAND Flash Data Register" hexmask.long 0x0c 0.--31. 1. " NFDATA ,NAND flash read/program data value for I/O" line.long 0x10 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read" hexmask.long.byte 0x10 24.--31. 1. " ECCData1_1 ,2nd ECC for I/O[15:8]" hexmask.long.byte 0x10 16.--23. 1. " ECCData1_0 ,2nd ECC for I/O[7:0]" textline " " hexmask.long.byte 0x10 8.--15. 1. " ECCData0_1 ,1st ECC for I/O[15:8]" hexmask.long.byte 0x10 0.--7. 1. " ECCData0_0 ,1st ECC for I/O[7:0]" line.long 0x14 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read" hexmask.long.byte 0x14 24.--31. 1. " ECCData3_1 ,4th ECC for I/O[15:8]" hexmask.long.byte 0x14 16.--23. 1. " ECCData3_0 ,4th ECC for I/O[7:0]" textline " " hexmask.long.byte 0x14 8.--15. 1. " ECCData2_1 ,3rd ECC for I/O[15:8]" hexmask.long.byte 0x14 0.--7. 1. " ECCData2_0 ,3rd ECC for I/O[7:0]" line.long 0x18 "NFSECCD,NAND Flash ECC Register For Spare Area Data Data Read" hexmask.long.byte 0x18 24.--31. 1. " ECCData1_1 ,2nd ECC for I/O[15:8]" hexmask.long.byte 0x18 16.--23. 1. " ECCData1_0 ,2nd ECC for I/O[7:0]" textline " " hexmask.long.byte 0x18 8.--15. 1. " ECCData0_1 ,1st ECC for I/O[15:8]" hexmask.long.byte 0x18 0.--7. 1. " ECCData0_0 ,1st ECC for I/O[7:0]" line.long 0x1c "NFSTAT,NAND Flash Operation Status Register" bitfld.long 0x1c 3. " IllegalAccess ,The illegal access" "Not detected,Detected" bitfld.long 0x1c 2. " RnB_TransDetect ,RnB low to high transition" "Not detected,Detected" textline " " bitfld.long 0x1c 1. " nCE ,nCE output status" "Low,High" bitfld.long 0x1c 0. " RnB ,RnB input status" "Busy,Ready" line.long 0x20 "NFESTAT0,NAND Flash ECC Status For I/O [7:0] Register" bitfld.long 0x20 21.--24. " SErrorDataNo ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 18.--20. " SErrorBitNo ,Number of error bit in spare area" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x20 7.--17. 1. " MErrorDataNo ,Number of error data in main area" bitfld.long 0x20 4.--6. " MErrorBitNo ,Number of error bit in data area" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x20 2.--3. " SpareError ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area" bitfld.long 0x20 0.--1. " MainError ,Main area data fail error occurred" "No error,1-bit,Multiple,Area" line.long 0x24 "NFESTAT1,NAND Flash ECC Status For I/O [7:0] Register" bitfld.long 0x24 21.--24. " SErrorDataNo ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 18.--20. " SErrorBitNo ,Number of error bit in spare area" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x24 7.--17. 1. " MErrorDataNo ,Number of error data in main area" bitfld.long 0x24 4.--6. " MErrorBitNo ,Number of error bit in data area" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x24 2.--3. " SpareError ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area" bitfld.long 0x24 0.--1. " MainError ,Main area data fail error occurred" "No error,1-bit,Multiple,Area" rgroup.long 0x2c++0xb line.long 0x00 "NFMECC0,SLC NAND Flash ECC Status Register 0" hexmask.long.byte 0x00 24.--31. 1. " MECC0_3 ,ECC3 for data[7:0]" hexmask.long.byte 0x00 16.--23. 1. " MECC0_2 ,ECC2 for data[7:0]" textline " " hexmask.long.byte 0x00 8.--15. 1. " MECC0_1 ,ECC1 for data[7:0]" hexmask.long.byte 0x00 0.--7. 1. " MECC0_0 ,ECC0 for data[7:0]" line.long 0x04 "NFMECC1,SLC NAND Flash ECC Status Register 1" hexmask.long.byte 0x04 24.--31. 1. " MECC1_3 ,ECC3 for data[15:8]" hexmask.long.byte 0x04 16.--23. 1. " MECC1_2 ,ECC2 for data[15:8]" textline " " hexmask.long.byte 0x04 8.--15. 1. " MECC1_1 ,ECC1 for data[15:8]" hexmask.long.byte 0x04 0.--7. 1. " MECC1_0 ,ECC0 for data[15:8]" line.long 0x08 "NFSECC,NAND Flash ECC Register For I/O[15:0]" hexmask.long.byte 0x08 24.--31. 1. " SECC1_1 ,Spare area ECC1 status for I/O[15:8]" hexmask.long.byte 0x08 16.--23. 1. " SECC1_0 ,Spare area ECC0 status for I/O[15:8]" textline " " hexmask.long.byte 0x08 8.--15. 1. " SECC0_1 ,Spare area ECC1 status for I/O[7:0]" hexmask.long.byte 0x08 0.--7. 1. " SECC0_0 ,Spare area ECC0 status for I/O[7:0]" group.long 0x38++0x7 line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address" hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of the block erase operation" hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of the block erase operation" textline " " hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of the block erase operation" line.long 0x04 "NFEBLK,NAND Flash Programmable End Block Address" hexmask.long.byte 0x04 16.--23. 1. " EBLK_ADDR2 ,3rd block address of the block erase operation" hexmask.long.byte 0x04 8.--15. 1. " EBLK_ADDR1 ,2nd block address of the block erase operation" textline " " hexmask.long.byte 0x04 0.--7. 1. " EBLK_ADDR0 ,1st block address of the block erase operation" width 0xb endif sif (cpu()=="S3C2443X") width 12. if (((d.l(ad:0x4e000000))&0x8)==0x0) ; this -> 3. AdvFlash == 0 group.long 0x00++0x3 line.long 0x00 "NFCONF,NAND Flash Configuration Register" bitfld.long 0x00 31. " NANDBoot ,Shows Whether NAND Boot Or Not" "Not boot,Boot" bitfld.long 0x00 24. " ECCType ,ECC Type Selection" "SLC,MLC" textline " " bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page" textline " " bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "256 Bytes/page,512 Bytes/page" textline " " bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "3 cycle,4 cycle" bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit" else group.long 0x00++0x3 line.long 0x00 "NFCONF,NAND Flash Configuration Register" bitfld.long 0x00 31. " NANDBoot ,Shows Whether NAND Boot Or Not" "Not boot,Boot" bitfld.long 0x00 24. " ECCType ,ECC Type Selection" "SLC,MLC" textline " " bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page" textline " " bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "1024 Bytes/page,2048 Bytes/page" bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "4 cycle,5 cycle" textline " " bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit" endif group.long 0x04++0xF line.long 0x00 "NFCONT,NAND Flash Control Register" bitfld.long 0x00 18. " ECCDirection ,4-bit ECC encoding/decoding control" "Decoding,Encoding" bitfld.long 0x00 17. " LockTight ,Lock-tight configuration" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " SoftLock ,Soft lock configuration" "Disabled,Enabled" bitfld.long 0x00 13. " EnbECCEncINT ,4-bit ECC encoding completion interrupt control" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " EnbECCDecINT ,4-bit ECC decoding completion interrupt control" "Disabled,Enabled" bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled" bitfld.long 0x00 8. " RnB_TransMode ,RnB transition detection configuration" "Rising edge,Falling edge" textline " " bitfld.long 0x00 7. " MainECCLock ,Lock Main area ECC generation" "Unlocked,Locked" bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Unlocked,Locked" textline " " bitfld.long 0x00 5. " InitMECC ,Initialized main area ECC decoder/encoder" "No effect,Initialized" bitfld.long 0x00 4. " InitSECC ,Initialized spare area ECC decoder/encoder" "No effect,Initialized" textline " " bitfld.long 0x00 2. " Reg_nCE1 ,NAND flash memory nRCS signal control" "Low,High" bitfld.long 0x00 1. " Reg_nCE0 ,NAND flash memory nFCE signal control" "Low,High" textline " " bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled" line.long 0x04 "NFCMMD,NAND Flash Command Set Register" hexmask.long.byte 0x04 0.--7. 1. " NFCMMD ,NAND flash memory command value" line.long 0x08 "NFADDR,NAND Flash Address Set Register" hexmask.long.byte 0x08 0.--7. 1. " NFADDR ,NAND flash memory address value" line.long 0x0c "NFDATA,NAND Flash Data Register" if (((d.l(ad:0x4e000000))&0x1)==0x1) ; NAND Flash Configuration Register (NFCONF) -> 0. BusWidth == 1 (16-bit) group.long 0x14++0xb line.long 0x00 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read" hexmask.long.byte 0x00 24.--31. 1. " ECCData1_1 ,2nd ECC for I/O[15:8]" hexmask.long.byte 0x00 16.--23. 1. " ECCData1_0 ,2nd ECC for I/O[7:0]" textline " " hexmask.long.byte 0x00 8.--15. 1. " ECCData0_1 ,1st ECC for I/O[15:8]" hexmask.long.byte 0x00 0.--7. 1. " ECCData0_0 ,1st ECC for I/O[7:0]" line.long 0x04 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read" hexmask.long.byte 0x04 24.--31. 1. " ECCData3_1 ,4th ECC for I/O[15:8]" hexmask.long.byte 0x04 16.--23. 1. " ECCData3_0 ,4th ECC for I/O[7:0]" textline " " hexmask.long.byte 0x04 8.--15. 1. " ECCData2_1 ,3rd ECC for I/O[15:8]" hexmask.long.byte 0x04 0.--7. 1. " ECCData2_0 ,3rd ECC for I/O[7:0]" line.long 0x08 "NFSECCD,NAND Flash ECC Register For Spare Area Data Read" hexmask.long.byte 0x08 24.--31. 1. " ECCData1_1 ,2nd ECC for I/O[15:8]" hexmask.long.byte 0x08 16.--23. 1. " ECCData1_0 ,2nd ECC for I/O[7:0]" textline " " hexmask.long.byte 0x08 8.--15. 1. " ECCData0_1 ,1st ECC for I/O[15:8]" hexmask.long.byte 0x08 0.--7. 1. " ECCData0_0 ,1st ECC for I/O[7:0]" else group.long 0x14++0xb line.long 0x00 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read" hexmask.long.byte 0x00 16.--23. 1. " ECCData1 , ECC1 for I/O [7:0]" hexmask.long.byte 0x00 0.--7. 1. " ECCData0 , ECC0 for I/O [7:0]" line.long 0x04 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read" hexmask.long.byte 0x04 16.--23. 1. " ECCData3 , ECC3 for I/O [7:0]" hexmask.long.byte 0x04 0.--7. 1. " ECCData2 , ECC2 for I/O [7:0]" line.long 0x08 "NFSECCD,NAND Flash ECC Register For Spare Area Data Read" hexmask.long.byte 0x08 16.--23. 1. " ECCData1 ,2nd Spare area ECC for I/O[7:0]" hexmask.long.byte 0x08 0.--7. 1. " ECCData0 ,1st Spare area ECC for I/O[7:0]" endif group.long 0x20++0xb line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address" hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of the block erase operation" hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of the block erase operation" textline " " hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of the block erase operation" line.long 0x04 "NFEBLK,NAND Flash Programmable End Block Address" hexmask.long.byte 0x04 16.--23. 1. " EBLK_ADDR2 ,3rd block address of the block erase operation" hexmask.long.byte 0x04 8.--15. 1. " EBLK_ADDR1 ,2nd block address of the block erase operation" textline " " hexmask.long.byte 0x04 0.--7. 1. " EBLK_ADDR0 ,1st block address of the block erase operation" line.long 0x8 "NFSTAT,NAND Flash Operation Status Register" bitfld.long 0x08 7. " ECCEncDone ,4-bit ECC encodng finish status" "Not completed,Completed" bitfld.long 0x08 6. " ECCDecDone ,4-bit ECC decodng finish status" "Not completed,Completed" textline " " bitfld.long 0x08 5. " IllegalAccess ,The illegal access" "Not detected,Detected" bitfld.long 0x08 4. " RnB_TransDetect ,RnB low to high transition" "Not detected,Detected" textline " " bitfld.long 0x08 3. " nCE ,nCE output status" "Low,High" bitfld.long 0x08 2. " nFCE ,nFCE output status" "Low,High" textline " " bitfld.long 0x08 0. " RnB ,RnB input status" "Busy,Ready" if (((d.l(ad:0x4e000000))&0x1000000)==0x0000000) ; NAND Flash Configuration Register (NFCONF) -> 24. ECC Type Selection == 0 (SLC) rgroup.long 0x2C++0xF line.long 0x00 "NFESTAT0,NAND Flash ECC Error Status register for I/O [7:0]" bitfld.long 0x00 21.--24. " SerrorDataNo ,In spare area, Indicates which number data is error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18.--20. " SerrorBitNo ,In spare area, Indicates which bit is error" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 7.--17. 1. " MErrorDataNo ,In main data area, Indicates which number data is error" bitfld.long 0x00 4.--6. " MErrorBitNo ,In main data area, Indicates which bit is error" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 2.--3. " SpareError ,Indicates whether spare area bit fail error occurred" "No error,1-bit error,Multiple error,ECC area error" bitfld.long 0x00 0.--1. " MainError ,Indicates whether main data area bit fail error occurred" "No error,1-bit error,Multiple error,ECC area error" line.long 0x04 "NFESTAT1,NAND Flash ECC Error Status register for I/O [15:8]" bitfld.long 0x04 21.--24. " SerrorDataNo ,In spare area, Indicates which number data is error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 18.--20. " SerrorBitNo ,In spare area, Indicates which bit is error" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x04 7.--17. 1. " MErrorDataNo ,In main data area, Indicates which number data is error" bitfld.long 0x04 4.--6. " MErrorBitNo ,In main data area, Indicates which bit is error" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 2.--3. " SpareError ,Indicates whether spare area bit fail error occurred" "No error,1-bit error,Multiple error,ECC area error" bitfld.long 0x04 0.--1. " MainError ,Indicates whether main data area bit fail error occurred" "No error,1-bit error,Multiple error,ECC area error" line.long 0x08 "NFMECC0,SLC NAND Flash ECC Status Register 0" hexmask.long.byte 0x08 24.--31. 1. " MECC0_3 ,ECC3 for data[7:0]" hexmask.long.byte 0x08 16.--23. 1. " MECC0_2 ,ECC2 for data[7:0]" textline " " hexmask.long.byte 0x08 8.--15. 1. " MECC0_1 ,ECC1 for data[7:0]" hexmask.long.byte 0x08 0.--7. 1. " MECC0_0 ,ECC0 for data[7:0]" line.long 0x0c "NFMECC1,SLC NAND Flash ECC Status Register 1" hexmask.long.byte 0x0c 24.--31. 1. " MECC1_3 ,ECC3 for data[15:8]" hexmask.long.byte 0x0c 16.--23. 1. " MECC1_2 ,ECC2 for data[15:8]" textline " " hexmask.long.byte 0x0c 8.--15. 1. " MECC1_1 ,ECC1 for data[15:8]" hexmask.long.byte 0x0c 0.--7. 1. " MECC1_0 ,ECC0 for data[15:8]" else rgroup.long 0x2C++0xf line.long 0x00 "NFESTAT0,NAND Flash ECC Error Status register for I/O [7:0]" bitfld.long 0x00 31. " ECC_Busy ,Indicates the 4-bit ECC decoding engine is searching whether a error exists or not" "Idle,Busy" bitfld.long 0x00 30. " ECC_Ready ,ECC Ready bit" "Not ready,Ready" textline " " bitfld.long 0x00 29. " Free_Page ,Inidicates the page data red from NAND flash has all FF value" "Not all,All" bitfld.long 0x00 26.--28. " MLC_MECC_Error ,4-bit ECC decoding result" "No error,1-bit error,2-bit error,3-bit error,4-bit error,Uncorrectable,?..." textline " " hexmask.long.word 0x00 16.--25. 1. " 2Bit_ErrorLocation ,Error byte location of 2nd bit error" hexmask.long.word 0x00 0.--9. 1. " 1Bit_ErrorLocation ,Error byte location of 1st bit error" line.long 0x04 "NFESTAT1,NAND Flash ECC Error Status register for I/O [15:8]" hexmask.long.word 0x04 16.--25. 1. " 4Bit_ErrorLocation ,Error byte location of 4th bit error" hexmask.long.word 0x04 0.--9. 1. " 3Bit_ErrorLocation ,Error byte location of 3rd bit error" line.long 0x08 "NFMECC0,SLC NAND Flash ECC Status Register 0" hexmask.long.byte 0x08 24.--31. 1. "4thParity ,Check 4th Parity generated from main area" hexmask.long.byte 0x08 16.--23. 1. "3rdParity ,Check 3rd Parity generated from main area" textline " " hexmask.long.byte 0x08 8.--15. 1. "2ndParity ,Check 2nd Parity generated from main area" hexmask.long.byte 0x08 0.--7. 1. "1stParity ,Check 1st Parity generated from main area" line.long 0x0c "NFMECC1,SLC NAND Flash ECC Status Register 1" hexmask.long.byte 0x0c 16.--23. 1. "7thParity ,Check 7th Parity generated from main area (512-byte)" hexmask.long.byte 0x0c 8.--15. 1. "6thParity ,Check 6th Parity generated from main area (512-byte)" textline " " hexmask.long.byte 0x0c 0.--7. 1. "5thParity ,Check 5th Parity generated from main area (512-byte)" endif rgroup.long 0x3C++0x7 line.long 0x00 "NFSECC,NAND Flash ECC Register For I/O[15:0]" hexmask.long.byte 0x00 24.--31. 1. " SECC1_1 ,Spare area ECC1 status for I/O[15:8]" hexmask.long.byte 0x00 16.--23. 1. " SECC1_0 ,Spare area ECC0 status for I/O[15:8]" textline " " hexmask.long.byte 0x00 8.--15. 1. " SECC0_1 ,Spare area ECC1 status for I/O[7:0]" hexmask.long.byte 0x00 0.--7. 1. " SECC0_0 ,Spare area ECC0 status for I/O[7:0]" line.long 0x04 "NFMLCBITPT,NAND Flash 4-bit ECC Error Pattern register for data[7:0]" hexmask.long.byte 0x04 24.--31. 1. " 4thErrorBitPattern ,4th Error bit pattern" hexmask.long.byte 0x04 16.--23. 1. " 3rdErrorBitPattern ,3rd Error bit pattern" textline " " hexmask.long.byte 0x04 8.--15. 1. " 2ndErrorBitPattern ,2nd Error bit pattern" hexmask.long.byte 0x04 0.--7. 1. " 1stErrorBitPattern ,1st Error bit pattern" width 0xb endif tree.end sif (cpu()=="S3C2443X") tree "CF Controller (CFC)" base ad:0x4B801800 width 16. group.long 0x00++0x3 "CF Card Host Controller Registers" line.long 0x00 "MUX_REG,Set The Internal Mode" bitfld.long 0x00 2. " OUTPUT_EN ,Output port enable" "Enabled,Disabled" bitfld.long 0x00 1. " CARDPWR_EN ,Card power supply enable" "On,Off" textline " " bitfld.long 0x00 0. " IDE_MODE ,Internal operation mode select" "PC card,True-IDE" group.long 0x20++0x13 line.long 0x00 "PCCARD_CFG,PCCard Configuration And Status Register" bitfld.long 0x00 13. " CARD_RESET ,CF card reset in PC card mode" "No reset,Reset" bitfld.long 0x00 12. " INT_SEL ,Card interrupt request type select" "Edge triggering,Level triggering" textline " " bitfld.long 0x00 11. " nWAIT_EN ,nWAIT from CF card enable" "Disabled,Enabled" bitfld.long 0x00 10. " DEVICE_ATT ,Device type is 16bits or 8bits (Attribute memory area)" "8-bit,16-bit" textline " " bitfld.long 0x00 9. " DEVICE_COMM ,Device type is 16bits or 8bits (Common memory area)" "8-bit,16-bit" bitfld.long 0x00 8. " DEVICE_IO ,Device type is 16bits or 8bits (I/O area)" "8-bit,16-bit" textline " " bitfld.long 0x00 3. " NOCARD_ERR ,No card operation" "No error,Error" bitfld.long 0x00 2. " nWAIT ,nWAIT from CF card" "Wait,Redy" textline " " bitfld.long 0x00 1. " nIREQ ,Interrupt request from CF card" "Interrupt,No interrupt" bitfld.long 0x00 0. " nCD ,Card detect" "Detected,Not detected" line.long 0x04 "PCCARD_INT,Interrupt Source & Interrupt Mask Register" bitfld.long 0x04 10. " INTMSK_ERR_N ,Interrupt mask bit of no card error" "Unmasked,Masked" bitfld.long 0x04 9. " INTMSK_IREQ ,Interrupt mask bit of CF card interrupt request" "Unmasked,Masked" textline " " bitfld.long 0x04 8. " INTMSK_CD ,Interrupt mask bit of CF card detect" "Unmasked,Masked" bitfld.long 0x04 2. " INTSRC_ERR_N ,When host access no card in slot" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTSRC_IREQ ,When CF card interrupt request" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTSRC_CD ,When CF card is detected in slot" "No interrupt,Interrupt" line.long 0x08 "PCCARD_ATTR,Set The Card Access Timing" hexmask.long.byte 0x08 16.--22. 1. " HOLD_ATTR ,Hold state timing of attribute memory area" hexmask.long.byte 0x08 8.--14. 1. " CMND_ATTR ,Command state timing of attribute memory area" textline " " hexmask.long.byte 0x08 0.--6. 1. " SETUP_ATTR ,Setup state timing of attribute memory area" line.long 0x0C "PCCARD_I/O,Set The Card Access Timing" hexmask.long.byte 0x0C 16.--22. 1. " HOLD_IO ,Hold state timing of I/O area" hexmask.long.byte 0x0C 8.--14. 1. " CMND_IO ,Command state timing of I/O area" textline " " hexmask.long.byte 0x0C 0.--6. 1. " SETUP_IO ,Setup state timing of I/O area" line.long 0x10 "PCCARD_COMM,Set The Card Access Timing" hexmask.long.byte 0x10 16.--22. 1. " HOLD_COMM ,Hold state timing of common memory area" hexmask.long.byte 0x10 8.--14. 1. " CMND_COMM ,Command state timing of common memory area" textline " " hexmask.long.byte 0x10 0.--6. 1. " SETUP_COMM ,Setup state timing of common memory area" group.long 0x100++0x3 "ATA Controller Registers" line.long 0x00 "ATA_CONTROL,ATA Control register" bitfld.long 0x00 1. " clk_down_ready ,Status for clock down" "Not ready,Ready" bitfld.long 0x00 0. " ata_enable ,ATA enable" "Disabled,Enabled" rgroup.long 0x104++0x3 line.long 0x00 "ATA_STATUS,ATA Status Register" bitfld.long 0x00 5. " atadev_cblid ,ATA cable identification" "Low,High" bitfld.long 0x00 4. " atadev_irq ,ATA interrupt signal line" "Low,High" textline " " bitfld.long 0x00 3. " atadev_iordy ,ATA iordy signal line" "Low,High" bitfld.long 0x00 2. " atadev_dmareq ,ATA dmareq signal line" "Low,High" textline " " bitfld.long 0x00 0.--1. " xfr_state ,Transfer state" "Idle,Transfer,Reserved,Wait" group.long 0x108++0x13 line.long 0x00 "ATA_COMMAND,ATA Command Register" bitfld.long 0x00 0.--1. " xfr_command ,ATA transfer command" "Stop,Start,Abort,Continue" line.long 0x04 "ATA_SWRST,ATA S/W RESET Register" bitfld.long 0x04 0. " ata_swrstn ,Software reset for the ATA host" "No reset,Reset" line.long 0x08 "ATA_IRQ,ATA IRQ Register" bitfld.long 0x08 4. " sbuf_empty_int ,Source buffer empty" "No interrupt,Interrupt" textline " " bitfld.long 0x08 3. " tbuf_full_int ,Track buffer half full" "No interrupt,Interrupt" textline " " bitfld.long 0x08 2. " atadev_irq_int ,ATA device interrupt" "No interrupt,Interrupt" textline " " sif (cpu()!="S3C2450") bitfld.long 0x08 1. " udma_hold_int ,ATA device early termination in UDMA" "No interrupt,Interrupt" textline " " endif bitfld.long 0x08 0. " xfr_done_int ,All data transfers finished" "No interrupt,Interrupt" line.long 0x0C "ATA_IRQ_MASK,ATA IRQ MASK Register" bitfld.long 0x0C 4. " mask_sbut_empty_int ,Interrupt mask bit of source buffer empty " "Unmasked,Masked" textline " " bitfld.long 0x0C 3. " mask_tbuf_full_int ,Interrupt mask bit of target buffer full " "Unmasked,Masked" textline " " bitfld.long 0x0C 2. " mask_atadev_irq_int ,Interrupt mask bit of ATA device interrupt request " "Unmasked,Masked" sif (cpu()!="S3C2450") textline " " bitfld.long 0x0C 1. " mask_udma_hold_int ,Interrupt mask bit of UDMA hold " "Unmasked,Masked" endif textline " " bitfld.long 0x0C 0. " mask_xfr_done_int ,Interrupt mask bit of xfr done " "Unmasked,Masked" line.long 0x10 "ATA_CFG,ATA Configuration Register" sif (cpu()=="S3C2450") bitfld.long 0x10 8. " sbuf_empty_mode ,Continue automatically when source buffer is empty" "Continue,Stay" else bitfld.long 0x10 9. " udma_auto_mode ,Continue automatically in case of early termination in UDMA mode by Device" "Stay,Continue" textline " " bitfld.long 0x10 8. " sbuf_empty_mode ,Continue automatically when source buffer is empty" "Continue,Stay" endif textline " " bitfld.long 0x10 7. " tbuf_full_mode ,Continue automatically when track buffer is full" "Continue,Stay" textline " " bitfld.long 0x10 6. " byte_swap ,Determines whether data endian is little or big in 16bit data" "Little endian,Big endian" textline " " bitfld.long 0x10 5. " atadev_irq_al ,Device interrupt signal level" "High,Low" textline " " bitfld.long 0x10 4. " dma_dir ,DMA transfer direction" "Read,Write" textline " " sif (cpu()=="S3C2450") bitfld.long 0x10 2.--3. " ata_class ,ATA transfer class select" "PIO,PIO DMA,?..." else bitfld.long 0x10 2.--3. " ata_class ,ATA transfer class select" "PIO,PIO DMA,UDMA,UDMA" endif textline " " bitfld.long 0x10 1. " ata_iordy_en ,Determines whether IORDY input can extend data transfer" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " ata_rst ,ATA device reset by this host" "No reset,Reset" group.long 0x12C++0x27 line.long 0x00 "ATA_PIO_TIME,ATA PIO Timing Control Register" hexmask.long.byte 0x00 12.--19. 1. " pio_teoc ,PIO timing parameter [HCLKtime*(pio_teoc + 1)]" textline " " hexmask.long.byte 0x00 4.--11. 1. " pio_t2 ,PIO timing parameter [HCLKtime*(pio_t2 + 1)]" textline " " hexmask.long.byte 0x00 0.--3. 1. " pio_t1 ,PIO timing parameter [HCLKtime*(pio_t1 + 1)]" sif (cpu()!="S3C2450") group.long 0x130++0x03 line.long 0x00 "ATA_UDMA_TIME,ATA UDMA Timing Control Register" bitfld.long 0x00 24.--27. " udma_tdvh ,UDMA timing parameter tDVH" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" hexmask.long.byte 0x00 16.--23. 1. " udma_tdvs ,UDMA timing parameter tDVS" textline " " hexmask.long.byte 0x00 8.--15. 1. " udma_trp ,UDMA timing parameter tRP" bitfld.long 0x00 4.--7. " udma_tss ,UDMA timing parameter tSS" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " bitfld.long 0x00 0.--3. " udma_tackenv ,UDMA timing parameter tENV (envelope time)" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" endif group.long 0x134++0x1f line.long 0x00 "ATA_XFR_NUM,ATA Data Transfer Number Register" hexmask.long 0x00 1.--31. 0x2 " xfr_num ,Data transfer number" line.long 0x04 "ATA_XFR_CNT,ATA Data Transfer Counter Register" hexmask.long 0x04 1.--31. 0x2 " xfr_cnt ,Current remaining transfer counter" line.long 0x08 "ATA_TBUF_START,Start Address Of Track Buffer Register" hexmask.long 0x08 2.--31. 0x4 " track_buffer_start ,Start address of track buffer" line.long 0x0c "ATA_TBUF_SIZE,Size Of Track Buffer Register" hexmask.long 0x0c 5.--31. 0x20 " track_buffer_size ,Size of track buffer" line.long 0x10 "ATA_SBUF_START,Start Address Of Source Buffer Register" hexmask.long 0x10 2.--31. 0x4 " src_buffer_start ,Start address of source buffer" line.long 0x14 "ATA_SBUF_SIZE,Size Of Source Buffer Register" hexmask.long 0x14 5.--31. 0x20 " src_buffer_size ,Size of source buffer" line.long 0x18 "ATA_CADR_TBUF,Current Address Of Track Buffer" hexmask.long 0x18 2.--31. 0x4 " track_buf_cur_adr ,Current address of track buffer" line.long 0x1c "ATA_CADDR_SBUF,Current Address Of Source Buffer" hexmask.long 0x1c 2.--31. 0x4 " src_buf_cur_adr ,Current address of source buffer" wgroup.long 0x154++0x23 line.long 0x00 "ATA_PIO_DTR,16bit PIO Data Register" hexmask.long.word 0x00 0.--15. 1. " pio_dev_dtr ,16-bit PIO data register" line.long 0x04 "ATA_PIO_FED,8bit PIO Device Feature/Error Register" hexmask.long.byte 0x04 0.--7. 1. " pio_dev_fed ,8-bit PIO device feature/error register" line.long 0x08 "ATA_PIO_SCR,8-bit PIO Device Sector Count Register" hexmask.long.byte 0x08 0.--7. 1. " pio_dev_scr ,8-bit PIO device sector count register" line.long 0x0C "ATA_PIO_LLR,8-bit PIO Device LBA Low Register" hexmask.long.byte 0x0C 0.--7. 1. " pio_dev_llr ,8-bit PIO device LBA low register" line.long 0x10 "ATA_PIO_LMR,8-bit PIO Device LBA Middle Register" hexmask.long.byte 0x10 0.--7. 1. " pio_dev_lmr ,8-bit PIO device LBA middle register" line.long 0x14 "ATA_PIO_LHR,8-bit PIO Device LBA High Register" hexmask.long.byte 0x14 0.--7. 1. " pio_dev_lhr ,8-bit PIO device LBA high register" line.long 0x18 "ATA_PIO_DVR,8-bit PIO Device Register" hexmask.long.byte 0x18 0.--7. 1. " pio_dev_dvr ,8-bit PIO device register" line.long 0x1C "ATA_PIO_CSD,8-bit PIO Device Command/Status Register" hexmask.long.byte 0x1C 0.--7. 1. " pio_dev_csd ,8-bit PIO device command/status register" line.long 0x20 "ATA_PIO_DAD,8-bit PIO Device Control/Alternate Register" hexmask.long.byte 0x20 0.--7. 1. " pio_dev_dad ,8-bit PIO device control/alternate register" rgroup.long 0x17C++0x3 line.long 0x00 "ATA_PIO_RDATA,PIO Read Data Register" hexmask.long.word 0x00 0.--15. 1. " pio_rdata ,PIO read data register while HOST read from ATA device register" rgroup.long 0x190++0x7 line.long 0x00 "BUS_FIFO_STATUS,BUS FIFO Status Register" bitfld.long 0x00 16.--18. " bus_state ,Bus state" "Idle,?..." hexmask.long.byte 0x00 8.--13. 1. " bus_fifo_rdpnt ,Bus fifo read pointer" textline " " hexmask.long.byte 0x00 0.--5. 1. " bus_fifo_wrpnt ,Bus fifo write pointer" line.long 0x04 "ATA_FIFO_STATUS,ATA FIFO Status Register" bitfld.long 0x04 28.--30. " ata_state , ATA State" "0,1,2,3,4,5,6,7" bitfld.long 0x04 26.--27. " pio_state , PIO State" "Idle,T1,T2,TEOC" textline " " bitfld.long 0x04 24.--25. " pdma_state ,PUDMA State" "Idle,T1,T2,TEOC" sif (cpu()!="S3C2450") bitfld.long 0x04 16.--20. " udma_state ,UDMA State" "Idle,Reserved,Reserved,Reserved,End,?..." endif width 0xB tree.end endif tree "Clock & Power Management" sif (cpu()=="S3C2440A") base ad:0x4c000000 width 0x0b group.long 0x0000++0xb line.long 0x00 "LOCKTIME,PLL lock time count register" hexmask.long.word 0x00 16.--31. 1. " U_LTIME ,UPLL lock time count value for UCLK" hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL lock time count value for FCLK, HCLK, and PCLK" line.long 0x04 "MPLLCON,MPLL configuration register" hexmask.long.byte 0x04 12.--19. 1. " MDIV ,Main divider control" hexmask.long.byte 0x04 4.--9. 1. " PDIV ,Pre-divider control" hexmask.long.byte 0x04 0.--1. 1. " SDIV ,Post divider control" line.long 0x08 "UPLLCON,UPLL configuration register" hexmask.long.byte 0x08 12.--19. 1. " MDIV ,Main divider control" hexmask.long.byte 0x08 4.--9. 1. " PDIV ,Pre-divider control" hexmask.long.byte 0x08 0.--1. 1. " SDIV ,Post divider control" group.long 0x000c++0x3 line.long 0x00 "CLKCON,Clock generator control register" bitfld.long 0x00 20. " AC97 ,Control PCLK into AC97 block" "Disabled,Enabled" bitfld.long 0x00 19. " CAMERA ,Control HCLK into Camera block" "Disabled,Enabled" bitfld.long 0x00 18. " SPI ,Control PCLK into SPI block" "Disabled,Enabled" bitfld.long 0x00 17. " IIS ,Control PCLK into IIS block" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " IIC ,Control PCLK into IIC block" "Disabled,Enabled" bitfld.long 0x00 15. " ADC ,Control PCLK into ADC block" "Disabled,Enabled" bitfld.long 0x00 14. " RTC ,Control PCLK into RTC block" "Disabled,Enabled" bitfld.long 0x00 13. " GPIO ,Control PCLK into GPIO block" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " UART2 ,Control PCLK into UART2 block" "Disabled,Enabled" bitfld.long 0x00 11. " UART1 ,Control PCLK into UART1 block" "Disabled,Enabled" bitfld.long 0x00 10. " UART0 ,Control PCLK into UART0 block" "Disabled,Enabled" bitfld.long 0x00 9. " SDI ,Control PCLK into SDI block" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " PWMTIMER ,Control HCLK into PWMTIMER block" "Disabled,Enabled" bitfld.long 0x00 7. " USB_DEV ,Control HCLK into USB device block" "Disabled,Enabled" bitfld.long 0x00 6. " USB_HOST ,Control HCLK into USB device block" "Disabled,Enabled" bitfld.long 0x00 5. " LCDC ,Control HCLK into LCDC block" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " NAND ,Control HCLK into NAND Flash Controller block" "Disabled,Enabled" bitfld.long 0x00 3. " SLEEP ,Control SLEEP mode of S3C2440A" "Disabled,Enabled" bitfld.long 0x00 2. " IDLE_BIT ,Enter IDLE mode" "Disabled,Enabled" if (((data.long(ad:0x4c000010))&0x10)==0x10) group.long 0x0010++0x3 line.long 0x00 "CLKSLOW,Slow clock control register" bitfld.long 0x00 7. " UCLK_ON ,UCLK on/off" "On,Off" bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off" bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow" textline " " bitfld.long 0x00 0.--2. " SLOW_VAL ,Divider value for the slow clock" "0,1,2,3,4,5,6,7" else group.long 0x0010++0x3 line.long 0x00 "CLKSLOW,Slow clock control register" bitfld.long 0x00 7. " UCLK_ON ,UCLK on/off" "On,Off" bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off" bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow" endif if (((data.long(ad:0x4c000018))&0x300)==0x300) ; CAMDIVN -> [9] HCLK4_HALF == 1 FCLK/8 AND&& CAMDIVN -> [8] HCLK3_HALF == 1 FCLK/6 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/8,FCLK/6" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" elif (((data.long(ad:0x4c000018))&0x300)==0x200) ; CAMDIVN -> [9] HCLK4_HALF == 1 FCLK/8 AND&& CAMDIVN -> [8] HCLK3_HALF == 0 FCLK/3 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/8,FCLK/3" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" elif (((data.long(ad:0x4c000018))&0x300)==0x100) ; CAMDIVN -> [9] HCLK4_HALF == 0 FCLK/4 AND&& CAMDIVN -> [8] HCLK3_HALF == 1 FCLK/6 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/4,FCLK/6" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" else group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/4,FCLK/3" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" endif group.long 0x0018++0x3 line.long 0x00 "CAMDIVN,Camera clock divider register" bitfld.long 0x00 12. " DVS_EN ,DVS on/off" "Off,On" bitfld.long 0x00 9. " HCLK4_HALF ,HDIVN division rate change" "FCLK/4,FCLK/8" bitfld.long 0x00 8. " HCLK3_HALF ,HDIVN division rate change" "FCLK/3,FCLK/6" bitfld.long 0x00 4. " CAMCLK_SEL ,CAMCLK select" "UPLL,CAMCLK_DIV" textline " " bitfld.long 0x00 0.--3. " CAMCLK_DIV ,CAMCLK divide factor setting register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0x0b endif sif (cpu()=="S3C2442B") base ad:0x4c000000 width 0x0b group.long 0x0000++0xb line.long 0x00 "LOCKTIME,PLL lock time count register" hexmask.long.word 0x00 16.--31. 1. " U_LTIME ,UPLL lock time count value for UCLK" hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL lock time count value for FCLK, HCLK, and PCLK" line.long 0x04 "MPLLCON,MPLL configuration register" hexmask.long.byte 0x04 12.--19. 1. " MDIV ,Main divider control" hexmask.long.byte 0x04 4.--9. 1. " PDIV ,Pre-divider control" hexmask.long.byte 0x04 0.--1. 1. " SDIV ,Post divider control" line.long 0x08 "UPLLCON,UPLL configuration register" hexmask.long.byte 0x08 12.--19. 1. " MDIV ,Main divider control" hexmask.long.byte 0x08 4.--9. 1. " PDIV ,Pre-divider control" hexmask.long.byte 0x08 0.--1. 1. " SDIV ,Post divider control" group.long 0x000c++0x3 line.long 0x00 "CLKCON,Clock generator control register" bitfld.long 0x00 19. " CAMERA ,Control HCLK into Camera block" "Disabled,Enabled" bitfld.long 0x00 18. " SPI ,Control PCLK into SPI block" "Disabled,Enabled" bitfld.long 0x00 17. " IIS ,Control PCLK into IIS block" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " IIC ,Control PCLK into IIC block" "Disabled,Enabled" bitfld.long 0x00 15. " ADC ,Control PCLK into ADC block" "Disabled,Enabled" bitfld.long 0x00 14. " RTC ,Control PCLK into RTC block" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " GPIO ,Control PCLK into GPIO block" "Disabled,Enabled" bitfld.long 0x00 12. " UART2 ,Control PCLK into UART2 block" "Disabled,Enabled" bitfld.long 0x00 11. " UART1 ,Control PCLK into UART1 block" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " UART0 ,Control PCLK into UART0 block" "Disabled,Enabled" bitfld.long 0x00 9. " SDI ,Control PCLK into SDI block" "Disabled,Enabled" bitfld.long 0x00 8. " PWMTIMER ,Control HCLK into PWMTIMER block" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " USB_DEV ,Control HCLK into USB device block" "Disabled,Enabled" bitfld.long 0x00 6. " USB_HOST ,Control HCLK into USB device block" "Disabled,Enabled" bitfld.long 0x00 5. " LCDC ,Control HCLK into LCDC block" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " NAND ,Control HCLK into NAND Flash Controller block" "Disabled,Enabled" bitfld.long 0x00 3. " SLEEP ,Control SLEEP mode of S3C2442B" "Disabled,Enabled" bitfld.long 0x00 2. " IDLE_BIT ,Enter IDLE mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " STOP ,Control STOP mode of S3C2442B" "Disabled,Enabled" if (((data.long(ad:0x4c000010))&0x10)==0x10) group.long 0x0010++0x3 line.long 0x00 "CLKSLOW,Slow clock control register" bitfld.long 0x00 7. " UCLK_ON ,UCLK on/off" "On,Off" bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off" bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow" textline " " bitfld.long 0x00 0.--2. " SLOW_VAL ,Divider value for the slow clock" "0,1,2,3,4,5,6,7" else group.long 0x0010++0x3 line.long 0x00 "CLKSLOW,Slow clock control register" bitfld.long 0x00 7. " UCLK_ON ,UCLK on/off" "On,Off" bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off" bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow" endif if (((data.long(ad:0x4c000018))&0x300)==0x300) ; CAMDIVN -> [9] HCLK4_HALF == 1 FCLK/8 AND&& CAMDIVN -> [8] HCLK3_HALF == 1 FCLK/6 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/8,FCLK/6" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" elif (((data.long(ad:0x4c000018))&0x300)==0x200) ; CAMDIVN -> [9] HCLK4_HALF == 1 FCLK/8 AND&& CAMDIVN -> [8] HCLK3_HALF == 0 FCLK/3 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/8,FCLK/3" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" elif (((data.long(ad:0x4c000018))&0x300)==0x100) ; CAMDIVN -> [9] HCLK4_HALF == 0 FCLK/4 AND&& CAMDIVN -> [8] HCLK3_HALF == 1 FCLK/6 group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/4,FCLK/6" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" else group.long 0x0014++0x3 line.long 0x00 "CLKDIVN,Clock divider control register" bitfld.long 0x00 3. " DIVN_UPLL ,UCLK divider" "UPLL,UPLL/2" bitfld.long 0x00 1.--2. " HDIVN ,HCLK divider" "FCLK,FCLK/2,FCLK/4,FCLK/3" bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2" endif if (((data.long(ad:0x4c00000c))&0x01)==0x01) ; CLKCON[0] == 1 group.long 0x0018++0x3 line.long 0x00 "CAMDIVN,Camera clock divider register" bitfld.long 0x00 16. " DeepSTOP_EN ,DeepSTOP on/off" "Off,On" bitfld.long 0x00 12. " DVS_EN ,DVS on/off" "Off,On" bitfld.long 0x00 9. " HCLK4_HALF ,HDIVN division rate change" "FCLK/4,FCLK/8" textline " " bitfld.long 0x00 8. " HCLK3_HALF ,HDIVN division rate change" "FCLK/3,FCLK/6" bitfld.long 0x00 5. " CAM3CK_SEL ,CAM3CK select" "CAMCLK_DIV,UPLL/3" bitfld.long 0x00 4. " CAMCLK_SEL ,CAMCLK select" "UPLL,CAMCLK_DIV" textline " " bitfld.long 0x00 0.--3. " CAMCLK_DIV ,CAMCLK divide factor setting register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.long 0x0018++0x3 line.long 0x00 "CAMDIVN,Camera clock divider register" bitfld.long 0x00 12. " DVS_EN ,DVS on/off" "Off,On" bitfld.long 0x00 9. " HCLK4_HALF ,HDIVN division rate change" "FCLK/4,FCLK/8" textline " " bitfld.long 0x00 8. " HCLK3_HALF ,HDIVN division rate change" "FCLK/3,FCLK/6" bitfld.long 0x00 5. " CAM3CK_SEL ,CAM3CK select" "CAMCLK_DIV,UPLL/3" bitfld.long 0x00 4. " CAMCLK_SEL ,CAMCLK select" "UPLL,CAMCLK_DIV" textline " " bitfld.long 0x00 0.--3. " CAMCLK_DIV ,CAMCLK divide factor setting register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif width 0x0b endif tree.end tree.open "DMAC (DMA Controller)" tree "DMA Channel 0" base ad:0x4b000000 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC0,DMA 0 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC0,DMA 0 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST0,DMA 0 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC0,DMA 0 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000000+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON0,DMA 0 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,I2SSDO,PCMIN,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON0,DMA 0 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000000+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON0,DMA 0 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON0,DMA 0 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON0,DMA 0 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT0,DMA 0 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC0,DMA 0 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA0" line.long 0x08 "DCDST0,DMA 0 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA0" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG0,DMA 0 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000000+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL0,DMA0 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL0,DMA0 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB tree.end tree "DMA Channel 1" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) base ad:0x4b000040 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC1,DMA 1 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC1,DMA 1 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST1,DMA 1 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC1,DMA 1 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000040+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ1,UART1,I2SSDI,SPI,USB dev EP2,PCMOUT,SDI,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000040+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ1,UART1,I2SSDI,SPI,USB dev EP2,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT1,DMA 1 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC1,DMA 1 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA1" line.long 0x08 "DCDST1,DMA 1 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA1" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG1,DMA 1 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000040+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL1,DMA1 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL1,DMA1 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif sif (cpu()=="S3C2443X") base ad:0x4b000100 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC1,DMA 1 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC1,DMA 1 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST1,DMA 1 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC1,DMA 1 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000100+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ1,UART1,I2SSDI,SPI,USB dev EP2,PCMOUT,SDI,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000100+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ1,UART1,I2SSDI,SPI,USB dev EP2,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON1,DMA 1 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT1,DMA 1 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC1,DMA 1 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA1" line.long 0x08 "DCDST1,DMA 1 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA1" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG1,DMA 1 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000100+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL1,DMA1 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL1,DMA1 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif tree.end tree "DMA Channel 2" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) base ad:0x4b000080 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC2,DMA 2 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC2,DMA 2 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST2,DMA 2 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC2,DMA 2 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000080+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "I2SSDO,I2SSDI,SDI,Timer,USB dev EP3,PCMIN,MICIN,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000080+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "I2SSDO,I2SSDI,SDI,Timer,USB dev EP3,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT2,DMA 2 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC2,DMA 2 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA2" line.long 0x08 "DCDST2,DMA 2 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA2" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG2,DMA 2 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000080+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL2,DMA2 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL2,DMA2 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif sif (cpu()=="S3C2443X") base ad:0x4b000200 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC2,DMA 2 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC2,DMA 2 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST2,DMA 2 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC2,DMA 2 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000200+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "I2SSDO,I2SSDI,SDI,Timer,USB dev EP3,PCMIN,MICIN,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000200+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "I2SSDO,I2SSDI,SDI,Timer,USB dev EP3,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON2,DMA 2 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT2,DMA 2 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC2,DMA 2 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA2" line.long 0x08 "DCDST2,DMA 2 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA2" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG2,DMA 2 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000200+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL2,DMA2 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL2,DMA2 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif tree.end tree "DMA Channel 3" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) base ad:0x4b0000c0 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC3,DMA 3 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC3,DMA 3 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST3,DMA 3 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC3,DMA 3 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b0000c0+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,MICIN,PCMOUT,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b0000c0+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT3,DMA 3 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC3,DMA 3 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA3" line.long 0x08 "DCDST3,DMA 3 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA3" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG3,DMA 3 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b0000c0+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL3,DMA3 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL3,DMA3 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif sif (cpu()=="S3C2443X") base ad:0x4b000300 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC3,DMA 3 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC3,DMA 3 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST3,DMA 3 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC3,DMA 3 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000300+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,MICIN,PCMOUT,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000300+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON3,DMA 3 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT3,DMA 3 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC3,DMA 3 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA3" line.long 0x08 "DCDST3,DMA 3 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA3" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG3,DMA 3 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000300+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL3,DMA3 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL3,DMA3 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB endif tree.end sif (cpu()=="S3C2443X") tree "DMA Channel 4" base ad:0x4b000400 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC4,DMA 4 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC4,DMA 4 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST4,DMA 4 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC4,DMA 4 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000400+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON4,DMA 4 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,MICIN,PCMOUT,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON4,DMA 4 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000400+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON4,DMA 4 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON4,DMA 4 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON4,DMA 4 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT4,DMA 4 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC4,DMA 4 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA4" line.long 0x08 "DCDST4,DMA 4 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA4" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG4,DMA 4 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000400+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL4,DMA4 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL4,DMA4 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB tree.end tree "DMA Channel 5" base ad:0x4b000500 width 14. group.long 0x0000++0xf line.long 0x00 "DISRC5,DMA 5 initial source register" hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer" line.long 0x04 "DISRCC5,DMA 5 initial source control register" bitfld.long 0x04 1. " LOC ,Select the location of source" "AHB,APB" bitfld.long 0x04 0. " INC ,Select the address increment" "Increment,Fixed" line.long 0x08 "DIDST5,DMA 5 initial destination register" hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of destination data to transfer" line.long 0x0c "DIDSTC5,DMA 5 initial destination control register" bitfld.long 0x0c 2. " CHK_INT ,Select interrupt occurrence time when auto reload is setting" "TC = 0,Auto-reload" bitfld.long 0x0c 1. " LOC ,Select the location of destination" "AHB,APB" textline " " bitfld.long 0x0c 0. " INC ,Select the address increment" "Increment,Fixed" sif (cpu()=="S3C2440A") if (((data.long(ad:(0x4b000500+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON5,DMA 5 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,MICIN,PCMOUT,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON5,DMA 5 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2442B") if (((data.long(ad:(0x4b000500+0x10)))&0x00800000)==0x00800000) group.long 0x0010++0x3 line.long 0x00 "DCON5,DMA 5 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "UART2,SDI,SPI,Timer,USB dev EP4,?..." textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" else group.long 0x0010++0x3 line.long 0x00 "DCON5,DMA 5 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" textline " " bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware" bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif endif sif (cpu()=="S3C2443X") group.long 0x0010++0x3 line.long 0x00 "DCON5,DMA 5 control register" bitfld.long 0x00 31. " DMD_HS ,Demand/Handshake mode" "Demand,Handshake" bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK" textline " " bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled" bitfld.long 0x00 28. " TSZ ,Transfer size of an atomic transfer" "Unit,Burst" textline " " bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole" bitfld.long 0x00 24. " PADDRFIX ,APB Address fix control" "Increment,Fix" textline " " bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off" bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..." textline " " hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count" endif rgroup.long 0x0014++0xb line.long 0x00 "DSTAT5,DMA 5 count register" bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..." hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count" line.long 0x04 "DCSRC5,DMA 5 current source register" hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA5" line.long 0x08 "DCDST5,DMA 5 currents destination register" hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA5" group.long 0x0020++0x3 line.long 0x00 "DMASKTRIG5,DMA 5 mask trigger register" bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped" bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On" textline " " bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request" sif (cpu()=="S3C2443X") if (((d.l(d:(0x4b000500+0x24)))&0x1)==0x1) group.long 0x24++0x3 line.long 0x00 "DMAREQSEL5,DMA5 Request Selection Register" hexmask.long.byte 0x00 1.--5. 1. " HWSRCSEL ,Select DMA request source for each DMA" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" else group.long 0x24++0x3 line.long 0x00 "DMAREQSEL5,DMA5 Request Selection Register" bitfld.long 0x00 0. " SWHW_SEL ,Select the DMA source (S/W and H/W)" "S/W,H/W" endif endif width 0xB tree.end endif tree.end tree.open "I/O Ports" base ad:0x56000000 tree "Port A" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) width 0xb group.long 0x00++0x7 line.long 0x00 "GPACON,Configure the pins of port A" bitfld.long 0x0 22. " GPA22 ,Pin22 mode" "Output,nFCE" bitfld.long 0x0 21. " GPA21 ,Pin21 mode" "Output,nRSTOUT" bitfld.long 0x0 20. " GPA20 ,Pin20 mode" "Output,nFRE" bitfld.long 0x0 19. " GPA19 ,Pin19 mode" "Output,nFWE" textline " " bitfld.long 0x0 18. " GPA18 ,Pin18 mode" "Output,ALE" bitfld.long 0x0 17. " GPA17 ,Pin17 mode" "Output,CLE" bitfld.long 0x0 16. " GPA16 ,Pin16 mode" "Output,nGCS5" bitfld.long 0x0 15. " GPA15 ,Pin15 mode" "Output,nGCS4" textline " " bitfld.long 0x0 14. " GPA14 ,Pin14 mode" "Output,nGCS3" bitfld.long 0x0 13. " GPA13 ,Pin13 mode" "Output,nGCS2" bitfld.long 0x0 12. " GPA12 ,Pin12 mode" "Output,nGCS1" bitfld.long 0x0 11. " GPA11 ,Pin11 mode" "Output,ADDR26" textline " " bitfld.long 0x0 10. " GPA10 ,Pin10 mode" "Output,ADDR25" bitfld.long 0x0 9. " GPA9 ,Pin9 mode" "Output,ADDR24" bitfld.long 0x0 8. " GPA8 ,Pin8 mode" "Output,ADDR23" bitfld.long 0x0 7. " GPA7 ,Pin7 mode" "Output,ADDR22" textline " " bitfld.long 0x0 6. " GPA6 ,Pin6 mode" "Output,ADDR21" bitfld.long 0x0 5. " GPA5 ,Pin5 mode" "Output,ADDR20" bitfld.long 0x0 4. " GPA4 ,Pin4 mode" "Output,ADDR19" bitfld.long 0x0 3. " GPA3 ,Pin3 mode" "Output,ADDR18" textline " " bitfld.long 0x0 2. " GPA2 ,Pin2 mode" "Output,ADDR17" bitfld.long 0x0 1. " GPA1 ,Pin1 mode" "Output,ADDR16" bitfld.long 0x0 0. " GPA0 ,Pin0 mode" "Output,ADDR0" line.long 0x04 "GPADAT,The data register for port A" bitfld.long 0x4 24. " GPA24 ,Port A pin 24 data" "Low,High" bitfld.long 0x4 23. " GPA23 ,Port A pin 23 data" "Low,High" bitfld.long 0x4 22. " GPA22 ,Port A pin 22 data" "Low,High" bitfld.long 0x4 21. " GPA21 ,Port A pin 21 data" "Low,High" textline " " bitfld.long 0x4 20. " GPA20 ,Port A pin 20 data" "Low,High" bitfld.long 0x4 19. " GPA19 ,Port A pin 19 data" "Low,High" bitfld.long 0x4 18. " GPA18 ,Port A pin 18 data" "Low,High" bitfld.long 0x4 17. " GPA17 ,Port A pin 17 data" "Low,High" textline " " bitfld.long 0x4 16. " GPA16 ,Port A pin 16 data" "Low,High" bitfld.long 0x4 15. " GPA15 ,Port A pin 15 data" "Low,High" bitfld.long 0x4 14. " GPA14 ,Port A pin 14 data" "Low,High" bitfld.long 0x4 13. " GPA13 ,Port A pin 13 data" "Low,High" textline " " bitfld.long 0x4 12. " GPA12 ,Port A pin 12 data" "Low,High" bitfld.long 0x4 11. " GPA11 ,Port A pin 11 data" "Low,High" bitfld.long 0x4 10. " GPA10 ,Port A pin 10 data" "Low,High" bitfld.long 0x4 9. " GPA9 ,Port A pin 9 data" "Low,High" textline " " bitfld.long 0x4 8. " GPA8 ,Port A pin 8 data" "Low,High" bitfld.long 0x4 7. " GPA7 ,Port A pin 7 data" "Low,High" bitfld.long 0x4 6. " GPA6 ,Port A pin 6 data" "Low,High" bitfld.long 0x4 5. " GPA5 ,Port A pin 5 data" "Low,High" textline " " bitfld.long 0x4 4. " GPA4 ,Port A pin 4 data" "Low,High" bitfld.long 0x4 3. " GPA3 ,Port A pin 3 data" "Low,High" bitfld.long 0x4 2. " GPA2 ,Port A pin 2 data" "Low,High" bitfld.long 0x4 1. " GPA1 ,Port A pin 1 data" "Low,High" textline " " bitfld.long 0x4 0. " GPA0 ,Port A pin 0 data" "Low,High" width 0xb endif sif (cpu()=="S3C2443X") width 14. group.long 0x00++0x7 line.long 0x00 "GPACDL,Configuration And Data Register For Port A Low" bitfld.long 0x00 15. " GPA7 ,Pin mode" "Output,RADDR22" bitfld.long 0x00 14. " GPA7 ,Port A pin 14 data" "Low,High" bitfld.long 0x00 13. " GPA6 ,Pin mode" "Output,RADDR21" textline " " bitfld.long 0x00 12. " GPA6 ,Port A pin 12 data" "Low,High" bitfld.long 0x00 11. " GPA5 ,Pin mode" "Output,RADDR20" bitfld.long 0x00 10. " GPA5 ,Port A pin 10 data" "Low,High" textline " " bitfld.long 0x00 9. " GPA4 ,Pin mode" "Output,RADDR19" bitfld.long 0x00 8. " GPA4 ,Port A pin 8 data" "Low,High" bitfld.long 0x00 7. " GPA3 ,Pin mode" "Output,RADDR18" textline " " bitfld.long 0x00 6. " GPA3 ,Port A pin 6 data" "Low,High" bitfld.long 0x00 5. " GPA2 ,Pin mode" "Output,RADDR17" bitfld.long 0x00 4. " GPA2 ,Port A pin 4 data" "Low,High" textline " " bitfld.long 0x00 3. " GPA1 ,Pin mode" "Output,RADDR16" bitfld.long 0x00 2. " GPA1 ,Port A pin 2 data" "Low,High" bitfld.long 0x00 1. " GPA0 ,Pin mode" "Output,RADDR0" textline " " bitfld.long 0x00 0. " GPA0 ,Port A pin 0 data" "Low,High" line.long 0x04 "GPACDH,Configuration And Data Register For Port A High" bitfld.long 0x04 16. " nRSTOUT ,nRSTOUT Pin signal manual control" "Low,Preset" bitfld.long 0x04 15. " GPA15 ,Pin mode" "Output,nWE_CF" bitfld.long 0x04 14. " GPA15 ,A pin 14 data" "Low,High" textline " " bitfld.long 0x04 13. " GPA14 ,Pin mode" "Output,RSMAVD" bitfld.long 0x04 12. " GPA14 ,A pin 12 data" "Low,High" bitfld.long 0x04 11. " GPA13 ,Pin mode" "Output,RSMCLK" textline " " bitfld.long 0x04 10. " GPA13 ,A pin 10 data" "Low,High" bitfld.long 0x04 9. " GPA12 ,Pin mode" "Output,nRCS[5]" bitfld.long 0x04 8. " GPA12 ,A pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPA11 ,Pin mode" "Output,nOE_CF" bitfld.long 0x04 6. " GPA11 ,A pin 6 data" "Low,High" bitfld.long 0x04 5. " GPA10 ,Pin mode" "Output,RADDR25" textline " " bitfld.long 0x04 4. " GPA10 ,A pin 4 data" "Low,High" bitfld.long 0x04 3. " GPA9 ,Pin mode" "Output,RADDR24" bitfld.long 0x04 2. " GPA9 ,A pin 2 data" "Low,High" textline " " bitfld.long 0x04 1. " GPA8 ,Pin mode" "Output,RADDR23" bitfld.long 0x04 0. " GPA8 ,A pin 0 data" "Low,High" width 0xB endif tree.end tree "Port B" sif (cpu()=="S3C2440A") width 0xb group.long 0x10++0xb line.long 0x00 "GPBCON,Configure the pins of port B" bitfld.long 0x00 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,?..." bitfld.long 0x00 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,?..." bitfld.long 0x00 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,?..." bitfld.long 0x00 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,?..." textline " " bitfld.long 0x00 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,?..." bitfld.long 0x00 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,?..." bitfld.long 0x00 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK0,?..." bitfld.long 0x00 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..." textline " " bitfld.long 0x00 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..." bitfld.long 0x00 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..." bitfld.long 0x00 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..." line.long 0x04 "GPBDAT,The data register for port B" bitfld.long 0x04 10. " GPB10 ,Port B pin 10 data" "Low,High" bitfld.long 0x04 9. " GPB9 ,Port B pin 9 data" "Low,High" bitfld.long 0x04 8. " GPB8 ,Port B pin 8 data" "Low,High" bitfld.long 0x04 7. " GPB7 ,Port B pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPB6 ,Port B pin 6 data" "Low,High" bitfld.long 0x04 5. " GPB5 ,Port B pin 5 data" "Low,High" bitfld.long 0x04 4. " GPB4 ,Port B pin 4 data" "Low,High" bitfld.long 0x04 3. " GPB3 ,Port B pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPB2 ,Port B pin 2 data" "Low,High" bitfld.long 0x04 1. " GPB1 ,Port B pin 1 data" "Low,High" bitfld.long 0x04 0. " GPB0 ,Port B pin 0 data" "Low,High" line.long 0x08 "GPBUP,Pull-up disable register for port B" bitfld.long 0x08 10. " GPB10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPB9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPB8 ,Pull-up disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPB7 ,Pull-up disable for pin7" "Enabled,Disabled" textline " " bitfld.long 0x08 6. " GPB6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPB5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPB4 ,Pull-up disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPB3 ,Pull-up disable for pin3" "Enabled,Disabled" textline " " bitfld.long 0x08 2. " GPB2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPB1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPB0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x10++0xb line.long 0x00 "GPBCON,Configure the pins of port B" bitfld.long 0x00 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,?..." bitfld.long 0x00 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,?..." bitfld.long 0x00 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,?..." bitfld.long 0x00 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,?..." textline " " bitfld.long 0x00 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,?..." bitfld.long 0x00 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,?..." bitfld.long 0x00 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK0,?..." bitfld.long 0x00 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..." textline " " bitfld.long 0x00 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..." bitfld.long 0x00 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..." bitfld.long 0x00 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..." line.long 0x04 "GPBDAT,The data register for port B" bitfld.long 0x04 10. " GPB10 ,Port B pin 10 data" "Low,High" bitfld.long 0x04 9. " GPB9 ,Port B pin 9 data" "Low,High" bitfld.long 0x04 8. " GPB8 ,Port B pin 8 data" "Low,High" bitfld.long 0x04 7. " GPB7 ,Port B pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPB6 ,Port B pin 6 data" "Low,High" bitfld.long 0x04 5. " GPB5 ,Port B pin 5 data" "Low,High" bitfld.long 0x04 4. " GPB4 ,Port B pin 4 data" "Low,High" bitfld.long 0x04 3. " GPB3 ,Port B pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPB2 ,Port B pin 2 data" "Low,High" bitfld.long 0x04 1. " GPB1 ,Port B pin 1 data" "Low,High" bitfld.long 0x04 0. " GPB0 ,Port B pin 0 data" "Low,High" line.long 0x08 "GPBDN,Pull-down disable register for port B" bitfld.long 0x08 10. " GPB10 ,Pull-down disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPB9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPB8 ,Pull-down disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPB7 ,Pull-down disable for pin7" "Enabled,Disabled" textline " " bitfld.long 0x08 6. " GPB6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPB5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPB4 ,Pull-down disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPB3 ,Pull-down disable for pin3" "Enabled,Disabled" textline " " bitfld.long 0x08 2. " GPB2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPB1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPB0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x10++0xb line.long 0x00 "GPBCON,Configure The Pins Of Port B" bitfld.long 0x00 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,XDREQ0" bitfld.long 0x00 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,XDACK0" bitfld.long 0x00 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,XDREQ1" bitfld.long 0x00 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,XDACK1" textline " " bitfld.long 0x00 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,XBREQ" bitfld.long 0x00 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,XBACK" bitfld.long 0x00 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK,?..." bitfld.long 0x00 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..." textline " " bitfld.long 0x00 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..." bitfld.long 0x00 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..." bitfld.long 0x00 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..." line.long 0x04 "GPBDAT,The Data Register For Port B" bitfld.long 0x04 10. " GPB10 ,Port B pin 10 data" "Low,High" bitfld.long 0x04 9. " GPB9 ,Port B pin 9 data" "Low,High" bitfld.long 0x04 8. " GPB8 ,Port B pin 8 data" "Low,High" bitfld.long 0x04 7. " GPB7 ,Port B pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPB6 ,Port B pin 6 data" "Low,High" bitfld.long 0x04 5. " GPB5 ,Port B pin 5 data" "Low,High" bitfld.long 0x04 4. " GPB4 ,Port B pin 4 data" "Low,High" bitfld.long 0x04 3. " GPB3 ,Port B pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPB2 ,Port B pin 2 data" "Low,High" bitfld.long 0x04 1. " GPB1 ,Port B pin 1 data" "Low,High" bitfld.long 0x04 0. " GPB0 ,Port B pin 0 data" "Low,High" line.long 0x08 "GPBUDP,Pull-up/down Control Register For Port B" bitfld.long 0x08 20.--21. " GPB10 ,Pull-up/down pin10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPB9 ,Pull-up/down pin9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPB8 ,Pull-up/down pin8" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 14.--15. " GPB7 ,Pull-up/down pin7" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 12.--13. " GPB6 ,Pull-up/down pin6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPB5 ,Pull-up/down pin5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPB4 ,Pull-up/down pin4" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 6.--7. " GPB3 ,Pull-up/down pin3" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 4.--5. " GPB2 ,Pull-up/down pin2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPB1 ,Pull-up/down pin1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPB0 ,Pull-up/down pin0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port C" sif (cpu()=="S3C2440A") width 0xb group.long 0x20++0xb line.long 0x00 "GPCCON,Configure the pins of port C" bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..." bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..." bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..." bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..." textline " " bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..." bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..." bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..." bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..." textline " " bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCD_LPCREVB,?..." bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCD_LPCREV,?..." bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCD_LPCOE,?..." bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..." textline " " bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..." bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..." bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..." bitfld.long 0x00 0.--1. " GPC0 ,Pin0 mode" "Input,Output,LEND,?..." line.long 0x04 "GPCDAT,The data register for port C" bitfld.long 0x04 15. " GPC15 ,Port C pin 15 data" "Low,High" bitfld.long 0x04 14. " GPC14 ,Port C pin 14 data" "Low,High" bitfld.long 0x04 13. " GPC13 ,Port C pin 13 data" "Low,High" bitfld.long 0x04 12. " GPC12 ,Port C pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPC11 ,Port C pin 11 data" "Low,High" bitfld.long 0x04 10. " GPC10 ,Port C pin 10 data" "Low,High" bitfld.long 0x04 9. " GPC9 ,Port C pin 9 data" "Low,High" bitfld.long 0x04 8. " GPC8 ,Port C pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPC7 ,Port C pin 7 data" "Low,High" bitfld.long 0x04 6. " GPC6 ,Port C pin 6 data" "Low,High" bitfld.long 0x04 5. " GPC5 ,Port C pin 5 data" "Low,High" bitfld.long 0x04 4. " GPC4 ,Port C pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPC3 ,Port C pin 3 data" "Low,High" bitfld.long 0x04 2. " GPC2 ,Port C pin 2 data" "Low,High" bitfld.long 0x04 1. " GPC1 ,Port C pin 1 data" "Low,High" bitfld.long 0x04 0. " GPC0 ,Port C pin 0 data" "Low,High" line.long 0x08 "GPCUP,Pull-up disable register for port C" bitfld.long 0x08 15. " GPC15 ,Pull-up disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPC14 ,Pull-up disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPC13 ,Pull-up disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPC12 ,Pull-up disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPC11 ,Pull-up disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPC10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPC9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPC8 ,Pull-up disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPC7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPC6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPC5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPC4 ,Pull-up disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPC3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPC2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPC1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPC0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x20++0xb line.long 0x00 "GPCCON,Configure the pins of port C" bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..." bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..." bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..." bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..." textline " " bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..." bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..." bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..." bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..." textline " " bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCD_LPCREVB,?..." bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCD_LPCREV,?..." bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCD_LPCOE,?..." bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..." textline " " bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..." bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..." bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..." bitfld.long 0x00 0.--1. " GPC0 ,Pin0 mode" "Input,Output,LEND,?..." line.long 0x04 "GPCDAT,The data register for port C" bitfld.long 0x04 15. " GPC15 ,Port C pin 15 data" "Low,High" bitfld.long 0x04 14. " GPC14 ,Port C pin 14 data" "Low,High" bitfld.long 0x04 13. " GPC13 ,Port C pin 13 data" "Low,High" bitfld.long 0x04 12. " GPC12 ,Port C pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPC11 ,Port C pin 11 data" "Low,High" bitfld.long 0x04 10. " GPC10 ,Port C pin 10 data" "Low,High" bitfld.long 0x04 9. " GPC9 ,Port C pin 9 data" "Low,High" bitfld.long 0x04 8. " GPC8 ,Port C pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPC7 ,Port C pin 7 data" "Low,High" bitfld.long 0x04 6. " GPC6 ,Port C pin 6 data" "Low,High" bitfld.long 0x04 5. " GPC5 ,Port C pin 5 data" "Low,High" bitfld.long 0x04 4. " GPC4 ,Port C pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPC3 ,Port C pin 3 data" "Low,High" bitfld.long 0x04 2. " GPC2 ,Port C pin 2 data" "Low,High" bitfld.long 0x04 1. " GPC1 ,Port C pin 1 data" "Low,High" bitfld.long 0x04 0. " GPC0 ,Port C pin 0 data" "Low,High" line.long 0x08 "GPCDN,Pull-down disable register for port C" bitfld.long 0x08 15. " GPC15 ,Pull-down disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPC14 ,Pull-down disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPC13 ,Pull-down disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPC12 ,Pull-down disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPC11 ,Pull-down disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPC10 ,Pull-down disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPC9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPC8 ,Pull-down disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPC7 ,Pull-down disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPC6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPC5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPC4 ,Pull-down disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPC3 ,Pull-down disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPC2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPC1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPC0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x20++0xb line.long 0x00 "GPCCON,Configure The Pins Of Port C" bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..." bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..." bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..." bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..." textline " " bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..." bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..." bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..." bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..." textline " " bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCD_VF2,?..." bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCD_VF1,?..." bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCD_VF0,?..." bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..." textline " " bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..." bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..." bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..." bitfld.long 0x00 0.--1. " GPC0 ,Pin0 mode" "Input,Output,LEND,?..." line.long 0x04 "GPCDAT,The Data Register For Port C" bitfld.long 0x04 15. " GPC15 ,Port C pin 15 data" "Low,High" bitfld.long 0x04 14. " GPC14 ,Port C pin 14 data" "Low,High" bitfld.long 0x04 13. " GPC13 ,Port C pin 13 data" "Low,High" bitfld.long 0x04 12. " GPC12 ,Port C pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPC11 ,Port C pin 11 data" "Low,High" bitfld.long 0x04 10. " GPC10 ,Port C pin 10 data" "Low,High" bitfld.long 0x04 9. " GPC9 ,Port C pin 9 data" "Low,High" bitfld.long 0x04 8. " GPC8 ,Port C pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPC7 ,Port C pin 7 data" "Low,High" bitfld.long 0x04 6. " GPC6 ,Port C pin 6 data" "Low,High" bitfld.long 0x04 5. " GPC5 ,Port C pin 5 data" "Low,High" bitfld.long 0x04 4. " GPC4 ,Port C pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPC3 ,Port C pin 3 data" "Low,High" bitfld.long 0x04 2. " GPC2 ,Port C pin 2 data" "Low,High" bitfld.long 0x04 1. " GPC1 ,Port C pin 1 data" "Low,High" bitfld.long 0x04 0. " GPC0 ,Port C pin 0 data" "Low,High" line.long 0x08 "GPCUDP,Pull-up/down Control For Port C" bitfld.long 0x08 30.--31. " GPC15 ,Pull-up/down Control For Pin 15" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 28.--29. " GPC14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPC13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPC12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPC11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPC10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPC9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPC8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. " GPC7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. " GPC6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPC5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPC4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. " GPC3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. " GPC2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPC1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPC0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port D" sif (cpu()=="S3C2440A") width 0xb group.long 0x30++0xb line.long 0x00 "GPDCON,Configure the pins of port D" bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,nSS0" bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,nSS1" bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..." bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..." textline " " bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..." bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,SPICLK1" bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,SPIMOSI1" bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,SPIMISO1" textline " " bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..." bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..." bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..." bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..." textline " " bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..." bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..." bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,?..." bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,?..." line.long 0x04 "GPDDAT,The data register for port D" bitfld.long 0x04 15. " GPD15 ,Port D pin 15 data" "Low,High" bitfld.long 0x04 14. " GPD14 ,Port D pin 14 data" "Low,High" bitfld.long 0x04 13. " GPD13 ,Port D pin 13 data" "Low,High" bitfld.long 0x04 12. " GPD12 ,Port D pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPD11 ,Port D pin 11 data" "Low,High" bitfld.long 0x04 10. " GPD10 ,Port D pin 10 data" "Low,High" bitfld.long 0x04 9. " GPD9 ,Port D pin 9 data" "Low,High" bitfld.long 0x04 8. " GPD8 ,Port D pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPD7 ,Port D pin 7 data" "Low,High" bitfld.long 0x04 6. " GPD6 ,Port D pin 6 data" "Low,High" bitfld.long 0x04 5. " GPD5 ,Port D pin 5 data" "Low,High" bitfld.long 0x04 4. " GPD4 ,Port D pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPD3 ,Port D pin 3 data" "Low,High" bitfld.long 0x04 2. " GPD2 ,Port D pin 2 data" "Low,High" bitfld.long 0x04 1. " GPD1 ,Port D pin 1 data" "Low,High" bitfld.long 0x04 0. " GPD0 ,Port D pin 0 data" "Low,High" line.long 0x08 "GPDUP,Pull-up disable register for port D" bitfld.long 0x08 15. " GPD15 ,Pull-up disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPD14 ,Pull-up disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPD13 ,Pull-up disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPD12 ,Pull-up disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPD11 ,Pull-up disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPD10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPD9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPD8 ,Pull-up disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPD7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPD6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPD5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPD4 ,Pull-up disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPD3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPD2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPD1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPD0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x30++0xb line.long 0x00 "GPDCON,Configure the pins of port D" bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,nSS0" bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,nSS1" bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..." bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..." textline " " bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..." bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,SPICLK1" bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,SPIMOSI1" bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,SPIMISO1" textline " " bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..." bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..." bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..." bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..." textline " " bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..." bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..." bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,SPICLK1" bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,nSPICS1" line.long 0x04 "GPDDAT,The data register for port D" bitfld.long 0x04 15. " GPD15 ,Port D pin 15 data" "Low,High" bitfld.long 0x04 14. " GPD14 ,Port D pin 14 data" "Low,High" bitfld.long 0x04 13. " GPD13 ,Port D pin 13 data" "Low,High" bitfld.long 0x04 12. " GPD12 ,Port D pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPD11 ,Port D pin 11 data" "Low,High" bitfld.long 0x04 10. " GPD10 ,Port D pin 10 data" "Low,High" bitfld.long 0x04 9. " GPD9 ,Port D pin 9 data" "Low,High" bitfld.long 0x04 8. " GPD8 ,Port D pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPD7 ,Port D pin 7 data" "Low,High" bitfld.long 0x04 6. " GPD6 ,Port D pin 6 data" "Low,High" bitfld.long 0x04 5. " GPD5 ,Port D pin 5 data" "Low,High" bitfld.long 0x04 4. " GPD4 ,Port D pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPD3 ,Port D pin 3 data" "Low,High" bitfld.long 0x04 2. " GPD2 ,Port D pin 2 data" "Low,High" bitfld.long 0x04 1. " GPD1 ,Port D pin 1 data" "Low,High" bitfld.long 0x04 0. " GPD0 ,Port D pin 0 data" "Low,High" line.long 0x08 "GPDDN,Pull-down disable register for port D" bitfld.long 0x08 15. " GPD15 ,Pull-down disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPD14 ,Pull-down disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPD13 ,Pull-down disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPD12 ,Pull-down disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPD11 ,Pull-down disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPD10 ,Pull-down disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPD9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPD8 ,Pull-down disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPD7 ,Pull-down disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPD6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPD5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPD4 ,Pull-down disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPD3 ,Pull-down disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPD2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPD1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPD0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x30++0xb line.long 0x00 "GPDCON,Configure The Pins Of Port D" bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,?..." bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,?..." bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..." bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..." textline " " bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..." bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,?..." bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,?..." bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,?..." textline " " bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..." bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..." bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..." bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..." textline " " bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..." bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..." bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,?..." bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,?..." line.long 0x04 "GPDDAT,The Data Register For Port D" bitfld.long 0x04 15. " GPD15 ,Port D pin 15 data" "Low,High" bitfld.long 0x04 14. " GPD14 ,Port D pin 14 data" "Low,High" bitfld.long 0x04 13. " GPD13 ,Port D pin 13 data" "Low,High" bitfld.long 0x04 12. " GPD12 ,Port D pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPD11 ,Port D pin 11 data" "Low,High" bitfld.long 0x04 10. " GPD10 ,Port D pin 10 data" "Low,High" bitfld.long 0x04 9. " GPD9 ,Port D pin 9 data" "Low,High" bitfld.long 0x04 8. " GPD8 ,Port D pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPD7 ,Port D pin 7 data" "Low,High" bitfld.long 0x04 6. " GPD6 ,Port D pin 6 data" "Low,High" bitfld.long 0x04 5. " GPD5 ,Port D pin 5 data" "Low,High" bitfld.long 0x04 4. " GPD4 ,Port D pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPD3 ,Port D pin 3 data" "Low,High" bitfld.long 0x04 2. " GPD2 ,Port D pin 2 data" "Low,High" bitfld.long 0x04 1. " GPD1 ,Port D pin 1 data" "Low,High" bitfld.long 0x04 0. " GPD0 ,Port D pin 0 data" "Low,High" line.long 0x08 "GPDUDP,Pull-up/down Control Register For Port D" bitfld.long 0x08 30.--31. " GPD15 ,Pull-up/down Control For Pin 15" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 28.--29. " GPD14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPD13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPD12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPD11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPD10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPD9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPD8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. " GPD7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. " GPD6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPD5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPD4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. " GPD3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. " GPD2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPD1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPD0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port E" sif (cpu()=="S3C2440A") width 0xb group.long 0x40++0xb line.long 0x00 "GPECON,Configure the pins of port E" bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..." bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..." bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..." bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..." textline " " bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..." bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SDDAT3,?..." bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SDDAT2,?..." bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SDDAT1,?..." textline " " bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SDDAT0,?..." bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SDCMD,?..." bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SDCLK,?..." bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SDO,AC_SDATA_OUT" textline " " bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SDI,AC_SDATA_IN" bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,AC_nRESET" bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,AC_BIT_CLK" bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,AC_SYNC" line.long 0x04 "GPEDAT,The data register for port E" bitfld.long 0x04 15. " GPE15 ,Port E pin 15 data" "Low,High" bitfld.long 0x04 14. " GPE14 ,Port E pin 14 data" "Low,High" bitfld.long 0x04 13. " GPE13 ,Port E pin 13 data" "Low,High" bitfld.long 0x04 12. " GPE12 ,Port E pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPE11 ,Port E pin 11 data" "Low,High" bitfld.long 0x04 10. " GPE10 ,Port E pin 10 data" "Low,High" bitfld.long 0x04 9. " GPE9 ,Port E pin 9 data" "Low,High" bitfld.long 0x04 8. " GPE8 ,Port E pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPE7 ,Port E pin 7 data" "Low,High" bitfld.long 0x04 6. " GPE6 ,Port E pin 6 data" "Low,High" bitfld.long 0x04 5. " GPE5 ,Port E pin 5 data" "Low,High" bitfld.long 0x04 4. " GPE4 ,Port E pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPE3 ,Port E pin 3 data" "Low,High" bitfld.long 0x04 2. " GPE2 ,Port E pin 2 data" "Low,High" bitfld.long 0x04 1. " GPE1 ,Port E pin 1 data" "Low,High" bitfld.long 0x04 0. " GPE0 ,Port E pin 0 data" "Low,High" line.long 0x08 "GPEUP,Pull-up disable register for port E" bitfld.long 0x08 13. " GPE13 ,Pull-up disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPE12 ,Pull-up disable for pin12" "Enabled,Disabled" bitfld.long 0x08 11. " GPE11 ,Pull-up disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPE10 ,Pull-up disable for pin10" "Enabled,Disabled" textline " " bitfld.long 0x08 9. " GPE9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPE8 ,Pull-up disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPE7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPE6 ,Pull-up disable for pin6" "Enabled,Disabled" textline " " bitfld.long 0x08 5. " GPE5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPE4 ,Pull-up disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPE3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPE2 ,Pull-up disable for pin2" "Enabled,Disabled" textline " " bitfld.long 0x08 1. " GPE1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPE0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x40++0xb line.long 0x00 "GPECON,Configure the pins of port E" bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..." bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..." bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..." bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..." textline " " bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..." bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SDDAT3,?..." bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SDDAT2,?..." bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SDDAT1,?..." textline " " bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SDDAT0,?..." bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SDCMD,?..." bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SDCLK,?..." bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SDO,?..." textline " " bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SDI,?..." bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,?..." bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,?..." bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,?..." line.long 0x04 "GPEDAT,The data register for port E" bitfld.long 0x04 15. " GPE15 ,Port E pin 15 data" "Low,High" bitfld.long 0x04 14. " GPE14 ,Port E pin 14 data" "Low,High" bitfld.long 0x04 13. " GPE13 ,Port E pin 13 data" "Low,High" bitfld.long 0x04 12. " GPE12 ,Port E pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPE11 ,Port E pin 11 data" "Low,High" bitfld.long 0x04 10. " GPE10 ,Port E pin 10 data" "Low,High" bitfld.long 0x04 9. " GPE9 ,Port E pin 9 data" "Low,High" bitfld.long 0x04 8. " GPE8 ,Port E pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPE7 ,Port E pin 7 data" "Low,High" bitfld.long 0x04 6. " GPE6 ,Port E pin 6 data" "Low,High" bitfld.long 0x04 5. " GPE5 ,Port E pin 5 data" "Low,High" bitfld.long 0x04 4. " GPE4 ,Port E pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPE3 ,Port E pin 3 data" "Low,High" bitfld.long 0x04 2. " GPE2 ,Port E pin 2 data" "Low,High" bitfld.long 0x04 1. " GPE1 ,Port E pin 1 data" "Low,High" bitfld.long 0x04 0. " GPE0 ,Port E pin 0 data" "Low,High" line.long 0x08 "GPEDN,Pull-down disable register for port E" bitfld.long 0x08 13. " GPE13 ,Pull-down disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPE12 ,Pull-down disable for pin12" "Enabled,Disabled" bitfld.long 0x08 11. " GPE11 ,Pull-down disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPE10 ,Pull-down disable for pin10" "Enabled,Disabled" textline " " bitfld.long 0x08 9. " GPE9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPE8 ,Pull-down disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPE7 ,Pull-down disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPE6 ,Pull-down disable for pin6" "Enabled,Disabled" textline " " bitfld.long 0x08 5. " GPE5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPE4 ,Pull-down disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPE3 ,Pull-down disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPE2 ,Pull-down disable for pin2" "Enabled,Disabled" textline " " bitfld.long 0x08 1. " GPE1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPE0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x40++0xb line.long 0x00 "GPECON,Configure The Pins Of Port E" bitfld.long 0x00 30.--31. "GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..." bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..." bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..." bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..." textline " " bitfld.long 0x00 22.--23. "GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..." bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SD1DAT3,?..." bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SD1DAT2,AC_nRESET" bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SD1DAT1,AC_SYNC" textline " " bitfld.long 0x00 14.--15. "GPE7 ,Pin7 mode" "Input,Output,SD1DAT0,AC_SDO" bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SD1CMD,AC_SDI" bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SD1CLK,AC_BIT_CLK" bitfld.long 0x00 8.--9. "GPE4 ,Pin4 mode" "Input,Output,I2SDO,AC_SDO" textline " " bitfld.long 0x00 6.--7. "GPE3 ,Pin3 mode" "Input,Output,I2SDI,AC_SDI" bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,AC_BIT_CLK" bitfld.long 0x00 2.--3. "GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,AC_SYNC" bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,AC_nRESET" line.long 0x04 "GPEDAT,The Data Register For Port E" bitfld.long 0x04 15. "GPE15 ,Port E pin 15 data" "Low,High" bitfld.long 0x04 14. " GPE14 ,Port E pin 14 data" "Low,High" bitfld.long 0x04 13. " GPE13 ,Port E pin 13 data" "Low,High" bitfld.long 0x04 12. " GPE12 ,Port E pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. "GPE11 ,Port E pin 11 data" "Low,High" bitfld.long 0x04 10. " GPE10 ,Port E pin 10 data" "Low,High" bitfld.long 0x04 9. " GPE9 ,Port E pin 9 data" "Low,High" bitfld.long 0x04 8. " GPE8 ,Port E pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. "GPE7 ,Port E pin 7 data" "Low,High" bitfld.long 0x04 6. " GPE6 ,Port E pin 6 data" "Low,High" bitfld.long 0x04 5. " GPE5 ,Port E pin 5 data" "Low,High" bitfld.long 0x04 4. " GPE4 ,Port E pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. "GPE3 ,Port E pin 3 data" "Low,High" bitfld.long 0x04 2. " GPE2 ,Port E pin 2 data" "Low,High" bitfld.long 0x04 1. " GPE1 ,Port E pin 1 data" "Low,High" bitfld.long 0x04 0. " GPE0 ,Port E pin 0 data" "Low,High" line.long 0x08 "GPEDN,Pull-up/down Control Register For Port E" bitfld.long 0x08 30.--31. "GPE15 ,Pull-up/down Control For Pin 15" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 28.--29. "GPE14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPE13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPE12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. "GPE11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. "GPE10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPE9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPE8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. "GPE7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. "GPE6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPE5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPE4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. "GPE3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. "GPE2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPE1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPE0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port F" sif (cpu()=="S3C2440A") width 0xb group.long 0x50++0xb line.long 0x00 "GPFCON,Configure the pins of port F" bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..." bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..." bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..." bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..." textline " " bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..." bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..." bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..." bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..." line.long 0x04 "GPFDAT,The data register for port F" bitfld.long 0x04 7. " GPF7 ,Port F pin 7 data" "Low,High" bitfld.long 0x04 6. " GPF6 ,Port F pin 6 data" "Low,High" bitfld.long 0x04 5. " GPF5 ,Port F pin 5 data" "Low,High" bitfld.long 0x04 4. " GPF4 ,Port F pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPF3 ,Port F pin 3 data" "Low,High" bitfld.long 0x04 2. " GPF2 ,Port F pin 2 data" "Low,High" bitfld.long 0x04 1. " GPF1 ,Port F pin 1 data" "Low,High" bitfld.long 0x04 0. " GPF0 ,Port F pin 0 data" "Low,High" line.long 0x08 "GPFUP,Pull-up disable register for port F" bitfld.long 0x08 7. " GPF7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPF6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPF5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPF4 ,Pull-up disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPF3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPF2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPF1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPF0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x50++0xb line.long 0x00 "GPFCON,Configure the pins of port F" bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..." bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..." bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..." bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..." textline " " bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..." bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..." bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..." bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..." line.long 0x04 "GPFDAT,The data register for port F" bitfld.long 0x04 7. " GPF7 ,Port F pin 7 data" "Low,High" bitfld.long 0x04 6. " GPF6 ,Port F pin 6 data" "Low,High" bitfld.long 0x04 5. " GPF5 ,Port F pin 5 data" "Low,High" bitfld.long 0x04 4. " GPF4 ,Port F pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPF3 ,Port F pin 3 data" "Low,High" bitfld.long 0x04 2. " GPF2 ,Port F pin 2 data" "Low,High" bitfld.long 0x04 1. " GPF1 ,Port F pin 1 data" "Low,High" bitfld.long 0x04 0. " GPF0 ,Port F pin 0 data" "Low,High" line.long 0x08 "GPFUP,Pull-down disable register for port F" bitfld.long 0x08 7. " GPF7 ,Pull-down disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPF6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPF5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPF4 ,Pull-down disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPF3 ,Pull-down disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPF2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPF1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPF0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x50++0xb line.long 0x00 "GPFCON,Configure the pins of port F" bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..." bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..." bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..." bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..." textline " " bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..." bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..." bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..." bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..." line.long 0x04 "GPFDAT,The data register for port F" bitfld.long 0x04 7. " GPF7 ,Port F pin 7 data" "Low,High" bitfld.long 0x04 6. " GPF6 ,Port F pin 6 data" "Low,High" bitfld.long 0x04 5. " GPF5 ,Port F pin 5 data" "Low,High" bitfld.long 0x04 4. " GPF4 ,Port F pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPF3 ,Port F pin 3 data" "Low,High" bitfld.long 0x04 2. " GPF2 ,Port F pin 2 data" "Low,High" bitfld.long 0x04 1. " GPF1 ,Port F pin 1 data" "Low,High" bitfld.long 0x04 0. " GPF0 ,Port F pin 0 data" "Low,High" width 0xb endif tree.end tree "Port G" sif (cpu()=="S3C2440A") width 0xb group.long 0x60++0xb line.long 0x00 "GPGCON,Configure the pins of port G" bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,?..." bitfld.long 0x00 28.--29. " GPG14 ,Pin14 mode" "Input,Output,EINT22,?..." bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,?..." bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,?..." textline " " bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,TCLK1" bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,nCTS1" bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,nRTS1" bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..." textline " " bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,SPICLK1" bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,SPIMOSI1" bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,SPIMISO1" bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,LCD_PWRDN" textline " " bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,nSS1" bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,nSS0" bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..." bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..." line.long 0x04 "GPGDAT,The data register for port G" bitfld.long 0x04 15. " GPG15 ,Port G pin 15 data" "Low,High" bitfld.long 0x04 14. " GPG14 ,Port G pin 14 data" "Low,High" bitfld.long 0x04 13. " GPG13 ,Port G pin 13 data" "Low,High" bitfld.long 0x04 12. " GPG12 ,Port G pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPG11 ,Port G pin 11 data" "Low,High" bitfld.long 0x04 10. " GPG10 ,Port G pin 10 data" "Low,High" bitfld.long 0x04 9. " GPG9 ,Port G pin 9 data" "Low,High" bitfld.long 0x04 8. " GPG8 ,Port G pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPG7 ,Port G pin 7 data" "Low,High" bitfld.long 0x04 6. " GPG6 ,Port G pin 6 data" "Low,High" bitfld.long 0x04 5. " GPG5 ,Port G pin 5 data" "Low,High" bitfld.long 0x04 4. " GPG4 ,Port G pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPG3 ,Port G pin 3 data" "Low,High" bitfld.long 0x04 2. " GPG2 ,Port G pin 2 data" "Low,High" bitfld.long 0x04 1. " GPG1 ,Port G pin 1 data" "Low,High" bitfld.long 0x04 0. " GPG0 ,Port G pin 0 data" "Low,High" line.long 0x08 "GPGUP,Pull-up disable register for port G" bitfld.long 0x08 15. " GPG15 ,Pull-up disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPG14 ,Pull-up disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPG13 ,Pull-up disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPG12 ,Pull-up disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPG11 ,Pull-up disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPG10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPG9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPG8 ,Pull-up disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPG7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPG6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPG5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPG4 ,Pull-up disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPG3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPG2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPG1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPG0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x60++0xb line.long 0x00 "GPGCON,Configure the pins of port G" bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,?..." bitfld.long 0x00 28.--29. " GPG14 ,Pin14 mode" "Input,Output,EINT22,?..." bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,?..." bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,nSPICS0" textline " " bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,TCLK1" bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,nCTS1" bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,nRTS1" bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..." textline " " bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,SPICLK1" bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,SPIMOSI1" bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,SPIMISO1" bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,LCD_PWRDN" textline " " bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,nSS1" bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,nSS0" bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..." bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..." line.long 0x04 "GPGDAT,The data register for port G" bitfld.long 0x04 15. " GPG15 ,Port G pin 15 data" "Low,High" bitfld.long 0x04 14. " GPG14 ,Port G pin 14 data" "Low,High" bitfld.long 0x04 13. " GPG13 ,Port G pin 13 data" "Low,High" bitfld.long 0x04 12. " GPG12 ,Port G pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPG11 ,Port G pin 11 data" "Low,High" bitfld.long 0x04 10. " GPG10 ,Port G pin 10 data" "Low,High" bitfld.long 0x04 9. " GPG9 ,Port G pin 9 data" "Low,High" bitfld.long 0x04 8. " GPG8 ,Port G pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPG7 ,Port G pin 7 data" "Low,High" bitfld.long 0x04 6. " GPG6 ,Port G pin 6 data" "Low,High" bitfld.long 0x04 5. " GPG5 ,Port G pin 5 data" "Low,High" bitfld.long 0x04 4. " GPG4 ,Port G pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPG3 ,Port G pin 3 data" "Low,High" bitfld.long 0x04 2. " GPG2 ,Port G pin 2 data" "Low,High" bitfld.long 0x04 1. " GPG1 ,Port G pin 1 data" "Low,High" bitfld.long 0x04 0. " GPG0 ,Port G pin 0 data" "Low,High" line.long 0x08 "GPGUP,Pull-down disable register for port G" bitfld.long 0x08 15. " GPG15 ,Pull-down disable for pin15" "Enabled,Disabled" bitfld.long 0x08 14. " GPG14 ,Pull-down disable for pin14" "Enabled,Disabled" bitfld.long 0x08 13. " GPG13 ,Pull-down disable for pin13" "Enabled,Disabled" bitfld.long 0x08 12. " GPG12 ,Pull-down disable for pin12" "Enabled,Disabled" textline " " bitfld.long 0x08 11. " GPG11 ,Pull-down disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPG10 ,Pull-down disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPG9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPG8 ,Pull-down disable for pin8" "Enabled,Disabled" textline " " bitfld.long 0x08 7. " GPG7 ,Pull-down disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPG6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPG5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPG4 ,Pull-down disable for pin4" "Enabled,Disabled" textline " " bitfld.long 0x08 3. " GPG3 ,Pull-down disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPG2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPG1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPG0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x60++0xb line.long 0x00 "GPGCON,Configure The Pins Of Port G" bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,CARD_PWREN" bitfld.long 0x00 28.--29. "GPG14 ,Pin14 mode" "Input,Output,EINT22,RESET_CF" bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,nREG_CF" bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,nINPACK" textline " " bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,nIREQ_CF" bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,?..." bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,?..." bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..." textline " " bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,?..." bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,?..." bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,?..." bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,LCD_PWRDN" textline " " bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,?..." bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,?..." bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..." bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..." line.long 0x04 "GPGDAT,The Data Register For Port G" bitfld.long 0x04 15. " GPG15 ,Port G pin 15 data" "Low,High" bitfld.long 0x04 14. " GPG14 ,Port G pin 14 data" "Low,High" bitfld.long 0x04 13. " GPG13 ,Port G pin 13 data" "Low,High" bitfld.long 0x04 12. " GPG12 ,Port G pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPG11 ,Port G pin 11 data" "Low,High" bitfld.long 0x04 10. " GPG10 ,Port G pin 10 data" "Low,High" bitfld.long 0x04 9. " GPG9 ,Port G pin 9 data" "Low,High" bitfld.long 0x04 8. " GPG8 ,Port G pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPG7 ,Port G pin 7 data" "Low,High" bitfld.long 0x04 6. " GPG6 ,Port G pin 6 data" "Low,High" bitfld.long 0x04 5. " GPG5 ,Port G pin 5 data" "Low,High" bitfld.long 0x04 4. " GPG4 ,Port G pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPG3 ,Port G pin 3 data" "Low,High" bitfld.long 0x04 2. " GPG2 ,Port G pin 2 data" "Low,High" bitfld.long 0x04 1. " GPG1 ,Port G pin 1 data" "Low,High" bitfld.long 0x04 0. " GPG0 ,Port G pin 0 data" "Low,High" line.long 0x08 "GPGUP,Pull-up/down Control Register For Port G" bitfld.long 0x08 30.--31. " GPG15 ,Pull-up/down Control For Pin 15" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 28.--29. " GPG14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPG13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPG12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPG11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPG10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPG9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPG8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port H" sif (cpu()=="S3C2440A") width 0xb group.long 0x70++0xb line.long 0x00 "GPHCON,Configure the pins of port H" bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,CLKOUT1,?..." bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,CLKOUT0,?..." bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,UEXTCLK,?..." bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD2,nCTS1" textline " " bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD2,nRTS1" bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD1,?..." bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD1,?..." bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD0,?..." textline " " bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD0,?..." bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,nRTS0,?..." bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,nCTS0,?..." line.long 0x04 "GPHDAT,The data register for port H" bitfld.long 0x04 10. " GPH10 ,Port H pin 10 data" "Low,High" bitfld.long 0x04 9. " GPH9 ,Port H pin 9 data" "Low,High" bitfld.long 0x04 8. " GPH8 ,Port H pin 8 data" "Low,High" bitfld.long 0x04 7. " GPH7 ,Port H pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPH6 ,Port H pin 6 data" "Low,High" bitfld.long 0x04 5. " GPH5 ,Port H pin 5 data" "Low,High" bitfld.long 0x04 4. " GPH4 ,Port H pin 4 data" "Low,High" bitfld.long 0x04 3. " GPH3 ,Port H pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPH2 ,Port H pin 2 data" "Low,High" bitfld.long 0x04 1. " GPH1 ,Port H pin 1 data" "Low,High" bitfld.long 0x04 0. " GPH0 ,Port H pin 0 data" "Low,High" line.long 0x08 "GPHUP,Pull-up disable register for port H" bitfld.long 0x08 10. " GPH10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPH9 ,Pull-up disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPH8 ,Pull-up disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPH7 ,Pull-up disable for pin7" "Enabled,Disabled" textline " " bitfld.long 0x08 6. " GPH6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPH5 ,Pull-up disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPH4 ,Pull-up disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPH3 ,Pull-up disable for pin3" "Enabled,Disabled" textline " " bitfld.long 0x08 2. " GPH2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPH1 ,Pull-up disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPH0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2442B") width 0xb group.long 0x70++0xb line.long 0x00 "GPHCON,Configure the pins of port H" bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,CLKOUT1,?..." bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,CLKOUT0,nSPICS0" bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,UEXTCLK,?..." bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD2,nCTS1" textline " " bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD2,nRTS1" bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD1,?..." bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD1,?..." bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD0,?..." textline " " bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD0,?..." bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,nRTS0,?..." bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,nCTS0,?..." line.long 0x04 "GPHDAT,The data register for port H" bitfld.long 0x04 10. " GPH10 ,Port H pin 10 data" "Low,High" bitfld.long 0x04 9. " GPH9 ,Port H pin 9 data" "Low,High" bitfld.long 0x04 8. " GPH8 ,Port H pin 8 data" "Low,High" bitfld.long 0x04 7. " GPH7 ,Port H pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPH6 ,Port H pin 6 data" "Low,High" bitfld.long 0x04 5. " GPH5 ,Port H pin 5 data" "Low,High" bitfld.long 0x04 4. " GPH4 ,Port H pin 4 data" "Low,High" bitfld.long 0x04 3. " GPH3 ,Port H pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPH2 ,Port H pin 2 data" "Low,High" bitfld.long 0x04 1. " GPH1 ,Port H pin 1 data" "Low,High" bitfld.long 0x04 0. " GPH0 ,Port H pin 0 data" "Low,High" line.long 0x08 "GPHUP,Pull-down disable register for port H" bitfld.long 0x08 10. " GPH10 ,Pull-down disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPH9 ,Pull-down disable for pin9" "Enabled,Disabled" bitfld.long 0x08 8. " GPH8 ,Pull-down disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPH7 ,Pull-down disable for pin7" "Enabled,Disabled" textline " " bitfld.long 0x08 6. " GPH6 ,Pull-down disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPH5 ,Pull-down disable for pin5" "Enabled,Disabled" bitfld.long 0x08 4. " GPH4 ,Pull-down disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPH3 ,Pull-down disable for pin3" "Enabled,Disabled" textline " " bitfld.long 0x08 2. " GPH2 ,Pull-down disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPH1 ,Pull-down disable for pin1" "Enabled,Disabled" bitfld.long 0x08 0. " GPH0 ,Pull-down disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0x70++0xb line.long 0x00 "GPHCON,Configure The Pins Of Port H" bitfld.long 0x00 28.--29. " GPH14 ,Pin14 mode" "Input,Output,CLKOUT1,?..." bitfld.long 0x00 26.--27. " GPH13 ,Pin13 mode" "Input,Output,CLKOUT0,?..." bitfld.long 0x00 24.--25. " GPH12 ,Pin12 mode" "Input,Output,EXTUARTCLK,?..." bitfld.long 0x00 22.--23. " GPH11 ,Pin11 mode" "Input,Output,nRTS1,nCTS1" textline " " bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,nCTS1,?..." bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,nRTS0,?..." bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,nCTS0,?..." bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD3,nCTS2" textline " " bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD3,nRTS2" bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD2,?..." bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD2,?..." bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD1,?..." textline " " bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD1,?..." bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,RXD0,?..." bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,TXD0,?..." line.long 0x04 "GPHDAT,The Data Register For Port H" bitfld.long 0x04 14. " GPH14 ,Port H pin 14 data" "Low,High" bitfld.long 0x04 13. " GPH13 ,Port H pin 13 data" "Low,High" bitfld.long 0x04 12. " GPH12 ,Port H pin 12 data" "Low,High" bitfld.long 0x04 11. " GPH11 ,Port H pin 11 data" "Low,High" textline " " bitfld.long 0x04 10. " GPH10 ,Port H pin 10 data" "Low,High" bitfld.long 0x04 9. " GPH9 ,Port H pin 9 data" "Low,High" bitfld.long 0x04 8. " GPH8 ,Port H pin 8 data" "Low,High" bitfld.long 0x04 7. " GPH7 ,Port H pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPH6 ,Port H pin 6 data" "Low,High" bitfld.long 0x04 5. " GPH5 ,Port H pin 5 data" "Low,High" bitfld.long 0x04 4. " GPH4 ,Port H pin 4 data" "Low,High" bitfld.long 0x04 3. " GPH3 ,Port H pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPH2 ,Port H pin 2 data" "Low,High" bitfld.long 0x04 1. " GPH1 ,Port H pin 1 data" "Low,High" bitfld.long 0x04 0. " GPH0 ,Port H pin 0 data" "Low,High" line.long 0x08 "GPHUDP,Pull-up/down Control Register For Port H" bitfld.long 0x08 28.--29. " GPH14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPH13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPH12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPH11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPH10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPH9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPH8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. " GPH7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. " GPH6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPH5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPH4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. " GPH3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. " GPH2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPH1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPH0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end tree "Port J" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) width 0xb group.long 0xd0++0xb line.long 0x00 "GPJCON,Configure the pins of port J" bitfld.long 0x00 20.--21. " GPJ10 ,Pin10 mode" "Input,Output,CAMRESET,?..." bitfld.long 0x00 18.--19. " GPJ9 ,Pin9 mode" "Input,Output,CAMCLKOUT,?..." bitfld.long 0x00 20.--21. " GPJ10 ,Pin10 mode" "Input,Output,CAMHREF,?..." bitfld.long 0x00 18.--19. " GPJ9 ,Pin9 mode" "Input,Output,CAMVSYNC,?..." textline " " bitfld.long 0x00 16.--17. " GPJ8 ,Pin8 mode" "Input,Output,CAMPCLK,?..." bitfld.long 0x00 14.--15. " GPJ7 ,Pin7 mode" "Input,Output,CAMDATA7,?..." bitfld.long 0x00 12.--13. " GPJ6 ,Pin6 mode" "Input,Output,CAMDATA6,?..." bitfld.long 0x00 10.--11. " GPJ5 ,Pin5 mode" "Input,Output,CAMDATA5,?..." textline " " bitfld.long 0x00 8.--9. " GPJ4 ,Pin4 mode" "Input,Output,CAMDATA4,?..." bitfld.long 0x00 6.--7. " GPJ3 ,Pin3 mode" "Input,Output,CAMDATA3,?..." bitfld.long 0x00 4.--5. " GPJ2 ,Pin2 mode" "Input,Output,CAMDATA2,?..." bitfld.long 0x00 2.--3. " GPJ1 ,Pin1 mode" "Input,Output,CAMDATA1,?..." textline " " bitfld.long 0x00 0.--1. " GPJ0 ,Pin0 mode" "Input,Output,CAMDATA0,?..." line.long 0x04 "GPJDAT,The data register for port J" bitfld.long 0x04 12. " GPJ12 ,Port J pin 12 data" "Low,High" bitfld.long 0x04 11. " GPJ11 ,Port J pin 11 data" "Low,High" bitfld.long 0x04 10. " GPJ10 ,Port J pin 10 data" "Low,High" bitfld.long 0x04 9. " GPJ9 ,Port J pin 9 data" "Low,High" textline " " bitfld.long 0x04 8. " GPJ8 ,Port J pin 8 data" "Low,High" bitfld.long 0x04 7. " GPJ7 ,Port J pin 7 data" "Low,High" bitfld.long 0x04 6. " GPJ6 ,Port J pin 6 data" "Low,High" bitfld.long 0x04 5. " GPJ5 ,Port J pin 5 data" "Low,High" textline " " bitfld.long 0x04 4. " GPJ4 ,Port J pin 4 data" "Low,High" bitfld.long 0x04 3. " GPJ3 ,Port J pin 3 data" "Low,High" bitfld.long 0x04 2. " GPJ2 ,Port J pin 2 data" "Low,High" bitfld.long 0x04 1. " GPJ1 ,Port J pin 1 data" "Low,High" textline " " bitfld.long 0x04 0. " GPJ0 ,Port J pin 0 data" "Low,High" line.long 0x08 "GPJUP,Pull-up disable register for port J" bitfld.long 0x08 12. " GPJ10 ,Pull-up disable for pin12" "Enabled,Disabled" bitfld.long 0x08 11. " GPJ10 ,Pull-up disable for pin11" "Enabled,Disabled" bitfld.long 0x08 10. " GPJ10 ,Pull-up disable for pin10" "Enabled,Disabled" bitfld.long 0x08 9. " GPJ9 ,Pull-up disable for pin9" "Enabled,Disabled" textline " " bitfld.long 0x08 8. " GPJ8 ,Pull-up disable for pin8" "Enabled,Disabled" bitfld.long 0x08 7. " GPJ7 ,Pull-up disable for pin7" "Enabled,Disabled" bitfld.long 0x08 6. " GPJ6 ,Pull-up disable for pin6" "Enabled,Disabled" bitfld.long 0x08 5. " GPJ5 ,Pull-up disable for pin5" "Enabled,Disabled" textline " " bitfld.long 0x08 4. " GPJ4 ,Pull-up disable for pin4" "Enabled,Disabled" bitfld.long 0x08 3. " GPJ3 ,Pull-up disable for pin3" "Enabled,Disabled" bitfld.long 0x08 2. " GPJ2 ,Pull-up disable for pin2" "Enabled,Disabled" bitfld.long 0x08 1. " GPJ1 ,Pull-up disable for pin1" "Enabled,Disabled" textline " " bitfld.long 0x08 0. " GPJ0 ,Pull-up disable for pin0" "Enabled,Disabled" width 0xb endif sif (cpu()=="S3C2443X") width 0xb group.long 0xd0++0xb line.long 0x00 "GPJCON,Configure the pins of port J" bitfld.long 0x00 30.--31. " GPJ15 ,Pin15 mode" "Input,Output,nSD0_WP,?..." bitfld.long 0x00 28.--29. " GPJ14 ,Pin14 mode" "Input,Output,nSD0_CD,?..." bitfld.long 0x00 26.--27. " GPJ13 ,Pin13 mode" "Input,Output,SD0_LED,?..." bitfld.long 0x00 24.--25. " GPJ12 ,Pin12 mode" "Input,Output,CAMRESET,?..." textline " " bitfld.long 0x00 22.--23. " GPJ11 ,Pin11 mode" "Input,Output,CAMCLKOUT,?..." bitfld.long 0x00 20.--21. " GPJ10 ,Pin10 mode" "Input,Output,CAMHREF,?..." bitfld.long 0x00 18.--19. " GPJ9 ,Pin9 mode" "Input,Output,CAMVSYNC,?..." bitfld.long 0x00 16.--17. " GPJ8 ,Pin8 mode" "Input,Output,CAMPCLK,?..." textline " " bitfld.long 0x00 14.--15. " GPJ7 ,Pin7 mode" "Input,Output,CAMDATA7,?..." bitfld.long 0x00 12.--13. " GPJ6 ,Pin6 mode" "Input,Output,CAMDATA6,?..." bitfld.long 0x00 10.--11. " GPJ5 ,Pin5 mode" "Input,Output,CAMDATA5,?..." bitfld.long 0x00 8.--9. " GPJ4 ,Pin4 mode" "Input,Output,CAMDATA4,?..." textline " " bitfld.long 0x00 6.--7. " GPJ3 ,Pin3 mode" "Input,Output,CAMDATA3,?..." bitfld.long 0x00 4.--5. " GPJ2 ,Pin2 mode" "Input,Output,CAMDATA2,?..." bitfld.long 0x00 2.--3. " GPJ1 ,Pin1 mode" "Input,Output,CAMDATA1,?..." bitfld.long 0x00 0.--1. " GPJ0 ,Pin0 mode" "Input,Output,CAMDATA0,?..." line.long 0x04 "GPJDAT,The data register for port J" bitfld.long 0x04 15. " GPJ15 ,Port J pin 15 data" "Low,High" bitfld.long 0x04 14. " GPJ14 ,Port J pin 14 data" "Low,High" bitfld.long 0x04 13. " GPJ13 ,Port J pin 13 data" "Low,High" bitfld.long 0x04 12. " GPJ12 ,Port J pin 12 data" "Low,High" textline " " bitfld.long 0x04 11. " GPJ11 ,Port J pin 11 data" "Low,High" bitfld.long 0x04 10. " GPJ10 ,Port J pin 10 data" "Low,High" bitfld.long 0x04 9. " GPJ9 ,Port J pin 9 data" "Low,High" bitfld.long 0x04 8. " GPJ8 ,Port J pin 8 data" "Low,High" textline " " bitfld.long 0x04 7. " GPJ7 ,Port J pin 7 data" "Low,High" bitfld.long 0x04 6. " GPJ6 ,Port J pin 6 data" "Low,High" bitfld.long 0x04 5. " GPJ5 ,Port J pin 5 data" "Low,High" bitfld.long 0x04 4. " GPJ4 ,Port J pin 4 data" "Low,High" textline " " bitfld.long 0x04 3. " GPJ3 ,Port J pin 3 data" "Low,High" bitfld.long 0x04 2. " GPJ2 ,Port J pin 2 data" "Low,High" bitfld.long 0x04 1. " GPJ1 ,Port J pin 1 data" "Low,High" bitfld.long 0x04 0. " GPJ0 ,Port J pin 0 data" "Low,High" line.long 0x08 "GPJUP,Pull-up/down disable register for port J" bitfld.long 0x08 30.--31. " GPH15 ,Pull-up/down Control For Pin 15" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 28.--29. " GPH14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPH13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPH12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPH11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPH10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPH9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPH8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. " GPH7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. " GPH6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPH5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPH4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. " GPH3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. " GPH2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPH1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPH0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb endif tree.end sif (cpu()=="S3C2443X") tree "Port L" width 0xb group.long 0xF0++0xb line.long 0x00 "GPLCON,Configure The Pins Of Port L" bitfld.long 0x00 28.--29. " GPL14 ,Pin14 mode" "Input,Output,SS1,?..." bitfld.long 0x00 26.--27. " GPL13 ,Pin13 mode" "Input,Output,SS0,?..." bitfld.long 0x00 24.--25. " GPL12 ,Pin12 mode" "Input,Output,SPIMISO1,?..." bitfld.long 0x00 22.--23. " GPL11 ,Pin11 mode" "Input,Output,SPIMOSI1,?..." textline " " bitfld.long 0x00 20.--21. " GPL10 ,Pin10 mode" "Input,Output,SPICLK1,?..." bitfld.long 0x00 18.--19. " GPL9 ,Pin9 mode" "Input,Output,SD0_CLK,?..." bitfld.long 0x00 16.--17. " GPL8 ,Pin8 mode" "Input,Output,SD0_CMD,?..." bitfld.long 0x00 14.--15. " GPL7 ,Pin7 mode" "Input,Output,SD0_DAT7,?..." textline " " bitfld.long 0x00 12.--13. " GPL6 ,Pin6 mode" "Input,Output,SD0_DAT6,?..." bitfld.long 0x00 10.--11. " GPL5 ,Pin5 mode" "Input,Output,SD0_DAT5,?..." bitfld.long 0x00 8.--9. " GPL4 ,Pin4 mode" "Input,Output,SD0_DAT4,?..." bitfld.long 0x00 6.--7. " GPL3 ,Pin3 mode" "Input,Output,SD0_DAT3,?..." textline " " bitfld.long 0x00 4.--5. " GPL2 ,Pin2 mode" "Input,Output,SD0_DAT2,?..." bitfld.long 0x00 2.--3. " GPL1 ,Pin1 mode" "Input,Output,SD0_DAT1,?..." bitfld.long 0x00 0.--1. " GPL0 ,Pin0 mode" "Input,Output,SD0_DAT0,?..." line.long 0x04 "GPLDAT,The Data Register For Port L" bitfld.long 0x04 14. " GPL14 ,Port L pin 14 data" "Low,High" bitfld.long 0x04 13. " GPL13 ,Port L pin 13 data" "Low,High" bitfld.long 0x04 12. " GPL12 ,Port L pin 12 data" "Low,High" bitfld.long 0x04 11. " GPL11 ,Port L pin 11 data" "Low,High" textline " " bitfld.long 0x04 10. " GPL10 ,Port L pin 10 data" "Low,High" bitfld.long 0x04 9. " GPL9 ,Port L pin 9 data" "Low,High" bitfld.long 0x04 8. " GPL8 ,Port L pin 8 data" "Low,High" bitfld.long 0x04 7. " GPL7 ,Port L pin 7 data" "Low,High" textline " " bitfld.long 0x04 6. " GPL6 ,Port L pin 6 data" "Low,High" bitfld.long 0x04 5. " GPL5 ,Port L pin 5 data" "Low,High" bitfld.long 0x04 4. " GPL4 ,Port L pin 4 data" "Low,High" bitfld.long 0x04 3. " GPL3 ,Port L pin 3 data" "Low,High" textline " " bitfld.long 0x04 2. " GPL2 ,Port L pin 2 data" "Low,High" bitfld.long 0x04 1. " GPL1 ,Port L pin 1 data" "Low,High" bitfld.long 0x04 0. " GPL0 ,Port L pin 0 data" "Low,High" line.long 0x08 "GPLUDP,Pull-up/down Control Register For Port L" bitfld.long 0x08 28.--29. " GPL14 ,Pull-up/down Control For Pin 14" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 26.--27. " GPL13 ,Pull-up/down Control For Pin 13" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 24.--25. " GPL12 ,Pull-up/down Control For Pin 12" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 22.--23. " GPL11 ,Pull-up/down Control For Pin 11" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 20.--21. " GPL10 ,Pull-up/down Control For Pin 10" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 18.--19. " GPL9 ,Pull-up/down Control For Pin 9" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 16.--17. " GPL8 ,Pull-up/down Control For Pin 8" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 14.--15. " GPL7 ,Pull-up/down Control For Pin 7" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 12.--13. " GPL6 ,Pull-up/down Control For Pin 6" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 10.--11. " GPL5 ,Pull-up/down Control For Pin 5" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 8.--9. " GPL4 ,Pull-up/down Control For Pin 4" "Pull-up,Disabled,Pull-down,Disabled" textline " " bitfld.long 0x08 6.--7. " GPL3 ,Pull-up/down Control For Pin 3" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 4.--5. " GPL2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 2.--3. " GPL1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x08 0.--1. " GPL0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb tree.end tree "Port M" width 0xb group.long 0x100++0x3 line.long 0x00 "GPMCON,Configure The Pins Of Port M" bitfld.long 0x00 2.--3. " GPM1 ,Pin1 mode" "GPM Input,GPM Input,FRnB,GPM Input" bitfld.long 0x00 0.--1. " GPM0 ,Pin0 mode" "GPM Input,GPM Input,RSMBWAIT,GPM Input" rgroup.long 0x104++0x3 line.long 0x00 "GPMDAT,The Data Register For Port M" bitfld.long 0x00 1. " GPM1 ,Port M pin 1 data" "Low,High" bitfld.long 0x00 0. " GPM0 ,Port M pin 0 data" "Low,High" group.long 0x108++0x3 line.long 0x00 "GPMUDP,Pull-up/down Control Register For Port M" bitfld.long 0x00 4.--5. " GPM2 ,Pull-up/down Control For Pin 2" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x00 2.--3. " GPM1 ,Pull-up/down Control For Pin 1" "Pull-up,Disabled,Pull-down,Disabled" bitfld.long 0x00 0.--1. " GPM0 ,Pull-up/down Control For Pin 0" "Pull-up,Disabled,Pull-down,Disabled" width 0xb tree.end endif tree "Common Registers" sif (cpu()=="S3C2440A") width 0xb textline " " group.long 0x80++0x7 line.long 0x00 "MISCCR,Miscellaneous control register" bitfld.long 0x00 20.--22. " BATT_FUNC ,Battery fault function selection (normal/sleep mode)" "Reset,Reset,Reset,Reset,Battery fault/wake-up,Battery fault/wake-up,No effect/Disable wake-up,nBATT_FLT disabled" textline " " bitfld.long 0x00 19. " OFFREFRESH ,Self refresh retain" "Disabled,Enabled" bitfld.long 0x00 18. " nEN_SCLK1 ,SCLK1 output enable" "SCLK,L level" bitfld.long 0x00 17. " nEN_SCLK0 ,SCLK0 output enable" "SCLK,L level" textline " " bitfld.long 0x00 16. " nRSTCON ,nRSTOUT signal manual control" "Low,High" bitfld.long 0x00 13. " SEL_SUSPND1 ,USB Port 1 mode" "Normal,Suspended" bitfld.long 0x00 12. " SEL_SUSPND0 ,USB Port 0 mode" "Normal,Suspended" textline " " bitfld.long 0x00 8.--10. " CLKSEL1 ,Select source clock with CLKOUT1 pad" "MPLL O,UPLL O,RTC CLK O,HCLK,PCLK,DCLK1,?..." bitfld.long 0x00 4.--6. " CLKSEL0 ,Select source clock with CLKOUT0 pad" "MPLL I CLK,UPLL O,FLCK,HCLK,PCLK,DCLK0,?..." bitfld.long 0x00 3. " SEL_USBPAD ,USB1 Host/Device select register" "Device,Host" textline " " bitfld.long 0x00 1. " SPUCR_1 ,DATA[31:16] port pull-down resister" "Enabled,Disabled" bitfld.long 0x00 0. " SPUCR_0 ,DATA[15:0] port pull-down resister" "Enabled,Disabled" line.long 0x04 "DCLKCON,DCLK0/1 control register" hexmask.long.byte 0x04 24.--27. 1. " DCLK1CMP ,DCLK1 Compare value clock toggle value" bitfld.long 0x04 20.--23. " DCLK1DIV ,DCLK1 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" bitfld.long 0x04 17. " DCLK1SELCK ,Select DCLK1 source clock" "PCLK,UCLK" textline " " bitfld.long 0x04 16. " DCLK1EN ,DCLK1 Enable" "Disabled,Enabled" hexmask.long.byte 0x04 8.--11. 1. " DCLK0CMP ,DCLK0 Compare value clock toggle value" bitfld.long 0x04 4.--7. " DCLK0DIV ,DCLK0 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" textline " " bitfld.long 0x04 1. " DCLK0SELCK ,Select DCLK0 source clock" "PCLK,UCLK" bitfld.long 0x04 0. " DCLK0EN ,DCLK0 Enable" "Disabled,Enabled" group.long 0x88++0xb line.long 0x00 "EXTINT0,External interrupt control register 0" bitfld.long 0x00 28.--30. " EINT7 ,Set the signaling method of the EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 24.--26. " EINT6 ,Set the signaling method of the EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 20.--22. " EINT5 ,Set the signaling method of the EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 16.--18. " EINT4 ,Set the signaling method of the EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 12.--14. " EINT3 ,Set the signaling method of the EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 8.--10. " EINT2 ,Set the signaling method of the EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 4.--6. " EINT1 ,Set the signaling method of the EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 0.--2. " EINT0 ,Set the signaling method of the EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x04 "EXTINT1,External interrupt control register 1" bitfld.long 0x04 31. " FLTEN15 ,Filter Enable for EINT15" "Disabled,Enabled" bitfld.long 0x04 28.--30. " EINT15 ,Set the signaling method of the EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 27. " FLTEN14 ,Filter Enable for EINT14" "Disabled,Enabled" textline " " bitfld.long 0x04 24.--26. " EINT14 ,Set the signaling method of the EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 23. " FLTEN13 ,Filter Enable for EINT13" "Disabled,Enabled" bitfld.long 0x04 20.--22. " EINT13 ,Set the signaling method of the EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 19. " FLTEN12 ,Filter Enable for EINT12" "Disabled,Enabled" bitfld.long 0x04 16.--18. " EINT12 ,Set the signaling method of the EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 15. " FLTEN11 ,Filter Enable for EINT11" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--14. " EINT11 ,Set the signaling method of the EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 11. " FLTEN10 ,Filter Enable for EINT10" "Disabled,Enabled" bitfld.long 0x04 8.--10. " EINT10 ,Set the signaling method of the EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 7. " FLTEN9 ,Filter Enable for EINT9" "Disabled,Enabled" bitfld.long 0x04 4.--6. " EINT9 ,Set the signaling method of the EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 3. " FLTEN8 ,Filter Enable for EINT8" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--2. " EINT8 ,Set the signaling method of the EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x08 "EXTINT2,External interrupt control register 2" bitfld.long 0x08 31. " FLTEN23 ,Filter Enable for EINT23" "Disabled,Enabled" bitfld.long 0x08 28.--30. " EINT23 ,Set the signaling method of the EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 27. " FLTEN22 ,Filter Enable for EINT22" "Disabled,Enabled" textline " " bitfld.long 0x08 24.--26. " EINT22 ,Set the signaling method of the EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 23. " FLTEN21 ,Filter Enable for EINT21" "Disabled,Enabled" bitfld.long 0x08 20.--22. " EINT21 ,Set the signaling method of the EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 19. " FLTEN20 ,Filter Enable for EINT20" "Disabled,Enabled" bitfld.long 0x08 16.--18. " EINT20 ,Set the signaling method of the EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 15. " FLTEN19 ,Filter Enable for EINT19" "Disabled,Enabled" textline " " bitfld.long 0x08 12.--14. " EINT19 ,Set the signaling method of the EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 11. " FLTEN18 ,Filter Enable for EINT18" "Disabled,Enabled" bitfld.long 0x08 8.--10. " EINT18 ,Set the signaling method of the EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 7. " FLTEN17 ,Filter Enable for EINT17" "Disabled,Enabled" bitfld.long 0x08 4.--6. " EINT17 ,Set the signaling method of the EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 3. " FLTEN16 ,Filter Enable for EINT16" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--2. " EINT16 ,Set the signaling method of the EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" hgroup.long 0x94++0x3 hide.long 0x00 "EINTFLT0,?..." hgroup.long 0x98++0x3 hide.long 0x00 "EINTFTL1,?..." group.long 0x9c++0x7 line.long 0x00 "EINTFLT2,External interrupt control register 2" hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19" textline " " bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18" textline " " bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 8.--14. 1. " EINTFLT17 ,Filter width of EINT17" textline " " bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16" line.long 0x04 "EINTFLT3,External interrupt control register 3" bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23" textline " " bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22" textline " " bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21" textline " " bitfld.long 0x04 7. " FLTCLK20 ,Filter clock of EINT20" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20" group.long 0xa4++0x7 line.long 0x00 "EINTMASK,External interrupt mask register" bitfld.long 0x00 23. " EINT23 ,External Interrupt 23" "Enabled,Masked" bitfld.long 0x00 22. " EINT22 ,External Interrupt 22" "Enabled,Masked" bitfld.long 0x00 21. " EINT21 ,External Interrupt 21" "Enabled,Masked" textline " " bitfld.long 0x00 20. " EINT20 ,External Interrupt 20" "Enabled,Masked" bitfld.long 0x00 19. " EINT19 ,External Interrupt 19" "Enabled,Masked" bitfld.long 0x00 18. " EINT18 ,External Interrupt 18" "Enabled,Masked" textline " " bitfld.long 0x00 17. " EINT17 ,External Interrupt 17" "Enabled,Masked" bitfld.long 0x00 16. " EINT16 ,External Interrupt 16" "Enabled,Masked" bitfld.long 0x00 15. " EINT15 ,External Interrupt 15" "Enabled,Masked" textline " " bitfld.long 0x00 14. " EINT14 ,External Interrupt 14" "Enabled,Masked" bitfld.long 0x00 13. " EINT13 ,External Interrupt 13" "Enabled,Masked" bitfld.long 0x00 12. " EINT12 ,External Interrupt 12" "Enabled,Masked" textline " " bitfld.long 0x00 11. " EINT11 ,External Interrupt 11" "Enabled,Masked" bitfld.long 0x00 10. " EINT10 ,External Interrupt 10" "Enabled,Masked" bitfld.long 0x00 9. " EINT9 ,External Interrupt 9" "Enabled,Masked" textline " " bitfld.long 0x00 8. " EINT8 ,External Interrupt 8" "Enabled,Masked" bitfld.long 0x00 7. " EINT7 ,External Interrupt 7" "Enabled,Masked" bitfld.long 0x00 6. " EINT6 ,External Interrupt 6" "Enabled,Masked" textline " " bitfld.long 0x00 5. " EINT5 ,External Interrupt 5" "Enabled,Masked" bitfld.long 0x00 4. " EINT4 ,External Interrupt 4" "Enabled,Masked" line.long 0x04 "EINTPEND,External interrupt pending register" eventfld.long 0x04 23. " EINT23 ,External Interrupt 23" "Not pending,Pending" eventfld.long 0x04 22. " EINT22 ,External Interrupt 22" "Not pending,Pending" eventfld.long 0x04 21. " EINT21 ,External Interrupt 21" "Not pending,Pending" textline " " eventfld.long 0x04 20. " EINT20 ,External Interrupt 20" "Not pending,Pending" eventfld.long 0x04 19. " EINT19 ,External Interrupt 19" "Not pending,Pending" eventfld.long 0x04 18. " EINT18 ,External Interrupt 18" "Not pending,Pending" textline " " eventfld.long 0x04 17. " EINT17 ,External Interrupt 17" "Not pending,Pending" eventfld.long 0x04 16. " EINT16 ,External Interrupt 16" "Not pending,Pending" eventfld.long 0x04 15. " EINT15 ,External Interrupt 15" "Not pending,Pending" textline " " eventfld.long 0x04 14. " EINT14 ,External Interrupt 14" "Not pending,Pending" eventfld.long 0x04 13. " EINT13 ,External Interrupt 13" "Not pending,Pending" eventfld.long 0x04 12. " EINT12 ,External Interrupt 12" "Not pending,Pending" textline " " eventfld.long 0x04 11. " EINT11 ,External Interrupt 11" "Not pending,Pending" eventfld.long 0x04 10. " EINT10 ,External Interrupt 10" "Not pending,Pending" eventfld.long 0x04 9. " EINT9 ,External Interrupt 9" "Not pending,Pending" textline " " eventfld.long 0x04 8. " EINT8 ,External Interrupt 8" "Not pending,Pending" eventfld.long 0x04 7. " EINT7 ,External Interrupt 7" "Not pending,Pending" eventfld.long 0x04 6. " EINT6 ,External Interrupt 6" "Not pending,Pending" textline " " eventfld.long 0x04 5. " EINT5 ,External Interrupt 5" "Not pending,Pending" eventfld.long 0x04 4. " EINT4 ,External Interrupt 4" "Not pending,Pending" group.long 0xac++0x03 line.long 0x00 "GSTATUS0,External pin status" bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High" bitfld.long 0x00 2. " NCON ,Status of NCON pin" "Low,High" bitfld.long 0x00 1. " RnB ,Status of RnB pin" "Low,High" bitfld.long 0x00 0. " BATT_FLT ,Status of BATT_FLT pin" "Low,High" group.long 0xb4++0xf line.long 0x00 "GSTATUS1,Chip ID" hexmask.long 0x00 0.--31. 1. " CHIP_ID ,Chip ID" line.long 0x04 "GSTATUS2,Reset status" eventfld.long 0x04 2. " WDTRST ,Boot caused by Watch Dog Reset" "No effect,Boot" eventfld.long 0x04 1. " SLEEPRST ,Boot caused by wakeup reset in sleep mode" "No effect,Boot" eventfld.long 0x04 0. " PWRST ,Boot caused by Power On Reset" "No effect,Boot" line.long 0x08 "GSTATUS3,Inform register" hexmask.long 0x08 0.--31. 1. " INFORM ,Inform register" line.long 0x0c "GSTATUS4,Infrom register" hexmask.long 0x0c 0.--31. 1. " INFORM ,Inform register" group.long 0xc4++0xb line.long 0x0 "DSC0,Strength control register 0" bitfld.long 0x00 31. " nEN_DSC ,Drive Strength Control Enable" "Enabled,Disabled" bitfld.long 0x00 8.--9. " DSC_ADR ,Address Bus Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 6.--7. " DSC_DATA3 ,DATA[31:24] I/O Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 4.--5. " DSC_DATA2 ,DATA[23:16] I/O Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 2.--3. " DSC_DATA1 ,DATA[15:8] I/O Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 0.--1. " DSC_DATA0 ,DATA[7:0] I/O Drive strength" "12mA,10mA,8mA,6mA" line.long 0x04 "DSC1,Strength control register 1" bitfld.long 0x04 28.--29. " DSC_SCK1 ,SCLK1 Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 26.--27. " DSC_SCK0 ,SCLK0 Drive strength" "16mA,12mA,8mA,6mA" bitfld.long 0x04 24.--25. " DSC_SCKE ,SCKE Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 22.--23. " DSC_SDR ,nSRAS/nSCAS Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 20.--21. " DSC_NFC ,Nand Flash Control Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 18.--19. " DSC_BE ,nBE[3:0] Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 16.--17. " DSC_WOE ,nWE/nOE Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 14.--15. " DSC_CS7 ,nGCS7 Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 12.--13. " DSC_CS6 ,nGCS6 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 10.--11. " DSC_CS5 ,nGCS5 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 8.--9. " DSC_CS4 ,nGCS4 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 6.--7. " DSC_CS3 ,nGCS3 Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 4.--5. " DSC_CS2 ,nGCS2 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 2.--3. " DSC_CS1 ,nGCS1 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 0.--1. " DSC_CS0 ,nGCS0 Drive strength" "10mA,8mA,6mA,4mA" line.long 0x08 "MSLCON,Memory sleep control register" bitfld.long 0x08 11. " PSC_DATA ,DATA[31:0] pin status in Sleep mode" "Tri-state,Low" bitfld.long 0x08 10. " PSC_WAIT ,nWAIT pin status in Sleep mode" "Input,Low" bitfld.long 0x08 9. " PSC_RnB ,RnB pin status in Sleep mode" "Input,Low" textline " " bitfld.long 0x08 8. " PSC_NF ,NAND Flash I/F pin status in Sleep mode" "Tri-state,Low" bitfld.long 0x08 7. " PSC_SDR ,nSRAS/ nSCAS pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 6. " PSC_DQM ,DQM[3:0]/nWE[3:0] pin status in Sleep mode" "Inactive,Tri-state" textline " " bitfld.long 0x08 5. " PSC_OE ,nOE pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 4. " PSC_WE ,nWE pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 3. " PSC_GCS0 ,nGCS[0] pin status in Sleep mode" "Inactive,Tri-state" textline " " bitfld.long 0x08 2. " PSC_GCS51 ,nGCS[5:1] pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 1. " PSC_GCS6 ,nGCS[6] pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 0. " PSC_GCS7 ,nGCS[7] pin status in Sleep mode" "Inactive,Tri-state" width 0xb endif sif (cpu()=="S3C2442B") width 0xb textline " " group.long 0x80++0x7 line.long 0x00 "MISCCR,Miscellaneous control register" bitfld.long 0x00 20.--22. " BATT_FUNC ,Battery fault function selection (normal/sleep mode)" "Reset,Reset,Reset,Reset,Battery fault/wake-up,Battery fault/wake-up,No effect/Disable wake-up,nBATT_FLT disabled" textline " " bitfld.long 0x00 19. " OFFREFRESH ,Self refresh retain" "Disabled,Enabled" bitfld.long 0x00 18. " nEN_SCLK1 ,SCLK1 output enable" "SCLK,L level" bitfld.long 0x00 17. " nEN_SCLK0 ,SCLK0 output enable" "SCLK,L level" textline " " bitfld.long 0x00 16. " nRSTCON ,nRSTOUT signal manual control" "Low,High" bitfld.long 0x00 13. " SEL_SUSPND1 ,USB Port 1 mode" "Normal,Suspended" bitfld.long 0x00 12. " SEL_SUSPND0 ,USB Port 0 mode" "Normal,Suspended" textline " " bitfld.long 0x00 8.--10. " CLKSEL1 ,Select source clock with CLKOUT1 pad" "MPLL O,UPLL O,RTC CLK O,HCLK,PCLK,DCLK1,?..." bitfld.long 0x00 4.--6. " CLKSEL0 ,Select source clock with CLKOUT0 pad" "MPLL I CLK,UPLL O,FLCK,HCLK,PCLK,DCLK0,?..." bitfld.long 0x00 3. " SEL_USBPAD ,USB1 Host/Device select register" "Device,Host" textline " " bitfld.long 0x00 1. " SPUCR_1 ,DATA[31:16] port pull-down resister" "Enabled,Disabled" bitfld.long 0x00 0. " SPUCR_0 ,DATA[15:0] port pull-down resister" "Enabled,Disabled" line.long 0x04 "DCLKCON,DCLK0/1 control register" hexmask.long.byte 0x04 24.--27. 1. " DCLK1CMP ,DCLK1 Compare value clock toggle value" bitfld.long 0x04 20.--23. " DCLK1DIV ,DCLK1 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" bitfld.long 0x04 17. " DCLK1SELCK ,Select DCLK1 source clock" "PCLK,UCLK" textline " " bitfld.long 0x04 16. " DCLK1EN ,DCLK1 Enable" "Disabled,Enabled" hexmask.long.byte 0x04 8.--11. 1. " DCLK0CMP ,DCLK0 Compare value clock toggle value" bitfld.long 0x04 4.--7. " DCLK0DIV ,DCLK0 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" textline " " bitfld.long 0x04 1. " DCLK0SELCK ,Select DCLK0 source clock" "PCLK,UCLK" bitfld.long 0x04 0. " DCLK0EN ,DCLK0 Enable" "Disabled,Enabled" group.long 0x88++0xb line.long 0x00 "EXTINT0,External interrupt control register 0" bitfld.long 0x00 28.--30. " EINT7 ,Set the signaling method of the EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 24.--26. " EINT6 ,Set the signaling method of the EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 20.--22. " EINT5 ,Set the signaling method of the EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 16.--18. " EINT4 ,Set the signaling method of the EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 12.--14. " EINT3 ,Set the signaling method of the EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 8.--10. " EINT2 ,Set the signaling method of the EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 4.--6. " EINT1 ,Set the signaling method of the EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x00 0.--2. " EINT0 ,Set the signaling method of the EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x04 "EXTINT1,External interrupt control register 1" bitfld.long 0x04 31. " FLTEN15 ,Filter Enable for EINT15" "Disabled,Enabled" bitfld.long 0x04 28.--30. " EINT15 ,Set the signaling method of the EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 27. " FLTEN14 ,Filter Enable for EINT14" "Disabled,Enabled" textline " " bitfld.long 0x04 24.--26. " EINT14 ,Set the signaling method of the EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 23. " FLTEN13 ,Filter Enable for EINT13" "Disabled,Enabled" bitfld.long 0x04 20.--22. " EINT13 ,Set the signaling method of the EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 19. " FLTEN12 ,Filter Enable for EINT12" "Disabled,Enabled" bitfld.long 0x04 16.--18. " EINT12 ,Set the signaling method of the EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 15. " FLTEN11 ,Filter Enable for EINT11" "Disabled,Enabled" textline " " bitfld.long 0x04 12.--14. " EINT11 ,Set the signaling method of the EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 11. " FLTEN10 ,Filter Enable for EINT10" "Disabled,Enabled" bitfld.long 0x04 8.--10. " EINT10 ,Set the signaling method of the EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 7. " FLTEN9 ,Filter Enable for EINT9" "Disabled,Enabled" bitfld.long 0x04 4.--6. " EINT9 ,Set the signaling method of the EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x04 3. " FLTEN8 ,Filter Enable for EINT8" "Disabled,Enabled" textline " " bitfld.long 0x04 0.--2. " EINT8 ,Set the signaling method of the EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x08 "EXTINT2,External interrupt control register 2" bitfld.long 0x08 31. " FLTEN23 ,Filter Enable for EINT23" "Disabled,Enabled" bitfld.long 0x08 28.--30. " EINT23 ,Set the signaling method of the EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 27. " FLTEN22 ,Filter Enable for EINT22" "Disabled,Enabled" textline " " bitfld.long 0x08 24.--26. " EINT22 ,Set the signaling method of the EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 23. " FLTEN21 ,Filter Enable for EINT21" "Disabled,Enabled" bitfld.long 0x08 20.--22. " EINT21 ,Set the signaling method of the EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 19. " FLTEN20 ,Filter Enable for EINT20" "Disabled,Enabled" bitfld.long 0x08 16.--18. " EINT20 ,Set the signaling method of the EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 15. " FLTEN19 ,Filter Enable for EINT19" "Disabled,Enabled" textline " " bitfld.long 0x08 12.--14. " EINT19 ,Set the signaling method of the EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 11. " FLTEN18 ,Filter Enable for EINT18" "Disabled,Enabled" bitfld.long 0x08 8.--10. " EINT18 ,Set the signaling method of the EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 7. " FLTEN17 ,Filter Enable for EINT17" "Disabled,Enabled" bitfld.long 0x08 4.--6. " EINT17 ,Set the signaling method of the EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" bitfld.long 0x08 3. " FLTEN16 ,Filter Enable for EINT16" "Disabled,Enabled" textline " " bitfld.long 0x08 0.--2. " EINT16 ,Set the signaling method of the EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" hgroup.long 0x94++0x3 hide.long 0x00 "EINTFLT0,?..." hgroup.long 0x98++0x3 hide.long 0x00 "EINTFTL1,?..." group.long 0x9c++0x7 line.long 0x00 "EINTFLT2,External interrupt control register 2" hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19" textline " " bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18" textline " " bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 8.--14. 1. " EINTFLT17 ,Filter width of EINT17" textline " " bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16" line.long 0x04 "EINTFLT3,External interrupt control register 3" bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23" textline " " bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22" textline " " bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21" textline " " bitfld.long 0x04 7. " FLTCLK20 ,Filter clock of EINT20" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20" group.long 0xa4++0x7 line.long 0x00 "EINTMASK,External interrupt mask register" bitfld.long 0x00 23. " EINT23 ,External Interrupt 23" "Enabled,Masked" bitfld.long 0x00 22. " EINT22 ,External Interrupt 22" "Enabled,Masked" bitfld.long 0x00 21. " EINT21 ,External Interrupt 21" "Enabled,Masked" textline " " bitfld.long 0x00 20. " EINT20 ,External Interrupt 20" "Enabled,Masked" bitfld.long 0x00 19. " EINT19 ,External Interrupt 19" "Enabled,Masked" bitfld.long 0x00 18. " EINT18 ,External Interrupt 18" "Enabled,Masked" textline " " bitfld.long 0x00 17. " EINT17 ,External Interrupt 17" "Enabled,Masked" bitfld.long 0x00 16. " EINT16 ,External Interrupt 16" "Enabled,Masked" bitfld.long 0x00 15. " EINT15 ,External Interrupt 15" "Enabled,Masked" textline " " bitfld.long 0x00 14. " EINT14 ,External Interrupt 14" "Enabled,Masked" bitfld.long 0x00 13. " EINT13 ,External Interrupt 13" "Enabled,Masked" bitfld.long 0x00 12. " EINT12 ,External Interrupt 12" "Enabled,Masked" textline " " bitfld.long 0x00 11. " EINT11 ,External Interrupt 11" "Enabled,Masked" bitfld.long 0x00 10. " EINT10 ,External Interrupt 10" "Enabled,Masked" bitfld.long 0x00 9. " EINT9 ,External Interrupt 9" "Enabled,Masked" textline " " bitfld.long 0x00 8. " EINT8 ,External Interrupt 8" "Enabled,Masked" bitfld.long 0x00 7. " EINT7 ,External Interrupt 7" "Enabled,Masked" bitfld.long 0x00 6. " EINT6 ,External Interrupt 6" "Enabled,Masked" textline " " bitfld.long 0x00 5. " EINT5 ,External Interrupt 5" "Enabled,Masked" bitfld.long 0x00 4. " EINT4 ,External Interrupt 4" "Enabled,Masked" line.long 0x04 "EINTPEND,External interrupt pending register" eventfld.long 0x04 23. " EINT23 ,External Interrupt 23" "Not pending,Pending" eventfld.long 0x04 22. " EINT22 ,External Interrupt 22" "Not pending,Pending" eventfld.long 0x04 21. " EINT21 ,External Interrupt 21" "Not pending,Pending" textline " " eventfld.long 0x04 20. " EINT20 ,External Interrupt 20" "Not pending,Pending" eventfld.long 0x04 19. " EINT19 ,External Interrupt 19" "Not pending,Pending" eventfld.long 0x04 18. " EINT18 ,External Interrupt 18" "Not pending,Pending" textline " " eventfld.long 0x04 17. " EINT17 ,External Interrupt 17" "Not pending,Pending" eventfld.long 0x04 16. " EINT16 ,External Interrupt 16" "Not pending,Pending" eventfld.long 0x04 15. " EINT15 ,External Interrupt 15" "Not pending,Pending" textline " " eventfld.long 0x04 14. " EINT14 ,External Interrupt 14" "Not pending,Pending" eventfld.long 0x04 13. " EINT13 ,External Interrupt 13" "Not pending,Pending" eventfld.long 0x04 12. " EINT12 ,External Interrupt 12" "Not pending,Pending" textline " " eventfld.long 0x04 11. " EINT11 ,External Interrupt 11" "Not pending,Pending" eventfld.long 0x04 10. " EINT10 ,External Interrupt 10" "Not pending,Pending" eventfld.long 0x04 9. " EINT9 ,External Interrupt 9" "Not pending,Pending" textline " " eventfld.long 0x04 8. " EINT8 ,External Interrupt 8" "Not pending,Pending" eventfld.long 0x04 7. " EINT7 ,External Interrupt 7" "Not pending,Pending" eventfld.long 0x04 6. " EINT6 ,External Interrupt 6" "Not pending,Pending" textline " " eventfld.long 0x04 5. " EINT5 ,External Interrupt 5" "Not pending,Pending" eventfld.long 0x04 4. " EINT4 ,External Interrupt 4" "Not pending,Pending" rgroup.long 0xac++0x07 line.long 0x00 "GSTATUS0,External pin status" bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High" bitfld.long 0x00 2. " NCON ,Status of NCON pin" "Low,High" bitfld.long 0x00 1. " RnB ,Status of RnB pin" "Low,High" bitfld.long 0x00 0. " BATT_FLT ,Status of BATT_FLT pin" "Low,High" line.long 0x04 "GSTATUS1,Chip ID" hexmask.long 0x04 0.--31. 1. " CHIP_ID ,Chip ID" group.long 0xb4++0xb line.long 0x00 "GSTATUS2,Reset status" eventfld.long 0x00 3. " DeepSTOPRST ,Boot caused by Deep STOP Mode" "No effect,Boot" eventfld.long 0x00 2. " WDTRST ,Boot caused by Watch Dog Reset" "No effect,Boot" eventfld.long 0x00 1. " OFFRST ,Boot caused by wakeup reset in sleep mode" "No effect,Boot" eventfld.long 0x00 0. " PWRST ,Boot caused by Power On Reset" "No effect,Boot" line.long 0x04 "GSTATUS3,Inform register" hexmask.long 0x04 0.--31. 1. " INFORM ,Inform register" line.long 0x08 "GSTATUS4,Infrom register" hexmask.long 0x08 0.--31. 1. " INFORM ,Inform register" group.long 0xc4++0xb line.long 0x0 "DSC0,Strength control register 0" bitfld.long 0x00 31. " nEN_DSC ,Drive Strength Control Enable" "Enabled,Disabled" bitfld.long 0x00 8.--9. " DSC_ADR ,Address Bus Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 6.--7. " DSC_DATA3 ,DATA[31:24] I/O Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 4.--5. " DSC_DATA2 ,DATA[23:16] I/O Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 2.--3. " DSC_DATA1 ,DATA[15:8] I/O Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 0.--1. " DSC_DATA0 ,DATA[7:0] I/O Drive strength" "12mA,10mA,8mA,6mA" line.long 0x04 "DSC1,Strength control register 1" bitfld.long 0x04 28.--29. " DSC_SCK1 ,SCLK1 Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 26.--27. " DSC_SCK0 ,SCLK0 Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 24.--25. " DSC_SCKE ,SCKE Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 22.--23. " DSC_SDR ,nSRAS/nSCAS Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 20.--21. " DSC_NFC ,Nand Flash Control Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 18.--19. " DSC_BE ,nBE[3:0] Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 16.--17. " DSC_WOE ,nWE/nOE Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 14.--15. " DSC_CS7 ,nGCS7 Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 12.--13. " DSC_CS6 ,nGCS6 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 10.--11. " DSC_CS5 ,nGCS5 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 8.--9. " DSC_CS4 ,nGCS4 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 6.--7. " DSC_CS3 ,nGCS3 Drive strength" "10mA,8mA,6mA,4mA" textline " " bitfld.long 0x04 4.--5. " DSC_CS2 ,nGCS2 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 2.--3. " DSC_CS1 ,nGCS1 Drive strength" "10mA,8mA,6mA,4mA" bitfld.long 0x04 0.--1. " DSC_CS0 ,nGCS0 Drive strength" "10mA,8mA,6mA,4mA" line.long 0x08 "MSLCON,Memory sleep control register" bitfld.long 0x08 11. " PSC_DATA ,DATA[31:0] pin status in Sleep mode" "Tri-state,Low" bitfld.long 0x08 10. " PSC_WAIT ,nWAIT pin status in Sleep mode" "Input,Low" bitfld.long 0x08 9. " PSC_RnB ,RnB pin status in Sleep mode" "Input,Low" textline " " bitfld.long 0x08 8. " PSC_NF ,NAND Flash I/F pin status in Sleep mode" "Tri-state,Low" bitfld.long 0x08 7. " PSC_SDR ,nSRAS/ nSCAS pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 6. " PSC_DQM ,DQM[3:0]/nWE[3:0] pin status in Sleep mode" "Inactive,Tri-state" textline " " bitfld.long 0x08 5. " PSC_OE ,nOE pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 4. " PSC_WE ,nWE pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 3. " PSC_GCS0 ,nGCS[0] pin status in Sleep mode" "Inactive,Tri-state" textline " " bitfld.long 0x08 2. " PSC_GCS51 ,nGCS[5:1] pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 1. " PSC_GCS6 ,nGCS[6] pin status in Sleep mode" "Inactive,Tri-state" bitfld.long 0x08 0. " PSC_GCS7 ,nGCS[7] pin status in Sleep mode" "Inactive,Tri-state" width 0xb endif sif (cpu()=="S3C2443X") width 0xb textline " " group.long 0x80++0x7 line.long 0x00 "MISCCR,Miscellaneous Control Register" bitfld.long 0x00 31. " HSSPI_EN2 ,HSSPI_EN2" "Low,High" bitfld.long 0x00 30. " nCD_CF ,nCD_CF Signal Register" "Detected,Not detected" textline " " bitfld.long 0x00 28. " LCD_SEL ,Display Type Select" "LCD,FIMD" bitfld.long 0x00 24. " FLT_I2C ,Clocked Noise Filter Enable for IIC" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " SEL_SUSPND0 ,USB Port 0 mode" "Normal,Suspended" bitfld.long 0x00 8.--10. " CLKSEL1 ,Select source clock with CLKOUT1 pad" "Reserved,Gated EPLL O,RTC clock O,HCLK,PCLK,DCLK1,?..." textline " " bitfld.long 0x00 4.--6. " CLKSEL0 ,Select source clock with CLKOUT0 pad" "MPLL I CLK,EPLL O,FLCK,HCLK,PCLK,DCLK0,OSC to PLL I,?..." line.long 0x04 "DCLKCON,DCLK0/1 control register" hexmask.long.byte 0x04 24.--27. 1. " DCLK1CMP ,DCLK1 Compare value clock toggle value" bitfld.long 0x04 20.--23. " DCLK1DIV ,DCLK1 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" textline " " bitfld.long 0x04 17. " DCLK1SELCK ,Select DCLK1 source clock" "PCLK,EPLL" bitfld.long 0x04 16. " DCLK1EN ,DCLK1 Enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 8.--11. 1. " DCLK0CMP ,DCLK0 Compare value clock toggle value" bitfld.long 0x04 4.--7. " DCLK0DIV ,DCLK0 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,SRCCLK/9,SRCCLK/10,SRCCLK/11,SRCCLK/12,SRCCLK/13,SRCCLK/14,SRCCLK/15,SRCCLK/16" textline " " bitfld.long 0x04 1. " DCLK0SELCK ,Select DCLK0 source clock" "PCLK,EPLL" bitfld.long 0x04 0. " DCLK0EN ,DCLK0 Enable" "Disabled,Enabled" group.long 0x88++0xb line.long 0x00 "EXTINT0,External interrupt control register 0" bitfld.long 0x00 31. " EINT7_GPF7 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 28.--30. " EINT7 ,Set the signaling method of the EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 27. " EINT6_GPF6 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 24.--26. " EINT6 ,Set the signaling method of the EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 23. " EINT5_GPF5 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 20.--22. " EINT5 ,Set the signaling method of the EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 19. " EINT4_GPF4 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 16.--18. " EINT4 ,Set the signaling method of the EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 15. " EINT3_GPF3 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 12.--14. " EINT3 ,Set the signaling method of the EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 11. " EINT2_GPF2 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 8.--10. " EINT2 ,Set the signaling method of the EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 7. " EINT1_GPF1 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 4.--6. " EINT1 ,Set the signaling method of the EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x00 3. " EINT0_GPF0 ,Pull-Down Enable Control" "Enabled,Disabled" bitfld.long 0x00 0.--2. " EINT0 ,Set the signaling method of the EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x04 "EXTINT1,External interrupt control register 1" bitfld.long 0x04 31. " EINT15_GPG7 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 28.--30. " EINT15 ,Set the signaling method of the EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 27. " EINT14_GPG6 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 24.--26. " EINT14 ,Set the signaling method of the EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 23. " EINT13_GPG5 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 20.--22. " EINT13 ,Set the signaling method of the EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 19. " EINT12_GPG4 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 16.--18. " EINT12 ,Set the signaling method of the EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 15. " EINT11_GPG3 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 12.--14. " EINT11 ,Set the signaling method of the EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 11. " EINT10_GPG2 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 8.--10. " EINT10 ,Set the signaling method of the EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 7. " EINT9_GPG1 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 4.--6. " EINT9 ,Set the signaling method of the EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x04 3. " EINT8_GPG0 ,Pull-Down Enable Control" "Disabled,Enabled" bitfld.long 0x04 0.--2. " EINT8 ,Set the signaling method of the EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" line.long 0x08 "EXTINT2,External interrupt control register 2" bitfld.long 0x08 31. " FLTEN23 ,Filter Enable for EINT23" "Disabled,Enabled" bitfld.long 0x08 28.--30. " EINT23 ,Set the signaling method of the EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 27. " FLTEN22 ,Filter Enable for EINT22" "Disabled,Enabled" bitfld.long 0x08 24.--26. " EINT22 ,Set the signaling method of the EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 23. " FLTEN21 ,Filter Enable for EINT21" "Disabled,Enabled" bitfld.long 0x08 20.--22. " EINT21 ,Set the signaling method of the EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 19. " FLTEN20 ,Filter Enable for EINT20" "Disabled,Enabled" bitfld.long 0x08 16.--18. " EINT20 ,Set the signaling method of the EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 15. " FLTEN19 ,Filter Enable for EINT19" "Disabled,Enabled" bitfld.long 0x08 12.--14. " EINT19 ,Set the signaling method of the EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 11. " FLTEN18 ,Filter Enable for EINT18" "Disabled,Enabled" bitfld.long 0x08 8.--10. " EINT18 ,Set the signaling method of the EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 7. " FLTEN17 ,Filter Enable for EINT17" "Disabled,Enabled" bitfld.long 0x08 4.--6. " EINT17 ,Set the signaling method of the EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" textline " " bitfld.long 0x08 3. " FLTEN16 ,Filter Enable for EINT16" "Disabled,Enabled" bitfld.long 0x08 0.--2. " EINT16 ,Set the signaling method of the EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge" group.long 0x9c++0x7 line.long 0x00 "EINTFLT2,External interrupt control register 2" bitfld.long 0x00 31. " FLTCLK19 ,Filter clock of EINT19" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19" textline " " bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18" textline " " bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 8.--14. 1. " EINTFLT17 ,Filter width of EINT17" textline " " bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16" line.long 0x04 "EINTFLT3,External interrupt control register 3" bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23" textline " " bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22" textline " " bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21" textline " " bitfld.long 0x04 7. " FLTCLK20 ,Filter clock of EINT20" "PCLK,EXTCLK/OSC_CLK" hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20" group.long 0xa4++0x7 line.long 0x00 "EINTMASK,External interrupt mask register" bitfld.long 0x00 23. " EINT23 ,External Interrupt 23" "Enabled,Masked" bitfld.long 0x00 22. " EINT22 ,External Interrupt 22" "Enabled,Masked" textline " " bitfld.long 0x00 21. " EINT21 ,External Interrupt 21" "Enabled,Masked" bitfld.long 0x00 20. " EINT20 ,External Interrupt 20" "Enabled,Masked" textline " " bitfld.long 0x00 19. " EINT19 ,External Interrupt 19" "Enabled,Masked" bitfld.long 0x00 18. " EINT18 ,External Interrupt 18" "Enabled,Masked" textline " " bitfld.long 0x00 17. " EINT17 ,External Interrupt 17" "Enabled,Masked" bitfld.long 0x00 16. " EINT16 ,External Interrupt 16" "Enabled,Masked" textline " " bitfld.long 0x00 15. " EINT15 ,External Interrupt 15" "Enabled,Masked" bitfld.long 0x00 14. " EINT14 ,External Interrupt 14" "Enabled,Masked" textline " " bitfld.long 0x00 13. " EINT13 ,External Interrupt 13" "Enabled,Masked" bitfld.long 0x00 12. " EINT12 ,External Interrupt 12" "Enabled,Masked" textline " " bitfld.long 0x00 11. " EINT11 ,External Interrupt 11" "Enabled,Masked" bitfld.long 0x00 10. " EINT10 ,External Interrupt 10" "Enabled,Masked" textline " " bitfld.long 0x00 9. " EINT9 ,External Interrupt 9" "Enabled,Masked" bitfld.long 0x00 8. " EINT8 ,External Interrupt 8" "Enabled,Masked" textline " " bitfld.long 0x00 7. " EINT7 ,External Interrupt 7" "Enabled,Masked" bitfld.long 0x00 6. " EINT6 ,External Interrupt 6" "Enabled,Masked" textline " " bitfld.long 0x00 5. " EINT5 ,External Interrupt 5" "Enabled,Masked" bitfld.long 0x00 4. " EINT4 ,External Interrupt 4" "Enabled,Masked" line.long 0x04 "EINTPEND,External interrupt pending register" eventfld.long 0x04 23. " EINT23 ,External Interrupt 23" "Not pending,Pending" eventfld.long 0x04 22. " EINT22 ,External Interrupt 22" "Not pending,Pending" textline " " eventfld.long 0x04 21. " EINT21 ,External Interrupt 21" "Not pending,Pending" eventfld.long 0x04 20. " EINT20 ,External Interrupt 20" "Not pending,Pending" textline " " eventfld.long 0x04 19. " EINT19 ,External Interrupt 19" "Not pending,Pending" eventfld.long 0x04 18. " EINT18 ,External Interrupt 18" "Not pending,Pending" textline " " eventfld.long 0x04 17. " EINT17 ,External Interrupt 17" "Not pending,Pending" eventfld.long 0x04 16. " EINT16 ,External Interrupt 16" "Not pending,Pending" textline " " eventfld.long 0x04 15. " EINT15 ,External Interrupt 15" "Not pending,Pending" eventfld.long 0x04 14. " EINT14 ,External Interrupt 14" "Not pending,Pending" textline " " eventfld.long 0x04 13. " EINT13 ,External Interrupt 13" "Not pending,Pending" eventfld.long 0x04 12. " EINT12 ,External Interrupt 12" "Not pending,Pending" textline " " eventfld.long 0x04 11. " EINT11 ,External Interrupt 11" "Not pending,Pending" eventfld.long 0x04 10. " EINT10 ,External Interrupt 10" "Not pending,Pending" textline " " eventfld.long 0x04 9. " EINT9 ,External Interrupt 9" "Not pending,Pending" eventfld.long 0x04 8. " EINT8 ,External Interrupt 8" "Not pending,Pending" textline " " eventfld.long 0x04 7. " EINT7 ,External Interrupt 7" "Not pending,Pending" eventfld.long 0x04 6. " EINT6 ,External Interrupt 6" "Not pending,Pending" textline " " eventfld.long 0x04 5. " EINT5 ,External Interrupt 5" "Not pending,Pending" eventfld.long 0x04 4. " EINT4 ,External Interrupt 4" "Not pending,Pending" rgroup.long 0xac++0x07 line.long 0x00 "GSTATUS0,External pin status" bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High" bitfld.long 0x00 2. " NCON ,Status of NCON pin" "Low,High" textline " " bitfld.long 0x00 1. " RnB ,Status of RnB pin" "Low,High" bitfld.long 0x00 0. " BATT_FLT ,Status of BATT_FLT pin" "Low,High" line.long 0x04 "GSTATUS1,Chip ID" hexmask.long 0x04 0.--31. 1. " CHIP_ID ,Chip ID" group.long 0xc0++0xF line.long 0x0 "DSC0,Strength control register 0" bitfld.long 0x00 31. " nEN_DSC ,Drive Strength Control Enable" "Enabled,Disabled" bitfld.long 0x00 28.--29. " PUD_CF ,nWE_CF/nOE_CF Driver Strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 26.--27. " DSC_nRBE ,nRBE Driver Strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 24.--25. " DSC_nROE ,nROE Driver Strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 22.--23. " DSC_nRWE ,nRWE Driver Strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 20.--21. " DSC_nRCS5 ,nRCS5 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 18.--19. " DSC_nRCS4 ,nRCS4 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 16.--17. " DSC_nRCS3 ,nRCS3 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 14.--15. " DSC_nRCS2 ,nRCS2 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 12.--13. " DSC_nRCS1 ,nRCS1 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 10.--11. " DSC_nRCS0 ,nRCS0 Address Bus Driver Strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 8.--9. " DSC_RADDRH ,ROM Address Bus 16-25 Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 6.--7. " DSC_RADDRL ,ROM Address Bus 1-15 Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 4.--5. " DSC_RADDR0 ,ROM Address Bus 0 Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x00 2.--3. " DSC_RDATA1 ,ROM DATA[15:8] I/O Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x00 0.--1. " DSC_RDATA0 ,ROM DATA[7:0] I/O Drive strength" "12mA,10mA,8mA,6mA" line.long 0x04 "DSC1,Strength control register 1" bitfld.long 0x04 26.--27. " DSC_nSCLK ,nSCLK Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 24.--25. " DSC_SCLK ,SCLK Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 22.--23. " DSC_SCKE ,SCKE Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 20.--21. " DSC_nSOE ,nSOE Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 18.--19. " DSC_nSWE ,nSWE Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 16.--17. " DSC_nSCAS ,nSCAS Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 14.--15. " DSC_nSRAS ,nSRAS Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 12.--13. " DSC_nSCS1 ,nGCS6 Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 10.--11. " DSC_nSCS0 ,nGCS5 Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 8.--9. " DSC_SADDR ,SADDR Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 6.--7. " DSC_SDATA3 ,SDATA[31:24] Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 4.--5. " DSC_SDATA2 ,SDATA[23:16] Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x04 2.--3. " DSC_SDATA1 ,SDATA[15:8] Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x04 0.--1. " DSC_SDATA0 ,SDATA[7:0] Driver strength" "12mA,10mA,8mA,6mA" line.long 0x08 "DSC2,Strength control register 2" bitfld.long 0x08 26.--27. " DSC_nFCE ,nFCE Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 24.--25. " DSC_nFRE ,nFRE Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 22.--23. " DSC_nFWE ,nFWE Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 20.--21. " DSC_ALE ,ALE Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 18.--19. " DSC_CLE ,CLE Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 14.--15. " DSC_RSMAVD ,RSMAVD Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 12.--13. " DSC_RSMCLK ,RSMCLK Drive strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 10.--11. " DSC_DQM3 ,DQM3 Drive strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 8.--9. " DSC_DQM2 ,DQM2 Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 6.--7. " DSC_DQM1 ,DQM1 Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 4.--5. " DSC_DQM0 ,DQM0 Driver strength" "12mA,10mA,8mA,6mA" bitfld.long 0x08 2.--3. " DSC_DQS1 ,DQS1 Driver strength" "12mA,10mA,8mA,6mA" textline " " bitfld.long 0x08 0.--1. " DSC_DQS0 ,DQS0 Driver strength" "12mA,10mA,8mA,6mA" line.long 0x0C "MSLCON,Memory I/F HiZ control register" bitfld.long 0x0C 31. " EN_PSCREG ,Memory I/F HiZ control register enable" "Disabled,Enabled" bitfld.long 0x0C 28.--29. " HizMemSel ,High Z Memory Selection" "Reserved,ROM/NF/CF MEM I/F,SDRAM MEM I/F,?..." textline " " bitfld.long 0x0C 27. " PSC_nSCLK ,nSCLK pin status" "Inactive,Hi-Z" bitfld.long 0x0C 26. " PSC_SCK ,SCLK/SCKE pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 25. " PSC_DQM ,DQM 3-0 pin status" "Inactive,Hi-Z" bitfld.long 0x0C 24. " PSC_DQS ,DQS pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 22. " PSC_nSWE ,nSWE pin status" "Inactive,Hi-Z" bitfld.long 0x0C 21. " PSC_SDR ,nSCAS/nSRAS pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 20. " PSC_nSCS1 ,nSCS1 pin status" "Inactive,Hi-Z" bitfld.long 0x0C 19. " PSC_nSCS0 ,nSCS0 pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 18. " PSC_SDATAH ,SDATA 31-16 pin status" "Iput,Hi-Z" bitfld.long 0x0C 17. " PSC_SDATAL ,SDATA 15-0 pin status" "Iput,Hi-Z" textline " " bitfld.long 0x0C 16. " PSC_SADDR ,SADDR 15-0 pin status" "Last adress R/W,Hi-Z" bitfld.long 0x0C 11. " PSC_NF1 ,nFCE/nFRE/nFWE pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 10. " PSC_NF0 ,ALE/CLE pin status" "Inactive,Hi-Z" bitfld.long 0x0C 9. " PSC_nRWE ,nRWE pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 8. " PSC_nROE ,nROE pin status" "Inactive,Hi-Z" bitfld.long 0x0C 7. " PSC_RSM ,RSMCLK/RSMAVD pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 6. " PSC_nRBE ,nRBE0 pin status" "Inactive,Hi-Z" bitfld.long 0x0C 5. " PSC_nRCS51 ,nRCS5 pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 4. " PSC_nRCS0 ,nRCS0 pin status" "Inactive,Hi-Z" bitfld.long 0x0C 3. " PSC_RDATA ,RADDR 0-15 pin status" "Inactive,Hi-Z" textline " " bitfld.long 0x0C 2. " PSC_RADDRH ,RADDR 16-25 pin status" "Inactive,Hi-Z" bitfld.long 0x0C 1. " PSC_RADDRL ,RADDR 1-15 pin status" "Inactive,Tri-state" textline " " bitfld.long 0x0C 0. " PSC_RADDR0 ,RADDR 0 pin status" "Inactive,Hi-Z" group.long 0xE8++0x3 line.long 0x00 "DATAPDEN,Pull-down Control Register For Port S/RDATA" bitfld.long 0x00 5. " DATAPDEN5 ,RDATA[15:0] pull-down enable control" "Disabled,Enabled" bitfld.long 0x00 4. " DATAPDEN4 ,SDATA[15:0] pull-down enable control" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " DATAPDEN3 ,SDATA[31:16] pull-down enable control" "Disabled,Enabled" bitfld.long 0x00 2. " DATAPDEN2 ,DQS[1:0] pull-down enable control" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DATAPDEN1 ,SCLK pull-down enable control" "Disabled,Enabled" bitfld.long 0x00 0. " DATAPDEN0 ,SCKE pull-down enable control" "Disabled,Enabled" width 0xb endif tree.end tree.end tree "PWM Timer (Pulse Width Modulation Timer)" base ad:0x51000000 width 8. group.long 0x00++0x7 line.long 0x00 "TCFG0,Timer Configuration Register 0" hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length" hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2 3 and 4" hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1" line.long 0x04 "TCFG1,Timer Configuration Register 1" bitfld.long 0x04 20.--23. " DMA_MODE ,Select DMA request channel" "Not selected,Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,?..." bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..." bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..." textline " " bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..." bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..." bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..." group.long 0x08++0x3 line.long 0x00 "TCON,Timer Control Register" bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval" bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated" bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started" textline " " bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval" bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On" bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated" textline " " bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started" bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval" bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On" textline " " bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated" bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started" bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval" textline " " bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On" bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated" bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started" textline " " bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled" bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval" bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On" textline " " bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated" bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started" group.long 0xC++0x7 "Timer 0" line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register" hexmask.long.word 0x00 0.--15. 1. " T0CNT ,Count buffer value for Timer 0" line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register" hexmask.long.word 0x04 0.--15. 1. " T0COM ,Compare buffer value for Timer 0" rgroup.long (0xC+0x8)++0x3 line.long 0x00 "TCNTO0,Timer 0 Count Observation Register" hexmask.long.word 0x00 0.--15. 1. " T0OBS ,Count observation value for Timer 0" group.long 0x18++0x7 "Timer 1" line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register" hexmask.long.word 0x00 0.--15. 1. " T1CNT ,Count buffer value for Timer 1" line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register" hexmask.long.word 0x04 0.--15. 1. " T1COM ,Compare buffer value for Timer 1" rgroup.long (0x18+0x8)++0x3 line.long 0x00 "TCNTO1,Timer 1 Count Observation Register" hexmask.long.word 0x00 0.--15. 1. " T1OBS ,Count observation value for Timer 1" group.long 0x24++0x7 "Timer 2" line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register" hexmask.long.word 0x00 0.--15. 1. " T2CNT ,Count buffer value for Timer 2" line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register" hexmask.long.word 0x04 0.--15. 1. " T2COM ,Compare buffer value for Timer 2" rgroup.long (0x24+0x8)++0x3 line.long 0x00 "TCNTO2,Timer 2 Count Observation Register" hexmask.long.word 0x00 0.--15. 1. " T2OBS ,Count observation value for Timer 2" group.long 0x30++0x7 "Timer 3" line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register" hexmask.long.word 0x00 0.--15. 1. " T3CNT ,Count buffer value for Timer 3" line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register" hexmask.long.word 0x04 0.--15. 1. " T3COM ,Compare buffer value for Timer 3" rgroup.long (0x30+0x8)++0x3 line.long 0x00 "TCNTO3,Timer 3 Count Observation Register" hexmask.long.word 0x00 0.--15. 1. " T3OBS ,Count observation value for Timer 3" group.long 0x3c++0x3 "Timer 4" line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register" hexmask.long.word 0x00 0.--15. 1. " T4CNT ,Count buffer value for Timer 4" rgroup.long 0x40++0x3 line.long 0x00 "TCNTO4,Timer 4 Count Observation Register" hexmask.long.word 0x00 0.--15. 1. " T4OBS ,Count observation value for Timer 4" width 0xb tree.end tree.open "UART (Universal Asynchronous Receiver/Transmitter)" tree "UART0" base ad:0x50000000 sif (cpu()=="S3C2440A")||(cpu()=="S3C2442B") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON0,UART Channel 0 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON0,UART Channel 0 Control Register" bitfld.long 0x00 12.--15. " FCLKDIV ,FCLK divider" "Reserved,FCLK/7,FCLK/8,FCLK/9,FCLK/10,FCLK/11,FCLK/12,FCLK/13,FCLK/14,FCLK/15,FCLK/16,FCLK/17,FCLK/18,FCLK/19,FCLK/20,FCLK/21" textline " " bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA0 requested,Disabled" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA0 requested,Disabled" group.long 0x08++0x3 line.long 0x00 "UFCON0,UART Channel 0 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" if (((d.l(ad:(0x50000000+0xc)))&0x10)==0x00) group.long 0x0c++0x3 line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active" else group.long 0x0c++0x3 line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" endif rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT0,UART Channel 0 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT0,UART Channel 0 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT0,UART Channel 0 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" rgroup.long 0x1c++0x3 line.long 0x00 "UMSTAT0,UART Channel 0 Modem Status Register" bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed" bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH0,UART Channel 0 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH0,UART Channel 0 Receive Buffer Register" in group.long 0x28++0x3 line.long 0x00 "UBRDIV0,Baud Rate Divisor Register 0" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" width 0xb endif sif (cpu()=="S3C2443X") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON0,UART Channel 0 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON0,UART Channel 0 Control Register" bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" group.long 0x08++0x3 line.long 0x00 "UFCON0,UART Channel 0 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" if (((d.l(ad:(0x50000000+0xc)))&0x10)==0x00) ;In UART Channel Modem Control Register (UMCON). Bit no 4. Definition for Auto flow Disabled or Enabled group.long 0x0c++0x3 line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active" else group.long 0x0c++0x3 line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register" bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "Rx 63 bytes,Rx 56 bytes,Rx 48 bytes,Rx 40 bytes,Rx 32 bytes,Rx 24 bytes,Rx 16 bytes,Rx 8 bytes" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" endif rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT0,UART Channel 0 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT0,UART Channel 0 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT0,UART Channel 0 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" rgroup.long 0x1c++0x3 line.long 0x00 "UMSTAT0,UART Channel 0 Modem Status Register" bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed" bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH0,UART Channel 0 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH0 ,UART Channel 0 Receive Buffer Register" in group.long 0x28++0x7 line.long 0x00 "UBRDIV0,Baud Rate Divisor Register 0" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" line.long 0x04 "UDIVSLOT0,Baud Rate Divisior Register 0" hexmask.long.word 0x04 0.--15. 1. " UDIVSLOT ,Select the slot number" width 0xb endif tree.end tree "UART1" base ad:0x50004000 sif (cpu()=="S3C2440A")||(cpu()=="S3C2442B") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON1,UART Channel 1 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON1,UART Channel 1 Control Register" bitfld.long 0x00 12.--15. " FCLKDIV ,FCLK divider" "Reserved,FCLK/22,FCLK/23,FCLK/24,FCLK/25,FCLK/26,FCLK/27,FCLK/28,FCLK/29,FCLK/30,FCLK/31,FCLK/32,FCLK/33,FCLK/34,FCLK/35,FCLK/36" textline " " bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,Disabled,DMA1 requested" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,Disabled,DMA1 requested" group.long 0x08++0x3 line.long 0x00 "UFCON1,UART Channel 1 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" if (((d.l(ad:(0x50004000+0xc)))&0x10)==0x00) group.long 0x0c++0x3 line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active" else group.long 0x0c++0x3 line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" endif rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT1,UART Channel 1 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT1,UART Channel 1 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT1,UART Channel 1 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" rgroup.long 0x1c++0x3 line.long 0x00 "UMSTAT1,UART Channel 1 Modem Status Register" bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed" bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH1,UART Channel 1 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH1,UART Channel 1 Receive Buffer Register" in group.long 0x28++0x3 line.long 0x00 "UBRDIV1,Baud Rate Divisor Register 1" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" width 0xb endif sif (cpu()=="S3C2443X") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON1,UART Channel 1 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON1,UART Channel 1 Control Register" bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" group.long 0x08++0x3 line.long 0x00 "UFCON1,UART Channel 1 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" if (((d.l(ad:(0x50004000+0xc)))&0x10)==0x00) ;In UART Channel Modem Control Register (UMCON). Bit no 4. Definition for Auto flow Disabled or Enabled group.long 0x0c++0x3 line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active" else group.long 0x0c++0x3 line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register" bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "Rx 63 bytes,Rx 56 bytes,Rx 48 bytes,Rx 40 bytes,Rx 32 bytes,Rx 24 bytes,Rx 16 bytes,Rx 8 bytes" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" endif rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT1,UART Channel 1 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT1,UART Channel 1 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT1,UART Channel 1 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" rgroup.long 0x1c++0x3 line.long 0x00 "UMSTAT1,UART Channel 1 Modem Status Register" bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed" bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH1,UART Channel 1 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH1 ,UART Channel 1 Receive Buffer Register" in group.long 0x28++0x7 line.long 0x00 "UBRDIV1,Baud Rate Divisor Register 1" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" line.long 0x04 "UDIVSLOT1,Baud Rate Divisior Register 1" hexmask.long.word 0x04 0.--15. 1. " UDIVSLOT ,Select the slot number" width 0xb endif tree.end tree "UART2" base ad:0x50008000 sif (cpu()=="S3C2440A")||(cpu()=="S3C2442B") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON2,UART Channel 2 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON2,UART Channel 2 Control Register" bitfld.long 0x00 15. " FCLKEN ,FCLK clock enable" "Disabled,Enabled" bitfld.long 0x00 12.--14. " FCLKDIV ,FCLK divider" "Reserved,FCLK/37,FCLK/38,FCLK/39,FCLK/40,FCLK/41,FCLK/42,FCLK/43" textline " " bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA3 requested,Disabled" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA3 requested,Disabled" group.long 0x08++0x3 line.long 0x00 "UFCON2,UART Channel 2 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT2,UART Channel 2 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT2,UART Channel 2 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT2,UART Channel 2 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH2,UART Channel 2 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH2,UART Channel 2 Receive Buffer Register" in group.long 0x28++0x3 line.long 0x00 "UBRDIV2,Baud Rate Divisor Register 2" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" width 0xb endif sif (cpu()=="S3C2443X") width 11. group.long 0x00++0x3 line.long 0x00 "ULCON2,UART Channel 2 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON2,UART Channel 2 Control Register" bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" group.long 0x08++0x3 line.long 0x00 "UFCON2,UART Channel 2 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" if (((d.l(ad:(0x50008000+0xc)))&0x10)==0x00) ;In UART Channel Modem Control Register (UMCON). Bit no 4. Definition for Auto flow Disabled or Enabled group.long 0x0c++0x3 line.long 0x00 "UMCON2,UART Channel 2 Modem Control Register" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active" else group.long 0x0c++0x3 line.long 0x00 "UMCON2,UART Channel 2 Modem Control Register" bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger Level" "Rx 63 bytes,Rx 56 bytes,Rx 48 bytes,Rx 40 bytes,Rx 32 bytes,Rx 24 bytes,Rx 16 bytes,Rx 8 bytes" bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled" endif rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT2,UART Channel 2 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT2,UART Channel 2 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT2,UART Channel 2 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" rgroup.long 0x1c++0x3 line.long 0x00 "UMSTAT2,UART Channel 2 Modem Status Register" bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed" bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH2,UART Channel 2 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH2 ,UART Channel 2 Receive Buffer Register" in group.long 0x28++0x7 line.long 0x00 "UBRDIV2,Baud Rate Divisor Register 2" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" line.long 0x04 "UDIVSLOT2,Baud Rate Divisior Register 2" hexmask.long.word 0x04 0.--15. 1. " UDIVSLOT ,Select the slot number" width 0xb endif tree.end sif (cpu()=="S3C2443X") tree "UART3" base ad:0x5000C000 width 11. group.long 0x00++0x3 line.long 0x00 "ULCON3,UART Channel 3 Line Control Register" bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA" bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0" textline " " bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame" bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits" group.long 0x04++0x3 line.long 0x00 "UCON3,UART Channel 3 Control Register" bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,FCLK/x" bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level" textline " " bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level" bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt" bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback" textline " " bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Send" textline " " bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA0 requested,DMA1 requested" group.long 0x08++0x3 line.long 0x00 "UFCON3,UART Channel 3 FIFO Control Register" bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte" bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte" textline " " bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset" bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset" textline " " bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled" rgroup.long 0x10++0x3 line.long 0x00 "UTRSTAT3,UART Channel 3 Tx/Rx Status Register" bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty" bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty" textline " " bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready" hgroup.long 0x14++0x3 hide.long 0x00 "UERSTAT3,UART Channel 3 Rx Error Status Register" in rgroup.long 0x18++0x3 line.long 0x00 "UFSTAT3,UART Channel 3 FIFO Status Register" bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full" hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count" textline " " bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full" hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count" wgroup.byte 0x20++0x0 line.byte 0x00 "UTXH3,UART Channel 3 Transmit Buffer Register" hexmask.byte 0x00 0.--7. 1. " TXDATA3 ,Transmit data for UART3" hgroup.byte 0x24++0x0 hide.byte 0x00 "URXH3 ,UART Channel 3 Receive Buffer Register" in group.long 0x28++0x7 line.long 0x00 "UBRDIV3,Baud Rate Divisor Register 3" hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value" line.long 0x04 "UDIVSLOT3,Baud Rate Divisior Register 3" hexmask.long.word 0x04 0.--15. 1. " UDIVSLOT ,Select the slot number" width 0xb tree.end endif tree.end tree.open "USB (Universal Serial Bus)" tree "USB Host Controller" base ad:0x49000000 width 22. rgroup.long 0x00++0x3 "Control And Status Group" line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register" hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification" group.long 0x04++0x13 line.long 0x0 "HcControl,HC Operating Modes Register" bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled" bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected" textline " " bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management" bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend" textline " " bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled" bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled" bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1" line.long 0x4 "HcCommandStatus,HC Status Register" bitfld.long 0x4 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3" bitfld.long 0x4 3. " OCR ,Ownership Change Request" "Not requested,Requested" textline " " bitfld.long 0x4 2. " BLF ,Bulk List Filled" "Not filled,Filled" bitfld.long 0x4 1. " CLF ,Control List Filled" "Not filled,Filled" textline " " bitfld.long 0x4 0. " HCR ,Host Controller Reset" "No effect,Reset" line.long 0x8 "HcInterruptStatus,HC Interrupt Status Register" bitfld.long 0x8 30. " OC ,Ownership Change" "No interrupt,Interrupt" bitfld.long 0x8 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt" textline " " bitfld.long 0x8 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt" bitfld.long 0x8 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt" textline " " bitfld.long 0x8 3. " RD ,Resume Detected" "No interrupt,Interrupt" bitfld.long 0x8 2. " SF ,Start of Frame" "No interrupt,Interrupt" textline " " bitfld.long 0x8 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt" bitfld.long 0x8 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt" line.long 0xC "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register" setclrfld.long 0xC 31. 0xC 31. 0x10 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled" textline " " setclrfld.long 0xC 30. 0xC 30. 0x10 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled" textline " " setclrfld.long 0xC 6. 0xC 6. 0x10 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled" textline " " setclrfld.long 0xC 5. 0xC 5. 0x10 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled" textline " " setclrfld.long 0xC 4. 0xC 4. 0x10 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled" textline " " setclrfld.long 0xC 3. 0xC 3. 0x10 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled" textline " " setclrfld.long 0xC 2. 0xC 2. 0x10 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled" textline " " setclrfld.long 0xC 1. 0xC 1. 0x10 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled" textline " " setclrfld.long 0xC 0. 0xC 0. 0x10 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled" group.long 0x18++0x3 "Memory Pointer Group" line.long 0x0 "HcHCCA,Host Controller Communication Area Physical Address Register" hexmask.long 0x0 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address" rgroup.long 0x1C++0x3 line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED" group.long 0x20++0xF line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED" line.long 0x4 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register" hexmask.long 0x4 4.--31. 0x10 " CCED ,Control Current ED" line.long 0x8 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register" hexmask.long 0x8 4.--31. 0x10 " BHED ,Bulk Head ED" line.long 0xC "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register" hexmask.long 0xC 4.--31. 0x10 " BCED ,Bulk Current ED" rgroup.long 0x30++0x3 line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register" hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head" group.long 0x34++0x3 "Frame Counter Group" line.long 0x0 "HcFmInterval,HC Frame Interval Register" bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet" hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval" rgroup.long 0x38++0x7 line.long 0x0 "HcFmRemaining,HC Frame Remaining Register" bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled" hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining" line.long 0x4 "HcFmNumber,HC Frame Number Register" hexmask.long.word 0x4 0.--15. 1. " FN ,Frame Number" group.long 0x40++0x7 line.long 0x0 "HcPeriodicStart,HC Periodic Start Register" hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start" line.long 0x4 "HcLSThreshold,HC LS Threshold Register" hexmask.long.word 0x4 0.--11. 1. " LST ,LS Threshold" group.long 0x48++0x13 "Root Hub Group" line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time" bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection" textline " " bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis" bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound" textline " " bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual" bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched" textline " " hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports" line.long 0x4 "HcRhDescriptorB,HC Root Hub Descriptor B Register" hexmask.long.word 0x4 16.--31. 1. " PPCM ,Port Power Control Mask" hexmask.long.word 0x4 0.--15. 1. " DR ,Device Removable" line.long 0x8 "HcRhStatus,HC Root Hub Status Register" bitfld.long 0x8 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared" textline " " eventfld.long 0x8 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred" textline " " bitfld.long 0x8 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on" textline " " bitfld.long 0x8 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set" textline " " bitfld.long 0x8 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent" textline " " bitfld.long 0x8 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off" line.long 0xc "HcRhPortStatus[1],HC Root Hub Port Status 1 Register" eventfld.long 0xc 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" textline " " eventfld.long 0xc 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0xc 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" textline " " eventfld.long 0xc 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0xc 16. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0xc 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0xc 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" textline " " bitfld.long 0xc 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0xc 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" textline " " bitfld.long 0xc 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0xc 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" textline " " bitfld.long 0xc 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" line.long 0x10 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register" eventfld.long 0x10 20. " PRSC ,Port Reset Status Change" "Not changed,Changed" textline " " eventfld.long 0x10 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed" textline " " eventfld.long 0x10 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed" textline " " eventfld.long 0x10 17. " PESC ,Port Enable Status Change" "Not changed,Changed" textline " " eventfld.long 0x10 16. " CSC ,Connect Status Change" "Not changed,Changed" textline " " bitfld.long 0x10 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear" textline " " bitfld.long 0x10 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set" textline " " bitfld.long 0x10 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set" textline " " bitfld.long 0x10 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear" textline " " bitfld.long 0x10 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set" textline " " bitfld.long 0x10 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set" textline " " bitfld.long 0x10 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear" rgroup.long 0xFC++0x3 line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register" width 0x0B tree.end sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) tree "USB Device Controller" base ad:0x52000000 width 20. group.byte 0x140++0x0 line.byte 0x00 "FUNC_ADDR_REG,Function Address Register" bitfld.byte 0x00 7. " ADDR_UPDATE ,FUNCTION_ADDR update" "Not updated,Updated" hexmask.byte 0x00 0.--6. 1. " FUNCTION_ADDR ,Unique address assigned by host" group.byte 0x144++0x0 line.byte 0x00 "PWR_REG,Power Management Register" bitfld.byte 0x00 3. " USB_RESET ,USB Reset" "No reset,Reset" bitfld.byte 0x00 2. " MCU_RESUME ,MCU resume signal" "Not sent,Sent" textline " " bitfld.byte 0x00 1. " SUSPEND_MODE ,Suspend mode on/off" "On,Off" bitfld.byte 0x00 0. " SUSPEND_EN ,Suspend mode enable control" "Disabled,Enabled" group.byte 0x148++0x0 line.byte 0x00 "EP_INT_REG,EP Interrupt Pending/Clear Register" eventfld.byte 0x00 4. " EP4INT ,Endpoint 4 interrupt" "No interrupt,Interrupt" eventfld.byte 0x00 3. " EP3INT ,Endpoint 3 interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 2. " EP2INT ,Endpoint 2 interrupt" "No interrupt,Interrupt" eventfld.byte 0x00 1. " EP1INT ,Endpoint 1 interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " EP0INT ,Endpoint 0 interrupt" "No interrupt,Interrupt" group.byte 0x158++0x0 line.byte 0x00 "USB_INT_REG,USB Interrupt Pending/Clear Register" eventfld.byte 0x00 2. " RESET_INT ,RESET interrupt" "No interrupt,Interrupt" eventfld.byte 0x00 1. " RESUME_INT ,RESUME interrupt" "No interrupt,Interrupt" textline " " eventfld.byte 0x00 0. " SUSP_INT ,SUSPEND interrupt" "No interrupt,Interrupt" group.byte 0x15c++0x0 line.byte 0x00 "EP_INT_EN_REG,Endpoint Interrupt Enable Register" bitfld.byte 0x00 4. " EP4_INT_EN ,EP4 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " EP3_INT_EN ,EP3 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 2. " EP2_INT_EN ,EP2 interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 1. " EP1_INT_EN ,EP1 interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " EP0_INT_EN ,EP0 interrupt enable" "Disabled,Enabled" group.byte 0x16c++0x0 line.byte 0x00 "USB_INT_EN_REG,USB Interrupt Enable Register" bitfld.byte 0x00 2. " RESET_INT_EN ,Reset interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0. " SUSPEND_INT_EN ,Suspend interrupt enable" "Disabled,Enabled" rgroup.byte 0x170++0x0 line.byte 0x00 "FRAME_NUM1_REG,Frame number 1 register" hexmask.byte 0x00 0.--7. 1. " FRAME_NUM1 ,Frame number lower byte value" rgroup.byte 0x174++0x0 line.byte 0x00 "FRAME_NUM2_REG,Frame number 2 register" hexmask.byte 0x00 0.--7. 1. " FRAME_NUM2 ,Frame number higher byte value" group.byte 0x178++0x0 line.byte 0x00 "INDEX_REG,Index Register" hexmask.byte 0x00 0.--7. 1. " INDEX ,Indicate a certain endpoint" group.byte 0x180++0x0 line.byte 0x00 "MAXP_REG,End Point MAX packet register" bitfld.byte 0x00 0.--3. " MAXP ,End Point MAX packet" "Reserved,8 Byte,16 Byte,Reserved,32 Byte,Reserved,Reserved,Reserved,64 Bytes,?..." if (((d.b(ad:(0x52000000+0x178)))&0xff)==0x00) group.byte 0x184++0x0 line.byte 0x00 "EP0_CSR,Endpoint 0 Status Register" bitfld.byte 0x00 7. " SERVICED_SETUP_END ,SETUP_END clear bit" "Not cleared,Cleared" bitfld.byte 0x00 6. " SERVICED_OUT_PKT_RDY ,OUT_PKT_RDY clear bit" "Not cleared,Cleared" textline " " bitfld.byte 0x00 5. " SEND_STALL ,STALL condition" "Finished,Not finished" bitfld.byte 0x00 4. " SETUP_END ,Control transfer ends before DATA_END set" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 3. " DATA_END ,End of data" "No data end,Data end" bitfld.byte 0x00 2. " SENT_STALL ,Control transaction is stopped due to a protocol violation" "No interrupt,Interrupt" textline " " bitfld.byte 0x00 1. " IN_PKT_RDY ,Packet of data written into EP0 FIFO" "Not written,Written" bitfld.byte 0x00 0. " OUT_PKT_RDY ,Valid token written to the FIFO" "Not written,Written" else group.byte 0x184++0x0 line.byte 0x00 "IN_CSR1_REG,IN Endpoint control status register 1" bitfld.byte 0x00 6. " CLR_DATA_TOGGLE ,Data Toggle" "DATA0/1,DATA0" bitfld.byte 0x00 5. " SENT_STALL ,IN token issues a STALL handshake" "Not issued,Issued" textline " " bitfld.byte 0x00 4. " SEND_STALL ,STALL condition" "Finished,Not finished" bitfld.byte 0x00 3. " FIFO_FLUSH ,Packet in Input-related FIFO flush" "Flushed,Not flushed" textline " " bitfld.byte 0x00 0. " IN_PKT_RDY ,Packet of data written into the FIFO" "Not written,Written" endif group.byte 0x188++0x0 line.byte 0x00 "IN_CSR2_REG,IN Endpoint control status register 2" bitfld.byte 0x00 7. " AUTO_SET ,MAXP data written" "Not written,Written" bitfld.byte 0x00 6. " ISO ,Used only for endpoints whose transfer type is programmable" "Bulk mode,?..." textline " " bitfld.byte 0x00 5. " MODE_IN ,Used only for endpoints whose direction is programmable" "Out,In" bitfld.byte 0x00 4. " IN_DMA_INT_EN ,Interrupt when EP1 IN_PKT_RDY condition happens" "Enabled,Disabled" group.byte 0x190++0x0 line.byte 0x00 "OUT_CSR1_REG,EP Out Control Status Register 1" bitfld.byte 0x00 7. " CLR_DATA_TOGGLE ,Data toggle sequence bit is reset to DATA0" "No reset,Reset" bitfld.byte 0x00 6. " SENT_STALL ,OUT token is ended with a STALL handshake" "Not ended,Ended" textline " " bitfld.byte 0x00 5. " SEND_STALL ,STALL condition handshake" "Ended,Not ended" bitfld.byte 0x00 4. " FIFO_FLUSH ,FIFO flush" "Not flushed,Flushed" textline " " bitfld.byte 0x00 0. " OUT_PKT_RDY ,Packet of data loaded into the FIFO" "Not loaded,Loaded" group.byte 0x194++0x0 line.byte 0x00 "OUT_CSR2_REG,Endpoint Out Control Status Register 2" bitfld.byte 0x00 7. " AUTO_CLR ,MCU reads data from the OUT FIFO" "Not read,Read" bitfld.byte 0x00 6. " ISO ,Determine endpoint transfer type" "Bulk mode,?..." textline " " bitfld.byte 0x00 5. " OUT_DMA_INT_MASK ,Determine whether the interrupt should be issued or not" "Enabled,Disabled" hgroup.byte 0x198++0x0 hide.byte 0x00 "OUT_FIFO_CNT1_REG,Endpoint Out Write Count Register 1" in hgroup.byte 0x19c++0x0 hide.byte 0x00 "OUT_FIFO_CNT2_REG,Endpoint Out Write Count Register 2" in tree "Endpoints 0-4 Registers" hgroup.byte 0x1c0++0x0 hide.byte 0x00 "EP0_FIFO_REG,Endpoint0 FIFO Register" in hgroup.byte 0x1c4++0x0 hide.byte 0x00 "EP1_FIFO_REG,Endpoint1 FIFO Register" in hgroup.byte 0x1c8++0x0 hide.byte 0x00 "EP2_FIFO_REG,Endpoint2 FIFO Register" in hgroup.byte 0x1cc++0x0 hide.byte 0x00 "EP3_FIFO_REG,Endpoint3 FIFO Register" in hgroup.byte 0x1d0++0x0 hide.byte 0x00 "EP4_FIFO_REG,Endpoint4 FIFO Register" in group.byte 0x200++0x0 "Endpoint 1" line.byte 0x00 "EP1_DMA_CON,EP1 DMA Interface Control Register" bitfld.byte 0x00 7. " RUN_OB ,DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running" bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running" textline " " bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running" bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA" group.byte (0x200+0x4)++0x0 line.byte 0x00 "EP1_DMA_UNIT,EP1 DMA Transfer Unit Counter Base Register" hexmask.byte 0x00 0.--7. 1. " EP1_UNIT_CNT ,EP DMA transfer unit counter value" group.byte (0x200+0x8)++0x0 line.byte 0x00 "EP1_DMA_FIFO,EP1 DMA transfer FIFO counter base register" hexmask.byte 0x00 0.--7. 1. " EP1_FIFO_CNT ,EP DMA transfer FIFO counter value" group.byte (0x200+0xc)++0x0 line.byte 0x00 "EP1_DMA_TTC_L,EP1 DMA total transfer counter(lower byte)" hexmask.byte 0x00 00.--07. 1. " EP1_TTC_L ,DMA total transfer count value (lower byte)" group.byte (0x200+0x10)++0x0 line.byte 0x00 "EP1_DMA_TTC_M,EP1 DMA total transfer counter(middle byte)" hexmask.byte 0x00 00.--07. 1. " EP1_TTC_M ,DMA total transfer count value (middle byte)" group.byte (0x200+0x14)++0x0 line.byte 0x00 "EP1_DMA_TTC_H,EP1 DMA total transfer counter(higher byte)" hexmask.byte 0x00 00.--03. 1. " EP1_TTC_H ,DMA total transfer count value (higher byte)" group.byte 0x218++0x0 "Endpoint 2" line.byte 0x00 "EP2_DMA_CON,EP2 DMA Interface Control Register" bitfld.byte 0x00 7. " RUN_OB ,DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running" bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running" textline " " bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running" bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA" group.byte (0x218+0x4)++0x0 line.byte 0x00 "EP2_DMA_UNIT,EP2 DMA Transfer Unit Counter Base Register" hexmask.byte 0x00 0.--7. 1. " EP2_UNIT_CNT ,EP DMA transfer unit counter value" group.byte (0x218+0x8)++0x0 line.byte 0x00 "EP2_DMA_FIFO,EP2 DMA transfer FIFO counter base register" hexmask.byte 0x00 0.--7. 1. " EP2_FIFO_CNT ,EP DMA transfer FIFO counter value" group.byte (0x218+0xc)++0x0 line.byte 0x00 "EP2_DMA_TTC_L,EP2 DMA total transfer counter(lower byte)" hexmask.byte 0x00 00.--07. 1. " EP2_TTC_L ,DMA total transfer count value (lower byte)" group.byte (0x218+0x10)++0x0 line.byte 0x00 "EP2_DMA_TTC_M,EP2 DMA total transfer counter(middle byte)" hexmask.byte 0x00 00.--07. 1. " EP2_TTC_M ,DMA total transfer count value (middle byte)" group.byte (0x218+0x14)++0x0 line.byte 0x00 "EP2_DMA_TTC_H,EP2 DMA total transfer counter(higher byte)" hexmask.byte 0x00 00.--03. 1. " EP2_TTC_H ,DMA total transfer count value (higher byte)" group.byte 0x240++0x0 "Endpoint 3" line.byte 0x00 "EP3_DMA_CON,EP3 DMA Interface Control Register" bitfld.byte 0x00 7. " RUN_OB ,DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running" bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running" textline " " bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running" bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA" group.byte (0x240+0x4)++0x0 line.byte 0x00 "EP3_DMA_UNIT,EP3 DMA Rransfer Unit Counter Base Register" hexmask.byte 0x00 0.--7. 1. " EP3_UNIT_CNT ,EP DMA transfer unit counter value" group.byte (0x240+0x8)++0x0 line.byte 0x00 "EP3_DMA_FIFO,EP3 DMA transfer FIFO counter base register" hexmask.byte 0x00 0.--7. 1. " EP3_FIFO_CNT ,EP DMA transfer FIFO counter value" group.byte (0x240+0xc)++0x0 line.byte 0x00 "EP3_DMA_TTC_L,EP3 DMA total transfer counter(lower byte)" hexmask.byte 0x00 00.--07. 1. " EP3_TTC_L ,DMA total transfer count value (lower byte)" group.byte (0x240+0x10)++0x0 line.byte 0x00 "EP3_DMA_TTC_M,EP3 DMA total transfer counter(middle byte)" hexmask.byte 0x00 00.--07. 1. " EP3_TTC_M ,DMA total transfer count value (middle byte)" group.byte (0x240+0x14)++0x0 line.byte 0x00 "EP3_DMA_TTC_H,EP3 DMA total transfer counter(higher byte)" hexmask.byte 0x00 00.--03. 1. " EP3_TTC_H ,DMA total transfer count value (higher byte)" group.byte 0x258++0x0 "Endpoint 4" line.byte 0x00 "EP4_DMA_CON,EP4 DMA Interface Control Register" bitfld.byte 0x00 7. " RUN_OB ,DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running" bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled" bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running" textline " " bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running" bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA" group.byte (0x258+0x4)++0x0 line.byte 0x00 "EP4_DMA_UNIT,EP4 DMA Rransfer Unit Counter Base Register" hexmask.byte 0x00 0.--7. 1. " EP4_UNIT_CNT ,EP DMA transfer unit counter value" group.byte (0x258+0x8)++0x0 line.byte 0x00 "EP4_DMA_FIFO,EP4 DMA transfer FIFO counter base register" hexmask.byte 0x00 0.--7. 1. " EP4_FIFO_CNT ,EP DMA transfer FIFO counter value" group.byte (0x258+0xc)++0x0 line.byte 0x00 "EP4_DMA_TTC_L,EP4 DMA total transfer counter(lower byte)" hexmask.byte 0x00 00.--07. 1. " EP4_TTC_L ,DMA total transfer count value (lower byte)" group.byte (0x258+0x10)++0x0 line.byte 0x00 "EP4_DMA_TTC_M,EP4 DMA total transfer counter(middle byte)" hexmask.byte 0x00 00.--07. 1. " EP4_TTC_M ,DMA total transfer count value (middle byte)" group.byte (0x258+0x14)++0x0 line.byte 0x00 "EP4_DMA_TTC_H,EP4 DMA total transfer counter(higher byte)" hexmask.byte 0x00 00.--03. 1. " EP4_TTC_H ,DMA total transfer count value (higher byte)" tree.end width 0xb tree.end endif sif (cpu()=="S3C2443X") tree "USB 2.0 Function" base ad:0x49800000 width 14. group.long 0x00++0xb line.long 0x00 "IR,Index Register" bitfld.long 0x00 0.--3. " INDEX ,Endpoint Number Select" "0,1,2,3,4,5,6,7,8,?..." line.long 0x04 "EIR,Endpoint Interrupt Register" eventfld.long 0x04 8. " EP8I ,Endpoint 8 Interrupt Flag" "Not occurred,Occurred" eventfld.long 0x04 7. " EP7I ,Endpoint 7 Interrupt Flag" "Not occurred,Occurred" textline " " eventfld.long 0x04 6. " EP6I ,Endpoint 6 Interrupt Flag" "Not occurred,Occurred" eventfld.long 0x04 5. " EP5I ,Endpoint 5 Interrupt Flag" "Not occurred,Occurred" textline " " eventfld.long 0x04 4. " EP4I ,Endpoint 4 Interrupt Flag" "Not occurred,Occurred" eventfld.long 0x04 3. " EP3I ,Endpoint 3 Interrupt Flag" "Not occurred,Occurred" textline " " eventfld.long 0x04 2. " EP2I ,Endpoint 2 Interrupt Flag" "Not occurred,Occurred" eventfld.long 0x04 1. " EP1I ,Endpoint 1 Interrupt Flag" "Not occurred,Occurred" textline " " eventfld.long 0x04 0. " EP0I ,Endpoint 0 Interrupt Flag" "Not occurred,Occurred" line.long 0x08 "EIER,Endpoint Interrupt Enable Register" bitfld.long 0x08 8. " EP8IE ,Endpoint 8 Interrupt Enable Flag" "Disabled,Enabled" bitfld.long 0x08 7. " EP7IE ,Endpoint 7 Interrupt Enable Flag" "Disabled,Enabled" textline " " bitfld.long 0x08 6. " EP6IE ,Endpoint 6 Interrupt Enable Flag" "Disabled,Enabled" bitfld.long 0x08 5. " EP5IE ,Endpoint 5 Interrupt Enable Flag" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " EP4IE ,Endpoint 4 Interrupt Enable Flag" "Disabled,Enabled" bitfld.long 0x08 3. " EP3IE ,Endpoint 3 Interrupt Enable Flag" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " EP2IE ,Endpoint 2 Interrupt Enable Flag" "Disabled,Enabled" bitfld.long 0x08 1. " EP1IE ,Endpoint 1 Interrupt Enable Flag" "Disabled,Enabled" textline " " bitfld.long 0x08 0. " EP0IE ,Endpoint 0 Interrupt Enable Flag" "Disabled,Enabled" rgroup.long 0x0C++0x7 line.long 0x00 "FAR,Function Address Register" hexmask.long.byte 0x00 0.--6. 1. " FA ,Function Address Register" line.long 0x04 "FNR,Frame Number Register" bitfld.long 0x04 14. " FTL ,Frame Timer Lock" "Not locked,Locked" bitfld.long 0x04 13. " SM ,SOF Missing" "No action,Locking" textline " " hexmask.long.word 0x04 0.--10. 1. " FN ,Frame Count Number" group.long 0x14++0x17 line.long 0x00 "EDR,Endpoint Direction Register" bitfld.long 0x00 8. " EP8DS ,Endpoint 8 Direction Select" "Rx,Tx" bitfld.long 0x00 7. " EP7DS ,Endpoint 7 Direction Select" "Rx,Tx" textline " " bitfld.long 0x00 6. " EP6DS ,Endpoint 6 Direction Select" "Rx,Tx" bitfld.long 0x00 5. " EP5DS ,Endpoint 5 Direction Select" "Rx,Tx" textline " " bitfld.long 0x00 4. " EP4DS ,Endpoint 4 Direction Select" "Rx,Tx" bitfld.long 0x00 3. " EP3DS ,Endpoint 3 Direction Select" "Rx,Tx" textline " " bitfld.long 0x00 2. " EP2DS ,Endpoint 2 Direction Select" "Rx,Tx" bitfld.long 0x00 1. " EP1DS ,Endpoint 1 Direction Select" "Rx,Tx" textline " " bitfld.long 0x00 0. " EP0DS ,Endpoint 0 Direction Select" "Rx,Tx" line.long 0x04 "TR,Test Register" bitfld.long 0x04 15. " VBUS ,Vbus On/Off" "Off,On" bitfld.long 0x04 13. " EUERR ,EB UNDERRUN Error" "No error,Error" textline " " bitfld.long 0x04 12. " PERR ,PID Error" "No error,Error" bitfld.long 0x04 4. " TMD ,Test Mode" "Normal,Test" textline " " bitfld.long 0x04 3. " TPS ,Test Packets" "Not transmited,Transmited" bitfld.long 0x04 2. " TKS ,Test K Select (transceiver port)" "Normal,High speed K" textline " " bitfld.long 0x04 1. " TJS ,Test J Select (transceiver port)" "Normal,High speed J" bitfld.long 0x04 0. " TSNS ,Test SE0 NAK Select (mode)" "Normal,High speed recive" line.long 0x08 "SSR,Test Register" eventfld.long 0x08 15. " BAERR ,Byte Align Error" "No error,Error" eventfld.long 0x08 14. " TMERR ,Timeout Error" "No error,Error" textline " " eventfld.long 0x08 13. " BSERR ,Bit Stuff Error" "No error,Error" eventfld.long 0x08 12. " TCERR ,Token CRC Error" "No error,Error" textline " " eventfld.long 0x08 11. " DCERR ,Data CRC Error" "No error,Error" eventfld.long 0x08 10. " EOERR ,EB OVERRUN Error" "No error,Error" textline " " eventfld.long 0x08 9. " VBUSOFF ,VBUS OFF" "No effect,Low" eventfld.long 0x08 8. " VBUSON ,VBUS ON" "No effect,High" textline " " eventfld.long 0x08 7. " TBM ,Toggle Bit Mismatch" "Not detected,Detected" bitfld.long 0x08 6. " DP ,DP Data Line State (D+ Line)" "Low,High" textline " " bitfld.long 0x08 5. " DM ,DM Data Line State (D- Line)" "Low,High" bitfld.long 0x08 4. " HSP ,Host Speed" "Full,High" textline " " eventfld.long 0x08 3. " SDE ,Speed Detection End (Detect Handshake)" "Not ended,Ended" eventfld.long 0x08 2. " HFRM ,Host Forced Resume" "Not sent,Sent" textline " " eventfld.long 0x08 1. " HFSUSP ,Host Forced Suspend" "Not detected,Detected" eventfld.long 0x08 0. " HFRES ,Host Forced Reset" "Not detected,Detected" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 14. " DTZIEN ,DMA Total Counter Zero Interrupt Enable" "Disabled,Enabled" bitfld.long 0x0C 12. " DIEN ,DUAL Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " VBUSOFFEN ,VBUS OFF Enable" "Disabled,Enabled" bitfld.long 0x0C 10. " VBUSONEN ,VBUS ON Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 9. " RWDE ,Reverse Write Data Enable" "Disabled,Enabled" bitfld.long 0x0C 8. " EIE ,Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " BIS ,Bus Interface Select" "8-bit,16-bit" bitfld.long 0x0C 6. " SPDEN ,Speed Detect End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 5. " RRDE ,Reverse Read Data Enable" "Disabled,Enabled" bitfld.long 0x0C 4. " IPS ,Interrupt Polarity Select" "Disabled,Enabled" textline " " bitfld.long 0x0C 2. " MFRM ,Resume by MCU" "Not generated,Generated" bitfld.long 0x0C 1. " HSUSPE ,Suspend Enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 0. " HRESE ,Reset Enable" "Disabled,Enabled" line.long 0x10 "EP0SR,EP0 Status Register" bitfld.long 0x10 6. " LWO ,Last Word Odd (invalid upper byte)" "Not occurred,Occurred" eventfld.long 0x10 4. " SHT ,Stall Handshake Transmitted" "Not sent,Sent" textline " " eventfld.long 0x10 1. " TST ,Tx successfully received" "Not received,Received" eventfld.long 0x10 0. " RSR ,Rx successfully received" "Not received,Received" line.long 0x14 "EP0CR,EP0 Control Register" bitfld.long 0x14 3. " TTE ,Tx Test Enable" "Disabled,Enabled" bitfld.long 0x14 2. " TSS ,Tx Toggle Set" "DATA PID 0,DATA PID 1" textline " " bitfld.long 0x14 1. " ESS ,Endpoint Stall Set" "Not set,Set" bitfld.long 0x14 0. " TZLS ,Tx Zero Length Set" "Not set,Set" hgroup.long 0x60++0x3 hide.long 0x00 "EP0BR,EP0 Buffer Register" in hgroup.long 0x64++0x3 hide.long 0x00 "EP1BR,EP1 Buffer Register" in hgroup.long 0x68++0x3 hide.long 0x00 "EP2BR,EP2 Buffer Register" in hgroup.long 0x6C++0x3 hide.long 0x00 "EP3BR,EP3 Buffer Register" in hgroup.long 0x70++0x3 hide.long 0x00 "EP4BR,EP4 Buffer Register" in hgroup.long 0x74++0x3 hide.long 0x00 "EP5BR,EP5 Buffer Register" in hgroup.long 0x78++0x3 hide.long 0x00 "EP6BR,EP6 Buffer Register" in hgroup.long 0x7C++0x3 hide.long 0x00 "EP7BR,EP7 Buffer Register" in hgroup.long 0x80++0x3 hide.long 0x00 "EP8BR,EP8 Buffer Register" in group.long 0x2C++0x3 line.long 0x00 "ESR,Endpoint Status Register" eventfld.long 0x0 15. " FUDR ,FIFO underflow" "Not empty,Empty" eventfld.long 0x0 14. " FOVF ,FIFO overflow" "Not full,Full" textline " " bitfld.long 0x0 11. " FPID ,First OUT Packet interrupt Disable in OUT DMA operation" "Disabled,Enabled" eventfld.long 0x0 10. " OSD ,OUT Start DMA Operation (first OUT packet)" "Not received,Received" textline " " eventfld.long 0x0 9. " DTCZ ,DMA Total Count Zero" "Not reach to 0,Reach to 0" eventfld.long 0x0 8. " SPT ,Short Packet Received" "Not received,Received" textline " " bitfld.long 0x0 7. " DOM ,Dual Operation Mode (max packet size)" "Normal,Dual" eventfld.long 0x0 6. " FFS ,FIFO Flushed" "Not flushed,Flushed" textline " " eventfld.long 0x0 5. " FSC ,Function Stall Condition" "Not sent,Sent" bitfld.long 0x0 4. " LWO ,Last Word Odd" "Read,Lb is only valid" textline " " bitfld.long 0x0 2.--3. " PSIF ,Packet Status In FIFO" "No packet,One,Two,Invalid" eventfld.long 0x0 1. " TPS ,Tx Packet Success" "Read,Transfered" textline " " bitfld.long 0x0 0. " RPS ,Rx Packet Success" "Read,Received" if (((d.l(ad:(0x49800000+0x30)))&0x100)==0x100) ;In Endpoint Control Register (ECR). Bit no 8. Definition for Bulk or ISO. group.long 0x30++0x3 line.long 0x00 "ECR,Endpoint Control Register" bitfld.long 0x00 12. " INPKTHLD ,USB send IN data to Host" "IN,NAK handshake" bitfld.long 0x00 11. " OUTPKTHLD ,USB accept OUT data from Host" "Accept,Not accept" textline " " bitfld.long 0x00 9.--10. " TNPMF ,Transaction Number Per Micro Frame" "Invalid,1,2,3" bitfld.long 0x00 8. " IME ,ISO mode Endpoint" "Bulk,ISO" textline " " bitfld.long 0x00 7. " DUEN ,Dual FIFO mode Enable" "Disabled,Enabled" bitfld.long 0x00 6. " FLUSH ,FIFO Flush" "Not flushed,Flushed" textline " " bitfld.long 0x00 5. " TTE ,TX Toggle Enable" "Disabled,Enabled" bitfld.long 0x00 3.--4. " TTS ,Toggle Select" "DATA PID 0,DATA PID 1,DATA PID 2,DATA PID M" textline " " bitfld.long 0x00 2. " CDP ,Clear Data PID Rx/Tx" "Not compared/transmited,Compared/Transmited" textline " " bitfld.long 0x00 1. " ESS ,Endpoint Stall Set" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TZLS ,TX Zero Length Set" "Not occurred,Occurred" else group.long 0x30++0x3 line.long 0x00 "ECR,Endpoint Control Register" bitfld.long 0x00 12. " INPKTHLD ,USB send IN data to Host" "IN,NAK handshake" bitfld.long 0x00 11. " OUTPKTHLD ,USB accept OUT data from Host" "Accept,Not accept" textline " " bitfld.long 0x00 9.--10. " TNPMF ,Transaction Number Per Micro Frame" "Invalid,1,2,3" bitfld.long 0x00 8. " IME ,ISO mode Endpoint" "Bulk,ISO" textline " " bitfld.long 0x00 7. " DUEN ,Dual FIFO mode Enable" "Disabled,Enabled" bitfld.long 0x00 6. " FLUSH ,FIFO Flush" "Not flushed,Flushed" textline " " bitfld.long 0x00 5. " TTE ,TX Toggle Enable" "Disabled,Enabled" bitfld.long 0x00 3.--4. " TTS ,Toggle Select" "DATA PID 0,DATA PID 1,?..." textline " " bitfld.long 0x00 2. " CDP ,Clear Data PID" "Not compared/transmited,Compared/Transmited" textline " " bitfld.long 0x00 1. " ESS ,Endpoint Stall Set" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " TZLS ,TX Zero Length Set" "Not occurred,Occurred" endif rgroup.long 0x34++0x3 line.long 0x00 "BRCR,Byte Read Count Register" hexmask.long.word 0x00 0.--9. 1. " RDCNT ,FIFO Read Byte Count" group.long 0x38++0x1b line.long 0x00 "BWCR,Byte Write Count Register" hexmask.long.word 0x00 0.--9. 1. " WRCNT ,FIFO Write Byte Count" line.long 0x04 "MPR,MAX Packet Register" hexmask.long.word 0x04 0.--10. 1. " MAXP ,MAX Packet" line.long 0x08 "DCR,DMA Control Register" bitfld.long 0x08 5. " ARDRD ,Auto Rx DMA Run set disable" "Set,Disabled" bitfld.long 0x08 4. " FMDE ,Burst Mode Enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " TDR ,Tx DMA Operation Run" "Stop,Run" bitfld.long 0x08 1. " RDR ,Rx DMA Operation Run" "Stop,Run" textline " " bitfld.long 0x08 0. " DEN ,DMA Operation Mode Enable" "Interrupt,DMA" line.long 0x0C "DTCR,DMA Transfer Counter Register" hexmask.long.word 0x0C 0.--15. 1. " DTCR ,DMA Transfer Counter Register" line.long 0x10 "DFCR,DMA FIFO Counter Register" hexmask.long.word 0x10 0.--15. 1. " DFCR ,DMA FIFO Counter Register" line.long 0x14 "DTTCR1,DMA Total Transfer Counter Register 1" hexmask.long.word 0x14 0.--15. 1. " DTTCR ,DMA Total Transfer Counter Register (Low)" line.long 0x18 "DTTCR2,DMA Total Transfer Counter Register 2" hexmask.long.word 0x18 0.--15. 1. " DTTCR ,DMA Total Transfer Counter Register (High)" group.long 0x84++0x7 line.long 0x00 "DICR,DMA Interface Counter Register" bitfld.long 0x00 4. " RELOAD_MBAR ,Select Reload Condiion" "End of Full DMA,Packet transfer" bitfld.long 0x00 2. " WORD_SWAP ,Half Word swapping" "Normal,Swap" textline " " bitfld.long 0x00 0.--1. " MAX_BURST ,Max Burst Length" "Single,INCR4,INCR8,INCR16" line.long 0x04 "MBAR,Memory Base Address Register" rgroup.long 0x8C++0x3 line.long 0x00 "MCAR,Memory Current Address Register" group.long 0x100++0x3 line.long 0x00 "FCON,Burst DMA transfer Control" bitfld.long 0x00 8. " DMAEN ,DMA enable" "Disabled,Enabled" bitfld.long 0x00 4. " TF_CLR ,TX fifo clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " RF_CLR ,RX fifo clear" "Not cleared,Cleared" rgroup.long 0x104++0x3 line.long 0x00 "FSTAT,Burst DMA transfer Status" bitfld.long 0x00 13. " TF_FULL ,TX FIFO Full" "Not full,Full" hexmask.long.byte 0x00 8.--12. 1. " TF_CNT ,Data in TX fifo" textline " " bitfld.long 0x00 5. " RF_FULL ,RX FIFO Full" "Not full,Full" hexmask.long.byte 0x00 0.--4. 1. " RF_CNT ,Data in RX fifo" width 0xb tree.end endif tree.end tree "Interrupt Controller" base ad:0x4a000000 sif (cpu()=="S3C2440A") width 11. group.long 0x00++0x03 line.long 0x00 "SRCPND,Source Pending Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 24. " INT_NFCON ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested" group.long 0x04++0x03 line.long 0x00 "INTMOD,Interrupt Mode Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 24. " INT_NNFCON ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 21. " INT_SDI ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 6. " INT_CAM ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 5. " EINT8_23 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ" group.long 0x08++0x03 line.long 0x00 "INTMSK,Interrupt Mask Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 24. " INT_NFCON ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 21. " INT_SDI ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 6. " INT_CAM ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked" group.long 0x0c++0x03 line.long 0x00 "PRIORITY,IRQ Priority Control Register" bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" textline " " bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 9.--10. " ARB_SEL1 ,Arbiter 1 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 7.--8. " ARB_SEL0 ,Arbiter 0 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" bitfld.long 0x00 6. " ARB_MODE6 ,Arbiter 6 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ARB_MODE5 ,Arbiter 5 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 4. " ARB_MODE4 ,Arbiter 4 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARB_MODE3 ,Arbiter 3 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 2. " ARB_MODE2 ,Arbiter 2 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARB_MODE1 ,Arbiter 1 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 0. " ARB_MODE0 ,Arbiter 0 group priority rotate enable" "Disabled,Enabled" group.long 0x10++0x3 line.long 0x00 "INTPND,Interrupt Pending Status Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 24. " INT_NFCON ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested" rgroup.long 0x14++0x3 line.long 0x00 "INTOFFSET,Interrupt Offset Register" bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 24. " INT_NFCON ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 21. " INT_SDI ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 20. " INT_DMA3 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 19. " INT_DMA2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 18. " INT_DMA1 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 17. " INT_DMA0 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 9. " INT_WDT_AC97 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 6. " INT_CAM ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 5. " EINT8_23 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High" group.long 0x18++0x3 line.long 0x00 "SUBSRCPND,Sub Source Pending Register" bitfld.long 0x00 14. " INT_AC97 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 13. " INT_WDT ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 12. " INT_CAM_P ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 11. " INT_CAM_C ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 10. " INT_ADC_S ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 9. " INT_TC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 8. " INT_ERR2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 7. " INT_TXD2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 6. " INT_RXD2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 5. " INT_ERR1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 4. " INT_TXD1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 3. " INT_RXD1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 2. " INT_ERR0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 1. " INT_TXD0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INT_RXD0 ,Interrupt request status" "Not requested,Requested" group.long 0x1c++0x3 line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register" bitfld.long 0x00 14. " INT_AC97 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 13. " INT_WDT ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 12. " INT_CAM_P ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 11. " INT_CAM_C ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " INT_ADC_S ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 9. " INT_TC ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 8. " INT_ERR2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 7. " INT_TXD2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " INT_RXD2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 5. " INT_ERR1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " INT_TXD1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 3. " INT_RXD1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " INT_ERR0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " INT_TXD0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 0. " INT_RXD0 ,Interrupt mask" "Not masked,Masked" width 0xb endif sif (cpu()=="S3C2442B") width 11. group.long 0x00++0x03 line.long 0x00 "SRCPND,Source Pending Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 24. " INT_NFCON ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested" group.long 0x04++0x03 line.long 0x00 "INTMOD,Interrupt Mode Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 24. " INT_NNFCON ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 21. " INT_SDI ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 9. " INT_WDT ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 6. " INT_CAM ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 5. " EINT8_23 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ" group.long 0x08++0x03 line.long 0x00 "INTMSK,Interrupt Mask Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 27. " INT_IIC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 24. " INT_NFCON ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 21. " INT_SDI ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 9. " INT_WDT ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 6. " INT_CAM ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 5. " EINT8_23 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked" group.long 0x0c++0x03 line.long 0x00 "PRIORITY,IRQ Priority Control Register" bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" textline " " bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 9.--10. " ARB_SEL1 ,Arbiter 1 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 7.--8. " ARB_SEL0 ,Arbiter 0 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" bitfld.long 0x00 6. " ARB_MODE6 ,Arbiter 6 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ARB_MODE5 ,Arbiter 5 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 4. " ARB_MODE4 ,Arbiter 4 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARB_MODE3 ,Arbiter 3 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 2. " ARB_MODE2 ,Arbiter 2 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARB_MODE1 ,Arbiter 1 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 0. " ARB_MODE0 ,Arbiter 0 group priority rotate enable" "Disabled,Enabled" group.long 0x10++0x3 line.long 0x00 "INTPND,Interrupt Pending Status Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 24. " INT_NFCON ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested" rgroup.long 0x14++0x3 line.long 0x00 "INTOFFSET,Interrupt Offset Register" bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 24. " INT_NFCON ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 21. " INT_SDI ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 20. " INT_DMA3 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 19. " INT_DMA2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 18. " INT_DMA1 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 17. " INT_DMA0 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 9. " INT_WDT ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 6. " INT_CAM ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 5. " EINT8_23 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High" group.long 0x18++0x3 line.long 0x00 "SUBSRCPND,Sub Source Pending Register" bitfld.long 0x00 12. " INT_CAM_P ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 11. " INT_CAM_C ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 10. " INT_ADC_S ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 9. " INT_TC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 8. " INT_ERR2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 7. " INT_TXD2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 6. " INT_RXD2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 5. " INT_ERR1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 4. " INT_TXD1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 3. " INT_RXD1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 2. " INT_ERR0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 1. " INT_TXD0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INT_RXD0 ,Interrupt request status" "Not requested,Requested" group.long 0x1c++0x3 line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register" bitfld.long 0x00 12. " INT_CAM_P ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 11. " INT_CAM_C ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 10. " INT_ADC_S ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " INT_TC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " INT_ERR2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 7. " INT_TXD2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 6. " INT_RXD2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 5. " INT_ERR1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " INT_TXD1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " INT_RXD1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " INT_ERR0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 1. " INT_TXD0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 0. " INT_RXD0 ,Interrupt mask" "Not masked,Masked" width 0xb endif sif (cpu()=="S3C2443X") width 11. group.long 0x00++0x03 line.long 0x00 "SRCPND,Source Pending Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 24. " INT_NAND ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI_0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 20. " INT_SDI_1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_CFCON ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 18. " INT_UART3 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested" group.long 0x04++0x03 line.long 0x00 "INTMOD,Interrupt Mode Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 24. " INT_NAND ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 21. " INT_SDI_0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 20. " INT_SDI_1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 19. " INT_CFCON ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 18. " INT_UART3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 17. " INT_DMA ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 6. " INT_CAM ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 5. " EINT8_23 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ" bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ" group.long 0x08++0x03 line.long 0x00 "INTMSK,Interrupt Mask Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 24. " INT_NAND ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 21. " INT_SDI_0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 20. " INT_SDI_1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 19. " INT_CFCON ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 18. " INT_UART3 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 17. " INT_DMA ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 6. " INT_CAM ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked" group.long 0x0c++0x03 line.long 0x00 "PRIORITY,IRQ Priority Control Register" bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" textline " " bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" bitfld.long 0x00 9.--10. " ARB_SEL1 ,Arbiter 1 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5" textline " " bitfld.long 0x00 7.--8. " ARB_SEL0 ,Arbiter 0 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3" bitfld.long 0x00 6. " ARB_MODE6 ,Arbiter 6 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " ARB_MODE5 ,Arbiter 5 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 4. " ARB_MODE4 ,Arbiter 4 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARB_MODE3 ,Arbiter 3 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 2. " ARB_MODE2 ,Arbiter 2 group priority rotate enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ARB_MODE1 ,Arbiter 1 group priority rotate enable" "Disabled,Enabled" bitfld.long 0x00 0. " ARB_MODE0 ,Arbiter 0 group priority rotate enable" "Disabled,Enabled" group.long 0x10++0x3 line.long 0x00 "INTPND,Interrupt Pending Status Register" bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 27. " INT_IIC ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 24. " INT_NAND ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 21. " INT_SDI_0 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 20. " INT_SDI_1 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 19. " INT_CFCON ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 18. " INT_UART3 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 9. " INT_WDT_AC97 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 6. " INT_CAM ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 5. " EINT8_23 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested" textline " " bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested" bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested" rgroup.long 0x14++0x3 line.long 0x00 "INTOFFSET,Interrupt Offset Register" bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 24. " INT_NAND ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 21. " INT_SDI_0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 20. " INT_SDI_1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 19. " INT_CFCON ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 18. " INT_UART3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 17. " INT_DMA ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 9. " INT_WDT_AC97 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 6. " INT_CAM ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 5. " EINT8_23 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High" textline " " bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High" bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High" group.long 0x18++0x3 line.long 0x00 "SUBSRCPND,Sub Source Pending Register" bitfld.long 0x00 28. " SINT_AC97 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 27. " SINT_WDT ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 26. " SINT_ERR3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 25. " SINT_TXD3 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 24. " SINT_RXD3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 23. " SINT_DMA5 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 22. " SINT_DMA4 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 21. " SINT_DMA3 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 20. " SINT_DMA2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 19. " SINT_DMA1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 18. " SINT_DMA0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 17. " SINT_LCD4 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 16. " SINT_LCD3 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 15. " SINT_LCD2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 14. " SINT_LCD1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 12. " SINT_CAM_P ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 11. " SINT_CAM_C ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 10. " SINT_ADC ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 9. " SINT_TC ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 8. " SINT_ERR2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 7. " SINT_TXD2 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 6. " SINT_RXD2 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 5. " SINT_ERR1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 4. " SINT_TXD1 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 3. " SINT_RXD1 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 2. " SINT_ERR0 ,Interrupt request status" "Not requested,Requested" textline " " bitfld.long 0x00 1. " SINT_TXD0 ,Interrupt request status" "Not requested,Requested" bitfld.long 0x00 0. " SINT_RXD0 ,Interrupt request status" "Not requested,Requested" group.long 0x1c++0x3 line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register" bitfld.long 0x00 28. " SINT_AC97 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 27. " SINT_WDT ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 26. " SINT_ERR3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 25. " SINT_TXD3 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 24. " SINT_RXD3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 23. " SINT_DMA5 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 22. " SINT_DMA4 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 21. " SINT_DMA3 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 20. " SINT_DMA2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 19. " SINT_DMA1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 18. " SINT_DMA0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 17. " SINT_LCD4 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " SINT_LCD3 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 15. " SINT_LCD2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 14. " SINT_LCD1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 12. " SINT_CAM_P ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 11. " SINT_CAM_C ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 10. " SINT_ADC ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 9. " SINT_TC ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 8. " SINT_ERR2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " SINT_TXD2 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 6. " SINT_RXD2 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 5. " SINT_ERR1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 4. " SINT_TXD1 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 3. " SINT_RXD1 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 2. " SINT_ERR0 ,Interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x00 1. " SINT_TXD0 ,Interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. " SINT_RXD0 ,Interrupt mask" "Not masked,Masked" width 0xb endif tree.end tree "LCD Controller" base ad:0x4d000000 sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) width 11. if (((d.l(ad:0x4d000000))&0x60)!=0x60) ; STN group.long 0x00++0x3 line.long 0x00 "LCDCON1,LCD Control 1 Register" hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status" hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates" textline " " bitfld.long 0x00 7. " MMODE ,Toggle rate of the VM" "Each frame,MVAL" bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel" textline " " bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp mono,2 bpp gray,4 bpp gray,8 bpp color,Packed 12 bpp color,Unpacked 12bpp color,16 bpp color,?..." bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled" else ; TFT group.long 0x00++0x3 line.long 0x00 "LCDCON1,LCD Control 1 Register" hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status" hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates" textline " " bitfld.long 0x00 7. " MMODE ,Toggle rate of the VM" "Each frame,MVAL" bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel" textline " " bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,?..." bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled" endif if (((d.l(ad:0x4d000000))&0x60)!=0x60) ; STN group.long 0x04++0xf line.long 0x00 "LCDCON2,LCD Control 2 Register" hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size" textline " " line.long 0x04 "LCDCON3,LCD Control 3 Register" bitfld.long 0x04 19.--20. " WDLY ,Delay between VLINE and VCLK" "16 HCLK,32 HCLK,48 HCLK,64 HCLK" hexmask.long.word 0x04 8.--18. 1. " HOZVAL ,LCD horizontal size" textline " " hexmask.long.byte 0x04 0.--7. 1. " LINEBLANK ,Line blank" line.long 0x08 "LCDCON4,LCD Control 4 Register" hexmask.long.byte 0x08 8.--15. 1. " MVAL ,Rate at which VM signal toggle" bitfld.long 0x08 0.--1. " WLH ,VLINE pulse's high level width" "16 HCLK,32 HCLK,48 HCLK,64 HCLK" line.long 0x0c "LCDCON5,LCD Control 5 Register" textline " " textline " " bitfld.long 0x0c 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising" bitfld.long 0x0c 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted" bitfld.long 0x0c 7. " INVVD ,VD pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 5. " INVPWREN ,PWREN signal polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 3. " PWREN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " BSWP ,Byte swap control" "Disabled,Enabled" textline " " bitfld.long 0x0c 0. " HWSWP ,Half-word swap control" "Disabled,Enabled" else ; TFT group.long 0x04++0xf line.long 0x00 "LCDCON2,LCD Control 2 Register" hexmask.long.byte 0x00 24.--31. 1. " VBPD ,Vertical back porch" hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size" textline " " hexmask.long.byte 0x00 6.--13. 1. " VFPD ,Vertical front porch" hexmask.long.byte 0x00 0.--5. 1. " VSPW ,Vertical sync pulse width" line.long 0x04 "LCDCON3,LCD Control 3 Register" hexmask.long.byte 0x04 19.--25. 1. " HBPD ,Horizontal back porch" hexmask.long.word 0x04 8.--18. 1. " HOZVAL ,Horizontal size of LCD panel" textline " " hexmask.long.byte 0x04 0.--7. 1. " HFPD ,Horizontal front porch" line.long 0x08 "LCDCON4,LCD Control 4 Register" hexmask.long.byte 0x08 0.--7. 1. " HSPW ,HSPW horizontal sync pulse width" line.long 0x0c "LCDCON5,LCD Control 5 Register" bitfld.long 0x0c 15.--16. " VSTATUS ,Vertical status" "VSYNC,BACK porch,ACTIVE,FRONT porch" bitfld.long 0x0c 13.--14. " HSTATUS ,Horizontal status" "HSYNC,BACK porch,Active,FRONT porch" textline " " bitfld.long 0x0c 12. " BPP24BL ,Order of 24 bpp video memory" "LSB valid,MSB valid" bitfld.long 0x0c 11. " FRM565 ,Format of 16 bpp output video data" "5:5:5:1,5:6:5" textline " " bitfld.long 0x0c 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising" bitfld.long 0x0c 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted" bitfld.long 0x0c 7. " INVVD ,VD pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 6. " INVVDEN ,VDEN signal polarity" "Normal,Inverted" bitfld.long 0x0c 5. " INVPWREN ,PWREN signal polarity" "Normal,Inverted" textline " " bitfld.long 0x0c 4. " INVLEND ,LEND signal polarity" "Normal,Inverted" bitfld.long 0x0c 3. " PWREN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x0c 2. " ENLEND ,LEND output signal enable" "Disabled,Enabled" bitfld.long 0x0c 1. " BSWP ,Byte swap control" "Disabled,Enabled" textline " " bitfld.long 0x0c 0. " HWSWP ,Half-word swap control" "Disabled,Enabled" endif group.long 0x14++0xb line.long 0x00 "LCDSADDR1,Frame Buffer Start Address 1 Register" hexmask.long.word 0x00 21.--29. 1. " LCDBANK ,Bank location for video buffer" hexmask.long 0x00 0.--20. 1. " LCDBASEU ,Start address of upper address counter" line.long 0x04 "LCDSADDR2,Frame Buffer Start Address 2 Register" hexmask.long 0x04 0.--20. 1. " LCDBASEL ,Start address of lower address counter" line.long 0x08 "LCDSADDR3,Frame Buffer Start Address 3 Register" hexmask.long.word 0x08 11.--21. 1. " OFFSIZE ,Virtual screen offset size" hexmask.long.word 0x08 0.--10. 1. " PAGEWIDTH ,Virtual screen page width" if (((d.l(ad:0x4d000000))&0x60)==0x60) ;TFT hgroup.long 0x20++0xb hide.long 0x0 "REDLUT,Red Lookup Table Register" hide.long 0x04 "GREENLUT,Green Lookup Table Register" hide.long 0x08 "BLUELUT,Blue Lookup Table Register" else group.long 0x20++0xb line.long 0x0 "REDLUT,Red Lookup Table Register" bitfld.long 0x0 28.--31. " REDVAL[28:31] ,Red combination 7 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 24.--27. " REDVAL[24:27] ,Red combination 6 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 20.--23. " REDVAL[20:23] ,Red combination 5 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 16.--19. " REDVAL[16:19] ,Red combination 4 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 12.--15. " REDVAL[12:15] ,Red combination 3 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 8.--11. " REDVAL[8:11] ,Red combination 2 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 4.--7. " REDVAL[4:7] ,Red combination 1 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 0.--3. " REDVAL[0:3] ,Red combination 0 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "GREENLUT,Green Lookup Table Register" bitfld.long 0x04 28.--31. " GREENVAL[28:31] ,Green combination 7 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. " GREENVAL[24:27] ,Green combination 6 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. " GREENVAL[20:23] ,Green combination 5 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 16.--19. " GREENVAL[16:19] ,Green combination 4 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. " GREENVAL[12:15] ,Green combination 3 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. " GREENVAL[8:11] ,Green combination 2 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 4.--7. " GREENVAL[4:7] ,Green combination 1 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " GREENVAL[0:3] ,Green combination 0 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "BLUELUT,Blue Lookup Table Register" bitfld.long 0x08 12.--15. " BLUEVAL[12:15] ,Blue combination 3 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " BLUEVAL[8:11] ,Blue combination 2 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. " BLUEVAL[4:7] ,Blue combination 1 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 0.--3. " BLUEVAL[0:3] ,Blue combination 0 shade" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif if (((d.l(ad:0x4d000000))&0x60)==0x60) ;TFT hgroup.long 0x4c++0x3 hide.long 0x0 "DITHMODE,Dithering Mode Register" group.long 0x50++0x3 line.long 0x00 "TPAL,Temporary Palette Register" bitfld.long 0x00 24. " TPALEN ,Temporary palette register enable" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " TPALVAL ,Temporary palette value (RED)" textline " " hexmask.long.byte 0x00 8.--15. 1. " TPALVAL ,Temporary palette value (GREEN)" hexmask.long.byte 0x00 0.--7. 1. " TPALVAL ,Temporary palette value (BLUE)" else group.long 0x4c++0x3 line.long 0x0 "DITHMODE,Dithering Mode Register" hexmask.long.tbyte 0x00 0.--18. 1. " DITHMODE ,Dithering mode" hgroup.long 0x50++0x3 hide.long 0x00 "TPAL,Temporary Palette Register" endif group.long 0x54++0xf line.long 0x00 "LCDINTPND,LCD Interrupt Pending Register" bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt pending" "Not pending,Pending" bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt pending" "Not pending,Pending" line.long 0x04 "LCDSRCPND,LCD Interrupt Source Pending Register" bitfld.long 0x04 1. " INT_FrSyn ,LCD frame synchronized interrupt source pending" "Not pending,Pending" bitfld.long 0x04 0. " INT_FiCnt ,LCD FIFO interrupt source pending" "Not pending,Pending" line.long 0x08 "LCDINTMSK,Interrupt Mask Register" bitfld.long 0x08 2. " FIWSEL ,Trigger level of LCD FIFO" "4 words,8 words" bitfld.long 0x08 1. " INT_FrSyn ,LCD frame synchronized interrupt mask" "Not masked,Masked" bitfld.long 0x08 0. " INT_FiCnt ,LCD FIFO interrupt mask" "Not masked,Masked" line.long 0x0c "TCONSEL,LPC3600/LCC3600 Control Register" bitfld.long 0x0c 11. " LCC_TEST2 ,LCC3600 test mode 2" "Low,High" bitfld.long 0x0c 10. " LCC_TEST1 ,LCC3600 test mode 1" "Low,High" bitfld.long 0x0c 9. " LCC_SEL5 ,Select STV polarity" "Low,High" textline " " bitfld.long 0x0c 8. " LCC_SEL4 ,Select CPV signal pin 0" "Low,High" bitfld.long 0x0c 7. " LCC_SEL3 ,Select CPV signal pin 1" "Low,High" bitfld.long 0x0c 6. " LCC_SEL2 ,Select line/dot inversion" "Low,High" textline " " bitfld.long 0x0c 5. " LCD_SEL1 ,Select DG/normal mode" "Low,High" bitfld.long 0x0c 4. " LCC_EN ,LCC3600 enable" "Disabled,Enabled" bitfld.long 0x0c 3. " CPV_SEL ,Select CPV Pulse low width" "Low,High" textline " " bitfld.long 0x0c 2. " MODE_SEL ,Select DE/Sync mode" "Sync,DE" bitfld.long 0x0c 1. " RES_SEL ,Select output resolution type" "320 x 240,240 x 320" bitfld.long 0x0c 0. " LPC_EN ,LPC3600 enable" "Disabled,Enabled" width 0xb endif sif (cpu()=="S3C2443X") width 11. if (((d.l(ad:0x56000080))&0x10000000)==0x00000000) ;STN group.long 0x00++0x2b line.long 0x00 "LCDCON1,LCD Control 1 Register" hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status" hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates" textline " " bitfld.long 0x00 7. " MMODE ,Toggle rate of the VM" "Each frame,MVAL" bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,?..." textline " " bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp mono,2 bpp gray,4 bpp gray,8 bpp color,Packed 12 bpp color,Unpacked 12bpp color,16 bpp color,?..." bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled" line.long 0x04 "LCDCON2,LCD Control 2 Register" hexmask.long.byte 0x04 24.--31. 1. " VBPD ,Vertical back porch" hexmask.long.word 0x04 14.--23. 1. " LINEVAL ,LCD vertical size" textline " " hexmask.long.byte 0x04 6.--13. 1. " VFPD ,Vertical front porch" hexmask.long.byte 0x04 0.--5. 1. " VSPW ,Vertical sync pulse width" line.long 0x08 "LCDCON3,LCD Control 3 Register" hexmask.long.byte 0x08 19.--25. 1. " WDLY ,Delay between VLINE and VCLK" hexmask.long.word 0x08 8.--18. 1. " HOZVAL ,Horizontal size of LCD panel" textline " " hexmask.long.byte 0x08 0.--7. 1. " LINEBLANK ,Indicate the blank time in one horizontal line duration time" line.long 0x0c "LCDCON4,LCD Control 4 Register" hexmask.long.byte 0x0c 8.--15. 1. " MVAL ,Rate at which VM signal toggle" hexmask.long.byte 0x0c 0.--7. 1. " WLH ,VLINE pulse's high level width" line.long 0x10 "LCDCON5,LCD Control 5 Register" bitfld.long 0x10 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising" bitfld.long 0x10 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x10 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted" bitfld.long 0x10 7. " INVVD ,VD pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x10 5. " INVPWREN ,PWREN signal polarity" "Normal,Inverted" textline " " bitfld.long 0x10 3. " PWREN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " BSWP ,Byte swap control" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " HWSWP ,Half-word swap control" "Disabled,Enabled" else ;TFT group.long 0x00++0xb line.long 0x00 "LCDCON1,LCD Control 1 Register" hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status" bitfld.long 0x00 7. " MMODE ,Toggle rate of the VM" "Each frame,MVAL" textline " " bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,?..." bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp mono,2 bpp gray,4 bpp gray,8 bpp color,Packed 12 bpp color,Unpacked 12bpp color,16 bpp color,?..." textline " " bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled" line.long 0x04 "LCDCON2,LCD Control 2 Register" hexmask.long.word 0x04 14.--23. 1. " LINEVAL ,LCD vertical size" line.long 0x08 "LCDCON3,LCD Control 3 Register" hexmask.long.word 0x08 8.--18. 1. " HOZVAL ,Horizontal size of LCD panel" endif group.long 0x14++0xb line.long 0x00 "LCDSADDR1,Frame Buffer Start Address 1 Register" hexmask.long.word 0x00 21.--29. 1. " LCDBANK ,Bank location for video buffer" hexmask.long 0x00 0.--20. 1. " LCDBASEU ,Start address of upper address counter" line.long 0x04 "LCDSADDR2,Frame Buffer Start Address 2 Register" hexmask.long 0x04 0.--20. 1. " LCDBASEL ,Start address of lower address counter" line.long 0x08 "LCDSADDR3,Frame Buffer Start Address 3 Register" hexmask.long.word 0x08 11.--21. 1. " OFFSIZE ,Virtual screen offset size" hexmask.long.word 0x08 0.--10. 1. " PAGEWIDTH ,Virtual screen page width" if (((d.l(ad:0x56000080))&0x10000000)==0x00000000) ;STN group.long 0x20++0xb line.long 0x00 "REDLUT,Red Lookup Table Register" line.long 0x04 "GREENLUT,Green Lookup Table Register" line.long 0x08 "BLUELUT,Blue Lookup Table Register" hexmask.long.word 0x08 0.--15. 1. " BLUEVAL ,Blue Lookup Table" group.long 0x4c++0x3 line.long 0x00 "DITHMODE,Dithering Mode Register" hexmask.long.tbyte 0x00 0.--18. 1. " DITHMODE ,Dithering mode" endif group.long 0x54++0xb line.long 0x00 "LCDINTPND,LCD Interrupt Pending Register" bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt pending" "Not pending,Pending" bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt pending" "Not pending,Pending" line.long 0x04 "LCDSRCPND,LCD Interrupt Source Pending Register" bitfld.long 0x04 1. " INT_FrSyn ,LCD frame synchronized interrupt source pending" "Not pending,Pending" bitfld.long 0x04 0. " INT_FiCnt ,LCD FIFO interrupt source pending" "Not pending,Pending" line.long 0x08 "LCDINTMSK,Interrupt Mask Register" bitfld.long 0x08 2. " FIWSEL ,Trigger level of LCD FIFO" "4 words,8 words" bitfld.long 0x08 1. " INT_FrSyn ,LCD frame synchronized interrupt mask" "Not masked,Masked" textline " " bitfld.long 0x08 0. " INT_FiCnt ,LCD FIFO interrupt mask" "Not masked,Masked" width 0xb endif tree.end sif (cpu()=="S3C2443X") tree "TFT Controller" base ad:0x4C800000 width 14. group.long 0x00++0x17 line.long 0x00 "VIDCON0,Video Control 1 Register" bitfld.long 0x00 25. " INTERLACE_F ,Interlace or Progressive" "Progressive,Interlace" bitfld.long 0x00 22.--23. " VIDOUT ,Determines the output format of Video Controller" "RGB I/F,Reserved,I/F for Main LDI,I/F for Sub LDI" textline " " bitfld.long 0x00 19.--21. " L1_DATA16 ,Select the mode of output data format of System I/F" "16-bit,16+2 bit,9+9 bit,16+8 bit,18 bit,?..." bitfld.long 0x00 16.--18. " L0_DATA16 ,Select the mode of output data format of System I/F" "16-bit,16+2 bit,9+9 bit,16+8 bit,18 bit,?..." textline " " bitfld.long 0x00 13.--14. " PNRMODE ,Select the display mode" "Parallel RGB,Parallel BGR,Serial R-G-B,Serial B-G-R" bitfld.long 0x00 12. " CLKVALUP ,Select CLKVAL_F Update timing control" "Always,Once" textline " " hexmask.long.byte 0x00 6.--11. 1. " CLKVAL_F ,Determine the rates of VCLK and CLKVAL" bitfld.long 0x00 5. " VCLKEN ,VCLK Enable Control" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " CLKDIR ,Select the clock source as direct or divide using CLKVAL_F" "Direct clock,Divided" bitfld.long 0x00 2.--3. " CLKSEL_F ,Select the Video Clock source" "HCLK,LCD vclk,?..." textline " " bitfld.long 0x00 1. " ENVID ,Video output and the logic immediately enable/disable" "Disabled,Enabled" bitfld.long 0x00 0. " ENVID_F ,Video output and the logic enable/disable at current frame end" "Disabled,Enabled" line.long 0x04 "VIDCON1,Video Control 2 Register" hexmask.long.word 0x04 16.--26. 1. " LINECNT ,Status of the line counter" bitfld.long 0x04 13.--14. " VSTATUS ,Vertical Status" "VSYNC,BACK Porch,ACTIVE,FRONT Porch" textline " " bitfld.long 0x04 11.--12. " HSTATUS ,Horizontal Status" "HSYNC,BACK Porch,ACTIVE,FRONT Porch" bitfld.long 0x04 7. " IVCLK ,Polarity of the VCLK active edge" "Falling,Rising" textline " " bitfld.long 0x04 6. " IHSYNC ,HSYNC pulse polarity" "Normal,Inverted" bitfld.long 0x04 5. " IVSYNC ,VSYNC pulse polarity" "Normal,Inverted" textline " " bitfld.long 0x04 4. " IVDEN ,VDEN signal polarity" "Normal,Inverted" line.long 0x08 "VIDTCON0,Video Time Control 1 Register" hexmask.long.byte 0x08 24.--31. 1. " VBPDE ,Vertical back porch" hexmask.long.byte 0x08 16.--23. 1. " VBPD ,Vertical back porch" textline " " hexmask.long.byte 0x08 8.--15. 1. " VFPD ,Vertical front porch" hexmask.long.byte 0x08 0.--7. 1. " VSPW ,Vertical sync pulse width" line.long 0x0C "VIDTCON1,Video Time Control 2 Register" hexmask.long.byte 0x0C 24.--31. 1. " VFPDE ,Horizontal back porch" hexmask.long.byte 0x0C 16.--23. 1. " HBPD ,Horizontal back porch" textline " " hexmask.long.byte 0x0C 8.--15. 1. " HFPD ,Horizontal front porch" hexmask.long.byte 0x0C 0.--7. 1. " HSPW ,Horizontal sync pulse width" line.long 0x10 "VIDTCON2,Video Time Control 3 Register" hexmask.long.word 0x10 11.--21. 1. " LINEVAL ,Vertical size of display" hexmask.long.word 0x10 0.--10. 1. " HOZVAL ,Horizontal size of display" line.long 0x14 "WINCON0,Window 0 Control Register" bitfld.long 0x14 23. " BUFSEL ,Select Buffer set (0/1)" "0,1" bitfld.long 0x14 22. " BUFAUTOEN ,Double Buffer Auto control bit" "Fixed by BUFSEL,Auto changed by Trigger In" textline " " bitfld.long 0x14 18. " BITSWP ,Bit swap control bit" "Disabled,Enabled" bitfld.long 0x14 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled" textline " " bitfld.long 0x14 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled" bitfld.long 0x14 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..." textline " " bitfld.long 0x14 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1,2,4,8,Reserved,16 R5-G6-B5,Reserved,16 I1-R5-G5-B5,Unpacked 18,Reserved,Reserved,Unpacked 24,?..." bitfld.long 0x14 0. " ENWIN_F ,Video output and the logic immediately enable/disable" "Disabled,Enabled" if (((d.l(ad:(0x4C800000+0x18)))&0x40)==0x00) ;In Window Control 1 Register (WINCON0). Bit no 6. Definition for blending category Per plane or Per pixel group.long 0x18++0x3 line.long 0x00 "WINCON0,Window Control 1 Register" bitfld.long 0x00 18. " BITSWP ,Bit swap control bit" "Disabled,Enabled" bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled" bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..." textline " " bitfld.long 0x00 6. " BLD_PIX ,Select blending category" "Per plane,Per pixel" bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1,2,4,8 palletized,8 non-palletized,16 R5-G6-B5,16 A1-R5-G5-B5,16 I1-R5-G5-B5,18 R6-G6-B6,18 A1-R6-G6-B5,19 A1-R6-G6-B6,24 R8-G8-B8,24 A1-R8-G8-B7,25,?..." textline " " bitfld.long 0x00 1. " ALPHA_SEL ,Select Alpha value" "ALPHA0_R/G/B,ALPHA1_R/G/B" bitfld.long 0x00 0. " ENWIN_F ,Video output and the logic immediately enable/disable" "Disabled,Enabled" else group.long 0x18++0x3 line.long 0x00 "WINCON0,Window Control 1 Register" bitfld.long 0x00 18. " BITSWP ,Bit swap control bit" "Disabled,Enabled" bitfld.long 0x00 17. " BYTSWP ,Byte swaps control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " HAWSWP ,Half-Word swap control bit" "Disabled,Enabled" bitfld.long 0x00 9.--10. " BURSTLEN ,DMA Burst Length selection" "16 word,8 word,4 word,?..." textline " " bitfld.long 0x00 6. " BLD_PIX ,Select blending category" "Per plane,Per pixel" bitfld.long 0x00 2.--5. " BPPMODE_F ,Select the BPP (Bits Per Pixel) mode Window image" "1,2,4,8 palletized,8 non-palletized,16 R5-G6-B5,16 A1-R5-G5-B5,16 I1-R5-G5-B5,18 R6-G6-B6,18 A1-R6-G6-B5,19 A1-R6-G6-B6,24 R8-G8-B8,24 A1-R8-G8-B7,25,?..." textline " " bitfld.long 0x00 1. " ALPHA_SEL ,Select Alpha value" "AEN/chroma key,24bpp 8:8:8" bitfld.long 0x00 0. " ENWIN_F ,Video output and the logic immediately enable/disable" "Disabled,Enabled" endif group.long 0x28++0xb line.long 0x00 "VIDOSD0A,Video Window 0 Position Control Register" hexmask.long.word 0x00 11.--21. 1. " OSD_LTX_F ,Horizontal screen coordinate for left top pixel of OSD image" hexmask.long.word 0x00 0.--10. 1. " OSD_LTY_F ,Vertical screen coordinate for left top pixel of OSD image" line.long 0x04 "VIDOSD0B,Video Window 0 Position Control Register" hexmask.long.word 0x04 11.--21. 1. " OSD_RBX_F ,Horizontal screen coordinate for right bottom pixel of OSD image" hexmask.long.word 0x04 0.--10. 1. " OSD_RBY_F ,Vertical screen coordinate for right bottom of OSD image" line.long 0x08 "VIDOSD0C,Video Window 0 Position Control Register" group.long 0x34++0xb line.long 0x00 "VIDOSD1A,Video Window 1 Position Control Register" hexmask.long.word 0x00 11.--21. 1. " OSD_LTX_F ,Horizontal screen coordinate for left top pixel of OSD image" hexmask.long.word 0x00 0.--10. 1. " OSD_LTY_F ,Vertical screen coordinate for left top pixel of OSD image" line.long 0x04 "VIDOSD1B,Video Window 1 Position Control Register" hexmask.long.word 0x04 11.--21. 1. " OSD_RBX_F ,Horizontal screen coordinate for right bottom pixel of OSD image" hexmask.long.word 0x04 0.--10. 1. " OSD_RBY_F ,Vertical screen coordinate for right bottom of OSD image" line.long 0x08 "VIDOSD1C,Video Window 1 Alpha Control Register" bitfld.long 0x08 20.--23. " ALPHA_R ,Alpha Red value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. " ALPHA_G ,Alpha Green value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 12.--15. " ALPHA_B ,Alpha Blue value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. " ALPHA_R ,Alpha Red value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x08 4.--7. " ALPHA_G ,Alpha Green value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. " ALPHA_B ,Alpha Blue value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x64++0xb line.long 0x00 "VIDW00ADD0B0,Window 0 Buffer Start Address Register (buffer 0)" hexmask.long.byte 0x00 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory" hexmask.long.tbyte 0x00 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer" line.long 0x04 "VIDW00ADD0B1,Window 0 Buffer Start Address Register (buffer 1)" hexmask.long.byte 0x04 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory" hexmask.long.tbyte 0x04 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer" line.long 0x08 "VIDW01ADD0,Window 1 Buffer Start Address Register" hexmask.long.byte 0x08 24.--31. 1. " VBANK_F ,Bank location for the video buffer in the system memory" hexmask.long.tbyte 0x08 0.--23. 1. " VBASEU_F ,Start address of the Video frame buffer" group.long 0x7C++0xb line.long 0x00 "VIDW00ADD1B0,Window 0 Buffer Start Address Register (buffer 0)" hexmask.long.tbyte 0x00 0.--23. 1. " VBASEL_F ,Start address of the Video frame buffer" line.long 0x04 "VIDW00ADD1B1,Window 0 Buffer Start Address Register (buffer 1)" hexmask.long.tbyte 0x04 0.--23. 1. " VBASEL_F ,Start address of the Video frame buffer" line.long 0x08 "VIDW01ADD1,Window 1 Buffer Start Address Register" hexmask.long.tbyte 0x08 0.--23. 1. " VBASEL_F ,Start address of the Video frame buffer" group.long 0x94++0xb line.long 0x00 "VIDW00ADD2B0,Window 0 Buffer Size Register (buffer 0)" hexmask.long.word 0x00 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size" hexmask.long.word 0x00 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width" line.long 0x04 "VIDW00ADD2B1,Window 0 Buffer Size Register (buffer 1)" hexmask.long.word 0x04 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size" hexmask.long.word 0x04 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width" line.long 0x08 "VIDW01ADD2,Window 1 Buffer Size Register" hexmask.long.word 0x08 13.--25. 1. " OFFSIZE_F ,Virtual screen offset size" hexmask.long.word 0x08 0.--12. 1. " PAGEWIDTH_F ,Virtual screen page width" group.long 0xAC++0xb line.long 0x00 "VIDINTCON,Indicate The Video Interrupt Control Register" hexmask.long.byte 0x00 20.--25. 1. " FIFOINTERVAL ,Control the interval of the interval of the FIFO interrupt" bitfld.long 0x00 19. " SYSMAINCON ,Sending complete interrupt enable bit to Main LCD" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " SYSSUBCON ,Sending complete interrupt enable bit to Sub LCD" "Disabled,Enabled" bitfld.long 0x00 17. " SYSIFDONE ,System Interface Interrupt Enable control" "Disabled,Enabled" textline " " bitfld.long 0x00 15.--16. " FRAMESEL0 ,Video Frame Interrupt 0 at start" "BACK Porch,VSYNC,ACTIVE,FRONT Porch" bitfld.long 0x00 13.--14. " FRAMESEL1 ,Video Frame Interrupt 1 at start" "None,BACK Porch,VSYNC,FRONT Porch" textline " " bitfld.long 0x00 12. " INTFRMEN ,Video Frame interrupts Enable control bit" "Disabled,Enabled" bitfld.long 0x00 6. " FIFOSEL1 ,FIFO Interrupt Window 1 control bit" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " FIFOSEL0 ,FIFO Interrupt Window 0 control bit" "Disabled,Enabled" bitfld.long 0x00 2.--4. " FIFOLEVEL ,Video FIFO Interrupt Level Select" "25% left,50% left,75% left,Empty,Full,?..." textline " " bitfld.long 0x00 1. " INTFIFOEN ,Video FIFO interrupts Enable control bit" "Disabled,Enabled" bitfld.long 0x00 0. " INTEN ,Video interrupts Enable control bit" "Disabled,Enabled" line.long 0x04 "W1KEYCON0,Color Key Control Register" bitfld.long 0x04 26. " KEYBLEN ,Blending Enable control" "Disabled,Blending" bitfld.long 0x04 25. " KEYEN_F ,Color Key (Chroma key ) Enable control" "Disabled,Enabled" textline " " bitfld.long 0x04 24. " DIRCON ,Color key (Chroma key) direction control" "fore->back -ground,back->fore -ground" hexmask.long.tbyte 0x04 0.--23. 1. " COMPKEY ,Each bit is correspond to the COLVAL[23:0]" line.long 0x08 "W1KEYCON1,Color Key Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " COLVAL ,Color key value for the transparent pixel effect" group.long 0xD0++0x7 line.long 0x00 "WIN0MAP,Window Color Control" bitfld.long 0x00 24. " MAPCOLEN_F ,Window color mapping control bit" "Disabled,Enabled" hexmask.long.tbyte 0x00 0.--23. 1. " COLVAL ,Color Value" line.long 0x04 "WIN1MAP,Window Color Control" bitfld.long 0x04 24. " MAPCOLEN_F ,Window color mapping control bit" "Disabled,Enabled" hexmask.long.tbyte 0x04 0.--23. 1. " COLVAL ,Color Value" group.long 0xE4++0x3 line.long 0x00 "WPALCON,Window Palette Control Register" bitfld.long 0x00 9. " PALUPDATEEN ,Palette Update" "Normal,Enabled" textline " " bitfld.long 0x00 3.--5. " W1PAL ,Size of the palette data format of Window 1" "25-bit A:8:8:8,24-bit 8:8:8,19-bit A:6:6:6,18-bit A:6:6:5,18-bit 6:6:6,16-bit A:5:5:5,16-bit 5:6:5,?..." textline " " bitfld.long 0x00 0.--2. " W0PAL ,Size of the palette data format of Window 0" "25-bit A:8:8:8,24-bit 8:8:8,19-bit A:6:6:6,18-bit A:6:6:5,18-bit 6:6:6,16-bit A:5:5:5,16-bit 5:6:5,?..." group.long 0x130++0xb line.long 0x0 "SYSIFCON0,System Interface Control For Main LDI(LCD)" bitfld.long 0x0 16.--19. " LCD_CS_SETUP ,No. of clk active period of the address signal En to the CS En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 12.--15. " LCD_WR_SETUP ,No. of clk CS signal En to the write signal En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 8.--11. " LCD_WR_ACT ,No. of clk cycles active period of the CS En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 4.--7. " LCD_WR_HOLD ,No. of clk cycles active period of the CS Dis to the write signal Dis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x0 2. " RSPOL ,The polarity of the RS Signal" "Low,High" bitfld.long 0x0 1. " SUCCEUP ,SUCCEUP" "Normal,Triggered" textline " " bitfld.long 0x0 0. " SYSIFEN ,LCD System Interface control" "Disabled,Enabled" line.long 0x4 "SYSIFCON1,System Interface Control For Main LDI(LCD)" bitfld.long 0x4 16.--19. " LCD_CS_SETUP ,No. of clk active period of the address signal En to the CS En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 12.--15. " LCD_WR_SETUP ,No. of clk CS signal En to the write signal En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 8.--11. " LCD_WR_ACT ,No. of clk cycles active period of the CS En" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 4.--7. " LCD_WR_HOLD ,No. of clk cycles active period of the CS Dis to the write signal Dis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x4 2. " RSPOL ,The polarity of the RS Signal" "Low,High" bitfld.long 0x4 1. " SUCCEUP ,SUCCEUP" "Normal,Triggered" textline " " bitfld.long 0x4 0. " SYSIFEN ,LCD System Interface control" "Disabled,Enabled" group.long 0x138++0xb line.long 0x00 "DITHMODE,Dithering Mode Register" bitfld.long 0x00 5.--6. " RDithPos ,Red Dither bit control" "5-bit,6-bit,8-bit,?..." bitfld.long 0x00 3.--4. " GDithPos ,Green Dither bit control" "5-bit,6-bit,8-bit,?..." textline " " bitfld.long 0x00 1.--2. " BDithPos ,Blue Dither bit control" "5-bit,6-bit,8-bit,?..." bitfld.long 0x00 0. " DITHEN_F ,Dithering Enable bit" "Disabled,Enabled" line.long 0x04 "SIFCCON0,System Interface Command Control" bitfld.long 0x04 9. " SYS_nCS1_CON ,LCD System Interface nCS0 (main) Signal control" "Disabled,Enabled" bitfld.long 0x04 8. " SYS_nCS0_CON ,LCD System Interface nCS1 (sub) Signal control" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " SYS_nOE_CON ,LCD System Interface nOE Signal control" "Disabled,Enabled" bitfld.long 0x04 6. " SYS_nWE_CON ,LCD System Interface nWE Signal control" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " SYS_RS_CON ,LCD System Interface RS Signal control" "Low,High" bitfld.long 0x04 0. " SCOMEN ,LCD System Interface Command Mode Enable" "Disabled,Enabled" line.long 0x08 "SIFCCON1,System Interface Command Data Write Control" hexmask.long.tbyte 0x08 0.--17. 1. " SYS_WDATA ,LCD System Interface Write Data Control" rgroup.long 0x144++0x3 line.long 0x00 "SIFCCON2,System Interface Command Data Read Control" hexmask.long.tbyte 0x00 0.--17. 1. " SYS_RDATA ,LCD System Interface Read Data Control" group.long 0x160++0x3 line.long 0x00 "CPUTRIGCON2,Software-Based Trigger Control Register" bitfld.long 0x00 0. " SWTRIG ,Software-Based Trigger" "No trigger,Trigger" tree "Palette Ram Access Address" group.long 0x400++0x3FF "WIN0 Palette Ram Access Address" line.long 0x0 "WIN0PRAA0,Window 0 Palette Entry 0 Address" line.long 0x4 "WIN0PRAA1,Window 0 Palette Entry 1 Address" line.long 0x8 "WIN0PRAA2,Window 0 Palette Entry 2 Address" line.long 0xC "WIN0PRAA3,Window 0 Palette Entry 3 Address" line.long 0x10 "WIN0PRAA4,Window 0 Palette Entry 4 Address" line.long 0x14 "WIN0PRAA5,Window 0 Palette Entry 5 Address" line.long 0x18 "WIN0PRAA6,Window 0 Palette Entry 6 Address" line.long 0x1C "WIN0PRAA7,Window 0 Palette Entry 7 Address" line.long 0x20 "WIN0PRAA8,Window 0 Palette Entry 8 Address" line.long 0x24 "WIN0PRAA9,Window 0 Palette Entry 9 Address" line.long 0x28 "WIN0PRAA10,Window 0 Palette Entry 10 Address" line.long 0x2C "WIN0PRAA11,Window 0 Palette Entry 11 Address" line.long 0x30 "WIN0PRAA12,Window 0 Palette Entry 12 Address" line.long 0x34 "WIN0PRAA13,Window 0 Palette Entry 13 Address" line.long 0x38 "WIN0PRAA14,Window 0 Palette Entry 14 Address" line.long 0x3C "WIN0PRAA15,Window 0 Palette Entry 15 Address" line.long 0x40 "WIN0PRAA16,Window 0 Palette Entry 16 Address" line.long 0x44 "WIN0PRAA17,Window 0 Palette Entry 17 Address" line.long 0x48 "WIN0PRAA18,Window 0 Palette Entry 18 Address" line.long 0x4C "WIN0PRAA19,Window 0 Palette Entry 19 Address" line.long 0x50 "WIN0PRAA20,Window 0 Palette Entry 20 Address" line.long 0x54 "WIN0PRAA21,Window 0 Palette Entry 21 Address" line.long 0x58 "WIN0PRAA22,Window 0 Palette Entry 22 Address" line.long 0x5C "WIN0PRAA23,Window 0 Palette Entry 23 Address" line.long 0x60 "WIN0PRAA24,Window 0 Palette Entry 24 Address" line.long 0x64 "WIN0PRAA25,Window 0 Palette Entry 25 Address" line.long 0x68 "WIN0PRAA26,Window 0 Palette Entry 26 Address" line.long 0x6C "WIN0PRAA27,Window 0 Palette Entry 27 Address" line.long 0x70 "WIN0PRAA28,Window 0 Palette Entry 28 Address" line.long 0x74 "WIN0PRAA29,Window 0 Palette Entry 29 Address" line.long 0x78 "WIN0PRAA30,Window 0 Palette Entry 30 Address" line.long 0x7C "WIN0PRAA31,Window 0 Palette Entry 31 Address" line.long 0x80 "WIN0PRAA32,Window 0 Palette Entry 32 Address" line.long 0x84 "WIN0PRAA33,Window 0 Palette Entry 33 Address" line.long 0x88 "WIN0PRAA34,Window 0 Palette Entry 34 Address" line.long 0x8C "WIN0PRAA35,Window 0 Palette Entry 35 Address" line.long 0x90 "WIN0PRAA36,Window 0 Palette Entry 36 Address" line.long 0x94 "WIN0PRAA37,Window 0 Palette Entry 37 Address" line.long 0x98 "WIN0PRAA38,Window 0 Palette Entry 38 Address" line.long 0x9C "WIN0PRAA39,Window 0 Palette Entry 39 Address" line.long 0xA0 "WIN0PRAA40,Window 0 Palette Entry 40 Address" line.long 0xA4 "WIN0PRAA41,Window 0 Palette Entry 41 Address" line.long 0xA8 "WIN0PRAA42,Window 0 Palette Entry 42 Address" line.long 0xAC "WIN0PRAA43,Window 0 Palette Entry 43 Address" line.long 0xB0 "WIN0PRAA44,Window 0 Palette Entry 44 Address" line.long 0xB4 "WIN0PRAA45,Window 0 Palette Entry 45 Address" line.long 0xB8 "WIN0PRAA46,Window 0 Palette Entry 46 Address" line.long 0xBC "WIN0PRAA47,Window 0 Palette Entry 47 Address" line.long 0xC0 "WIN0PRAA48,Window 0 Palette Entry 48 Address" line.long 0xC4 "WIN0PRAA49,Window 0 Palette Entry 49 Address" line.long 0xC8 "WIN0PRAA50,Window 0 Palette Entry 50 Address" line.long 0xCC "WIN0PRAA51,Window 0 Palette Entry 51 Address" line.long 0xD0 "WIN0PRAA52,Window 0 Palette Entry 52 Address" line.long 0xD4 "WIN0PRAA53,Window 0 Palette Entry 53 Address" line.long 0xD8 "WIN0PRAA54,Window 0 Palette Entry 54 Address" line.long 0xDC "WIN0PRAA55,Window 0 Palette Entry 55 Address" line.long 0xE0 "WIN0PRAA56,Window 0 Palette Entry 56 Address" line.long 0xE4 "WIN0PRAA57,Window 0 Palette Entry 57 Address" line.long 0xE8 "WIN0PRAA58,Window 0 Palette Entry 58 Address" line.long 0xEC "WIN0PRAA59,Window 0 Palette Entry 59 Address" line.long 0xF0 "WIN0PRAA60,Window 0 Palette Entry 60 Address" line.long 0xF4 "WIN0PRAA61,Window 0 Palette Entry 61 Address" line.long 0xF8 "WIN0PRAA62,Window 0 Palette Entry 62 Address" line.long 0xFC "WIN0PRAA63,Window 0 Palette Entry 63 Address" line.long 0x100 "WIN0PRAA64,Window 0 Palette Entry 64 Address" line.long 0x104 "WIN0PRAA65,Window 0 Palette Entry 65 Address" line.long 0x108 "WIN0PRAA66,Window 0 Palette Entry 66 Address" line.long 0x10C "WIN0PRAA67,Window 0 Palette Entry 67 Address" line.long 0x110 "WIN0PRAA68,Window 0 Palette Entry 68 Address" line.long 0x114 "WIN0PRAA69,Window 0 Palette Entry 69 Address" line.long 0x118 "WIN0PRAA70,Window 0 Palette Entry 70 Address" line.long 0x11C "WIN0PRAA71,Window 0 Palette Entry 71 Address" line.long 0x120 "WIN0PRAA72,Window 0 Palette Entry 72 Address" line.long 0x124 "WIN0PRAA73,Window 0 Palette Entry 73 Address" line.long 0x128 "WIN0PRAA74,Window 0 Palette Entry 74 Address" line.long 0x12C "WIN0PRAA75,Window 0 Palette Entry 75 Address" line.long 0x130 "WIN0PRAA76,Window 0 Palette Entry 76 Address" line.long 0x134 "WIN0PRAA77,Window 0 Palette Entry 77 Address" line.long 0x138 "WIN0PRAA78,Window 0 Palette Entry 78 Address" line.long 0x13C "WIN0PRAA79,Window 0 Palette Entry 79 Address" line.long 0x140 "WIN0PRAA80,Window 0 Palette Entry 80 Address" line.long 0x144 "WIN0PRAA81,Window 0 Palette Entry 81 Address" line.long 0x148 "WIN0PRAA82,Window 0 Palette Entry 82 Address" line.long 0x14C "WIN0PRAA83,Window 0 Palette Entry 83 Address" line.long 0x150 "WIN0PRAA84,Window 0 Palette Entry 84 Address" line.long 0x154 "WIN0PRAA85,Window 0 Palette Entry 85 Address" line.long 0x158 "WIN0PRAA86,Window 0 Palette Entry 86 Address" line.long 0x15C "WIN0PRAA87,Window 0 Palette Entry 87 Address" line.long 0x160 "WIN0PRAA88,Window 0 Palette Entry 88 Address" line.long 0x164 "WIN0PRAA89,Window 0 Palette Entry 89 Address" line.long 0x168 "WIN0PRAA90,Window 0 Palette Entry 90 Address" line.long 0x16C "WIN0PRAA91,Window 0 Palette Entry 91 Address" line.long 0x170 "WIN0PRAA92,Window 0 Palette Entry 92 Address" line.long 0x174 "WIN0PRAA93,Window 0 Palette Entry 93 Address" line.long 0x178 "WIN0PRAA94,Window 0 Palette Entry 94 Address" line.long 0x17C "WIN0PRAA95,Window 0 Palette Entry 95 Address" line.long 0x180 "WIN0PRAA96,Window 0 Palette Entry 96 Address" line.long 0x184 "WIN0PRAA97,Window 0 Palette Entry 97 Address" line.long 0x188 "WIN0PRAA98,Window 0 Palette Entry 98 Address" line.long 0x18C "WIN0PRAA99,Window 0 Palette Entry 99 Address" line.long 0x190 "WIN0PRAA100,Window 0 Palette Entry 100 Address" line.long 0x194 "WIN0PRAA101,Window 0 Palette Entry 101 Address" line.long 0x198 "WIN0PRAA102,Window 0 Palette Entry 102 Address" line.long 0x19C "WIN0PRAA103,Window 0 Palette Entry 103 Address" line.long 0x1A0 "WIN0PRAA104,Window 0 Palette Entry 104 Address" line.long 0x1A4 "WIN0PRAA105,Window 0 Palette Entry 105 Address" line.long 0x1A8 "WIN0PRAA106,Window 0 Palette Entry 106 Address" line.long 0x1AC "WIN0PRAA107,Window 0 Palette Entry 107 Address" line.long 0x1B0 "WIN0PRAA108,Window 0 Palette Entry 108 Address" line.long 0x1B4 "WIN0PRAA109,Window 0 Palette Entry 109 Address" line.long 0x1B8 "WIN0PRAA110,Window 0 Palette Entry 110 Address" line.long 0x1BC "WIN0PRAA111,Window 0 Palette Entry 111 Address" line.long 0x1C0 "WIN0PRAA112,Window 0 Palette Entry 112 Address" line.long 0x1C4 "WIN0PRAA113,Window 0 Palette Entry 113 Address" line.long 0x1C8 "WIN0PRAA114,Window 0 Palette Entry 114 Address" line.long 0x1CC "WIN0PRAA115,Window 0 Palette Entry 115 Address" line.long 0x1D0 "WIN0PRAA116,Window 0 Palette Entry 116 Address" line.long 0x1D4 "WIN0PRAA117,Window 0 Palette Entry 117 Address" line.long 0x1D8 "WIN0PRAA118,Window 0 Palette Entry 118 Address" line.long 0x1DC "WIN0PRAA119,Window 0 Palette Entry 119 Address" line.long 0x1E0 "WIN0PRAA120,Window 0 Palette Entry 120 Address" line.long 0x1E4 "WIN0PRAA121,Window 0 Palette Entry 121 Address" line.long 0x1E8 "WIN0PRAA122,Window 0 Palette Entry 122 Address" line.long 0x1EC "WIN0PRAA123,Window 0 Palette Entry 123 Address" line.long 0x1F0 "WIN0PRAA124,Window 0 Palette Entry 124 Address" line.long 0x1F4 "WIN0PRAA125,Window 0 Palette Entry 125 Address" line.long 0x1F8 "WIN0PRAA126,Window 0 Palette Entry 126 Address" line.long 0x1FC "WIN0PRAA127,Window 0 Palette Entry 127 Address" line.long 0x200 "WIN0PRAA128,Window 0 Palette Entry 128 Address" line.long 0x204 "WIN0PRAA129,Window 0 Palette Entry 129 Address" line.long 0x208 "WIN0PRAA130,Window 0 Palette Entry 130 Address" line.long 0x20C "WIN0PRAA131,Window 0 Palette Entry 131 Address" line.long 0x210 "WIN0PRAA132,Window 0 Palette Entry 132 Address" line.long 0x214 "WIN0PRAA133,Window 0 Palette Entry 133 Address" line.long 0x218 "WIN0PRAA134,Window 0 Palette Entry 134 Address" line.long 0x21C "WIN0PRAA135,Window 0 Palette Entry 135 Address" line.long 0x220 "WIN0PRAA136,Window 0 Palette Entry 136 Address" line.long 0x224 "WIN0PRAA137,Window 0 Palette Entry 137 Address" line.long 0x228 "WIN0PRAA138,Window 0 Palette Entry 138 Address" line.long 0x22C "WIN0PRAA139,Window 0 Palette Entry 139 Address" line.long 0x230 "WIN0PRAA140,Window 0 Palette Entry 140 Address" line.long 0x234 "WIN0PRAA141,Window 0 Palette Entry 141 Address" line.long 0x238 "WIN0PRAA142,Window 0 Palette Entry 142 Address" line.long 0x23C "WIN0PRAA143,Window 0 Palette Entry 143 Address" line.long 0x240 "WIN0PRAA144,Window 0 Palette Entry 144 Address" line.long 0x244 "WIN0PRAA145,Window 0 Palette Entry 145 Address" line.long 0x248 "WIN0PRAA146,Window 0 Palette Entry 146 Address" line.long 0x24C "WIN0PRAA147,Window 0 Palette Entry 147 Address" line.long 0x250 "WIN0PRAA148,Window 0 Palette Entry 148 Address" line.long 0x254 "WIN0PRAA149,Window 0 Palette Entry 149 Address" line.long 0x258 "WIN0PRAA150,Window 0 Palette Entry 150 Address" line.long 0x25C "WIN0PRAA151,Window 0 Palette Entry 151 Address" line.long 0x260 "WIN0PRAA152,Window 0 Palette Entry 152 Address" line.long 0x264 "WIN0PRAA153,Window 0 Palette Entry 153 Address" line.long 0x268 "WIN0PRAA154,Window 0 Palette Entry 154 Address" line.long 0x26C "WIN0PRAA155,Window 0 Palette Entry 155 Address" line.long 0x270 "WIN0PRAA156,Window 0 Palette Entry 156 Address" line.long 0x274 "WIN0PRAA157,Window 0 Palette Entry 157 Address" line.long 0x278 "WIN0PRAA158,Window 0 Palette Entry 158 Address" line.long 0x27C "WIN0PRAA159,Window 0 Palette Entry 159 Address" line.long 0x280 "WIN0PRAA160,Window 0 Palette Entry 160 Address" line.long 0x284 "WIN0PRAA161,Window 0 Palette Entry 161 Address" line.long 0x288 "WIN0PRAA162,Window 0 Palette Entry 162 Address" line.long 0x28C "WIN0PRAA163,Window 0 Palette Entry 163 Address" line.long 0x290 "WIN0PRAA164,Window 0 Palette Entry 164 Address" line.long 0x294 "WIN0PRAA165,Window 0 Palette Entry 165 Address" line.long 0x298 "WIN0PRAA166,Window 0 Palette Entry 166 Address" line.long 0x29C "WIN0PRAA167,Window 0 Palette Entry 167 Address" line.long 0x2A0 "WIN0PRAA168,Window 0 Palette Entry 168 Address" line.long 0x2A4 "WIN0PRAA169,Window 0 Palette Entry 169 Address" line.long 0x2A8 "WIN0PRAA170,Window 0 Palette Entry 170 Address" line.long 0x2AC "WIN0PRAA171,Window 0 Palette Entry 171 Address" line.long 0x2B0 "WIN0PRAA172,Window 0 Palette Entry 172 Address" line.long 0x2B4 "WIN0PRAA173,Window 0 Palette Entry 173 Address" line.long 0x2B8 "WIN0PRAA174,Window 0 Palette Entry 174 Address" line.long 0x2BC "WIN0PRAA175,Window 0 Palette Entry 175 Address" line.long 0x2C0 "WIN0PRAA176,Window 0 Palette Entry 176 Address" line.long 0x2C4 "WIN0PRAA177,Window 0 Palette Entry 177 Address" line.long 0x2C8 "WIN0PRAA178,Window 0 Palette Entry 178 Address" line.long 0x2CC "WIN0PRAA179,Window 0 Palette Entry 179 Address" line.long 0x2D0 "WIN0PRAA180,Window 0 Palette Entry 180 Address" line.long 0x2D4 "WIN0PRAA181,Window 0 Palette Entry 181 Address" line.long 0x2D8 "WIN0PRAA182,Window 0 Palette Entry 182 Address" line.long 0x2DC "WIN0PRAA183,Window 0 Palette Entry 183 Address" line.long 0x2E0 "WIN0PRAA184,Window 0 Palette Entry 184 Address" line.long 0x2E4 "WIN0PRAA185,Window 0 Palette Entry 185 Address" line.long 0x2E8 "WIN0PRAA186,Window 0 Palette Entry 186 Address" line.long 0x2EC "WIN0PRAA187,Window 0 Palette Entry 187 Address" line.long 0x2F0 "WIN0PRAA188,Window 0 Palette Entry 188 Address" line.long 0x2F4 "WIN0PRAA189,Window 0 Palette Entry 189 Address" line.long 0x2F8 "WIN0PRAA190,Window 0 Palette Entry 190 Address" line.long 0x2FC "WIN0PRAA191,Window 0 Palette Entry 191 Address" line.long 0x300 "WIN0PRAA192,Window 0 Palette Entry 192 Address" line.long 0x304 "WIN0PRAA193,Window 0 Palette Entry 193 Address" line.long 0x308 "WIN0PRAA194,Window 0 Palette Entry 194 Address" line.long 0x30C "WIN0PRAA195,Window 0 Palette Entry 195 Address" line.long 0x310 "WIN0PRAA196,Window 0 Palette Entry 196 Address" line.long 0x314 "WIN0PRAA197,Window 0 Palette Entry 197 Address" line.long 0x318 "WIN0PRAA198,Window 0 Palette Entry 198 Address" line.long 0x31C "WIN0PRAA199,Window 0 Palette Entry 199 Address" line.long 0x320 "WIN0PRAA200,Window 0 Palette Entry 200 Address" line.long 0x324 "WIN0PRAA201,Window 0 Palette Entry 201 Address" line.long 0x328 "WIN0PRAA202,Window 0 Palette Entry 202 Address" line.long 0x32C "WIN0PRAA203,Window 0 Palette Entry 203 Address" line.long 0x330 "WIN0PRAA204,Window 0 Palette Entry 204 Address" line.long 0x334 "WIN0PRAA205,Window 0 Palette Entry 205 Address" line.long 0x338 "WIN0PRAA206,Window 0 Palette Entry 206 Address" line.long 0x33C "WIN0PRAA207,Window 0 Palette Entry 207 Address" line.long 0x340 "WIN0PRAA208,Window 0 Palette Entry 208 Address" line.long 0x344 "WIN0PRAA209,Window 0 Palette Entry 209 Address" line.long 0x348 "WIN0PRAA210,Window 0 Palette Entry 210 Address" line.long 0x34C "WIN0PRAA211,Window 0 Palette Entry 211 Address" line.long 0x350 "WIN0PRAA212,Window 0 Palette Entry 212 Address" line.long 0x354 "WIN0PRAA213,Window 0 Palette Entry 213 Address" line.long 0x358 "WIN0PRAA214,Window 0 Palette Entry 214 Address" line.long 0x35C "WIN0PRAA215,Window 0 Palette Entry 215 Address" line.long 0x360 "WIN0PRAA216,Window 0 Palette Entry 216 Address" line.long 0x364 "WIN0PRAA217,Window 0 Palette Entry 217 Address" line.long 0x368 "WIN0PRAA218,Window 0 Palette Entry 218 Address" line.long 0x36C "WIN0PRAA219,Window 0 Palette Entry 219 Address" line.long 0x370 "WIN0PRAA220,Window 0 Palette Entry 220 Address" line.long 0x374 "WIN0PRAA221,Window 0 Palette Entry 221 Address" line.long 0x378 "WIN0PRAA222,Window 0 Palette Entry 222 Address" line.long 0x37C "WIN0PRAA223,Window 0 Palette Entry 223 Address" line.long 0x380 "WIN0PRAA224,Window 0 Palette Entry 224 Address" line.long 0x384 "WIN0PRAA225,Window 0 Palette Entry 225 Address" line.long 0x388 "WIN0PRAA226,Window 0 Palette Entry 226 Address" line.long 0x38C "WIN0PRAA227,Window 0 Palette Entry 227 Address" line.long 0x390 "WIN0PRAA228,Window 0 Palette Entry 228 Address" line.long 0x394 "WIN0PRAA229,Window 0 Palette Entry 229 Address" line.long 0x398 "WIN0PRAA230,Window 0 Palette Entry 230 Address" line.long 0x39C "WIN0PRAA231,Window 0 Palette Entry 231 Address" line.long 0x3A0 "WIN0PRAA232,Window 0 Palette Entry 232 Address" line.long 0x3A4 "WIN0PRAA233,Window 0 Palette Entry 233 Address" line.long 0x3A8 "WIN0PRAA234,Window 0 Palette Entry 234 Address" line.long 0x3AC "WIN0PRAA235,Window 0 Palette Entry 235 Address" line.long 0x3B0 "WIN0PRAA236,Window 0 Palette Entry 236 Address" line.long 0x3B4 "WIN0PRAA237,Window 0 Palette Entry 237 Address" line.long 0x3B8 "WIN0PRAA238,Window 0 Palette Entry 238 Address" line.long 0x3BC "WIN0PRAA239,Window 0 Palette Entry 239 Address" line.long 0x3C0 "WIN0PRAA240,Window 0 Palette Entry 240 Address" line.long 0x3C4 "WIN0PRAA241,Window 0 Palette Entry 241 Address" line.long 0x3C8 "WIN0PRAA242,Window 0 Palette Entry 242 Address" line.long 0x3CC "WIN0PRAA243,Window 0 Palette Entry 243 Address" line.long 0x3D0 "WIN0PRAA244,Window 0 Palette Entry 244 Address" line.long 0x3D4 "WIN0PRAA245,Window 0 Palette Entry 245 Address" line.long 0x3D8 "WIN0PRAA246,Window 0 Palette Entry 246 Address" line.long 0x3DC "WIN0PRAA247,Window 0 Palette Entry 247 Address" line.long 0x3E0 "WIN0PRAA248,Window 0 Palette Entry 248 Address" line.long 0x3E4 "WIN0PRAA249,Window 0 Palette Entry 249 Address" line.long 0x3E8 "WIN0PRAA250,Window 0 Palette Entry 250 Address" line.long 0x3EC "WIN0PRAA251,Window 0 Palette Entry 251 Address" line.long 0x3F0 "WIN0PRAA252,Window 0 Palette Entry 252 Address" line.long 0x3F4 "WIN0PRAA253,Window 0 Palette Entry 253 Address" line.long 0x3F8 "WIN0PRAA254,Window 0 Palette Entry 254 Address" line.long 0x3FC "WIN0PRAA255,Window 0 Palette Entry 255 Address" group.long 0x800++0x3FF "WIN1 Palette Ram Access Address" line.long 0x0 "WIN1PRAA0,Window 1 Palette Entry 0 Address" line.long 0x4 "WIN1PRAA1,Window 1 Palette Entry 1 Address" line.long 0x8 "WIN1PRAA2,Window 1 Palette Entry 2 Address" line.long 0xC "WIN1PRAA3,Window 1 Palette Entry 3 Address" line.long 0x10 "WIN1PRAA4,Window 1 Palette Entry 4 Address" line.long 0x14 "WIN1PRAA5,Window 1 Palette Entry 5 Address" line.long 0x18 "WIN1PRAA6,Window 1 Palette Entry 6 Address" line.long 0x1C "WIN1PRAA7,Window 1 Palette Entry 7 Address" line.long 0x20 "WIN1PRAA8,Window 1 Palette Entry 8 Address" line.long 0x24 "WIN1PRAA9,Window 1 Palette Entry 9 Address" line.long 0x28 "WIN1PRAA10,Window 1 Palette Entry 10 Address" line.long 0x2C "WIN1PRAA11,Window 1 Palette Entry 11 Address" line.long 0x30 "WIN1PRAA12,Window 1 Palette Entry 12 Address" line.long 0x34 "WIN1PRAA13,Window 1 Palette Entry 13 Address" line.long 0x38 "WIN1PRAA14,Window 1 Palette Entry 14 Address" line.long 0x3C "WIN1PRAA15,Window 1 Palette Entry 15 Address" line.long 0x40 "WIN1PRAA16,Window 1 Palette Entry 16 Address" line.long 0x44 "WIN1PRAA17,Window 1 Palette Entry 17 Address" line.long 0x48 "WIN1PRAA18,Window 1 Palette Entry 18 Address" line.long 0x4C "WIN1PRAA19,Window 1 Palette Entry 19 Address" line.long 0x50 "WIN1PRAA20,Window 1 Palette Entry 20 Address" line.long 0x54 "WIN1PRAA21,Window 1 Palette Entry 21 Address" line.long 0x58 "WIN1PRAA22,Window 1 Palette Entry 22 Address" line.long 0x5C "WIN1PRAA23,Window 1 Palette Entry 23 Address" line.long 0x60 "WIN1PRAA24,Window 1 Palette Entry 24 Address" line.long 0x64 "WIN1PRAA25,Window 1 Palette Entry 25 Address" line.long 0x68 "WIN1PRAA26,Window 1 Palette Entry 26 Address" line.long 0x6C "WIN1PRAA27,Window 1 Palette Entry 27 Address" line.long 0x70 "WIN1PRAA28,Window 1 Palette Entry 28 Address" line.long 0x74 "WIN1PRAA29,Window 1 Palette Entry 29 Address" line.long 0x78 "WIN1PRAA30,Window 1 Palette Entry 30 Address" line.long 0x7C "WIN1PRAA31,Window 1 Palette Entry 31 Address" line.long 0x80 "WIN1PRAA32,Window 1 Palette Entry 32 Address" line.long 0x84 "WIN1PRAA33,Window 1 Palette Entry 33 Address" line.long 0x88 "WIN1PRAA34,Window 1 Palette Entry 34 Address" line.long 0x8C "WIN1PRAA35,Window 1 Palette Entry 35 Address" line.long 0x90 "WIN1PRAA36,Window 1 Palette Entry 36 Address" line.long 0x94 "WIN1PRAA37,Window 1 Palette Entry 37 Address" line.long 0x98 "WIN1PRAA38,Window 1 Palette Entry 38 Address" line.long 0x9C "WIN1PRAA39,Window 1 Palette Entry 39 Address" line.long 0xA0 "WIN1PRAA40,Window 1 Palette Entry 40 Address" line.long 0xA4 "WIN1PRAA41,Window 1 Palette Entry 41 Address" line.long 0xA8 "WIN1PRAA42,Window 1 Palette Entry 42 Address" line.long 0xAC "WIN1PRAA43,Window 1 Palette Entry 43 Address" line.long 0xB0 "WIN1PRAA44,Window 1 Palette Entry 44 Address" line.long 0xB4 "WIN1PRAA45,Window 1 Palette Entry 45 Address" line.long 0xB8 "WIN1PRAA46,Window 1 Palette Entry 46 Address" line.long 0xBC "WIN1PRAA47,Window 1 Palette Entry 47 Address" line.long 0xC0 "WIN1PRAA48,Window 1 Palette Entry 48 Address" line.long 0xC4 "WIN1PRAA49,Window 1 Palette Entry 49 Address" line.long 0xC8 "WIN1PRAA50,Window 1 Palette Entry 50 Address" line.long 0xCC "WIN1PRAA51,Window 1 Palette Entry 51 Address" line.long 0xD0 "WIN1PRAA52,Window 1 Palette Entry 52 Address" line.long 0xD4 "WIN1PRAA53,Window 1 Palette Entry 53 Address" line.long 0xD8 "WIN1PRAA54,Window 1 Palette Entry 54 Address" line.long 0xDC "WIN1PRAA55,Window 1 Palette Entry 55 Address" line.long 0xE0 "WIN1PRAA56,Window 1 Palette Entry 56 Address" line.long 0xE4 "WIN1PRAA57,Window 1 Palette Entry 57 Address" line.long 0xE8 "WIN1PRAA58,Window 1 Palette Entry 58 Address" line.long 0xEC "WIN1PRAA59,Window 1 Palette Entry 59 Address" line.long 0xF0 "WIN1PRAA60,Window 1 Palette Entry 60 Address" line.long 0xF4 "WIN1PRAA61,Window 1 Palette Entry 61 Address" line.long 0xF8 "WIN1PRAA62,Window 1 Palette Entry 62 Address" line.long 0xFC "WIN1PRAA63,Window 1 Palette Entry 63 Address" line.long 0x100 "WIN1PRAA64,Window 1 Palette Entry 64 Address" line.long 0x104 "WIN1PRAA65,Window 1 Palette Entry 65 Address" line.long 0x108 "WIN1PRAA66,Window 1 Palette Entry 66 Address" line.long 0x10C "WIN1PRAA67,Window 1 Palette Entry 67 Address" line.long 0x110 "WIN1PRAA68,Window 1 Palette Entry 68 Address" line.long 0x114 "WIN1PRAA69,Window 1 Palette Entry 69 Address" line.long 0x118 "WIN1PRAA70,Window 1 Palette Entry 70 Address" line.long 0x11C "WIN1PRAA71,Window 1 Palette Entry 71 Address" line.long 0x120 "WIN1PRAA72,Window 1 Palette Entry 72 Address" line.long 0x124 "WIN1PRAA73,Window 1 Palette Entry 73 Address" line.long 0x128 "WIN1PRAA74,Window 1 Palette Entry 74 Address" line.long 0x12C "WIN1PRAA75,Window 1 Palette Entry 75 Address" line.long 0x130 "WIN1PRAA76,Window 1 Palette Entry 76 Address" line.long 0x134 "WIN1PRAA77,Window 1 Palette Entry 77 Address" line.long 0x138 "WIN1PRAA78,Window 1 Palette Entry 78 Address" line.long 0x13C "WIN1PRAA79,Window 1 Palette Entry 79 Address" line.long 0x140 "WIN1PRAA80,Window 1 Palette Entry 80 Address" line.long 0x144 "WIN1PRAA81,Window 1 Palette Entry 81 Address" line.long 0x148 "WIN1PRAA82,Window 1 Palette Entry 82 Address" line.long 0x14C "WIN1PRAA83,Window 1 Palette Entry 83 Address" line.long 0x150 "WIN1PRAA84,Window 1 Palette Entry 84 Address" line.long 0x154 "WIN1PRAA85,Window 1 Palette Entry 85 Address" line.long 0x158 "WIN1PRAA86,Window 1 Palette Entry 86 Address" line.long 0x15C "WIN1PRAA87,Window 1 Palette Entry 87 Address" line.long 0x160 "WIN1PRAA88,Window 1 Palette Entry 88 Address" line.long 0x164 "WIN1PRAA89,Window 1 Palette Entry 89 Address" line.long 0x168 "WIN1PRAA90,Window 1 Palette Entry 90 Address" line.long 0x16C "WIN1PRAA91,Window 1 Palette Entry 91 Address" line.long 0x170 "WIN1PRAA92,Window 1 Palette Entry 92 Address" line.long 0x174 "WIN1PRAA93,Window 1 Palette Entry 93 Address" line.long 0x178 "WIN1PRAA94,Window 1 Palette Entry 94 Address" line.long 0x17C "WIN1PRAA95,Window 1 Palette Entry 95 Address" line.long 0x180 "WIN1PRAA96,Window 1 Palette Entry 96 Address" line.long 0x184 "WIN1PRAA97,Window 1 Palette Entry 97 Address" line.long 0x188 "WIN1PRAA98,Window 1 Palette Entry 98 Address" line.long 0x18C "WIN1PRAA99,Window 1 Palette Entry 99 Address" line.long 0x190 "WIN1PRAA100,Window 1 Palette Entry 100 Address" line.long 0x194 "WIN1PRAA101,Window 1 Palette Entry 101 Address" line.long 0x198 "WIN1PRAA102,Window 1 Palette Entry 102 Address" line.long 0x19C "WIN1PRAA103,Window 1 Palette Entry 103 Address" line.long 0x1A0 "WIN1PRAA104,Window 1 Palette Entry 104 Address" line.long 0x1A4 "WIN1PRAA105,Window 1 Palette Entry 105 Address" line.long 0x1A8 "WIN1PRAA106,Window 1 Palette Entry 106 Address" line.long 0x1AC "WIN1PRAA107,Window 1 Palette Entry 107 Address" line.long 0x1B0 "WIN1PRAA108,Window 1 Palette Entry 108 Address" line.long 0x1B4 "WIN1PRAA109,Window 1 Palette Entry 109 Address" line.long 0x1B8 "WIN1PRAA110,Window 1 Palette Entry 110 Address" line.long 0x1BC "WIN1PRAA111,Window 1 Palette Entry 111 Address" line.long 0x1C0 "WIN1PRAA112,Window 1 Palette Entry 112 Address" line.long 0x1C4 "WIN1PRAA113,Window 1 Palette Entry 113 Address" line.long 0x1C8 "WIN1PRAA114,Window 1 Palette Entry 114 Address" line.long 0x1CC "WIN1PRAA115,Window 1 Palette Entry 115 Address" line.long 0x1D0 "WIN1PRAA116,Window 1 Palette Entry 116 Address" line.long 0x1D4 "WIN1PRAA117,Window 1 Palette Entry 117 Address" line.long 0x1D8 "WIN1PRAA118,Window 1 Palette Entry 118 Address" line.long 0x1DC "WIN1PRAA119,Window 1 Palette Entry 119 Address" line.long 0x1E0 "WIN1PRAA120,Window 1 Palette Entry 120 Address" line.long 0x1E4 "WIN1PRAA121,Window 1 Palette Entry 121 Address" line.long 0x1E8 "WIN1PRAA122,Window 1 Palette Entry 122 Address" line.long 0x1EC "WIN1PRAA123,Window 1 Palette Entry 123 Address" line.long 0x1F0 "WIN1PRAA124,Window 1 Palette Entry 124 Address" line.long 0x1F4 "WIN1PRAA125,Window 1 Palette Entry 125 Address" line.long 0x1F8 "WIN1PRAA126,Window 1 Palette Entry 126 Address" line.long 0x1FC "WIN1PRAA127,Window 1 Palette Entry 127 Address" line.long 0x200 "WIN1PRAA128,Window 1 Palette Entry 128 Address" line.long 0x204 "WIN1PRAA129,Window 1 Palette Entry 129 Address" line.long 0x208 "WIN1PRAA130,Window 1 Palette Entry 130 Address" line.long 0x20C "WIN1PRAA131,Window 1 Palette Entry 131 Address" line.long 0x210 "WIN1PRAA132,Window 1 Palette Entry 132 Address" line.long 0x214 "WIN1PRAA133,Window 1 Palette Entry 133 Address" line.long 0x218 "WIN1PRAA134,Window 1 Palette Entry 134 Address" line.long 0x21C "WIN1PRAA135,Window 1 Palette Entry 135 Address" line.long 0x220 "WIN1PRAA136,Window 1 Palette Entry 136 Address" line.long 0x224 "WIN1PRAA137,Window 1 Palette Entry 137 Address" line.long 0x228 "WIN1PRAA138,Window 1 Palette Entry 138 Address" line.long 0x22C "WIN1PRAA139,Window 1 Palette Entry 139 Address" line.long 0x230 "WIN1PRAA140,Window 1 Palette Entry 140 Address" line.long 0x234 "WIN1PRAA141,Window 1 Palette Entry 141 Address" line.long 0x238 "WIN1PRAA142,Window 1 Palette Entry 142 Address" line.long 0x23C "WIN1PRAA143,Window 1 Palette Entry 143 Address" line.long 0x240 "WIN1PRAA144,Window 1 Palette Entry 144 Address" line.long 0x244 "WIN1PRAA145,Window 1 Palette Entry 145 Address" line.long 0x248 "WIN1PRAA146,Window 1 Palette Entry 146 Address" line.long 0x24C "WIN1PRAA147,Window 1 Palette Entry 147 Address" line.long 0x250 "WIN1PRAA148,Window 1 Palette Entry 148 Address" line.long 0x254 "WIN1PRAA149,Window 1 Palette Entry 149 Address" line.long 0x258 "WIN1PRAA150,Window 1 Palette Entry 150 Address" line.long 0x25C "WIN1PRAA151,Window 1 Palette Entry 151 Address" line.long 0x260 "WIN1PRAA152,Window 1 Palette Entry 152 Address" line.long 0x264 "WIN1PRAA153,Window 1 Palette Entry 153 Address" line.long 0x268 "WIN1PRAA154,Window 1 Palette Entry 154 Address" line.long 0x26C "WIN1PRAA155,Window 1 Palette Entry 155 Address" line.long 0x270 "WIN1PRAA156,Window 1 Palette Entry 156 Address" line.long 0x274 "WIN1PRAA157,Window 1 Palette Entry 157 Address" line.long 0x278 "WIN1PRAA158,Window 1 Palette Entry 158 Address" line.long 0x27C "WIN1PRAA159,Window 1 Palette Entry 159 Address" line.long 0x280 "WIN1PRAA160,Window 1 Palette Entry 160 Address" line.long 0x284 "WIN1PRAA161,Window 1 Palette Entry 161 Address" line.long 0x288 "WIN1PRAA162,Window 1 Palette Entry 162 Address" line.long 0x28C "WIN1PRAA163,Window 1 Palette Entry 163 Address" line.long 0x290 "WIN1PRAA164,Window 1 Palette Entry 164 Address" line.long 0x294 "WIN1PRAA165,Window 1 Palette Entry 165 Address" line.long 0x298 "WIN1PRAA166,Window 1 Palette Entry 166 Address" line.long 0x29C "WIN1PRAA167,Window 1 Palette Entry 167 Address" line.long 0x2A0 "WIN1PRAA168,Window 1 Palette Entry 168 Address" line.long 0x2A4 "WIN1PRAA169,Window 1 Palette Entry 169 Address" line.long 0x2A8 "WIN1PRAA170,Window 1 Palette Entry 170 Address" line.long 0x2AC "WIN1PRAA171,Window 1 Palette Entry 171 Address" line.long 0x2B0 "WIN1PRAA172,Window 1 Palette Entry 172 Address" line.long 0x2B4 "WIN1PRAA173,Window 1 Palette Entry 173 Address" line.long 0x2B8 "WIN1PRAA174,Window 1 Palette Entry 174 Address" line.long 0x2BC "WIN1PRAA175,Window 1 Palette Entry 175 Address" line.long 0x2C0 "WIN1PRAA176,Window 1 Palette Entry 176 Address" line.long 0x2C4 "WIN1PRAA177,Window 1 Palette Entry 177 Address" line.long 0x2C8 "WIN1PRAA178,Window 1 Palette Entry 178 Address" line.long 0x2CC "WIN1PRAA179,Window 1 Palette Entry 179 Address" line.long 0x2D0 "WIN1PRAA180,Window 1 Palette Entry 180 Address" line.long 0x2D4 "WIN1PRAA181,Window 1 Palette Entry 181 Address" line.long 0x2D8 "WIN1PRAA182,Window 1 Palette Entry 182 Address" line.long 0x2DC "WIN1PRAA183,Window 1 Palette Entry 183 Address" line.long 0x2E0 "WIN1PRAA184,Window 1 Palette Entry 184 Address" line.long 0x2E4 "WIN1PRAA185,Window 1 Palette Entry 185 Address" line.long 0x2E8 "WIN1PRAA186,Window 1 Palette Entry 186 Address" line.long 0x2EC "WIN1PRAA187,Window 1 Palette Entry 187 Address" line.long 0x2F0 "WIN1PRAA188,Window 1 Palette Entry 188 Address" line.long 0x2F4 "WIN1PRAA189,Window 1 Palette Entry 189 Address" line.long 0x2F8 "WIN1PRAA190,Window 1 Palette Entry 190 Address" line.long 0x2FC "WIN1PRAA191,Window 1 Palette Entry 191 Address" line.long 0x300 "WIN1PRAA192,Window 1 Palette Entry 192 Address" line.long 0x304 "WIN1PRAA193,Window 1 Palette Entry 193 Address" line.long 0x308 "WIN1PRAA194,Window 1 Palette Entry 194 Address" line.long 0x30C "WIN1PRAA195,Window 1 Palette Entry 195 Address" line.long 0x310 "WIN1PRAA196,Window 1 Palette Entry 196 Address" line.long 0x314 "WIN1PRAA197,Window 1 Palette Entry 197 Address" line.long 0x318 "WIN1PRAA198,Window 1 Palette Entry 198 Address" line.long 0x31C "WIN1PRAA199,Window 1 Palette Entry 199 Address" line.long 0x320 "WIN1PRAA200,Window 1 Palette Entry 200 Address" line.long 0x324 "WIN1PRAA201,Window 1 Palette Entry 201 Address" line.long 0x328 "WIN1PRAA202,Window 1 Palette Entry 202 Address" line.long 0x32C "WIN1PRAA203,Window 1 Palette Entry 203 Address" line.long 0x330 "WIN1PRAA204,Window 1 Palette Entry 204 Address" line.long 0x334 "WIN1PRAA205,Window 1 Palette Entry 205 Address" line.long 0x338 "WIN1PRAA206,Window 1 Palette Entry 206 Address" line.long 0x33C "WIN1PRAA207,Window 1 Palette Entry 207 Address" line.long 0x340 "WIN1PRAA208,Window 1 Palette Entry 208 Address" line.long 0x344 "WIN1PRAA209,Window 1 Palette Entry 209 Address" line.long 0x348 "WIN1PRAA210,Window 1 Palette Entry 210 Address" line.long 0x34C "WIN1PRAA211,Window 1 Palette Entry 211 Address" line.long 0x350 "WIN1PRAA212,Window 1 Palette Entry 212 Address" line.long 0x354 "WIN1PRAA213,Window 1 Palette Entry 213 Address" line.long 0x358 "WIN1PRAA214,Window 1 Palette Entry 214 Address" line.long 0x35C "WIN1PRAA215,Window 1 Palette Entry 215 Address" line.long 0x360 "WIN1PRAA216,Window 1 Palette Entry 216 Address" line.long 0x364 "WIN1PRAA217,Window 1 Palette Entry 217 Address" line.long 0x368 "WIN1PRAA218,Window 1 Palette Entry 218 Address" line.long 0x36C "WIN1PRAA219,Window 1 Palette Entry 219 Address" line.long 0x370 "WIN1PRAA220,Window 1 Palette Entry 220 Address" line.long 0x374 "WIN1PRAA221,Window 1 Palette Entry 221 Address" line.long 0x378 "WIN1PRAA222,Window 1 Palette Entry 222 Address" line.long 0x37C "WIN1PRAA223,Window 1 Palette Entry 223 Address" line.long 0x380 "WIN1PRAA224,Window 1 Palette Entry 224 Address" line.long 0x384 "WIN1PRAA225,Window 1 Palette Entry 225 Address" line.long 0x388 "WIN1PRAA226,Window 1 Palette Entry 226 Address" line.long 0x38C "WIN1PRAA227,Window 1 Palette Entry 227 Address" line.long 0x390 "WIN1PRAA228,Window 1 Palette Entry 228 Address" line.long 0x394 "WIN1PRAA229,Window 1 Palette Entry 229 Address" line.long 0x398 "WIN1PRAA230,Window 1 Palette Entry 230 Address" line.long 0x39C "WIN1PRAA231,Window 1 Palette Entry 231 Address" line.long 0x3A0 "WIN1PRAA232,Window 1 Palette Entry 232 Address" line.long 0x3A4 "WIN1PRAA233,Window 1 Palette Entry 233 Address" line.long 0x3A8 "WIN1PRAA234,Window 1 Palette Entry 234 Address" line.long 0x3AC "WIN1PRAA235,Window 1 Palette Entry 235 Address" line.long 0x3B0 "WIN1PRAA236,Window 1 Palette Entry 236 Address" line.long 0x3B4 "WIN1PRAA237,Window 1 Palette Entry 237 Address" line.long 0x3B8 "WIN1PRAA238,Window 1 Palette Entry 238 Address" line.long 0x3BC "WIN1PRAA239,Window 1 Palette Entry 239 Address" line.long 0x3C0 "WIN1PRAA240,Window 1 Palette Entry 240 Address" line.long 0x3C4 "WIN1PRAA241,Window 1 Palette Entry 241 Address" line.long 0x3C8 "WIN1PRAA242,Window 1 Palette Entry 242 Address" line.long 0x3CC "WIN1PRAA243,Window 1 Palette Entry 243 Address" line.long 0x3D0 "WIN1PRAA244,Window 1 Palette Entry 244 Address" line.long 0x3D4 "WIN1PRAA245,Window 1 Palette Entry 245 Address" line.long 0x3D8 "WIN1PRAA246,Window 1 Palette Entry 246 Address" line.long 0x3DC "WIN1PRAA247,Window 1 Palette Entry 247 Address" line.long 0x3E0 "WIN1PRAA248,Window 1 Palette Entry 248 Address" line.long 0x3E4 "WIN1PRAA249,Window 1 Palette Entry 249 Address" line.long 0x3E8 "WIN1PRAA250,Window 1 Palette Entry 250 Address" line.long 0x3EC "WIN1PRAA251,Window 1 Palette Entry 251 Address" line.long 0x3F0 "WIN1PRAA252,Window 1 Palette Entry 252 Address" line.long 0x3F4 "WIN1PRAA253,Window 1 Palette Entry 253 Address" line.long 0x3F8 "WIN1PRAA254,Window 1 Palette Entry 254 Address" line.long 0x3FC "WIN1PRAA255,Window 1 Palette Entry 255 Address" tree.end width 0xb tree.end endif tree "ADC & Touch Screen Interface (Analog to Digital Converter)" base ad:0x58000000 width 9. sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) group.long 0x00++0x3 line.long 0x00 "ADCCON,ADC Control Register" bitfld.long 0x00 15. " ECFLG ,End of conversion flag" "In progress,Ended" bitfld.long 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value" bitfld.long 0x00 3.--5. " SEL_MUX ,Analog input channel select" "AIN0,AIN1,AIN2,AIN3,YM,YP,XM,XP" textline " " bitfld.long 0x00 2. " STDBM ,Standby mode select" "Normal,Standby" bitfld.long 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE_START ,A/D conversion start" "No operation,Started" else group.long 0x00++0x3 line.long 0x00 "ADCCON,ADC Control Register" bitfld.long 0x00 15. " ECFLG ,End of conversion flag" "In progress,Ended" bitfld.long 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled" textline " " hexmask.long.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value" bitfld.long 0x00 2. " STDBM ,Standby mode select" "Normal,Standby" textline " " bitfld.long 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ENABLE_START ,A/D conversion start" "No operation,Started" endif group.long 0x04++0x3 line.long 0x00 "ADCTSC,ADC Touch Screen Control Register" bitfld.long 0x00 8. " UD_SEN ,Stylus Up or Down status" "Down,Up" bitfld.long 0x00 7. " YM_SEN ,YM Switch Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " YP_SEN ,YP Switch Enable" "Enabled,Disabled" bitfld.long 0x00 5. " XM_SEN ,XM Switch Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " XP_SEN ,XP Switch Enable" "Enabled,Disabled" bitfld.long 0x00 3. " PULL_UP ,Pull-up switch enable" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential" bitfld.long 0x00 0.--1. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt" group.long 0x08++0x3 line.long 0x00 "ADCDLY,ADC Start Or Interval Delay Register" hexmask.long.word 0x00 0.--15. 1. " DELAY ,Delay value" rgroup.long 0x0c++0x3 line.long 0x00 "ADCDAT0,ADC Conversion Data Register 0" bitfld.long 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up" bitfld.long 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequential" textline " " bitfld.long 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt" hexmask.long.word 0x00 0.--9. 1. " XPDATA ,X-position conversion data value" rgroup.long 0x10++0x3 line.long 0x00 "ADCDAT1,ADC Conversion Data Register 1" bitfld.long 0x00 15. " UPDOWN ,Up or Down state of Stylus at Waiting for Interrupt Mode" "Down,Up" bitfld.long 0x00 14. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential" textline " " bitfld.long 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt" hexmask.long.word 0x00 0.--9. 1. " YPDATA ,Y-position conversion data value" group.long 0x14++0x3 line.long 0x0 "ADCUPDN,Stylus Up or Down Interrpt Status Register" bitfld.long 0x00 1. " TSC_UP ,Stylus Up Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " TSC_DN ,Stylus Down Interrupt" "No interrupt,Interrupt" sif (cpu()=="S3C2443X") group.long 0x18++0x3 line.long 0x00 "ADCMUX,Analog input channel select" bitfld.long 0x00 0.--3. " ADCMUX ,Analog input channel select" "0,1,2,3,4,5,6,7,8,9,?..." endif width 0xb tree.end tree "RTC (Real Time Clock)" base ad:0x57000000 width 9. group.byte 0x40++0x0 line.byte 0x00 "RTCCON,RTC Control Register" sif (cpu()=="S3C2443X") bitfld.byte 0x00 5.--7. " TICsel2 ,Tick Time clock select2" "1/16384,1/8192,1/4096,1/2048,1/128,1,?..." bitfld.byte 0x00 4. " TICsel ,Tick Time clock select1" "TICsel2,1/32768" textline " " endif bitfld.byte 0x00 3. " CLRST ,RTC clock count reset" "No reset,Reset" bitfld.byte 0x00 2. " CNTSEL ,BCD count select" "Merged,?..." textline " " bitfld.byte 0x00 1. " CLKSEL ,BCD clock select" "XTAL 1/2^15,?..." bitfld.byte 0x00 0. " RTCEN ,RTC control enable" "Disabled,Enabled" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) group.byte 0x44++0x0 line.byte 0x00 "TICNT,Tick Time Count Register" bitfld.byte 0x00 7. " TICK_INT_ENABLE ,Tick time interrupt enable" "Disabled,Enabled" hexmask.byte 0x00 0.--6. 1. " TICK_TIME_COUNT0 ,Tick time count value" else group.byte 0x44++0x0 line.byte 0x00 "TICNT0,Tick Time Count Register 0" bitfld.byte 0x00 7. " TICK_INT_EN ,Tick time interrupt enable" "Disabled,Enabled" hexmask.byte 0x00 0.--6. 1. " TICK_TC0 ,Upper 7bits of 15 bit tick time count value" group.byte 0x4C++0x0 line.byte 0x00 "TICNT1,Tick Time Count Register 1" hexmask.byte 0x00 0.--7. 1. " TICK_TC1 ,Lower 8bits of 15 bit tick time count value" endif group.byte 0x50++0x0 line.byte 0x00 "RTCALM,RTC Alarm Control Register" bitfld.byte 0x00 6. " ALMEN ,Alarm global enable" "Disabled,Enabled" bitfld.byte 0x00 5. " YEAREN ,Year alarm enable" "Disabled,Enabled" bitfld.byte 0x00 4. " MONREN ,Month alarm enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 3. " DATEEN ,Date alarm enable" "Disabled,Enabled" bitfld.byte 0x00 2. " HOUREN ,Hour alarm enable" "Disabled,Enabled" bitfld.byte 0x00 1. " MINEN ,Minute alarm enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 0. " SECEN ,Second alarm enable" "Disabled,Enabled" if (((d.b(ad:(0x57000000+0x50)))&0x41)==0x41) group.byte 0x54++0x0 line.byte 0x00 "ALMSEC,Alarm Second Data Register" bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else hgroup.byte 0x54++0x0 hide.byte 0x00 "ALMSEC,Alarm Second Data Register" endif if (((d.b(ad:(0x57000000+0x50)))&0x42)==0x42) group.byte 0x58++0x0 line.byte 0x00 "ALMMIN,Alarm Minute Data Register" bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else hgroup.byte 0x58++0x0 hide.byte 0x00 "ALMMIN,Alarm Minute Data Register" endif if ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)==0x20)) group.byte 0x5c++0x0 line.byte 0x00 "ALMHOUR,Alarm Hour Data Register" bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-" bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." elif ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)!=0x20)) group.byte 0x5c++0x0 line.byte 0x00 "ALMHOUR,Alarm hour data register" bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-" bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else hgroup.byte 0x5c++0x0 hide.byte 0x00 "ALMHOUR,Alarm Hour Data Register" endif if ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)==0x30)) group.byte 0x60++0x0 line.byte 0x00 "ALMDATE,Alarm Date Data Register" bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for alarm date" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)!=0x30)) group.byte 0x60++0x0 line.byte 0x00 "ALMDATE,Alarm Date Data Register" bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for alarm date" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else hgroup.byte 0x60++0x0 hide.byte 0x00 "ALMDATE,Alarm Date Data Register" endif if ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)==0x10)) group.byte 0x64++0x0 line.byte 0x00 "ALMMON,Alarm Month Data Register" bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1" bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for alarm month" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." elif ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)!=0x10)) group.byte 0x64++0x0 line.byte 0x00 "ALMMON,Alarm Month Data Register" bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1" bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for alarm month" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else hgroup.byte 0x64++0x0 hide.byte 0x00 "ALMMON,Alarm Month Data Register" endif if (((d.b(ad:(0x57000000+0x50)))&0x60)==0x60) group.byte 0x68++0x0 line.byte 0x00 "ALMYEAR,Alarm Year Data Register" hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year" else hgroup.byte 0x68++0x0 hide.byte 0x00 "ALMYEAR,Alarm Year Data Register" endif if (((d.b(ad:(0x57000000+0x70)))&0x70)<0x60) group.byte 0x70++0x0 line.byte 0x00 "BCDSEC,BCD Second Register" bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for second" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.byte 0x70++0x0 line.byte 0x00 "BCDSEC,BCD Second Register" bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for second" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..." endif if (((d.b(ad:(0x57000000+0x74)))&0x70)<0x60) group.byte 0x74++0x0 line.byte 0x00 "BCDMIN,BCD Minute Register" bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.byte 0x74++0x0 line.byte 0x00 "BCDMIN,BCD Minute Register" bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-" bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for minute" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..." endif if (((d.b(ad:(0x57000000+0x78)))&0x30)==0x20) group.byte 0x78++0x0 line.byte 0x00 "BCDHOUR,BCD Hour Register" bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-" bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..." elif ((((d.b(ad:(0x57000000+0x78)))&0x30)==0x00)||(((d.b(ad:(0x57000000+0x78)))&0x30)==0x10)) group.byte 0x78++0x0 line.byte 0x00 "BCDHOUR,BCD Hour Register" bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-" bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.byte 0x78++0x0 line.byte 0x00 "BCDHOUR,BCD Hour Register" bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-" bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..." endif if (((d.b(ad:(0x57000000+0x7c)))&0x30)==0x30) group.byte 0x7c++0x0 line.byte 0x00 "BCDDATE,BCD Date Register" bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for date" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..." else group.byte 0x7c++0x0 line.byte 0x00 "BCDDATE,BCD Date Register" bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3" bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for date" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." endif group.byte 0x80++0x0 line.byte 0x00 "BCDDAY,BCD A Day Of The Week Register" bitfld.byte 0x00 0.--2. " DAYDATA ,BCD value for a day of the week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday" if (((d.b(ad:(0x57000000+0x84)))&0x10)==0x00) group.byte 0x84++0x0 line.byte 0x00 "BCDMON,BCD Month Register" bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1" bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for month" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..." else group.byte 0x84++0x0 line.byte 0x00 "BCDMON,BCD Month Register" bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1" bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for month" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..." endif group.byte 0x88++0x0 line.byte 0x00 "BCDYEAR,BCD Year Register" hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year" group.byte 0x6c++0x0 line.byte 0x00 "RTCLBAT,RTC Low Battry Check Register" eventfld.byte 0x00 0. " LOWBAT ,Low Battery" "0,1" sif (cpu()=="S3C2443X") rgroup.long 0x90++0x3 line.long 0x00 "TICKCNT,Internal Tick Time Counter Register" hexmask.long.word 0x00 0.--14. 1. " TICKCNT ,Internal tick counter" endif width 11. sif (cpu()=="S3C2442B") group.long 0x90++0x7 line.long 0x0 "TICCNT2,Tick Time Count 2 Register" hexmask.long.word 0x00 0.--15. 1. " TICCNT2 ,16 bit tick time count 2 value" line.long 0x4 "TICCNT2CON,Tick Counter 2 Control Register" bitfld.byte 0x04 3. " TICCNT2EN ,Tick time counter 2 interrupt enable" "Disabled,Enabled" bitfld.byte 0x04 0.--2. " TICCNT2CLK ,Tick time counter 2 clock selection" "1/32768s,1/16384s,1/8192s,1/4096,1/2048,?..." rgroup.long 0x98++0x3 line.long 0x0 "TICCURCNT,Current Tick Count Value Register" hexmask.long.word 0x00 0.--15. 1. " TICCURCNT ,Current tick count value" group.long 0x9c++0x3 line.long 0x0 "TICCNTSEL,Tick Counter Selection Register" bitfld.byte 0x00 0. " TICCNTSEL ,Tick Counter Selection" "TICCNT,TICCNT2" endif width 0xb tree.end tree "Watchdog Timer" base ad:0x53000000 width 7. group.long 0x00++0x3 line.long 0x00 "WTCON,Watchdog Timer Control Register" hexmask.long.byte 0x00 8.--15. 1. " PV ,Prescaler Value" bitfld.long 0x00 5. " WDT ,Watchdog timer enable" "Disabled,Enabled" bitfld.long 0x00 3.--4. " CLKSEL ,Clock division factor" "16,32,64,128" textline " " bitfld.long 0x00 2. " INTGEN ,Interrupt generation" "Disabled,Enabled" bitfld.long 0x00 0. " RSTEN ,Reset enable" "Disabled,Enabled" group.long 0x04++0x3 line.long 0x00 "WTDAT,Watchdog Timer Data Register" hexmask.long.word 0x00 0.--15. 1. " CNTRL ,Count reload value" group.long 0x08++0x3 line.long 0x00 "WTCNT,Watchdog Timer Count Register" hexmask.long.word 0x00 0.--15. 1. " CNTVAL ,Count value" width 0xb tree.end tree "MMC/SD/SDIO Controller" base ad:0x5a000000 width 11. group.long 0x00++0x3 line.long 0x00 "SDICON,SDI Control Register" bitfld.long 0x00 8. " SDreset ,SDMMC reset" "Normal,Reset" bitfld.long 0x00 5. " CTYP ,Clock type" "SD,MMC" textline " " bitfld.long 0x00 4. " ByteOrder ,Byte order type" "Type A,Type B" bitfld.long 0x00 3. " RcvIOInt ,Receive SDIO interrupt from card" "Ignored,Received" textline " " bitfld.long 0x00 2. " RWaitEn ,Read wait enable" "Disabled,Enabled" bitfld.long 0x00 0. " ENCLK ,Clock out enable" "Disabled,Enabled" group.long 0x04++0x3 line.long 0x00 "SDIPRE,SDI Baud Rate Prescaler Register" hexmask.long.byte 0x00 0.--7. 1. " PRESVAL ,Prescaler Value" group.long 0x08++0x3 line.long 0x00 "SDICMDARG,SDI Command Argument Register" group.long 0x0c++0x3 line.long 0x00 "SDICMDCON,SDI Command Control Register" bitfld.long 0x00 12. " AbortCmd ,Abort command" "Normal,Abort" bitfld.long 0x00 11. " WithData ,Command with data" "Without,With" textline " " bitfld.long 0x00 10. " LongRsp ,Response size" "Short,Long" bitfld.long 0x00 9. " WaitRsp ,Wait response" "No response,Wait" textline " " bitfld.long 0x00 8. " CMST ,Command operation start" "Ready,Started" hexmask.long.byte 0x00 0.--7. 1. " CmdIndex ,Command Index" group.long 0x10++0x3 line.long 0x00 "SDICMDSTA,SDI Command Status Register" eventfld.long 0x00 12. " RspCrc ,Response CRC fail" "Not detected,Detected" eventfld.long 0x00 11. " CmdSent ,Command sent" "Not detected,Detected" textline " " eventfld.long 0x00 10. " CmdTout ,Command time out" "Not detected,Detected" eventfld.long 0x00 9. " RspFin ,Response receive end" "Not detected,Detected" textline " " eventfld.long 0x00 8. " CmdOn ,CMD line progress on" "Not detected,In progress" hexmask.long.byte 0x00 0.--7. 1. " RspIndex ,Response index 6bit with start 2bit(8bit)" if (((d.l(ad:(0x5a000000+0xc)))&0x400)==0x400) rgroup.long 0x14++0x3 line.long 0x00 "SDIRSP0,SDI Response Register 0" hexmask.long 0x00 0.--31. 1. " Response0 ,Card status[127:96]" sif ((cpu()=="S3C2440A")||(cpu()=="S3C2442B")) rgroup.long 0x18++0x3 line.long 0x00 "SDIRSP1,SDI Response Register 1" hexmask.long 0x00 0.--31. 1. " Response1 ,Card status[64:95]" endif sif (cpu()=="S3C2443X") rgroup.long 0x18++0x3 line.long 0x00 "SDIRSP1,SDI Response Register 1" hexmask.long.byte 0x00 24.--31. 1. " RCRC7 ,CRC7 card status[95:88]" hexmask.long.tbyte 0x00 0.--23. 1. " Response1 ,Card status[64:87]" endif rgroup.long 0x1c++0x3 line.long 0x00 "SDIRSP2,SDI Response Register 2" hexmask.long 0x00 0.--31. 1. " Response2 ,Card status[63:32]" rgroup.long 0x20++0x3 line.long 0x00 "SDIRSP3,SDI Response Register 3" hexmask.long 0x00 0.--31. 1. " Response3 ,Card status[31:0]" else rgroup.long 0x14++0x3 line.long 0x00 "SDIRSP0,SDI Response Register 0" hexmask.long 0x00 0.--31. 1. " Response0 ,Card status[31:0]" rgroup.long 0x18++0x3 line.long 0x00 "SDIRSP1,SDI Response Register 1" hexmask.long.byte 0x00 24.--31. 1. " RCRC7 ,CRC7" rgroup.long 0x1c++0x3 hide.long 0x00 "SDIRSP2,SDI Response Register 2" rgroup.long 0x20++0x3 hide.long 0x00 "SDIRSP3,SDI Response Register 3" endif group.long 0x24++0x3 line.long 0x00 "SDIDTIMER,SDI Data / Busy Timer Register" hexmask.long.tbyte 0x00 0.--22. 1. " DataTimer ,Data / busy timeout period" if (((d.l(ad:(0x5a000000+0x2c)))&0x20000)==0x20000) ; SDIDATCON -> BlkMode = block group.long 0x28++0x3 line.long 0x00 "SDIBSIZE,SDI Block Size Register" hexmask.long.word 0x00 0.--11. 1. " BlkSize ,Block size value" else group.long 0x28++0x3 line.long 0x00 "SDIBSIZE,SDI Block Size Register" endif group.long 0x2c++0x3 line.long 0x00 "SDIDATCON,SDI Data Control Register" bitfld.long 0x00 24. " Burst4 ,Burst4 enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " DataSize ,Date size" "Byte,Halfword,Word,?..." textline " " bitfld.long 0x00 21. " PrdType ,SDIO interrupt period type" "2 cycles,> 2 cycles" bitfld.long 0x00 20. " TARSP ,Transmit after response" "After DatMode,After response" textline " " bitfld.long 0x00 19. " RACMD ,Receive after command" "After DatMode,After command" bitfld.long 0x00 18. " BACMD ,Busy after command" "After DatMode,After command" textline " " bitfld.long 0x00 17. " BlkMode ,Block mode" "Stream,Block" bitfld.long 0x00 16. " WideBus ,Wide bus enable" "Standard,Wide" textline " " bitfld.long 0x00 15. " EnDMA ,Enable DMA" "Disabled,Enabled" bitfld.long 0x00 14. " DTST ,Data transfer start" "Ready,Started" textline " " bitfld.long 0x00 12.--13. " DatMode ,Data transfer mode" "No operation,Busy check,Data receive,Data transmit" hexmask.long.word 0x00 0.--11. 1. " BlkNum ,Block number" rgroup.long 0x30++0x3 line.long 0x00 "SDIDATCNT,SDI Data Remain Counter Register" hexmask.long.word 0x00 12.--23. 1. " BlkNumCnt ,Remaining block number" hexmask.long.word 0x00 0.--11. 1. " BlkCnt ,Remaining data byte of 1 block" group.long 0x34++0x3 line.long 0x00 "SDIDATSTA,SDI Data Status Register" eventfld.long 0x00 11. " NoBusy ,No Busy signal" "Not detected,Detected" eventfld.long 0x00 10. " RWaitReq ,Read wait request occurred" "Not occurred,Occurred" textline " " eventfld.long 0x00 9. " IOIntDet ,SDIO interrupt detect" "Not detected,Detected" eventfld.long 0x00 7. " CrcSta ,CRC status fail" "Not detected,Detected" textline " " eventfld.long 0x00 6. " DatCrc ,Data receive CRC fail" "Not detected,Detected" eventfld.long 0x00 5. " DatTout ,Data time out" "Not detected,Detected" textline " " eventfld.long 0x00 4. " DatFin ,Data transfer finish" "Not detected,Detected" eventfld.long 0x00 3. " BusyFin ,Busy finish" "Not detected,Detected" textline " " bitfld.long 0x00 1. " TxDatOn ,Tx data progress on" "Not active,In progress" bitfld.long 0x00 0. " RxDatOn ,Rx data progress on" "Not active,In progress" group.long 0x38++0x3 line.long 0x00 "SDIFSTA,SDI FIFO Status Register" bitfld.long 0x00 16. " FRST ,FIFO reset" "Normal,Reset" bitfld.long 0x00 14.--15. " FFfail ,FIFO fail error" "Not detected,Failed,Failed in last transfer,?..." textline " " bitfld.long 0x00 13. " TFDET ,FIFO available detect for Tx" "Not detected,Detected" bitfld.long 0x00 12. " RFDET ,FIFO available detect for Rx" "Not detected,Detected" textline " " bitfld.long 0x00 11. " TFHalf ,Tx FIFO half full" "33<=Tx FIFO<=64,0<=Tx FIFO<=32" bitfld.long 0x00 10. " TFEmpty ,Tx FIFO empty" "Not empty,Empty" textline " " eventfld.long 0x00 9. " RFLast ,Rx FIFO last data ready" "Not received,Received" bitfld.long 0x00 8. " RFFull ,Rx FIFO full" "Not full,Full" textline " " bitfld.long 0x00 7. " RFHalf ,Rx FIFO half full" "0<=Rx FIFO<=31,32<=Rx FIFO<=64" hexmask.long.byte 0x00 0.--6. 1. " FFCNT ,FIFO count" group.long 0x3c++0x3 line.long 0x00 "SDIINTMSK,SDI Interrupt Mask Register" bitfld.long 0x00 18. " NoBusyInt ,NoBusy interrupt enable" "Disabled,Enabled" bitfld.long 0x00 17. " RspCrcInt ,RspCrc interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " CmdSentInt ,CmdSent interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " CmdToutInt ,CmdTout interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " RspEndInt ,RspEnd interrupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " RWReqInt ,RwaitReq interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " IntDetInt ,IOIntDet interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " FFfailInt ,FFfail interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " CrcStaInt ,CrcSta interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " DatCrcInt ,DatCrc interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " DatToutInt ,DatTout interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " DatFinInt ,DatFin interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " BusyFinInt ,BusyFin interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " TFHalfInt ,TFHalf interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TFEmptInt ,TFEmpty interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " RFLastInt ,RFLast interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RFFullInt ,RFFull interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " RFHalfInt ,RFHalf interrupt enable" "Disabled,Enabled" group.long 0x40++0x3 line.long 0x00 "SDIDAT,SDI Data Register" hexmask.long 0x00 0.--31. 1. " DATA ,Data transmitted or received over SDI Channel" width 0xb tree.end sif (cpu()=="S3C2443X") tree "High Speed MMC Controller" base ad:0x4A800000 width 11. group.long 0x00++0x3 line.long 0x00 "SYSAD,SDI Control Register" group.word 0x04++0x3 line.word 0x00 "BLKSIZE,Host DMA Buffer Boundary and Transfer Block Size Register" bitfld.word 0x00 12.--14. " HDMABB ,Host DMA Buffer Boundary" "4Kb,8Kb,16Kb,32Kb,64Kb,128Kb,256Kb,512Kb" hexmask.word 0x00 0.--11. 1. " TBS ,Transfer Block Size" line.word 0x02 "BLKCNT,Blocks Count For Current Transfer" group.long 0x08++0x7 line.long 0x00 "ARGUMENT,Command Argument Register" group.word 0x0c++0x1 line.word 0x00 "TRNMOD,Transfer Mode Setting Register" bitfld.word 0x00 8.--9. " CCSC ,Command Completion Signal Control" "No CCS,R/W CCS en,No transfer CCS en,ACS" bitfld.word 0x00 5. " MSBS ,Multi / Single Block Select" "Single,Multiple" textline " " bitfld.word 0x00 4. " DTDS ,Data Transfer Direction Select" "Write,Read" bitfld.word 0x00 2. " ACMDEN ,Auto CMD12 Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " BCEN ,Block Count Enable" "Disabled,Enabled" bitfld.word 0x00 0. " DMAEN ,DMA Enable" "Disabled,Enabled" group.long 0x0E++0x3 line.long 0x00 "CMDREG,Command Register" hexmask.long.byte 0x00 8.--13. 1. " CI ,Command Index" bitfld.long 0x00 6.--7. " CT ,Command Type" "Normal,Bus Suspend,Resume,Abort" textline " " bitfld.long 0x00 5. " DPS ,Data Present Select" "No data,Data present" bitfld.long 0x00 4. " CEIEn ,Command Index Check Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CCCEn ,Command CRC Check Enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " RTS ,Response Type Select (Response Length)" "No response,136,48,48 check busy" group.long 0x10++0xF line.long 0x0 "RSPREG0,Response Register 0" hexmask.long 0x0 0.--31. 1. " CR ,Command Response" line.long 0x4 "RSPREG1,Response Register 1" hexmask.long 0x4 0.--31. 1. " CR ,Command Response" line.long 0x8 "RSPREG2,Response Register 2" hexmask.long 0x8 0.--31. 1. " CR ,Command Response" line.long 0xC "RSPREG3,Response Register 3" hexmask.long 0xC 0.--31. 1. " CR ,Command Response" group.long 0x20++0x3 line.long 0x00 "BDATA,Buffer Data Register" rgroup.long 0x24++0x3 line.long 0x00 "PRNSTS,Present State Register" bitfld.long 0x00 24. " CLSL ,CMD Line Signal Level" "Low,High" bitfld.long 0x00 23. " DAT3 ,Line Signal Level" "Low,High" textline " " bitfld.long 0x00 22. " DAT2 ,Line Signal Level" "Low,High" bitfld.long 0x00 21. " DAT1 ,Line Signal Level" "Low,High" textline " " bitfld.long 0x00 20. " DAT0 ,Line Signal Level" "Low,High" bitfld.long 0x00 19. " WPSPL ,Write Protect Switch Pin Level" "Protected,Enabled" textline " " bitfld.long 0x00 18. " CDPL ,Card Detect Pin Level" "No card,Card present" bitfld.long 0x00 17. " CSS ,Card State Stable" "Reset/debouncing,No card/Inserted" textline " " bitfld.long 0x00 16. " CI ,Card Inserted" "Reset/Debouncing/No card,Card inserted" textline " " bitfld.long 0x00 13. " FPD4 ,FIFO Pointer Difference 4-Word" "Low,High" textline " " bitfld.long 0x00 12. " FPD1 ,FIFO Pointer Difference 1-Word" "Low,High" bitfld.long 0x00 11. " BREN ,Buffer Read Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " BWEN ,Buffer Write Enable" "Disabled,Enabled" bitfld.long 0x00 9. " RTA ,Read Transfer Active" "Not active,Active" textline " " bitfld.long 0x00 8. " WTA ,Write Transfer Active" "Not active,Active" bitfld.long 0x00 2. " DLA ,DAT Line Active" "Not active,Active" textline " " bitfld.long 0x00 1. " DAT ,Command Inhibit" "Can issue,Cannot issue" bitfld.long 0x00 0. " CMD ,Command Inhibit" "Can issue,Cannot issue" group.byte 0x28++0x3 line.byte 0x00 "HOSTCTL,Present State Register" bitfld.byte 0x00 7. " CDSigSel ,Card Detect Signal Selection" "SDCD,Test" bitfld.byte 0x00 6. " CDTestLvl ,Card Detect Test Level" "No card,Inserted" textline " " bitfld.byte 0x00 5. " Wide8 ,Extended Data Transfer Width" "Data transfer width,8 bit" bitfld.byte 0x00 2. " HSEn ,High Speed Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " DTW ,Data Transfer Width" "1-bit,4-bit" bitfld.byte 0x00 0. " LEDC ,LED Control" "Off,On" line.byte 0x01 "PWRCON,Present State Register" bitfld.byte 0x01 1.--3. " SDBVS ,SD Bus Voltage Select" "Reserved,Reserved,Reserved,Reserved,Reserved,1.8V,3.0V,3.3V" bitfld.byte 0x01 0. " SDBP ,SD Bus Power" "Off,On" line.byte 0x02 "BLKGAP,Block Gap Control Register" bitfld.byte 0x02 3. " IABG ,Interrupt At Block Gap" "Disabled,Enabled" bitfld.byte 0x02 2. " RWC ,Read Wait Control" "Disabled,Enabled" textline " " bitfld.byte 0x02 1. " CR ,Continue Request" "No effect,Restart" bitfld.byte 0x02 0. " SBGR ,Stop At Block Gap Request" "Transferred,Stopped" line.byte 0x03 "WAKCON,Wakeup Control Register" bitfld.byte 0x03 2. " WEE_SD_CR ,Wakeup Event Enable On SD Card Removal" "Disabled,Enabled" bitfld.byte 0x03 1. " WEE_SD_CI ,Wakeup Event Enable On SD Card Insertion" "Disabled,Enabled" textline " " bitfld.byte 0x03 0. " WEE_CI ,Wakeup Event Enable On Card Interrupt" "Disabled,Enabled" group.word 0x2C++0x1 line.word 0x00 "CLKCON,Command Register" hexmask.word.byte 0x00 8.--15. 1. " SDCLK_FS ,SDCLK Frequency Select" bitfld.word 0x00 3. " ECS ,External Clock Stable" "Not ready,Ready" textline " " bitfld.word 0x00 2. " SDCEN ,SD Clock Enable" "Disabled,Enabled" bitfld.word 0x00 1. " ICS ,Internal Clock Stable" "Not ready,Ready" textline " " bitfld.word 0x00 0. " ICEN ,Internal Clock Enable" "Stop,Oscillate" group.byte 0x2E++0x1 line.byte 0x00 "TIMEOUTCON,Timeout Control Register" bitfld.byte 0x00 0.--3. " DTCV ,Data Timeout Counter Value" "TMCLK*2^13,TMCLK*2^14,TMCLK*2^15,TMCLK*2^16,TMCLK*2^17,TMCLK*2^18,TMCLK*2^19,TMCLK*2^20,TMCLK*2^21,TMCLK*2^22,TMCLK*2^23,TMCLK*2^24,TMCLK*2^25,TMCLK*2^26,TMCLK*2^27,?..." line.byte 0x01 "SWRST,Software Reset Register" bitfld.byte 0x01 2. " SRFDATL ,Software Reset For DAT Line" "Work,Reset" bitfld.byte 0x01 1. " SRFCMDL ,Software Reset For CMD Line" "Work,Reset" textline " " bitfld.byte 0x01 0. " SRFA ,Software Reset For All" "Work,Reset" group.word 0x30++0xD line.word 0x00 "NORINTSTS,Normal Interrupt Status Register" bitfld.word 0x00 15. " EI ,Error Interrupt" "No error,Error" eventfld.word 0x00 14. " StaFIA3 ,FIFO SD Address Pointer Interrupt 3 Status" "Not occurred,Occurred" textline " " eventfld.word 0x00 13. " StaFIA2 ,FIFO SD Address Pointer Interrupt 2 Status" "Not occurred,Occurred" eventfld.word 0x00 12. " StaFIA1 ,FIFO SD Address Pointer Interrupt 1 Status" "Not occurred,Occurred" textline " " eventfld.word 0x00 11. " StaFIA0 ,FIFO SD Address Pointer Interrupt 0 Status" "Not occurred,Occurred" eventfld.word 0x00 10. " StaRWaitInt ,Read Wait Interrupt Status" "Not occurred,Occurred" textline " " eventfld.word 0x00 9. " StaCCS ,CCS Interrupt Status" "Not occurred,Occurred" eventfld.word 0x00 8. " CI ,Card Interrupt" "No interrupt,Interrupt" textline " " eventfld.word 0x00 7. " CR ,Card Removal" "Stable/Debouncing,Removed" textline " " eventfld.word 0x00 6. " CIns ,Card Insertion" "Stable/Debouncing,Inserted" textline " " eventfld.word 0x00 5. " BRR ,Buffer Read Ready" "Not ready,Ready" eventfld.word 0x00 4. " BWR ,Buffer Write Ready" "Not ready,Ready" textline " " eventfld.word 0x00 3. " DMAI ,DMA Interrupt" "No interrupt,Interrupt" bitfld.word 0x00 2. " BGE ,Block Gap Event" "No event,Stopped" textline " " bitfld.word 0x00 1. " TC ,Transfer Complete" "Not completed,Completed" bitfld.word 0x00 0. " CC ,Command Complete" "Not completed,Completed" line.word 0x02 "ERRINTSTS,Error Interrupt Status Register" eventfld.word 0x02 8. " ACMD12Er ,Auto CMD12 Error" "No error,Error" eventfld.word 0x02 7. " CLEr ,Current Limit Error" "No error,Error" textline " " eventfld.word 0x02 6. " DEBEr ,Data End Bit Error" "No error,Error" eventfld.word 0x02 5. " DCRCEr ,Data CRC Error" "No error,Error" textline " " eventfld.word 0x02 4. " DTEr ,Data Timeout Error" "No error,Error" eventfld.word 0x02 3. " CIEr ,Command Index Error" "No error,Error" textline " " eventfld.word 0x02 2. " CEBEr ,Command End Bit Error" "No error,Error" eventfld.word 0x02 1. " CCRCEr ,Command CRC Error" "No error,Error" textline " " eventfld.word 0x02 0. " CTEr ,Command Timeout Error" "No error,Error" line.word 0x04 "NORINTSTSEN,Normal Interrupt Status Enable Register" bitfld.word 0x04 15. " FT0 ,Fixed to 0" "Low,High" bitfld.word 0x04 14. " EnStaFIA3 ,FIFO SD Address Pointer Interrupt 3 Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 13. " EnStaFIA2 ,FIFO SD Address Pointer Interrupt 2 Status Enable" "Masked,Enabled" bitfld.word 0x04 12. " EnStaFIA1 ,FIFO SD Address Pointer Interrupt 1 Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 11. " EnStaFIA0 ,FIFO SD Address Pointer Interrupt 0 Status Enable" "Masked,Enabled" bitfld.word 0x04 10. " EnStaRWait ,Read Wait interrupt status enable" "Masked,Enabled" textline " " bitfld.word 0x04 9. " EnStaCCS ,CCS Interrupt Status Enable" "Masked,Enabled" bitfld.word 0x04 8. " CISEN ,Card Interrupt Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 7. " CRSEN ,Card Removal Status Enable" "Masked,Enabled" bitfld.word 0x04 6. " CISEN ,Card Insertion Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 5. " BRRSEN ,Buffer Read Ready Status Enable" "Masked,Enabled" bitfld.word 0x04 4. " BWRSEN ,Buffer Write Ready Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 3. " DMAISEN ,DMA Interrupt Status Enable" "Masked,Enabled" bitfld.word 0x04 2. " BGESEN ,Block Gap Event Status Enable" "Masked,Enabled" textline " " bitfld.word 0x04 1. " TCSEN ,Transfer Complete Status Enable" "Masked,Enabled" bitfld.word 0x04 0. " CCSEN ,Command Complete Status Enable" "Masked,Enabled" line.word 0x06 "ERRINTSTSEN,Error Interrupt Status Enable Register" bitfld.word 0x06 8. " ACMD12ESEN ,Auto CMD12 Error Status Enable" "Masked,Enabled" bitfld.word 0x06 7. " CLESEN ,Current Limit Error Status Enable" "Masked,Enabled" textline " " bitfld.word 0x06 6. " DEBESEN ,Data End Bit Error Status Enable" "Masked,Enabled" bitfld.word 0x06 5. " DCRCESEN ,Data CRC Error Status Enable" "Masked,Enabled" textline " " bitfld.word 0x06 4. " DTESEN ,Data Timeout Error Status Enable" "Masked,Enabled" bitfld.word 0x06 3. " CIESEN ,Command Index Error Status Enable" "Masked,Enabled" textline " " bitfld.word 0x06 2. " CEBESEN ,Command End Bit Error Status Enable" "Masked,Enabled" bitfld.word 0x06 1. " CCRCESEN ,Command CRC Error Status Enable" "Masked,Enabled" textline " " bitfld.word 0x06 0. " CTESEN ,Command Timeout Error Status Enable" "Masked,Enabled" line.word 0x08 "NORINTSIGEN,Normal Interrupt Signal Enable Register" bitfld.word 0x08 15. " FT0 ,Fixed to 0" "Low,High" bitfld.word 0x08 14. " EnSigFIA3 ,FIFO SD Address Pointer Interrupt 3 Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 13. " EnSigFIA2 ,FIFO SD Address Pointer Interrupt 2 Signal Enable" "Masked,Enabled" bitfld.word 0x08 12. " EnSigFIA1 ,FIFO SD Address Pointer Interrupt 1 Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 11. " EnSigFIA0 ,FIFO SD Address Pointer Interrupt 0 Signal Enable" "Masked,Enabled" bitfld.word 0x08 10. " EnSigRWait ,Read Wait Interrupt Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 9. " EnSigCCS ,CCS Interrupt Signal Enable" "Masked,Enabled" bitfld.word 0x08 8. " CISEN ,Card Interrupt Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 7. " CRSEN ,Card Removal Signal Enable" "Masked,Enabled" bitfld.word 0x08 6. " CInsSEN ,Card Insertion Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 5. " BRRSEN ,Buffer Read Ready Signal Enable" "Masked,Enabled" bitfld.word 0x08 4. " BWRSEN ,Buffer Write Ready Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 3. " DMAISEN ,DMA Interrupt Signal Enable" "Masked,Enabled" bitfld.word 0x08 2. " BGESEN ,Block Gap Event Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x08 1. " TCSEN ,Transfer Complete Signal Enable" "Masked,Enabled" bitfld.word 0x08 0. " CCSEN ,Command Complete Signal Enable" "Masked,Enabled" line.word 0x0A "ERRINTSIGEN,Error Interrupt Signal Enable Register" bitfld.word 0x0A 8. " ACMD12ESEN ,Auto CMD12 Error Signal Enable" "Masked,Enabled" bitfld.word 0x0A 7. " CLESEN ,Current Limit Error Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x0A 6. " DEBESEN ,Data End Bit Error Signal Enable" "Masked,Enabled" bitfld.word 0x0A 5. " DCRCESEN ,Data CRC Error Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x0A 4. " DTESEN ,Data Timeout Error Signal Enable" "Masked,Enabled" bitfld.word 0x0A 3. " DIESEN ,Command Index Error Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x0A 2. " CEBESEN ,Command End Bit Error Signal Enable" "Masked,Enabled" bitfld.word 0x0A 1. " CCRCESEN ,Command CRC Error Signal Enable" "Masked,Enabled" textline " " bitfld.word 0x0A 0. " CTESEN ,Command Timeout Error Signal Enable" "Masked,Enabled" line.word 0x0C "ESR,Auto CMD12 Error Status Register" bitfld.word 0x0C 7. " CNIEr ,Command Not Issued By Auto CMD12 Error" "No error,Error" bitfld.word 0x0C 4. " AIEr ,Auto CMD12 Index Error" "No error,Error" textline " " bitfld.word 0x0C 3. " AEBEr ,Auto CMD12 End Bit Error" "No error,Error" bitfld.word 0x0C 2. " ACRCEr ,Auto CMD12 CRC Error" "No error,Error" textline " " bitfld.word 0x0C 1. " ATEr ,Auto CMD12 Timeout Error" "No error,Error" bitfld.word 0x0C 0. " ANE ,Auto CMD12 Not Executed" "Executed,Not executed" if (((d.l(ad:(0x4A800000+0x40)))&0x80)==0x00) ;In Capabilities Register (CAPAREG). Bit no 7. Definition for KHz or MHz. group.long 0x40++0x3 line.long 0x00 "CAPAREG,Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SR_S ,Suspend/Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 16.--17. " MBL ,Max Block Length" "512 byte,1024 byte,2048 byte,?..." bitfld.long 0x00 8.--13. " BCFFSDC ,Base Clock Frequency For SD Clock" "Another method,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" textline " " bitfld.long 0x00 7. " TCU ,Timeout Clock Unit" "KHz,MHz" bitfld.long 0x00 0.--5. " TCF ,Timeout Clock Frequency" "Another method,1 KHz,2 KHz,3 KHz,4 KHz,5 KHz,6 KHz,7 KHz,8 KHz,9 KHz,10 KHz,11 KHz,12 KHz,13 KHz,14 KHz,15 KHz,16 KHz,17 KHz,18 KHz,19 KHz,20 KHz,21 KHz,22 KHz,23 KHz,24 KHz,25 KHz,26 KHz,27 KHz,28 KHz,29 KHz,30 KHz,31 KHz,32 KHz,33 KHz,34 KHz,35 KHz,36 KHz,37 KHz,38 KHz,39 KHz,40 KHz,41 KHz,42 KHz,43 KHz,44 KHz,45 KHz,46 KHz,47 KHz,48 KHz,49 KHz,50 KHz,51 KHz,52 KHz,53 KHz,54 KHz,55 KHz,56 KHz,57 KHz,58 KHz,59 KHz,60 KHz,61 KHz,62 KHz,63 KHz" else group.long 0x40++0x3 line.long 0x00 "CAPAREG,Capabilities Register" bitfld.long 0x00 26. " VS18 ,Voltage Support 1.8V" "Not supported,Supported" bitfld.long 0x00 25. " VS30 ,Voltage Support 3.0V" "Not supported,Supported" textline " " bitfld.long 0x00 24. " VS33 ,Voltage Support 3.3V" "Not supported,Supported" bitfld.long 0x00 23. " SR_S ,Suspend/Resume Support" "Not supported,Supported" textline " " bitfld.long 0x00 22. " DMAS ,DMA Support" "Not supported,Supported" bitfld.long 0x00 21. " HSS ,High Speed Support" "Not supported,Supported" textline " " bitfld.long 0x00 16.--17. " MBL ,Max Block Length" "512 byte,1024 byte,2048 byte,?..." bitfld.long 0x00 8.--13. " BCFFSDC ,Base Clock Frequency For SD Clock" "another method,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" textline " " bitfld.long 0x00 7. " TCU ,Timeout Clock Unit" "KHz,MHz" bitfld.long 0x00 0.--5. " TCF ,Timeout Clock Frequency" "Another method,1 MHz,2 MHz,3 MHz,4 MHz,5 MHz,6 MHz,7 MHz,8 MHz,9 MHz,10 MHz,11 MHz,12 MHz,13 MHz,14 MHz,15 MHz,16 MHz,17 MHz,18 MHz,19 MHz,20 MHz,21 MHz,22 MHz,23 MHz,24 MHz,25 MHz,26 MHz,27 MHz,28 MHz,29 MHz,30 MHz,31 MHz,32 MHz,33 MHz,34 MHz,35 MHz,36 MHz,37 MHz,38 MHz,39 MHz,40 MHz,41 MHz,42 MHz,43 MHz,44 MHz,45 MHz,46 MHz,47 MHz,48 MHz,49 MHz,50 MHz,51 MHz,52 MHz,53 MHz,54 MHz,55 MHz,56 MHz,57 MHz,58 MHz,59 MHz,60 MHz,61 MHz,62 MHz,63 MHz" endif group.long 0x48++0x3 line.long 0x00 "MAXCURR,Maximum Current Capabilities Register" hexmask.long.byte 0x00 16.--23. 1. " MC18 ,Maximum Current for 1.8V" hexmask.long.byte 0x00 8.--15. 1. " MC30 ,Maximum Current for 3.0V" hexmask.long.byte 0x00 0.--7. 1. " MC33 ,Maximum Current for 3.3V" group.long 0x80++0x7 line.long 0x00 "CONTROL2,Control register 2" bitfld.long 0x00 29. " CDInvRXD ,Card Detect signal inversion for RX_DAT[3]" "Disabled,Enabled" bitfld.long 0x00 28. " SelCardOut ,Card Removed Condition Selection" "Normal,No card-debounce filter" textline " " hexmask.long.byte 0x00 24.--27. 1. " FltClkSel ,Filter Clock (iFLTCLK) Selection" bitfld.long 0x00 23. " DAT7 ,DAT 7 line level" "Low,High" textline " " bitfld.long 0x00 22. " DAT6 ,DAT 6 line level" "Low,High" bitfld.long 0x00 21. " DAT5 ,DAT 5 line level" "Low,High" textline " " bitfld.long 0x00 20. " DAT4 ,DAT 4 line level" "Low,High" bitfld.long 0x00 19. " DAT3 ,DAT 3 line level" "Low,High" textline " " bitfld.long 0x00 18. " DAT2 ,DAT 2 line level" "Low,High" bitfld.long 0x00 17. " DAT1 ,DAT 1 line level" "Low,High" textline " " bitfld.long 0x00 16. " DAT0 ,DAT 0 line level" "Low,High" bitfld.long 0x00 15. " EnFBCLKT ,Feedback Clock Enable for Tx Data/Command Clock" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " EnFBCLKR ,Feedback Clock Enable for Rx Data/Command Clock" "Disabled,Enabled" bitfld.long 0x00 13. " SDCDSel ,SD Card Detect Signal Selection" "nSDCD,DAT[3]" textline " " bitfld.long 0x00 12. " CardSync ,SD Card Detect Sync Support" "No sync,Sync" bitfld.long 0x00 11. " TxBStartEn ,CE-ATA I/F mode" "Disabled,Enabled" textline " " bitfld.long 0x00 9.--10. " DFCnt ,Debounce Filter Count" "No debounce filter,4 iSDCLK,16 iSDCLK,64 iSDCLK" bitfld.long 0x00 8. " EnSCHold ,SDCLK Hold Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RwaitMode ,Read Wait Release Control" "Host controller,Host device" bitfld.long 0x00 6. " DisBufRD ,Buffer Read Disable" "Normal,Disabled" textline " " bitfld.long 0x00 4.--5. " SelBaseClk ,Base Clock Source Select" "HCLK,HCLK,EPLL out clk,External clk" bitfld.long 0x00 3. " PwrSync ,SD OP Power Sync Support with SD Card" "No sync,Sync" textline " " bitfld.long 0x00 2. " ModePwrPin ,Power Pin Use mode select" "SDPWR33/SDPWR18,SDPWRon/SDPWRlvl" bitfld.long 0x00 1. " EnSDCLKmsk ,SDCLK output clock masking when Card Insert cleared" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " HwInitFin ,SD Host Controller Hardware Initialization Finish" "Not finish,Finish" line.long 0x04 "CONTROL3,FIFO Interrupt Control" hexmask.long.byte 0x04 24.--30. 1. " FIA3 ,FIFO Interrupt Address register 3" bitfld.long 0x04 23. 31. " FCSel_32 ,Feedback Clock Select [3:2]" "Delay1,Delay2,Delay3,Delay4" textline " " hexmask.long.byte 0x04 16.--22. 1. " FIA2 ,FIFO Interrupt Address register 2" hexmask.long.byte 0x04 8.--14. 1. " FIA1 ,FIFO Interrupt Address register 1" textline " " bitfld.long 0x04 7. 15. " FCSel_10 ,Feedback Clock Select [1:0]" "Delay1,Delay2,Delay3,Delay4" hexmask.long.byte 0x04 0.--6. 1. " FIA0 ,FIFO Interrupt Address register 0" rgroup.word 0xFE++0x1 line.word 0x00 "HCVER,Host Controller Version Register" hexmask.word.byte 0x00 8.--15. 1. " VVN ,Vendor Version Number" hexmask.word.byte 0x00 0.--7. 1. " SVN ,Specification Version Number" width 0xb tree.end endif tree "IIC-Bus Interface" base ad:0x54000000 width 9. group.long 0x00++0x3 line.long 0x00 "IICCON,IIC-Bus Control Register" bitfld.long 0x00 7. " ACKGEN ,Acknowledge generation" "Disabled,Enabled" bitfld.long 0x00 6. " TXCLKSRC ,Tx clock source selection" "fPCLK/16,fPCLK/512" bitfld.long 0x00 5. " TXRXINT ,Tx/Rx interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " INTPND ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 0.--3. " TCV ,Transmit clock value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" group.long 0x04++0x3 line.long 0x00 "IICSTAT,IIC-Bus Control/Status Register" bitfld.long 0x00 6.--7. " MODE ,Mode selection" "Slave receive,Slave transmit,Master receive,Master transmit" bitfld.long 0x00 5. " BUSY ,Busy signal status" "Not busy,Busy" bitfld.long 0x00 4. " SOUT ,Data output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ARBST ,Arbitration status flag" "Successful,Failed" bitfld.long 0x00 2. " ADRSLST ,Address-as-slave status flag" "Cleared,Received" bitfld.long 0x00 1. " ADRZRST ,Address zero status flag" "Cleared,Received" textline " " bitfld.long 0x00 0. " LRS ,Last-received bit status flag" "Low,High" group.long 0x08++0x3 line.long 0x00 "IICADD,IIC-Bus Address Register" hexmask.long 0x00 0.--7. 1. " SLADR , Slave sddress" group.long 0x0c++0x3 line.long 0x00 "IICDS,IIC-Bus Transmit/Receive Data Shift Register" hexmask.long 0x00 0.--7. 1. " DATASF ,Data shift" group.long 0x10++0x3 line.long 0x00 "IICLC,IIC Multi-Master Line Control Register" bitfld.long 0x00 2. " FILEN ,Filter enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " SDADEL ,SDA line delay length selection (PCLK)" "0,5,10,15" width 0xb tree.end tree "IIS-Bus (Inter-IC Sound Interface)" base ad:0x55000000 sif (cpu()=="S3C2440A")||(cpu()=="S3C2442B") width 8. group.word 0x00++0xb line.word 0x00 "IISCON,IIS Interface Control Register" bitfld.word 0x00 08. " LRCI ,Left/Right channel index" "Left,Right" bitfld.word 0x00 07. " TFRF ,Transmit FIFO ready flag" "Empty,Not empty" bitfld.word 0x00 06. " RFRF ,Receive FIFO ready flag" "Full,Not full" bitfld.word 0x00 05. " TDSR ,Transmit DMA service request" "Disabled,Enabled" textline " " bitfld.word 0x00 04. " RDSR ,Receive DMA service request" "Disabled,Enabled" bitfld.word 0x00 03. " TCIC ,Transmit channel idle command" "Not idle,Idle" bitfld.word 0x00 02. " RCIC ,Receive channel idle command" "Not idle,Idle" bitfld.word 0x00 01. " PSC ,IIS prescaler" "Disabled,Enabled" textline " " bitfld.word 0x00 00. " IF ,IIS interface" "Disabled,Enabled" line.word 0x04 "IISMOD,IIS Interface Mode Register" bitfld.word 0x04 09. " MCS ,Master clock select" "PCLK,MPLLin" bitfld.word 0x04 08. " MSM ,Master/slave mode select" "Master,Slave" bitfld.word 0x04 06.--07. " TRM ,Transmit/receive mode select" "No transfer,Receive,Transmit,Both" bitfld.word 0x04 05. " AL ,Active level of left/right channel" "Low/High,High/Low" textline " " bitfld.word 0x04 04. " SIF ,Serial interface format" "IIS compatible,MSB jusified" bitfld.word 0x04 03. " WIDTH ,Serial data bit per channel" "8-bit,16-bit" bitfld.word 0x04 02. " MCF ,Master clock frequency select (fs: sampling frequency)" "256fs,384fs" bitfld.word 0x04 00.--01. " SBCF ,Serial bit clock frequency select (fs: sampling frequency)" "16fs,32fs,48fs,?..." line.word 0x08 "IISPSR,IIS Interface Clock Divider Control Register" bitfld.word 0x08 5.--9. " PCA ,Prescaler control A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x08 0.--4. " PCB ,Prescaler control B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hgroup.word 0x10++0x3 hide.word 0x00 "IISFIFO,IIS FIFO Register" in group.word 0x0c++0x3 line.word 0x0 "IISFCON,IIS FIFO Interface Register" bitfld.word 0x0 15. " TFAM ,Transmit FIFO access mode select" "Normal,DMA" bitfld.word 0x0 14. " RFAM ,Receive FIFO access mode select" "Normal,DMA" bitfld.word 0x0 13. " TFE ,Transmit FIFO enable" "Disabled,Enabled" bitfld.word 0x0 12. " RFE ,Receive FIFO" "Disabled,Enabled" textline " " bitfld.word 0x0 6.--11. " TFDC ,Transmit FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." bitfld.word 0x0 0.--5. " RFDC ,Receive FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..." width 0xb endif sif (cpu()=="S3C2443X") width 8. group.word 0x00++0xb line.word 0x00 "IISCON,IIS Interface Control Register" bitfld.word 0x00 11. " LRI ,Left/Right channel clock indication" "Left,Right" bitfld.word 0x00 10. " FTXEMPT ,Tx FIFO empty status indication" "Not empty,Empty" textline " " bitfld.word 0x00 09. " FRXEMPT ,Rx FIFO empty status indication" "Not empty,Empty" bitfld.word 0x00 08. " FTXFULL ,Tx FIFO full status indication" "Not full,Full" textline " " bitfld.word 0x00 07. " FRXFULL ,Rx FIFO full status indication" "Not full,Full" bitfld.word 0x00 06. " TXDMAPAUSE ,Tx DMA operation pause command" "Not paused,Paused" textline " " bitfld.word 0x00 05. " RXDMAPAUSE ,Rx DMA operation pause command" "Not paused,Paused" bitfld.word 0x00 04. " TXCHPAUSE ,Tx channel operation pause command" "Not paused,Paused" textline " " bitfld.word 0x00 03. " RXCHPAUSE ,Rx channel operation pause command" "Not paused,Paused" bitfld.word 0x00 02. " TXDMACTIVE ,Tx DMA active" "Inactive,Active" textline " " bitfld.word 0x00 01. " RXDMACTIVE ,Rx DMA active" "Inactive,Active" bitfld.word 0x00 00. " I2SACTIVE ,I2S interface active" "Inactive,Active" group.long 0x04++0xb line.word 0x00 "I2SMOD,IIS Interface Mode Register" bitfld.word 0x00 12. " CDCLKCON ,Determine codec clock source" "Internal,External" bitfld.word 0x00 10.--11. " IMS ,I2S master or slave mode select" "Master-PCLK,Master-CODECLKI,Slave,Slave" textline " " bitfld.word 0x00 08.--09. " TXR ,Transmit or receive mode select" "Transmit,Receive,Both,?..." bitfld.word 0x00 07. " LRP ,Left/Right channel clock polarity select" "Low/High,High/Low" textline " " bitfld.word 0x00 05.--06. " SDF ,Serial data format" "I2S,MSB-justified,LSB-justified,?..." bitfld.word 0x00 03.--04. " RFS ,I2S root clock (codec clock) frequency select" "256fs,512fs,384fs,768fs" textline " " bitfld.word 0x00 01.--02. " BFS ,Bit clock frequency select" "32fs,48fs,16fs,24fs" bitfld.word 0x00 00. " BLC ,Bit length per channel" "16-bit,8-bit" line.word 0x04 "I2SFIC,IIS Interface FIFO Control Register" bitfld.word 0x04 15. " TFLUSH ,Tx FIFO flush command" "No flush,Flush" hexmask.long.byte 0x04 8.--12. 1. " FTXCNT ,Tx FIFO data count" textline " " bitfld.word 0x04 7. " RFLUSH ,Rx FIFO flush command" "No flush,Flush" hexmask.long.byte 0x04 0.--4. 1. " FRXCNT ,Rx FIFO data count" line.long 0x08 "IISPSR,IIS Interface Clock Divider Control Register" bitfld.long 0x08 15. " PSRAEN ,Prescaler (Clock divider) A active" "Inactive,Active" hexmask.long.word 0x08 0.--9. 1. " PSVALA ,Prescaler (Clock divider) A division value" wgroup.long 0x10++0x3 line.word 0x00 "I2STXD,IIS Interface Transmit Data Register" hgroup.long 0x14++0x3 hide.word 0x00 "I2SRXD,IIS Interface Receive Data Register" in width 0xb endif tree.end tree "Serial Peripheral Interface (SPI)" sif (cpu()=="S3C2440A")||(cpu()=="S3C2442B") tree "SPI0" base ad:0x59000000 sif (cpu()=="S3C2440A") width 0x9 group.long 0x00++0x03 line.long 0x00 "SPCON0,SPI channel 0 control register" bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..." bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master" bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low" textline " " bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B" bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SPSTA0,SPI channel 0 status register" bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected" bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected" bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready" group.long 0x08++0x03 line.long 0x00 "SPPIN0,SPI channel 0 pin control register" bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled" bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive" group.long 0x0c++0x03 line.long 0x00 "SPPRE0,SPI channel 0 baud rate prescaler register" hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value" group.long 0x10++0x03 line.long 0x00 "SPTDAT0,SPI channel 0 Tx data register" hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data" rgroup.long 0x14++0x03 line.long 0x00 "SPRDAT0,SPI channel 0 Rx data register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" width 0xb else width 0x9 group.long 0x00++0x03 line.long 0x00 "SPCON0,SPI channel 0 control register" bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..." bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master" bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low" textline " " bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B" bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SPSTA0,SPI channel 0 status register" bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected" bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected" bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready" group.long 0x08++0x03 line.long 0x00 "SPPIN0,SPI channel 0 pin control register" bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled" bitfld.long 0x00 01. " SPICS0 ,CS0 Activation" "Activated,Deactivated" bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive" group.long 0x0c++0x03 line.long 0x00 "SPPRE0,SPI channel 0 baud rate prescaler register" hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value" group.long 0x10++0x03 line.long 0x00 "SPTDAT0,SPI channel 0 Tx data register" hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data" group.long 0x14++0x03 line.long 0x00 "SPRDAT0,SPI channel 0 Rx data register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" width 0xb endif tree.end tree "SPI1" sif (cpu()=="S3C2440A") base ad:0x59000020 width 0x9 group.long 0x00++0x03 line.long 0x00 "SPCON1,SPI channel 1 control register" bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..." bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master" bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low" textline " " bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B" bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SPSTA1,SPI channel 1 status register" bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected" bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected" bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready" group.long 0x08++0x03 line.long 0x00 "SPPIN1,SPI channel 1 pin control register" bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled" bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive" group.long 0x0c++0x03 line.long 0x00 "SPPRE1,SPI channel 1 baud rate prescaler register" hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value" group.long 0x10++0x03 line.long 0x00 "SPTDAT1,SPI channel 1 Tx data register" hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data" rgroup.long 0x14++0x03 line.long 0x00 "SPRDAT1,SPI channel 1 Rx data register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" width 0xb else base ad:0x59000100 width 0x9 group.long 0x00++0x03 line.long 0x00 "SPCON1,SPI channel 1 control register" bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..." bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master" bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low" textline " " bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B" bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SPSTA1,SPI channel 1 status register" bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected" bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected" bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready" group.long 0x08++0x03 line.long 0x00 "SPPIN1,SPI channel 1 pin control register" bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled" bitfld.long 0x00 01. " SPICS1 ,CS1 Activation" "Activated,Deactivated" bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive" group.long 0x0c++0x03 line.long 0x00 "SPPRE1,SPI channel 1 baud rate prescaler register" hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value" group.long 0x10++0x03 line.long 0x00 "SPTDAT1,SPI channel 1 Tx data register" hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data" group.long 0x14++0x03 line.long 0x00 "SPRDAT1,SPI channel 1 Rx data register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" width 0xb endif tree.end endif sif (cpu()=="S3C2443X") base ad:0x59000000 width 0x9 group.long 0x00++0x03 line.long 0x00 "SPCON1,SPI channel 1 control register" bitfld.long 0x00 16. " TBTOCEN ,Rx FIFO Trailing Bytes Timeout Counter Enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " RXFIFORB ,Rx FIFO Remaining Byte control" "2,4,12,14" textline " " bitfld.long 0x00 12.--13. " TXFIFORB ,Tx FIFO Remaining Byte control" "2,4,12,14" bitfld.long 0x00 11. " RXFIFORST ,Rx FIFO Reset control" "No reset,Reset" textline " " bitfld.long 0x00 10. " TXFIFORST ,Tx FIFO Reset control" "No reset,Reset" bitfld.long 0x00 9. " RXFIFOEN ,Rx FIFO Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " TXFIFOEN ,Tx FIFO Enable" "Disabled,Enabled" bitfld.long 0x00 7. " DIRC ,Transfer Direction" "Tx,Rx" textline " " bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA Tx,DMA Rx" bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master" bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low" textline " " bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B" bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "SPSTA1,SPI channel 1 status register" bitfld.long 0x00 24.--28. " RXFRAV ,Rx FIFO read available byte count" "No byte,1-byte,2-byte,3-byte,4-byte,5-byte,6-byte,7-byte,8-byte,9-byte,10-byte,11-byte,12-byte,13-byte,14-byte,15-byte,16-byte,?..." bitfld.long 0x00 16.--20. " TXFWAV ,Tx FIFO write available byte count" "No byte,1-byte,2-byte,3-byte,4-byte,5-byte,6-byte,7-byte,8-byte,9-byte,10-byte,11-byte,12-byte,13-byte,14-byte,15-byte,16-byte,?..." textline " " eventfld.long 0x00 12. " TBTISTS ,Rx FIFO Trailing Bytes Timeout interrupt status bit" "Not occurred,Occurred" bitfld.long 0x00 11. " RXFIFOAF ,Rx FIFO Almost Full" "Not almost full,Almost full" textline " " bitfld.long 0x00 10. " TXFIFOAE ,Tx FIFO Almost Empty" "Not almost empty,Almost empty" bitfld.long 0x00 9. " RXFIFOFERR ,Rx FIFO full error" "Normal,Error" textline " " bitfld.long 0x00 8. " TXFIFOEERR ,Tx FIFO empty error" "Normal,Error" bitfld.long 0x00 7. " RXFIFOFULL ,Rx FIFO full" "Not full,Full" textline " " bitfld.long 0x00 6. " RXFIFONEMPTY ,Rx FIFO not empty" "Empty,Not empty" bitfld.long 0x00 5. " TXFIFONFULL ,Tx FIFO not full" "Full,Not full" textline " " bitfld.long 0x00 4. " TXFIFOEMPTY ,Tx FIFO empty" "Not empty,Empty" bitfld.long 0x00 3. " REDY_org ,Rx Pre Buffer Transfer Ready Flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected" bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready" if (((d.l(ad:0x59000000))&0x8)==0x8) ;In SPI channel 1 control register (SPCON1). Bit no 3. Definition for Slave or Master group.long 0x08++0x03 line.long 0x00 "SPPIN1,SPI channel 1 pin control register" bitfld.long 0x00 4. " FIFODOUTCTL ,FIFO Data Out Control" "Normal,Enabled" bitfld.long 0x00 3. " FDCKEN ,Feedback Clock enable" "Disabled,Enabled" textline " " bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled" bitfld.long 0x00 01. " CSout ,Master mode Chip select output" "Activated,Deactivated" textline " " bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive" else group.long 0x08++0x03 line.long 0x00 "SPPIN1,SPI channel 1 pin control register" bitfld.long 0x00 4. " FIFODOUTCTL ,FIFO Data Out Control" "Normal,Enabled" endif group.long 0x0c++0x03 line.long 0x00 "SPPRE1,SPI channel 1 Baud Rate Prescaler Register" hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value" group.long 0x10++0x03 line.long 0x00 "SPTDAT1,SPI channel 1 Tx data register" hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data" rgroup.long 0x14++0x03 line.long 0x00 "SPRDAT1,SPI channel 1 Rx data register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" hgroup.long 0x18++0x3 hide.long 0x00 "SPTXFIFO1,SPI Channel 1 Tx FIFO Register" in hgroup.long 0x1C++0x3 hide.long 0x00 "SPRXFIFO1,SPI Channel 1 Rx FIFO Register" in group.long 0x20++0x3 line.long 0x00 "SPRDATB1,SPI Channel 1 Rx Data Register" hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data" group.long 0x24++0x07 line.long 0x00 "SPFIC1,SPI Channel 1 FIFO Interrupt and DMA control Register" bitfld.long 0x00 10.--11. " RXFIFODMACTL ,Rx FIFO DMA Control register" "Disabled,Not empty,Almost full,?..." bitfld.long 0x00 8.--9. " TXFIFODMACTL ,Tx FIFO DMA Control register" "Disabled,Empty,Almost empty,?..." textline " " bitfld.long 0x00 7. " TOCIE ,Rx FIFO Time-out Counter Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " RXFIFONEMIE ,Rx FIFO Not Empty Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RXFIFOAFIE ,Rx FIFO Almost Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " TXFIFOAEIE ,Tx FIFO Almost Empty Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RXFIFOFEIE ,Rx FIFO Full Error Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TXFIFOEEIE ,Tx FIFO Empty Error Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RXFIFOFLIE ,Rx FIFO Full Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TXFIFOEMIE ,Tx FIFO Empty Interrupt Enable" "Disabled,Enabled" line.long 0x04 "SPTOV1,SPI Channel 1 Rx FIFO Timeout Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " TOV ,Rx FIFO Timeout Counter Value register" width 0xb endif tree.end sif (cpu()=="S3C2443X") tree "High Speed Serial Peripheral Interface (HSSPI)" base ad:0x52000000 width 0x10 group.long 0x00++0x13 line.long 0x00 "CH_CFG,SPI Configuration Register" bitfld.long 0x00 5. " SW_RST ,Software reset" "No reset,Reset" bitfld.long 0x00 4. " SLAVE ,SPI Channel" "Master,Slave" textline " " bitfld.long 0x00 3. " CPOL ,Determine an active high or active low clock" "High,Low" bitfld.long 0x00 2. " CPHA ,Transfer format" "Format A,Format B" textline " " bitfld.long 0x00 1. " RxChOn ,SPI Rx Channel On" "Off,On" bitfld.long 0x00 0. " TxChOn ,SPI Tx Channel On" "Off,On" line.long 0x04 "Clk_CFG,Clock Configuration Register" bitfld.long 0x04 9.--10. " ClkSel ,Clock source selection to generate SPI clock-out" "PCLK,Reserved,USBHOST clk,Epll" bitfld.long 0x04 8. " ENCLK ,Clock on/off" "Disabled,Enabled" textline " " hexmask.long.byte 0x04 0.--7. 1. " PV ,SPI clock-out division rate" line.long 0x08 "MODE_CFG,SPI FIFO Control Register" hexmask.long.word 0x08 19.--28. 1. " TC ,Trailing Count" bitfld.long 0x08 18. " BUS_TS ,Transfer size between BUS and FIFO" "Byte,Word" textline " " bitfld.long 0x08 17. " FB_CLK_S ,Feedback clock additional delay" "0ns,2ns" hexmask.long.byte 0x08 11.--16. 1. " RxT ,Rx FIFO trigger level in INT mode" textline " " hexmask.long.byte 0x08 5.--10. 1. " TxT ,Tx FIFO trigger level in INT mode" bitfld.long 0x08 4. " CLK_TEN ,Insertion 1 period of SPI clock-out" "Continuous,Discontinuous" textline " " bitfld.long 0x08 2. " RxDMAO ,DMA mode on/off" "Off,On" bitfld.long 0x08 1. " TxDMAO ,DMA mode on/off" "Off,On" textline " " bitfld.long 0x08 0. " DMATT ,DMA transfer type" "Single,4 burst" line.long 0x0C "SSSR,Slave Selection Signal" bitfld.long 0x0C 0. " nSSout ,Slave selection signal" "Master,Slave" line.long 0x10 "SPI_INT_EN,SPI Interrupt Enable register" bitfld.long 0x10 6. " IntEnT ,Interrupt Enable for trailing count to be zero" "Disabled,Enabled" bitfld.long 0x10 5. " IntEnRxO ,Interrupt Enable for RxOverrun" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " IntEnRxU ,Interrupt Enable for RxUnderrun" "Disabled,Enabled" bitfld.long 0x10 3. " IntEnTxO ,Interrupt Enable for TxOverrun" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " IntEnTxU ,Interrupt Enable for TxUnderrun" "Disabled,Enabled" bitfld.long 0x10 1. " IntEnRxFR ,Interrupt Enable for RxFifoRdy" "Disabled,Enabled" textline " " bitfld.long 0x10 0. " IntEnTxFR ,Interrupt Enable for TxFifoRdy" "Disabled,Enabled" rgroup.long 0x14++0x3 line.long 0x00 "SPI_STATUS,SPI Status Register" bitfld.long 0x00 21. " TX_DONE ,Indication of transfer done in Shift register" "All except blow,When tx/shift empty" bitfld.long 0x00 20. " T_B ,Indication that trailing count is zero" "Not zero,Zero" textline " " hexmask.long.byte 0x00 13.--19. 1. " RxFifoLvl ,Data level in RX FIFO" hexmask.long.byte 0x00 6.--12. 1. " TxFifoLvl ,Data level in TX FIFO" textline " " bitfld.long 0x00 5. " RxOv ,Rx FIFO Overrun Error" "No error,Error" bitfld.long 0x00 4. " RxUn ,Rx FIFO Underrun Error" "No error,Error" textline " " bitfld.long 0x00 3. " TxOv ,Tx FIFO Overrun Error" "No error,Error" bitfld.long 0x00 2. " TxUnd ,Tx FIFO Underrun Error" "No error,Error" textline " " bitfld.long 0x00 1. " RxFifoRdy ,data in FIFO (than trigger level)" "Less,More" bitfld.long 0x00 0. " TxFifoRdy ,data in FIFO (than trigger level)" "Less,More" wgroup.long 0x18++0x3 line.long 0x00 "SPI_TX_DATA,SPI TX DATA Register" rgroup.long 0x1C++0x3 line.long 0x00 "SPI_RX_DATA,SPI RX DATA register" group.long 0x20++0x7 line.long 0x00 "PC_R,Count How Many Data Master Gets" bitfld.long 0x00 16. " PC_EN ,To select to count packet received or not" "Not to count,To count" hexmask.long.word 0x00 0.--15. 1. " CV ,The number of Packet to be received" line.long 0x04 "PEN_CLR_R,Pending Clear Register" bitfld.long 0x04 4. " TxUn_Clr ,TX underrun status clear bit" "Not to clear,To clear" bitfld.long 0x04 3. " TxOv_Clr ,TX overrun status clear bit" "Not to clear,To clear" textline " " bitfld.long 0x04 2. " RxUn_Clr ,RX underrun status clear bit" "Not to clear,To clear" bitfld.long 0x04 1. " RxOv_Clr ,RX overrun status clear bit" "Not to clear,To clear" textline " " bitfld.long 0x04 0. " T_CLR ,Trailing status clear bit" "Not to clear,To clear" width 0xb tree.end endif tree "Camera Interface" base ad:0x4F000000 sif (cpu()=="S3C2440A") width 16. group.long 0x00++0x3 line.long 0x00 "CISRCFMT,Input Source Format Register" bitfld.long 0x00 31. " ITU601_656n ,ITU-R YCbCr 8-bit mode" "BT.656,BT.601" bitfld.long 0x00 30. " UVOffset ,Cb Cr value offset control" "Normal,+128" textline " " hexmask.long.word 0x00 16.--28. 1. " SourceHsize ,Source horizontal pixel number" textline " " bitfld.long 0x00 14.--15. " Order422 ,Input YCbCr Order Inform For Input 8-bit mode" "YCbYCr,YCrYCb,CbYCrY,CrYCbY" hexmask.long.word 0x00 0.--12. 1. " SourceVsize ,Source vertical pixel number" group.long 0x04++0x3 line.long 0x00 "CIWDOFST,Window Offset Register" bitfld.long 0x00 31. " WinOfsEn ,Window offset enable" "Disabled,Enabled" bitfld.long 0x00 30. " ClrOvCoFiY ,Clear overlow flag of input CODEC FIFO Y" "Normal,Cleared" textline " " hexmask.long.word 0x00 16.--26. 1. " WinHorOfst ,Window Horizontal Offset" bitfld.long 0x00 15. " ClrOvCoFiCb ,Clear overflow flag of input CODEC FIFO Cb" "Normal,Cleared" textline " " bitfld.long 0x00 14. " ClrOvCoFiCr ,Clear overflow flag of input CODEC FIFO Cr" "Normal,Cleared" bitfld.long 0x00 13. " ClrOvPrFiCb ,Clear overflow flag of input PREVIEW FIFO Cb" "Normal,Cleared" textline " " bitfld.long 0x00 12. " ClrOvPrFiCr ,Clear overflow flag of input PREVIEW FIFO Cr" "Normal,Cleared" hexmask.long.word 0x00 0.--10. 1. " WinVerOfst ,Window vertical offset" if (((d.l(ad:0x4F000000))&0x80000000)==0x80000000) group.long 0x08++0x3 line.long 0x00 "CIGCTRL,Global Control Register" bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset" bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High" textline " " bitfld.long 0x00 27.--28. " TestPattern ,Test pattern" "External camera processor input,Color bar,Horizontal increment,Vertical increment" textline " " bitfld.long 0x00 26. " InvPolCAMPCLK ,Polarity of PCLK" "Normal,Inverted" textline " " bitfld.long 0x00 25. " InvPolCAMVSYNC ,Polarity of VSYNC" "Normal,Inverted" bitfld.long 0x00 24. " InvPolCAMHREF ,Polarity of CAMHREF" "Normal,Inverted" else group.long 0x08++0x3 line.long 0x00 "CIGCTRL,Global Control Register" bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset" bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High" textline " " textline " " bitfld.long 0x00 26. " InvPolCAMPCLK ,Polarity of PCLK" "Normal,Inverted" textline " " bitfld.long 0x00 25. " InvPolCAMVSYNC ,Polarity of VSYNC" "Normal,Inverted" bitfld.long 0x00 24. " InvPolCAMHREF ,Polarity of CAMHREF" "Normal,Inverted" endif group.long 0x18++0x47 line.long 0x00 "CICOYSA1,Y 1st Frame Start Address For Codec DMA Register" hexmask.long 0x00 0.--31. 1. " CISOYSA1 ,Frame start address" line.long 0x04 "CICOYSA2,Y 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x04 0.--31. 1. " CICOYSA2 ,Frame start address" line.long 0x08 "CICOYSC3,Y 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x08 0.--31. 1. " CICOYSC3 ,Frame start address" line.long 0x0c "CICOYSA4,Y 4rd Frame Start Address For Codec DMA Register" hexmask.long 0x0c 0.--31. 1. " CICOYSA4 ,Frame start address" line.long 0x10 "CICOCBSA1,Cb 1st Frame Start Address For Codec DMA Register" hexmask.long 0x10 0.--31. 1. " CICOCBSA1 ,Frame start address" line.long 0x14 "CICOCBSA2,Cb 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x14 0.--31. 1. " CICOCBSA2 ,Frame start address" line.long 0x18 "CICOCBSA3,Cb 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x18 0.--31. 1. " CICOCBSA3 ,Frame start address" line.long 0x1c "CICOCBSA4,Cb 4th Frame Start Address For Codec DMA Register" hexmask.long 0x1c 0.--31. 1. " CICOCBSA4 ,Frame start address" line.long 0x20 "CICOCRSA1,Cr 1st Frame Start Address For Codec DMA Register" hexmask.long 0x20 0.--31. 1. " CICOCRSA1 ,Frame start address" line.long 0x24 "CICOCRSA2,Cr 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x24 0.--31. 1. " CICOCRSA2 ,Frame start address" line.long 0x28 "CICOCRSA3,Cr 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x28 0.--31. 1. " CICOCRSA3 ,Frame start address" line.long 0x2c "CICOCRSA4,Cr 4th Frame Start Address For Codec DMA Register" hexmask.long 0x2c 0.--31. 1. " CICOCRSA4 ,Frame start address" line.long 0x30 "CICOTRGFMT,Target Image Format Of Codec DMA Register" bitfld.long 0x30 31. " In422_Co ,Codec scaler input image format" "4:2:0,4:2:2" bitfld.long 0x30 30. " Out422_Co ,Codec scaler output image format" "4:2:0,4:2:2" textline " " hexmask.long.word 0x30 16.--28. 1. " TargetHsize_Co ,Horizontal pixel number of target image for codec DMA" bitfld.long 0x30 14.--15. " FlipMd_Co ,Image mirror and rotation for codec DMA" "Normal,X-axis,Y-axis,180 deg rotation" textline " " hexmask.long.word 0x30 0.--12. 1. " TargetVsize_Co ,Vertical pixel number of target image for codec DMA" line.long 0x34 "CICOCTRL,Codec DMA Control Related Register" bitfld.long 0x34 19.--23. " Yburst1_Co ,Main burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 14.--18. " Yburst2_Co ,Remained burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 9.--13. " Cburst1_Co ,Main burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 4.--8. " Cburst2_Co ,Remained burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 2. " LastIRQEn_Co ,Enable last IRQ at the and of frame capture" "Normal,Enabled" line.long 0x38 "CICOSCPRERATIO,Codec Pre-Scaler Ratio Control Register" bitfld.long 0x38 28.--31. " SHfactor_Co ,Shift factor for codec pre-scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x38 16.--22. 1. " PreHorRatio_Co ,Horizontal ratio of codec pre-scaler" textline " " hexmask.long.byte 0x38 0.--6. 1. " PreVerRatio_Co ,Vertical ratio of codec pre-scaler" line.long 0x3c "CICOSCPREDST,Codec Pre-Scaler Destination Format" hexmask.long.word 0x3c 16.--27. 1. " PreDstWidth_Co ,Destination width for codec pre-scaler" hexmask.long.word 0x3c 0.--11. 1. " PreDstHeight_Co ,Destination height for codec pre-scaler" line.long 0x40 "CICOSCCTRL,Codec Main-Scaler Control Register" bitfld.long 0x40 31. " ScalerBypass_Co ,Codec scaler bypass" "Not bypassed,Bypassed" bitfld.long 0x40 29.--30. " ScaleUpDown_Co ,Scale up/down flag for codec scaler" "Down,Reserved,Reserved,Up" textline " " hexmask.long.word 0x40 16.--24. 1. " MainHorRatio_Co ,Horizontal scale ratio for codec main-scaler" textline " " bitfld.long 0x40 15. " CoScalerStart ,Codec scaler start" "Low,High" hexmask.long.word 0x40 0.--8. 1. " MainVerRatio_Co ,Vertical scale ratio for codec main-scaler" line.long 0x44 "CICOTAREA,Codec Scaler Target Area Register" hexmask.long 0x44 0.--25. 1. " CICOTAREA ,Target area for codec DMA" rgroup.long 0x64++0x3 line.long 0x00 "CICOSTATUS,Codec Path Status Register" bitfld.long 0x00 31. " OvFiY_Co ,Overflow state of codec FIFO Y" "No overflow,Overflow" bitfld.long 0x00 30. " OvFiCb_Co ,Overflow state of codec FIFO Cb" "No overflow,Overflow" textline " " bitfld.long 0x00 29. " OvFiCr_Co ,Overflow state of codec FIFO Cr" "No overflow,Overflow" bitfld.long 0x00 28. " VSYNC ,Camera VSYNC" "Low,High" textline " " bitfld.long 0x00 26.--27. " FrameCnt_Co ,Frame count of codec DMA" "1,2,3,4" bitfld.long 0x00 25. " WinOfstEn_Co ,Window offset enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 23.--24. " FlipMd_Co ,Flip mode of codec DMA" "0,1,2,3" bitfld.long 0x00 22. " ImgCptEn_CamIf ,Image capture enable of camera interface" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ImgCptEn_CoSC ,Image capture enable of codec path" "Disabled,Enabled" group.long 0x6c++0xf line.long 0x00 "CIPRCLRSA1,RGB 1st Frame Start Address for Preview DMA Register" line.long 0x04 "CIPRCLRSA2,RGB 2nd Frame Start Address for Preview DMA Register" line.long 0x08 "CIPRCLRSA3,RGB 3rd Frame Start Address for Preview DMA Register" line.long 0x0c "CIPRCLRSA4,RGB 4th Frame Start Address for Preview DMA Register" group.long 0x7c++0x17 line.long 0x00 "CIPRTRGFMT,Target Image Format of Preview DMA Register" hexmask.long.byte 0x00 16.--28. 1. " TargetHsize_Pr ,Horizontal pixel number of target image for preview DMA" bitfld.long 0x00 14.--15. " FlipMd_Pr ,Image mirror and rotation for preview DMA" "Normal,X-axis mirror,Y-axis mirror,180 deg rotation" textline " " hexmask.long.word 0x00 0.--12. 1. " TargetVsize_Pr ,Vertical pixel number of target image for preview DMA" line.long 0x04 "CIPRCTRL,Preview DMA Control Related Register" bitfld.long 0x04 19.--23. " RGBburst1_Pr ,Main burst length for preview RGB frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 14.--18. " RGBburst2_Pr ,Remained burst length for preview RGB frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x04 2. " LastIRQEn_Pr ,Last IRQ at the end of frame capture" "Disabled,Enabled" line.long 0x08 "CIPRSCPRERATIO,Preview Pre-scaler Ratio Control" bitfld.long 0x08 28.--31. " SHfactor_Pr ,Shift factor for preview pre-scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x08 16.--22. 1. " PreHorRatio_Pr ,Horizontal ratio of preview pre-scaler" textline " " hexmask.long.byte 0x08 0.--6. 1. " PreVerRatio_Pr ,Vertical ratio of preview pre-scaler" line.long 0x0c "CIPRSCPREDST,Preview Pre-Scaler Destination Format" hexmask.long.word 0x0c 16.--27. 1. " PreDstWidth_Pr ,Destination width for preview pre-scaler" hexmask.long.word 0x0c 0.--11. 1. " PreDstHeight_Pr ,Destination height for preview pre-scaler" line.long 0x10 "CICOSCCTRL,Codec Main-Scaler Control Register" bitfld.long 0x10 31. " Sample_Pr ,Sampling method for format conversion" "Not bypassed,Bypassed" bitfld.long 0x10 30. " RGBformat_Pr ,RGB format" "16-bit,24-bit" textline " " bitfld.long 0x10 28.--29. " ScaleUpDown_Pr ,Scale up/down flag for preview scaler" "Down,Reserved,Reserved,Up" hexmask.long.word 0x10 16.--24. 1. " MainHorRatio_Pr ,Horizontal scale ratio for preview main-scaler" textline " " bitfld.long 0x10 15. " PrScalerStart ,Preview scaler start" "Low,High" hexmask.long.word 0x10 0.--8. 1. " MainVerRatio_Pr ,Vertical scale ratio for preview main-scaler" line.long 0x14 "CIPRTAREA,Preview scaler target area" hexmask.long 0x14 0.--25. 1. " CIPRTAREA ,Target area for preview DMA" rgroup.long 0x98++0x3 line.long 0x0 "CIPRSTATUS,Preview Path Status Register" bitfld.long 0x00 31. " OvFiY_Pr ,Overflow state of preview FIFO Y" "No overflow,Overflow" bitfld.long 0x00 30. " OvFiCb_Pr ,Overflow state of preview FIFO Cb" "No overflow,Overflow" textline " " bitfld.long 0x00 26.--27. " FrameCnt_Pr ,Frame count of preview DMA" "1,2,3,4" bitfld.long 0x00 23.--24. " FlipMd_Pr ,Flip mode of preview DMA" "0,1,2,3" textline " " bitfld.long 0x00 21. " ImgCptEn_PrSC ,Image capture enable of preview path" "Disabled,Enabled" group.long 0xa0++0x3 line.long 0x00 "CIIMGCPT,Image Capture Enable Command Register" bitfld.long 0x00 31. " ImgCptEn ,Camera interface global capture enable" "Disabled,Enabled" bitfld.long 0x00 30. " ImgCptEn_CoSc ,Capture enable for codec scaler" "Disabled,Enabled" textline " " bitfld.long 0x00 29. " ImgCptEn_PrSc ,Capture enable for preview scaler" "Disabled,Enabled" width 0xb endif sif (cpu()=="S3C2442B") width 16. group.long 0x00++0x3 line.long 0x00 "CISRCFMT,Input Source Format Register" bitfld.long 0x00 31. " ITU601_656n ,ITU-R YCbCr 8-bit mode" "BT.656,BT.601" bitfld.long 0x00 30. " UVOffset ,Cb Cr value offset control" "Normal,+128" textline " " hexmask.long.word 0x00 16.--28. 1. " SourceHsize ,Source horizontal pixel number" textline " " bitfld.long 0x00 14.--15. " Order422 ,Input YCbCr Order Inform For Input 8-bit mode" "YCbYCr,YCrYCb,CbYCrY,CrYCbY" hexmask.long.word 0x00 0.--12. 1. " SourceVsize ,Source vertical pixel number" group.long 0x04++0x3 line.long 0x00 "CIWDOFST,Window Offset Register" bitfld.long 0x00 31. " WinOfsEn ,Window offset enable" "Disabled,Enabled" bitfld.long 0x00 30. " ClrOvCoFiY ,Clear overlow flag of input CODEC FIFO Y" "Normal,Cleared" textline " " hexmask.long.word 0x00 16.--26. 1. " WinHorOfst ,Window Horizontal Offset" bitfld.long 0x00 15. " ClrOvCoFiCb ,Clear overflow flag of input CODEC FIFO Cb" "Normal,Cleared" textline " " bitfld.long 0x00 14. " ClrOvCoFiCr ,Clear overflow flag of input CODEC FIFO Cr" "Normal,Cleared" bitfld.long 0x00 13. " ClrOvPrFiCb ,Clear overflow flag of input PREVIEW FIFO Cb" "Normal,Cleared" textline " " bitfld.long 0x00 12. " ClrOvPrFiCr ,Clear overflow flag of input PREVIEW FIFO Cr" "Normal,Cleared" hexmask.long.word 0x00 0.--10. 1. " WinVerOfst ,Window vertical offset" if (((d.l(ad:0x4d800000))&0x80000000)==0x80000000) group.long 0x08++0x3 line.long 0x00 "CIGCTRL,Global Control Register" bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset" bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High" textline " " bitfld.long 0x00 27.--28. " TestPattern ,Test pattern" "External camera processor input,Color bar,Horizontal increment,Vertical increment" textline " " bitfld.long 0x00 26. " InvPolCAMPCLK ,Polarity of PCLK" "Normal,Inverted" textline " " bitfld.long 0x00 25. " InvPolCAMVSYNC ,Polarity of VSYNC" "Normal,Inverted" bitfld.long 0x00 24. " InvPolCAMHREF ,Polarity of CAMHREF" "Normal,Inverted" else group.long 0x08++0x3 line.long 0x00 "CIGCTRL,Global Control Register" bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset" bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High" textline " " textline " " bitfld.long 0x00 26. " InvPolCAMPCLK ,Polarity of PCLK" "Normal,Inverted" textline " " bitfld.long 0x00 25. " InvPolCAMVSYNC ,Polarity of VSYNC" "Normal,Inverted" bitfld.long 0x00 24. " InvPolCAMHREF ,Polarity of CAMHREF" "Normal,Inverted" endif group.long 0x18++0x47 line.long 0x00 "CICOYSA1,Y 1st Frame Start Address For Codec DMA Register" hexmask.long 0x00 0.--31. 1. " CISOYSA1 ,Frame start address" line.long 0x04 "CICOYSA2,Y 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x04 0.--31. 1. " CICOYSA2 ,Frame start address" line.long 0x08 "CICOYSC3,Y 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x08 0.--31. 1. " CICOYSC3 ,Frame start address" line.long 0x0c "CICOYSA4,Y 4rd Frame Start Address For Codec DMA Register" hexmask.long 0x0c 0.--31. 1. " CICOYSA4 ,Frame start address" line.long 0x10 "CICOCBSA1,Cb 1st Frame Start Address For Codec DMA Register" hexmask.long 0x10 0.--31. 1. " CICOCBSA1 ,Frame start address" line.long 0x14 "CICOCBSA2,Cb 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x14 0.--31. 1. " CICOCBSA2 ,Frame start address" line.long 0x18 "CICOCBSA3,Cb 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x18 0.--31. 1. " CICOCBSA3 ,Frame start address" line.long 0x1c "CICOCBSA4,Cb 4th Frame Start Address For Codec DMA Register" hexmask.long 0x1c 0.--31. 1. " CICOCBSA4 ,Frame start address" line.long 0x20 "CICOCRSA1,Cr 1st Frame Start Address For Codec DMA Register" hexmask.long 0x20 0.--31. 1. " CICOCRSA1 ,Frame start address" line.long 0x24 "CICOCRSA2,Cr 2nd Frame Start Address For Codec DMA Register" hexmask.long 0x24 0.--31. 1. " CICOCRSA2 ,Frame start address" line.long 0x28 "CICOCRSA3,Cr 3rd Frame Start Address For Codec DMA Register" hexmask.long 0x28 0.--31. 1. " CICOCRSA3 ,Frame start address" line.long 0x2c "CICOCRSA4,Cr 4th Frame Start Address For Codec DMA Register" hexmask.long 0x2c 0.--31. 1. " CICOCRSA4 ,Frame start address" line.long 0x30 "CICOTRGFMT,Target Image Format Of Codec DMA Register" bitfld.long 0x30 31. " In422_Co ,Codec scaler input image format" "4:2:0,4:2:2" bitfld.long 0x30 30. " Out422_Co ,Codec scaler output image format" "4:2:0,4:2:2" textline " " hexmask.long.word 0x30 16.--28. 1. " TargetHsize_Co ,Horizontal pixel number of target image for codec DMA" bitfld.long 0x30 14.--15. " FlipMd_Co ,Image mirror and rotation for codec DMA" "Normal,X-axis,Y-axis,180 deg rotation" textline " " hexmask.long.word 0x30 0.--12. 1. " TargetVsize_Co ,Vertical pixel number of target image for codec DMA" line.long 0x34 "CICOCTRL,Codec DMA Control Related Register" bitfld.long 0x34 19.--23. " Yburst1_Co ,Main burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 14.--18. " Yburst2_Co ,Remained burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 9.--13. " Cburst1_Co ,Main burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 4.--8. " Cburst2_Co ,Remained burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x34 2. " LastIRQEn_Co ,Enable last IRQ at the and of frame capture" "Normal,Enabled" line.long 0x38 "CICOSCPRERATIO,Codec Pre-Scaler Ratio Control Register" bitfld.long 0x38 28.--31. " SHfactor_Co ,Shift factor for codec pre-scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x38 16.--22. 1. " PreHorRatio_Co ,Horizontal ratio of codec pre-scaler" textline " " hexmask.long.byte 0x38 0.--6. 1. " PreVerRatio_Co ,Vertical ratio of codec pre-scaler" line.long 0x3c "CICOSCPREDST,Codec Pre-Scaler Destination Format" hexmask.long.word 0x3c 16.--27. 1. " PreDstWidth_Co ,Destination width for codec pre-scaler" hexmask.long.word 0x3c 0.--11. 1. " PreDstHeight_Co ,Destination height for codec pre-scaler" line.long 0x40 "CICOSCCTRL,Codec Main-Scaler Control Register" bitfld.long 0x40 31. " ScalerBypass_Co ,Codec scaler bypass" "Not bypassed,Bypassed" bitfld.long 0x40 29.--30. " ScaleUpDown_Co ,Scale up/down flag for codec scaler" "Down,Reserved,Reserved,Up" textline " " hexmask.long.word 0x40 16.--24. 1. " MainHorRatio_Co ,Horizontal scale ratio for codec main-scaler" textline " " bitfld.long 0x40 15. " CoScalerStart ,Codec scaler start" "Low,High" hexmask.long.word 0x40 0.--8. 1. " MainVerRatio_Co ,Vertical scale ratio for codec main-scaler" line.long 0x44 "CICOTAREA,Codec Scaler Target Area Register" hexmask.long 0x44 0.--25. 1. " CICOTAREA ,Target area for codec DMA" rgroup.long 0x64++0x3 line.long 0x00 "CICOSTATUS,Codec Path Status Register" bitfld.long 0x00 31. " OvFiY_Co ,Overflow state of codec FIFO Y" "No overflow,Overflow" bitfld.long 0x00 30. " OvFiCb_Co ,Overflow state of codec FIFO Cb" "No overflow,Overflow" textline " " bitfld.long 0x00 29. " OvFiCr_Co ,Overflow state of codec FIFO Cr" "No overflow,Overflow" bitfld.long 0x00 28. " VSYNC ,Camera VSYNC" "Low,High" textline " " bitfld.long 0x00 26.--27. " FrameCnt_Co ,Frame count of codec DMA" "1,2,3,4" bitfld.long 0x00 25. " WinOfstEn_Co ,Window offset enable status" "Disabled,Enabled" textline " " bitfld.long 0x00 23.--24. " FlipMd_Co ,Flip mode of codec DMA" "0,1,2,3" bitfld.long 0x00 22. " ImgCptEn_CamIf ,Image capture enable of camera interface" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ImgCptEn_CoSC ,Image capture enable of codec path" "Disabled,Enabled" group.long 0x6c++0xf line.long 0x00 "CIPRCLRSA1,RGB 1st Frame Start Address for Preview DMA Register" line.long 0x04 "CIPRCLRSA2,RGB 2nd Frame Start Address for Preview DMA Register" line.long 0x08 "CIPRCLRSA3,RGB 3rd Frame Start Address for Preview DMA Register" line.long 0x0c "CIPRCLRSA4,RGB 4th Frame Start Address for Preview DMA Register" group.long 0x7c++0x17 line.long 0x00 "CIPRTRGFMT,Target Image Format of Preview DMA Register" hexmask.long.byte 0x00 16.--28. 1. " TargetHsize_Pr ,Horizontal pixel number of target image for preview DMA" bitfld.long 0x00 23.--24. " FlipMd_Pr ,Image mirror and rotation for preview DMA" "Normal,X-axis mirror,Y-axis mirror,180' rotation" textline " " bitfld.long 0x00 12. " CSCRange ,YCbCr Input Data Dynamic Range Selection for the Color Space Conversion" "16<=Y<=235,0